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41c445ff JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
dc641b73 | 4 | * Copyright(c) 2013 - 2014 Intel Corporation. |
41c445ff JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
41c445ff JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
27 | /* Local includes */ | |
28 | #include "i40e.h" | |
4eb3f768 | 29 | #include "i40e_diag.h" |
a1c9a9d9 JK |
30 | #ifdef CONFIG_I40E_VXLAN |
31 | #include <net/vxlan.h> | |
32 | #endif | |
41c445ff JB |
33 | |
34 | const char i40e_driver_name[] = "i40e"; | |
35 | static const char i40e_driver_string[] = | |
36 | "Intel(R) Ethernet Connection XL710 Network Driver"; | |
37 | ||
38 | #define DRV_KERN "-k" | |
39 | ||
40 | #define DRV_VERSION_MAJOR 0 | |
e454d6bf | 41 | #define DRV_VERSION_MINOR 4 |
7974d5e5 | 42 | #define DRV_VERSION_BUILD 13 |
41c445ff JB |
43 | #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \ |
44 | __stringify(DRV_VERSION_MINOR) "." \ | |
45 | __stringify(DRV_VERSION_BUILD) DRV_KERN | |
46 | const char i40e_driver_version_str[] = DRV_VERSION; | |
8fb905b3 | 47 | static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation."; |
41c445ff JB |
48 | |
49 | /* a bit of forward declarations */ | |
50 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi); | |
51 | static void i40e_handle_reset_warning(struct i40e_pf *pf); | |
52 | static int i40e_add_vsi(struct i40e_vsi *vsi); | |
53 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi); | |
bc7d338f | 54 | static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit); |
41c445ff JB |
55 | static int i40e_setup_misc_vector(struct i40e_pf *pf); |
56 | static void i40e_determine_queue_usage(struct i40e_pf *pf); | |
57 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf); | |
cbf61325 | 58 | static void i40e_fdir_sb_setup(struct i40e_pf *pf); |
4e3b35b0 | 59 | static int i40e_veb_get_bw_info(struct i40e_veb *veb); |
41c445ff JB |
60 | |
61 | /* i40e_pci_tbl - PCI Device ID Table | |
62 | * | |
63 | * Last entry must be all 0s | |
64 | * | |
65 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
66 | * Class, Class Mask, private data (not used) } | |
67 | */ | |
68 | static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = { | |
ab60085e | 69 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0}, |
ab60085e SN |
70 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0}, |
71 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0}, | |
72 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0}, | |
73 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0}, | |
ab60085e SN |
74 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0}, |
75 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0}, | |
76 | {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0}, | |
41c445ff JB |
77 | /* required last entry */ |
78 | {0, } | |
79 | }; | |
80 | MODULE_DEVICE_TABLE(pci, i40e_pci_tbl); | |
81 | ||
82 | #define I40E_MAX_VF_COUNT 128 | |
83 | static int debug = -1; | |
84 | module_param(debug, int, 0); | |
85 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | |
86 | ||
87 | MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); | |
88 | MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver"); | |
89 | MODULE_LICENSE("GPL"); | |
90 | MODULE_VERSION(DRV_VERSION); | |
91 | ||
92 | /** | |
93 | * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code | |
94 | * @hw: pointer to the HW structure | |
95 | * @mem: ptr to mem struct to fill out | |
96 | * @size: size of memory requested | |
97 | * @alignment: what to align the allocation to | |
98 | **/ | |
99 | int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem, | |
100 | u64 size, u32 alignment) | |
101 | { | |
102 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
103 | ||
104 | mem->size = ALIGN(size, alignment); | |
105 | mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size, | |
106 | &mem->pa, GFP_KERNEL); | |
93bc73b8 JB |
107 | if (!mem->va) |
108 | return -ENOMEM; | |
41c445ff | 109 | |
93bc73b8 | 110 | return 0; |
41c445ff JB |
111 | } |
112 | ||
113 | /** | |
114 | * i40e_free_dma_mem_d - OS specific memory free for shared code | |
115 | * @hw: pointer to the HW structure | |
116 | * @mem: ptr to mem struct to free | |
117 | **/ | |
118 | int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem) | |
119 | { | |
120 | struct i40e_pf *pf = (struct i40e_pf *)hw->back; | |
121 | ||
122 | dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa); | |
123 | mem->va = NULL; | |
124 | mem->pa = 0; | |
125 | mem->size = 0; | |
126 | ||
127 | return 0; | |
128 | } | |
129 | ||
130 | /** | |
131 | * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code | |
132 | * @hw: pointer to the HW structure | |
133 | * @mem: ptr to mem struct to fill out | |
134 | * @size: size of memory requested | |
135 | **/ | |
136 | int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem, | |
137 | u32 size) | |
138 | { | |
139 | mem->size = size; | |
140 | mem->va = kzalloc(size, GFP_KERNEL); | |
141 | ||
93bc73b8 JB |
142 | if (!mem->va) |
143 | return -ENOMEM; | |
41c445ff | 144 | |
93bc73b8 | 145 | return 0; |
41c445ff JB |
146 | } |
147 | ||
148 | /** | |
149 | * i40e_free_virt_mem_d - OS specific memory free for shared code | |
150 | * @hw: pointer to the HW structure | |
151 | * @mem: ptr to mem struct to free | |
152 | **/ | |
153 | int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem) | |
154 | { | |
155 | /* it's ok to kfree a NULL pointer */ | |
156 | kfree(mem->va); | |
157 | mem->va = NULL; | |
158 | mem->size = 0; | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | /** | |
164 | * i40e_get_lump - find a lump of free generic resource | |
165 | * @pf: board private structure | |
166 | * @pile: the pile of resource to search | |
167 | * @needed: the number of items needed | |
168 | * @id: an owner id to stick on the items assigned | |
169 | * | |
170 | * Returns the base item index of the lump, or negative for error | |
171 | * | |
172 | * The search_hint trick and lack of advanced fit-finding only work | |
173 | * because we're highly likely to have all the same size lump requests. | |
174 | * Linear search time and any fragmentation should be minimal. | |
175 | **/ | |
176 | static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile, | |
177 | u16 needed, u16 id) | |
178 | { | |
179 | int ret = -ENOMEM; | |
ddf434ac | 180 | int i, j; |
41c445ff JB |
181 | |
182 | if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) { | |
183 | dev_info(&pf->pdev->dev, | |
184 | "param err: pile=%p needed=%d id=0x%04x\n", | |
185 | pile, needed, id); | |
186 | return -EINVAL; | |
187 | } | |
188 | ||
189 | /* start the linear search with an imperfect hint */ | |
190 | i = pile->search_hint; | |
ddf434ac | 191 | while (i < pile->num_entries) { |
41c445ff JB |
192 | /* skip already allocated entries */ |
193 | if (pile->list[i] & I40E_PILE_VALID_BIT) { | |
194 | i++; | |
195 | continue; | |
196 | } | |
197 | ||
198 | /* do we have enough in this lump? */ | |
199 | for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) { | |
200 | if (pile->list[i+j] & I40E_PILE_VALID_BIT) | |
201 | break; | |
202 | } | |
203 | ||
204 | if (j == needed) { | |
205 | /* there was enough, so assign it to the requestor */ | |
206 | for (j = 0; j < needed; j++) | |
207 | pile->list[i+j] = id | I40E_PILE_VALID_BIT; | |
208 | ret = i; | |
209 | pile->search_hint = i + j; | |
ddf434ac | 210 | break; |
41c445ff JB |
211 | } else { |
212 | /* not enough, so skip over it and continue looking */ | |
213 | i += j; | |
214 | } | |
215 | } | |
216 | ||
217 | return ret; | |
218 | } | |
219 | ||
220 | /** | |
221 | * i40e_put_lump - return a lump of generic resource | |
222 | * @pile: the pile of resource to search | |
223 | * @index: the base item index | |
224 | * @id: the owner id of the items assigned | |
225 | * | |
226 | * Returns the count of items in the lump | |
227 | **/ | |
228 | static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id) | |
229 | { | |
230 | int valid_id = (id | I40E_PILE_VALID_BIT); | |
231 | int count = 0; | |
232 | int i; | |
233 | ||
234 | if (!pile || index >= pile->num_entries) | |
235 | return -EINVAL; | |
236 | ||
237 | for (i = index; | |
238 | i < pile->num_entries && pile->list[i] == valid_id; | |
239 | i++) { | |
240 | pile->list[i] = 0; | |
241 | count++; | |
242 | } | |
243 | ||
244 | if (count && index < pile->search_hint) | |
245 | pile->search_hint = index; | |
246 | ||
247 | return count; | |
248 | } | |
249 | ||
250 | /** | |
251 | * i40e_service_event_schedule - Schedule the service task to wake up | |
252 | * @pf: board private structure | |
253 | * | |
254 | * If not already scheduled, this puts the task into the work queue | |
255 | **/ | |
256 | static void i40e_service_event_schedule(struct i40e_pf *pf) | |
257 | { | |
258 | if (!test_bit(__I40E_DOWN, &pf->state) && | |
259 | !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) && | |
260 | !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state)) | |
261 | schedule_work(&pf->service_task); | |
262 | } | |
263 | ||
264 | /** | |
265 | * i40e_tx_timeout - Respond to a Tx Hang | |
266 | * @netdev: network interface device structure | |
267 | * | |
268 | * If any port has noticed a Tx timeout, it is likely that the whole | |
269 | * device is munged, not just the one netdev port, so go for the full | |
270 | * reset. | |
271 | **/ | |
272 | static void i40e_tx_timeout(struct net_device *netdev) | |
273 | { | |
274 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
275 | struct i40e_vsi *vsi = np->vsi; | |
276 | struct i40e_pf *pf = vsi->back; | |
277 | ||
278 | pf->tx_timeout_count++; | |
279 | ||
280 | if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20))) | |
281 | pf->tx_timeout_recovery_level = 0; | |
282 | pf->tx_timeout_last_recovery = jiffies; | |
283 | netdev_info(netdev, "tx_timeout recovery level %d\n", | |
284 | pf->tx_timeout_recovery_level); | |
285 | ||
286 | switch (pf->tx_timeout_recovery_level) { | |
287 | case 0: | |
288 | /* disable and re-enable queues for the VSI */ | |
289 | if (in_interrupt()) { | |
290 | set_bit(__I40E_REINIT_REQUESTED, &pf->state); | |
291 | set_bit(__I40E_REINIT_REQUESTED, &vsi->state); | |
292 | } else { | |
293 | i40e_vsi_reinit_locked(vsi); | |
294 | } | |
295 | break; | |
296 | case 1: | |
297 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
298 | break; | |
299 | case 2: | |
300 | set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
301 | break; | |
302 | case 3: | |
303 | set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
304 | break; | |
305 | default: | |
306 | netdev_err(netdev, "tx_timeout recovery unsuccessful\n"); | |
b5d06f05 NP |
307 | set_bit(__I40E_DOWN_REQUESTED, &pf->state); |
308 | set_bit(__I40E_DOWN_REQUESTED, &vsi->state); | |
41c445ff JB |
309 | break; |
310 | } | |
311 | i40e_service_event_schedule(pf); | |
312 | pf->tx_timeout_recovery_level++; | |
313 | } | |
314 | ||
315 | /** | |
316 | * i40e_release_rx_desc - Store the new tail and head values | |
317 | * @rx_ring: ring to bump | |
318 | * @val: new head index | |
319 | **/ | |
320 | static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val) | |
321 | { | |
322 | rx_ring->next_to_use = val; | |
323 | ||
324 | /* Force memory writes to complete before letting h/w | |
325 | * know there are new descriptors to fetch. (Only | |
326 | * applicable for weak-ordered memory model archs, | |
327 | * such as IA-64). | |
328 | */ | |
329 | wmb(); | |
330 | writel(val, rx_ring->tail); | |
331 | } | |
332 | ||
333 | /** | |
334 | * i40e_get_vsi_stats_struct - Get System Network Statistics | |
335 | * @vsi: the VSI we care about | |
336 | * | |
337 | * Returns the address of the device statistics structure. | |
338 | * The statistics are actually updated from the service task. | |
339 | **/ | |
340 | struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi) | |
341 | { | |
342 | return &vsi->net_stats; | |
343 | } | |
344 | ||
345 | /** | |
346 | * i40e_get_netdev_stats_struct - Get statistics for netdev interface | |
347 | * @netdev: network interface device structure | |
348 | * | |
349 | * Returns the address of the device statistics structure. | |
350 | * The statistics are actually updated from the service task. | |
351 | **/ | |
352 | static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct( | |
353 | struct net_device *netdev, | |
980e9b11 | 354 | struct rtnl_link_stats64 *stats) |
41c445ff JB |
355 | { |
356 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
e7046ee1 | 357 | struct i40e_ring *tx_ring, *rx_ring; |
41c445ff | 358 | struct i40e_vsi *vsi = np->vsi; |
980e9b11 AD |
359 | struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi); |
360 | int i; | |
361 | ||
bc7d338f ASJ |
362 | if (test_bit(__I40E_DOWN, &vsi->state)) |
363 | return stats; | |
364 | ||
3c325ced JB |
365 | if (!vsi->tx_rings) |
366 | return stats; | |
367 | ||
980e9b11 AD |
368 | rcu_read_lock(); |
369 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
980e9b11 AD |
370 | u64 bytes, packets; |
371 | unsigned int start; | |
372 | ||
373 | tx_ring = ACCESS_ONCE(vsi->tx_rings[i]); | |
374 | if (!tx_ring) | |
375 | continue; | |
376 | ||
377 | do { | |
57a7744e | 378 | start = u64_stats_fetch_begin_irq(&tx_ring->syncp); |
980e9b11 AD |
379 | packets = tx_ring->stats.packets; |
380 | bytes = tx_ring->stats.bytes; | |
57a7744e | 381 | } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); |
980e9b11 AD |
382 | |
383 | stats->tx_packets += packets; | |
384 | stats->tx_bytes += bytes; | |
385 | rx_ring = &tx_ring[1]; | |
386 | ||
387 | do { | |
57a7744e | 388 | start = u64_stats_fetch_begin_irq(&rx_ring->syncp); |
980e9b11 AD |
389 | packets = rx_ring->stats.packets; |
390 | bytes = rx_ring->stats.bytes; | |
57a7744e | 391 | } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); |
41c445ff | 392 | |
980e9b11 AD |
393 | stats->rx_packets += packets; |
394 | stats->rx_bytes += bytes; | |
395 | } | |
396 | rcu_read_unlock(); | |
397 | ||
a5282f44 | 398 | /* following stats updated by i40e_watchdog_subtask() */ |
980e9b11 AD |
399 | stats->multicast = vsi_stats->multicast; |
400 | stats->tx_errors = vsi_stats->tx_errors; | |
401 | stats->tx_dropped = vsi_stats->tx_dropped; | |
402 | stats->rx_errors = vsi_stats->rx_errors; | |
403 | stats->rx_crc_errors = vsi_stats->rx_crc_errors; | |
404 | stats->rx_length_errors = vsi_stats->rx_length_errors; | |
41c445ff | 405 | |
980e9b11 | 406 | return stats; |
41c445ff JB |
407 | } |
408 | ||
409 | /** | |
410 | * i40e_vsi_reset_stats - Resets all stats of the given vsi | |
411 | * @vsi: the VSI to have its stats reset | |
412 | **/ | |
413 | void i40e_vsi_reset_stats(struct i40e_vsi *vsi) | |
414 | { | |
415 | struct rtnl_link_stats64 *ns; | |
416 | int i; | |
417 | ||
418 | if (!vsi) | |
419 | return; | |
420 | ||
421 | ns = i40e_get_vsi_stats_struct(vsi); | |
422 | memset(ns, 0, sizeof(*ns)); | |
423 | memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets)); | |
424 | memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats)); | |
425 | memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets)); | |
8e9dca53 | 426 | if (vsi->rx_rings && vsi->rx_rings[0]) { |
41c445ff | 427 | for (i = 0; i < vsi->num_queue_pairs; i++) { |
9f65e15b AD |
428 | memset(&vsi->rx_rings[i]->stats, 0 , |
429 | sizeof(vsi->rx_rings[i]->stats)); | |
430 | memset(&vsi->rx_rings[i]->rx_stats, 0 , | |
431 | sizeof(vsi->rx_rings[i]->rx_stats)); | |
432 | memset(&vsi->tx_rings[i]->stats, 0 , | |
433 | sizeof(vsi->tx_rings[i]->stats)); | |
434 | memset(&vsi->tx_rings[i]->tx_stats, 0, | |
435 | sizeof(vsi->tx_rings[i]->tx_stats)); | |
41c445ff | 436 | } |
8e9dca53 | 437 | } |
41c445ff JB |
438 | vsi->stat_offsets_loaded = false; |
439 | } | |
440 | ||
441 | /** | |
442 | * i40e_pf_reset_stats - Reset all of the stats for the given pf | |
443 | * @pf: the PF to be reset | |
444 | **/ | |
445 | void i40e_pf_reset_stats(struct i40e_pf *pf) | |
446 | { | |
e91fdf76 SN |
447 | int i; |
448 | ||
41c445ff JB |
449 | memset(&pf->stats, 0, sizeof(pf->stats)); |
450 | memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets)); | |
451 | pf->stat_offsets_loaded = false; | |
e91fdf76 SN |
452 | |
453 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
454 | if (pf->veb[i]) { | |
455 | memset(&pf->veb[i]->stats, 0, | |
456 | sizeof(pf->veb[i]->stats)); | |
457 | memset(&pf->veb[i]->stats_offsets, 0, | |
458 | sizeof(pf->veb[i]->stats_offsets)); | |
459 | pf->veb[i]->stat_offsets_loaded = false; | |
460 | } | |
461 | } | |
41c445ff JB |
462 | } |
463 | ||
464 | /** | |
465 | * i40e_stat_update48 - read and update a 48 bit stat from the chip | |
466 | * @hw: ptr to the hardware info | |
467 | * @hireg: the high 32 bit reg to read | |
468 | * @loreg: the low 32 bit reg to read | |
469 | * @offset_loaded: has the initial offset been loaded yet | |
470 | * @offset: ptr to current offset value | |
471 | * @stat: ptr to the stat | |
472 | * | |
473 | * Since the device stats are not reset at PFReset, they likely will not | |
474 | * be zeroed when the driver starts. We'll save the first values read | |
475 | * and use them as offsets to be subtracted from the raw values in order | |
476 | * to report stats that count from zero. In the process, we also manage | |
477 | * the potential roll-over. | |
478 | **/ | |
479 | static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg, | |
480 | bool offset_loaded, u64 *offset, u64 *stat) | |
481 | { | |
482 | u64 new_data; | |
483 | ||
ab60085e | 484 | if (hw->device_id == I40E_DEV_ID_QEMU) { |
41c445ff JB |
485 | new_data = rd32(hw, loreg); |
486 | new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32; | |
487 | } else { | |
488 | new_data = rd64(hw, loreg); | |
489 | } | |
490 | if (!offset_loaded) | |
491 | *offset = new_data; | |
492 | if (likely(new_data >= *offset)) | |
493 | *stat = new_data - *offset; | |
494 | else | |
495 | *stat = (new_data + ((u64)1 << 48)) - *offset; | |
496 | *stat &= 0xFFFFFFFFFFFFULL; | |
497 | } | |
498 | ||
499 | /** | |
500 | * i40e_stat_update32 - read and update a 32 bit stat from the chip | |
501 | * @hw: ptr to the hardware info | |
502 | * @reg: the hw reg to read | |
503 | * @offset_loaded: has the initial offset been loaded yet | |
504 | * @offset: ptr to current offset value | |
505 | * @stat: ptr to the stat | |
506 | **/ | |
507 | static void i40e_stat_update32(struct i40e_hw *hw, u32 reg, | |
508 | bool offset_loaded, u64 *offset, u64 *stat) | |
509 | { | |
510 | u32 new_data; | |
511 | ||
512 | new_data = rd32(hw, reg); | |
513 | if (!offset_loaded) | |
514 | *offset = new_data; | |
515 | if (likely(new_data >= *offset)) | |
516 | *stat = (u32)(new_data - *offset); | |
517 | else | |
518 | *stat = (u32)((new_data + ((u64)1 << 32)) - *offset); | |
519 | } | |
520 | ||
521 | /** | |
522 | * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters. | |
523 | * @vsi: the VSI to be updated | |
524 | **/ | |
525 | void i40e_update_eth_stats(struct i40e_vsi *vsi) | |
526 | { | |
527 | int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx); | |
528 | struct i40e_pf *pf = vsi->back; | |
529 | struct i40e_hw *hw = &pf->hw; | |
530 | struct i40e_eth_stats *oes; | |
531 | struct i40e_eth_stats *es; /* device's eth stats */ | |
532 | ||
533 | es = &vsi->eth_stats; | |
534 | oes = &vsi->eth_stats_offsets; | |
535 | ||
536 | /* Gather up the stats that the hw collects */ | |
537 | i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), | |
538 | vsi->stat_offsets_loaded, | |
539 | &oes->tx_errors, &es->tx_errors); | |
540 | i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), | |
541 | vsi->stat_offsets_loaded, | |
542 | &oes->rx_discards, &es->rx_discards); | |
41a9e55c SN |
543 | i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx), |
544 | vsi->stat_offsets_loaded, | |
545 | &oes->rx_unknown_protocol, &es->rx_unknown_protocol); | |
546 | i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx), | |
547 | vsi->stat_offsets_loaded, | |
548 | &oes->tx_errors, &es->tx_errors); | |
41c445ff JB |
549 | |
550 | i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx), | |
551 | I40E_GLV_GORCL(stat_idx), | |
552 | vsi->stat_offsets_loaded, | |
553 | &oes->rx_bytes, &es->rx_bytes); | |
554 | i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx), | |
555 | I40E_GLV_UPRCL(stat_idx), | |
556 | vsi->stat_offsets_loaded, | |
557 | &oes->rx_unicast, &es->rx_unicast); | |
558 | i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx), | |
559 | I40E_GLV_MPRCL(stat_idx), | |
560 | vsi->stat_offsets_loaded, | |
561 | &oes->rx_multicast, &es->rx_multicast); | |
562 | i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx), | |
563 | I40E_GLV_BPRCL(stat_idx), | |
564 | vsi->stat_offsets_loaded, | |
565 | &oes->rx_broadcast, &es->rx_broadcast); | |
566 | ||
567 | i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx), | |
568 | I40E_GLV_GOTCL(stat_idx), | |
569 | vsi->stat_offsets_loaded, | |
570 | &oes->tx_bytes, &es->tx_bytes); | |
571 | i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx), | |
572 | I40E_GLV_UPTCL(stat_idx), | |
573 | vsi->stat_offsets_loaded, | |
574 | &oes->tx_unicast, &es->tx_unicast); | |
575 | i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx), | |
576 | I40E_GLV_MPTCL(stat_idx), | |
577 | vsi->stat_offsets_loaded, | |
578 | &oes->tx_multicast, &es->tx_multicast); | |
579 | i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx), | |
580 | I40E_GLV_BPTCL(stat_idx), | |
581 | vsi->stat_offsets_loaded, | |
582 | &oes->tx_broadcast, &es->tx_broadcast); | |
583 | vsi->stat_offsets_loaded = true; | |
584 | } | |
585 | ||
586 | /** | |
587 | * i40e_update_veb_stats - Update Switch component statistics | |
588 | * @veb: the VEB being updated | |
589 | **/ | |
590 | static void i40e_update_veb_stats(struct i40e_veb *veb) | |
591 | { | |
592 | struct i40e_pf *pf = veb->pf; | |
593 | struct i40e_hw *hw = &pf->hw; | |
594 | struct i40e_eth_stats *oes; | |
595 | struct i40e_eth_stats *es; /* device's eth stats */ | |
596 | int idx = 0; | |
597 | ||
598 | idx = veb->stats_idx; | |
599 | es = &veb->stats; | |
600 | oes = &veb->stats_offsets; | |
601 | ||
602 | /* Gather up the stats that the hw collects */ | |
603 | i40e_stat_update32(hw, I40E_GLSW_TDPC(idx), | |
604 | veb->stat_offsets_loaded, | |
605 | &oes->tx_discards, &es->tx_discards); | |
7134f9ce JB |
606 | if (hw->revision_id > 0) |
607 | i40e_stat_update32(hw, I40E_GLSW_RUPP(idx), | |
608 | veb->stat_offsets_loaded, | |
609 | &oes->rx_unknown_protocol, | |
610 | &es->rx_unknown_protocol); | |
41c445ff JB |
611 | i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx), |
612 | veb->stat_offsets_loaded, | |
613 | &oes->rx_bytes, &es->rx_bytes); | |
614 | i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx), | |
615 | veb->stat_offsets_loaded, | |
616 | &oes->rx_unicast, &es->rx_unicast); | |
617 | i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx), | |
618 | veb->stat_offsets_loaded, | |
619 | &oes->rx_multicast, &es->rx_multicast); | |
620 | i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx), | |
621 | veb->stat_offsets_loaded, | |
622 | &oes->rx_broadcast, &es->rx_broadcast); | |
623 | ||
624 | i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx), | |
625 | veb->stat_offsets_loaded, | |
626 | &oes->tx_bytes, &es->tx_bytes); | |
627 | i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx), | |
628 | veb->stat_offsets_loaded, | |
629 | &oes->tx_unicast, &es->tx_unicast); | |
630 | i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx), | |
631 | veb->stat_offsets_loaded, | |
632 | &oes->tx_multicast, &es->tx_multicast); | |
633 | i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx), | |
634 | veb->stat_offsets_loaded, | |
635 | &oes->tx_broadcast, &es->tx_broadcast); | |
636 | veb->stat_offsets_loaded = true; | |
637 | } | |
638 | ||
639 | /** | |
640 | * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode | |
641 | * @pf: the corresponding PF | |
642 | * | |
643 | * Update the Rx XOFF counter (PAUSE frames) in link flow control mode | |
644 | **/ | |
645 | static void i40e_update_link_xoff_rx(struct i40e_pf *pf) | |
646 | { | |
647 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
648 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
649 | struct i40e_hw *hw = &pf->hw; | |
650 | u64 xoff = 0; | |
651 | u16 i, v; | |
652 | ||
653 | if ((hw->fc.current_mode != I40E_FC_FULL) && | |
654 | (hw->fc.current_mode != I40E_FC_RX_PAUSE)) | |
655 | return; | |
656 | ||
657 | xoff = nsd->link_xoff_rx; | |
658 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port), | |
659 | pf->stat_offsets_loaded, | |
660 | &osd->link_xoff_rx, &nsd->link_xoff_rx); | |
661 | ||
662 | /* No new LFC xoff rx */ | |
663 | if (!(nsd->link_xoff_rx - xoff)) | |
664 | return; | |
665 | ||
666 | /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */ | |
505682cd | 667 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
668 | struct i40e_vsi *vsi = pf->vsi[v]; |
669 | ||
ddfda80f | 670 | if (!vsi || !vsi->tx_rings[0]) |
41c445ff JB |
671 | continue; |
672 | ||
673 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 674 | struct i40e_ring *ring = vsi->tx_rings[i]; |
41c445ff JB |
675 | clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); |
676 | } | |
677 | } | |
678 | } | |
679 | ||
680 | /** | |
681 | * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode | |
682 | * @pf: the corresponding PF | |
683 | * | |
684 | * Update the Rx XOFF counter (PAUSE frames) in PFC mode | |
685 | **/ | |
686 | static void i40e_update_prio_xoff_rx(struct i40e_pf *pf) | |
687 | { | |
688 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
689 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
690 | bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false}; | |
691 | struct i40e_dcbx_config *dcb_cfg; | |
692 | struct i40e_hw *hw = &pf->hw; | |
693 | u16 i, v; | |
694 | u8 tc; | |
695 | ||
696 | dcb_cfg = &hw->local_dcbx_config; | |
697 | ||
698 | /* See if DCB enabled with PFC TC */ | |
699 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED) || | |
700 | !(dcb_cfg->pfc.pfcenable)) { | |
701 | i40e_update_link_xoff_rx(pf); | |
702 | return; | |
703 | } | |
704 | ||
705 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
706 | u64 prio_xoff = nsd->priority_xoff_rx[i]; | |
707 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i), | |
708 | pf->stat_offsets_loaded, | |
709 | &osd->priority_xoff_rx[i], | |
710 | &nsd->priority_xoff_rx[i]); | |
711 | ||
712 | /* No new PFC xoff rx */ | |
713 | if (!(nsd->priority_xoff_rx[i] - prio_xoff)) | |
714 | continue; | |
715 | /* Get the TC for given priority */ | |
716 | tc = dcb_cfg->etscfg.prioritytable[i]; | |
717 | xoff[tc] = true; | |
718 | } | |
719 | ||
720 | /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */ | |
505682cd | 721 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
722 | struct i40e_vsi *vsi = pf->vsi[v]; |
723 | ||
ddfda80f | 724 | if (!vsi || !vsi->tx_rings[0]) |
41c445ff JB |
725 | continue; |
726 | ||
727 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 728 | struct i40e_ring *ring = vsi->tx_rings[i]; |
41c445ff JB |
729 | |
730 | tc = ring->dcb_tc; | |
731 | if (xoff[tc]) | |
732 | clear_bit(__I40E_HANG_CHECK_ARMED, | |
733 | &ring->state); | |
734 | } | |
735 | } | |
736 | } | |
737 | ||
738 | /** | |
7812fddc | 739 | * i40e_update_vsi_stats - Update the vsi statistics counters. |
41c445ff JB |
740 | * @vsi: the VSI to be updated |
741 | * | |
742 | * There are a few instances where we store the same stat in a | |
743 | * couple of different structs. This is partly because we have | |
744 | * the netdev stats that need to be filled out, which is slightly | |
745 | * different from the "eth_stats" defined by the chip and used in | |
7812fddc | 746 | * VF communications. We sort it out here. |
41c445ff | 747 | **/ |
7812fddc | 748 | static void i40e_update_vsi_stats(struct i40e_vsi *vsi) |
41c445ff JB |
749 | { |
750 | struct i40e_pf *pf = vsi->back; | |
41c445ff JB |
751 | struct rtnl_link_stats64 *ons; |
752 | struct rtnl_link_stats64 *ns; /* netdev stats */ | |
753 | struct i40e_eth_stats *oes; | |
754 | struct i40e_eth_stats *es; /* device's eth stats */ | |
755 | u32 tx_restart, tx_busy; | |
756 | u32 rx_page, rx_buf; | |
757 | u64 rx_p, rx_b; | |
758 | u64 tx_p, tx_b; | |
41c445ff JB |
759 | u16 q; |
760 | ||
761 | if (test_bit(__I40E_DOWN, &vsi->state) || | |
762 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
763 | return; | |
764 | ||
765 | ns = i40e_get_vsi_stats_struct(vsi); | |
766 | ons = &vsi->net_stats_offsets; | |
767 | es = &vsi->eth_stats; | |
768 | oes = &vsi->eth_stats_offsets; | |
769 | ||
770 | /* Gather up the netdev and vsi stats that the driver collects | |
771 | * on the fly during packet processing | |
772 | */ | |
773 | rx_b = rx_p = 0; | |
774 | tx_b = tx_p = 0; | |
775 | tx_restart = tx_busy = 0; | |
776 | rx_page = 0; | |
777 | rx_buf = 0; | |
980e9b11 | 778 | rcu_read_lock(); |
41c445ff JB |
779 | for (q = 0; q < vsi->num_queue_pairs; q++) { |
780 | struct i40e_ring *p; | |
980e9b11 AD |
781 | u64 bytes, packets; |
782 | unsigned int start; | |
783 | ||
784 | /* locate Tx ring */ | |
785 | p = ACCESS_ONCE(vsi->tx_rings[q]); | |
786 | ||
787 | do { | |
57a7744e | 788 | start = u64_stats_fetch_begin_irq(&p->syncp); |
980e9b11 AD |
789 | packets = p->stats.packets; |
790 | bytes = p->stats.bytes; | |
57a7744e | 791 | } while (u64_stats_fetch_retry_irq(&p->syncp, start)); |
980e9b11 AD |
792 | tx_b += bytes; |
793 | tx_p += packets; | |
794 | tx_restart += p->tx_stats.restart_queue; | |
795 | tx_busy += p->tx_stats.tx_busy; | |
41c445ff | 796 | |
980e9b11 AD |
797 | /* Rx queue is part of the same block as Tx queue */ |
798 | p = &p[1]; | |
799 | do { | |
57a7744e | 800 | start = u64_stats_fetch_begin_irq(&p->syncp); |
980e9b11 AD |
801 | packets = p->stats.packets; |
802 | bytes = p->stats.bytes; | |
57a7744e | 803 | } while (u64_stats_fetch_retry_irq(&p->syncp, start)); |
980e9b11 AD |
804 | rx_b += bytes; |
805 | rx_p += packets; | |
420136cc MW |
806 | rx_buf += p->rx_stats.alloc_buff_failed; |
807 | rx_page += p->rx_stats.alloc_page_failed; | |
41c445ff | 808 | } |
980e9b11 | 809 | rcu_read_unlock(); |
41c445ff JB |
810 | vsi->tx_restart = tx_restart; |
811 | vsi->tx_busy = tx_busy; | |
812 | vsi->rx_page_failed = rx_page; | |
813 | vsi->rx_buf_failed = rx_buf; | |
814 | ||
815 | ns->rx_packets = rx_p; | |
816 | ns->rx_bytes = rx_b; | |
817 | ns->tx_packets = tx_p; | |
818 | ns->tx_bytes = tx_b; | |
819 | ||
41c445ff | 820 | /* update netdev stats from eth stats */ |
7812fddc | 821 | i40e_update_eth_stats(vsi); |
41c445ff JB |
822 | ons->tx_errors = oes->tx_errors; |
823 | ns->tx_errors = es->tx_errors; | |
824 | ons->multicast = oes->rx_multicast; | |
825 | ns->multicast = es->rx_multicast; | |
41a9e55c SN |
826 | ons->rx_dropped = oes->rx_discards; |
827 | ns->rx_dropped = es->rx_discards; | |
41c445ff JB |
828 | ons->tx_dropped = oes->tx_discards; |
829 | ns->tx_dropped = es->tx_discards; | |
830 | ||
7812fddc | 831 | /* pull in a couple PF stats if this is the main vsi */ |
41c445ff | 832 | if (vsi == pf->vsi[pf->lan_vsi]) { |
7812fddc SN |
833 | ns->rx_crc_errors = pf->stats.crc_errors; |
834 | ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes; | |
835 | ns->rx_length_errors = pf->stats.rx_length_errors; | |
836 | } | |
837 | } | |
41c445ff | 838 | |
7812fddc SN |
839 | /** |
840 | * i40e_update_pf_stats - Update the pf statistics counters. | |
841 | * @pf: the PF to be updated | |
842 | **/ | |
843 | static void i40e_update_pf_stats(struct i40e_pf *pf) | |
844 | { | |
845 | struct i40e_hw_port_stats *osd = &pf->stats_offsets; | |
846 | struct i40e_hw_port_stats *nsd = &pf->stats; | |
847 | struct i40e_hw *hw = &pf->hw; | |
848 | u32 val; | |
849 | int i; | |
41c445ff | 850 | |
7812fddc SN |
851 | i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port), |
852 | I40E_GLPRT_GORCL(hw->port), | |
853 | pf->stat_offsets_loaded, | |
854 | &osd->eth.rx_bytes, &nsd->eth.rx_bytes); | |
855 | i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port), | |
856 | I40E_GLPRT_GOTCL(hw->port), | |
857 | pf->stat_offsets_loaded, | |
858 | &osd->eth.tx_bytes, &nsd->eth.tx_bytes); | |
859 | i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port), | |
860 | pf->stat_offsets_loaded, | |
861 | &osd->eth.rx_discards, | |
862 | &nsd->eth.rx_discards); | |
863 | i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port), | |
864 | pf->stat_offsets_loaded, | |
865 | &osd->eth.tx_discards, | |
866 | &nsd->eth.tx_discards); | |
41c445ff | 867 | |
532d283d SN |
868 | i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port), |
869 | I40E_GLPRT_UPRCL(hw->port), | |
870 | pf->stat_offsets_loaded, | |
871 | &osd->eth.rx_unicast, | |
872 | &nsd->eth.rx_unicast); | |
7812fddc SN |
873 | i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port), |
874 | I40E_GLPRT_MPRCL(hw->port), | |
875 | pf->stat_offsets_loaded, | |
876 | &osd->eth.rx_multicast, | |
877 | &nsd->eth.rx_multicast); | |
532d283d SN |
878 | i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port), |
879 | I40E_GLPRT_BPRCL(hw->port), | |
880 | pf->stat_offsets_loaded, | |
881 | &osd->eth.rx_broadcast, | |
882 | &nsd->eth.rx_broadcast); | |
883 | i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port), | |
884 | I40E_GLPRT_UPTCL(hw->port), | |
885 | pf->stat_offsets_loaded, | |
886 | &osd->eth.tx_unicast, | |
887 | &nsd->eth.tx_unicast); | |
888 | i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port), | |
889 | I40E_GLPRT_MPTCL(hw->port), | |
890 | pf->stat_offsets_loaded, | |
891 | &osd->eth.tx_multicast, | |
892 | &nsd->eth.tx_multicast); | |
893 | i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port), | |
894 | I40E_GLPRT_BPTCL(hw->port), | |
895 | pf->stat_offsets_loaded, | |
896 | &osd->eth.tx_broadcast, | |
897 | &nsd->eth.tx_broadcast); | |
41c445ff | 898 | |
7812fddc SN |
899 | i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port), |
900 | pf->stat_offsets_loaded, | |
901 | &osd->tx_dropped_link_down, | |
902 | &nsd->tx_dropped_link_down); | |
41c445ff | 903 | |
7812fddc SN |
904 | i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port), |
905 | pf->stat_offsets_loaded, | |
906 | &osd->crc_errors, &nsd->crc_errors); | |
41c445ff | 907 | |
7812fddc SN |
908 | i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port), |
909 | pf->stat_offsets_loaded, | |
910 | &osd->illegal_bytes, &nsd->illegal_bytes); | |
41c445ff | 911 | |
7812fddc SN |
912 | i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port), |
913 | pf->stat_offsets_loaded, | |
914 | &osd->mac_local_faults, | |
915 | &nsd->mac_local_faults); | |
916 | i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port), | |
917 | pf->stat_offsets_loaded, | |
918 | &osd->mac_remote_faults, | |
919 | &nsd->mac_remote_faults); | |
41c445ff | 920 | |
7812fddc SN |
921 | i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port), |
922 | pf->stat_offsets_loaded, | |
923 | &osd->rx_length_errors, | |
924 | &nsd->rx_length_errors); | |
41c445ff | 925 | |
7812fddc SN |
926 | i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port), |
927 | pf->stat_offsets_loaded, | |
928 | &osd->link_xon_rx, &nsd->link_xon_rx); | |
929 | i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port), | |
930 | pf->stat_offsets_loaded, | |
931 | &osd->link_xon_tx, &nsd->link_xon_tx); | |
932 | i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */ | |
933 | i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port), | |
934 | pf->stat_offsets_loaded, | |
935 | &osd->link_xoff_tx, &nsd->link_xoff_tx); | |
41c445ff | 936 | |
7812fddc SN |
937 | for (i = 0; i < 8; i++) { |
938 | i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i), | |
41c445ff | 939 | pf->stat_offsets_loaded, |
7812fddc SN |
940 | &osd->priority_xon_rx[i], |
941 | &nsd->priority_xon_rx[i]); | |
942 | i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i), | |
41c445ff | 943 | pf->stat_offsets_loaded, |
7812fddc SN |
944 | &osd->priority_xon_tx[i], |
945 | &nsd->priority_xon_tx[i]); | |
946 | i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i), | |
41c445ff | 947 | pf->stat_offsets_loaded, |
7812fddc SN |
948 | &osd->priority_xoff_tx[i], |
949 | &nsd->priority_xoff_tx[i]); | |
950 | i40e_stat_update32(hw, | |
951 | I40E_GLPRT_RXON2OFFCNT(hw->port, i), | |
bee5af7e | 952 | pf->stat_offsets_loaded, |
7812fddc SN |
953 | &osd->priority_xon_2_xoff[i], |
954 | &nsd->priority_xon_2_xoff[i]); | |
41c445ff JB |
955 | } |
956 | ||
7812fddc SN |
957 | i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port), |
958 | I40E_GLPRT_PRC64L(hw->port), | |
959 | pf->stat_offsets_loaded, | |
960 | &osd->rx_size_64, &nsd->rx_size_64); | |
961 | i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port), | |
962 | I40E_GLPRT_PRC127L(hw->port), | |
963 | pf->stat_offsets_loaded, | |
964 | &osd->rx_size_127, &nsd->rx_size_127); | |
965 | i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port), | |
966 | I40E_GLPRT_PRC255L(hw->port), | |
967 | pf->stat_offsets_loaded, | |
968 | &osd->rx_size_255, &nsd->rx_size_255); | |
969 | i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port), | |
970 | I40E_GLPRT_PRC511L(hw->port), | |
971 | pf->stat_offsets_loaded, | |
972 | &osd->rx_size_511, &nsd->rx_size_511); | |
973 | i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port), | |
974 | I40E_GLPRT_PRC1023L(hw->port), | |
975 | pf->stat_offsets_loaded, | |
976 | &osd->rx_size_1023, &nsd->rx_size_1023); | |
977 | i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port), | |
978 | I40E_GLPRT_PRC1522L(hw->port), | |
979 | pf->stat_offsets_loaded, | |
980 | &osd->rx_size_1522, &nsd->rx_size_1522); | |
981 | i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port), | |
982 | I40E_GLPRT_PRC9522L(hw->port), | |
983 | pf->stat_offsets_loaded, | |
984 | &osd->rx_size_big, &nsd->rx_size_big); | |
985 | ||
986 | i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port), | |
987 | I40E_GLPRT_PTC64L(hw->port), | |
988 | pf->stat_offsets_loaded, | |
989 | &osd->tx_size_64, &nsd->tx_size_64); | |
990 | i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port), | |
991 | I40E_GLPRT_PTC127L(hw->port), | |
992 | pf->stat_offsets_loaded, | |
993 | &osd->tx_size_127, &nsd->tx_size_127); | |
994 | i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port), | |
995 | I40E_GLPRT_PTC255L(hw->port), | |
996 | pf->stat_offsets_loaded, | |
997 | &osd->tx_size_255, &nsd->tx_size_255); | |
998 | i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port), | |
999 | I40E_GLPRT_PTC511L(hw->port), | |
1000 | pf->stat_offsets_loaded, | |
1001 | &osd->tx_size_511, &nsd->tx_size_511); | |
1002 | i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port), | |
1003 | I40E_GLPRT_PTC1023L(hw->port), | |
1004 | pf->stat_offsets_loaded, | |
1005 | &osd->tx_size_1023, &nsd->tx_size_1023); | |
1006 | i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port), | |
1007 | I40E_GLPRT_PTC1522L(hw->port), | |
1008 | pf->stat_offsets_loaded, | |
1009 | &osd->tx_size_1522, &nsd->tx_size_1522); | |
1010 | i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port), | |
1011 | I40E_GLPRT_PTC9522L(hw->port), | |
1012 | pf->stat_offsets_loaded, | |
1013 | &osd->tx_size_big, &nsd->tx_size_big); | |
1014 | ||
1015 | i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port), | |
1016 | pf->stat_offsets_loaded, | |
1017 | &osd->rx_undersize, &nsd->rx_undersize); | |
1018 | i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port), | |
1019 | pf->stat_offsets_loaded, | |
1020 | &osd->rx_fragments, &nsd->rx_fragments); | |
1021 | i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port), | |
1022 | pf->stat_offsets_loaded, | |
1023 | &osd->rx_oversize, &nsd->rx_oversize); | |
1024 | i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port), | |
1025 | pf->stat_offsets_loaded, | |
1026 | &osd->rx_jabber, &nsd->rx_jabber); | |
1027 | ||
433c47de ASJ |
1028 | /* FDIR stats */ |
1029 | i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx), | |
1030 | pf->stat_offsets_loaded, | |
1031 | &osd->fd_atr_match, &nsd->fd_atr_match); | |
1032 | i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx), | |
1033 | pf->stat_offsets_loaded, | |
1034 | &osd->fd_sb_match, &nsd->fd_sb_match); | |
1035 | ||
7812fddc SN |
1036 | val = rd32(hw, I40E_PRTPM_EEE_STAT); |
1037 | nsd->tx_lpi_status = | |
1038 | (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >> | |
1039 | I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT; | |
1040 | nsd->rx_lpi_status = | |
1041 | (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >> | |
1042 | I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT; | |
1043 | i40e_stat_update32(hw, I40E_PRTPM_TLPIC, | |
1044 | pf->stat_offsets_loaded, | |
1045 | &osd->tx_lpi_count, &nsd->tx_lpi_count); | |
1046 | i40e_stat_update32(hw, I40E_PRTPM_RLPIC, | |
1047 | pf->stat_offsets_loaded, | |
1048 | &osd->rx_lpi_count, &nsd->rx_lpi_count); | |
1049 | ||
41c445ff JB |
1050 | pf->stat_offsets_loaded = true; |
1051 | } | |
1052 | ||
7812fddc SN |
1053 | /** |
1054 | * i40e_update_stats - Update the various statistics counters. | |
1055 | * @vsi: the VSI to be updated | |
1056 | * | |
1057 | * Update the various stats for this VSI and its related entities. | |
1058 | **/ | |
1059 | void i40e_update_stats(struct i40e_vsi *vsi) | |
1060 | { | |
1061 | struct i40e_pf *pf = vsi->back; | |
1062 | ||
1063 | if (vsi == pf->vsi[pf->lan_vsi]) | |
1064 | i40e_update_pf_stats(pf); | |
1065 | ||
1066 | i40e_update_vsi_stats(vsi); | |
1067 | } | |
1068 | ||
41c445ff JB |
1069 | /** |
1070 | * i40e_find_filter - Search VSI filter list for specific mac/vlan filter | |
1071 | * @vsi: the VSI to be searched | |
1072 | * @macaddr: the MAC address | |
1073 | * @vlan: the vlan | |
1074 | * @is_vf: make sure its a vf filter, else doesn't matter | |
1075 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
1076 | * | |
1077 | * Returns ptr to the filter object or NULL | |
1078 | **/ | |
1079 | static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi, | |
1080 | u8 *macaddr, s16 vlan, | |
1081 | bool is_vf, bool is_netdev) | |
1082 | { | |
1083 | struct i40e_mac_filter *f; | |
1084 | ||
1085 | if (!vsi || !macaddr) | |
1086 | return NULL; | |
1087 | ||
1088 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1089 | if ((ether_addr_equal(macaddr, f->macaddr)) && | |
1090 | (vlan == f->vlan) && | |
1091 | (!is_vf || f->is_vf) && | |
1092 | (!is_netdev || f->is_netdev)) | |
1093 | return f; | |
1094 | } | |
1095 | return NULL; | |
1096 | } | |
1097 | ||
1098 | /** | |
1099 | * i40e_find_mac - Find a mac addr in the macvlan filters list | |
1100 | * @vsi: the VSI to be searched | |
1101 | * @macaddr: the MAC address we are searching for | |
1102 | * @is_vf: make sure its a vf filter, else doesn't matter | |
1103 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
1104 | * | |
1105 | * Returns the first filter with the provided MAC address or NULL if | |
1106 | * MAC address was not found | |
1107 | **/ | |
1108 | struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr, | |
1109 | bool is_vf, bool is_netdev) | |
1110 | { | |
1111 | struct i40e_mac_filter *f; | |
1112 | ||
1113 | if (!vsi || !macaddr) | |
1114 | return NULL; | |
1115 | ||
1116 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1117 | if ((ether_addr_equal(macaddr, f->macaddr)) && | |
1118 | (!is_vf || f->is_vf) && | |
1119 | (!is_netdev || f->is_netdev)) | |
1120 | return f; | |
1121 | } | |
1122 | return NULL; | |
1123 | } | |
1124 | ||
1125 | /** | |
1126 | * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode | |
1127 | * @vsi: the VSI to be searched | |
1128 | * | |
1129 | * Returns true if VSI is in vlan mode or false otherwise | |
1130 | **/ | |
1131 | bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi) | |
1132 | { | |
1133 | struct i40e_mac_filter *f; | |
1134 | ||
1135 | /* Only -1 for all the filters denotes not in vlan mode | |
1136 | * so we have to go through all the list in order to make sure | |
1137 | */ | |
1138 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1139 | if (f->vlan >= 0) | |
1140 | return true; | |
1141 | } | |
1142 | ||
1143 | return false; | |
1144 | } | |
1145 | ||
1146 | /** | |
1147 | * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans | |
1148 | * @vsi: the VSI to be searched | |
1149 | * @macaddr: the mac address to be filtered | |
1150 | * @is_vf: true if it is a vf | |
1151 | * @is_netdev: true if it is a netdev | |
1152 | * | |
1153 | * Goes through all the macvlan filters and adds a | |
1154 | * macvlan filter for each unique vlan that already exists | |
1155 | * | |
1156 | * Returns first filter found on success, else NULL | |
1157 | **/ | |
1158 | struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr, | |
1159 | bool is_vf, bool is_netdev) | |
1160 | { | |
1161 | struct i40e_mac_filter *f; | |
1162 | ||
1163 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1164 | if (!i40e_find_filter(vsi, macaddr, f->vlan, | |
1165 | is_vf, is_netdev)) { | |
1166 | if (!i40e_add_filter(vsi, macaddr, f->vlan, | |
8fb905b3 | 1167 | is_vf, is_netdev)) |
41c445ff JB |
1168 | return NULL; |
1169 | } | |
1170 | } | |
1171 | ||
1172 | return list_first_entry_or_null(&vsi->mac_filter_list, | |
1173 | struct i40e_mac_filter, list); | |
1174 | } | |
1175 | ||
8c27d42e GR |
1176 | /** |
1177 | * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM | |
1178 | * @vsi: the PF Main VSI - inappropriate for any other VSI | |
1179 | * @macaddr: the MAC address | |
1180 | **/ | |
1181 | static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr) | |
1182 | { | |
1183 | struct i40e_aqc_remove_macvlan_element_data element; | |
1184 | struct i40e_pf *pf = vsi->back; | |
1185 | i40e_status aq_ret; | |
1186 | ||
1187 | /* Only appropriate for the PF main VSI */ | |
1188 | if (vsi->type != I40E_VSI_MAIN) | |
1189 | return; | |
1190 | ||
1191 | ether_addr_copy(element.mac_addr, macaddr); | |
1192 | element.vlan_tag = 0; | |
1193 | element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH | | |
1194 | I40E_AQC_MACVLAN_DEL_IGNORE_VLAN; | |
1195 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL); | |
1196 | if (aq_ret) | |
1197 | dev_err(&pf->pdev->dev, "Could not remove default MAC-VLAN\n"); | |
1198 | } | |
1199 | ||
41c445ff JB |
1200 | /** |
1201 | * i40e_add_filter - Add a mac/vlan filter to the VSI | |
1202 | * @vsi: the VSI to be searched | |
1203 | * @macaddr: the MAC address | |
1204 | * @vlan: the vlan | |
1205 | * @is_vf: make sure its a vf filter, else doesn't matter | |
1206 | * @is_netdev: make sure its a netdev filter, else doesn't matter | |
1207 | * | |
1208 | * Returns ptr to the filter object or NULL when no memory available. | |
1209 | **/ | |
1210 | struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi, | |
1211 | u8 *macaddr, s16 vlan, | |
1212 | bool is_vf, bool is_netdev) | |
1213 | { | |
1214 | struct i40e_mac_filter *f; | |
1215 | ||
1216 | if (!vsi || !macaddr) | |
1217 | return NULL; | |
1218 | ||
1219 | f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); | |
1220 | if (!f) { | |
1221 | f = kzalloc(sizeof(*f), GFP_ATOMIC); | |
1222 | if (!f) | |
1223 | goto add_filter_out; | |
1224 | ||
9a173901 | 1225 | ether_addr_copy(f->macaddr, macaddr); |
41c445ff JB |
1226 | f->vlan = vlan; |
1227 | f->changed = true; | |
1228 | ||
1229 | INIT_LIST_HEAD(&f->list); | |
1230 | list_add(&f->list, &vsi->mac_filter_list); | |
1231 | } | |
1232 | ||
1233 | /* increment counter and add a new flag if needed */ | |
1234 | if (is_vf) { | |
1235 | if (!f->is_vf) { | |
1236 | f->is_vf = true; | |
1237 | f->counter++; | |
1238 | } | |
1239 | } else if (is_netdev) { | |
1240 | if (!f->is_netdev) { | |
1241 | f->is_netdev = true; | |
1242 | f->counter++; | |
1243 | } | |
1244 | } else { | |
1245 | f->counter++; | |
1246 | } | |
1247 | ||
1248 | /* changed tells sync_filters_subtask to | |
1249 | * push the filter down to the firmware | |
1250 | */ | |
1251 | if (f->changed) { | |
1252 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1253 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1254 | } | |
1255 | ||
1256 | add_filter_out: | |
1257 | return f; | |
1258 | } | |
1259 | ||
1260 | /** | |
1261 | * i40e_del_filter - Remove a mac/vlan filter from the VSI | |
1262 | * @vsi: the VSI to be searched | |
1263 | * @macaddr: the MAC address | |
1264 | * @vlan: the vlan | |
1265 | * @is_vf: make sure it's a vf filter, else doesn't matter | |
1266 | * @is_netdev: make sure it's a netdev filter, else doesn't matter | |
1267 | **/ | |
1268 | void i40e_del_filter(struct i40e_vsi *vsi, | |
1269 | u8 *macaddr, s16 vlan, | |
1270 | bool is_vf, bool is_netdev) | |
1271 | { | |
1272 | struct i40e_mac_filter *f; | |
1273 | ||
1274 | if (!vsi || !macaddr) | |
1275 | return; | |
1276 | ||
1277 | f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev); | |
1278 | if (!f || f->counter == 0) | |
1279 | return; | |
1280 | ||
1281 | if (is_vf) { | |
1282 | if (f->is_vf) { | |
1283 | f->is_vf = false; | |
1284 | f->counter--; | |
1285 | } | |
1286 | } else if (is_netdev) { | |
1287 | if (f->is_netdev) { | |
1288 | f->is_netdev = false; | |
1289 | f->counter--; | |
1290 | } | |
1291 | } else { | |
1292 | /* make sure we don't remove a filter in use by vf or netdev */ | |
1293 | int min_f = 0; | |
1294 | min_f += (f->is_vf ? 1 : 0); | |
1295 | min_f += (f->is_netdev ? 1 : 0); | |
1296 | ||
1297 | if (f->counter > min_f) | |
1298 | f->counter--; | |
1299 | } | |
1300 | ||
1301 | /* counter == 0 tells sync_filters_subtask to | |
1302 | * remove the filter from the firmware's list | |
1303 | */ | |
1304 | if (f->counter == 0) { | |
1305 | f->changed = true; | |
1306 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1307 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1308 | } | |
1309 | } | |
1310 | ||
1311 | /** | |
1312 | * i40e_set_mac - NDO callback to set mac address | |
1313 | * @netdev: network interface device structure | |
1314 | * @p: pointer to an address structure | |
1315 | * | |
1316 | * Returns 0 on success, negative on failure | |
1317 | **/ | |
1318 | static int i40e_set_mac(struct net_device *netdev, void *p) | |
1319 | { | |
1320 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1321 | struct i40e_vsi *vsi = np->vsi; | |
1322 | struct sockaddr *addr = p; | |
1323 | struct i40e_mac_filter *f; | |
1324 | ||
1325 | if (!is_valid_ether_addr(addr->sa_data)) | |
1326 | return -EADDRNOTAVAIL; | |
1327 | ||
1328 | netdev_info(netdev, "set mac address=%pM\n", addr->sa_data); | |
1329 | ||
1330 | if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) | |
1331 | return 0; | |
1332 | ||
80f6428f ASJ |
1333 | if (test_bit(__I40E_DOWN, &vsi->back->state) || |
1334 | test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) | |
1335 | return -EADDRNOTAVAIL; | |
1336 | ||
41c445ff JB |
1337 | if (vsi->type == I40E_VSI_MAIN) { |
1338 | i40e_status ret; | |
1339 | ret = i40e_aq_mac_address_write(&vsi->back->hw, | |
1340 | I40E_AQC_WRITE_TYPE_LAA_ONLY, | |
1341 | addr->sa_data, NULL); | |
1342 | if (ret) { | |
1343 | netdev_info(netdev, | |
1344 | "Addr change for Main VSI failed: %d\n", | |
1345 | ret); | |
1346 | return -EADDRNOTAVAIL; | |
1347 | } | |
1348 | ||
9a173901 | 1349 | ether_addr_copy(vsi->back->hw.mac.addr, addr->sa_data); |
41c445ff JB |
1350 | } |
1351 | ||
1352 | /* In order to be sure to not drop any packets, add the new address | |
1353 | * then delete the old one. | |
1354 | */ | |
1355 | f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false); | |
1356 | if (!f) | |
1357 | return -ENOMEM; | |
1358 | ||
1359 | i40e_sync_vsi_filters(vsi); | |
1360 | i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false); | |
1361 | i40e_sync_vsi_filters(vsi); | |
1362 | ||
9a173901 | 1363 | ether_addr_copy(netdev->dev_addr, addr->sa_data); |
41c445ff JB |
1364 | |
1365 | return 0; | |
1366 | } | |
1367 | ||
1368 | /** | |
1369 | * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc | |
1370 | * @vsi: the VSI being setup | |
1371 | * @ctxt: VSI context structure | |
1372 | * @enabled_tc: Enabled TCs bitmap | |
1373 | * @is_add: True if called before Add VSI | |
1374 | * | |
1375 | * Setup VSI queue mapping for enabled traffic classes. | |
1376 | **/ | |
1377 | static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi, | |
1378 | struct i40e_vsi_context *ctxt, | |
1379 | u8 enabled_tc, | |
1380 | bool is_add) | |
1381 | { | |
1382 | struct i40e_pf *pf = vsi->back; | |
1383 | u16 sections = 0; | |
1384 | u8 netdev_tc = 0; | |
1385 | u16 numtc = 0; | |
1386 | u16 qcount; | |
1387 | u8 offset; | |
1388 | u16 qmap; | |
1389 | int i; | |
4e3b35b0 | 1390 | u16 num_tc_qps = 0; |
41c445ff JB |
1391 | |
1392 | sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID; | |
1393 | offset = 0; | |
1394 | ||
1395 | if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) { | |
1396 | /* Find numtc from enabled TC bitmap */ | |
1397 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1398 | if (enabled_tc & (1 << i)) /* TC is enabled */ | |
1399 | numtc++; | |
1400 | } | |
1401 | if (!numtc) { | |
1402 | dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n"); | |
1403 | numtc = 1; | |
1404 | } | |
1405 | } else { | |
1406 | /* At least TC0 is enabled in case of non-DCB case */ | |
1407 | numtc = 1; | |
1408 | } | |
1409 | ||
1410 | vsi->tc_config.numtc = numtc; | |
1411 | vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; | |
4e3b35b0 | 1412 | /* Number of queues per enabled TC */ |
eb051afe | 1413 | num_tc_qps = vsi->alloc_queue_pairs/numtc; |
4e3b35b0 | 1414 | num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); |
41c445ff JB |
1415 | |
1416 | /* Setup queue offset/count for all TCs for given VSI */ | |
1417 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
1418 | /* See if the given TC is enabled for the given VSI */ | |
1419 | if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */ | |
1420 | int pow, num_qps; | |
1421 | ||
41c445ff JB |
1422 | switch (vsi->type) { |
1423 | case I40E_VSI_MAIN: | |
4e3b35b0 | 1424 | qcount = min_t(int, pf->rss_size, num_tc_qps); |
41c445ff JB |
1425 | break; |
1426 | case I40E_VSI_FDIR: | |
1427 | case I40E_VSI_SRIOV: | |
1428 | case I40E_VSI_VMDQ2: | |
1429 | default: | |
4e3b35b0 | 1430 | qcount = num_tc_qps; |
41c445ff JB |
1431 | WARN_ON(i != 0); |
1432 | break; | |
1433 | } | |
4e3b35b0 NP |
1434 | vsi->tc_config.tc_info[i].qoffset = offset; |
1435 | vsi->tc_config.tc_info[i].qcount = qcount; | |
41c445ff JB |
1436 | |
1437 | /* find the power-of-2 of the number of queue pairs */ | |
4e3b35b0 | 1438 | num_qps = qcount; |
41c445ff | 1439 | pow = 0; |
4e3b35b0 | 1440 | while (num_qps && ((1 << pow) < qcount)) { |
41c445ff JB |
1441 | pow++; |
1442 | num_qps >>= 1; | |
1443 | } | |
1444 | ||
1445 | vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++; | |
1446 | qmap = | |
1447 | (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) | | |
1448 | (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT); | |
1449 | ||
4e3b35b0 | 1450 | offset += qcount; |
41c445ff JB |
1451 | } else { |
1452 | /* TC is not enabled so set the offset to | |
1453 | * default queue and allocate one queue | |
1454 | * for the given TC. | |
1455 | */ | |
1456 | vsi->tc_config.tc_info[i].qoffset = 0; | |
1457 | vsi->tc_config.tc_info[i].qcount = 1; | |
1458 | vsi->tc_config.tc_info[i].netdev_tc = 0; | |
1459 | ||
1460 | qmap = 0; | |
1461 | } | |
1462 | ctxt->info.tc_mapping[i] = cpu_to_le16(qmap); | |
1463 | } | |
1464 | ||
1465 | /* Set actual Tx/Rx queue pairs */ | |
1466 | vsi->num_queue_pairs = offset; | |
1467 | ||
1468 | /* Scheduler section valid can only be set for ADD VSI */ | |
1469 | if (is_add) { | |
1470 | sections |= I40E_AQ_VSI_PROP_SCHED_VALID; | |
1471 | ||
1472 | ctxt->info.up_enable_bits = enabled_tc; | |
1473 | } | |
1474 | if (vsi->type == I40E_VSI_SRIOV) { | |
1475 | ctxt->info.mapping_flags |= | |
1476 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG); | |
1477 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
1478 | ctxt->info.queue_mapping[i] = | |
1479 | cpu_to_le16(vsi->base_queue + i); | |
1480 | } else { | |
1481 | ctxt->info.mapping_flags |= | |
1482 | cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG); | |
1483 | ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue); | |
1484 | } | |
1485 | ctxt->info.valid_sections |= cpu_to_le16(sections); | |
1486 | } | |
1487 | ||
1488 | /** | |
1489 | * i40e_set_rx_mode - NDO callback to set the netdev filters | |
1490 | * @netdev: network interface device structure | |
1491 | **/ | |
1492 | static void i40e_set_rx_mode(struct net_device *netdev) | |
1493 | { | |
1494 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1495 | struct i40e_mac_filter *f, *ftmp; | |
1496 | struct i40e_vsi *vsi = np->vsi; | |
1497 | struct netdev_hw_addr *uca; | |
1498 | struct netdev_hw_addr *mca; | |
1499 | struct netdev_hw_addr *ha; | |
1500 | ||
1501 | /* add addr if not already in the filter list */ | |
1502 | netdev_for_each_uc_addr(uca, netdev) { | |
1503 | if (!i40e_find_mac(vsi, uca->addr, false, true)) { | |
1504 | if (i40e_is_vsi_in_vlan(vsi)) | |
1505 | i40e_put_mac_in_vlan(vsi, uca->addr, | |
1506 | false, true); | |
1507 | else | |
1508 | i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY, | |
1509 | false, true); | |
1510 | } | |
1511 | } | |
1512 | ||
1513 | netdev_for_each_mc_addr(mca, netdev) { | |
1514 | if (!i40e_find_mac(vsi, mca->addr, false, true)) { | |
1515 | if (i40e_is_vsi_in_vlan(vsi)) | |
1516 | i40e_put_mac_in_vlan(vsi, mca->addr, | |
1517 | false, true); | |
1518 | else | |
1519 | i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY, | |
1520 | false, true); | |
1521 | } | |
1522 | } | |
1523 | ||
1524 | /* remove filter if not in netdev list */ | |
1525 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1526 | bool found = false; | |
1527 | ||
1528 | if (!f->is_netdev) | |
1529 | continue; | |
1530 | ||
1531 | if (is_multicast_ether_addr(f->macaddr)) { | |
1532 | netdev_for_each_mc_addr(mca, netdev) { | |
1533 | if (ether_addr_equal(mca->addr, f->macaddr)) { | |
1534 | found = true; | |
1535 | break; | |
1536 | } | |
1537 | } | |
1538 | } else { | |
1539 | netdev_for_each_uc_addr(uca, netdev) { | |
1540 | if (ether_addr_equal(uca->addr, f->macaddr)) { | |
1541 | found = true; | |
1542 | break; | |
1543 | } | |
1544 | } | |
1545 | ||
1546 | for_each_dev_addr(netdev, ha) { | |
1547 | if (ether_addr_equal(ha->addr, f->macaddr)) { | |
1548 | found = true; | |
1549 | break; | |
1550 | } | |
1551 | } | |
1552 | } | |
1553 | if (!found) | |
1554 | i40e_del_filter( | |
1555 | vsi, f->macaddr, I40E_VLAN_ANY, false, true); | |
1556 | } | |
1557 | ||
1558 | /* check for other flag changes */ | |
1559 | if (vsi->current_netdev_flags != vsi->netdev->flags) { | |
1560 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
1561 | vsi->back->flags |= I40E_FLAG_FILTER_SYNC; | |
1562 | } | |
1563 | } | |
1564 | ||
1565 | /** | |
1566 | * i40e_sync_vsi_filters - Update the VSI filter list to the HW | |
1567 | * @vsi: ptr to the VSI | |
1568 | * | |
1569 | * Push any outstanding VSI filter changes through the AdminQ. | |
1570 | * | |
1571 | * Returns 0 or error value | |
1572 | **/ | |
1573 | int i40e_sync_vsi_filters(struct i40e_vsi *vsi) | |
1574 | { | |
1575 | struct i40e_mac_filter *f, *ftmp; | |
1576 | bool promisc_forced_on = false; | |
1577 | bool add_happened = false; | |
1578 | int filter_list_len = 0; | |
1579 | u32 changed_flags = 0; | |
dcae29be | 1580 | i40e_status aq_ret = 0; |
41c445ff JB |
1581 | struct i40e_pf *pf; |
1582 | int num_add = 0; | |
1583 | int num_del = 0; | |
1584 | u16 cmd_flags; | |
1585 | ||
1586 | /* empty array typed pointers, kcalloc later */ | |
1587 | struct i40e_aqc_add_macvlan_element_data *add_list; | |
1588 | struct i40e_aqc_remove_macvlan_element_data *del_list; | |
1589 | ||
1590 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state)) | |
1591 | usleep_range(1000, 2000); | |
1592 | pf = vsi->back; | |
1593 | ||
1594 | if (vsi->netdev) { | |
1595 | changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags; | |
1596 | vsi->current_netdev_flags = vsi->netdev->flags; | |
1597 | } | |
1598 | ||
1599 | if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) { | |
1600 | vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED; | |
1601 | ||
1602 | filter_list_len = pf->hw.aq.asq_buf_size / | |
1603 | sizeof(struct i40e_aqc_remove_macvlan_element_data); | |
1604 | del_list = kcalloc(filter_list_len, | |
1605 | sizeof(struct i40e_aqc_remove_macvlan_element_data), | |
1606 | GFP_KERNEL); | |
1607 | if (!del_list) | |
1608 | return -ENOMEM; | |
1609 | ||
1610 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1611 | if (!f->changed) | |
1612 | continue; | |
1613 | ||
1614 | if (f->counter != 0) | |
1615 | continue; | |
1616 | f->changed = false; | |
1617 | cmd_flags = 0; | |
1618 | ||
1619 | /* add to delete list */ | |
9a173901 | 1620 | ether_addr_copy(del_list[num_del].mac_addr, f->macaddr); |
41c445ff JB |
1621 | del_list[num_del].vlan_tag = |
1622 | cpu_to_le16((u16)(f->vlan == | |
1623 | I40E_VLAN_ANY ? 0 : f->vlan)); | |
1624 | ||
41c445ff JB |
1625 | cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH; |
1626 | del_list[num_del].flags = cmd_flags; | |
1627 | num_del++; | |
1628 | ||
1629 | /* unlink from filter list */ | |
1630 | list_del(&f->list); | |
1631 | kfree(f); | |
1632 | ||
1633 | /* flush a full buffer */ | |
1634 | if (num_del == filter_list_len) { | |
dcae29be | 1635 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, |
41c445ff JB |
1636 | vsi->seid, del_list, num_del, |
1637 | NULL); | |
1638 | num_del = 0; | |
1639 | memset(del_list, 0, sizeof(*del_list)); | |
1640 | ||
fdfe9cbe SN |
1641 | if (aq_ret && |
1642 | pf->hw.aq.asq_last_status != | |
1643 | I40E_AQ_RC_ENOENT) | |
41c445ff JB |
1644 | dev_info(&pf->pdev->dev, |
1645 | "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n", | |
dcae29be | 1646 | aq_ret, |
41c445ff JB |
1647 | pf->hw.aq.asq_last_status); |
1648 | } | |
1649 | } | |
1650 | if (num_del) { | |
dcae29be | 1651 | aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, |
41c445ff JB |
1652 | del_list, num_del, NULL); |
1653 | num_del = 0; | |
1654 | ||
fdfe9cbe SN |
1655 | if (aq_ret && |
1656 | pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT) | |
41c445ff JB |
1657 | dev_info(&pf->pdev->dev, |
1658 | "ignoring delete macvlan error, err %d, aq_err %d\n", | |
dcae29be | 1659 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1660 | } |
1661 | ||
1662 | kfree(del_list); | |
1663 | del_list = NULL; | |
1664 | ||
1665 | /* do all the adds now */ | |
1666 | filter_list_len = pf->hw.aq.asq_buf_size / | |
1667 | sizeof(struct i40e_aqc_add_macvlan_element_data), | |
1668 | add_list = kcalloc(filter_list_len, | |
1669 | sizeof(struct i40e_aqc_add_macvlan_element_data), | |
1670 | GFP_KERNEL); | |
1671 | if (!add_list) | |
1672 | return -ENOMEM; | |
1673 | ||
1674 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
1675 | if (!f->changed) | |
1676 | continue; | |
1677 | ||
1678 | if (f->counter == 0) | |
1679 | continue; | |
1680 | f->changed = false; | |
1681 | add_happened = true; | |
1682 | cmd_flags = 0; | |
1683 | ||
1684 | /* add to add array */ | |
9a173901 | 1685 | ether_addr_copy(add_list[num_add].mac_addr, f->macaddr); |
41c445ff JB |
1686 | add_list[num_add].vlan_tag = |
1687 | cpu_to_le16( | |
1688 | (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan)); | |
1689 | add_list[num_add].queue_number = 0; | |
1690 | ||
1691 | cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH; | |
41c445ff JB |
1692 | add_list[num_add].flags = cpu_to_le16(cmd_flags); |
1693 | num_add++; | |
1694 | ||
1695 | /* flush a full buffer */ | |
1696 | if (num_add == filter_list_len) { | |
dcae29be JB |
1697 | aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, |
1698 | add_list, num_add, | |
1699 | NULL); | |
41c445ff JB |
1700 | num_add = 0; |
1701 | ||
dcae29be | 1702 | if (aq_ret) |
41c445ff JB |
1703 | break; |
1704 | memset(add_list, 0, sizeof(*add_list)); | |
1705 | } | |
1706 | } | |
1707 | if (num_add) { | |
dcae29be JB |
1708 | aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid, |
1709 | add_list, num_add, NULL); | |
41c445ff JB |
1710 | num_add = 0; |
1711 | } | |
1712 | kfree(add_list); | |
1713 | add_list = NULL; | |
1714 | ||
dcae29be | 1715 | if (add_happened && (!aq_ret)) { |
41c445ff | 1716 | /* do nothing */; |
dcae29be | 1717 | } else if (add_happened && (aq_ret)) { |
41c445ff JB |
1718 | dev_info(&pf->pdev->dev, |
1719 | "add filter failed, err %d, aq_err %d\n", | |
dcae29be | 1720 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1721 | if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && |
1722 | !test_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1723 | &vsi->state)) { | |
1724 | promisc_forced_on = true; | |
1725 | set_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1726 | &vsi->state); | |
1727 | dev_info(&pf->pdev->dev, "promiscuous mode forced on\n"); | |
1728 | } | |
1729 | } | |
1730 | } | |
1731 | ||
1732 | /* check for changes in promiscuous modes */ | |
1733 | if (changed_flags & IFF_ALLMULTI) { | |
1734 | bool cur_multipromisc; | |
1735 | cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI); | |
dcae29be JB |
1736 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw, |
1737 | vsi->seid, | |
1738 | cur_multipromisc, | |
1739 | NULL); | |
1740 | if (aq_ret) | |
41c445ff JB |
1741 | dev_info(&pf->pdev->dev, |
1742 | "set multi promisc failed, err %d, aq_err %d\n", | |
dcae29be | 1743 | aq_ret, pf->hw.aq.asq_last_status); |
41c445ff JB |
1744 | } |
1745 | if ((changed_flags & IFF_PROMISC) || promisc_forced_on) { | |
1746 | bool cur_promisc; | |
1747 | cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) || | |
1748 | test_bit(__I40E_FILTER_OVERFLOW_PROMISC, | |
1749 | &vsi->state)); | |
dcae29be JB |
1750 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw, |
1751 | vsi->seid, | |
1752 | cur_promisc, NULL); | |
1753 | if (aq_ret) | |
41c445ff JB |
1754 | dev_info(&pf->pdev->dev, |
1755 | "set uni promisc failed, err %d, aq_err %d\n", | |
dcae29be | 1756 | aq_ret, pf->hw.aq.asq_last_status); |
1a10370a GR |
1757 | aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw, |
1758 | vsi->seid, | |
1759 | cur_promisc, NULL); | |
1760 | if (aq_ret) | |
1761 | dev_info(&pf->pdev->dev, | |
1762 | "set brdcast promisc failed, err %d, aq_err %d\n", | |
1763 | aq_ret, pf->hw.aq.asq_last_status); | |
41c445ff JB |
1764 | } |
1765 | ||
1766 | clear_bit(__I40E_CONFIG_BUSY, &vsi->state); | |
1767 | return 0; | |
1768 | } | |
1769 | ||
1770 | /** | |
1771 | * i40e_sync_filters_subtask - Sync the VSI filter list with HW | |
1772 | * @pf: board private structure | |
1773 | **/ | |
1774 | static void i40e_sync_filters_subtask(struct i40e_pf *pf) | |
1775 | { | |
1776 | int v; | |
1777 | ||
1778 | if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC)) | |
1779 | return; | |
1780 | pf->flags &= ~I40E_FLAG_FILTER_SYNC; | |
1781 | ||
505682cd | 1782 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
1783 | if (pf->vsi[v] && |
1784 | (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) | |
1785 | i40e_sync_vsi_filters(pf->vsi[v]); | |
1786 | } | |
1787 | } | |
1788 | ||
1789 | /** | |
1790 | * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit | |
1791 | * @netdev: network interface device structure | |
1792 | * @new_mtu: new value for maximum frame size | |
1793 | * | |
1794 | * Returns 0 on success, negative on failure | |
1795 | **/ | |
1796 | static int i40e_change_mtu(struct net_device *netdev, int new_mtu) | |
1797 | { | |
1798 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
61a46a4c | 1799 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; |
41c445ff JB |
1800 | struct i40e_vsi *vsi = np->vsi; |
1801 | ||
1802 | /* MTU < 68 is an error and causes problems on some kernels */ | |
1803 | if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER)) | |
1804 | return -EINVAL; | |
1805 | ||
1806 | netdev_info(netdev, "changing MTU from %d to %d\n", | |
1807 | netdev->mtu, new_mtu); | |
1808 | netdev->mtu = new_mtu; | |
1809 | if (netif_running(netdev)) | |
1810 | i40e_vsi_reinit_locked(vsi); | |
1811 | ||
1812 | return 0; | |
1813 | } | |
1814 | ||
beb0dff1 JK |
1815 | /** |
1816 | * i40e_ioctl - Access the hwtstamp interface | |
1817 | * @netdev: network interface device structure | |
1818 | * @ifr: interface request data | |
1819 | * @cmd: ioctl command | |
1820 | **/ | |
1821 | int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
1822 | { | |
1823 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1824 | struct i40e_pf *pf = np->vsi->back; | |
1825 | ||
1826 | switch (cmd) { | |
1827 | case SIOCGHWTSTAMP: | |
1828 | return i40e_ptp_get_ts_config(pf, ifr); | |
1829 | case SIOCSHWTSTAMP: | |
1830 | return i40e_ptp_set_ts_config(pf, ifr); | |
1831 | default: | |
1832 | return -EOPNOTSUPP; | |
1833 | } | |
1834 | } | |
1835 | ||
41c445ff JB |
1836 | /** |
1837 | * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI | |
1838 | * @vsi: the vsi being adjusted | |
1839 | **/ | |
1840 | void i40e_vlan_stripping_enable(struct i40e_vsi *vsi) | |
1841 | { | |
1842 | struct i40e_vsi_context ctxt; | |
1843 | i40e_status ret; | |
1844 | ||
1845 | if ((vsi->info.valid_sections & | |
1846 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
1847 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0)) | |
1848 | return; /* already enabled */ | |
1849 | ||
1850 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1851 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
1852 | I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH; | |
1853 | ||
1854 | ctxt.seid = vsi->seid; | |
1855 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
1856 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
1857 | if (ret) { | |
1858 | dev_info(&vsi->back->pdev->dev, | |
1859 | "%s: update vsi failed, aq_err=%d\n", | |
1860 | __func__, vsi->back->hw.aq.asq_last_status); | |
1861 | } | |
1862 | } | |
1863 | ||
1864 | /** | |
1865 | * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI | |
1866 | * @vsi: the vsi being adjusted | |
1867 | **/ | |
1868 | void i40e_vlan_stripping_disable(struct i40e_vsi *vsi) | |
1869 | { | |
1870 | struct i40e_vsi_context ctxt; | |
1871 | i40e_status ret; | |
1872 | ||
1873 | if ((vsi->info.valid_sections & | |
1874 | cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) && | |
1875 | ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) == | |
1876 | I40E_AQ_VSI_PVLAN_EMOD_MASK)) | |
1877 | return; /* already disabled */ | |
1878 | ||
1879 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
1880 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL | | |
1881 | I40E_AQ_VSI_PVLAN_EMOD_NOTHING; | |
1882 | ||
1883 | ctxt.seid = vsi->seid; | |
1884 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
1885 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
1886 | if (ret) { | |
1887 | dev_info(&vsi->back->pdev->dev, | |
1888 | "%s: update vsi failed, aq_err=%d\n", | |
1889 | __func__, vsi->back->hw.aq.asq_last_status); | |
1890 | } | |
1891 | } | |
1892 | ||
1893 | /** | |
1894 | * i40e_vlan_rx_register - Setup or shutdown vlan offload | |
1895 | * @netdev: network interface to be adjusted | |
1896 | * @features: netdev features to test if VLAN offload is enabled or not | |
1897 | **/ | |
1898 | static void i40e_vlan_rx_register(struct net_device *netdev, u32 features) | |
1899 | { | |
1900 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1901 | struct i40e_vsi *vsi = np->vsi; | |
1902 | ||
1903 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
1904 | i40e_vlan_stripping_enable(vsi); | |
1905 | else | |
1906 | i40e_vlan_stripping_disable(vsi); | |
1907 | } | |
1908 | ||
1909 | /** | |
1910 | * i40e_vsi_add_vlan - Add vsi membership for given vlan | |
1911 | * @vsi: the vsi being configured | |
1912 | * @vid: vlan id to be added (0 = untagged only , -1 = any) | |
1913 | **/ | |
1914 | int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid) | |
1915 | { | |
1916 | struct i40e_mac_filter *f, *add_f; | |
1917 | bool is_netdev, is_vf; | |
41c445ff JB |
1918 | |
1919 | is_vf = (vsi->type == I40E_VSI_SRIOV); | |
1920 | is_netdev = !!(vsi->netdev); | |
1921 | ||
1922 | if (is_netdev) { | |
1923 | add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid, | |
1924 | is_vf, is_netdev); | |
1925 | if (!add_f) { | |
1926 | dev_info(&vsi->back->pdev->dev, | |
1927 | "Could not add vlan filter %d for %pM\n", | |
1928 | vid, vsi->netdev->dev_addr); | |
1929 | return -ENOMEM; | |
1930 | } | |
1931 | } | |
1932 | ||
1933 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
1934 | add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev); | |
1935 | if (!add_f) { | |
1936 | dev_info(&vsi->back->pdev->dev, | |
1937 | "Could not add vlan filter %d for %pM\n", | |
1938 | vid, f->macaddr); | |
1939 | return -ENOMEM; | |
1940 | } | |
1941 | } | |
1942 | ||
41c445ff JB |
1943 | /* Now if we add a vlan tag, make sure to check if it is the first |
1944 | * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag" | |
1945 | * with 0, so we now accept untagged and specified tagged traffic | |
1946 | * (and not any taged and untagged) | |
1947 | */ | |
1948 | if (vid > 0) { | |
1949 | if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr, | |
1950 | I40E_VLAN_ANY, | |
1951 | is_vf, is_netdev)) { | |
1952 | i40e_del_filter(vsi, vsi->netdev->dev_addr, | |
1953 | I40E_VLAN_ANY, is_vf, is_netdev); | |
1954 | add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0, | |
1955 | is_vf, is_netdev); | |
1956 | if (!add_f) { | |
1957 | dev_info(&vsi->back->pdev->dev, | |
1958 | "Could not add filter 0 for %pM\n", | |
1959 | vsi->netdev->dev_addr); | |
1960 | return -ENOMEM; | |
1961 | } | |
1962 | } | |
8d82a7c5 | 1963 | } |
41c445ff | 1964 | |
8d82a7c5 GR |
1965 | /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */ |
1966 | if (vid > 0 && !vsi->info.pvid) { | |
41c445ff JB |
1967 | list_for_each_entry(f, &vsi->mac_filter_list, list) { |
1968 | if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1969 | is_vf, is_netdev)) { | |
1970 | i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
1971 | is_vf, is_netdev); | |
1972 | add_f = i40e_add_filter(vsi, f->macaddr, | |
1973 | 0, is_vf, is_netdev); | |
1974 | if (!add_f) { | |
1975 | dev_info(&vsi->back->pdev->dev, | |
1976 | "Could not add filter 0 for %pM\n", | |
1977 | f->macaddr); | |
1978 | return -ENOMEM; | |
1979 | } | |
1980 | } | |
1981 | } | |
41c445ff JB |
1982 | } |
1983 | ||
80f6428f ASJ |
1984 | if (test_bit(__I40E_DOWN, &vsi->back->state) || |
1985 | test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) | |
1986 | return 0; | |
1987 | ||
1988 | return i40e_sync_vsi_filters(vsi); | |
41c445ff JB |
1989 | } |
1990 | ||
1991 | /** | |
1992 | * i40e_vsi_kill_vlan - Remove vsi membership for given vlan | |
1993 | * @vsi: the vsi being configured | |
1994 | * @vid: vlan id to be removed (0 = untagged only , -1 = any) | |
078b5876 JB |
1995 | * |
1996 | * Return: 0 on success or negative otherwise | |
41c445ff JB |
1997 | **/ |
1998 | int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid) | |
1999 | { | |
2000 | struct net_device *netdev = vsi->netdev; | |
2001 | struct i40e_mac_filter *f, *add_f; | |
2002 | bool is_vf, is_netdev; | |
2003 | int filter_count = 0; | |
41c445ff JB |
2004 | |
2005 | is_vf = (vsi->type == I40E_VSI_SRIOV); | |
2006 | is_netdev = !!(netdev); | |
2007 | ||
2008 | if (is_netdev) | |
2009 | i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev); | |
2010 | ||
2011 | list_for_each_entry(f, &vsi->mac_filter_list, list) | |
2012 | i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev); | |
2013 | ||
41c445ff JB |
2014 | /* go through all the filters for this VSI and if there is only |
2015 | * vid == 0 it means there are no other filters, so vid 0 must | |
2016 | * be replaced with -1. This signifies that we should from now | |
2017 | * on accept any traffic (with any tag present, or untagged) | |
2018 | */ | |
2019 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
2020 | if (is_netdev) { | |
2021 | if (f->vlan && | |
2022 | ether_addr_equal(netdev->dev_addr, f->macaddr)) | |
2023 | filter_count++; | |
2024 | } | |
2025 | ||
2026 | if (f->vlan) | |
2027 | filter_count++; | |
2028 | } | |
2029 | ||
2030 | if (!filter_count && is_netdev) { | |
2031 | i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev); | |
2032 | f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, | |
2033 | is_vf, is_netdev); | |
2034 | if (!f) { | |
2035 | dev_info(&vsi->back->pdev->dev, | |
2036 | "Could not add filter %d for %pM\n", | |
2037 | I40E_VLAN_ANY, netdev->dev_addr); | |
2038 | return -ENOMEM; | |
2039 | } | |
2040 | } | |
2041 | ||
2042 | if (!filter_count) { | |
2043 | list_for_each_entry(f, &vsi->mac_filter_list, list) { | |
2044 | i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev); | |
2045 | add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY, | |
2046 | is_vf, is_netdev); | |
2047 | if (!add_f) { | |
2048 | dev_info(&vsi->back->pdev->dev, | |
2049 | "Could not add filter %d for %pM\n", | |
2050 | I40E_VLAN_ANY, f->macaddr); | |
2051 | return -ENOMEM; | |
2052 | } | |
2053 | } | |
2054 | } | |
2055 | ||
80f6428f ASJ |
2056 | if (test_bit(__I40E_DOWN, &vsi->back->state) || |
2057 | test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state)) | |
2058 | return 0; | |
2059 | ||
41c445ff JB |
2060 | return i40e_sync_vsi_filters(vsi); |
2061 | } | |
2062 | ||
2063 | /** | |
2064 | * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload | |
2065 | * @netdev: network interface to be adjusted | |
2066 | * @vid: vlan id to be added | |
078b5876 JB |
2067 | * |
2068 | * net_device_ops implementation for adding vlan ids | |
41c445ff JB |
2069 | **/ |
2070 | static int i40e_vlan_rx_add_vid(struct net_device *netdev, | |
2071 | __always_unused __be16 proto, u16 vid) | |
2072 | { | |
2073 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2074 | struct i40e_vsi *vsi = np->vsi; | |
078b5876 | 2075 | int ret = 0; |
41c445ff JB |
2076 | |
2077 | if (vid > 4095) | |
078b5876 JB |
2078 | return -EINVAL; |
2079 | ||
2080 | netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid); | |
41c445ff | 2081 | |
6982d429 ASJ |
2082 | /* If the network stack called us with vid = 0 then |
2083 | * it is asking to receive priority tagged packets with | |
2084 | * vlan id 0. Our HW receives them by default when configured | |
2085 | * to receive untagged packets so there is no need to add an | |
2086 | * extra filter for vlan 0 tagged packets. | |
41c445ff | 2087 | */ |
6982d429 ASJ |
2088 | if (vid) |
2089 | ret = i40e_vsi_add_vlan(vsi, vid); | |
41c445ff | 2090 | |
078b5876 JB |
2091 | if (!ret && (vid < VLAN_N_VID)) |
2092 | set_bit(vid, vsi->active_vlans); | |
41c445ff | 2093 | |
078b5876 | 2094 | return ret; |
41c445ff JB |
2095 | } |
2096 | ||
2097 | /** | |
2098 | * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload | |
2099 | * @netdev: network interface to be adjusted | |
2100 | * @vid: vlan id to be removed | |
078b5876 | 2101 | * |
fdfd943e | 2102 | * net_device_ops implementation for removing vlan ids |
41c445ff JB |
2103 | **/ |
2104 | static int i40e_vlan_rx_kill_vid(struct net_device *netdev, | |
2105 | __always_unused __be16 proto, u16 vid) | |
2106 | { | |
2107 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2108 | struct i40e_vsi *vsi = np->vsi; | |
2109 | ||
078b5876 JB |
2110 | netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid); |
2111 | ||
41c445ff JB |
2112 | /* return code is ignored as there is nothing a user |
2113 | * can do about failure to remove and a log message was | |
078b5876 | 2114 | * already printed from the other function |
41c445ff JB |
2115 | */ |
2116 | i40e_vsi_kill_vlan(vsi, vid); | |
2117 | ||
2118 | clear_bit(vid, vsi->active_vlans); | |
078b5876 | 2119 | |
41c445ff JB |
2120 | return 0; |
2121 | } | |
2122 | ||
2123 | /** | |
2124 | * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up | |
2125 | * @vsi: the vsi being brought back up | |
2126 | **/ | |
2127 | static void i40e_restore_vlan(struct i40e_vsi *vsi) | |
2128 | { | |
2129 | u16 vid; | |
2130 | ||
2131 | if (!vsi->netdev) | |
2132 | return; | |
2133 | ||
2134 | i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features); | |
2135 | ||
2136 | for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID) | |
2137 | i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q), | |
2138 | vid); | |
2139 | } | |
2140 | ||
2141 | /** | |
2142 | * i40e_vsi_add_pvid - Add pvid for the VSI | |
2143 | * @vsi: the vsi being adjusted | |
2144 | * @vid: the vlan id to set as a PVID | |
2145 | **/ | |
dcae29be | 2146 | int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid) |
41c445ff JB |
2147 | { |
2148 | struct i40e_vsi_context ctxt; | |
dcae29be | 2149 | i40e_status aq_ret; |
41c445ff JB |
2150 | |
2151 | vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
2152 | vsi->info.pvid = cpu_to_le16(vid); | |
6c12fcbf GR |
2153 | vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED | |
2154 | I40E_AQ_VSI_PVLAN_INSERT_PVID | | |
b774c7dd | 2155 | I40E_AQ_VSI_PVLAN_EMOD_STR; |
41c445ff JB |
2156 | |
2157 | ctxt.seid = vsi->seid; | |
2158 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
dcae29be JB |
2159 | aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); |
2160 | if (aq_ret) { | |
41c445ff JB |
2161 | dev_info(&vsi->back->pdev->dev, |
2162 | "%s: update vsi failed, aq_err=%d\n", | |
2163 | __func__, vsi->back->hw.aq.asq_last_status); | |
dcae29be | 2164 | return -ENOENT; |
41c445ff JB |
2165 | } |
2166 | ||
dcae29be | 2167 | return 0; |
41c445ff JB |
2168 | } |
2169 | ||
2170 | /** | |
2171 | * i40e_vsi_remove_pvid - Remove the pvid from the VSI | |
2172 | * @vsi: the vsi being adjusted | |
2173 | * | |
2174 | * Just use the vlan_rx_register() service to put it back to normal | |
2175 | **/ | |
2176 | void i40e_vsi_remove_pvid(struct i40e_vsi *vsi) | |
2177 | { | |
6c12fcbf GR |
2178 | i40e_vlan_stripping_disable(vsi); |
2179 | ||
41c445ff | 2180 | vsi->info.pvid = 0; |
41c445ff JB |
2181 | } |
2182 | ||
2183 | /** | |
2184 | * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources | |
2185 | * @vsi: ptr to the VSI | |
2186 | * | |
2187 | * If this function returns with an error, then it's possible one or | |
2188 | * more of the rings is populated (while the rest are not). It is the | |
2189 | * callers duty to clean those orphaned rings. | |
2190 | * | |
2191 | * Return 0 on success, negative on failure | |
2192 | **/ | |
2193 | static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi) | |
2194 | { | |
2195 | int i, err = 0; | |
2196 | ||
2197 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2198 | err = i40e_setup_tx_descriptors(vsi->tx_rings[i]); |
41c445ff JB |
2199 | |
2200 | return err; | |
2201 | } | |
2202 | ||
2203 | /** | |
2204 | * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues | |
2205 | * @vsi: ptr to the VSI | |
2206 | * | |
2207 | * Free VSI's transmit software resources | |
2208 | **/ | |
2209 | static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi) | |
2210 | { | |
2211 | int i; | |
2212 | ||
8e9dca53 GR |
2213 | if (!vsi->tx_rings) |
2214 | return; | |
2215 | ||
41c445ff | 2216 | for (i = 0; i < vsi->num_queue_pairs; i++) |
8e9dca53 | 2217 | if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) |
9f65e15b | 2218 | i40e_free_tx_resources(vsi->tx_rings[i]); |
41c445ff JB |
2219 | } |
2220 | ||
2221 | /** | |
2222 | * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources | |
2223 | * @vsi: ptr to the VSI | |
2224 | * | |
2225 | * If this function returns with an error, then it's possible one or | |
2226 | * more of the rings is populated (while the rest are not). It is the | |
2227 | * callers duty to clean those orphaned rings. | |
2228 | * | |
2229 | * Return 0 on success, negative on failure | |
2230 | **/ | |
2231 | static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi) | |
2232 | { | |
2233 | int i, err = 0; | |
2234 | ||
2235 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2236 | err = i40e_setup_rx_descriptors(vsi->rx_rings[i]); |
41c445ff JB |
2237 | return err; |
2238 | } | |
2239 | ||
2240 | /** | |
2241 | * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues | |
2242 | * @vsi: ptr to the VSI | |
2243 | * | |
2244 | * Free all receive software resources | |
2245 | **/ | |
2246 | static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi) | |
2247 | { | |
2248 | int i; | |
2249 | ||
8e9dca53 GR |
2250 | if (!vsi->rx_rings) |
2251 | return; | |
2252 | ||
41c445ff | 2253 | for (i = 0; i < vsi->num_queue_pairs; i++) |
8e9dca53 | 2254 | if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc) |
9f65e15b | 2255 | i40e_free_rx_resources(vsi->rx_rings[i]); |
41c445ff JB |
2256 | } |
2257 | ||
2258 | /** | |
2259 | * i40e_configure_tx_ring - Configure a transmit ring context and rest | |
2260 | * @ring: The Tx ring to configure | |
2261 | * | |
2262 | * Configure the Tx descriptor ring in the HMC context. | |
2263 | **/ | |
2264 | static int i40e_configure_tx_ring(struct i40e_ring *ring) | |
2265 | { | |
2266 | struct i40e_vsi *vsi = ring->vsi; | |
2267 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2268 | struct i40e_hw *hw = &vsi->back->hw; | |
2269 | struct i40e_hmc_obj_txq tx_ctx; | |
2270 | i40e_status err = 0; | |
2271 | u32 qtx_ctl = 0; | |
2272 | ||
2273 | /* some ATR related tx ring init */ | |
60ea5f83 | 2274 | if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) { |
41c445ff JB |
2275 | ring->atr_sample_rate = vsi->back->atr_sample_rate; |
2276 | ring->atr_count = 0; | |
2277 | } else { | |
2278 | ring->atr_sample_rate = 0; | |
2279 | } | |
2280 | ||
2281 | /* initialize XPS */ | |
2282 | if (ring->q_vector && ring->netdev && | |
4e3b35b0 | 2283 | vsi->tc_config.numtc <= 1 && |
41c445ff JB |
2284 | !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) |
2285 | netif_set_xps_queue(ring->netdev, | |
2286 | &ring->q_vector->affinity_mask, | |
2287 | ring->queue_index); | |
2288 | ||
2289 | /* clear the context structure first */ | |
2290 | memset(&tx_ctx, 0, sizeof(tx_ctx)); | |
2291 | ||
2292 | tx_ctx.new_context = 1; | |
2293 | tx_ctx.base = (ring->dma / 128); | |
2294 | tx_ctx.qlen = ring->count; | |
60ea5f83 JB |
2295 | tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED | |
2296 | I40E_FLAG_FD_ATR_ENABLED)); | |
beb0dff1 | 2297 | tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP); |
1943d8ba JB |
2298 | /* FDIR VSI tx ring can still use RS bit and writebacks */ |
2299 | if (vsi->type != I40E_VSI_FDIR) | |
2300 | tx_ctx.head_wb_ena = 1; | |
2301 | tx_ctx.head_wb_addr = ring->dma + | |
2302 | (ring->count * sizeof(struct i40e_tx_desc)); | |
41c445ff JB |
2303 | |
2304 | /* As part of VSI creation/update, FW allocates certain | |
2305 | * Tx arbitration queue sets for each TC enabled for | |
2306 | * the VSI. The FW returns the handles to these queue | |
2307 | * sets as part of the response buffer to Add VSI, | |
2308 | * Update VSI, etc. AQ commands. It is expected that | |
2309 | * these queue set handles be associated with the Tx | |
2310 | * queues by the driver as part of the TX queue context | |
2311 | * initialization. This has to be done regardless of | |
2312 | * DCB as by default everything is mapped to TC0. | |
2313 | */ | |
2314 | tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]); | |
2315 | tx_ctx.rdylist_act = 0; | |
2316 | ||
2317 | /* clear the context in the HMC */ | |
2318 | err = i40e_clear_lan_tx_queue_context(hw, pf_q); | |
2319 | if (err) { | |
2320 | dev_info(&vsi->back->pdev->dev, | |
2321 | "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n", | |
2322 | ring->queue_index, pf_q, err); | |
2323 | return -ENOMEM; | |
2324 | } | |
2325 | ||
2326 | /* set the context in the HMC */ | |
2327 | err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx); | |
2328 | if (err) { | |
2329 | dev_info(&vsi->back->pdev->dev, | |
2330 | "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n", | |
2331 | ring->queue_index, pf_q, err); | |
2332 | return -ENOMEM; | |
2333 | } | |
2334 | ||
2335 | /* Now associate this queue with this PCI function */ | |
9d8bf547 SN |
2336 | if (vsi->type == I40E_VSI_VMDQ2) |
2337 | qtx_ctl = I40E_QTX_CTL_VM_QUEUE; | |
2338 | else | |
2339 | qtx_ctl = I40E_QTX_CTL_PF_QUEUE; | |
13fd9774 SN |
2340 | qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) & |
2341 | I40E_QTX_CTL_PF_INDX_MASK); | |
41c445ff JB |
2342 | wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl); |
2343 | i40e_flush(hw); | |
2344 | ||
2345 | clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state); | |
2346 | ||
2347 | /* cache tail off for easier writes later */ | |
2348 | ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q); | |
2349 | ||
2350 | return 0; | |
2351 | } | |
2352 | ||
2353 | /** | |
2354 | * i40e_configure_rx_ring - Configure a receive ring context | |
2355 | * @ring: The Rx ring to configure | |
2356 | * | |
2357 | * Configure the Rx descriptor ring in the HMC context. | |
2358 | **/ | |
2359 | static int i40e_configure_rx_ring(struct i40e_ring *ring) | |
2360 | { | |
2361 | struct i40e_vsi *vsi = ring->vsi; | |
2362 | u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len; | |
2363 | u16 pf_q = vsi->base_queue + ring->queue_index; | |
2364 | struct i40e_hw *hw = &vsi->back->hw; | |
2365 | struct i40e_hmc_obj_rxq rx_ctx; | |
2366 | i40e_status err = 0; | |
2367 | ||
2368 | ring->state = 0; | |
2369 | ||
2370 | /* clear the context structure first */ | |
2371 | memset(&rx_ctx, 0, sizeof(rx_ctx)); | |
2372 | ||
2373 | ring->rx_buf_len = vsi->rx_buf_len; | |
2374 | ring->rx_hdr_len = vsi->rx_hdr_len; | |
2375 | ||
2376 | rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT; | |
2377 | rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT; | |
2378 | ||
2379 | rx_ctx.base = (ring->dma / 128); | |
2380 | rx_ctx.qlen = ring->count; | |
2381 | ||
2382 | if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) { | |
2383 | set_ring_16byte_desc_enabled(ring); | |
2384 | rx_ctx.dsize = 0; | |
2385 | } else { | |
2386 | rx_ctx.dsize = 1; | |
2387 | } | |
2388 | ||
2389 | rx_ctx.dtype = vsi->dtype; | |
2390 | if (vsi->dtype) { | |
2391 | set_ring_ps_enabled(ring); | |
2392 | rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | | |
2393 | I40E_RX_SPLIT_IP | | |
2394 | I40E_RX_SPLIT_TCP_UDP | | |
2395 | I40E_RX_SPLIT_SCTP; | |
2396 | } else { | |
2397 | rx_ctx.hsplit_0 = 0; | |
2398 | } | |
2399 | ||
2400 | rx_ctx.rxmax = min_t(u16, vsi->max_frame, | |
2401 | (chain_len * ring->rx_buf_len)); | |
2402 | rx_ctx.tphrdesc_ena = 1; | |
2403 | rx_ctx.tphwdesc_ena = 1; | |
2404 | rx_ctx.tphdata_ena = 1; | |
2405 | rx_ctx.tphhead_ena = 1; | |
7134f9ce JB |
2406 | if (hw->revision_id == 0) |
2407 | rx_ctx.lrxqthresh = 0; | |
2408 | else | |
2409 | rx_ctx.lrxqthresh = 2; | |
41c445ff JB |
2410 | rx_ctx.crcstrip = 1; |
2411 | rx_ctx.l2tsel = 1; | |
2412 | rx_ctx.showiv = 1; | |
acb3676b CS |
2413 | /* set the prefena field to 1 because the manual says to */ |
2414 | rx_ctx.prefena = 1; | |
41c445ff JB |
2415 | |
2416 | /* clear the context in the HMC */ | |
2417 | err = i40e_clear_lan_rx_queue_context(hw, pf_q); | |
2418 | if (err) { | |
2419 | dev_info(&vsi->back->pdev->dev, | |
2420 | "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
2421 | ring->queue_index, pf_q, err); | |
2422 | return -ENOMEM; | |
2423 | } | |
2424 | ||
2425 | /* set the context in the HMC */ | |
2426 | err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx); | |
2427 | if (err) { | |
2428 | dev_info(&vsi->back->pdev->dev, | |
2429 | "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n", | |
2430 | ring->queue_index, pf_q, err); | |
2431 | return -ENOMEM; | |
2432 | } | |
2433 | ||
2434 | /* cache tail for quicker writes, and clear the reg before use */ | |
2435 | ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q); | |
2436 | writel(0, ring->tail); | |
2437 | ||
2438 | i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring)); | |
2439 | ||
2440 | return 0; | |
2441 | } | |
2442 | ||
2443 | /** | |
2444 | * i40e_vsi_configure_tx - Configure the VSI for Tx | |
2445 | * @vsi: VSI structure describing this set of rings and resources | |
2446 | * | |
2447 | * Configure the Tx VSI for operation. | |
2448 | **/ | |
2449 | static int i40e_vsi_configure_tx(struct i40e_vsi *vsi) | |
2450 | { | |
2451 | int err = 0; | |
2452 | u16 i; | |
2453 | ||
9f65e15b AD |
2454 | for (i = 0; (i < vsi->num_queue_pairs) && !err; i++) |
2455 | err = i40e_configure_tx_ring(vsi->tx_rings[i]); | |
41c445ff JB |
2456 | |
2457 | return err; | |
2458 | } | |
2459 | ||
2460 | /** | |
2461 | * i40e_vsi_configure_rx - Configure the VSI for Rx | |
2462 | * @vsi: the VSI being configured | |
2463 | * | |
2464 | * Configure the Rx VSI for operation. | |
2465 | **/ | |
2466 | static int i40e_vsi_configure_rx(struct i40e_vsi *vsi) | |
2467 | { | |
2468 | int err = 0; | |
2469 | u16 i; | |
2470 | ||
2471 | if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN)) | |
2472 | vsi->max_frame = vsi->netdev->mtu + ETH_HLEN | |
2473 | + ETH_FCS_LEN + VLAN_HLEN; | |
2474 | else | |
2475 | vsi->max_frame = I40E_RXBUFFER_2048; | |
2476 | ||
2477 | /* figure out correct receive buffer length */ | |
2478 | switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED | | |
2479 | I40E_FLAG_RX_PS_ENABLED)) { | |
2480 | case I40E_FLAG_RX_1BUF_ENABLED: | |
2481 | vsi->rx_hdr_len = 0; | |
2482 | vsi->rx_buf_len = vsi->max_frame; | |
2483 | vsi->dtype = I40E_RX_DTYPE_NO_SPLIT; | |
2484 | break; | |
2485 | case I40E_FLAG_RX_PS_ENABLED: | |
2486 | vsi->rx_hdr_len = I40E_RX_HDR_SIZE; | |
2487 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
2488 | vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT; | |
2489 | break; | |
2490 | default: | |
2491 | vsi->rx_hdr_len = I40E_RX_HDR_SIZE; | |
2492 | vsi->rx_buf_len = I40E_RXBUFFER_2048; | |
2493 | vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS; | |
2494 | break; | |
2495 | } | |
2496 | ||
2497 | /* round up for the chip's needs */ | |
2498 | vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len, | |
2499 | (1 << I40E_RXQ_CTX_HBUFF_SHIFT)); | |
2500 | vsi->rx_buf_len = ALIGN(vsi->rx_buf_len, | |
2501 | (1 << I40E_RXQ_CTX_DBUFF_SHIFT)); | |
2502 | ||
2503 | /* set up individual rings */ | |
2504 | for (i = 0; i < vsi->num_queue_pairs && !err; i++) | |
9f65e15b | 2505 | err = i40e_configure_rx_ring(vsi->rx_rings[i]); |
41c445ff JB |
2506 | |
2507 | return err; | |
2508 | } | |
2509 | ||
2510 | /** | |
2511 | * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC | |
2512 | * @vsi: ptr to the VSI | |
2513 | **/ | |
2514 | static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi) | |
2515 | { | |
e7046ee1 | 2516 | struct i40e_ring *tx_ring, *rx_ring; |
41c445ff JB |
2517 | u16 qoffset, qcount; |
2518 | int i, n; | |
2519 | ||
2520 | if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) | |
2521 | return; | |
2522 | ||
2523 | for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { | |
2524 | if (!(vsi->tc_config.enabled_tc & (1 << n))) | |
2525 | continue; | |
2526 | ||
2527 | qoffset = vsi->tc_config.tc_info[n].qoffset; | |
2528 | qcount = vsi->tc_config.tc_info[n].qcount; | |
2529 | for (i = qoffset; i < (qoffset + qcount); i++) { | |
e7046ee1 AA |
2530 | rx_ring = vsi->rx_rings[i]; |
2531 | tx_ring = vsi->tx_rings[i]; | |
41c445ff JB |
2532 | rx_ring->dcb_tc = n; |
2533 | tx_ring->dcb_tc = n; | |
2534 | } | |
2535 | } | |
2536 | } | |
2537 | ||
2538 | /** | |
2539 | * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI | |
2540 | * @vsi: ptr to the VSI | |
2541 | **/ | |
2542 | static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi) | |
2543 | { | |
2544 | if (vsi->netdev) | |
2545 | i40e_set_rx_mode(vsi->netdev); | |
2546 | } | |
2547 | ||
17a73f6b JG |
2548 | /** |
2549 | * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters | |
2550 | * @vsi: Pointer to the targeted VSI | |
2551 | * | |
2552 | * This function replays the hlist on the hw where all the SB Flow Director | |
2553 | * filters were saved. | |
2554 | **/ | |
2555 | static void i40e_fdir_filter_restore(struct i40e_vsi *vsi) | |
2556 | { | |
2557 | struct i40e_fdir_filter *filter; | |
2558 | struct i40e_pf *pf = vsi->back; | |
2559 | struct hlist_node *node; | |
2560 | ||
55a5e60b ASJ |
2561 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) |
2562 | return; | |
2563 | ||
17a73f6b JG |
2564 | hlist_for_each_entry_safe(filter, node, |
2565 | &pf->fdir_filter_list, fdir_node) { | |
2566 | i40e_add_del_fdir(vsi, filter, true); | |
2567 | } | |
2568 | } | |
2569 | ||
41c445ff JB |
2570 | /** |
2571 | * i40e_vsi_configure - Set up the VSI for action | |
2572 | * @vsi: the VSI being configured | |
2573 | **/ | |
2574 | static int i40e_vsi_configure(struct i40e_vsi *vsi) | |
2575 | { | |
2576 | int err; | |
2577 | ||
2578 | i40e_set_vsi_rx_mode(vsi); | |
2579 | i40e_restore_vlan(vsi); | |
2580 | i40e_vsi_config_dcb_rings(vsi); | |
2581 | err = i40e_vsi_configure_tx(vsi); | |
2582 | if (!err) | |
2583 | err = i40e_vsi_configure_rx(vsi); | |
2584 | ||
2585 | return err; | |
2586 | } | |
2587 | ||
2588 | /** | |
2589 | * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW | |
2590 | * @vsi: the VSI being configured | |
2591 | **/ | |
2592 | static void i40e_vsi_configure_msix(struct i40e_vsi *vsi) | |
2593 | { | |
2594 | struct i40e_pf *pf = vsi->back; | |
2595 | struct i40e_q_vector *q_vector; | |
2596 | struct i40e_hw *hw = &pf->hw; | |
2597 | u16 vector; | |
2598 | int i, q; | |
2599 | u32 val; | |
2600 | u32 qp; | |
2601 | ||
2602 | /* The interrupt indexing is offset by 1 in the PFINT_ITRn | |
2603 | * and PFINT_LNKLSTn registers, e.g.: | |
2604 | * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts) | |
2605 | */ | |
2606 | qp = vsi->base_queue; | |
2607 | vector = vsi->base_vector; | |
493fb300 AD |
2608 | for (i = 0; i < vsi->num_q_vectors; i++, vector++) { |
2609 | q_vector = vsi->q_vectors[i]; | |
41c445ff JB |
2610 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); |
2611 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2612 | wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), | |
2613 | q_vector->rx.itr); | |
2614 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); | |
2615 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2616 | wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), | |
2617 | q_vector->tx.itr); | |
2618 | ||
2619 | /* Linked list for the queuepairs assigned to this vector */ | |
2620 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp); | |
2621 | for (q = 0; q < q_vector->num_ringpairs; q++) { | |
2622 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
2623 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
2624 | (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) | | |
2625 | (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)| | |
2626 | (I40E_QUEUE_TYPE_TX | |
2627 | << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT); | |
2628 | ||
2629 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
2630 | ||
2631 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
2632 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
2633 | (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) | | |
2634 | ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)| | |
2635 | (I40E_QUEUE_TYPE_RX | |
2636 | << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
2637 | ||
2638 | /* Terminate the linked list */ | |
2639 | if (q == (q_vector->num_ringpairs - 1)) | |
2640 | val |= (I40E_QUEUE_END_OF_LIST | |
2641 | << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
2642 | ||
2643 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
2644 | qp++; | |
2645 | } | |
2646 | } | |
2647 | ||
2648 | i40e_flush(hw); | |
2649 | } | |
2650 | ||
2651 | /** | |
2652 | * i40e_enable_misc_int_causes - enable the non-queue interrupts | |
2653 | * @hw: ptr to the hardware info | |
2654 | **/ | |
2655 | static void i40e_enable_misc_int_causes(struct i40e_hw *hw) | |
2656 | { | |
2657 | u32 val; | |
2658 | ||
2659 | /* clear things first */ | |
2660 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */ | |
2661 | rd32(hw, I40E_PFINT_ICR0); /* read to clear */ | |
2662 | ||
2663 | val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | | |
2664 | I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | | |
2665 | I40E_PFINT_ICR0_ENA_GRST_MASK | | |
2666 | I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | | |
2667 | I40E_PFINT_ICR0_ENA_GPIO_MASK | | |
beb0dff1 | 2668 | I40E_PFINT_ICR0_ENA_TIMESYNC_MASK | |
41c445ff JB |
2669 | I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | |
2670 | I40E_PFINT_ICR0_ENA_VFLR_MASK | | |
2671 | I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
2672 | ||
2673 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
2674 | ||
2675 | /* SW_ITR_IDX = 0, but don't change INTENA */ | |
84ed40e7 ASJ |
2676 | wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK | |
2677 | I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK); | |
41c445ff JB |
2678 | |
2679 | /* OTHER_ITR_IDX = 0 */ | |
2680 | wr32(hw, I40E_PFINT_STAT_CTL0, 0); | |
2681 | } | |
2682 | ||
2683 | /** | |
2684 | * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW | |
2685 | * @vsi: the VSI being configured | |
2686 | **/ | |
2687 | static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi) | |
2688 | { | |
493fb300 | 2689 | struct i40e_q_vector *q_vector = vsi->q_vectors[0]; |
41c445ff JB |
2690 | struct i40e_pf *pf = vsi->back; |
2691 | struct i40e_hw *hw = &pf->hw; | |
2692 | u32 val; | |
2693 | ||
2694 | /* set the ITR configuration */ | |
2695 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting); | |
2696 | q_vector->rx.latency_range = I40E_LOW_LATENCY; | |
2697 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr); | |
2698 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting); | |
2699 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
2700 | wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr); | |
2701 | ||
2702 | i40e_enable_misc_int_causes(hw); | |
2703 | ||
2704 | /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */ | |
2705 | wr32(hw, I40E_PFINT_LNKLST0, 0); | |
2706 | ||
f29eaa3d | 2707 | /* Associate the queue pair to the vector and enable the queue int */ |
41c445ff JB |
2708 | val = I40E_QINT_RQCTL_CAUSE_ENA_MASK | |
2709 | (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) | | |
2710 | (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT); | |
2711 | ||
2712 | wr32(hw, I40E_QINT_RQCTL(0), val); | |
2713 | ||
2714 | val = I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
2715 | (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) | | |
2716 | (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT); | |
2717 | ||
2718 | wr32(hw, I40E_QINT_TQCTL(0), val); | |
2719 | i40e_flush(hw); | |
2720 | } | |
2721 | ||
2ef28cfb MW |
2722 | /** |
2723 | * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0 | |
2724 | * @pf: board private structure | |
2725 | **/ | |
2726 | void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf) | |
2727 | { | |
2728 | struct i40e_hw *hw = &pf->hw; | |
2729 | ||
2730 | wr32(hw, I40E_PFINT_DYN_CTL0, | |
2731 | I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); | |
2732 | i40e_flush(hw); | |
2733 | } | |
2734 | ||
41c445ff JB |
2735 | /** |
2736 | * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0 | |
2737 | * @pf: board private structure | |
2738 | **/ | |
116a57d4 | 2739 | void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf) |
41c445ff JB |
2740 | { |
2741 | struct i40e_hw *hw = &pf->hw; | |
2742 | u32 val; | |
2743 | ||
2744 | val = I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
2745 | I40E_PFINT_DYN_CTL0_CLEARPBA_MASK | | |
2746 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT); | |
2747 | ||
2748 | wr32(hw, I40E_PFINT_DYN_CTL0, val); | |
2749 | i40e_flush(hw); | |
2750 | } | |
2751 | ||
2752 | /** | |
2753 | * i40e_irq_dynamic_enable - Enable default interrupt generation settings | |
2754 | * @vsi: pointer to a vsi | |
2755 | * @vector: enable a particular Hw Interrupt vector | |
2756 | **/ | |
2757 | void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector) | |
2758 | { | |
2759 | struct i40e_pf *pf = vsi->back; | |
2760 | struct i40e_hw *hw = &pf->hw; | |
2761 | u32 val; | |
2762 | ||
2763 | val = I40E_PFINT_DYN_CTLN_INTENA_MASK | | |
2764 | I40E_PFINT_DYN_CTLN_CLEARPBA_MASK | | |
2765 | (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT); | |
2766 | wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val); | |
1022cb6c | 2767 | /* skip the flush */ |
41c445ff JB |
2768 | } |
2769 | ||
2770 | /** | |
2771 | * i40e_msix_clean_rings - MSIX mode Interrupt Handler | |
2772 | * @irq: interrupt number | |
2773 | * @data: pointer to a q_vector | |
2774 | **/ | |
2775 | static irqreturn_t i40e_msix_clean_rings(int irq, void *data) | |
2776 | { | |
2777 | struct i40e_q_vector *q_vector = data; | |
2778 | ||
cd0b6fa6 | 2779 | if (!q_vector->tx.ring && !q_vector->rx.ring) |
41c445ff JB |
2780 | return IRQ_HANDLED; |
2781 | ||
2782 | napi_schedule(&q_vector->napi); | |
2783 | ||
2784 | return IRQ_HANDLED; | |
2785 | } | |
2786 | ||
41c445ff JB |
2787 | /** |
2788 | * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts | |
2789 | * @vsi: the VSI being configured | |
2790 | * @basename: name for the vector | |
2791 | * | |
2792 | * Allocates MSI-X vectors and requests interrupts from the kernel. | |
2793 | **/ | |
2794 | static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename) | |
2795 | { | |
2796 | int q_vectors = vsi->num_q_vectors; | |
2797 | struct i40e_pf *pf = vsi->back; | |
2798 | int base = vsi->base_vector; | |
2799 | int rx_int_idx = 0; | |
2800 | int tx_int_idx = 0; | |
2801 | int vector, err; | |
2802 | ||
2803 | for (vector = 0; vector < q_vectors; vector++) { | |
493fb300 | 2804 | struct i40e_q_vector *q_vector = vsi->q_vectors[vector]; |
41c445ff | 2805 | |
cd0b6fa6 | 2806 | if (q_vector->tx.ring && q_vector->rx.ring) { |
41c445ff JB |
2807 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
2808 | "%s-%s-%d", basename, "TxRx", rx_int_idx++); | |
2809 | tx_int_idx++; | |
cd0b6fa6 | 2810 | } else if (q_vector->rx.ring) { |
41c445ff JB |
2811 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
2812 | "%s-%s-%d", basename, "rx", rx_int_idx++); | |
cd0b6fa6 | 2813 | } else if (q_vector->tx.ring) { |
41c445ff JB |
2814 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, |
2815 | "%s-%s-%d", basename, "tx", tx_int_idx++); | |
2816 | } else { | |
2817 | /* skip this unused q_vector */ | |
2818 | continue; | |
2819 | } | |
2820 | err = request_irq(pf->msix_entries[base + vector].vector, | |
2821 | vsi->irq_handler, | |
2822 | 0, | |
2823 | q_vector->name, | |
2824 | q_vector); | |
2825 | if (err) { | |
2826 | dev_info(&pf->pdev->dev, | |
2827 | "%s: request_irq failed, error: %d\n", | |
2828 | __func__, err); | |
2829 | goto free_queue_irqs; | |
2830 | } | |
2831 | /* assign the mask for this irq */ | |
2832 | irq_set_affinity_hint(pf->msix_entries[base + vector].vector, | |
2833 | &q_vector->affinity_mask); | |
2834 | } | |
2835 | ||
63741846 | 2836 | vsi->irqs_ready = true; |
41c445ff JB |
2837 | return 0; |
2838 | ||
2839 | free_queue_irqs: | |
2840 | while (vector) { | |
2841 | vector--; | |
2842 | irq_set_affinity_hint(pf->msix_entries[base + vector].vector, | |
2843 | NULL); | |
2844 | free_irq(pf->msix_entries[base + vector].vector, | |
2845 | &(vsi->q_vectors[vector])); | |
2846 | } | |
2847 | return err; | |
2848 | } | |
2849 | ||
2850 | /** | |
2851 | * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI | |
2852 | * @vsi: the VSI being un-configured | |
2853 | **/ | |
2854 | static void i40e_vsi_disable_irq(struct i40e_vsi *vsi) | |
2855 | { | |
2856 | struct i40e_pf *pf = vsi->back; | |
2857 | struct i40e_hw *hw = &pf->hw; | |
2858 | int base = vsi->base_vector; | |
2859 | int i; | |
2860 | ||
2861 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
2862 | wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0); |
2863 | wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0); | |
41c445ff JB |
2864 | } |
2865 | ||
2866 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2867 | for (i = vsi->base_vector; | |
2868 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
2869 | wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0); | |
2870 | ||
2871 | i40e_flush(hw); | |
2872 | for (i = 0; i < vsi->num_q_vectors; i++) | |
2873 | synchronize_irq(pf->msix_entries[i + base].vector); | |
2874 | } else { | |
2875 | /* Legacy and MSI mode - this stops all interrupt handling */ | |
2876 | wr32(hw, I40E_PFINT_ICR0_ENA, 0); | |
2877 | wr32(hw, I40E_PFINT_DYN_CTL0, 0); | |
2878 | i40e_flush(hw); | |
2879 | synchronize_irq(pf->pdev->irq); | |
2880 | } | |
2881 | } | |
2882 | ||
2883 | /** | |
2884 | * i40e_vsi_enable_irq - Enable IRQ for the given VSI | |
2885 | * @vsi: the VSI being configured | |
2886 | **/ | |
2887 | static int i40e_vsi_enable_irq(struct i40e_vsi *vsi) | |
2888 | { | |
2889 | struct i40e_pf *pf = vsi->back; | |
2890 | int i; | |
2891 | ||
2892 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
2893 | for (i = vsi->base_vector; | |
2894 | i < (vsi->num_q_vectors + vsi->base_vector); i++) | |
2895 | i40e_irq_dynamic_enable(vsi, i); | |
2896 | } else { | |
2897 | i40e_irq_dynamic_enable_icr0(pf); | |
2898 | } | |
2899 | ||
1022cb6c | 2900 | i40e_flush(&pf->hw); |
41c445ff JB |
2901 | return 0; |
2902 | } | |
2903 | ||
2904 | /** | |
2905 | * i40e_stop_misc_vector - Stop the vector that handles non-queue events | |
2906 | * @pf: board private structure | |
2907 | **/ | |
2908 | static void i40e_stop_misc_vector(struct i40e_pf *pf) | |
2909 | { | |
2910 | /* Disable ICR 0 */ | |
2911 | wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0); | |
2912 | i40e_flush(&pf->hw); | |
2913 | } | |
2914 | ||
2915 | /** | |
2916 | * i40e_intr - MSI/Legacy and non-queue interrupt handler | |
2917 | * @irq: interrupt number | |
2918 | * @data: pointer to a q_vector | |
2919 | * | |
2920 | * This is the handler used for all MSI/Legacy interrupts, and deals | |
2921 | * with both queue and non-queue interrupts. This is also used in | |
2922 | * MSIX mode to handle the non-queue interrupts. | |
2923 | **/ | |
2924 | static irqreturn_t i40e_intr(int irq, void *data) | |
2925 | { | |
2926 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
2927 | struct i40e_hw *hw = &pf->hw; | |
5e823066 | 2928 | irqreturn_t ret = IRQ_NONE; |
41c445ff JB |
2929 | u32 icr0, icr0_remaining; |
2930 | u32 val, ena_mask; | |
2931 | ||
2932 | icr0 = rd32(hw, I40E_PFINT_ICR0); | |
5e823066 | 2933 | ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA); |
41c445ff | 2934 | |
116a57d4 SN |
2935 | /* if sharing a legacy IRQ, we might get called w/o an intr pending */ |
2936 | if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) | |
5e823066 | 2937 | goto enable_intr; |
41c445ff | 2938 | |
cd92e72f SN |
2939 | /* if interrupt but no bits showing, must be SWINT */ |
2940 | if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || | |
2941 | (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) | |
2942 | pf->sw_int_count++; | |
2943 | ||
41c445ff JB |
2944 | /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */ |
2945 | if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { | |
2946 | ||
2947 | /* temporarily disable queue cause for NAPI processing */ | |
2948 | u32 qval = rd32(hw, I40E_QINT_RQCTL(0)); | |
2949 | qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK; | |
2950 | wr32(hw, I40E_QINT_RQCTL(0), qval); | |
2951 | ||
2952 | qval = rd32(hw, I40E_QINT_TQCTL(0)); | |
2953 | qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK; | |
2954 | wr32(hw, I40E_QINT_TQCTL(0), qval); | |
41c445ff JB |
2955 | |
2956 | if (!test_bit(__I40E_DOWN, &pf->state)) | |
493fb300 | 2957 | napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi); |
41c445ff JB |
2958 | } |
2959 | ||
2960 | if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { | |
2961 | ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
2962 | set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
2963 | } | |
2964 | ||
2965 | if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { | |
2966 | ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
2967 | set_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
2968 | } | |
2969 | ||
2970 | if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { | |
2971 | ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
2972 | set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); | |
2973 | } | |
2974 | ||
2975 | if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { | |
2976 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
2977 | set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
2978 | ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK; | |
2979 | val = rd32(hw, I40E_GLGEN_RSTAT); | |
2980 | val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK) | |
2981 | >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT; | |
4eb3f768 | 2982 | if (val == I40E_RESET_CORER) { |
41c445ff | 2983 | pf->corer_count++; |
4eb3f768 | 2984 | } else if (val == I40E_RESET_GLOBR) { |
41c445ff | 2985 | pf->globr_count++; |
4eb3f768 | 2986 | } else if (val == I40E_RESET_EMPR) { |
41c445ff | 2987 | pf->empr_count++; |
4eb3f768 SN |
2988 | set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state); |
2989 | } | |
41c445ff JB |
2990 | } |
2991 | ||
9c010ee0 ASJ |
2992 | if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { |
2993 | icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; | |
2994 | dev_info(&pf->pdev->dev, "HMC error interrupt\n"); | |
2995 | } | |
2996 | ||
beb0dff1 JK |
2997 | if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { |
2998 | u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0); | |
2999 | ||
3000 | if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) { | |
cafa1fca | 3001 | icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; |
beb0dff1 | 3002 | i40e_ptp_tx_hwtstamp(pf); |
beb0dff1 | 3003 | } |
beb0dff1 JK |
3004 | } |
3005 | ||
41c445ff JB |
3006 | /* If a critical error is pending we have no choice but to reset the |
3007 | * device. | |
3008 | * Report and mask out any remaining unexpected interrupts. | |
3009 | */ | |
3010 | icr0_remaining = icr0 & ena_mask; | |
3011 | if (icr0_remaining) { | |
3012 | dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n", | |
3013 | icr0_remaining); | |
9c010ee0 | 3014 | if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) || |
41c445ff | 3015 | (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) || |
c0c28975 | 3016 | (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) { |
9c010ee0 ASJ |
3017 | dev_info(&pf->pdev->dev, "device will be reset\n"); |
3018 | set_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
3019 | i40e_service_event_schedule(pf); | |
41c445ff JB |
3020 | } |
3021 | ena_mask &= ~icr0_remaining; | |
3022 | } | |
5e823066 | 3023 | ret = IRQ_HANDLED; |
41c445ff | 3024 | |
5e823066 | 3025 | enable_intr: |
41c445ff JB |
3026 | /* re-enable interrupt causes */ |
3027 | wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask); | |
41c445ff JB |
3028 | if (!test_bit(__I40E_DOWN, &pf->state)) { |
3029 | i40e_service_event_schedule(pf); | |
3030 | i40e_irq_dynamic_enable_icr0(pf); | |
3031 | } | |
3032 | ||
5e823066 | 3033 | return ret; |
41c445ff JB |
3034 | } |
3035 | ||
cbf61325 ASJ |
3036 | /** |
3037 | * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes | |
3038 | * @tx_ring: tx ring to clean | |
3039 | * @budget: how many cleans we're allowed | |
3040 | * | |
3041 | * Returns true if there's any budget left (e.g. the clean is finished) | |
3042 | **/ | |
3043 | static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget) | |
3044 | { | |
3045 | struct i40e_vsi *vsi = tx_ring->vsi; | |
3046 | u16 i = tx_ring->next_to_clean; | |
3047 | struct i40e_tx_buffer *tx_buf; | |
3048 | struct i40e_tx_desc *tx_desc; | |
3049 | ||
3050 | tx_buf = &tx_ring->tx_bi[i]; | |
3051 | tx_desc = I40E_TX_DESC(tx_ring, i); | |
3052 | i -= tx_ring->count; | |
3053 | ||
3054 | do { | |
3055 | struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch; | |
3056 | ||
3057 | /* if next_to_watch is not set then there is no work pending */ | |
3058 | if (!eop_desc) | |
3059 | break; | |
3060 | ||
3061 | /* prevent any other reads prior to eop_desc */ | |
3062 | read_barrier_depends(); | |
3063 | ||
3064 | /* if the descriptor isn't done, no work yet to do */ | |
3065 | if (!(eop_desc->cmd_type_offset_bsz & | |
3066 | cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE))) | |
3067 | break; | |
3068 | ||
3069 | /* clear next_to_watch to prevent false hangs */ | |
3070 | tx_buf->next_to_watch = NULL; | |
3071 | ||
3072 | /* unmap skb header data */ | |
3073 | dma_unmap_single(tx_ring->dev, | |
3074 | dma_unmap_addr(tx_buf, dma), | |
3075 | dma_unmap_len(tx_buf, len), | |
3076 | DMA_TO_DEVICE); | |
3077 | ||
3078 | dma_unmap_len_set(tx_buf, len, 0); | |
3079 | ||
3080 | ||
3081 | /* move to the next desc and buffer to clean */ | |
3082 | tx_buf++; | |
3083 | tx_desc++; | |
3084 | i++; | |
3085 | if (unlikely(!i)) { | |
3086 | i -= tx_ring->count; | |
3087 | tx_buf = tx_ring->tx_bi; | |
3088 | tx_desc = I40E_TX_DESC(tx_ring, 0); | |
3089 | } | |
3090 | ||
3091 | /* update budget accounting */ | |
3092 | budget--; | |
3093 | } while (likely(budget)); | |
3094 | ||
3095 | i += tx_ring->count; | |
3096 | tx_ring->next_to_clean = i; | |
3097 | ||
3098 | if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) { | |
3099 | i40e_irq_dynamic_enable(vsi, | |
3100 | tx_ring->q_vector->v_idx + vsi->base_vector); | |
3101 | } | |
3102 | return budget > 0; | |
3103 | } | |
3104 | ||
3105 | /** | |
3106 | * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring | |
3107 | * @irq: interrupt number | |
3108 | * @data: pointer to a q_vector | |
3109 | **/ | |
3110 | static irqreturn_t i40e_fdir_clean_ring(int irq, void *data) | |
3111 | { | |
3112 | struct i40e_q_vector *q_vector = data; | |
3113 | struct i40e_vsi *vsi; | |
3114 | ||
3115 | if (!q_vector->tx.ring) | |
3116 | return IRQ_HANDLED; | |
3117 | ||
3118 | vsi = q_vector->tx.ring->vsi; | |
3119 | i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit); | |
3120 | ||
3121 | return IRQ_HANDLED; | |
3122 | } | |
3123 | ||
41c445ff | 3124 | /** |
cd0b6fa6 | 3125 | * i40e_map_vector_to_qp - Assigns the queue pair to the vector |
41c445ff JB |
3126 | * @vsi: the VSI being configured |
3127 | * @v_idx: vector index | |
cd0b6fa6 | 3128 | * @qp_idx: queue pair index |
41c445ff | 3129 | **/ |
cd0b6fa6 | 3130 | static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx) |
41c445ff | 3131 | { |
493fb300 | 3132 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; |
9f65e15b AD |
3133 | struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx]; |
3134 | struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx]; | |
41c445ff JB |
3135 | |
3136 | tx_ring->q_vector = q_vector; | |
cd0b6fa6 AD |
3137 | tx_ring->next = q_vector->tx.ring; |
3138 | q_vector->tx.ring = tx_ring; | |
41c445ff | 3139 | q_vector->tx.count++; |
cd0b6fa6 AD |
3140 | |
3141 | rx_ring->q_vector = q_vector; | |
3142 | rx_ring->next = q_vector->rx.ring; | |
3143 | q_vector->rx.ring = rx_ring; | |
3144 | q_vector->rx.count++; | |
41c445ff JB |
3145 | } |
3146 | ||
3147 | /** | |
3148 | * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors | |
3149 | * @vsi: the VSI being configured | |
3150 | * | |
3151 | * This function maps descriptor rings to the queue-specific vectors | |
3152 | * we were allotted through the MSI-X enabling code. Ideally, we'd have | |
3153 | * one vector per queue pair, but on a constrained vector budget, we | |
3154 | * group the queue pairs as "efficiently" as possible. | |
3155 | **/ | |
3156 | static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi) | |
3157 | { | |
3158 | int qp_remaining = vsi->num_queue_pairs; | |
3159 | int q_vectors = vsi->num_q_vectors; | |
cd0b6fa6 | 3160 | int num_ringpairs; |
41c445ff JB |
3161 | int v_start = 0; |
3162 | int qp_idx = 0; | |
3163 | ||
3164 | /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to | |
3165 | * group them so there are multiple queues per vector. | |
70114ec4 ASJ |
3166 | * It is also important to go through all the vectors available to be |
3167 | * sure that if we don't use all the vectors, that the remaining vectors | |
3168 | * are cleared. This is especially important when decreasing the | |
3169 | * number of queues in use. | |
41c445ff | 3170 | */ |
70114ec4 | 3171 | for (; v_start < q_vectors; v_start++) { |
cd0b6fa6 AD |
3172 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_start]; |
3173 | ||
3174 | num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start); | |
3175 | ||
3176 | q_vector->num_ringpairs = num_ringpairs; | |
3177 | ||
3178 | q_vector->rx.count = 0; | |
3179 | q_vector->tx.count = 0; | |
3180 | q_vector->rx.ring = NULL; | |
3181 | q_vector->tx.ring = NULL; | |
3182 | ||
3183 | while (num_ringpairs--) { | |
3184 | map_vector_to_qp(vsi, v_start, qp_idx); | |
3185 | qp_idx++; | |
3186 | qp_remaining--; | |
41c445ff JB |
3187 | } |
3188 | } | |
3189 | } | |
3190 | ||
3191 | /** | |
3192 | * i40e_vsi_request_irq - Request IRQ from the OS | |
3193 | * @vsi: the VSI being configured | |
3194 | * @basename: name for the vector | |
3195 | **/ | |
3196 | static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename) | |
3197 | { | |
3198 | struct i40e_pf *pf = vsi->back; | |
3199 | int err; | |
3200 | ||
3201 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
3202 | err = i40e_vsi_request_irq_msix(vsi, basename); | |
3203 | else if (pf->flags & I40E_FLAG_MSI_ENABLED) | |
3204 | err = request_irq(pf->pdev->irq, i40e_intr, 0, | |
3205 | pf->misc_int_name, pf); | |
3206 | else | |
3207 | err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED, | |
3208 | pf->misc_int_name, pf); | |
3209 | ||
3210 | if (err) | |
3211 | dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err); | |
3212 | ||
3213 | return err; | |
3214 | } | |
3215 | ||
3216 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
3217 | /** | |
3218 | * i40e_netpoll - A Polling 'interrupt'handler | |
3219 | * @netdev: network interface device structure | |
3220 | * | |
3221 | * This is used by netconsole to send skbs without having to re-enable | |
3222 | * interrupts. It's not called while the normal interrupt routine is executing. | |
3223 | **/ | |
3224 | static void i40e_netpoll(struct net_device *netdev) | |
3225 | { | |
3226 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
3227 | struct i40e_vsi *vsi = np->vsi; | |
3228 | struct i40e_pf *pf = vsi->back; | |
3229 | int i; | |
3230 | ||
3231 | /* if interface is down do nothing */ | |
3232 | if (test_bit(__I40E_DOWN, &vsi->state)) | |
3233 | return; | |
3234 | ||
3235 | pf->flags |= I40E_FLAG_IN_NETPOLL; | |
3236 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3237 | for (i = 0; i < vsi->num_q_vectors; i++) | |
493fb300 | 3238 | i40e_msix_clean_rings(0, vsi->q_vectors[i]); |
41c445ff JB |
3239 | } else { |
3240 | i40e_intr(pf->pdev->irq, netdev); | |
3241 | } | |
3242 | pf->flags &= ~I40E_FLAG_IN_NETPOLL; | |
3243 | } | |
3244 | #endif | |
3245 | ||
23527308 NP |
3246 | /** |
3247 | * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled | |
3248 | * @pf: the PF being configured | |
3249 | * @pf_q: the PF queue | |
3250 | * @enable: enable or disable state of the queue | |
3251 | * | |
3252 | * This routine will wait for the given Tx queue of the PF to reach the | |
3253 | * enabled or disabled state. | |
3254 | * Returns -ETIMEDOUT in case of failing to reach the requested state after | |
3255 | * multiple retries; else will return 0 in case of success. | |
3256 | **/ | |
3257 | static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable) | |
3258 | { | |
3259 | int i; | |
3260 | u32 tx_reg; | |
3261 | ||
3262 | for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { | |
3263 | tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); | |
3264 | if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) | |
3265 | break; | |
3266 | ||
3267 | udelay(10); | |
3268 | } | |
3269 | if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) | |
3270 | return -ETIMEDOUT; | |
3271 | ||
3272 | return 0; | |
3273 | } | |
3274 | ||
41c445ff JB |
3275 | /** |
3276 | * i40e_vsi_control_tx - Start or stop a VSI's rings | |
3277 | * @vsi: the VSI being configured | |
3278 | * @enable: start or stop the rings | |
3279 | **/ | |
3280 | static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable) | |
3281 | { | |
3282 | struct i40e_pf *pf = vsi->back; | |
3283 | struct i40e_hw *hw = &pf->hw; | |
23527308 | 3284 | int i, j, pf_q, ret = 0; |
41c445ff JB |
3285 | u32 tx_reg; |
3286 | ||
3287 | pf_q = vsi->base_queue; | |
3288 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
351499ab MJ |
3289 | |
3290 | /* warn the TX unit of coming changes */ | |
3291 | i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable); | |
3292 | if (!enable) | |
3293 | udelay(10); | |
3294 | ||
6c5ef620 | 3295 | for (j = 0; j < 50; j++) { |
41c445ff | 3296 | tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); |
6c5ef620 MW |
3297 | if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == |
3298 | ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) | |
3299 | break; | |
3300 | usleep_range(1000, 2000); | |
3301 | } | |
fda972f6 | 3302 | /* Skip if the queue is already in the requested state */ |
7c122007 | 3303 | if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) |
fda972f6 | 3304 | continue; |
41c445ff JB |
3305 | |
3306 | /* turn on/off the queue */ | |
c5c9eb9e SN |
3307 | if (enable) { |
3308 | wr32(hw, I40E_QTX_HEAD(pf_q), 0); | |
6c5ef620 | 3309 | tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; |
c5c9eb9e | 3310 | } else { |
41c445ff | 3311 | tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; |
c5c9eb9e | 3312 | } |
41c445ff JB |
3313 | |
3314 | wr32(hw, I40E_QTX_ENA(pf_q), tx_reg); | |
3315 | ||
3316 | /* wait for the change to finish */ | |
23527308 NP |
3317 | ret = i40e_pf_txq_wait(pf, pf_q, enable); |
3318 | if (ret) { | |
3319 | dev_info(&pf->pdev->dev, | |
3320 | "%s: VSI seid %d Tx ring %d %sable timeout\n", | |
3321 | __func__, vsi->seid, pf_q, | |
3322 | (enable ? "en" : "dis")); | |
3323 | break; | |
41c445ff JB |
3324 | } |
3325 | } | |
3326 | ||
7134f9ce JB |
3327 | if (hw->revision_id == 0) |
3328 | mdelay(50); | |
23527308 NP |
3329 | return ret; |
3330 | } | |
3331 | ||
3332 | /** | |
3333 | * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled | |
3334 | * @pf: the PF being configured | |
3335 | * @pf_q: the PF queue | |
3336 | * @enable: enable or disable state of the queue | |
3337 | * | |
3338 | * This routine will wait for the given Rx queue of the PF to reach the | |
3339 | * enabled or disabled state. | |
3340 | * Returns -ETIMEDOUT in case of failing to reach the requested state after | |
3341 | * multiple retries; else will return 0 in case of success. | |
3342 | **/ | |
3343 | static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable) | |
3344 | { | |
3345 | int i; | |
3346 | u32 rx_reg; | |
3347 | ||
3348 | for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) { | |
3349 | rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); | |
3350 | if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3351 | break; | |
3352 | ||
3353 | udelay(10); | |
3354 | } | |
3355 | if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT) | |
3356 | return -ETIMEDOUT; | |
7134f9ce | 3357 | |
41c445ff JB |
3358 | return 0; |
3359 | } | |
3360 | ||
3361 | /** | |
3362 | * i40e_vsi_control_rx - Start or stop a VSI's rings | |
3363 | * @vsi: the VSI being configured | |
3364 | * @enable: start or stop the rings | |
3365 | **/ | |
3366 | static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable) | |
3367 | { | |
3368 | struct i40e_pf *pf = vsi->back; | |
3369 | struct i40e_hw *hw = &pf->hw; | |
23527308 | 3370 | int i, j, pf_q, ret = 0; |
41c445ff JB |
3371 | u32 rx_reg; |
3372 | ||
3373 | pf_q = vsi->base_queue; | |
3374 | for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) { | |
6c5ef620 | 3375 | for (j = 0; j < 50; j++) { |
41c445ff | 3376 | rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); |
6c5ef620 MW |
3377 | if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == |
3378 | ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) | |
3379 | break; | |
3380 | usleep_range(1000, 2000); | |
3381 | } | |
41c445ff | 3382 | |
7c122007 CS |
3383 | /* Skip if the queue is already in the requested state */ |
3384 | if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) | |
3385 | continue; | |
41c445ff JB |
3386 | |
3387 | /* turn on/off the queue */ | |
3388 | if (enable) | |
6c5ef620 | 3389 | rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; |
41c445ff | 3390 | else |
6c5ef620 | 3391 | rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; |
41c445ff JB |
3392 | wr32(hw, I40E_QRX_ENA(pf_q), rx_reg); |
3393 | ||
3394 | /* wait for the change to finish */ | |
23527308 NP |
3395 | ret = i40e_pf_rxq_wait(pf, pf_q, enable); |
3396 | if (ret) { | |
3397 | dev_info(&pf->pdev->dev, | |
3398 | "%s: VSI seid %d Rx ring %d %sable timeout\n", | |
3399 | __func__, vsi->seid, pf_q, | |
3400 | (enable ? "en" : "dis")); | |
3401 | break; | |
41c445ff JB |
3402 | } |
3403 | } | |
3404 | ||
23527308 | 3405 | return ret; |
41c445ff JB |
3406 | } |
3407 | ||
3408 | /** | |
3409 | * i40e_vsi_control_rings - Start or stop a VSI's rings | |
3410 | * @vsi: the VSI being configured | |
3411 | * @enable: start or stop the rings | |
3412 | **/ | |
fc18eaa0 | 3413 | int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request) |
41c445ff | 3414 | { |
3b867b28 | 3415 | int ret = 0; |
41c445ff JB |
3416 | |
3417 | /* do rx first for enable and last for disable */ | |
3418 | if (request) { | |
3419 | ret = i40e_vsi_control_rx(vsi, request); | |
3420 | if (ret) | |
3421 | return ret; | |
3422 | ret = i40e_vsi_control_tx(vsi, request); | |
3423 | } else { | |
3b867b28 ASJ |
3424 | /* Ignore return value, we need to shutdown whatever we can */ |
3425 | i40e_vsi_control_tx(vsi, request); | |
3426 | i40e_vsi_control_rx(vsi, request); | |
41c445ff JB |
3427 | } |
3428 | ||
3429 | return ret; | |
3430 | } | |
3431 | ||
3432 | /** | |
3433 | * i40e_vsi_free_irq - Free the irq association with the OS | |
3434 | * @vsi: the VSI being configured | |
3435 | **/ | |
3436 | static void i40e_vsi_free_irq(struct i40e_vsi *vsi) | |
3437 | { | |
3438 | struct i40e_pf *pf = vsi->back; | |
3439 | struct i40e_hw *hw = &pf->hw; | |
3440 | int base = vsi->base_vector; | |
3441 | u32 val, qp; | |
3442 | int i; | |
3443 | ||
3444 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3445 | if (!vsi->q_vectors) | |
3446 | return; | |
3447 | ||
63741846 SN |
3448 | if (!vsi->irqs_ready) |
3449 | return; | |
3450 | ||
3451 | vsi->irqs_ready = false; | |
41c445ff JB |
3452 | for (i = 0; i < vsi->num_q_vectors; i++) { |
3453 | u16 vector = i + base; | |
3454 | ||
3455 | /* free only the irqs that were actually requested */ | |
78681b1f SN |
3456 | if (!vsi->q_vectors[i] || |
3457 | !vsi->q_vectors[i]->num_ringpairs) | |
41c445ff JB |
3458 | continue; |
3459 | ||
3460 | /* clear the affinity_mask in the IRQ descriptor */ | |
3461 | irq_set_affinity_hint(pf->msix_entries[vector].vector, | |
3462 | NULL); | |
3463 | free_irq(pf->msix_entries[vector].vector, | |
493fb300 | 3464 | vsi->q_vectors[i]); |
41c445ff JB |
3465 | |
3466 | /* Tear down the interrupt queue link list | |
3467 | * | |
3468 | * We know that they come in pairs and always | |
3469 | * the Rx first, then the Tx. To clear the | |
3470 | * link list, stick the EOL value into the | |
3471 | * next_q field of the registers. | |
3472 | */ | |
3473 | val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1)); | |
3474 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
3475 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3476 | val |= I40E_QUEUE_END_OF_LIST | |
3477 | << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3478 | wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val); | |
3479 | ||
3480 | while (qp != I40E_QUEUE_END_OF_LIST) { | |
3481 | u32 next; | |
3482 | ||
3483 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
3484 | ||
3485 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
3486 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
3487 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
3488 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
3489 | ||
3490 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
3491 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
3492 | ||
3493 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3494 | ||
3495 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
3496 | ||
3497 | next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK) | |
3498 | >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT; | |
3499 | ||
3500 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
3501 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
3502 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3503 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
3504 | ||
3505 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
3506 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
3507 | ||
3508 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3509 | qp = next; | |
3510 | } | |
3511 | } | |
3512 | } else { | |
3513 | free_irq(pf->pdev->irq, pf); | |
3514 | ||
3515 | val = rd32(hw, I40E_PFINT_LNKLST0); | |
3516 | qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK) | |
3517 | >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT; | |
3518 | val |= I40E_QUEUE_END_OF_LIST | |
3519 | << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT; | |
3520 | wr32(hw, I40E_PFINT_LNKLST0, val); | |
3521 | ||
3522 | val = rd32(hw, I40E_QINT_RQCTL(qp)); | |
3523 | val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK | | |
3524 | I40E_QINT_RQCTL_MSIX0_INDX_MASK | | |
3525 | I40E_QINT_RQCTL_CAUSE_ENA_MASK | | |
3526 | I40E_QINT_RQCTL_INTEVENT_MASK); | |
3527 | ||
3528 | val |= (I40E_QINT_RQCTL_ITR_INDX_MASK | | |
3529 | I40E_QINT_RQCTL_NEXTQ_INDX_MASK); | |
3530 | ||
3531 | wr32(hw, I40E_QINT_RQCTL(qp), val); | |
3532 | ||
3533 | val = rd32(hw, I40E_QINT_TQCTL(qp)); | |
3534 | ||
3535 | val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK | | |
3536 | I40E_QINT_TQCTL_MSIX0_INDX_MASK | | |
3537 | I40E_QINT_TQCTL_CAUSE_ENA_MASK | | |
3538 | I40E_QINT_TQCTL_INTEVENT_MASK); | |
3539 | ||
3540 | val |= (I40E_QINT_TQCTL_ITR_INDX_MASK | | |
3541 | I40E_QINT_TQCTL_NEXTQ_INDX_MASK); | |
3542 | ||
3543 | wr32(hw, I40E_QINT_TQCTL(qp), val); | |
3544 | } | |
3545 | } | |
3546 | ||
493fb300 AD |
3547 | /** |
3548 | * i40e_free_q_vector - Free memory allocated for specific interrupt vector | |
3549 | * @vsi: the VSI being configured | |
3550 | * @v_idx: Index of vector to be freed | |
3551 | * | |
3552 | * This function frees the memory allocated to the q_vector. In addition if | |
3553 | * NAPI is enabled it will delete any references to the NAPI struct prior | |
3554 | * to freeing the q_vector. | |
3555 | **/ | |
3556 | static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx) | |
3557 | { | |
3558 | struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx]; | |
cd0b6fa6 | 3559 | struct i40e_ring *ring; |
493fb300 AD |
3560 | |
3561 | if (!q_vector) | |
3562 | return; | |
3563 | ||
3564 | /* disassociate q_vector from rings */ | |
cd0b6fa6 AD |
3565 | i40e_for_each_ring(ring, q_vector->tx) |
3566 | ring->q_vector = NULL; | |
3567 | ||
3568 | i40e_for_each_ring(ring, q_vector->rx) | |
3569 | ring->q_vector = NULL; | |
493fb300 AD |
3570 | |
3571 | /* only VSI w/ an associated netdev is set up w/ NAPI */ | |
3572 | if (vsi->netdev) | |
3573 | netif_napi_del(&q_vector->napi); | |
3574 | ||
3575 | vsi->q_vectors[v_idx] = NULL; | |
3576 | ||
3577 | kfree_rcu(q_vector, rcu); | |
3578 | } | |
3579 | ||
41c445ff JB |
3580 | /** |
3581 | * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors | |
3582 | * @vsi: the VSI being un-configured | |
3583 | * | |
3584 | * This frees the memory allocated to the q_vectors and | |
3585 | * deletes references to the NAPI struct. | |
3586 | **/ | |
3587 | static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi) | |
3588 | { | |
3589 | int v_idx; | |
3590 | ||
493fb300 AD |
3591 | for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++) |
3592 | i40e_free_q_vector(vsi, v_idx); | |
41c445ff JB |
3593 | } |
3594 | ||
3595 | /** | |
3596 | * i40e_reset_interrupt_capability - Disable interrupt setup in OS | |
3597 | * @pf: board private structure | |
3598 | **/ | |
3599 | static void i40e_reset_interrupt_capability(struct i40e_pf *pf) | |
3600 | { | |
3601 | /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */ | |
3602 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
3603 | pci_disable_msix(pf->pdev); | |
3604 | kfree(pf->msix_entries); | |
3605 | pf->msix_entries = NULL; | |
3606 | } else if (pf->flags & I40E_FLAG_MSI_ENABLED) { | |
3607 | pci_disable_msi(pf->pdev); | |
3608 | } | |
3609 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED); | |
3610 | } | |
3611 | ||
3612 | /** | |
3613 | * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings | |
3614 | * @pf: board private structure | |
3615 | * | |
3616 | * We go through and clear interrupt specific resources and reset the structure | |
3617 | * to pre-load conditions | |
3618 | **/ | |
3619 | static void i40e_clear_interrupt_scheme(struct i40e_pf *pf) | |
3620 | { | |
3621 | int i; | |
3622 | ||
3623 | i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); | |
505682cd | 3624 | for (i = 0; i < pf->num_alloc_vsi; i++) |
41c445ff JB |
3625 | if (pf->vsi[i]) |
3626 | i40e_vsi_free_q_vectors(pf->vsi[i]); | |
3627 | i40e_reset_interrupt_capability(pf); | |
3628 | } | |
3629 | ||
3630 | /** | |
3631 | * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI | |
3632 | * @vsi: the VSI being configured | |
3633 | **/ | |
3634 | static void i40e_napi_enable_all(struct i40e_vsi *vsi) | |
3635 | { | |
3636 | int q_idx; | |
3637 | ||
3638 | if (!vsi->netdev) | |
3639 | return; | |
3640 | ||
3641 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) | |
493fb300 | 3642 | napi_enable(&vsi->q_vectors[q_idx]->napi); |
41c445ff JB |
3643 | } |
3644 | ||
3645 | /** | |
3646 | * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI | |
3647 | * @vsi: the VSI being configured | |
3648 | **/ | |
3649 | static void i40e_napi_disable_all(struct i40e_vsi *vsi) | |
3650 | { | |
3651 | int q_idx; | |
3652 | ||
3653 | if (!vsi->netdev) | |
3654 | return; | |
3655 | ||
3656 | for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) | |
493fb300 | 3657 | napi_disable(&vsi->q_vectors[q_idx]->napi); |
41c445ff JB |
3658 | } |
3659 | ||
90ef8d47 SN |
3660 | /** |
3661 | * i40e_vsi_close - Shut down a VSI | |
3662 | * @vsi: the vsi to be quelled | |
3663 | **/ | |
3664 | static void i40e_vsi_close(struct i40e_vsi *vsi) | |
3665 | { | |
3666 | if (!test_and_set_bit(__I40E_DOWN, &vsi->state)) | |
3667 | i40e_down(vsi); | |
3668 | i40e_vsi_free_irq(vsi); | |
3669 | i40e_vsi_free_tx_resources(vsi); | |
3670 | i40e_vsi_free_rx_resources(vsi); | |
3671 | } | |
3672 | ||
41c445ff JB |
3673 | /** |
3674 | * i40e_quiesce_vsi - Pause a given VSI | |
3675 | * @vsi: the VSI being paused | |
3676 | **/ | |
3677 | static void i40e_quiesce_vsi(struct i40e_vsi *vsi) | |
3678 | { | |
3679 | if (test_bit(__I40E_DOWN, &vsi->state)) | |
3680 | return; | |
3681 | ||
3682 | set_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
3683 | if (vsi->netdev && netif_running(vsi->netdev)) { | |
3684 | vsi->netdev->netdev_ops->ndo_stop(vsi->netdev); | |
3685 | } else { | |
90ef8d47 | 3686 | i40e_vsi_close(vsi); |
41c445ff JB |
3687 | } |
3688 | } | |
3689 | ||
3690 | /** | |
3691 | * i40e_unquiesce_vsi - Resume a given VSI | |
3692 | * @vsi: the VSI being resumed | |
3693 | **/ | |
3694 | static void i40e_unquiesce_vsi(struct i40e_vsi *vsi) | |
3695 | { | |
3696 | if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state)) | |
3697 | return; | |
3698 | ||
3699 | clear_bit(__I40E_NEEDS_RESTART, &vsi->state); | |
3700 | if (vsi->netdev && netif_running(vsi->netdev)) | |
3701 | vsi->netdev->netdev_ops->ndo_open(vsi->netdev); | |
3702 | else | |
8276f757 | 3703 | i40e_vsi_open(vsi); /* this clears the DOWN bit */ |
41c445ff JB |
3704 | } |
3705 | ||
3706 | /** | |
3707 | * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF | |
3708 | * @pf: the PF | |
3709 | **/ | |
3710 | static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf) | |
3711 | { | |
3712 | int v; | |
3713 | ||
505682cd | 3714 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
3715 | if (pf->vsi[v]) |
3716 | i40e_quiesce_vsi(pf->vsi[v]); | |
3717 | } | |
3718 | } | |
3719 | ||
3720 | /** | |
3721 | * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF | |
3722 | * @pf: the PF | |
3723 | **/ | |
3724 | static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf) | |
3725 | { | |
3726 | int v; | |
3727 | ||
505682cd | 3728 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
3729 | if (pf->vsi[v]) |
3730 | i40e_unquiesce_vsi(pf->vsi[v]); | |
3731 | } | |
3732 | } | |
3733 | ||
3734 | /** | |
3735 | * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config | |
3736 | * @dcbcfg: the corresponding DCBx configuration structure | |
3737 | * | |
3738 | * Return the number of TCs from given DCBx configuration | |
3739 | **/ | |
3740 | static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg) | |
3741 | { | |
078b5876 JB |
3742 | u8 num_tc = 0; |
3743 | int i; | |
41c445ff JB |
3744 | |
3745 | /* Scan the ETS Config Priority Table to find | |
3746 | * traffic class enabled for a given priority | |
3747 | * and use the traffic class index to get the | |
3748 | * number of traffic classes enabled | |
3749 | */ | |
3750 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
3751 | if (dcbcfg->etscfg.prioritytable[i] > num_tc) | |
3752 | num_tc = dcbcfg->etscfg.prioritytable[i]; | |
3753 | } | |
3754 | ||
3755 | /* Traffic class index starts from zero so | |
3756 | * increment to return the actual count | |
3757 | */ | |
078b5876 | 3758 | return num_tc + 1; |
41c445ff JB |
3759 | } |
3760 | ||
3761 | /** | |
3762 | * i40e_dcb_get_enabled_tc - Get enabled traffic classes | |
3763 | * @dcbcfg: the corresponding DCBx configuration structure | |
3764 | * | |
3765 | * Query the current DCB configuration and return the number of | |
3766 | * traffic classes enabled from the given DCBX config | |
3767 | **/ | |
3768 | static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg) | |
3769 | { | |
3770 | u8 num_tc = i40e_dcb_get_num_tc(dcbcfg); | |
3771 | u8 enabled_tc = 1; | |
3772 | u8 i; | |
3773 | ||
3774 | for (i = 0; i < num_tc; i++) | |
3775 | enabled_tc |= 1 << i; | |
3776 | ||
3777 | return enabled_tc; | |
3778 | } | |
3779 | ||
3780 | /** | |
3781 | * i40e_pf_get_num_tc - Get enabled traffic classes for PF | |
3782 | * @pf: PF being queried | |
3783 | * | |
3784 | * Return number of traffic classes enabled for the given PF | |
3785 | **/ | |
3786 | static u8 i40e_pf_get_num_tc(struct i40e_pf *pf) | |
3787 | { | |
3788 | struct i40e_hw *hw = &pf->hw; | |
3789 | u8 i, enabled_tc; | |
3790 | u8 num_tc = 0; | |
3791 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
3792 | ||
3793 | /* If DCB is not enabled then always in single TC */ | |
3794 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
3795 | return 1; | |
3796 | ||
3797 | /* MFP mode return count of enabled TCs for this PF */ | |
3798 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
3799 | enabled_tc = pf->hw.func_caps.enabled_tcmap; | |
3800 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3801 | if (enabled_tc & (1 << i)) | |
3802 | num_tc++; | |
3803 | } | |
3804 | return num_tc; | |
3805 | } | |
3806 | ||
3807 | /* SFP mode will be enabled for all TCs on port */ | |
3808 | return i40e_dcb_get_num_tc(dcbcfg); | |
3809 | } | |
3810 | ||
3811 | /** | |
3812 | * i40e_pf_get_default_tc - Get bitmap for first enabled TC | |
3813 | * @pf: PF being queried | |
3814 | * | |
3815 | * Return a bitmap for first enabled traffic class for this PF. | |
3816 | **/ | |
3817 | static u8 i40e_pf_get_default_tc(struct i40e_pf *pf) | |
3818 | { | |
3819 | u8 enabled_tc = pf->hw.func_caps.enabled_tcmap; | |
3820 | u8 i = 0; | |
3821 | ||
3822 | if (!enabled_tc) | |
3823 | return 0x1; /* TC0 */ | |
3824 | ||
3825 | /* Find the first enabled TC */ | |
3826 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3827 | if (enabled_tc & (1 << i)) | |
3828 | break; | |
3829 | } | |
3830 | ||
3831 | return 1 << i; | |
3832 | } | |
3833 | ||
3834 | /** | |
3835 | * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes | |
3836 | * @pf: PF being queried | |
3837 | * | |
3838 | * Return a bitmap for enabled traffic classes for this PF. | |
3839 | **/ | |
3840 | static u8 i40e_pf_get_tc_map(struct i40e_pf *pf) | |
3841 | { | |
3842 | /* If DCB is not enabled for this PF then just return default TC */ | |
3843 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) | |
3844 | return i40e_pf_get_default_tc(pf); | |
3845 | ||
3846 | /* MFP mode will have enabled TCs set by FW */ | |
3847 | if (pf->flags & I40E_FLAG_MFP_ENABLED) | |
3848 | return pf->hw.func_caps.enabled_tcmap; | |
3849 | ||
3850 | /* SFP mode we want PF to be enabled for all TCs */ | |
3851 | return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config); | |
3852 | } | |
3853 | ||
3854 | /** | |
3855 | * i40e_vsi_get_bw_info - Query VSI BW Information | |
3856 | * @vsi: the VSI being queried | |
3857 | * | |
3858 | * Returns 0 on success, negative value on failure | |
3859 | **/ | |
3860 | static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi) | |
3861 | { | |
3862 | struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0}; | |
3863 | struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0}; | |
3864 | struct i40e_pf *pf = vsi->back; | |
3865 | struct i40e_hw *hw = &pf->hw; | |
dcae29be | 3866 | i40e_status aq_ret; |
41c445ff | 3867 | u32 tc_bw_max; |
41c445ff JB |
3868 | int i; |
3869 | ||
3870 | /* Get the VSI level BW configuration */ | |
dcae29be JB |
3871 | aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL); |
3872 | if (aq_ret) { | |
41c445ff JB |
3873 | dev_info(&pf->pdev->dev, |
3874 | "couldn't get pf vsi bw config, err %d, aq_err %d\n", | |
dcae29be JB |
3875 | aq_ret, pf->hw.aq.asq_last_status); |
3876 | return -EINVAL; | |
41c445ff JB |
3877 | } |
3878 | ||
3879 | /* Get the VSI level BW configuration per TC */ | |
dcae29be | 3880 | aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config, |
6838b535 | 3881 | NULL); |
dcae29be | 3882 | if (aq_ret) { |
41c445ff JB |
3883 | dev_info(&pf->pdev->dev, |
3884 | "couldn't get pf vsi ets bw config, err %d, aq_err %d\n", | |
dcae29be JB |
3885 | aq_ret, pf->hw.aq.asq_last_status); |
3886 | return -EINVAL; | |
41c445ff JB |
3887 | } |
3888 | ||
3889 | if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) { | |
3890 | dev_info(&pf->pdev->dev, | |
3891 | "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n", | |
3892 | bw_config.tc_valid_bits, | |
3893 | bw_ets_config.tc_valid_bits); | |
3894 | /* Still continuing */ | |
3895 | } | |
3896 | ||
3897 | vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit); | |
3898 | vsi->bw_max_quanta = bw_config.max_bw; | |
3899 | tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) | | |
3900 | (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16); | |
3901 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3902 | vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i]; | |
3903 | vsi->bw_ets_limit_credits[i] = | |
3904 | le16_to_cpu(bw_ets_config.credits[i]); | |
3905 | /* 3 bits out of 4 for each TC */ | |
3906 | vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7); | |
3907 | } | |
078b5876 | 3908 | |
dcae29be | 3909 | return 0; |
41c445ff JB |
3910 | } |
3911 | ||
3912 | /** | |
3913 | * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC | |
3914 | * @vsi: the VSI being configured | |
3915 | * @enabled_tc: TC bitmap | |
3916 | * @bw_credits: BW shared credits per TC | |
3917 | * | |
3918 | * Returns 0 on success, negative value on failure | |
3919 | **/ | |
dcae29be | 3920 | static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc, |
41c445ff JB |
3921 | u8 *bw_share) |
3922 | { | |
3923 | struct i40e_aqc_configure_vsi_tc_bw_data bw_data; | |
dcae29be JB |
3924 | i40e_status aq_ret; |
3925 | int i; | |
41c445ff JB |
3926 | |
3927 | bw_data.tc_valid_bits = enabled_tc; | |
3928 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
3929 | bw_data.tc_bw_credits[i] = bw_share[i]; | |
3930 | ||
dcae29be JB |
3931 | aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data, |
3932 | NULL); | |
3933 | if (aq_ret) { | |
41c445ff | 3934 | dev_info(&vsi->back->pdev->dev, |
69bfb110 JB |
3935 | "AQ command Config VSI BW allocation per TC failed = %d\n", |
3936 | vsi->back->hw.aq.asq_last_status); | |
dcae29be | 3937 | return -EINVAL; |
41c445ff JB |
3938 | } |
3939 | ||
3940 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) | |
3941 | vsi->info.qs_handle[i] = bw_data.qs_handles[i]; | |
3942 | ||
dcae29be | 3943 | return 0; |
41c445ff JB |
3944 | } |
3945 | ||
3946 | /** | |
3947 | * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration | |
3948 | * @vsi: the VSI being configured | |
3949 | * @enabled_tc: TC map to be enabled | |
3950 | * | |
3951 | **/ | |
3952 | static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
3953 | { | |
3954 | struct net_device *netdev = vsi->netdev; | |
3955 | struct i40e_pf *pf = vsi->back; | |
3956 | struct i40e_hw *hw = &pf->hw; | |
3957 | u8 netdev_tc = 0; | |
3958 | int i; | |
3959 | struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config; | |
3960 | ||
3961 | if (!netdev) | |
3962 | return; | |
3963 | ||
3964 | if (!enabled_tc) { | |
3965 | netdev_reset_tc(netdev); | |
3966 | return; | |
3967 | } | |
3968 | ||
3969 | /* Set up actual enabled TCs on the VSI */ | |
3970 | if (netdev_set_num_tc(netdev, vsi->tc_config.numtc)) | |
3971 | return; | |
3972 | ||
3973 | /* set per TC queues for the VSI */ | |
3974 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
3975 | /* Only set TC queues for enabled tcs | |
3976 | * | |
3977 | * e.g. For a VSI that has TC0 and TC3 enabled the | |
3978 | * enabled_tc bitmap would be 0x00001001; the driver | |
3979 | * will set the numtc for netdev as 2 that will be | |
3980 | * referenced by the netdev layer as TC 0 and 1. | |
3981 | */ | |
3982 | if (vsi->tc_config.enabled_tc & (1 << i)) | |
3983 | netdev_set_tc_queue(netdev, | |
3984 | vsi->tc_config.tc_info[i].netdev_tc, | |
3985 | vsi->tc_config.tc_info[i].qcount, | |
3986 | vsi->tc_config.tc_info[i].qoffset); | |
3987 | } | |
3988 | ||
3989 | /* Assign UP2TC map for the VSI */ | |
3990 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
3991 | /* Get the actual TC# for the UP */ | |
3992 | u8 ets_tc = dcbcfg->etscfg.prioritytable[i]; | |
3993 | /* Get the mapped netdev TC# for the UP */ | |
3994 | netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc; | |
3995 | netdev_set_prio_tc_map(netdev, i, netdev_tc); | |
3996 | } | |
3997 | } | |
3998 | ||
3999 | /** | |
4000 | * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map | |
4001 | * @vsi: the VSI being configured | |
4002 | * @ctxt: the ctxt buffer returned from AQ VSI update param command | |
4003 | **/ | |
4004 | static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi, | |
4005 | struct i40e_vsi_context *ctxt) | |
4006 | { | |
4007 | /* copy just the sections touched not the entire info | |
4008 | * since not all sections are valid as returned by | |
4009 | * update vsi params | |
4010 | */ | |
4011 | vsi->info.mapping_flags = ctxt->info.mapping_flags; | |
4012 | memcpy(&vsi->info.queue_mapping, | |
4013 | &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping)); | |
4014 | memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping, | |
4015 | sizeof(vsi->info.tc_mapping)); | |
4016 | } | |
4017 | ||
4018 | /** | |
4019 | * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map | |
4020 | * @vsi: VSI to be configured | |
4021 | * @enabled_tc: TC bitmap | |
4022 | * | |
4023 | * This configures a particular VSI for TCs that are mapped to the | |
4024 | * given TC bitmap. It uses default bandwidth share for TCs across | |
4025 | * VSIs to configure TC for a particular VSI. | |
4026 | * | |
4027 | * NOTE: | |
4028 | * It is expected that the VSI queues have been quisced before calling | |
4029 | * this function. | |
4030 | **/ | |
4031 | static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc) | |
4032 | { | |
4033 | u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0}; | |
4034 | struct i40e_vsi_context ctxt; | |
4035 | int ret = 0; | |
4036 | int i; | |
4037 | ||
4038 | /* Check if enabled_tc is same as existing or new TCs */ | |
4039 | if (vsi->tc_config.enabled_tc == enabled_tc) | |
4040 | return ret; | |
4041 | ||
4042 | /* Enable ETS TCs with equal BW Share for now across all VSIs */ | |
4043 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
4044 | if (enabled_tc & (1 << i)) | |
4045 | bw_share[i] = 1; | |
4046 | } | |
4047 | ||
4048 | ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share); | |
4049 | if (ret) { | |
4050 | dev_info(&vsi->back->pdev->dev, | |
4051 | "Failed configuring TC map %d for VSI %d\n", | |
4052 | enabled_tc, vsi->seid); | |
4053 | goto out; | |
4054 | } | |
4055 | ||
4056 | /* Update Queue Pairs Mapping for currently enabled UPs */ | |
4057 | ctxt.seid = vsi->seid; | |
4058 | ctxt.pf_num = vsi->back->hw.pf_id; | |
4059 | ctxt.vf_num = 0; | |
4060 | ctxt.uplink_seid = vsi->uplink_seid; | |
4061 | memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info)); | |
4062 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
4063 | ||
4064 | /* Update the VSI after updating the VSI queue-mapping information */ | |
4065 | ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL); | |
4066 | if (ret) { | |
4067 | dev_info(&vsi->back->pdev->dev, | |
4068 | "update vsi failed, aq_err=%d\n", | |
4069 | vsi->back->hw.aq.asq_last_status); | |
4070 | goto out; | |
4071 | } | |
4072 | /* update the local VSI info with updated queue map */ | |
4073 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
4074 | vsi->info.valid_sections = 0; | |
4075 | ||
4076 | /* Update current VSI BW information */ | |
4077 | ret = i40e_vsi_get_bw_info(vsi); | |
4078 | if (ret) { | |
4079 | dev_info(&vsi->back->pdev->dev, | |
4080 | "Failed updating vsi bw info, aq_err=%d\n", | |
4081 | vsi->back->hw.aq.asq_last_status); | |
4082 | goto out; | |
4083 | } | |
4084 | ||
4085 | /* Update the netdev TC setup */ | |
4086 | i40e_vsi_config_netdev_tc(vsi, enabled_tc); | |
4087 | out: | |
4088 | return ret; | |
4089 | } | |
4090 | ||
4e3b35b0 NP |
4091 | /** |
4092 | * i40e_veb_config_tc - Configure TCs for given VEB | |
4093 | * @veb: given VEB | |
4094 | * @enabled_tc: TC bitmap | |
4095 | * | |
4096 | * Configures given TC bitmap for VEB (switching) element | |
4097 | **/ | |
4098 | int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc) | |
4099 | { | |
4100 | struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0}; | |
4101 | struct i40e_pf *pf = veb->pf; | |
4102 | int ret = 0; | |
4103 | int i; | |
4104 | ||
4105 | /* No TCs or already enabled TCs just return */ | |
4106 | if (!enabled_tc || veb->enabled_tc == enabled_tc) | |
4107 | return ret; | |
4108 | ||
4109 | bw_data.tc_valid_bits = enabled_tc; | |
4110 | /* bw_data.absolute_credits is not set (relative) */ | |
4111 | ||
4112 | /* Enable ETS TCs with equal BW Share for now */ | |
4113 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
4114 | if (enabled_tc & (1 << i)) | |
4115 | bw_data.tc_bw_share_credits[i] = 1; | |
4116 | } | |
4117 | ||
4118 | ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid, | |
4119 | &bw_data, NULL); | |
4120 | if (ret) { | |
4121 | dev_info(&pf->pdev->dev, | |
4122 | "veb bw config failed, aq_err=%d\n", | |
4123 | pf->hw.aq.asq_last_status); | |
4124 | goto out; | |
4125 | } | |
4126 | ||
4127 | /* Update the BW information */ | |
4128 | ret = i40e_veb_get_bw_info(veb); | |
4129 | if (ret) { | |
4130 | dev_info(&pf->pdev->dev, | |
4131 | "Failed getting veb bw config, aq_err=%d\n", | |
4132 | pf->hw.aq.asq_last_status); | |
4133 | } | |
4134 | ||
4135 | out: | |
4136 | return ret; | |
4137 | } | |
4138 | ||
4139 | #ifdef CONFIG_I40E_DCB | |
4140 | /** | |
4141 | * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs | |
4142 | * @pf: PF struct | |
4143 | * | |
4144 | * Reconfigure VEB/VSIs on a given PF; it is assumed that | |
4145 | * the caller would've quiesce all the VSIs before calling | |
4146 | * this function | |
4147 | **/ | |
4148 | static void i40e_dcb_reconfigure(struct i40e_pf *pf) | |
4149 | { | |
4150 | u8 tc_map = 0; | |
4151 | int ret; | |
4152 | u8 v; | |
4153 | ||
4154 | /* Enable the TCs available on PF to all VEBs */ | |
4155 | tc_map = i40e_pf_get_tc_map(pf); | |
4156 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
4157 | if (!pf->veb[v]) | |
4158 | continue; | |
4159 | ret = i40e_veb_config_tc(pf->veb[v], tc_map); | |
4160 | if (ret) { | |
4161 | dev_info(&pf->pdev->dev, | |
4162 | "Failed configuring TC for VEB seid=%d\n", | |
4163 | pf->veb[v]->seid); | |
4164 | /* Will try to configure as many components */ | |
4165 | } | |
4166 | } | |
4167 | ||
4168 | /* Update each VSI */ | |
505682cd | 4169 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
4e3b35b0 NP |
4170 | if (!pf->vsi[v]) |
4171 | continue; | |
4172 | ||
4173 | /* - Enable all TCs for the LAN VSI | |
4174 | * - For all others keep them at TC0 for now | |
4175 | */ | |
4176 | if (v == pf->lan_vsi) | |
4177 | tc_map = i40e_pf_get_tc_map(pf); | |
4178 | else | |
4179 | tc_map = i40e_pf_get_default_tc(pf); | |
4180 | ||
4181 | ret = i40e_vsi_config_tc(pf->vsi[v], tc_map); | |
4182 | if (ret) { | |
4183 | dev_info(&pf->pdev->dev, | |
4184 | "Failed configuring TC for VSI seid=%d\n", | |
4185 | pf->vsi[v]->seid); | |
4186 | /* Will try to configure as many components */ | |
4187 | } else { | |
0672a091 NP |
4188 | /* Re-configure VSI vectors based on updated TC map */ |
4189 | i40e_vsi_map_rings_to_vectors(pf->vsi[v]); | |
4e3b35b0 NP |
4190 | if (pf->vsi[v]->netdev) |
4191 | i40e_dcbnl_set_all(pf->vsi[v]); | |
4192 | } | |
4193 | } | |
4194 | } | |
4195 | ||
4196 | /** | |
4197 | * i40e_init_pf_dcb - Initialize DCB configuration | |
4198 | * @pf: PF being configured | |
4199 | * | |
4200 | * Query the current DCB configuration and cache it | |
4201 | * in the hardware structure | |
4202 | **/ | |
4203 | static int i40e_init_pf_dcb(struct i40e_pf *pf) | |
4204 | { | |
4205 | struct i40e_hw *hw = &pf->hw; | |
4206 | int err = 0; | |
4207 | ||
4208 | if (pf->hw.func_caps.npar_enable) | |
4209 | goto out; | |
4210 | ||
4211 | /* Get the initial DCB configuration */ | |
4212 | err = i40e_init_dcb(hw); | |
4213 | if (!err) { | |
4214 | /* Device/Function is not DCBX capable */ | |
4215 | if ((!hw->func_caps.dcb) || | |
4216 | (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) { | |
4217 | dev_info(&pf->pdev->dev, | |
4218 | "DCBX offload is not supported or is disabled for this PF.\n"); | |
4219 | ||
4220 | if (pf->flags & I40E_FLAG_MFP_ENABLED) | |
4221 | goto out; | |
4222 | ||
4223 | } else { | |
4224 | /* When status is not DISABLED then DCBX in FW */ | |
4225 | pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | | |
4226 | DCB_CAP_DCBX_VER_IEEE; | |
4d9b6043 NP |
4227 | |
4228 | pf->flags |= I40E_FLAG_DCB_CAPABLE; | |
4229 | /* Enable DCB tagging only when more than one TC */ | |
4230 | if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1) | |
4231 | pf->flags |= I40E_FLAG_DCB_ENABLED; | |
4e3b35b0 | 4232 | } |
014269ff NP |
4233 | } else { |
4234 | dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n", | |
4235 | pf->hw.aq.asq_last_status); | |
4e3b35b0 NP |
4236 | } |
4237 | ||
4238 | out: | |
4239 | return err; | |
4240 | } | |
4241 | #endif /* CONFIG_I40E_DCB */ | |
cf05ed08 JB |
4242 | #define SPEED_SIZE 14 |
4243 | #define FC_SIZE 8 | |
4244 | /** | |
4245 | * i40e_print_link_message - print link up or down | |
4246 | * @vsi: the VSI for which link needs a message | |
4247 | */ | |
4248 | static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) | |
4249 | { | |
4250 | char speed[SPEED_SIZE] = "Unknown"; | |
4251 | char fc[FC_SIZE] = "RX/TX"; | |
4252 | ||
4253 | if (!isup) { | |
4254 | netdev_info(vsi->netdev, "NIC Link is Down\n"); | |
4255 | return; | |
4256 | } | |
4257 | ||
4258 | switch (vsi->back->hw.phy.link_info.link_speed) { | |
4259 | case I40E_LINK_SPEED_40GB: | |
4260 | strncpy(speed, "40 Gbps", SPEED_SIZE); | |
4261 | break; | |
4262 | case I40E_LINK_SPEED_10GB: | |
4263 | strncpy(speed, "10 Gbps", SPEED_SIZE); | |
4264 | break; | |
4265 | case I40E_LINK_SPEED_1GB: | |
4266 | strncpy(speed, "1000 Mbps", SPEED_SIZE); | |
4267 | break; | |
4268 | default: | |
4269 | break; | |
4270 | } | |
4271 | ||
4272 | switch (vsi->back->hw.fc.current_mode) { | |
4273 | case I40E_FC_FULL: | |
4274 | strncpy(fc, "RX/TX", FC_SIZE); | |
4275 | break; | |
4276 | case I40E_FC_TX_PAUSE: | |
4277 | strncpy(fc, "TX", FC_SIZE); | |
4278 | break; | |
4279 | case I40E_FC_RX_PAUSE: | |
4280 | strncpy(fc, "RX", FC_SIZE); | |
4281 | break; | |
4282 | default: | |
4283 | strncpy(fc, "None", FC_SIZE); | |
4284 | break; | |
4285 | } | |
4286 | ||
4287 | netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n", | |
4288 | speed, fc); | |
4289 | } | |
4e3b35b0 | 4290 | |
41c445ff JB |
4291 | /** |
4292 | * i40e_up_complete - Finish the last steps of bringing up a connection | |
4293 | * @vsi: the VSI being configured | |
4294 | **/ | |
4295 | static int i40e_up_complete(struct i40e_vsi *vsi) | |
4296 | { | |
4297 | struct i40e_pf *pf = vsi->back; | |
4298 | int err; | |
4299 | ||
4300 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
4301 | i40e_vsi_configure_msix(vsi); | |
4302 | else | |
4303 | i40e_configure_msi_and_legacy(vsi); | |
4304 | ||
4305 | /* start rings */ | |
4306 | err = i40e_vsi_control_rings(vsi, true); | |
4307 | if (err) | |
4308 | return err; | |
4309 | ||
4310 | clear_bit(__I40E_DOWN, &vsi->state); | |
4311 | i40e_napi_enable_all(vsi); | |
4312 | i40e_vsi_enable_irq(vsi); | |
4313 | ||
4314 | if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) && | |
4315 | (vsi->netdev)) { | |
cf05ed08 | 4316 | i40e_print_link_message(vsi, true); |
41c445ff JB |
4317 | netif_tx_start_all_queues(vsi->netdev); |
4318 | netif_carrier_on(vsi->netdev); | |
6d779b41 | 4319 | } else if (vsi->netdev) { |
cf05ed08 | 4320 | i40e_print_link_message(vsi, false); |
41c445ff | 4321 | } |
ca64fa4e ASJ |
4322 | |
4323 | /* replay FDIR SB filters */ | |
4324 | if (vsi->type == I40E_VSI_FDIR) | |
4325 | i40e_fdir_filter_restore(vsi); | |
41c445ff JB |
4326 | i40e_service_event_schedule(pf); |
4327 | ||
4328 | return 0; | |
4329 | } | |
4330 | ||
4331 | /** | |
4332 | * i40e_vsi_reinit_locked - Reset the VSI | |
4333 | * @vsi: the VSI being configured | |
4334 | * | |
4335 | * Rebuild the ring structs after some configuration | |
4336 | * has changed, e.g. MTU size. | |
4337 | **/ | |
4338 | static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi) | |
4339 | { | |
4340 | struct i40e_pf *pf = vsi->back; | |
4341 | ||
4342 | WARN_ON(in_interrupt()); | |
4343 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
4344 | usleep_range(1000, 2000); | |
4345 | i40e_down(vsi); | |
4346 | ||
4347 | /* Give a VF some time to respond to the reset. The | |
4348 | * two second wait is based upon the watchdog cycle in | |
4349 | * the VF driver. | |
4350 | */ | |
4351 | if (vsi->type == I40E_VSI_SRIOV) | |
4352 | msleep(2000); | |
4353 | i40e_up(vsi); | |
4354 | clear_bit(__I40E_CONFIG_BUSY, &pf->state); | |
4355 | } | |
4356 | ||
4357 | /** | |
4358 | * i40e_up - Bring the connection back up after being down | |
4359 | * @vsi: the VSI being configured | |
4360 | **/ | |
4361 | int i40e_up(struct i40e_vsi *vsi) | |
4362 | { | |
4363 | int err; | |
4364 | ||
4365 | err = i40e_vsi_configure(vsi); | |
4366 | if (!err) | |
4367 | err = i40e_up_complete(vsi); | |
4368 | ||
4369 | return err; | |
4370 | } | |
4371 | ||
4372 | /** | |
4373 | * i40e_down - Shutdown the connection processing | |
4374 | * @vsi: the VSI being stopped | |
4375 | **/ | |
4376 | void i40e_down(struct i40e_vsi *vsi) | |
4377 | { | |
4378 | int i; | |
4379 | ||
4380 | /* It is assumed that the caller of this function | |
4381 | * sets the vsi->state __I40E_DOWN bit. | |
4382 | */ | |
4383 | if (vsi->netdev) { | |
4384 | netif_carrier_off(vsi->netdev); | |
4385 | netif_tx_disable(vsi->netdev); | |
4386 | } | |
4387 | i40e_vsi_disable_irq(vsi); | |
4388 | i40e_vsi_control_rings(vsi, false); | |
4389 | i40e_napi_disable_all(vsi); | |
4390 | ||
4391 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
4392 | i40e_clean_tx_ring(vsi->tx_rings[i]); |
4393 | i40e_clean_rx_ring(vsi->rx_rings[i]); | |
41c445ff JB |
4394 | } |
4395 | } | |
4396 | ||
4397 | /** | |
4398 | * i40e_setup_tc - configure multiple traffic classes | |
4399 | * @netdev: net device to configure | |
4400 | * @tc: number of traffic classes to enable | |
4401 | **/ | |
4402 | static int i40e_setup_tc(struct net_device *netdev, u8 tc) | |
4403 | { | |
4404 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
4405 | struct i40e_vsi *vsi = np->vsi; | |
4406 | struct i40e_pf *pf = vsi->back; | |
4407 | u8 enabled_tc = 0; | |
4408 | int ret = -EINVAL; | |
4409 | int i; | |
4410 | ||
4411 | /* Check if DCB enabled to continue */ | |
4412 | if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) { | |
4413 | netdev_info(netdev, "DCB is not enabled for adapter\n"); | |
4414 | goto exit; | |
4415 | } | |
4416 | ||
4417 | /* Check if MFP enabled */ | |
4418 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
4419 | netdev_info(netdev, "Configuring TC not supported in MFP mode\n"); | |
4420 | goto exit; | |
4421 | } | |
4422 | ||
4423 | /* Check whether tc count is within enabled limit */ | |
4424 | if (tc > i40e_pf_get_num_tc(pf)) { | |
4425 | netdev_info(netdev, "TC count greater than enabled on link for adapter\n"); | |
4426 | goto exit; | |
4427 | } | |
4428 | ||
4429 | /* Generate TC map for number of tc requested */ | |
4430 | for (i = 0; i < tc; i++) | |
4431 | enabled_tc |= (1 << i); | |
4432 | ||
4433 | /* Requesting same TC configuration as already enabled */ | |
4434 | if (enabled_tc == vsi->tc_config.enabled_tc) | |
4435 | return 0; | |
4436 | ||
4437 | /* Quiesce VSI queues */ | |
4438 | i40e_quiesce_vsi(vsi); | |
4439 | ||
4440 | /* Configure VSI for enabled TCs */ | |
4441 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
4442 | if (ret) { | |
4443 | netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n", | |
4444 | vsi->seid); | |
4445 | goto exit; | |
4446 | } | |
4447 | ||
4448 | /* Unquiesce VSI */ | |
4449 | i40e_unquiesce_vsi(vsi); | |
4450 | ||
4451 | exit: | |
4452 | return ret; | |
4453 | } | |
4454 | ||
4455 | /** | |
4456 | * i40e_open - Called when a network interface is made active | |
4457 | * @netdev: network interface device structure | |
4458 | * | |
4459 | * The open entry point is called when a network interface is made | |
4460 | * active by the system (IFF_UP). At this point all resources needed | |
4461 | * for transmit and receive operations are allocated, the interrupt | |
4462 | * handler is registered with the OS, the netdev watchdog subtask is | |
4463 | * enabled, and the stack is notified that the interface is ready. | |
4464 | * | |
4465 | * Returns 0 on success, negative value on failure | |
4466 | **/ | |
4467 | static int i40e_open(struct net_device *netdev) | |
4468 | { | |
4469 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
4470 | struct i40e_vsi *vsi = np->vsi; | |
4471 | struct i40e_pf *pf = vsi->back; | |
41c445ff JB |
4472 | int err; |
4473 | ||
4eb3f768 SN |
4474 | /* disallow open during test or if eeprom is broken */ |
4475 | if (test_bit(__I40E_TESTING, &pf->state) || | |
4476 | test_bit(__I40E_BAD_EEPROM, &pf->state)) | |
41c445ff JB |
4477 | return -EBUSY; |
4478 | ||
4479 | netif_carrier_off(netdev); | |
4480 | ||
6c167f58 EK |
4481 | err = i40e_vsi_open(vsi); |
4482 | if (err) | |
4483 | return err; | |
4484 | ||
059dab69 JB |
4485 | /* configure global TSO hardware offload settings */ |
4486 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH | | |
4487 | TCP_FLAG_FIN) >> 16); | |
4488 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH | | |
4489 | TCP_FLAG_FIN | | |
4490 | TCP_FLAG_CWR) >> 16); | |
4491 | wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16); | |
4492 | ||
6c167f58 EK |
4493 | #ifdef CONFIG_I40E_VXLAN |
4494 | vxlan_get_rx_port(netdev); | |
4495 | #endif | |
4496 | ||
4497 | return 0; | |
4498 | } | |
4499 | ||
4500 | /** | |
4501 | * i40e_vsi_open - | |
4502 | * @vsi: the VSI to open | |
4503 | * | |
4504 | * Finish initialization of the VSI. | |
4505 | * | |
4506 | * Returns 0 on success, negative value on failure | |
4507 | **/ | |
4508 | int i40e_vsi_open(struct i40e_vsi *vsi) | |
4509 | { | |
4510 | struct i40e_pf *pf = vsi->back; | |
4511 | char int_name[IFNAMSIZ]; | |
4512 | int err; | |
4513 | ||
41c445ff JB |
4514 | /* allocate descriptors */ |
4515 | err = i40e_vsi_setup_tx_resources(vsi); | |
4516 | if (err) | |
4517 | goto err_setup_tx; | |
4518 | err = i40e_vsi_setup_rx_resources(vsi); | |
4519 | if (err) | |
4520 | goto err_setup_rx; | |
4521 | ||
4522 | err = i40e_vsi_configure(vsi); | |
4523 | if (err) | |
4524 | goto err_setup_rx; | |
4525 | ||
c22e3c6c SN |
4526 | if (vsi->netdev) { |
4527 | snprintf(int_name, sizeof(int_name) - 1, "%s-%s", | |
4528 | dev_driver_string(&pf->pdev->dev), vsi->netdev->name); | |
4529 | err = i40e_vsi_request_irq(vsi, int_name); | |
4530 | if (err) | |
4531 | goto err_setup_rx; | |
41c445ff | 4532 | |
c22e3c6c SN |
4533 | /* Notify the stack of the actual queue counts. */ |
4534 | err = netif_set_real_num_tx_queues(vsi->netdev, | |
4535 | vsi->num_queue_pairs); | |
4536 | if (err) | |
4537 | goto err_set_queues; | |
25946ddb | 4538 | |
c22e3c6c SN |
4539 | err = netif_set_real_num_rx_queues(vsi->netdev, |
4540 | vsi->num_queue_pairs); | |
4541 | if (err) | |
4542 | goto err_set_queues; | |
8a9eb7d3 SN |
4543 | |
4544 | } else if (vsi->type == I40E_VSI_FDIR) { | |
4545 | snprintf(int_name, sizeof(int_name) - 1, "%s-fdir", | |
4546 | dev_driver_string(&pf->pdev->dev)); | |
4547 | err = i40e_vsi_request_irq(vsi, int_name); | |
c22e3c6c | 4548 | } else { |
ce9ccb17 | 4549 | err = -EINVAL; |
6c167f58 EK |
4550 | goto err_setup_rx; |
4551 | } | |
25946ddb | 4552 | |
41c445ff JB |
4553 | err = i40e_up_complete(vsi); |
4554 | if (err) | |
4555 | goto err_up_complete; | |
4556 | ||
41c445ff JB |
4557 | return 0; |
4558 | ||
4559 | err_up_complete: | |
4560 | i40e_down(vsi); | |
25946ddb | 4561 | err_set_queues: |
41c445ff JB |
4562 | i40e_vsi_free_irq(vsi); |
4563 | err_setup_rx: | |
4564 | i40e_vsi_free_rx_resources(vsi); | |
4565 | err_setup_tx: | |
4566 | i40e_vsi_free_tx_resources(vsi); | |
4567 | if (vsi == pf->vsi[pf->lan_vsi]) | |
4568 | i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); | |
4569 | ||
4570 | return err; | |
4571 | } | |
4572 | ||
17a73f6b JG |
4573 | /** |
4574 | * i40e_fdir_filter_exit - Cleans up the Flow Director accounting | |
4575 | * @pf: Pointer to pf | |
4576 | * | |
4577 | * This function destroys the hlist where all the Flow Director | |
4578 | * filters were saved. | |
4579 | **/ | |
4580 | static void i40e_fdir_filter_exit(struct i40e_pf *pf) | |
4581 | { | |
4582 | struct i40e_fdir_filter *filter; | |
4583 | struct hlist_node *node2; | |
4584 | ||
4585 | hlist_for_each_entry_safe(filter, node2, | |
4586 | &pf->fdir_filter_list, fdir_node) { | |
4587 | hlist_del(&filter->fdir_node); | |
4588 | kfree(filter); | |
4589 | } | |
4590 | pf->fdir_pf_active_filters = 0; | |
4591 | } | |
4592 | ||
41c445ff JB |
4593 | /** |
4594 | * i40e_close - Disables a network interface | |
4595 | * @netdev: network interface device structure | |
4596 | * | |
4597 | * The close entry point is called when an interface is de-activated | |
4598 | * by the OS. The hardware is still under the driver's control, but | |
4599 | * this netdev interface is disabled. | |
4600 | * | |
4601 | * Returns 0, this is not allowed to fail | |
4602 | **/ | |
4603 | static int i40e_close(struct net_device *netdev) | |
4604 | { | |
4605 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
4606 | struct i40e_vsi *vsi = np->vsi; | |
4607 | ||
90ef8d47 | 4608 | i40e_vsi_close(vsi); |
41c445ff JB |
4609 | |
4610 | return 0; | |
4611 | } | |
4612 | ||
4613 | /** | |
4614 | * i40e_do_reset - Start a PF or Core Reset sequence | |
4615 | * @pf: board private structure | |
4616 | * @reset_flags: which reset is requested | |
4617 | * | |
4618 | * The essential difference in resets is that the PF Reset | |
4619 | * doesn't clear the packet buffers, doesn't reset the PE | |
4620 | * firmware, and doesn't bother the other PFs on the chip. | |
4621 | **/ | |
4622 | void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags) | |
4623 | { | |
4624 | u32 val; | |
4625 | ||
4626 | WARN_ON(in_interrupt()); | |
4627 | ||
263fc48f MW |
4628 | if (i40e_check_asq_alive(&pf->hw)) |
4629 | i40e_vc_notify_reset(pf); | |
4630 | ||
41c445ff JB |
4631 | /* do the biggest reset indicated */ |
4632 | if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) { | |
4633 | ||
4634 | /* Request a Global Reset | |
4635 | * | |
4636 | * This will start the chip's countdown to the actual full | |
4637 | * chip reset event, and a warning interrupt to be sent | |
4638 | * to all PFs, including the requestor. Our handler | |
4639 | * for the warning interrupt will deal with the shutdown | |
4640 | * and recovery of the switch setup. | |
4641 | */ | |
69bfb110 | 4642 | dev_dbg(&pf->pdev->dev, "GlobalR requested\n"); |
41c445ff JB |
4643 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); |
4644 | val |= I40E_GLGEN_RTRIG_GLOBR_MASK; | |
4645 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4646 | ||
4647 | } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) { | |
4648 | ||
4649 | /* Request a Core Reset | |
4650 | * | |
4651 | * Same as Global Reset, except does *not* include the MAC/PHY | |
4652 | */ | |
69bfb110 | 4653 | dev_dbg(&pf->pdev->dev, "CoreR requested\n"); |
41c445ff JB |
4654 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); |
4655 | val |= I40E_GLGEN_RTRIG_CORER_MASK; | |
4656 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4657 | i40e_flush(&pf->hw); | |
4658 | ||
7823fe34 SN |
4659 | } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) { |
4660 | ||
4661 | /* Request a Firmware Reset | |
4662 | * | |
4663 | * Same as Global reset, plus restarting the | |
4664 | * embedded firmware engine. | |
4665 | */ | |
4666 | /* enable EMP Reset */ | |
4667 | val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP); | |
4668 | val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK; | |
4669 | wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val); | |
4670 | ||
4671 | /* force the reset */ | |
4672 | val = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
4673 | val |= I40E_GLGEN_RTRIG_EMPFWR_MASK; | |
4674 | wr32(&pf->hw, I40E_GLGEN_RTRIG, val); | |
4675 | i40e_flush(&pf->hw); | |
4676 | ||
41c445ff JB |
4677 | } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) { |
4678 | ||
4679 | /* Request a PF Reset | |
4680 | * | |
4681 | * Resets only the PF-specific registers | |
4682 | * | |
4683 | * This goes directly to the tear-down and rebuild of | |
4684 | * the switch, since we need to do all the recovery as | |
4685 | * for the Core Reset. | |
4686 | */ | |
69bfb110 | 4687 | dev_dbg(&pf->pdev->dev, "PFR requested\n"); |
41c445ff JB |
4688 | i40e_handle_reset_warning(pf); |
4689 | ||
4690 | } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) { | |
4691 | int v; | |
4692 | ||
4693 | /* Find the VSI(s) that requested a re-init */ | |
4694 | dev_info(&pf->pdev->dev, | |
4695 | "VSI reinit requested\n"); | |
505682cd | 4696 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
4697 | struct i40e_vsi *vsi = pf->vsi[v]; |
4698 | if (vsi != NULL && | |
4699 | test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) { | |
4700 | i40e_vsi_reinit_locked(pf->vsi[v]); | |
4701 | clear_bit(__I40E_REINIT_REQUESTED, &vsi->state); | |
4702 | } | |
4703 | } | |
4704 | ||
b5d06f05 NP |
4705 | /* no further action needed, so return now */ |
4706 | return; | |
4707 | } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) { | |
4708 | int v; | |
4709 | ||
4710 | /* Find the VSI(s) that needs to be brought down */ | |
4711 | dev_info(&pf->pdev->dev, "VSI down requested\n"); | |
4712 | for (v = 0; v < pf->num_alloc_vsi; v++) { | |
4713 | struct i40e_vsi *vsi = pf->vsi[v]; | |
4714 | if (vsi != NULL && | |
4715 | test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) { | |
4716 | set_bit(__I40E_DOWN, &vsi->state); | |
4717 | i40e_down(vsi); | |
4718 | clear_bit(__I40E_DOWN_REQUESTED, &vsi->state); | |
4719 | } | |
4720 | } | |
4721 | ||
41c445ff JB |
4722 | /* no further action needed, so return now */ |
4723 | return; | |
4724 | } else { | |
4725 | dev_info(&pf->pdev->dev, | |
4726 | "bad reset request 0x%08x\n", reset_flags); | |
4727 | return; | |
4728 | } | |
4729 | } | |
4730 | ||
4e3b35b0 NP |
4731 | #ifdef CONFIG_I40E_DCB |
4732 | /** | |
4733 | * i40e_dcb_need_reconfig - Check if DCB needs reconfig | |
4734 | * @pf: board private structure | |
4735 | * @old_cfg: current DCB config | |
4736 | * @new_cfg: new DCB config | |
4737 | **/ | |
4738 | bool i40e_dcb_need_reconfig(struct i40e_pf *pf, | |
4739 | struct i40e_dcbx_config *old_cfg, | |
4740 | struct i40e_dcbx_config *new_cfg) | |
4741 | { | |
4742 | bool need_reconfig = false; | |
4743 | ||
4744 | /* Check if ETS configuration has changed */ | |
4745 | if (memcmp(&new_cfg->etscfg, | |
4746 | &old_cfg->etscfg, | |
4747 | sizeof(new_cfg->etscfg))) { | |
4748 | /* If Priority Table has changed reconfig is needed */ | |
4749 | if (memcmp(&new_cfg->etscfg.prioritytable, | |
4750 | &old_cfg->etscfg.prioritytable, | |
4751 | sizeof(new_cfg->etscfg.prioritytable))) { | |
4752 | need_reconfig = true; | |
69bfb110 | 4753 | dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n"); |
4e3b35b0 NP |
4754 | } |
4755 | ||
4756 | if (memcmp(&new_cfg->etscfg.tcbwtable, | |
4757 | &old_cfg->etscfg.tcbwtable, | |
4758 | sizeof(new_cfg->etscfg.tcbwtable))) | |
69bfb110 | 4759 | dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n"); |
4e3b35b0 NP |
4760 | |
4761 | if (memcmp(&new_cfg->etscfg.tsatable, | |
4762 | &old_cfg->etscfg.tsatable, | |
4763 | sizeof(new_cfg->etscfg.tsatable))) | |
69bfb110 | 4764 | dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n"); |
4e3b35b0 NP |
4765 | } |
4766 | ||
4767 | /* Check if PFC configuration has changed */ | |
4768 | if (memcmp(&new_cfg->pfc, | |
4769 | &old_cfg->pfc, | |
4770 | sizeof(new_cfg->pfc))) { | |
4771 | need_reconfig = true; | |
69bfb110 | 4772 | dev_dbg(&pf->pdev->dev, "PFC config change detected.\n"); |
4e3b35b0 NP |
4773 | } |
4774 | ||
4775 | /* Check if APP Table has changed */ | |
4776 | if (memcmp(&new_cfg->app, | |
4777 | &old_cfg->app, | |
3d9667a9 | 4778 | sizeof(new_cfg->app))) { |
4e3b35b0 | 4779 | need_reconfig = true; |
69bfb110 | 4780 | dev_dbg(&pf->pdev->dev, "APP Table change detected.\n"); |
3d9667a9 | 4781 | } |
4e3b35b0 NP |
4782 | |
4783 | return need_reconfig; | |
4784 | } | |
4785 | ||
4786 | /** | |
4787 | * i40e_handle_lldp_event - Handle LLDP Change MIB event | |
4788 | * @pf: board private structure | |
4789 | * @e: event info posted on ARQ | |
4790 | **/ | |
4791 | static int i40e_handle_lldp_event(struct i40e_pf *pf, | |
4792 | struct i40e_arq_event_info *e) | |
4793 | { | |
4794 | struct i40e_aqc_lldp_get_mib *mib = | |
4795 | (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw; | |
4796 | struct i40e_hw *hw = &pf->hw; | |
4797 | struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; | |
4798 | struct i40e_dcbx_config tmp_dcbx_cfg; | |
4799 | bool need_reconfig = false; | |
4800 | int ret = 0; | |
4801 | u8 type; | |
4802 | ||
4d9b6043 NP |
4803 | /* Not DCB capable or capability disabled */ |
4804 | if (!(pf->flags & I40E_FLAG_DCB_CAPABLE)) | |
4805 | return ret; | |
4806 | ||
4e3b35b0 NP |
4807 | /* Ignore if event is not for Nearest Bridge */ |
4808 | type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) | |
4809 | & I40E_AQ_LLDP_BRIDGE_TYPE_MASK); | |
4810 | if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE) | |
4811 | return ret; | |
4812 | ||
4813 | /* Check MIB Type and return if event for Remote MIB update */ | |
4814 | type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK; | |
4815 | if (type == I40E_AQ_LLDP_MIB_REMOTE) { | |
4816 | /* Update the remote cached instance and return */ | |
4817 | ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE, | |
4818 | I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE, | |
4819 | &hw->remote_dcbx_config); | |
4820 | goto exit; | |
4821 | } | |
4822 | ||
4823 | /* Convert/store the DCBX data from LLDPDU temporarily */ | |
4824 | memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg)); | |
4825 | ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg); | |
4826 | if (ret) { | |
4827 | /* Error in LLDPDU parsing return */ | |
4828 | dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n"); | |
4829 | goto exit; | |
4830 | } | |
4831 | ||
4832 | /* No change detected in DCBX configs */ | |
4833 | if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) { | |
69bfb110 | 4834 | dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n"); |
4e3b35b0 NP |
4835 | goto exit; |
4836 | } | |
4837 | ||
4838 | need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg); | |
4839 | ||
4840 | i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg); | |
4841 | ||
4842 | /* Overwrite the new configuration */ | |
4843 | *dcbx_cfg = tmp_dcbx_cfg; | |
4844 | ||
4845 | if (!need_reconfig) | |
4846 | goto exit; | |
4847 | ||
4d9b6043 NP |
4848 | /* Enable DCB tagging only when more than one TC */ |
4849 | if (i40e_dcb_get_num_tc(dcbx_cfg) > 1) | |
4850 | pf->flags |= I40E_FLAG_DCB_ENABLED; | |
4851 | else | |
4852 | pf->flags &= ~I40E_FLAG_DCB_ENABLED; | |
4853 | ||
4e3b35b0 NP |
4854 | /* Reconfiguration needed quiesce all VSIs */ |
4855 | i40e_pf_quiesce_all_vsi(pf); | |
4856 | ||
4857 | /* Changes in configuration update VEB/VSI */ | |
4858 | i40e_dcb_reconfigure(pf); | |
4859 | ||
4860 | i40e_pf_unquiesce_all_vsi(pf); | |
4861 | exit: | |
4862 | return ret; | |
4863 | } | |
4864 | #endif /* CONFIG_I40E_DCB */ | |
4865 | ||
23326186 ASJ |
4866 | /** |
4867 | * i40e_do_reset_safe - Protected reset path for userland calls. | |
4868 | * @pf: board private structure | |
4869 | * @reset_flags: which reset is requested | |
4870 | * | |
4871 | **/ | |
4872 | void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags) | |
4873 | { | |
4874 | rtnl_lock(); | |
4875 | i40e_do_reset(pf, reset_flags); | |
4876 | rtnl_unlock(); | |
4877 | } | |
4878 | ||
41c445ff JB |
4879 | /** |
4880 | * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event | |
4881 | * @pf: board private structure | |
4882 | * @e: event info posted on ARQ | |
4883 | * | |
4884 | * Handler for LAN Queue Overflow Event generated by the firmware for PF | |
4885 | * and VF queues | |
4886 | **/ | |
4887 | static void i40e_handle_lan_overflow_event(struct i40e_pf *pf, | |
4888 | struct i40e_arq_event_info *e) | |
4889 | { | |
4890 | struct i40e_aqc_lan_overflow *data = | |
4891 | (struct i40e_aqc_lan_overflow *)&e->desc.params.raw; | |
4892 | u32 queue = le32_to_cpu(data->prtdcb_rupto); | |
4893 | u32 qtx_ctl = le32_to_cpu(data->otx_ctl); | |
4894 | struct i40e_hw *hw = &pf->hw; | |
4895 | struct i40e_vf *vf; | |
4896 | u16 vf_id; | |
4897 | ||
69bfb110 JB |
4898 | dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n", |
4899 | queue, qtx_ctl); | |
41c445ff JB |
4900 | |
4901 | /* Queue belongs to VF, find the VF and issue VF reset */ | |
4902 | if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK) | |
4903 | >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) { | |
4904 | vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK) | |
4905 | >> I40E_QTX_CTL_VFVM_INDX_SHIFT); | |
4906 | vf_id -= hw->func_caps.vf_base_id; | |
4907 | vf = &pf->vf[vf_id]; | |
4908 | i40e_vc_notify_vf_reset(vf); | |
4909 | /* Allow VF to process pending reset notification */ | |
4910 | msleep(20); | |
4911 | i40e_reset_vf(vf, false); | |
4912 | } | |
4913 | } | |
4914 | ||
4915 | /** | |
4916 | * i40e_service_event_complete - Finish up the service event | |
4917 | * @pf: board private structure | |
4918 | **/ | |
4919 | static void i40e_service_event_complete(struct i40e_pf *pf) | |
4920 | { | |
4921 | BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state)); | |
4922 | ||
4923 | /* flush memory to make sure state is correct before next watchog */ | |
4e857c58 | 4924 | smp_mb__before_atomic(); |
41c445ff JB |
4925 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); |
4926 | } | |
4927 | ||
55a5e60b ASJ |
4928 | /** |
4929 | * i40e_get_current_fd_count - Get the count of FD filters programmed in the HW | |
4930 | * @pf: board private structure | |
4931 | **/ | |
4932 | int i40e_get_current_fd_count(struct i40e_pf *pf) | |
4933 | { | |
4934 | int val, fcnt_prog; | |
4935 | val = rd32(&pf->hw, I40E_PFQF_FDSTAT); | |
4936 | fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) + | |
4937 | ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >> | |
4938 | I40E_PFQF_FDSTAT_BEST_CNT_SHIFT); | |
4939 | return fcnt_prog; | |
4940 | } | |
4941 | ||
4942 | /** | |
4943 | * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled | |
4944 | * @pf: board private structure | |
4945 | **/ | |
4946 | void i40e_fdir_check_and_reenable(struct i40e_pf *pf) | |
4947 | { | |
4948 | u32 fcnt_prog, fcnt_avail; | |
4949 | ||
4950 | /* Check if, FD SB or ATR was auto disabled and if there is enough room | |
4951 | * to re-enable | |
4952 | */ | |
4953 | if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && | |
4954 | (pf->flags & I40E_FLAG_FD_SB_ENABLED)) | |
4955 | return; | |
4956 | fcnt_prog = i40e_get_current_fd_count(pf); | |
89132783 | 4957 | fcnt_avail = i40e_get_fd_cnt_all(pf); |
55a5e60b ASJ |
4958 | if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) { |
4959 | if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) && | |
4960 | (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) { | |
4961 | pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
4962 | dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n"); | |
4963 | } | |
4964 | } | |
4965 | /* Wait for some more space to be available to turn on ATR */ | |
4966 | if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) { | |
4967 | if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && | |
4968 | (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) { | |
4969 | pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED; | |
4970 | dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n"); | |
4971 | } | |
4972 | } | |
4973 | } | |
4974 | ||
41c445ff JB |
4975 | /** |
4976 | * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table | |
4977 | * @pf: board private structure | |
4978 | **/ | |
4979 | static void i40e_fdir_reinit_subtask(struct i40e_pf *pf) | |
4980 | { | |
4981 | if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT)) | |
4982 | return; | |
4983 | ||
41c445ff JB |
4984 | /* if interface is down do nothing */ |
4985 | if (test_bit(__I40E_DOWN, &pf->state)) | |
4986 | return; | |
55a5e60b ASJ |
4987 | i40e_fdir_check_and_reenable(pf); |
4988 | ||
4989 | if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) && | |
4990 | (pf->flags & I40E_FLAG_FD_SB_ENABLED)) | |
4991 | pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT; | |
41c445ff JB |
4992 | } |
4993 | ||
4994 | /** | |
4995 | * i40e_vsi_link_event - notify VSI of a link event | |
4996 | * @vsi: vsi to be notified | |
4997 | * @link_up: link up or down | |
4998 | **/ | |
4999 | static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up) | |
5000 | { | |
5001 | if (!vsi) | |
5002 | return; | |
5003 | ||
5004 | switch (vsi->type) { | |
5005 | case I40E_VSI_MAIN: | |
5006 | if (!vsi->netdev || !vsi->netdev_registered) | |
5007 | break; | |
5008 | ||
5009 | if (link_up) { | |
5010 | netif_carrier_on(vsi->netdev); | |
5011 | netif_tx_wake_all_queues(vsi->netdev); | |
5012 | } else { | |
5013 | netif_carrier_off(vsi->netdev); | |
5014 | netif_tx_stop_all_queues(vsi->netdev); | |
5015 | } | |
5016 | break; | |
5017 | ||
5018 | case I40E_VSI_SRIOV: | |
5019 | break; | |
5020 | ||
5021 | case I40E_VSI_VMDQ2: | |
5022 | case I40E_VSI_CTRL: | |
5023 | case I40E_VSI_MIRROR: | |
5024 | default: | |
5025 | /* there is no notification for other VSIs */ | |
5026 | break; | |
5027 | } | |
5028 | } | |
5029 | ||
5030 | /** | |
5031 | * i40e_veb_link_event - notify elements on the veb of a link event | |
5032 | * @veb: veb to be notified | |
5033 | * @link_up: link up or down | |
5034 | **/ | |
5035 | static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up) | |
5036 | { | |
5037 | struct i40e_pf *pf; | |
5038 | int i; | |
5039 | ||
5040 | if (!veb || !veb->pf) | |
5041 | return; | |
5042 | pf = veb->pf; | |
5043 | ||
5044 | /* depth first... */ | |
5045 | for (i = 0; i < I40E_MAX_VEB; i++) | |
5046 | if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid)) | |
5047 | i40e_veb_link_event(pf->veb[i], link_up); | |
5048 | ||
5049 | /* ... now the local VSIs */ | |
505682cd | 5050 | for (i = 0; i < pf->num_alloc_vsi; i++) |
41c445ff JB |
5051 | if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid)) |
5052 | i40e_vsi_link_event(pf->vsi[i], link_up); | |
5053 | } | |
5054 | ||
5055 | /** | |
5056 | * i40e_link_event - Update netif_carrier status | |
5057 | * @pf: board private structure | |
5058 | **/ | |
5059 | static void i40e_link_event(struct i40e_pf *pf) | |
5060 | { | |
5061 | bool new_link, old_link; | |
5062 | ||
5063 | new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP); | |
5064 | old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP); | |
5065 | ||
5066 | if (new_link == old_link) | |
5067 | return; | |
6d779b41 | 5068 | if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state)) |
cf05ed08 | 5069 | i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link); |
41c445ff JB |
5070 | |
5071 | /* Notify the base of the switch tree connected to | |
5072 | * the link. Floating VEBs are not notified. | |
5073 | */ | |
5074 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
5075 | i40e_veb_link_event(pf->veb[pf->lan_veb], new_link); | |
5076 | else | |
5077 | i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link); | |
5078 | ||
5079 | if (pf->vf) | |
5080 | i40e_vc_notify_link_state(pf); | |
beb0dff1 JK |
5081 | |
5082 | if (pf->flags & I40E_FLAG_PTP) | |
5083 | i40e_ptp_set_increment(pf); | |
41c445ff JB |
5084 | } |
5085 | ||
5086 | /** | |
5087 | * i40e_check_hang_subtask - Check for hung queues and dropped interrupts | |
5088 | * @pf: board private structure | |
5089 | * | |
5090 | * Set the per-queue flags to request a check for stuck queues in the irq | |
5091 | * clean functions, then force interrupts to be sure the irq clean is called. | |
5092 | **/ | |
5093 | static void i40e_check_hang_subtask(struct i40e_pf *pf) | |
5094 | { | |
5095 | int i, v; | |
5096 | ||
5097 | /* If we're down or resetting, just bail */ | |
5098 | if (test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
5099 | return; | |
5100 | ||
5101 | /* for each VSI/netdev | |
5102 | * for each Tx queue | |
5103 | * set the check flag | |
5104 | * for each q_vector | |
5105 | * force an interrupt | |
5106 | */ | |
505682cd | 5107 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
5108 | struct i40e_vsi *vsi = pf->vsi[v]; |
5109 | int armed = 0; | |
5110 | ||
5111 | if (!pf->vsi[v] || | |
5112 | test_bit(__I40E_DOWN, &vsi->state) || | |
5113 | (vsi->netdev && !netif_carrier_ok(vsi->netdev))) | |
5114 | continue; | |
5115 | ||
5116 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 5117 | set_check_for_tx_hang(vsi->tx_rings[i]); |
41c445ff | 5118 | if (test_bit(__I40E_HANG_CHECK_ARMED, |
9f65e15b | 5119 | &vsi->tx_rings[i]->state)) |
41c445ff JB |
5120 | armed++; |
5121 | } | |
5122 | ||
5123 | if (armed) { | |
5124 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) { | |
5125 | wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0, | |
5126 | (I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
5127 | I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK)); | |
5128 | } else { | |
5129 | u16 vec = vsi->base_vector - 1; | |
5130 | u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK | | |
5131 | I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK); | |
5132 | for (i = 0; i < vsi->num_q_vectors; i++, vec++) | |
5133 | wr32(&vsi->back->hw, | |
5134 | I40E_PFINT_DYN_CTLN(vec), val); | |
5135 | } | |
5136 | i40e_flush(&vsi->back->hw); | |
5137 | } | |
5138 | } | |
5139 | } | |
5140 | ||
5141 | /** | |
5142 | * i40e_watchdog_subtask - Check and bring link up | |
5143 | * @pf: board private structure | |
5144 | **/ | |
5145 | static void i40e_watchdog_subtask(struct i40e_pf *pf) | |
5146 | { | |
5147 | int i; | |
5148 | ||
5149 | /* if interface is down do nothing */ | |
5150 | if (test_bit(__I40E_DOWN, &pf->state) || | |
5151 | test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
5152 | return; | |
5153 | ||
5154 | /* Update the stats for active netdevs so the network stack | |
5155 | * can look at updated numbers whenever it cares to | |
5156 | */ | |
505682cd | 5157 | for (i = 0; i < pf->num_alloc_vsi; i++) |
41c445ff JB |
5158 | if (pf->vsi[i] && pf->vsi[i]->netdev) |
5159 | i40e_update_stats(pf->vsi[i]); | |
5160 | ||
5161 | /* Update the stats for the active switching components */ | |
5162 | for (i = 0; i < I40E_MAX_VEB; i++) | |
5163 | if (pf->veb[i]) | |
5164 | i40e_update_veb_stats(pf->veb[i]); | |
beb0dff1 JK |
5165 | |
5166 | i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]); | |
41c445ff JB |
5167 | } |
5168 | ||
5169 | /** | |
5170 | * i40e_reset_subtask - Set up for resetting the device and driver | |
5171 | * @pf: board private structure | |
5172 | **/ | |
5173 | static void i40e_reset_subtask(struct i40e_pf *pf) | |
5174 | { | |
5175 | u32 reset_flags = 0; | |
5176 | ||
23326186 | 5177 | rtnl_lock(); |
41c445ff JB |
5178 | if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) { |
5179 | reset_flags |= (1 << __I40E_REINIT_REQUESTED); | |
5180 | clear_bit(__I40E_REINIT_REQUESTED, &pf->state); | |
5181 | } | |
5182 | if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) { | |
5183 | reset_flags |= (1 << __I40E_PF_RESET_REQUESTED); | |
5184 | clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state); | |
5185 | } | |
5186 | if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) { | |
5187 | reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED); | |
5188 | clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state); | |
5189 | } | |
5190 | if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) { | |
5191 | reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED); | |
5192 | clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state); | |
5193 | } | |
b5d06f05 NP |
5194 | if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) { |
5195 | reset_flags |= (1 << __I40E_DOWN_REQUESTED); | |
5196 | clear_bit(__I40E_DOWN_REQUESTED, &pf->state); | |
5197 | } | |
41c445ff JB |
5198 | |
5199 | /* If there's a recovery already waiting, it takes | |
5200 | * precedence before starting a new reset sequence. | |
5201 | */ | |
5202 | if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) { | |
5203 | i40e_handle_reset_warning(pf); | |
23326186 | 5204 | goto unlock; |
41c445ff JB |
5205 | } |
5206 | ||
5207 | /* If we're already down or resetting, just bail */ | |
5208 | if (reset_flags && | |
5209 | !test_bit(__I40E_DOWN, &pf->state) && | |
5210 | !test_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
5211 | i40e_do_reset(pf, reset_flags); | |
23326186 ASJ |
5212 | |
5213 | unlock: | |
5214 | rtnl_unlock(); | |
41c445ff JB |
5215 | } |
5216 | ||
5217 | /** | |
5218 | * i40e_handle_link_event - Handle link event | |
5219 | * @pf: board private structure | |
5220 | * @e: event info posted on ARQ | |
5221 | **/ | |
5222 | static void i40e_handle_link_event(struct i40e_pf *pf, | |
5223 | struct i40e_arq_event_info *e) | |
5224 | { | |
5225 | struct i40e_hw *hw = &pf->hw; | |
5226 | struct i40e_aqc_get_link_status *status = | |
5227 | (struct i40e_aqc_get_link_status *)&e->desc.params.raw; | |
5228 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; | |
5229 | ||
5230 | /* save off old link status information */ | |
5231 | memcpy(&pf->hw.phy.link_info_old, hw_link_info, | |
5232 | sizeof(pf->hw.phy.link_info_old)); | |
5233 | ||
5234 | /* update link status */ | |
5235 | hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type; | |
5236 | hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed; | |
5237 | hw_link_info->link_info = status->link_info; | |
5238 | hw_link_info->an_info = status->an_info; | |
5239 | hw_link_info->ext_info = status->ext_info; | |
5240 | hw_link_info->lse_enable = | |
5241 | le16_to_cpu(status->command_flags) & | |
5242 | I40E_AQ_LSE_ENABLE; | |
5243 | ||
5244 | /* process the event */ | |
5245 | i40e_link_event(pf); | |
5246 | ||
5247 | /* Do a new status request to re-enable LSE reporting | |
5248 | * and load new status information into the hw struct, | |
5249 | * then see if the status changed while processing the | |
5250 | * initial event. | |
5251 | */ | |
5252 | i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); | |
5253 | i40e_link_event(pf); | |
5254 | } | |
5255 | ||
5256 | /** | |
5257 | * i40e_clean_adminq_subtask - Clean the AdminQ rings | |
5258 | * @pf: board private structure | |
5259 | **/ | |
5260 | static void i40e_clean_adminq_subtask(struct i40e_pf *pf) | |
5261 | { | |
5262 | struct i40e_arq_event_info event; | |
5263 | struct i40e_hw *hw = &pf->hw; | |
5264 | u16 pending, i = 0; | |
5265 | i40e_status ret; | |
5266 | u16 opcode; | |
86df242b | 5267 | u32 oldval; |
41c445ff JB |
5268 | u32 val; |
5269 | ||
5270 | if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state)) | |
5271 | return; | |
5272 | ||
86df242b SN |
5273 | /* check for error indications */ |
5274 | val = rd32(&pf->hw, pf->hw.aq.arq.len); | |
5275 | oldval = val; | |
5276 | if (val & I40E_PF_ARQLEN_ARQVFE_MASK) { | |
5277 | dev_info(&pf->pdev->dev, "ARQ VF Error detected\n"); | |
5278 | val &= ~I40E_PF_ARQLEN_ARQVFE_MASK; | |
5279 | } | |
5280 | if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) { | |
5281 | dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n"); | |
5282 | val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK; | |
5283 | } | |
5284 | if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) { | |
5285 | dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n"); | |
5286 | val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK; | |
5287 | } | |
5288 | if (oldval != val) | |
5289 | wr32(&pf->hw, pf->hw.aq.arq.len, val); | |
5290 | ||
5291 | val = rd32(&pf->hw, pf->hw.aq.asq.len); | |
5292 | oldval = val; | |
5293 | if (val & I40E_PF_ATQLEN_ATQVFE_MASK) { | |
5294 | dev_info(&pf->pdev->dev, "ASQ VF Error detected\n"); | |
5295 | val &= ~I40E_PF_ATQLEN_ATQVFE_MASK; | |
5296 | } | |
5297 | if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) { | |
5298 | dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n"); | |
5299 | val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK; | |
5300 | } | |
5301 | if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) { | |
5302 | dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n"); | |
5303 | val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK; | |
5304 | } | |
5305 | if (oldval != val) | |
5306 | wr32(&pf->hw, pf->hw.aq.asq.len, val); | |
5307 | ||
3197ce22 | 5308 | event.msg_size = I40E_MAX_AQ_BUF_SIZE; |
41c445ff JB |
5309 | event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL); |
5310 | if (!event.msg_buf) | |
5311 | return; | |
5312 | ||
5313 | do { | |
2f019123 | 5314 | event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */ |
41c445ff JB |
5315 | ret = i40e_clean_arq_element(hw, &event, &pending); |
5316 | if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) { | |
5317 | dev_info(&pf->pdev->dev, "No ARQ event found\n"); | |
5318 | break; | |
5319 | } else if (ret) { | |
5320 | dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret); | |
5321 | break; | |
5322 | } | |
5323 | ||
5324 | opcode = le16_to_cpu(event.desc.opcode); | |
5325 | switch (opcode) { | |
5326 | ||
5327 | case i40e_aqc_opc_get_link_status: | |
5328 | i40e_handle_link_event(pf, &event); | |
5329 | break; | |
5330 | case i40e_aqc_opc_send_msg_to_pf: | |
5331 | ret = i40e_vc_process_vf_msg(pf, | |
5332 | le16_to_cpu(event.desc.retval), | |
5333 | le32_to_cpu(event.desc.cookie_high), | |
5334 | le32_to_cpu(event.desc.cookie_low), | |
5335 | event.msg_buf, | |
5336 | event.msg_size); | |
5337 | break; | |
5338 | case i40e_aqc_opc_lldp_update_mib: | |
69bfb110 | 5339 | dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n"); |
4e3b35b0 NP |
5340 | #ifdef CONFIG_I40E_DCB |
5341 | rtnl_lock(); | |
5342 | ret = i40e_handle_lldp_event(pf, &event); | |
5343 | rtnl_unlock(); | |
5344 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff JB |
5345 | break; |
5346 | case i40e_aqc_opc_event_lan_overflow: | |
69bfb110 | 5347 | dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n"); |
41c445ff JB |
5348 | i40e_handle_lan_overflow_event(pf, &event); |
5349 | break; | |
0467bc91 SN |
5350 | case i40e_aqc_opc_send_msg_to_peer: |
5351 | dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n"); | |
5352 | break; | |
41c445ff JB |
5353 | default: |
5354 | dev_info(&pf->pdev->dev, | |
0467bc91 SN |
5355 | "ARQ Error: Unknown event 0x%04x received\n", |
5356 | opcode); | |
41c445ff JB |
5357 | break; |
5358 | } | |
5359 | } while (pending && (i++ < pf->adminq_work_limit)); | |
5360 | ||
5361 | clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state); | |
5362 | /* re-enable Admin queue interrupt cause */ | |
5363 | val = rd32(hw, I40E_PFINT_ICR0_ENA); | |
5364 | val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK; | |
5365 | wr32(hw, I40E_PFINT_ICR0_ENA, val); | |
5366 | i40e_flush(hw); | |
5367 | ||
5368 | kfree(event.msg_buf); | |
5369 | } | |
5370 | ||
4eb3f768 SN |
5371 | /** |
5372 | * i40e_verify_eeprom - make sure eeprom is good to use | |
5373 | * @pf: board private structure | |
5374 | **/ | |
5375 | static void i40e_verify_eeprom(struct i40e_pf *pf) | |
5376 | { | |
5377 | int err; | |
5378 | ||
5379 | err = i40e_diag_eeprom_test(&pf->hw); | |
5380 | if (err) { | |
5381 | /* retry in case of garbage read */ | |
5382 | err = i40e_diag_eeprom_test(&pf->hw); | |
5383 | if (err) { | |
5384 | dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n", | |
5385 | err); | |
5386 | set_bit(__I40E_BAD_EEPROM, &pf->state); | |
5387 | } | |
5388 | } | |
5389 | ||
5390 | if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) { | |
5391 | dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n"); | |
5392 | clear_bit(__I40E_BAD_EEPROM, &pf->state); | |
5393 | } | |
5394 | } | |
5395 | ||
41c445ff JB |
5396 | /** |
5397 | * i40e_reconstitute_veb - rebuild the VEB and anything connected to it | |
5398 | * @veb: pointer to the VEB instance | |
5399 | * | |
5400 | * This is a recursive function that first builds the attached VSIs then | |
5401 | * recurses in to build the next layer of VEB. We track the connections | |
5402 | * through our own index numbers because the seid's from the HW could | |
5403 | * change across the reset. | |
5404 | **/ | |
5405 | static int i40e_reconstitute_veb(struct i40e_veb *veb) | |
5406 | { | |
5407 | struct i40e_vsi *ctl_vsi = NULL; | |
5408 | struct i40e_pf *pf = veb->pf; | |
5409 | int v, veb_idx; | |
5410 | int ret; | |
5411 | ||
5412 | /* build VSI that owns this VEB, temporarily attached to base VEB */ | |
505682cd | 5413 | for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) { |
41c445ff JB |
5414 | if (pf->vsi[v] && |
5415 | pf->vsi[v]->veb_idx == veb->idx && | |
5416 | pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
5417 | ctl_vsi = pf->vsi[v]; | |
5418 | break; | |
5419 | } | |
5420 | } | |
5421 | if (!ctl_vsi) { | |
5422 | dev_info(&pf->pdev->dev, | |
5423 | "missing owner VSI for veb_idx %d\n", veb->idx); | |
5424 | ret = -ENOENT; | |
5425 | goto end_reconstitute; | |
5426 | } | |
5427 | if (ctl_vsi != pf->vsi[pf->lan_vsi]) | |
5428 | ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
5429 | ret = i40e_add_vsi(ctl_vsi); | |
5430 | if (ret) { | |
5431 | dev_info(&pf->pdev->dev, | |
5432 | "rebuild of owner VSI failed: %d\n", ret); | |
5433 | goto end_reconstitute; | |
5434 | } | |
5435 | i40e_vsi_reset_stats(ctl_vsi); | |
5436 | ||
5437 | /* create the VEB in the switch and move the VSI onto the VEB */ | |
5438 | ret = i40e_add_veb(veb, ctl_vsi); | |
5439 | if (ret) | |
5440 | goto end_reconstitute; | |
5441 | ||
5442 | /* create the remaining VSIs attached to this VEB */ | |
505682cd | 5443 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
5444 | if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi) |
5445 | continue; | |
5446 | ||
5447 | if (pf->vsi[v]->veb_idx == veb->idx) { | |
5448 | struct i40e_vsi *vsi = pf->vsi[v]; | |
5449 | vsi->uplink_seid = veb->seid; | |
5450 | ret = i40e_add_vsi(vsi); | |
5451 | if (ret) { | |
5452 | dev_info(&pf->pdev->dev, | |
5453 | "rebuild of vsi_idx %d failed: %d\n", | |
5454 | v, ret); | |
5455 | goto end_reconstitute; | |
5456 | } | |
5457 | i40e_vsi_reset_stats(vsi); | |
5458 | } | |
5459 | } | |
5460 | ||
5461 | /* create any VEBs attached to this VEB - RECURSION */ | |
5462 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
5463 | if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) { | |
5464 | pf->veb[veb_idx]->uplink_seid = veb->seid; | |
5465 | ret = i40e_reconstitute_veb(pf->veb[veb_idx]); | |
5466 | if (ret) | |
5467 | break; | |
5468 | } | |
5469 | } | |
5470 | ||
5471 | end_reconstitute: | |
5472 | return ret; | |
5473 | } | |
5474 | ||
5475 | /** | |
5476 | * i40e_get_capabilities - get info about the HW | |
5477 | * @pf: the PF struct | |
5478 | **/ | |
5479 | static int i40e_get_capabilities(struct i40e_pf *pf) | |
5480 | { | |
5481 | struct i40e_aqc_list_capabilities_element_resp *cap_buf; | |
5482 | u16 data_size; | |
5483 | int buf_len; | |
5484 | int err; | |
5485 | ||
5486 | buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp); | |
5487 | do { | |
5488 | cap_buf = kzalloc(buf_len, GFP_KERNEL); | |
5489 | if (!cap_buf) | |
5490 | return -ENOMEM; | |
5491 | ||
5492 | /* this loads the data into the hw struct for us */ | |
5493 | err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len, | |
5494 | &data_size, | |
5495 | i40e_aqc_opc_list_func_capabilities, | |
5496 | NULL); | |
5497 | /* data loaded, buffer no longer needed */ | |
5498 | kfree(cap_buf); | |
5499 | ||
5500 | if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { | |
5501 | /* retry with a larger buffer */ | |
5502 | buf_len = data_size; | |
5503 | } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { | |
5504 | dev_info(&pf->pdev->dev, | |
5505 | "capability discovery failed: aq=%d\n", | |
5506 | pf->hw.aq.asq_last_status); | |
5507 | return -ENODEV; | |
5508 | } | |
5509 | } while (err); | |
5510 | ||
ac71b7ba ASJ |
5511 | if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) || |
5512 | (pf->hw.aq.fw_maj_ver < 2)) { | |
5513 | pf->hw.func_caps.num_msix_vectors++; | |
5514 | pf->hw.func_caps.num_msix_vectors_vf++; | |
5515 | } | |
5516 | ||
41c445ff JB |
5517 | if (pf->hw.debug_mask & I40E_DEBUG_USER) |
5518 | dev_info(&pf->pdev->dev, | |
5519 | "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n", | |
5520 | pf->hw.pf_id, pf->hw.func_caps.num_vfs, | |
5521 | pf->hw.func_caps.num_msix_vectors, | |
5522 | pf->hw.func_caps.num_msix_vectors_vf, | |
5523 | pf->hw.func_caps.fd_filters_guaranteed, | |
5524 | pf->hw.func_caps.fd_filters_best_effort, | |
5525 | pf->hw.func_caps.num_tx_qp, | |
5526 | pf->hw.func_caps.num_vsis); | |
5527 | ||
7134f9ce JB |
5528 | #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \ |
5529 | + pf->hw.func_caps.num_vfs) | |
5530 | if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) { | |
5531 | dev_info(&pf->pdev->dev, | |
5532 | "got num_vsis %d, setting num_vsis to %d\n", | |
5533 | pf->hw.func_caps.num_vsis, DEF_NUM_VSI); | |
5534 | pf->hw.func_caps.num_vsis = DEF_NUM_VSI; | |
5535 | } | |
5536 | ||
41c445ff JB |
5537 | return 0; |
5538 | } | |
5539 | ||
cbf61325 ASJ |
5540 | static int i40e_vsi_clear(struct i40e_vsi *vsi); |
5541 | ||
41c445ff | 5542 | /** |
cbf61325 | 5543 | * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband |
41c445ff JB |
5544 | * @pf: board private structure |
5545 | **/ | |
cbf61325 | 5546 | static void i40e_fdir_sb_setup(struct i40e_pf *pf) |
41c445ff JB |
5547 | { |
5548 | struct i40e_vsi *vsi; | |
8a9eb7d3 | 5549 | int i; |
41c445ff | 5550 | |
407e063c JB |
5551 | /* quick workaround for an NVM issue that leaves a critical register |
5552 | * uninitialized | |
5553 | */ | |
5554 | if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) { | |
5555 | static const u32 hkey[] = { | |
5556 | 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36, | |
5557 | 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb, | |
5558 | 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21, | |
5559 | 0x95b3a76d}; | |
5560 | ||
5561 | for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++) | |
5562 | wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]); | |
5563 | } | |
5564 | ||
cbf61325 | 5565 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) |
41c445ff JB |
5566 | return; |
5567 | ||
cbf61325 | 5568 | /* find existing VSI and see if it needs configuring */ |
41c445ff | 5569 | vsi = NULL; |
505682cd | 5570 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
cbf61325 | 5571 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { |
41c445ff | 5572 | vsi = pf->vsi[i]; |
cbf61325 ASJ |
5573 | break; |
5574 | } | |
5575 | } | |
5576 | ||
5577 | /* create a new VSI if none exists */ | |
41c445ff | 5578 | if (!vsi) { |
cbf61325 ASJ |
5579 | vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, |
5580 | pf->vsi[pf->lan_vsi]->seid, 0); | |
41c445ff JB |
5581 | if (!vsi) { |
5582 | dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n"); | |
8a9eb7d3 SN |
5583 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; |
5584 | return; | |
41c445ff | 5585 | } |
cbf61325 | 5586 | } |
41c445ff | 5587 | |
8a9eb7d3 | 5588 | i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring); |
41c445ff JB |
5589 | } |
5590 | ||
5591 | /** | |
5592 | * i40e_fdir_teardown - release the Flow Director resources | |
5593 | * @pf: board private structure | |
5594 | **/ | |
5595 | static void i40e_fdir_teardown(struct i40e_pf *pf) | |
5596 | { | |
5597 | int i; | |
5598 | ||
17a73f6b | 5599 | i40e_fdir_filter_exit(pf); |
505682cd | 5600 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
5601 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { |
5602 | i40e_vsi_release(pf->vsi[i]); | |
5603 | break; | |
5604 | } | |
5605 | } | |
5606 | } | |
5607 | ||
5608 | /** | |
f650a38b | 5609 | * i40e_prep_for_reset - prep for the core to reset |
41c445ff JB |
5610 | * @pf: board private structure |
5611 | * | |
f650a38b ASJ |
5612 | * Close up the VFs and other things in prep for pf Reset. |
5613 | **/ | |
5614 | static int i40e_prep_for_reset(struct i40e_pf *pf) | |
41c445ff | 5615 | { |
41c445ff | 5616 | struct i40e_hw *hw = &pf->hw; |
60442dea | 5617 | i40e_status ret = 0; |
41c445ff JB |
5618 | u32 v; |
5619 | ||
5620 | clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state); | |
5621 | if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) | |
f650a38b | 5622 | return 0; |
41c445ff | 5623 | |
69bfb110 | 5624 | dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n"); |
41c445ff | 5625 | |
41c445ff JB |
5626 | /* quiesce the VSIs and their queues that are not already DOWN */ |
5627 | i40e_pf_quiesce_all_vsi(pf); | |
5628 | ||
505682cd | 5629 | for (v = 0; v < pf->num_alloc_vsi; v++) { |
41c445ff JB |
5630 | if (pf->vsi[v]) |
5631 | pf->vsi[v]->seid = 0; | |
5632 | } | |
5633 | ||
5634 | i40e_shutdown_adminq(&pf->hw); | |
5635 | ||
f650a38b | 5636 | /* call shutdown HMC */ |
60442dea SN |
5637 | if (hw->hmc.hmc_obj) { |
5638 | ret = i40e_shutdown_lan_hmc(hw); | |
5639 | if (ret) { | |
5640 | dev_warn(&pf->pdev->dev, | |
5641 | "shutdown_lan_hmc failed: %d\n", ret); | |
5642 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); | |
5643 | } | |
f650a38b ASJ |
5644 | } |
5645 | return ret; | |
5646 | } | |
5647 | ||
44033fac JB |
5648 | /** |
5649 | * i40e_send_version - update firmware with driver version | |
5650 | * @pf: PF struct | |
5651 | */ | |
5652 | static void i40e_send_version(struct i40e_pf *pf) | |
5653 | { | |
5654 | struct i40e_driver_version dv; | |
5655 | ||
5656 | dv.major_version = DRV_VERSION_MAJOR; | |
5657 | dv.minor_version = DRV_VERSION_MINOR; | |
5658 | dv.build_version = DRV_VERSION_BUILD; | |
5659 | dv.subbuild_version = 0; | |
5660 | strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string)); | |
5661 | i40e_aq_send_driver_version(&pf->hw, &dv, NULL); | |
5662 | } | |
5663 | ||
f650a38b | 5664 | /** |
4dda12e6 | 5665 | * i40e_reset_and_rebuild - reset and rebuild using a saved config |
f650a38b | 5666 | * @pf: board private structure |
bc7d338f | 5667 | * @reinit: if the Main VSI needs to re-initialized. |
f650a38b | 5668 | **/ |
bc7d338f | 5669 | static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit) |
f650a38b | 5670 | { |
f650a38b ASJ |
5671 | struct i40e_hw *hw = &pf->hw; |
5672 | i40e_status ret; | |
5673 | u32 v; | |
5674 | ||
41c445ff JB |
5675 | /* Now we wait for GRST to settle out. |
5676 | * We don't have to delete the VEBs or VSIs from the hw switch | |
5677 | * because the reset will make them disappear. | |
5678 | */ | |
5679 | ret = i40e_pf_reset(hw); | |
b5565400 | 5680 | if (ret) { |
41c445ff | 5681 | dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret); |
b5565400 AA |
5682 | goto end_core_reset; |
5683 | } | |
41c445ff JB |
5684 | pf->pfr_count++; |
5685 | ||
5686 | if (test_bit(__I40E_DOWN, &pf->state)) | |
5687 | goto end_core_reset; | |
69bfb110 | 5688 | dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n"); |
41c445ff JB |
5689 | |
5690 | /* rebuild the basics for the AdminQ, HMC, and initial HW switch */ | |
5691 | ret = i40e_init_adminq(&pf->hw); | |
5692 | if (ret) { | |
5693 | dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret); | |
5694 | goto end_core_reset; | |
5695 | } | |
5696 | ||
4eb3f768 SN |
5697 | /* re-verify the eeprom if we just had an EMP reset */ |
5698 | if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) { | |
5699 | clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state); | |
5700 | i40e_verify_eeprom(pf); | |
5701 | } | |
5702 | ||
e78ac4bf | 5703 | i40e_clear_pxe_mode(hw); |
41c445ff JB |
5704 | ret = i40e_get_capabilities(pf); |
5705 | if (ret) { | |
5706 | dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n", | |
5707 | ret); | |
5708 | goto end_core_reset; | |
5709 | } | |
5710 | ||
41c445ff JB |
5711 | ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, |
5712 | hw->func_caps.num_rx_qp, | |
5713 | pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); | |
5714 | if (ret) { | |
5715 | dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret); | |
5716 | goto end_core_reset; | |
5717 | } | |
5718 | ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
5719 | if (ret) { | |
5720 | dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret); | |
5721 | goto end_core_reset; | |
5722 | } | |
5723 | ||
4e3b35b0 NP |
5724 | #ifdef CONFIG_I40E_DCB |
5725 | ret = i40e_init_pf_dcb(pf); | |
5726 | if (ret) { | |
5727 | dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret); | |
5728 | goto end_core_reset; | |
5729 | } | |
5730 | #endif /* CONFIG_I40E_DCB */ | |
5731 | ||
41c445ff | 5732 | /* do basic switch setup */ |
bc7d338f | 5733 | ret = i40e_setup_pf_switch(pf, reinit); |
41c445ff JB |
5734 | if (ret) |
5735 | goto end_core_reset; | |
5736 | ||
5737 | /* Rebuild the VSIs and VEBs that existed before reset. | |
5738 | * They are still in our local switch element arrays, so only | |
5739 | * need to rebuild the switch model in the HW. | |
5740 | * | |
5741 | * If there were VEBs but the reconstitution failed, we'll try | |
5742 | * try to recover minimal use by getting the basic PF VSI working. | |
5743 | */ | |
5744 | if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) { | |
69bfb110 | 5745 | dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n"); |
41c445ff JB |
5746 | /* find the one VEB connected to the MAC, and find orphans */ |
5747 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
5748 | if (!pf->veb[v]) | |
5749 | continue; | |
5750 | ||
5751 | if (pf->veb[v]->uplink_seid == pf->mac_seid || | |
5752 | pf->veb[v]->uplink_seid == 0) { | |
5753 | ret = i40e_reconstitute_veb(pf->veb[v]); | |
5754 | ||
5755 | if (!ret) | |
5756 | continue; | |
5757 | ||
5758 | /* If Main VEB failed, we're in deep doodoo, | |
5759 | * so give up rebuilding the switch and set up | |
5760 | * for minimal rebuild of PF VSI. | |
5761 | * If orphan failed, we'll report the error | |
5762 | * but try to keep going. | |
5763 | */ | |
5764 | if (pf->veb[v]->uplink_seid == pf->mac_seid) { | |
5765 | dev_info(&pf->pdev->dev, | |
5766 | "rebuild of switch failed: %d, will try to set up simple PF connection\n", | |
5767 | ret); | |
5768 | pf->vsi[pf->lan_vsi]->uplink_seid | |
5769 | = pf->mac_seid; | |
5770 | break; | |
5771 | } else if (pf->veb[v]->uplink_seid == 0) { | |
5772 | dev_info(&pf->pdev->dev, | |
5773 | "rebuild of orphan VEB failed: %d\n", | |
5774 | ret); | |
5775 | } | |
5776 | } | |
5777 | } | |
5778 | } | |
5779 | ||
5780 | if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) { | |
5781 | dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n"); | |
5782 | /* no VEB, so rebuild only the Main VSI */ | |
5783 | ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]); | |
5784 | if (ret) { | |
5785 | dev_info(&pf->pdev->dev, | |
5786 | "rebuild of Main VSI failed: %d\n", ret); | |
5787 | goto end_core_reset; | |
5788 | } | |
5789 | } | |
5790 | ||
5791 | /* reinit the misc interrupt */ | |
5792 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
5793 | ret = i40e_setup_misc_vector(pf); | |
5794 | ||
5795 | /* restart the VSIs that were rebuilt and running before the reset */ | |
5796 | i40e_pf_unquiesce_all_vsi(pf); | |
5797 | ||
69f64b2b MW |
5798 | if (pf->num_alloc_vfs) { |
5799 | for (v = 0; v < pf->num_alloc_vfs; v++) | |
5800 | i40e_reset_vf(&pf->vf[v], true); | |
5801 | } | |
5802 | ||
41c445ff | 5803 | /* tell the firmware that we're starting */ |
44033fac | 5804 | i40e_send_version(pf); |
41c445ff JB |
5805 | |
5806 | end_core_reset: | |
5807 | clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state); | |
5808 | } | |
5809 | ||
f650a38b ASJ |
5810 | /** |
5811 | * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild | |
5812 | * @pf: board private structure | |
5813 | * | |
5814 | * Close up the VFs and other things in prep for a Core Reset, | |
5815 | * then get ready to rebuild the world. | |
5816 | **/ | |
5817 | static void i40e_handle_reset_warning(struct i40e_pf *pf) | |
5818 | { | |
5819 | i40e_status ret; | |
5820 | ||
5821 | ret = i40e_prep_for_reset(pf); | |
5822 | if (!ret) | |
bc7d338f | 5823 | i40e_reset_and_rebuild(pf, false); |
f650a38b ASJ |
5824 | } |
5825 | ||
41c445ff JB |
5826 | /** |
5827 | * i40e_handle_mdd_event | |
5828 | * @pf: pointer to the pf structure | |
5829 | * | |
5830 | * Called from the MDD irq handler to identify possibly malicious vfs | |
5831 | **/ | |
5832 | static void i40e_handle_mdd_event(struct i40e_pf *pf) | |
5833 | { | |
5834 | struct i40e_hw *hw = &pf->hw; | |
5835 | bool mdd_detected = false; | |
5836 | struct i40e_vf *vf; | |
5837 | u32 reg; | |
5838 | int i; | |
5839 | ||
5840 | if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state)) | |
5841 | return; | |
5842 | ||
5843 | /* find what triggered the MDD event */ | |
5844 | reg = rd32(hw, I40E_GL_MDET_TX); | |
5845 | if (reg & I40E_GL_MDET_TX_VALID_MASK) { | |
4c33f83a ASJ |
5846 | u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >> |
5847 | I40E_GL_MDET_TX_PF_NUM_SHIFT; | |
5848 | u8 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >> | |
5849 | I40E_GL_MDET_TX_VF_NUM_SHIFT; | |
5850 | u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT) >> | |
5851 | I40E_GL_MDET_TX_EVENT_SHIFT; | |
5852 | u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) >> | |
5853 | I40E_GL_MDET_TX_QUEUE_SHIFT; | |
41c445ff | 5854 | dev_info(&pf->pdev->dev, |
4c33f83a ASJ |
5855 | "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n", |
5856 | event, queue, pf_num, vf_num); | |
41c445ff JB |
5857 | wr32(hw, I40E_GL_MDET_TX, 0xffffffff); |
5858 | mdd_detected = true; | |
5859 | } | |
5860 | reg = rd32(hw, I40E_GL_MDET_RX); | |
5861 | if (reg & I40E_GL_MDET_RX_VALID_MASK) { | |
4c33f83a ASJ |
5862 | u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >> |
5863 | I40E_GL_MDET_RX_FUNCTION_SHIFT; | |
5864 | u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT) >> | |
5865 | I40E_GL_MDET_RX_EVENT_SHIFT; | |
5866 | u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) >> | |
5867 | I40E_GL_MDET_RX_QUEUE_SHIFT; | |
41c445ff | 5868 | dev_info(&pf->pdev->dev, |
f29eaa3d | 5869 | "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n", |
41c445ff JB |
5870 | event, queue, func); |
5871 | wr32(hw, I40E_GL_MDET_RX, 0xffffffff); | |
5872 | mdd_detected = true; | |
5873 | } | |
5874 | ||
5875 | /* see if one of the VFs needs its hand slapped */ | |
5876 | for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) { | |
5877 | vf = &(pf->vf[i]); | |
5878 | reg = rd32(hw, I40E_VP_MDET_TX(i)); | |
5879 | if (reg & I40E_VP_MDET_TX_VALID_MASK) { | |
5880 | wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF); | |
5881 | vf->num_mdd_events++; | |
5882 | dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i); | |
5883 | } | |
5884 | ||
5885 | reg = rd32(hw, I40E_VP_MDET_RX(i)); | |
5886 | if (reg & I40E_VP_MDET_RX_VALID_MASK) { | |
5887 | wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF); | |
5888 | vf->num_mdd_events++; | |
5889 | dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i); | |
5890 | } | |
5891 | ||
5892 | if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) { | |
5893 | dev_info(&pf->pdev->dev, | |
5894 | "Too many MDD events on VF %d, disabled\n", i); | |
5895 | dev_info(&pf->pdev->dev, | |
5896 | "Use PF Control I/F to re-enable the VF\n"); | |
5897 | set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
5898 | } | |
5899 | } | |
5900 | ||
5901 | /* re-enable mdd interrupt cause */ | |
5902 | clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state); | |
5903 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); | |
5904 | reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK; | |
5905 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
5906 | i40e_flush(hw); | |
5907 | } | |
5908 | ||
a1c9a9d9 JK |
5909 | #ifdef CONFIG_I40E_VXLAN |
5910 | /** | |
5911 | * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW | |
5912 | * @pf: board private structure | |
5913 | **/ | |
5914 | static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf) | |
5915 | { | |
a1c9a9d9 JK |
5916 | struct i40e_hw *hw = &pf->hw; |
5917 | i40e_status ret; | |
5918 | u8 filter_index; | |
5919 | __be16 port; | |
5920 | int i; | |
5921 | ||
5922 | if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC)) | |
5923 | return; | |
5924 | ||
5925 | pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC; | |
5926 | ||
5927 | for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { | |
5928 | if (pf->pending_vxlan_bitmap & (1 << i)) { | |
5929 | pf->pending_vxlan_bitmap &= ~(1 << i); | |
5930 | port = pf->vxlan_ports[i]; | |
5931 | ret = port ? | |
5932 | i40e_aq_add_udp_tunnel(hw, ntohs(port), | |
a1c9a9d9 JK |
5933 | I40E_AQC_TUNNEL_TYPE_VXLAN, |
5934 | &filter_index, NULL) | |
5935 | : i40e_aq_del_udp_tunnel(hw, i, NULL); | |
5936 | ||
5937 | if (ret) { | |
5938 | dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n", | |
5939 | port ? "adding" : "deleting", | |
5940 | ntohs(port), port ? i : i); | |
5941 | ||
5942 | pf->vxlan_ports[i] = 0; | |
5943 | } else { | |
5944 | dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n", | |
5945 | port ? "Added" : "Deleted", | |
5946 | ntohs(port), port ? i : filter_index); | |
5947 | } | |
5948 | } | |
5949 | } | |
5950 | } | |
5951 | ||
5952 | #endif | |
41c445ff JB |
5953 | /** |
5954 | * i40e_service_task - Run the driver's async subtasks | |
5955 | * @work: pointer to work_struct containing our data | |
5956 | **/ | |
5957 | static void i40e_service_task(struct work_struct *work) | |
5958 | { | |
5959 | struct i40e_pf *pf = container_of(work, | |
5960 | struct i40e_pf, | |
5961 | service_task); | |
5962 | unsigned long start_time = jiffies; | |
5963 | ||
e57a2fea SN |
5964 | /* don't bother with service tasks if a reset is in progress */ |
5965 | if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { | |
5966 | i40e_service_event_complete(pf); | |
5967 | return; | |
5968 | } | |
5969 | ||
41c445ff JB |
5970 | i40e_reset_subtask(pf); |
5971 | i40e_handle_mdd_event(pf); | |
5972 | i40e_vc_process_vflr_event(pf); | |
5973 | i40e_watchdog_subtask(pf); | |
5974 | i40e_fdir_reinit_subtask(pf); | |
5975 | i40e_check_hang_subtask(pf); | |
5976 | i40e_sync_filters_subtask(pf); | |
a1c9a9d9 JK |
5977 | #ifdef CONFIG_I40E_VXLAN |
5978 | i40e_sync_vxlan_filters_subtask(pf); | |
5979 | #endif | |
41c445ff JB |
5980 | i40e_clean_adminq_subtask(pf); |
5981 | ||
5982 | i40e_service_event_complete(pf); | |
5983 | ||
5984 | /* If the tasks have taken longer than one timer cycle or there | |
5985 | * is more work to be done, reschedule the service task now | |
5986 | * rather than wait for the timer to tick again. | |
5987 | */ | |
5988 | if (time_after(jiffies, (start_time + pf->service_timer_period)) || | |
5989 | test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) || | |
5990 | test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) || | |
5991 | test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
5992 | i40e_service_event_schedule(pf); | |
5993 | } | |
5994 | ||
5995 | /** | |
5996 | * i40e_service_timer - timer callback | |
5997 | * @data: pointer to PF struct | |
5998 | **/ | |
5999 | static void i40e_service_timer(unsigned long data) | |
6000 | { | |
6001 | struct i40e_pf *pf = (struct i40e_pf *)data; | |
6002 | ||
6003 | mod_timer(&pf->service_timer, | |
6004 | round_jiffies(jiffies + pf->service_timer_period)); | |
6005 | i40e_service_event_schedule(pf); | |
6006 | } | |
6007 | ||
6008 | /** | |
6009 | * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI | |
6010 | * @vsi: the VSI being configured | |
6011 | **/ | |
6012 | static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi) | |
6013 | { | |
6014 | struct i40e_pf *pf = vsi->back; | |
6015 | ||
6016 | switch (vsi->type) { | |
6017 | case I40E_VSI_MAIN: | |
6018 | vsi->alloc_queue_pairs = pf->num_lan_qps; | |
6019 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
6020 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
6021 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
6022 | vsi->num_q_vectors = pf->num_lan_msix; | |
6023 | else | |
6024 | vsi->num_q_vectors = 1; | |
6025 | ||
6026 | break; | |
6027 | ||
6028 | case I40E_VSI_FDIR: | |
6029 | vsi->alloc_queue_pairs = 1; | |
6030 | vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT, | |
6031 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
6032 | vsi->num_q_vectors = 1; | |
6033 | break; | |
6034 | ||
6035 | case I40E_VSI_VMDQ2: | |
6036 | vsi->alloc_queue_pairs = pf->num_vmdq_qps; | |
6037 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
6038 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
6039 | vsi->num_q_vectors = pf->num_vmdq_msix; | |
6040 | break; | |
6041 | ||
6042 | case I40E_VSI_SRIOV: | |
6043 | vsi->alloc_queue_pairs = pf->num_vf_qps; | |
6044 | vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS, | |
6045 | I40E_REQ_DESCRIPTOR_MULTIPLE); | |
6046 | break; | |
6047 | ||
6048 | default: | |
6049 | WARN_ON(1); | |
6050 | return -ENODATA; | |
6051 | } | |
6052 | ||
6053 | return 0; | |
6054 | } | |
6055 | ||
f650a38b ASJ |
6056 | /** |
6057 | * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi | |
6058 | * @type: VSI pointer | |
bc7d338f | 6059 | * @alloc_qvectors: a bool to specify if q_vectors need to be allocated. |
f650a38b ASJ |
6060 | * |
6061 | * On error: returns error code (negative) | |
6062 | * On success: returns 0 | |
6063 | **/ | |
bc7d338f | 6064 | static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors) |
f650a38b ASJ |
6065 | { |
6066 | int size; | |
6067 | int ret = 0; | |
6068 | ||
ac6c5e3d | 6069 | /* allocate memory for both Tx and Rx ring pointers */ |
f650a38b ASJ |
6070 | size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2; |
6071 | vsi->tx_rings = kzalloc(size, GFP_KERNEL); | |
6072 | if (!vsi->tx_rings) | |
6073 | return -ENOMEM; | |
f650a38b ASJ |
6074 | vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs]; |
6075 | ||
bc7d338f ASJ |
6076 | if (alloc_qvectors) { |
6077 | /* allocate memory for q_vector pointers */ | |
6078 | size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors; | |
6079 | vsi->q_vectors = kzalloc(size, GFP_KERNEL); | |
6080 | if (!vsi->q_vectors) { | |
6081 | ret = -ENOMEM; | |
6082 | goto err_vectors; | |
6083 | } | |
f650a38b ASJ |
6084 | } |
6085 | return ret; | |
6086 | ||
6087 | err_vectors: | |
6088 | kfree(vsi->tx_rings); | |
6089 | return ret; | |
6090 | } | |
6091 | ||
41c445ff JB |
6092 | /** |
6093 | * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF | |
6094 | * @pf: board private structure | |
6095 | * @type: type of VSI | |
6096 | * | |
6097 | * On error: returns error code (negative) | |
6098 | * On success: returns vsi index in PF (positive) | |
6099 | **/ | |
6100 | static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type) | |
6101 | { | |
6102 | int ret = -ENODEV; | |
6103 | struct i40e_vsi *vsi; | |
6104 | int vsi_idx; | |
6105 | int i; | |
6106 | ||
6107 | /* Need to protect the allocation of the VSIs at the PF level */ | |
6108 | mutex_lock(&pf->switch_mutex); | |
6109 | ||
6110 | /* VSI list may be fragmented if VSI creation/destruction has | |
6111 | * been happening. We can afford to do a quick scan to look | |
6112 | * for any free VSIs in the list. | |
6113 | * | |
6114 | * find next empty vsi slot, looping back around if necessary | |
6115 | */ | |
6116 | i = pf->next_vsi; | |
505682cd | 6117 | while (i < pf->num_alloc_vsi && pf->vsi[i]) |
41c445ff | 6118 | i++; |
505682cd | 6119 | if (i >= pf->num_alloc_vsi) { |
41c445ff JB |
6120 | i = 0; |
6121 | while (i < pf->next_vsi && pf->vsi[i]) | |
6122 | i++; | |
6123 | } | |
6124 | ||
505682cd | 6125 | if (i < pf->num_alloc_vsi && !pf->vsi[i]) { |
41c445ff JB |
6126 | vsi_idx = i; /* Found one! */ |
6127 | } else { | |
6128 | ret = -ENODEV; | |
493fb300 | 6129 | goto unlock_pf; /* out of VSI slots! */ |
41c445ff JB |
6130 | } |
6131 | pf->next_vsi = ++i; | |
6132 | ||
6133 | vsi = kzalloc(sizeof(*vsi), GFP_KERNEL); | |
6134 | if (!vsi) { | |
6135 | ret = -ENOMEM; | |
493fb300 | 6136 | goto unlock_pf; |
41c445ff JB |
6137 | } |
6138 | vsi->type = type; | |
6139 | vsi->back = pf; | |
6140 | set_bit(__I40E_DOWN, &vsi->state); | |
6141 | vsi->flags = 0; | |
6142 | vsi->idx = vsi_idx; | |
6143 | vsi->rx_itr_setting = pf->rx_itr_default; | |
6144 | vsi->tx_itr_setting = pf->tx_itr_default; | |
6145 | vsi->netdev_registered = false; | |
6146 | vsi->work_limit = I40E_DEFAULT_IRQ_WORK; | |
6147 | INIT_LIST_HEAD(&vsi->mac_filter_list); | |
63741846 | 6148 | vsi->irqs_ready = false; |
41c445ff | 6149 | |
9f65e15b AD |
6150 | ret = i40e_set_num_rings_in_vsi(vsi); |
6151 | if (ret) | |
6152 | goto err_rings; | |
6153 | ||
bc7d338f | 6154 | ret = i40e_vsi_alloc_arrays(vsi, true); |
f650a38b | 6155 | if (ret) |
9f65e15b | 6156 | goto err_rings; |
493fb300 | 6157 | |
41c445ff JB |
6158 | /* Setup default MSIX irq handler for VSI */ |
6159 | i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings); | |
6160 | ||
6161 | pf->vsi[vsi_idx] = vsi; | |
6162 | ret = vsi_idx; | |
493fb300 AD |
6163 | goto unlock_pf; |
6164 | ||
9f65e15b | 6165 | err_rings: |
493fb300 AD |
6166 | pf->next_vsi = i - 1; |
6167 | kfree(vsi); | |
6168 | unlock_pf: | |
41c445ff JB |
6169 | mutex_unlock(&pf->switch_mutex); |
6170 | return ret; | |
6171 | } | |
6172 | ||
f650a38b ASJ |
6173 | /** |
6174 | * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI | |
6175 | * @type: VSI pointer | |
bc7d338f | 6176 | * @free_qvectors: a bool to specify if q_vectors need to be freed. |
f650a38b ASJ |
6177 | * |
6178 | * On error: returns error code (negative) | |
6179 | * On success: returns 0 | |
6180 | **/ | |
bc7d338f | 6181 | static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors) |
f650a38b ASJ |
6182 | { |
6183 | /* free the ring and vector containers */ | |
bc7d338f ASJ |
6184 | if (free_qvectors) { |
6185 | kfree(vsi->q_vectors); | |
6186 | vsi->q_vectors = NULL; | |
6187 | } | |
f650a38b ASJ |
6188 | kfree(vsi->tx_rings); |
6189 | vsi->tx_rings = NULL; | |
6190 | vsi->rx_rings = NULL; | |
6191 | } | |
6192 | ||
41c445ff JB |
6193 | /** |
6194 | * i40e_vsi_clear - Deallocate the VSI provided | |
6195 | * @vsi: the VSI being un-configured | |
6196 | **/ | |
6197 | static int i40e_vsi_clear(struct i40e_vsi *vsi) | |
6198 | { | |
6199 | struct i40e_pf *pf; | |
6200 | ||
6201 | if (!vsi) | |
6202 | return 0; | |
6203 | ||
6204 | if (!vsi->back) | |
6205 | goto free_vsi; | |
6206 | pf = vsi->back; | |
6207 | ||
6208 | mutex_lock(&pf->switch_mutex); | |
6209 | if (!pf->vsi[vsi->idx]) { | |
6210 | dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n", | |
6211 | vsi->idx, vsi->idx, vsi, vsi->type); | |
6212 | goto unlock_vsi; | |
6213 | } | |
6214 | ||
6215 | if (pf->vsi[vsi->idx] != vsi) { | |
6216 | dev_err(&pf->pdev->dev, | |
6217 | "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n", | |
6218 | pf->vsi[vsi->idx]->idx, | |
6219 | pf->vsi[vsi->idx], | |
6220 | pf->vsi[vsi->idx]->type, | |
6221 | vsi->idx, vsi, vsi->type); | |
6222 | goto unlock_vsi; | |
6223 | } | |
6224 | ||
6225 | /* updates the pf for this cleared vsi */ | |
6226 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); | |
6227 | i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx); | |
6228 | ||
bc7d338f | 6229 | i40e_vsi_free_arrays(vsi, true); |
493fb300 | 6230 | |
41c445ff JB |
6231 | pf->vsi[vsi->idx] = NULL; |
6232 | if (vsi->idx < pf->next_vsi) | |
6233 | pf->next_vsi = vsi->idx; | |
6234 | ||
6235 | unlock_vsi: | |
6236 | mutex_unlock(&pf->switch_mutex); | |
6237 | free_vsi: | |
6238 | kfree(vsi); | |
6239 | ||
6240 | return 0; | |
6241 | } | |
6242 | ||
9f65e15b AD |
6243 | /** |
6244 | * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI | |
6245 | * @vsi: the VSI being cleaned | |
6246 | **/ | |
be1d5eea | 6247 | static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) |
9f65e15b AD |
6248 | { |
6249 | int i; | |
6250 | ||
8e9dca53 | 6251 | if (vsi->tx_rings && vsi->tx_rings[0]) { |
d7397644 | 6252 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { |
00403f04 MW |
6253 | kfree_rcu(vsi->tx_rings[i], rcu); |
6254 | vsi->tx_rings[i] = NULL; | |
6255 | vsi->rx_rings[i] = NULL; | |
6256 | } | |
be1d5eea | 6257 | } |
9f65e15b AD |
6258 | } |
6259 | ||
41c445ff JB |
6260 | /** |
6261 | * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI | |
6262 | * @vsi: the VSI being configured | |
6263 | **/ | |
6264 | static int i40e_alloc_rings(struct i40e_vsi *vsi) | |
6265 | { | |
e7046ee1 | 6266 | struct i40e_ring *tx_ring, *rx_ring; |
41c445ff | 6267 | struct i40e_pf *pf = vsi->back; |
41c445ff JB |
6268 | int i; |
6269 | ||
41c445ff | 6270 | /* Set basic values in the rings to be used later during open() */ |
d7397644 | 6271 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { |
ac6c5e3d | 6272 | /* allocate space for both Tx and Rx in one shot */ |
9f65e15b AD |
6273 | tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL); |
6274 | if (!tx_ring) | |
6275 | goto err_out; | |
41c445ff JB |
6276 | |
6277 | tx_ring->queue_index = i; | |
6278 | tx_ring->reg_idx = vsi->base_queue + i; | |
6279 | tx_ring->ring_active = false; | |
6280 | tx_ring->vsi = vsi; | |
6281 | tx_ring->netdev = vsi->netdev; | |
6282 | tx_ring->dev = &pf->pdev->dev; | |
6283 | tx_ring->count = vsi->num_desc; | |
6284 | tx_ring->size = 0; | |
6285 | tx_ring->dcb_tc = 0; | |
9f65e15b | 6286 | vsi->tx_rings[i] = tx_ring; |
41c445ff | 6287 | |
9f65e15b | 6288 | rx_ring = &tx_ring[1]; |
41c445ff JB |
6289 | rx_ring->queue_index = i; |
6290 | rx_ring->reg_idx = vsi->base_queue + i; | |
6291 | rx_ring->ring_active = false; | |
6292 | rx_ring->vsi = vsi; | |
6293 | rx_ring->netdev = vsi->netdev; | |
6294 | rx_ring->dev = &pf->pdev->dev; | |
6295 | rx_ring->count = vsi->num_desc; | |
6296 | rx_ring->size = 0; | |
6297 | rx_ring->dcb_tc = 0; | |
6298 | if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) | |
6299 | set_ring_16byte_desc_enabled(rx_ring); | |
6300 | else | |
6301 | clear_ring_16byte_desc_enabled(rx_ring); | |
9f65e15b | 6302 | vsi->rx_rings[i] = rx_ring; |
41c445ff JB |
6303 | } |
6304 | ||
6305 | return 0; | |
9f65e15b AD |
6306 | |
6307 | err_out: | |
6308 | i40e_vsi_clear_rings(vsi); | |
6309 | return -ENOMEM; | |
41c445ff JB |
6310 | } |
6311 | ||
6312 | /** | |
6313 | * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel | |
6314 | * @pf: board private structure | |
6315 | * @vectors: the number of MSI-X vectors to request | |
6316 | * | |
6317 | * Returns the number of vectors reserved, or error | |
6318 | **/ | |
6319 | static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors) | |
6320 | { | |
7b37f376 AG |
6321 | vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries, |
6322 | I40E_MIN_MSIX, vectors); | |
6323 | if (vectors < 0) { | |
41c445ff | 6324 | dev_info(&pf->pdev->dev, |
7b37f376 | 6325 | "MSI-X vector reservation failed: %d\n", vectors); |
41c445ff JB |
6326 | vectors = 0; |
6327 | } | |
6328 | ||
6329 | return vectors; | |
6330 | } | |
6331 | ||
6332 | /** | |
6333 | * i40e_init_msix - Setup the MSIX capability | |
6334 | * @pf: board private structure | |
6335 | * | |
6336 | * Work with the OS to set up the MSIX vectors needed. | |
6337 | * | |
6338 | * Returns 0 on success, negative on failure | |
6339 | **/ | |
6340 | static int i40e_init_msix(struct i40e_pf *pf) | |
6341 | { | |
6342 | i40e_status err = 0; | |
6343 | struct i40e_hw *hw = &pf->hw; | |
6344 | int v_budget, i; | |
6345 | int vec; | |
6346 | ||
6347 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) | |
6348 | return -ENODEV; | |
6349 | ||
6350 | /* The number of vectors we'll request will be comprised of: | |
6351 | * - Add 1 for "other" cause for Admin Queue events, etc. | |
6352 | * - The number of LAN queue pairs | |
f8ff1464 ASJ |
6353 | * - Queues being used for RSS. |
6354 | * We don't need as many as max_rss_size vectors. | |
6355 | * use rss_size instead in the calculation since that | |
6356 | * is governed by number of cpus in the system. | |
6357 | * - assumes symmetric Tx/Rx pairing | |
41c445ff JB |
6358 | * - The number of VMDq pairs |
6359 | * Once we count this up, try the request. | |
6360 | * | |
6361 | * If we can't get what we want, we'll simplify to nearly nothing | |
6362 | * and try again. If that still fails, we punt. | |
6363 | */ | |
f8ff1464 | 6364 | pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size); |
41c445ff JB |
6365 | pf->num_vmdq_msix = pf->num_vmdq_qps; |
6366 | v_budget = 1 + pf->num_lan_msix; | |
6367 | v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix); | |
60ea5f83 | 6368 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) |
41c445ff JB |
6369 | v_budget++; |
6370 | ||
6371 | /* Scale down if necessary, and the rings will share vectors */ | |
6372 | v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors); | |
6373 | ||
6374 | pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry), | |
6375 | GFP_KERNEL); | |
6376 | if (!pf->msix_entries) | |
6377 | return -ENOMEM; | |
6378 | ||
6379 | for (i = 0; i < v_budget; i++) | |
6380 | pf->msix_entries[i].entry = i; | |
6381 | vec = i40e_reserve_msix_vectors(pf, v_budget); | |
a34977ba ASJ |
6382 | |
6383 | if (vec != v_budget) { | |
6384 | /* If we have limited resources, we will start with no vectors | |
6385 | * for the special features and then allocate vectors to some | |
6386 | * of these features based on the policy and at the end disable | |
6387 | * the features that did not get any vectors. | |
6388 | */ | |
6389 | pf->num_vmdq_msix = 0; | |
6390 | } | |
6391 | ||
41c445ff JB |
6392 | if (vec < I40E_MIN_MSIX) { |
6393 | pf->flags &= ~I40E_FLAG_MSIX_ENABLED; | |
6394 | kfree(pf->msix_entries); | |
6395 | pf->msix_entries = NULL; | |
6396 | return -ENODEV; | |
6397 | ||
6398 | } else if (vec == I40E_MIN_MSIX) { | |
6399 | /* Adjust for minimal MSIX use */ | |
41c445ff JB |
6400 | pf->num_vmdq_vsis = 0; |
6401 | pf->num_vmdq_qps = 0; | |
41c445ff JB |
6402 | pf->num_lan_qps = 1; |
6403 | pf->num_lan_msix = 1; | |
6404 | ||
6405 | } else if (vec != v_budget) { | |
a34977ba ASJ |
6406 | /* reserve the misc vector */ |
6407 | vec--; | |
6408 | ||
41c445ff JB |
6409 | /* Scale vector usage down */ |
6410 | pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */ | |
a34977ba | 6411 | pf->num_vmdq_vsis = 1; |
41c445ff JB |
6412 | |
6413 | /* partition out the remaining vectors */ | |
6414 | switch (vec) { | |
6415 | case 2: | |
41c445ff JB |
6416 | pf->num_lan_msix = 1; |
6417 | break; | |
6418 | case 3: | |
41c445ff JB |
6419 | pf->num_lan_msix = 2; |
6420 | break; | |
6421 | default: | |
6422 | pf->num_lan_msix = min_t(int, (vec / 2), | |
6423 | pf->num_lan_qps); | |
6424 | pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix), | |
6425 | I40E_DEFAULT_NUM_VMDQ_VSI); | |
6426 | break; | |
6427 | } | |
6428 | } | |
6429 | ||
a34977ba ASJ |
6430 | if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && |
6431 | (pf->num_vmdq_msix == 0)) { | |
6432 | dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n"); | |
6433 | pf->flags &= ~I40E_FLAG_VMDQ_ENABLED; | |
6434 | } | |
41c445ff JB |
6435 | return err; |
6436 | } | |
6437 | ||
493fb300 | 6438 | /** |
90e04070 | 6439 | * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector |
493fb300 AD |
6440 | * @vsi: the VSI being configured |
6441 | * @v_idx: index of the vector in the vsi struct | |
6442 | * | |
6443 | * We allocate one q_vector. If allocation fails we return -ENOMEM. | |
6444 | **/ | |
90e04070 | 6445 | static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx) |
493fb300 AD |
6446 | { |
6447 | struct i40e_q_vector *q_vector; | |
6448 | ||
6449 | /* allocate q_vector */ | |
6450 | q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL); | |
6451 | if (!q_vector) | |
6452 | return -ENOMEM; | |
6453 | ||
6454 | q_vector->vsi = vsi; | |
6455 | q_vector->v_idx = v_idx; | |
6456 | cpumask_set_cpu(v_idx, &q_vector->affinity_mask); | |
6457 | if (vsi->netdev) | |
6458 | netif_napi_add(vsi->netdev, &q_vector->napi, | |
eefeacee | 6459 | i40e_napi_poll, NAPI_POLL_WEIGHT); |
493fb300 | 6460 | |
cd0b6fa6 AD |
6461 | q_vector->rx.latency_range = I40E_LOW_LATENCY; |
6462 | q_vector->tx.latency_range = I40E_LOW_LATENCY; | |
6463 | ||
493fb300 AD |
6464 | /* tie q_vector and vsi together */ |
6465 | vsi->q_vectors[v_idx] = q_vector; | |
6466 | ||
6467 | return 0; | |
6468 | } | |
6469 | ||
41c445ff | 6470 | /** |
90e04070 | 6471 | * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors |
41c445ff JB |
6472 | * @vsi: the VSI being configured |
6473 | * | |
6474 | * We allocate one q_vector per queue interrupt. If allocation fails we | |
6475 | * return -ENOMEM. | |
6476 | **/ | |
90e04070 | 6477 | static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi) |
41c445ff JB |
6478 | { |
6479 | struct i40e_pf *pf = vsi->back; | |
6480 | int v_idx, num_q_vectors; | |
493fb300 | 6481 | int err; |
41c445ff JB |
6482 | |
6483 | /* if not MSIX, give the one vector only to the LAN VSI */ | |
6484 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) | |
6485 | num_q_vectors = vsi->num_q_vectors; | |
6486 | else if (vsi == pf->vsi[pf->lan_vsi]) | |
6487 | num_q_vectors = 1; | |
6488 | else | |
6489 | return -EINVAL; | |
6490 | ||
41c445ff | 6491 | for (v_idx = 0; v_idx < num_q_vectors; v_idx++) { |
90e04070 | 6492 | err = i40e_vsi_alloc_q_vector(vsi, v_idx); |
493fb300 AD |
6493 | if (err) |
6494 | goto err_out; | |
41c445ff JB |
6495 | } |
6496 | ||
6497 | return 0; | |
493fb300 AD |
6498 | |
6499 | err_out: | |
6500 | while (v_idx--) | |
6501 | i40e_free_q_vector(vsi, v_idx); | |
6502 | ||
6503 | return err; | |
41c445ff JB |
6504 | } |
6505 | ||
6506 | /** | |
6507 | * i40e_init_interrupt_scheme - Determine proper interrupt scheme | |
6508 | * @pf: board private structure to initialize | |
6509 | **/ | |
6510 | static void i40e_init_interrupt_scheme(struct i40e_pf *pf) | |
6511 | { | |
6512 | int err = 0; | |
6513 | ||
6514 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
6515 | err = i40e_init_msix(pf); | |
6516 | if (err) { | |
60ea5f83 JB |
6517 | pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | |
6518 | I40E_FLAG_RSS_ENABLED | | |
4d9b6043 | 6519 | I40E_FLAG_DCB_CAPABLE | |
60ea5f83 JB |
6520 | I40E_FLAG_SRIOV_ENABLED | |
6521 | I40E_FLAG_FD_SB_ENABLED | | |
6522 | I40E_FLAG_FD_ATR_ENABLED | | |
6523 | I40E_FLAG_VMDQ_ENABLED); | |
41c445ff JB |
6524 | |
6525 | /* rework the queue expectations without MSIX */ | |
6526 | i40e_determine_queue_usage(pf); | |
6527 | } | |
6528 | } | |
6529 | ||
6530 | if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) && | |
6531 | (pf->flags & I40E_FLAG_MSI_ENABLED)) { | |
77fa28be | 6532 | dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n"); |
41c445ff JB |
6533 | err = pci_enable_msi(pf->pdev); |
6534 | if (err) { | |
958a3e3b | 6535 | dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err); |
41c445ff JB |
6536 | pf->flags &= ~I40E_FLAG_MSI_ENABLED; |
6537 | } | |
6538 | } | |
6539 | ||
958a3e3b | 6540 | if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED))) |
77fa28be | 6541 | dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n"); |
958a3e3b | 6542 | |
41c445ff JB |
6543 | /* track first vector for misc interrupts */ |
6544 | err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1); | |
6545 | } | |
6546 | ||
6547 | /** | |
6548 | * i40e_setup_misc_vector - Setup the misc vector to handle non queue events | |
6549 | * @pf: board private structure | |
6550 | * | |
6551 | * This sets up the handler for MSIX 0, which is used to manage the | |
6552 | * non-queue interrupts, e.g. AdminQ and errors. This is not used | |
6553 | * when in MSI or Legacy interrupt mode. | |
6554 | **/ | |
6555 | static int i40e_setup_misc_vector(struct i40e_pf *pf) | |
6556 | { | |
6557 | struct i40e_hw *hw = &pf->hw; | |
6558 | int err = 0; | |
6559 | ||
6560 | /* Only request the irq if this is the first time through, and | |
6561 | * not when we're rebuilding after a Reset | |
6562 | */ | |
6563 | if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) { | |
6564 | err = request_irq(pf->msix_entries[0].vector, | |
6565 | i40e_intr, 0, pf->misc_int_name, pf); | |
6566 | if (err) { | |
6567 | dev_info(&pf->pdev->dev, | |
77fa28be CS |
6568 | "request_irq for %s failed: %d\n", |
6569 | pf->misc_int_name, err); | |
41c445ff JB |
6570 | return -EFAULT; |
6571 | } | |
6572 | } | |
6573 | ||
6574 | i40e_enable_misc_int_causes(hw); | |
6575 | ||
6576 | /* associate no queues to the misc vector */ | |
6577 | wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST); | |
6578 | wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K); | |
6579 | ||
6580 | i40e_flush(hw); | |
6581 | ||
6582 | i40e_irq_dynamic_enable_icr0(pf); | |
6583 | ||
6584 | return err; | |
6585 | } | |
6586 | ||
6587 | /** | |
6588 | * i40e_config_rss - Prepare for RSS if used | |
6589 | * @pf: board private structure | |
6590 | **/ | |
6591 | static int i40e_config_rss(struct i40e_pf *pf) | |
6592 | { | |
41c445ff JB |
6593 | /* Set of random keys generated using kernel random number generator */ |
6594 | static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687, | |
6595 | 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377, | |
6596 | 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d, | |
6597 | 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be}; | |
4617e8c0 ASJ |
6598 | struct i40e_hw *hw = &pf->hw; |
6599 | u32 lut = 0; | |
6600 | int i, j; | |
6601 | u64 hena; | |
e157ea30 | 6602 | u32 reg_val; |
41c445ff JB |
6603 | |
6604 | /* Fill out hash function seed */ | |
6605 | for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++) | |
6606 | wr32(hw, I40E_PFQF_HKEY(i), seed[i]); | |
6607 | ||
6608 | /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ | |
6609 | hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | | |
6610 | ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); | |
12dc4fe3 | 6611 | hena |= I40E_DEFAULT_RSS_HENA; |
41c445ff JB |
6612 | wr32(hw, I40E_PFQF_HENA(0), (u32)hena); |
6613 | wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); | |
6614 | ||
e157ea30 CW |
6615 | /* Check capability and Set table size and register per hw expectation*/ |
6616 | reg_val = rd32(hw, I40E_PFQF_CTL_0); | |
6617 | if (hw->func_caps.rss_table_size == 512) { | |
6618 | reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512; | |
6619 | pf->rss_table_size = 512; | |
6620 | } else { | |
6621 | pf->rss_table_size = 128; | |
6622 | reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512; | |
6623 | } | |
6624 | wr32(hw, I40E_PFQF_CTL_0, reg_val); | |
6625 | ||
41c445ff | 6626 | /* Populate the LUT with max no. of queues in round robin fashion */ |
e157ea30 | 6627 | for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) { |
41c445ff JB |
6628 | |
6629 | /* The assumption is that lan qp count will be the highest | |
6630 | * qp count for any PF VSI that needs RSS. | |
6631 | * If multiple VSIs need RSS support, all the qp counts | |
6632 | * for those VSIs should be a power of 2 for RSS to work. | |
6633 | * If LAN VSI is the only consumer for RSS then this requirement | |
6634 | * is not necessary. | |
6635 | */ | |
6636 | if (j == pf->rss_size) | |
6637 | j = 0; | |
6638 | /* lut = 4-byte sliding window of 4 lut entries */ | |
6639 | lut = (lut << 8) | (j & | |
6640 | ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1)); | |
6641 | /* On i = 3, we have 4 entries in lut; write to the register */ | |
6642 | if ((i & 3) == 3) | |
6643 | wr32(hw, I40E_PFQF_HLUT(i >> 2), lut); | |
6644 | } | |
6645 | i40e_flush(hw); | |
6646 | ||
6647 | return 0; | |
6648 | } | |
6649 | ||
f8ff1464 ASJ |
6650 | /** |
6651 | * i40e_reconfig_rss_queues - change number of queues for rss and rebuild | |
6652 | * @pf: board private structure | |
6653 | * @queue_count: the requested queue count for rss. | |
6654 | * | |
6655 | * returns 0 if rss is not enabled, if enabled returns the final rss queue | |
6656 | * count which may be different from the requested queue count. | |
6657 | **/ | |
6658 | int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count) | |
6659 | { | |
6660 | if (!(pf->flags & I40E_FLAG_RSS_ENABLED)) | |
6661 | return 0; | |
6662 | ||
6663 | queue_count = min_t(int, queue_count, pf->rss_size_max); | |
f8ff1464 ASJ |
6664 | |
6665 | if (queue_count != pf->rss_size) { | |
f8ff1464 ASJ |
6666 | i40e_prep_for_reset(pf); |
6667 | ||
f8ff1464 ASJ |
6668 | pf->rss_size = queue_count; |
6669 | ||
6670 | i40e_reset_and_rebuild(pf, true); | |
6671 | i40e_config_rss(pf); | |
6672 | } | |
6673 | dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size); | |
6674 | return pf->rss_size; | |
6675 | } | |
6676 | ||
41c445ff JB |
6677 | /** |
6678 | * i40e_sw_init - Initialize general software structures (struct i40e_pf) | |
6679 | * @pf: board private structure to initialize | |
6680 | * | |
6681 | * i40e_sw_init initializes the Adapter private data structure. | |
6682 | * Fields are initialized based on PCI device information and | |
6683 | * OS network device settings (MTU size). | |
6684 | **/ | |
6685 | static int i40e_sw_init(struct i40e_pf *pf) | |
6686 | { | |
6687 | int err = 0; | |
6688 | int size; | |
6689 | ||
6690 | pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE, | |
6691 | (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)); | |
2759997b | 6692 | pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG; |
41c445ff JB |
6693 | if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) { |
6694 | if (I40E_DEBUG_USER & debug) | |
6695 | pf->hw.debug_mask = debug; | |
6696 | pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER), | |
6697 | I40E_DEFAULT_MSG_ENABLE); | |
6698 | } | |
6699 | ||
6700 | /* Set default capability flags */ | |
6701 | pf->flags = I40E_FLAG_RX_CSUM_ENABLED | | |
6702 | I40E_FLAG_MSI_ENABLED | | |
6703 | I40E_FLAG_MSIX_ENABLED | | |
41c445ff JB |
6704 | I40E_FLAG_RX_1BUF_ENABLED; |
6705 | ||
ca99eb99 MW |
6706 | /* Set default ITR */ |
6707 | pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF; | |
6708 | pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF; | |
6709 | ||
7134f9ce JB |
6710 | /* Depending on PF configurations, it is possible that the RSS |
6711 | * maximum might end up larger than the available queues | |
6712 | */ | |
41c445ff | 6713 | pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width; |
7134f9ce JB |
6714 | pf->rss_size_max = min_t(int, pf->rss_size_max, |
6715 | pf->hw.func_caps.num_tx_qp); | |
41c445ff JB |
6716 | if (pf->hw.func_caps.rss) { |
6717 | pf->flags |= I40E_FLAG_RSS_ENABLED; | |
bf051a3b | 6718 | pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus()); |
41c445ff JB |
6719 | } else { |
6720 | pf->rss_size = 1; | |
6721 | } | |
6722 | ||
2050bc65 CS |
6723 | /* MFP mode enabled */ |
6724 | if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) { | |
6725 | pf->flags |= I40E_FLAG_MFP_ENABLED; | |
6726 | dev_info(&pf->pdev->dev, "MFP mode Enabled\n"); | |
6727 | } | |
6728 | ||
cbf61325 ASJ |
6729 | /* FW/NVM is not yet fixed in this regard */ |
6730 | if ((pf->hw.func_caps.fd_filters_guaranteed > 0) || | |
6731 | (pf->hw.func_caps.fd_filters_best_effort > 0)) { | |
6732 | pf->flags |= I40E_FLAG_FD_ATR_ENABLED; | |
6733 | pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE; | |
433c47de ASJ |
6734 | /* Setup a counter for fd_atr per pf */ |
6735 | pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id); | |
cbf61325 | 6736 | if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) { |
60ea5f83 | 6737 | pf->flags |= I40E_FLAG_FD_SB_ENABLED; |
433c47de ASJ |
6738 | /* Setup a counter for fd_sb per pf */ |
6739 | pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); | |
cbf61325 ASJ |
6740 | } else { |
6741 | dev_info(&pf->pdev->dev, | |
0b67584f | 6742 | "Flow Director Sideband mode Disabled in MFP mode\n"); |
41c445ff | 6743 | } |
cbf61325 ASJ |
6744 | pf->fdir_pf_filter_count = |
6745 | pf->hw.func_caps.fd_filters_guaranteed; | |
6746 | pf->hw.fdir_shared_filter_count = | |
6747 | pf->hw.func_caps.fd_filters_best_effort; | |
41c445ff JB |
6748 | } |
6749 | ||
6750 | if (pf->hw.func_caps.vmdq) { | |
6751 | pf->flags |= I40E_FLAG_VMDQ_ENABLED; | |
6752 | pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI; | |
6753 | pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ; | |
6754 | } | |
6755 | ||
41c445ff JB |
6756 | #ifdef CONFIG_PCI_IOV |
6757 | if (pf->hw.func_caps.num_vfs) { | |
6758 | pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF; | |
6759 | pf->flags |= I40E_FLAG_SRIOV_ENABLED; | |
6760 | pf->num_req_vfs = min_t(int, | |
6761 | pf->hw.func_caps.num_vfs, | |
6762 | I40E_MAX_VF_COUNT); | |
6763 | } | |
6764 | #endif /* CONFIG_PCI_IOV */ | |
6765 | pf->eeprom_version = 0xDEAD; | |
6766 | pf->lan_veb = I40E_NO_VEB; | |
6767 | pf->lan_vsi = I40E_NO_VSI; | |
6768 | ||
6769 | /* set up queue assignment tracking */ | |
6770 | size = sizeof(struct i40e_lump_tracking) | |
6771 | + (sizeof(u16) * pf->hw.func_caps.num_tx_qp); | |
6772 | pf->qp_pile = kzalloc(size, GFP_KERNEL); | |
6773 | if (!pf->qp_pile) { | |
6774 | err = -ENOMEM; | |
6775 | goto sw_init_done; | |
6776 | } | |
6777 | pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp; | |
6778 | pf->qp_pile->search_hint = 0; | |
6779 | ||
6780 | /* set up vector assignment tracking */ | |
6781 | size = sizeof(struct i40e_lump_tracking) | |
6782 | + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors); | |
6783 | pf->irq_pile = kzalloc(size, GFP_KERNEL); | |
6784 | if (!pf->irq_pile) { | |
6785 | kfree(pf->qp_pile); | |
6786 | err = -ENOMEM; | |
6787 | goto sw_init_done; | |
6788 | } | |
6789 | pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors; | |
6790 | pf->irq_pile->search_hint = 0; | |
6791 | ||
6792 | mutex_init(&pf->switch_mutex); | |
6793 | ||
6794 | sw_init_done: | |
6795 | return err; | |
6796 | } | |
6797 | ||
7c3c288b ASJ |
6798 | /** |
6799 | * i40e_set_ntuple - set the ntuple feature flag and take action | |
6800 | * @pf: board private structure to initialize | |
6801 | * @features: the feature set that the stack is suggesting | |
6802 | * | |
6803 | * returns a bool to indicate if reset needs to happen | |
6804 | **/ | |
6805 | bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features) | |
6806 | { | |
6807 | bool need_reset = false; | |
6808 | ||
6809 | /* Check if Flow Director n-tuple support was enabled or disabled. If | |
6810 | * the state changed, we need to reset. | |
6811 | */ | |
6812 | if (features & NETIF_F_NTUPLE) { | |
6813 | /* Enable filters and mark for reset */ | |
6814 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) | |
6815 | need_reset = true; | |
6816 | pf->flags |= I40E_FLAG_FD_SB_ENABLED; | |
6817 | } else { | |
6818 | /* turn off filters, mark for reset and clear SW filter list */ | |
6819 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { | |
6820 | need_reset = true; | |
6821 | i40e_fdir_filter_exit(pf); | |
6822 | } | |
6823 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
6824 | /* if ATR was disabled it can be re-enabled. */ | |
6825 | if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) | |
6826 | pf->flags |= I40E_FLAG_FD_ATR_ENABLED; | |
6827 | } | |
6828 | return need_reset; | |
6829 | } | |
6830 | ||
41c445ff JB |
6831 | /** |
6832 | * i40e_set_features - set the netdev feature flags | |
6833 | * @netdev: ptr to the netdev being adjusted | |
6834 | * @features: the feature set that the stack is suggesting | |
6835 | **/ | |
6836 | static int i40e_set_features(struct net_device *netdev, | |
6837 | netdev_features_t features) | |
6838 | { | |
6839 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
6840 | struct i40e_vsi *vsi = np->vsi; | |
7c3c288b ASJ |
6841 | struct i40e_pf *pf = vsi->back; |
6842 | bool need_reset; | |
41c445ff JB |
6843 | |
6844 | if (features & NETIF_F_HW_VLAN_CTAG_RX) | |
6845 | i40e_vlan_stripping_enable(vsi); | |
6846 | else | |
6847 | i40e_vlan_stripping_disable(vsi); | |
6848 | ||
7c3c288b ASJ |
6849 | need_reset = i40e_set_ntuple(pf, features); |
6850 | ||
6851 | if (need_reset) | |
6852 | i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED)); | |
6853 | ||
41c445ff JB |
6854 | return 0; |
6855 | } | |
6856 | ||
a1c9a9d9 JK |
6857 | #ifdef CONFIG_I40E_VXLAN |
6858 | /** | |
6859 | * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port | |
6860 | * @pf: board private structure | |
6861 | * @port: The UDP port to look up | |
6862 | * | |
6863 | * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found | |
6864 | **/ | |
6865 | static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port) | |
6866 | { | |
6867 | u8 i; | |
6868 | ||
6869 | for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) { | |
6870 | if (pf->vxlan_ports[i] == port) | |
6871 | return i; | |
6872 | } | |
6873 | ||
6874 | return i; | |
6875 | } | |
6876 | ||
6877 | /** | |
6878 | * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up | |
6879 | * @netdev: This physical port's netdev | |
6880 | * @sa_family: Socket Family that VXLAN is notifying us about | |
6881 | * @port: New UDP port number that VXLAN started listening to | |
6882 | **/ | |
6883 | static void i40e_add_vxlan_port(struct net_device *netdev, | |
6884 | sa_family_t sa_family, __be16 port) | |
6885 | { | |
6886 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
6887 | struct i40e_vsi *vsi = np->vsi; | |
6888 | struct i40e_pf *pf = vsi->back; | |
6889 | u8 next_idx; | |
6890 | u8 idx; | |
6891 | ||
6892 | if (sa_family == AF_INET6) | |
6893 | return; | |
6894 | ||
6895 | idx = i40e_get_vxlan_port_idx(pf, port); | |
6896 | ||
6897 | /* Check if port already exists */ | |
6898 | if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { | |
6899 | netdev_info(netdev, "Port %d already offloaded\n", ntohs(port)); | |
6900 | return; | |
6901 | } | |
6902 | ||
6903 | /* Now check if there is space to add the new port */ | |
6904 | next_idx = i40e_get_vxlan_port_idx(pf, 0); | |
6905 | ||
6906 | if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) { | |
6907 | netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n", | |
6908 | ntohs(port)); | |
6909 | return; | |
6910 | } | |
6911 | ||
6912 | /* New port: add it and mark its index in the bitmap */ | |
6913 | pf->vxlan_ports[next_idx] = port; | |
6914 | pf->pending_vxlan_bitmap |= (1 << next_idx); | |
6915 | ||
6916 | pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; | |
6917 | } | |
6918 | ||
6919 | /** | |
6920 | * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away | |
6921 | * @netdev: This physical port's netdev | |
6922 | * @sa_family: Socket Family that VXLAN is notifying us about | |
6923 | * @port: UDP port number that VXLAN stopped listening to | |
6924 | **/ | |
6925 | static void i40e_del_vxlan_port(struct net_device *netdev, | |
6926 | sa_family_t sa_family, __be16 port) | |
6927 | { | |
6928 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
6929 | struct i40e_vsi *vsi = np->vsi; | |
6930 | struct i40e_pf *pf = vsi->back; | |
6931 | u8 idx; | |
6932 | ||
6933 | if (sa_family == AF_INET6) | |
6934 | return; | |
6935 | ||
6936 | idx = i40e_get_vxlan_port_idx(pf, port); | |
6937 | ||
6938 | /* Check if port already exists */ | |
6939 | if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) { | |
6940 | /* if port exists, set it to 0 (mark for deletion) | |
6941 | * and make it pending | |
6942 | */ | |
6943 | pf->vxlan_ports[idx] = 0; | |
6944 | ||
6945 | pf->pending_vxlan_bitmap |= (1 << idx); | |
6946 | ||
6947 | pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC; | |
6948 | } else { | |
6949 | netdev_warn(netdev, "Port %d was not found, not deleting\n", | |
6950 | ntohs(port)); | |
6951 | } | |
6952 | } | |
6953 | ||
6954 | #endif | |
4ba0dea5 GR |
6955 | #ifdef HAVE_FDB_OPS |
6956 | #ifdef USE_CONST_DEV_UC_CHAR | |
6957 | static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[], | |
6958 | struct net_device *dev, | |
6959 | const unsigned char *addr, | |
6960 | u16 flags) | |
6961 | #else | |
6962 | static int i40e_ndo_fdb_add(struct ndmsg *ndm, | |
6963 | struct net_device *dev, | |
6964 | unsigned char *addr, | |
6965 | u16 flags) | |
6966 | #endif | |
6967 | { | |
6968 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
6969 | struct i40e_pf *pf = np->vsi->back; | |
6970 | int err = 0; | |
6971 | ||
6972 | if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED)) | |
6973 | return -EOPNOTSUPP; | |
6974 | ||
6975 | /* Hardware does not support aging addresses so if a | |
6976 | * ndm_state is given only allow permanent addresses | |
6977 | */ | |
6978 | if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) { | |
6979 | netdev_info(dev, "FDB only supports static addresses\n"); | |
6980 | return -EINVAL; | |
6981 | } | |
6982 | ||
6983 | if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) | |
6984 | err = dev_uc_add_excl(dev, addr); | |
6985 | else if (is_multicast_ether_addr(addr)) | |
6986 | err = dev_mc_add_excl(dev, addr); | |
6987 | else | |
6988 | err = -EINVAL; | |
6989 | ||
6990 | /* Only return duplicate errors if NLM_F_EXCL is set */ | |
6991 | if (err == -EEXIST && !(flags & NLM_F_EXCL)) | |
6992 | err = 0; | |
6993 | ||
6994 | return err; | |
6995 | } | |
6996 | ||
6997 | #ifndef USE_DEFAULT_FDB_DEL_DUMP | |
6998 | #ifdef USE_CONST_DEV_UC_CHAR | |
6999 | static int i40e_ndo_fdb_del(struct ndmsg *ndm, | |
7000 | struct net_device *dev, | |
7001 | const unsigned char *addr) | |
7002 | #else | |
7003 | static int i40e_ndo_fdb_del(struct ndmsg *ndm, | |
7004 | struct net_device *dev, | |
7005 | unsigned char *addr) | |
7006 | #endif | |
7007 | { | |
7008 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
7009 | struct i40e_pf *pf = np->vsi->back; | |
7010 | int err = -EOPNOTSUPP; | |
7011 | ||
7012 | if (ndm->ndm_state & NUD_PERMANENT) { | |
7013 | netdev_info(dev, "FDB only supports static addresses\n"); | |
7014 | return -EINVAL; | |
7015 | } | |
7016 | ||
7017 | if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { | |
7018 | if (is_unicast_ether_addr(addr)) | |
7019 | err = dev_uc_del(dev, addr); | |
7020 | else if (is_multicast_ether_addr(addr)) | |
7021 | err = dev_mc_del(dev, addr); | |
7022 | else | |
7023 | err = -EINVAL; | |
7024 | } | |
7025 | ||
7026 | return err; | |
7027 | } | |
7028 | ||
7029 | static int i40e_ndo_fdb_dump(struct sk_buff *skb, | |
7030 | struct netlink_callback *cb, | |
7031 | struct net_device *dev, | |
7032 | int idx) | |
7033 | { | |
7034 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
7035 | struct i40e_pf *pf = np->vsi->back; | |
7036 | ||
7037 | if (pf->flags & I40E_FLAG_SRIOV_ENABLED) | |
7038 | idx = ndo_dflt_fdb_dump(skb, cb, dev, idx); | |
7039 | ||
7040 | return idx; | |
7041 | } | |
7042 | ||
7043 | #endif /* USE_DEFAULT_FDB_DEL_DUMP */ | |
7044 | #endif /* HAVE_FDB_OPS */ | |
41c445ff JB |
7045 | static const struct net_device_ops i40e_netdev_ops = { |
7046 | .ndo_open = i40e_open, | |
7047 | .ndo_stop = i40e_close, | |
7048 | .ndo_start_xmit = i40e_lan_xmit_frame, | |
7049 | .ndo_get_stats64 = i40e_get_netdev_stats_struct, | |
7050 | .ndo_set_rx_mode = i40e_set_rx_mode, | |
7051 | .ndo_validate_addr = eth_validate_addr, | |
7052 | .ndo_set_mac_address = i40e_set_mac, | |
7053 | .ndo_change_mtu = i40e_change_mtu, | |
beb0dff1 | 7054 | .ndo_do_ioctl = i40e_ioctl, |
41c445ff JB |
7055 | .ndo_tx_timeout = i40e_tx_timeout, |
7056 | .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid, | |
7057 | .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid, | |
7058 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
7059 | .ndo_poll_controller = i40e_netpoll, | |
7060 | #endif | |
7061 | .ndo_setup_tc = i40e_setup_tc, | |
7062 | .ndo_set_features = i40e_set_features, | |
7063 | .ndo_set_vf_mac = i40e_ndo_set_vf_mac, | |
7064 | .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan, | |
ed616689 | 7065 | .ndo_set_vf_rate = i40e_ndo_set_vf_bw, |
41c445ff | 7066 | .ndo_get_vf_config = i40e_ndo_get_vf_config, |
588aefa0 | 7067 | .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state, |
c674d125 | 7068 | .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofck, |
a1c9a9d9 JK |
7069 | #ifdef CONFIG_I40E_VXLAN |
7070 | .ndo_add_vxlan_port = i40e_add_vxlan_port, | |
7071 | .ndo_del_vxlan_port = i40e_del_vxlan_port, | |
7072 | #endif | |
4ba0dea5 GR |
7073 | #ifdef HAVE_FDB_OPS |
7074 | .ndo_fdb_add = i40e_ndo_fdb_add, | |
7075 | #ifndef USE_DEFAULT_FDB_DEL_DUMP | |
7076 | .ndo_fdb_del = i40e_ndo_fdb_del, | |
7077 | .ndo_fdb_dump = i40e_ndo_fdb_dump, | |
7078 | #endif | |
7079 | #endif | |
41c445ff JB |
7080 | }; |
7081 | ||
7082 | /** | |
7083 | * i40e_config_netdev - Setup the netdev flags | |
7084 | * @vsi: the VSI being configured | |
7085 | * | |
7086 | * Returns 0 on success, negative value on failure | |
7087 | **/ | |
7088 | static int i40e_config_netdev(struct i40e_vsi *vsi) | |
7089 | { | |
1a10370a | 7090 | u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
41c445ff JB |
7091 | struct i40e_pf *pf = vsi->back; |
7092 | struct i40e_hw *hw = &pf->hw; | |
7093 | struct i40e_netdev_priv *np; | |
7094 | struct net_device *netdev; | |
7095 | u8 mac_addr[ETH_ALEN]; | |
7096 | int etherdev_size; | |
7097 | ||
7098 | etherdev_size = sizeof(struct i40e_netdev_priv); | |
f8ff1464 | 7099 | netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs); |
41c445ff JB |
7100 | if (!netdev) |
7101 | return -ENOMEM; | |
7102 | ||
7103 | vsi->netdev = netdev; | |
7104 | np = netdev_priv(netdev); | |
7105 | np->vsi = vsi; | |
7106 | ||
d70e941b | 7107 | netdev->hw_enc_features |= NETIF_F_IP_CSUM | |
41c445ff | 7108 | NETIF_F_GSO_UDP_TUNNEL | |
d70e941b | 7109 | NETIF_F_TSO; |
41c445ff JB |
7110 | |
7111 | netdev->features = NETIF_F_SG | | |
7112 | NETIF_F_IP_CSUM | | |
7113 | NETIF_F_SCTP_CSUM | | |
7114 | NETIF_F_HIGHDMA | | |
7115 | NETIF_F_GSO_UDP_TUNNEL | | |
7116 | NETIF_F_HW_VLAN_CTAG_TX | | |
7117 | NETIF_F_HW_VLAN_CTAG_RX | | |
7118 | NETIF_F_HW_VLAN_CTAG_FILTER | | |
7119 | NETIF_F_IPV6_CSUM | | |
7120 | NETIF_F_TSO | | |
059dab69 | 7121 | NETIF_F_TSO_ECN | |
41c445ff JB |
7122 | NETIF_F_TSO6 | |
7123 | NETIF_F_RXCSUM | | |
7124 | NETIF_F_RXHASH | | |
7125 | 0; | |
7126 | ||
2e86a0b6 ASJ |
7127 | if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) |
7128 | netdev->features |= NETIF_F_NTUPLE; | |
7129 | ||
41c445ff JB |
7130 | /* copy netdev features into list of user selectable features */ |
7131 | netdev->hw_features |= netdev->features; | |
7132 | ||
7133 | if (vsi->type == I40E_VSI_MAIN) { | |
7134 | SET_NETDEV_DEV(netdev, &pf->pdev->dev); | |
9a173901 | 7135 | ether_addr_copy(mac_addr, hw->mac.perm_addr); |
8c27d42e GR |
7136 | /* The following two steps are necessary to prevent reception |
7137 | * of tagged packets - by default the NVM loads a MAC-VLAN | |
7138 | * filter that will accept any tagged packet. This is to | |
7139 | * prevent that during normal operations until a specific | |
7140 | * VLAN tag filter has been set. | |
7141 | */ | |
7142 | i40e_rm_default_mac_filter(vsi, mac_addr); | |
7143 | i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true); | |
41c445ff JB |
7144 | } else { |
7145 | /* relate the VSI_VMDQ name to the VSI_MAIN name */ | |
7146 | snprintf(netdev->name, IFNAMSIZ, "%sv%%d", | |
7147 | pf->vsi[pf->lan_vsi]->netdev->name); | |
7148 | random_ether_addr(mac_addr); | |
7149 | i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false); | |
7150 | } | |
1a10370a | 7151 | i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false); |
41c445ff | 7152 | |
9a173901 GR |
7153 | ether_addr_copy(netdev->dev_addr, mac_addr); |
7154 | ether_addr_copy(netdev->perm_addr, mac_addr); | |
41c445ff JB |
7155 | /* vlan gets same features (except vlan offload) |
7156 | * after any tweaks for specific VSI types | |
7157 | */ | |
7158 | netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX | | |
7159 | NETIF_F_HW_VLAN_CTAG_RX | | |
7160 | NETIF_F_HW_VLAN_CTAG_FILTER); | |
7161 | netdev->priv_flags |= IFF_UNICAST_FLT; | |
7162 | netdev->priv_flags |= IFF_SUPP_NOFCS; | |
7163 | /* Setup netdev TC information */ | |
7164 | i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc); | |
7165 | ||
7166 | netdev->netdev_ops = &i40e_netdev_ops; | |
7167 | netdev->watchdog_timeo = 5 * HZ; | |
7168 | i40e_set_ethtool_ops(netdev); | |
7169 | ||
7170 | return 0; | |
7171 | } | |
7172 | ||
7173 | /** | |
7174 | * i40e_vsi_delete - Delete a VSI from the switch | |
7175 | * @vsi: the VSI being removed | |
7176 | * | |
7177 | * Returns 0 on success, negative value on failure | |
7178 | **/ | |
7179 | static void i40e_vsi_delete(struct i40e_vsi *vsi) | |
7180 | { | |
7181 | /* remove default VSI is not allowed */ | |
7182 | if (vsi == vsi->back->vsi[vsi->back->lan_vsi]) | |
7183 | return; | |
7184 | ||
41c445ff | 7185 | i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL); |
41c445ff JB |
7186 | } |
7187 | ||
7188 | /** | |
7189 | * i40e_add_vsi - Add a VSI to the switch | |
7190 | * @vsi: the VSI being configured | |
7191 | * | |
7192 | * This initializes a VSI context depending on the VSI type to be added and | |
7193 | * passes it down to the add_vsi aq command. | |
7194 | **/ | |
7195 | static int i40e_add_vsi(struct i40e_vsi *vsi) | |
7196 | { | |
7197 | int ret = -ENODEV; | |
7198 | struct i40e_mac_filter *f, *ftmp; | |
7199 | struct i40e_pf *pf = vsi->back; | |
7200 | struct i40e_hw *hw = &pf->hw; | |
7201 | struct i40e_vsi_context ctxt; | |
7202 | u8 enabled_tc = 0x1; /* TC0 enabled */ | |
7203 | int f_count = 0; | |
7204 | ||
7205 | memset(&ctxt, 0, sizeof(ctxt)); | |
7206 | switch (vsi->type) { | |
7207 | case I40E_VSI_MAIN: | |
7208 | /* The PF's main VSI is already setup as part of the | |
7209 | * device initialization, so we'll not bother with | |
7210 | * the add_vsi call, but we will retrieve the current | |
7211 | * VSI context. | |
7212 | */ | |
7213 | ctxt.seid = pf->main_vsi_seid; | |
7214 | ctxt.pf_num = pf->hw.pf_id; | |
7215 | ctxt.vf_num = 0; | |
7216 | ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL); | |
7217 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
7218 | if (ret) { | |
7219 | dev_info(&pf->pdev->dev, | |
7220 | "couldn't get pf vsi config, err %d, aq_err %d\n", | |
7221 | ret, pf->hw.aq.asq_last_status); | |
7222 | return -ENOENT; | |
7223 | } | |
7224 | memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); | |
7225 | vsi->info.valid_sections = 0; | |
7226 | ||
7227 | vsi->seid = ctxt.seid; | |
7228 | vsi->id = ctxt.vsi_number; | |
7229 | ||
7230 | enabled_tc = i40e_pf_get_tc_map(pf); | |
7231 | ||
7232 | /* MFP mode setup queue map and update VSI */ | |
7233 | if (pf->flags & I40E_FLAG_MFP_ENABLED) { | |
7234 | memset(&ctxt, 0, sizeof(ctxt)); | |
7235 | ctxt.seid = pf->main_vsi_seid; | |
7236 | ctxt.pf_num = pf->hw.pf_id; | |
7237 | ctxt.vf_num = 0; | |
7238 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false); | |
7239 | ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL); | |
7240 | if (ret) { | |
7241 | dev_info(&pf->pdev->dev, | |
7242 | "update vsi failed, aq_err=%d\n", | |
7243 | pf->hw.aq.asq_last_status); | |
7244 | ret = -ENOENT; | |
7245 | goto err; | |
7246 | } | |
7247 | /* update the local VSI info queue map */ | |
7248 | i40e_vsi_update_queue_map(vsi, &ctxt); | |
7249 | vsi->info.valid_sections = 0; | |
7250 | } else { | |
7251 | /* Default/Main VSI is only enabled for TC0 | |
7252 | * reconfigure it to enable all TCs that are | |
7253 | * available on the port in SFP mode. | |
7254 | */ | |
7255 | ret = i40e_vsi_config_tc(vsi, enabled_tc); | |
7256 | if (ret) { | |
7257 | dev_info(&pf->pdev->dev, | |
7258 | "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n", | |
7259 | enabled_tc, ret, | |
7260 | pf->hw.aq.asq_last_status); | |
7261 | ret = -ENOENT; | |
7262 | } | |
7263 | } | |
7264 | break; | |
7265 | ||
7266 | case I40E_VSI_FDIR: | |
cbf61325 ASJ |
7267 | ctxt.pf_num = hw->pf_id; |
7268 | ctxt.vf_num = 0; | |
7269 | ctxt.uplink_seid = vsi->uplink_seid; | |
7270 | ctxt.connection_type = 0x1; /* regular data port */ | |
7271 | ctxt.flags = I40E_AQ_VSI_TYPE_PF; | |
41c445ff | 7272 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); |
41c445ff JB |
7273 | break; |
7274 | ||
7275 | case I40E_VSI_VMDQ2: | |
7276 | ctxt.pf_num = hw->pf_id; | |
7277 | ctxt.vf_num = 0; | |
7278 | ctxt.uplink_seid = vsi->uplink_seid; | |
7279 | ctxt.connection_type = 0x1; /* regular data port */ | |
7280 | ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2; | |
7281 | ||
7282 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
7283 | ||
7284 | /* This VSI is connected to VEB so the switch_id | |
7285 | * should be set to zero by default. | |
7286 | */ | |
7287 | ctxt.info.switch_id = 0; | |
7288 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB); | |
7289 | ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
7290 | ||
7291 | /* Setup the VSI tx/rx queue map for TC0 only for now */ | |
7292 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
7293 | break; | |
7294 | ||
7295 | case I40E_VSI_SRIOV: | |
7296 | ctxt.pf_num = hw->pf_id; | |
7297 | ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id; | |
7298 | ctxt.uplink_seid = vsi->uplink_seid; | |
7299 | ctxt.connection_type = 0x1; /* regular data port */ | |
7300 | ctxt.flags = I40E_AQ_VSI_TYPE_VF; | |
7301 | ||
7302 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID); | |
7303 | ||
7304 | /* This VSI is connected to VEB so the switch_id | |
7305 | * should be set to zero by default. | |
7306 | */ | |
7307 | ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB); | |
7308 | ||
7309 | ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID); | |
7310 | ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL; | |
c674d125 MW |
7311 | if (pf->vf[vsi->vf_id].spoofchk) { |
7312 | ctxt.info.valid_sections |= | |
7313 | cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID); | |
7314 | ctxt.info.sec_flags |= | |
7315 | (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK | | |
7316 | I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK); | |
7317 | } | |
41c445ff JB |
7318 | /* Setup the VSI tx/rx queue map for TC0 only for now */ |
7319 | i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true); | |
7320 | break; | |
7321 | ||
7322 | default: | |
7323 | return -ENODEV; | |
7324 | } | |
7325 | ||
7326 | if (vsi->type != I40E_VSI_MAIN) { | |
7327 | ret = i40e_aq_add_vsi(hw, &ctxt, NULL); | |
7328 | if (ret) { | |
7329 | dev_info(&vsi->back->pdev->dev, | |
7330 | "add vsi failed, aq_err=%d\n", | |
7331 | vsi->back->hw.aq.asq_last_status); | |
7332 | ret = -ENOENT; | |
7333 | goto err; | |
7334 | } | |
7335 | memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info)); | |
7336 | vsi->info.valid_sections = 0; | |
7337 | vsi->seid = ctxt.seid; | |
7338 | vsi->id = ctxt.vsi_number; | |
7339 | } | |
7340 | ||
7341 | /* If macvlan filters already exist, force them to get loaded */ | |
7342 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) { | |
7343 | f->changed = true; | |
7344 | f_count++; | |
7345 | } | |
7346 | if (f_count) { | |
7347 | vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED; | |
7348 | pf->flags |= I40E_FLAG_FILTER_SYNC; | |
7349 | } | |
7350 | ||
7351 | /* Update VSI BW information */ | |
7352 | ret = i40e_vsi_get_bw_info(vsi); | |
7353 | if (ret) { | |
7354 | dev_info(&pf->pdev->dev, | |
7355 | "couldn't get vsi bw info, err %d, aq_err %d\n", | |
7356 | ret, pf->hw.aq.asq_last_status); | |
7357 | /* VSI is already added so not tearing that up */ | |
7358 | ret = 0; | |
7359 | } | |
7360 | ||
7361 | err: | |
7362 | return ret; | |
7363 | } | |
7364 | ||
7365 | /** | |
7366 | * i40e_vsi_release - Delete a VSI and free its resources | |
7367 | * @vsi: the VSI being removed | |
7368 | * | |
7369 | * Returns 0 on success or < 0 on error | |
7370 | **/ | |
7371 | int i40e_vsi_release(struct i40e_vsi *vsi) | |
7372 | { | |
7373 | struct i40e_mac_filter *f, *ftmp; | |
7374 | struct i40e_veb *veb = NULL; | |
7375 | struct i40e_pf *pf; | |
7376 | u16 uplink_seid; | |
7377 | int i, n; | |
7378 | ||
7379 | pf = vsi->back; | |
7380 | ||
7381 | /* release of a VEB-owner or last VSI is not allowed */ | |
7382 | if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) { | |
7383 | dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n", | |
7384 | vsi->seid, vsi->uplink_seid); | |
7385 | return -ENODEV; | |
7386 | } | |
7387 | if (vsi == pf->vsi[pf->lan_vsi] && | |
7388 | !test_bit(__I40E_DOWN, &pf->state)) { | |
7389 | dev_info(&pf->pdev->dev, "Can't remove PF VSI\n"); | |
7390 | return -ENODEV; | |
7391 | } | |
7392 | ||
7393 | uplink_seid = vsi->uplink_seid; | |
7394 | if (vsi->type != I40E_VSI_SRIOV) { | |
7395 | if (vsi->netdev_registered) { | |
7396 | vsi->netdev_registered = false; | |
7397 | if (vsi->netdev) { | |
7398 | /* results in a call to i40e_close() */ | |
7399 | unregister_netdev(vsi->netdev); | |
41c445ff JB |
7400 | } |
7401 | } else { | |
90ef8d47 | 7402 | i40e_vsi_close(vsi); |
41c445ff JB |
7403 | } |
7404 | i40e_vsi_disable_irq(vsi); | |
7405 | } | |
7406 | ||
7407 | list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) | |
7408 | i40e_del_filter(vsi, f->macaddr, f->vlan, | |
7409 | f->is_vf, f->is_netdev); | |
7410 | i40e_sync_vsi_filters(vsi); | |
7411 | ||
7412 | i40e_vsi_delete(vsi); | |
7413 | i40e_vsi_free_q_vectors(vsi); | |
a4866597 SN |
7414 | if (vsi->netdev) { |
7415 | free_netdev(vsi->netdev); | |
7416 | vsi->netdev = NULL; | |
7417 | } | |
41c445ff JB |
7418 | i40e_vsi_clear_rings(vsi); |
7419 | i40e_vsi_clear(vsi); | |
7420 | ||
7421 | /* If this was the last thing on the VEB, except for the | |
7422 | * controlling VSI, remove the VEB, which puts the controlling | |
7423 | * VSI onto the next level down in the switch. | |
7424 | * | |
7425 | * Well, okay, there's one more exception here: don't remove | |
7426 | * the orphan VEBs yet. We'll wait for an explicit remove request | |
7427 | * from up the network stack. | |
7428 | */ | |
505682cd | 7429 | for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
7430 | if (pf->vsi[i] && |
7431 | pf->vsi[i]->uplink_seid == uplink_seid && | |
7432 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
7433 | n++; /* count the VSIs */ | |
7434 | } | |
7435 | } | |
7436 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7437 | if (!pf->veb[i]) | |
7438 | continue; | |
7439 | if (pf->veb[i]->uplink_seid == uplink_seid) | |
7440 | n++; /* count the VEBs */ | |
7441 | if (pf->veb[i]->seid == uplink_seid) | |
7442 | veb = pf->veb[i]; | |
7443 | } | |
7444 | if (n == 0 && veb && veb->uplink_seid != 0) | |
7445 | i40e_veb_release(veb); | |
7446 | ||
7447 | return 0; | |
7448 | } | |
7449 | ||
7450 | /** | |
7451 | * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI | |
7452 | * @vsi: ptr to the VSI | |
7453 | * | |
7454 | * This should only be called after i40e_vsi_mem_alloc() which allocates the | |
7455 | * corresponding SW VSI structure and initializes num_queue_pairs for the | |
7456 | * newly allocated VSI. | |
7457 | * | |
7458 | * Returns 0 on success or negative on failure | |
7459 | **/ | |
7460 | static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi) | |
7461 | { | |
7462 | int ret = -ENOENT; | |
7463 | struct i40e_pf *pf = vsi->back; | |
7464 | ||
493fb300 | 7465 | if (vsi->q_vectors[0]) { |
41c445ff JB |
7466 | dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n", |
7467 | vsi->seid); | |
7468 | return -EEXIST; | |
7469 | } | |
7470 | ||
7471 | if (vsi->base_vector) { | |
f29eaa3d | 7472 | dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n", |
41c445ff JB |
7473 | vsi->seid, vsi->base_vector); |
7474 | return -EEXIST; | |
7475 | } | |
7476 | ||
90e04070 | 7477 | ret = i40e_vsi_alloc_q_vectors(vsi); |
41c445ff JB |
7478 | if (ret) { |
7479 | dev_info(&pf->pdev->dev, | |
7480 | "failed to allocate %d q_vector for VSI %d, ret=%d\n", | |
7481 | vsi->num_q_vectors, vsi->seid, ret); | |
7482 | vsi->num_q_vectors = 0; | |
7483 | goto vector_setup_out; | |
7484 | } | |
7485 | ||
958a3e3b SN |
7486 | if (vsi->num_q_vectors) |
7487 | vsi->base_vector = i40e_get_lump(pf, pf->irq_pile, | |
7488 | vsi->num_q_vectors, vsi->idx); | |
41c445ff JB |
7489 | if (vsi->base_vector < 0) { |
7490 | dev_info(&pf->pdev->dev, | |
f29eaa3d | 7491 | "failed to get queue tracking for VSI %d, err=%d\n", |
41c445ff JB |
7492 | vsi->seid, vsi->base_vector); |
7493 | i40e_vsi_free_q_vectors(vsi); | |
7494 | ret = -ENOENT; | |
7495 | goto vector_setup_out; | |
7496 | } | |
7497 | ||
7498 | vector_setup_out: | |
7499 | return ret; | |
7500 | } | |
7501 | ||
bc7d338f ASJ |
7502 | /** |
7503 | * i40e_vsi_reinit_setup - return and reallocate resources for a VSI | |
7504 | * @vsi: pointer to the vsi. | |
7505 | * | |
7506 | * This re-allocates a vsi's queue resources. | |
7507 | * | |
7508 | * Returns pointer to the successfully allocated and configured VSI sw struct | |
7509 | * on success, otherwise returns NULL on failure. | |
7510 | **/ | |
7511 | static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi) | |
7512 | { | |
7513 | struct i40e_pf *pf = vsi->back; | |
7514 | u8 enabled_tc; | |
7515 | int ret; | |
7516 | ||
7517 | i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx); | |
7518 | i40e_vsi_clear_rings(vsi); | |
7519 | ||
7520 | i40e_vsi_free_arrays(vsi, false); | |
7521 | i40e_set_num_rings_in_vsi(vsi); | |
7522 | ret = i40e_vsi_alloc_arrays(vsi, false); | |
7523 | if (ret) | |
7524 | goto err_vsi; | |
7525 | ||
7526 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx); | |
7527 | if (ret < 0) { | |
7528 | dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n", | |
7529 | vsi->seid, ret); | |
7530 | goto err_vsi; | |
7531 | } | |
7532 | vsi->base_queue = ret; | |
7533 | ||
7534 | /* Update the FW view of the VSI. Force a reset of TC and queue | |
7535 | * layout configurations. | |
7536 | */ | |
7537 | enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
7538 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; | |
7539 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
7540 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
7541 | ||
7542 | /* assign it some queues */ | |
7543 | ret = i40e_alloc_rings(vsi); | |
7544 | if (ret) | |
7545 | goto err_rings; | |
7546 | ||
7547 | /* map all of the rings to the q_vectors */ | |
7548 | i40e_vsi_map_rings_to_vectors(vsi); | |
7549 | return vsi; | |
7550 | ||
7551 | err_rings: | |
7552 | i40e_vsi_free_q_vectors(vsi); | |
7553 | if (vsi->netdev_registered) { | |
7554 | vsi->netdev_registered = false; | |
7555 | unregister_netdev(vsi->netdev); | |
7556 | free_netdev(vsi->netdev); | |
7557 | vsi->netdev = NULL; | |
7558 | } | |
7559 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
7560 | err_vsi: | |
7561 | i40e_vsi_clear(vsi); | |
7562 | return NULL; | |
7563 | } | |
7564 | ||
41c445ff JB |
7565 | /** |
7566 | * i40e_vsi_setup - Set up a VSI by a given type | |
7567 | * @pf: board private structure | |
7568 | * @type: VSI type | |
7569 | * @uplink_seid: the switch element to link to | |
7570 | * @param1: usage depends upon VSI type. For VF types, indicates VF id | |
7571 | * | |
7572 | * This allocates the sw VSI structure and its queue resources, then add a VSI | |
7573 | * to the identified VEB. | |
7574 | * | |
7575 | * Returns pointer to the successfully allocated and configure VSI sw struct on | |
7576 | * success, otherwise returns NULL on failure. | |
7577 | **/ | |
7578 | struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type, | |
7579 | u16 uplink_seid, u32 param1) | |
7580 | { | |
7581 | struct i40e_vsi *vsi = NULL; | |
7582 | struct i40e_veb *veb = NULL; | |
7583 | int ret, i; | |
7584 | int v_idx; | |
7585 | ||
7586 | /* The requested uplink_seid must be either | |
7587 | * - the PF's port seid | |
7588 | * no VEB is needed because this is the PF | |
7589 | * or this is a Flow Director special case VSI | |
7590 | * - seid of an existing VEB | |
7591 | * - seid of a VSI that owns an existing VEB | |
7592 | * - seid of a VSI that doesn't own a VEB | |
7593 | * a new VEB is created and the VSI becomes the owner | |
7594 | * - seid of the PF VSI, which is what creates the first VEB | |
7595 | * this is a special case of the previous | |
7596 | * | |
7597 | * Find which uplink_seid we were given and create a new VEB if needed | |
7598 | */ | |
7599 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7600 | if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) { | |
7601 | veb = pf->veb[i]; | |
7602 | break; | |
7603 | } | |
7604 | } | |
7605 | ||
7606 | if (!veb && uplink_seid != pf->mac_seid) { | |
7607 | ||
505682cd | 7608 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
7609 | if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) { |
7610 | vsi = pf->vsi[i]; | |
7611 | break; | |
7612 | } | |
7613 | } | |
7614 | if (!vsi) { | |
7615 | dev_info(&pf->pdev->dev, "no such uplink_seid %d\n", | |
7616 | uplink_seid); | |
7617 | return NULL; | |
7618 | } | |
7619 | ||
7620 | if (vsi->uplink_seid == pf->mac_seid) | |
7621 | veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid, | |
7622 | vsi->tc_config.enabled_tc); | |
7623 | else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) | |
7624 | veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid, | |
7625 | vsi->tc_config.enabled_tc); | |
7626 | ||
7627 | for (i = 0; i < I40E_MAX_VEB && !veb; i++) { | |
7628 | if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid) | |
7629 | veb = pf->veb[i]; | |
7630 | } | |
7631 | if (!veb) { | |
7632 | dev_info(&pf->pdev->dev, "couldn't add VEB\n"); | |
7633 | return NULL; | |
7634 | } | |
7635 | ||
7636 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
7637 | uplink_seid = veb->seid; | |
7638 | } | |
7639 | ||
7640 | /* get vsi sw struct */ | |
7641 | v_idx = i40e_vsi_mem_alloc(pf, type); | |
7642 | if (v_idx < 0) | |
7643 | goto err_alloc; | |
7644 | vsi = pf->vsi[v_idx]; | |
cbf61325 ASJ |
7645 | if (!vsi) |
7646 | goto err_alloc; | |
41c445ff JB |
7647 | vsi->type = type; |
7648 | vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB); | |
7649 | ||
7650 | if (type == I40E_VSI_MAIN) | |
7651 | pf->lan_vsi = v_idx; | |
7652 | else if (type == I40E_VSI_SRIOV) | |
7653 | vsi->vf_id = param1; | |
7654 | /* assign it some queues */ | |
cbf61325 ASJ |
7655 | ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, |
7656 | vsi->idx); | |
41c445ff JB |
7657 | if (ret < 0) { |
7658 | dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n", | |
7659 | vsi->seid, ret); | |
7660 | goto err_vsi; | |
7661 | } | |
7662 | vsi->base_queue = ret; | |
7663 | ||
7664 | /* get a VSI from the hardware */ | |
7665 | vsi->uplink_seid = uplink_seid; | |
7666 | ret = i40e_add_vsi(vsi); | |
7667 | if (ret) | |
7668 | goto err_vsi; | |
7669 | ||
7670 | switch (vsi->type) { | |
7671 | /* setup the netdev if needed */ | |
7672 | case I40E_VSI_MAIN: | |
7673 | case I40E_VSI_VMDQ2: | |
7674 | ret = i40e_config_netdev(vsi); | |
7675 | if (ret) | |
7676 | goto err_netdev; | |
7677 | ret = register_netdev(vsi->netdev); | |
7678 | if (ret) | |
7679 | goto err_netdev; | |
7680 | vsi->netdev_registered = true; | |
7681 | netif_carrier_off(vsi->netdev); | |
4e3b35b0 NP |
7682 | #ifdef CONFIG_I40E_DCB |
7683 | /* Setup DCB netlink interface */ | |
7684 | i40e_dcbnl_setup(vsi); | |
7685 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff JB |
7686 | /* fall through */ |
7687 | ||
7688 | case I40E_VSI_FDIR: | |
7689 | /* set up vectors and rings if needed */ | |
7690 | ret = i40e_vsi_setup_vectors(vsi); | |
7691 | if (ret) | |
7692 | goto err_msix; | |
7693 | ||
7694 | ret = i40e_alloc_rings(vsi); | |
7695 | if (ret) | |
7696 | goto err_rings; | |
7697 | ||
7698 | /* map all of the rings to the q_vectors */ | |
7699 | i40e_vsi_map_rings_to_vectors(vsi); | |
7700 | ||
7701 | i40e_vsi_reset_stats(vsi); | |
7702 | break; | |
7703 | ||
7704 | default: | |
7705 | /* no netdev or rings for the other VSI types */ | |
7706 | break; | |
7707 | } | |
7708 | ||
7709 | return vsi; | |
7710 | ||
7711 | err_rings: | |
7712 | i40e_vsi_free_q_vectors(vsi); | |
7713 | err_msix: | |
7714 | if (vsi->netdev_registered) { | |
7715 | vsi->netdev_registered = false; | |
7716 | unregister_netdev(vsi->netdev); | |
7717 | free_netdev(vsi->netdev); | |
7718 | vsi->netdev = NULL; | |
7719 | } | |
7720 | err_netdev: | |
7721 | i40e_aq_delete_element(&pf->hw, vsi->seid, NULL); | |
7722 | err_vsi: | |
7723 | i40e_vsi_clear(vsi); | |
7724 | err_alloc: | |
7725 | return NULL; | |
7726 | } | |
7727 | ||
7728 | /** | |
7729 | * i40e_veb_get_bw_info - Query VEB BW information | |
7730 | * @veb: the veb to query | |
7731 | * | |
7732 | * Query the Tx scheduler BW configuration data for given VEB | |
7733 | **/ | |
7734 | static int i40e_veb_get_bw_info(struct i40e_veb *veb) | |
7735 | { | |
7736 | struct i40e_aqc_query_switching_comp_ets_config_resp ets_data; | |
7737 | struct i40e_aqc_query_switching_comp_bw_config_resp bw_data; | |
7738 | struct i40e_pf *pf = veb->pf; | |
7739 | struct i40e_hw *hw = &pf->hw; | |
7740 | u32 tc_bw_max; | |
7741 | int ret = 0; | |
7742 | int i; | |
7743 | ||
7744 | ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid, | |
7745 | &bw_data, NULL); | |
7746 | if (ret) { | |
7747 | dev_info(&pf->pdev->dev, | |
7748 | "query veb bw config failed, aq_err=%d\n", | |
7749 | hw->aq.asq_last_status); | |
7750 | goto out; | |
7751 | } | |
7752 | ||
7753 | ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid, | |
7754 | &ets_data, NULL); | |
7755 | if (ret) { | |
7756 | dev_info(&pf->pdev->dev, | |
7757 | "query veb bw ets config failed, aq_err=%d\n", | |
7758 | hw->aq.asq_last_status); | |
7759 | goto out; | |
7760 | } | |
7761 | ||
7762 | veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit); | |
7763 | veb->bw_max_quanta = ets_data.tc_bw_max; | |
7764 | veb->is_abs_credits = bw_data.absolute_credits_enable; | |
7765 | tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) | | |
7766 | (le16_to_cpu(bw_data.tc_bw_max[1]) << 16); | |
7767 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { | |
7768 | veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i]; | |
7769 | veb->bw_tc_limit_credits[i] = | |
7770 | le16_to_cpu(bw_data.tc_bw_limits[i]); | |
7771 | veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7); | |
7772 | } | |
7773 | ||
7774 | out: | |
7775 | return ret; | |
7776 | } | |
7777 | ||
7778 | /** | |
7779 | * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF | |
7780 | * @pf: board private structure | |
7781 | * | |
7782 | * On error: returns error code (negative) | |
7783 | * On success: returns vsi index in PF (positive) | |
7784 | **/ | |
7785 | static int i40e_veb_mem_alloc(struct i40e_pf *pf) | |
7786 | { | |
7787 | int ret = -ENOENT; | |
7788 | struct i40e_veb *veb; | |
7789 | int i; | |
7790 | ||
7791 | /* Need to protect the allocation of switch elements at the PF level */ | |
7792 | mutex_lock(&pf->switch_mutex); | |
7793 | ||
7794 | /* VEB list may be fragmented if VEB creation/destruction has | |
7795 | * been happening. We can afford to do a quick scan to look | |
7796 | * for any free slots in the list. | |
7797 | * | |
7798 | * find next empty veb slot, looping back around if necessary | |
7799 | */ | |
7800 | i = 0; | |
7801 | while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL)) | |
7802 | i++; | |
7803 | if (i >= I40E_MAX_VEB) { | |
7804 | ret = -ENOMEM; | |
7805 | goto err_alloc_veb; /* out of VEB slots! */ | |
7806 | } | |
7807 | ||
7808 | veb = kzalloc(sizeof(*veb), GFP_KERNEL); | |
7809 | if (!veb) { | |
7810 | ret = -ENOMEM; | |
7811 | goto err_alloc_veb; | |
7812 | } | |
7813 | veb->pf = pf; | |
7814 | veb->idx = i; | |
7815 | veb->enabled_tc = 1; | |
7816 | ||
7817 | pf->veb[i] = veb; | |
7818 | ret = i; | |
7819 | err_alloc_veb: | |
7820 | mutex_unlock(&pf->switch_mutex); | |
7821 | return ret; | |
7822 | } | |
7823 | ||
7824 | /** | |
7825 | * i40e_switch_branch_release - Delete a branch of the switch tree | |
7826 | * @branch: where to start deleting | |
7827 | * | |
7828 | * This uses recursion to find the tips of the branch to be | |
7829 | * removed, deleting until we get back to and can delete this VEB. | |
7830 | **/ | |
7831 | static void i40e_switch_branch_release(struct i40e_veb *branch) | |
7832 | { | |
7833 | struct i40e_pf *pf = branch->pf; | |
7834 | u16 branch_seid = branch->seid; | |
7835 | u16 veb_idx = branch->idx; | |
7836 | int i; | |
7837 | ||
7838 | /* release any VEBs on this VEB - RECURSION */ | |
7839 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
7840 | if (!pf->veb[i]) | |
7841 | continue; | |
7842 | if (pf->veb[i]->uplink_seid == branch->seid) | |
7843 | i40e_switch_branch_release(pf->veb[i]); | |
7844 | } | |
7845 | ||
7846 | /* Release the VSIs on this VEB, but not the owner VSI. | |
7847 | * | |
7848 | * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing | |
7849 | * the VEB itself, so don't use (*branch) after this loop. | |
7850 | */ | |
505682cd | 7851 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
7852 | if (!pf->vsi[i]) |
7853 | continue; | |
7854 | if (pf->vsi[i]->uplink_seid == branch_seid && | |
7855 | (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) { | |
7856 | i40e_vsi_release(pf->vsi[i]); | |
7857 | } | |
7858 | } | |
7859 | ||
7860 | /* There's one corner case where the VEB might not have been | |
7861 | * removed, so double check it here and remove it if needed. | |
7862 | * This case happens if the veb was created from the debugfs | |
7863 | * commands and no VSIs were added to it. | |
7864 | */ | |
7865 | if (pf->veb[veb_idx]) | |
7866 | i40e_veb_release(pf->veb[veb_idx]); | |
7867 | } | |
7868 | ||
7869 | /** | |
7870 | * i40e_veb_clear - remove veb struct | |
7871 | * @veb: the veb to remove | |
7872 | **/ | |
7873 | static void i40e_veb_clear(struct i40e_veb *veb) | |
7874 | { | |
7875 | if (!veb) | |
7876 | return; | |
7877 | ||
7878 | if (veb->pf) { | |
7879 | struct i40e_pf *pf = veb->pf; | |
7880 | ||
7881 | mutex_lock(&pf->switch_mutex); | |
7882 | if (pf->veb[veb->idx] == veb) | |
7883 | pf->veb[veb->idx] = NULL; | |
7884 | mutex_unlock(&pf->switch_mutex); | |
7885 | } | |
7886 | ||
7887 | kfree(veb); | |
7888 | } | |
7889 | ||
7890 | /** | |
7891 | * i40e_veb_release - Delete a VEB and free its resources | |
7892 | * @veb: the VEB being removed | |
7893 | **/ | |
7894 | void i40e_veb_release(struct i40e_veb *veb) | |
7895 | { | |
7896 | struct i40e_vsi *vsi = NULL; | |
7897 | struct i40e_pf *pf; | |
7898 | int i, n = 0; | |
7899 | ||
7900 | pf = veb->pf; | |
7901 | ||
7902 | /* find the remaining VSI and check for extras */ | |
505682cd | 7903 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
7904 | if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) { |
7905 | n++; | |
7906 | vsi = pf->vsi[i]; | |
7907 | } | |
7908 | } | |
7909 | if (n != 1) { | |
7910 | dev_info(&pf->pdev->dev, | |
7911 | "can't remove VEB %d with %d VSIs left\n", | |
7912 | veb->seid, n); | |
7913 | return; | |
7914 | } | |
7915 | ||
7916 | /* move the remaining VSI to uplink veb */ | |
7917 | vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER; | |
7918 | if (veb->uplink_seid) { | |
7919 | vsi->uplink_seid = veb->uplink_seid; | |
7920 | if (veb->uplink_seid == pf->mac_seid) | |
7921 | vsi->veb_idx = I40E_NO_VEB; | |
7922 | else | |
7923 | vsi->veb_idx = veb->veb_idx; | |
7924 | } else { | |
7925 | /* floating VEB */ | |
7926 | vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid; | |
7927 | vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx; | |
7928 | } | |
7929 | ||
7930 | i40e_aq_delete_element(&pf->hw, veb->seid, NULL); | |
7931 | i40e_veb_clear(veb); | |
41c445ff JB |
7932 | } |
7933 | ||
7934 | /** | |
7935 | * i40e_add_veb - create the VEB in the switch | |
7936 | * @veb: the VEB to be instantiated | |
7937 | * @vsi: the controlling VSI | |
7938 | **/ | |
7939 | static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi) | |
7940 | { | |
56747264 | 7941 | bool is_default = false; |
e1c51b95 | 7942 | bool is_cloud = false; |
41c445ff JB |
7943 | int ret; |
7944 | ||
7945 | /* get a VEB from the hardware */ | |
7946 | ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid, | |
e1c51b95 KS |
7947 | veb->enabled_tc, is_default, |
7948 | is_cloud, &veb->seid, NULL); | |
41c445ff JB |
7949 | if (ret) { |
7950 | dev_info(&veb->pf->pdev->dev, | |
7951 | "couldn't add VEB, err %d, aq_err %d\n", | |
7952 | ret, veb->pf->hw.aq.asq_last_status); | |
7953 | return -EPERM; | |
7954 | } | |
7955 | ||
7956 | /* get statistics counter */ | |
7957 | ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL, | |
7958 | &veb->stats_idx, NULL, NULL, NULL); | |
7959 | if (ret) { | |
7960 | dev_info(&veb->pf->pdev->dev, | |
7961 | "couldn't get VEB statistics idx, err %d, aq_err %d\n", | |
7962 | ret, veb->pf->hw.aq.asq_last_status); | |
7963 | return -EPERM; | |
7964 | } | |
7965 | ret = i40e_veb_get_bw_info(veb); | |
7966 | if (ret) { | |
7967 | dev_info(&veb->pf->pdev->dev, | |
7968 | "couldn't get VEB bw info, err %d, aq_err %d\n", | |
7969 | ret, veb->pf->hw.aq.asq_last_status); | |
7970 | i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL); | |
7971 | return -ENOENT; | |
7972 | } | |
7973 | ||
7974 | vsi->uplink_seid = veb->seid; | |
7975 | vsi->veb_idx = veb->idx; | |
7976 | vsi->flags |= I40E_VSI_FLAG_VEB_OWNER; | |
7977 | ||
7978 | return 0; | |
7979 | } | |
7980 | ||
7981 | /** | |
7982 | * i40e_veb_setup - Set up a VEB | |
7983 | * @pf: board private structure | |
7984 | * @flags: VEB setup flags | |
7985 | * @uplink_seid: the switch element to link to | |
7986 | * @vsi_seid: the initial VSI seid | |
7987 | * @enabled_tc: Enabled TC bit-map | |
7988 | * | |
7989 | * This allocates the sw VEB structure and links it into the switch | |
7990 | * It is possible and legal for this to be a duplicate of an already | |
7991 | * existing VEB. It is also possible for both uplink and vsi seids | |
7992 | * to be zero, in order to create a floating VEB. | |
7993 | * | |
7994 | * Returns pointer to the successfully allocated VEB sw struct on | |
7995 | * success, otherwise returns NULL on failure. | |
7996 | **/ | |
7997 | struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, | |
7998 | u16 uplink_seid, u16 vsi_seid, | |
7999 | u8 enabled_tc) | |
8000 | { | |
8001 | struct i40e_veb *veb, *uplink_veb = NULL; | |
8002 | int vsi_idx, veb_idx; | |
8003 | int ret; | |
8004 | ||
8005 | /* if one seid is 0, the other must be 0 to create a floating relay */ | |
8006 | if ((uplink_seid == 0 || vsi_seid == 0) && | |
8007 | (uplink_seid + vsi_seid != 0)) { | |
8008 | dev_info(&pf->pdev->dev, | |
8009 | "one, not both seid's are 0: uplink=%d vsi=%d\n", | |
8010 | uplink_seid, vsi_seid); | |
8011 | return NULL; | |
8012 | } | |
8013 | ||
8014 | /* make sure there is such a vsi and uplink */ | |
505682cd | 8015 | for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++) |
41c445ff JB |
8016 | if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid) |
8017 | break; | |
505682cd | 8018 | if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) { |
41c445ff JB |
8019 | dev_info(&pf->pdev->dev, "vsi seid %d not found\n", |
8020 | vsi_seid); | |
8021 | return NULL; | |
8022 | } | |
8023 | ||
8024 | if (uplink_seid && uplink_seid != pf->mac_seid) { | |
8025 | for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) { | |
8026 | if (pf->veb[veb_idx] && | |
8027 | pf->veb[veb_idx]->seid == uplink_seid) { | |
8028 | uplink_veb = pf->veb[veb_idx]; | |
8029 | break; | |
8030 | } | |
8031 | } | |
8032 | if (!uplink_veb) { | |
8033 | dev_info(&pf->pdev->dev, | |
8034 | "uplink seid %d not found\n", uplink_seid); | |
8035 | return NULL; | |
8036 | } | |
8037 | } | |
8038 | ||
8039 | /* get veb sw struct */ | |
8040 | veb_idx = i40e_veb_mem_alloc(pf); | |
8041 | if (veb_idx < 0) | |
8042 | goto err_alloc; | |
8043 | veb = pf->veb[veb_idx]; | |
8044 | veb->flags = flags; | |
8045 | veb->uplink_seid = uplink_seid; | |
8046 | veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB); | |
8047 | veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1); | |
8048 | ||
8049 | /* create the VEB in the switch */ | |
8050 | ret = i40e_add_veb(veb, pf->vsi[vsi_idx]); | |
8051 | if (ret) | |
8052 | goto err_veb; | |
1bb8b935 SN |
8053 | if (vsi_idx == pf->lan_vsi) |
8054 | pf->lan_veb = veb->idx; | |
41c445ff JB |
8055 | |
8056 | return veb; | |
8057 | ||
8058 | err_veb: | |
8059 | i40e_veb_clear(veb); | |
8060 | err_alloc: | |
8061 | return NULL; | |
8062 | } | |
8063 | ||
8064 | /** | |
8065 | * i40e_setup_pf_switch_element - set pf vars based on switch type | |
8066 | * @pf: board private structure | |
8067 | * @ele: element we are building info from | |
8068 | * @num_reported: total number of elements | |
8069 | * @printconfig: should we print the contents | |
8070 | * | |
8071 | * helper function to assist in extracting a few useful SEID values. | |
8072 | **/ | |
8073 | static void i40e_setup_pf_switch_element(struct i40e_pf *pf, | |
8074 | struct i40e_aqc_switch_config_element_resp *ele, | |
8075 | u16 num_reported, bool printconfig) | |
8076 | { | |
8077 | u16 downlink_seid = le16_to_cpu(ele->downlink_seid); | |
8078 | u16 uplink_seid = le16_to_cpu(ele->uplink_seid); | |
8079 | u8 element_type = ele->element_type; | |
8080 | u16 seid = le16_to_cpu(ele->seid); | |
8081 | ||
8082 | if (printconfig) | |
8083 | dev_info(&pf->pdev->dev, | |
8084 | "type=%d seid=%d uplink=%d downlink=%d\n", | |
8085 | element_type, seid, uplink_seid, downlink_seid); | |
8086 | ||
8087 | switch (element_type) { | |
8088 | case I40E_SWITCH_ELEMENT_TYPE_MAC: | |
8089 | pf->mac_seid = seid; | |
8090 | break; | |
8091 | case I40E_SWITCH_ELEMENT_TYPE_VEB: | |
8092 | /* Main VEB? */ | |
8093 | if (uplink_seid != pf->mac_seid) | |
8094 | break; | |
8095 | if (pf->lan_veb == I40E_NO_VEB) { | |
8096 | int v; | |
8097 | ||
8098 | /* find existing or else empty VEB */ | |
8099 | for (v = 0; v < I40E_MAX_VEB; v++) { | |
8100 | if (pf->veb[v] && (pf->veb[v]->seid == seid)) { | |
8101 | pf->lan_veb = v; | |
8102 | break; | |
8103 | } | |
8104 | } | |
8105 | if (pf->lan_veb == I40E_NO_VEB) { | |
8106 | v = i40e_veb_mem_alloc(pf); | |
8107 | if (v < 0) | |
8108 | break; | |
8109 | pf->lan_veb = v; | |
8110 | } | |
8111 | } | |
8112 | ||
8113 | pf->veb[pf->lan_veb]->seid = seid; | |
8114 | pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid; | |
8115 | pf->veb[pf->lan_veb]->pf = pf; | |
8116 | pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB; | |
8117 | break; | |
8118 | case I40E_SWITCH_ELEMENT_TYPE_VSI: | |
8119 | if (num_reported != 1) | |
8120 | break; | |
8121 | /* This is immediately after a reset so we can assume this is | |
8122 | * the PF's VSI | |
8123 | */ | |
8124 | pf->mac_seid = uplink_seid; | |
8125 | pf->pf_seid = downlink_seid; | |
8126 | pf->main_vsi_seid = seid; | |
8127 | if (printconfig) | |
8128 | dev_info(&pf->pdev->dev, | |
8129 | "pf_seid=%d main_vsi_seid=%d\n", | |
8130 | pf->pf_seid, pf->main_vsi_seid); | |
8131 | break; | |
8132 | case I40E_SWITCH_ELEMENT_TYPE_PF: | |
8133 | case I40E_SWITCH_ELEMENT_TYPE_VF: | |
8134 | case I40E_SWITCH_ELEMENT_TYPE_EMP: | |
8135 | case I40E_SWITCH_ELEMENT_TYPE_BMC: | |
8136 | case I40E_SWITCH_ELEMENT_TYPE_PE: | |
8137 | case I40E_SWITCH_ELEMENT_TYPE_PA: | |
8138 | /* ignore these for now */ | |
8139 | break; | |
8140 | default: | |
8141 | dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n", | |
8142 | element_type, seid); | |
8143 | break; | |
8144 | } | |
8145 | } | |
8146 | ||
8147 | /** | |
8148 | * i40e_fetch_switch_configuration - Get switch config from firmware | |
8149 | * @pf: board private structure | |
8150 | * @printconfig: should we print the contents | |
8151 | * | |
8152 | * Get the current switch configuration from the device and | |
8153 | * extract a few useful SEID values. | |
8154 | **/ | |
8155 | int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig) | |
8156 | { | |
8157 | struct i40e_aqc_get_switch_config_resp *sw_config; | |
8158 | u16 next_seid = 0; | |
8159 | int ret = 0; | |
8160 | u8 *aq_buf; | |
8161 | int i; | |
8162 | ||
8163 | aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL); | |
8164 | if (!aq_buf) | |
8165 | return -ENOMEM; | |
8166 | ||
8167 | sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; | |
8168 | do { | |
8169 | u16 num_reported, num_total; | |
8170 | ||
8171 | ret = i40e_aq_get_switch_config(&pf->hw, sw_config, | |
8172 | I40E_AQ_LARGE_BUF, | |
8173 | &next_seid, NULL); | |
8174 | if (ret) { | |
8175 | dev_info(&pf->pdev->dev, | |
8176 | "get switch config failed %d aq_err=%x\n", | |
8177 | ret, pf->hw.aq.asq_last_status); | |
8178 | kfree(aq_buf); | |
8179 | return -ENOENT; | |
8180 | } | |
8181 | ||
8182 | num_reported = le16_to_cpu(sw_config->header.num_reported); | |
8183 | num_total = le16_to_cpu(sw_config->header.num_total); | |
8184 | ||
8185 | if (printconfig) | |
8186 | dev_info(&pf->pdev->dev, | |
8187 | "header: %d reported %d total\n", | |
8188 | num_reported, num_total); | |
8189 | ||
41c445ff JB |
8190 | for (i = 0; i < num_reported; i++) { |
8191 | struct i40e_aqc_switch_config_element_resp *ele = | |
8192 | &sw_config->element[i]; | |
8193 | ||
8194 | i40e_setup_pf_switch_element(pf, ele, num_reported, | |
8195 | printconfig); | |
8196 | } | |
8197 | } while (next_seid != 0); | |
8198 | ||
8199 | kfree(aq_buf); | |
8200 | return ret; | |
8201 | } | |
8202 | ||
8203 | /** | |
8204 | * i40e_setup_pf_switch - Setup the HW switch on startup or after reset | |
8205 | * @pf: board private structure | |
bc7d338f | 8206 | * @reinit: if the Main VSI needs to re-initialized. |
41c445ff JB |
8207 | * |
8208 | * Returns 0 on success, negative value on failure | |
8209 | **/ | |
bc7d338f | 8210 | static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit) |
41c445ff | 8211 | { |
895106a5 | 8212 | u32 rxfc = 0, txfc = 0, rxfc_reg; |
41c445ff JB |
8213 | int ret; |
8214 | ||
8215 | /* find out what's out there already */ | |
8216 | ret = i40e_fetch_switch_configuration(pf, false); | |
8217 | if (ret) { | |
8218 | dev_info(&pf->pdev->dev, | |
8219 | "couldn't fetch switch config, err %d, aq_err %d\n", | |
8220 | ret, pf->hw.aq.asq_last_status); | |
8221 | return ret; | |
8222 | } | |
8223 | i40e_pf_reset_stats(pf); | |
8224 | ||
41c445ff | 8225 | /* first time setup */ |
bc7d338f | 8226 | if (pf->lan_vsi == I40E_NO_VSI || reinit) { |
41c445ff JB |
8227 | struct i40e_vsi *vsi = NULL; |
8228 | u16 uplink_seid; | |
8229 | ||
8230 | /* Set up the PF VSI associated with the PF's main VSI | |
8231 | * that is already in the HW switch | |
8232 | */ | |
8233 | if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb]) | |
8234 | uplink_seid = pf->veb[pf->lan_veb]->seid; | |
8235 | else | |
8236 | uplink_seid = pf->mac_seid; | |
bc7d338f ASJ |
8237 | if (pf->lan_vsi == I40E_NO_VSI) |
8238 | vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0); | |
8239 | else if (reinit) | |
8240 | vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]); | |
41c445ff JB |
8241 | if (!vsi) { |
8242 | dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n"); | |
8243 | i40e_fdir_teardown(pf); | |
8244 | return -EAGAIN; | |
8245 | } | |
41c445ff JB |
8246 | } else { |
8247 | /* force a reset of TC and queue layout configurations */ | |
8248 | u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc; | |
8249 | pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0; | |
8250 | pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid; | |
8251 | i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc); | |
8252 | } | |
8253 | i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]); | |
8254 | ||
cbf61325 ASJ |
8255 | i40e_fdir_sb_setup(pf); |
8256 | ||
41c445ff JB |
8257 | /* Setup static PF queue filter control settings */ |
8258 | ret = i40e_setup_pf_filter_control(pf); | |
8259 | if (ret) { | |
8260 | dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n", | |
8261 | ret); | |
8262 | /* Failure here should not stop continuing other steps */ | |
8263 | } | |
8264 | ||
8265 | /* enable RSS in the HW, even for only one queue, as the stack can use | |
8266 | * the hash | |
8267 | */ | |
8268 | if ((pf->flags & I40E_FLAG_RSS_ENABLED)) | |
8269 | i40e_config_rss(pf); | |
8270 | ||
8271 | /* fill in link information and enable LSE reporting */ | |
8272 | i40e_aq_get_link_info(&pf->hw, true, NULL, NULL); | |
8273 | i40e_link_event(pf); | |
8274 | ||
d52c20b7 | 8275 | /* Initialize user-specific link properties */ |
41c445ff JB |
8276 | pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info & |
8277 | I40E_AQ_AN_COMPLETED) ? true : false); | |
d52c20b7 JB |
8278 | /* requested_mode is set in probe or by ethtool */ |
8279 | if (!pf->fc_autoneg_status) | |
8280 | goto no_autoneg; | |
8281 | ||
8282 | if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) && | |
8283 | (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)) | |
41c445ff JB |
8284 | pf->hw.fc.current_mode = I40E_FC_FULL; |
8285 | else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) | |
8286 | pf->hw.fc.current_mode = I40E_FC_TX_PAUSE; | |
8287 | else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) | |
8288 | pf->hw.fc.current_mode = I40E_FC_RX_PAUSE; | |
8289 | else | |
d52c20b7 JB |
8290 | pf->hw.fc.current_mode = I40E_FC_NONE; |
8291 | ||
8292 | /* sync the flow control settings with the auto-neg values */ | |
8293 | switch (pf->hw.fc.current_mode) { | |
8294 | case I40E_FC_FULL: | |
8295 | txfc = 1; | |
8296 | rxfc = 1; | |
8297 | break; | |
8298 | case I40E_FC_TX_PAUSE: | |
8299 | txfc = 1; | |
8300 | rxfc = 0; | |
8301 | break; | |
8302 | case I40E_FC_RX_PAUSE: | |
8303 | txfc = 0; | |
8304 | rxfc = 1; | |
8305 | break; | |
8306 | case I40E_FC_NONE: | |
8307 | case I40E_FC_DEFAULT: | |
8308 | txfc = 0; | |
8309 | rxfc = 0; | |
8310 | break; | |
8311 | case I40E_FC_PFC: | |
8312 | /* TBD */ | |
8313 | break; | |
8314 | /* no default case, we have to handle all possibilities here */ | |
8315 | } | |
8316 | ||
8317 | wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT); | |
8318 | ||
8319 | rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) & | |
8320 | ~I40E_PRTDCB_MFLCN_RFCE_MASK; | |
8321 | rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT); | |
8322 | ||
8323 | wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg); | |
41c445ff | 8324 | |
d52c20b7 JB |
8325 | goto fc_complete; |
8326 | ||
8327 | no_autoneg: | |
8328 | /* disable L2 flow control, user can turn it on if they wish */ | |
8329 | wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0); | |
8330 | wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) & | |
8331 | ~I40E_PRTDCB_MFLCN_RFCE_MASK); | |
8332 | ||
8333 | fc_complete: | |
beb0dff1 JK |
8334 | i40e_ptp_init(pf); |
8335 | ||
41c445ff JB |
8336 | return ret; |
8337 | } | |
8338 | ||
41c445ff JB |
8339 | /** |
8340 | * i40e_determine_queue_usage - Work out queue distribution | |
8341 | * @pf: board private structure | |
8342 | **/ | |
8343 | static void i40e_determine_queue_usage(struct i40e_pf *pf) | |
8344 | { | |
41c445ff JB |
8345 | int queues_left; |
8346 | ||
8347 | pf->num_lan_qps = 0; | |
41c445ff JB |
8348 | |
8349 | /* Find the max queues to be put into basic use. We'll always be | |
8350 | * using TC0, whether or not DCB is running, and TC0 will get the | |
8351 | * big RSS set. | |
8352 | */ | |
8353 | queues_left = pf->hw.func_caps.num_tx_qp; | |
8354 | ||
cbf61325 | 8355 | if ((queues_left == 1) || |
9aa7e935 | 8356 | !(pf->flags & I40E_FLAG_MSIX_ENABLED)) { |
41c445ff JB |
8357 | /* one qp for PF, no queues for anything else */ |
8358 | queues_left = 0; | |
8359 | pf->rss_size = pf->num_lan_qps = 1; | |
8360 | ||
8361 | /* make sure all the fancies are disabled */ | |
60ea5f83 JB |
8362 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | |
8363 | I40E_FLAG_FD_SB_ENABLED | | |
8364 | I40E_FLAG_FD_ATR_ENABLED | | |
4d9b6043 | 8365 | I40E_FLAG_DCB_CAPABLE | |
60ea5f83 JB |
8366 | I40E_FLAG_SRIOV_ENABLED | |
8367 | I40E_FLAG_VMDQ_ENABLED); | |
9aa7e935 FZ |
8368 | } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED | |
8369 | I40E_FLAG_FD_SB_ENABLED | | |
bbe7d0e0 | 8370 | I40E_FLAG_FD_ATR_ENABLED | |
4d9b6043 | 8371 | I40E_FLAG_DCB_CAPABLE))) { |
9aa7e935 FZ |
8372 | /* one qp for PF */ |
8373 | pf->rss_size = pf->num_lan_qps = 1; | |
8374 | queues_left -= pf->num_lan_qps; | |
8375 | ||
8376 | pf->flags &= ~(I40E_FLAG_RSS_ENABLED | | |
8377 | I40E_FLAG_FD_SB_ENABLED | | |
8378 | I40E_FLAG_FD_ATR_ENABLED | | |
8379 | I40E_FLAG_DCB_ENABLED | | |
8380 | I40E_FLAG_VMDQ_ENABLED); | |
41c445ff | 8381 | } else { |
cbf61325 | 8382 | /* Not enough queues for all TCs */ |
4d9b6043 | 8383 | if ((pf->flags & I40E_FLAG_DCB_CAPABLE) && |
cbf61325 | 8384 | (queues_left < I40E_MAX_TRAFFIC_CLASS)) { |
4d9b6043 | 8385 | pf->flags &= ~I40E_FLAG_DCB_CAPABLE; |
cbf61325 ASJ |
8386 | dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n"); |
8387 | } | |
8388 | pf->num_lan_qps = pf->rss_size_max; | |
8389 | queues_left -= pf->num_lan_qps; | |
8390 | } | |
8391 | ||
8392 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { | |
8393 | if (queues_left > 1) { | |
8394 | queues_left -= 1; /* save 1 queue for FD */ | |
8395 | } else { | |
8396 | pf->flags &= ~I40E_FLAG_FD_SB_ENABLED; | |
8397 | dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n"); | |
8398 | } | |
41c445ff JB |
8399 | } |
8400 | ||
8401 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
8402 | pf->num_vf_qps && pf->num_req_vfs && queues_left) { | |
cbf61325 ASJ |
8403 | pf->num_req_vfs = min_t(int, pf->num_req_vfs, |
8404 | (queues_left / pf->num_vf_qps)); | |
41c445ff JB |
8405 | queues_left -= (pf->num_req_vfs * pf->num_vf_qps); |
8406 | } | |
8407 | ||
8408 | if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) && | |
8409 | pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) { | |
8410 | pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis, | |
8411 | (queues_left / pf->num_vmdq_qps)); | |
8412 | queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps); | |
8413 | } | |
8414 | ||
f8ff1464 | 8415 | pf->queues_left = queues_left; |
41c445ff JB |
8416 | } |
8417 | ||
8418 | /** | |
8419 | * i40e_setup_pf_filter_control - Setup PF static filter control | |
8420 | * @pf: PF to be setup | |
8421 | * | |
8422 | * i40e_setup_pf_filter_control sets up a pf's initial filter control | |
8423 | * settings. If PE/FCoE are enabled then it will also set the per PF | |
8424 | * based filter sizes required for them. It also enables Flow director, | |
8425 | * ethertype and macvlan type filter settings for the pf. | |
8426 | * | |
8427 | * Returns 0 on success, negative on failure | |
8428 | **/ | |
8429 | static int i40e_setup_pf_filter_control(struct i40e_pf *pf) | |
8430 | { | |
8431 | struct i40e_filter_control_settings *settings = &pf->filter_settings; | |
8432 | ||
8433 | settings->hash_lut_size = I40E_HASH_LUT_SIZE_128; | |
8434 | ||
8435 | /* Flow Director is enabled */ | |
60ea5f83 | 8436 | if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)) |
41c445ff JB |
8437 | settings->enable_fdir = true; |
8438 | ||
8439 | /* Ethtype and MACVLAN filters enabled for PF */ | |
8440 | settings->enable_ethtype = true; | |
8441 | settings->enable_macvlan = true; | |
8442 | ||
8443 | if (i40e_set_filter_control(&pf->hw, settings)) | |
8444 | return -ENOENT; | |
8445 | ||
8446 | return 0; | |
8447 | } | |
8448 | ||
0c22b3dd JB |
8449 | #define INFO_STRING_LEN 255 |
8450 | static void i40e_print_features(struct i40e_pf *pf) | |
8451 | { | |
8452 | struct i40e_hw *hw = &pf->hw; | |
8453 | char *buf, *string; | |
8454 | ||
8455 | string = kzalloc(INFO_STRING_LEN, GFP_KERNEL); | |
8456 | if (!string) { | |
8457 | dev_err(&pf->pdev->dev, "Features string allocation failed\n"); | |
8458 | return; | |
8459 | } | |
8460 | ||
8461 | buf = string; | |
8462 | ||
8463 | buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id); | |
8464 | #ifdef CONFIG_PCI_IOV | |
8465 | buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs); | |
8466 | #endif | |
8467 | buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis, | |
8468 | pf->vsi[pf->lan_vsi]->num_queue_pairs); | |
8469 | ||
8470 | if (pf->flags & I40E_FLAG_RSS_ENABLED) | |
8471 | buf += sprintf(buf, "RSS "); | |
0c22b3dd | 8472 | if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) |
c6423ff1 AA |
8473 | buf += sprintf(buf, "FD_ATR "); |
8474 | if (pf->flags & I40E_FLAG_FD_SB_ENABLED) { | |
8475 | buf += sprintf(buf, "FD_SB "); | |
0c22b3dd | 8476 | buf += sprintf(buf, "NTUPLE "); |
c6423ff1 | 8477 | } |
4d9b6043 | 8478 | if (pf->flags & I40E_FLAG_DCB_CAPABLE) |
0c22b3dd JB |
8479 | buf += sprintf(buf, "DCB "); |
8480 | if (pf->flags & I40E_FLAG_PTP) | |
8481 | buf += sprintf(buf, "PTP "); | |
8482 | ||
8483 | BUG_ON(buf > (string + INFO_STRING_LEN)); | |
8484 | dev_info(&pf->pdev->dev, "%s\n", string); | |
8485 | kfree(string); | |
8486 | } | |
8487 | ||
41c445ff JB |
8488 | /** |
8489 | * i40e_probe - Device initialization routine | |
8490 | * @pdev: PCI device information struct | |
8491 | * @ent: entry in i40e_pci_tbl | |
8492 | * | |
8493 | * i40e_probe initializes a pf identified by a pci_dev structure. | |
8494 | * The OS initialization, configuring of the pf private structure, | |
8495 | * and a hardware reset occur. | |
8496 | * | |
8497 | * Returns 0 on success, negative on failure | |
8498 | **/ | |
8499 | static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
8500 | { | |
41c445ff JB |
8501 | struct i40e_pf *pf; |
8502 | struct i40e_hw *hw; | |
93cd765b | 8503 | static u16 pfs_found; |
d4dfb81a | 8504 | u16 link_status; |
41c445ff JB |
8505 | int err = 0; |
8506 | u32 len; | |
8a9eb7d3 | 8507 | u32 i; |
41c445ff JB |
8508 | |
8509 | err = pci_enable_device_mem(pdev); | |
8510 | if (err) | |
8511 | return err; | |
8512 | ||
8513 | /* set up for high or low dma */ | |
6494294f | 8514 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); |
6494294f | 8515 | if (err) { |
e3e3bfdd JS |
8516 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
8517 | if (err) { | |
8518 | dev_err(&pdev->dev, | |
8519 | "DMA configuration failed: 0x%x\n", err); | |
8520 | goto err_dma; | |
8521 | } | |
41c445ff JB |
8522 | } |
8523 | ||
8524 | /* set up pci connections */ | |
8525 | err = pci_request_selected_regions(pdev, pci_select_bars(pdev, | |
8526 | IORESOURCE_MEM), i40e_driver_name); | |
8527 | if (err) { | |
8528 | dev_info(&pdev->dev, | |
8529 | "pci_request_selected_regions failed %d\n", err); | |
8530 | goto err_pci_reg; | |
8531 | } | |
8532 | ||
8533 | pci_enable_pcie_error_reporting(pdev); | |
8534 | pci_set_master(pdev); | |
8535 | ||
8536 | /* Now that we have a PCI connection, we need to do the | |
8537 | * low level device setup. This is primarily setting up | |
8538 | * the Admin Queue structures and then querying for the | |
8539 | * device's current profile information. | |
8540 | */ | |
8541 | pf = kzalloc(sizeof(*pf), GFP_KERNEL); | |
8542 | if (!pf) { | |
8543 | err = -ENOMEM; | |
8544 | goto err_pf_alloc; | |
8545 | } | |
8546 | pf->next_vsi = 0; | |
8547 | pf->pdev = pdev; | |
8548 | set_bit(__I40E_DOWN, &pf->state); | |
8549 | ||
8550 | hw = &pf->hw; | |
8551 | hw->back = pf; | |
8552 | hw->hw_addr = ioremap(pci_resource_start(pdev, 0), | |
8553 | pci_resource_len(pdev, 0)); | |
8554 | if (!hw->hw_addr) { | |
8555 | err = -EIO; | |
8556 | dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n", | |
8557 | (unsigned int)pci_resource_start(pdev, 0), | |
8558 | (unsigned int)pci_resource_len(pdev, 0), err); | |
8559 | goto err_ioremap; | |
8560 | } | |
8561 | hw->vendor_id = pdev->vendor; | |
8562 | hw->device_id = pdev->device; | |
8563 | pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id); | |
8564 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
8565 | hw->subsystem_device_id = pdev->subsystem_device; | |
8566 | hw->bus.device = PCI_SLOT(pdev->devfn); | |
8567 | hw->bus.func = PCI_FUNC(pdev->devfn); | |
93cd765b | 8568 | pf->instance = pfs_found; |
41c445ff | 8569 | |
7134f9ce JB |
8570 | /* do a special CORER for clearing PXE mode once at init */ |
8571 | if (hw->revision_id == 0 && | |
8572 | (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) { | |
8573 | wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK); | |
8574 | i40e_flush(hw); | |
8575 | msleep(200); | |
8576 | pf->corer_count++; | |
8577 | ||
8578 | i40e_clear_pxe_mode(hw); | |
8579 | } | |
8580 | ||
41c445ff JB |
8581 | /* Reset here to make sure all is clean and to define PF 'n' */ |
8582 | err = i40e_pf_reset(hw); | |
8583 | if (err) { | |
8584 | dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err); | |
8585 | goto err_pf_reset; | |
8586 | } | |
8587 | pf->pfr_count++; | |
8588 | ||
8589 | hw->aq.num_arq_entries = I40E_AQ_LEN; | |
8590 | hw->aq.num_asq_entries = I40E_AQ_LEN; | |
8591 | hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
8592 | hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; | |
8593 | pf->adminq_work_limit = I40E_AQ_WORK_LIMIT; | |
8594 | snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1, | |
8595 | "%s-pf%d:misc", | |
8596 | dev_driver_string(&pf->pdev->dev), pf->hw.pf_id); | |
8597 | ||
8598 | err = i40e_init_shared_code(hw); | |
8599 | if (err) { | |
8600 | dev_info(&pdev->dev, "init_shared_code failed: %d\n", err); | |
8601 | goto err_pf_reset; | |
8602 | } | |
8603 | ||
d52c20b7 JB |
8604 | /* set up a default setting for link flow control */ |
8605 | pf->hw.fc.requested_mode = I40E_FC_NONE; | |
8606 | ||
41c445ff JB |
8607 | err = i40e_init_adminq(hw); |
8608 | dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw)); | |
8609 | if (err) { | |
8610 | dev_info(&pdev->dev, | |
8611 | "init_adminq failed: %d expecting API %02x.%02x\n", | |
8612 | err, | |
8613 | I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR); | |
8614 | goto err_pf_reset; | |
8615 | } | |
8616 | ||
4eb3f768 SN |
8617 | i40e_verify_eeprom(pf); |
8618 | ||
2c5fe33b JB |
8619 | /* Rev 0 hardware was never productized */ |
8620 | if (hw->revision_id < 1) | |
8621 | dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n"); | |
8622 | ||
6ff4ef86 | 8623 | i40e_clear_pxe_mode(hw); |
41c445ff JB |
8624 | err = i40e_get_capabilities(pf); |
8625 | if (err) | |
8626 | goto err_adminq_setup; | |
8627 | ||
8628 | err = i40e_sw_init(pf); | |
8629 | if (err) { | |
8630 | dev_info(&pdev->dev, "sw_init failed: %d\n", err); | |
8631 | goto err_sw_init; | |
8632 | } | |
8633 | ||
8634 | err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp, | |
8635 | hw->func_caps.num_rx_qp, | |
8636 | pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num); | |
8637 | if (err) { | |
8638 | dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err); | |
8639 | goto err_init_lan_hmc; | |
8640 | } | |
8641 | ||
8642 | err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY); | |
8643 | if (err) { | |
8644 | dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err); | |
8645 | err = -ENOENT; | |
8646 | goto err_configure_lan_hmc; | |
8647 | } | |
8648 | ||
8649 | i40e_get_mac_addr(hw, hw->mac.addr); | |
f62b5060 | 8650 | if (!is_valid_ether_addr(hw->mac.addr)) { |
41c445ff JB |
8651 | dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr); |
8652 | err = -EIO; | |
8653 | goto err_mac_addr; | |
8654 | } | |
8655 | dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr); | |
9a173901 | 8656 | ether_addr_copy(hw->mac.perm_addr, hw->mac.addr); |
41c445ff JB |
8657 | |
8658 | pci_set_drvdata(pdev, pf); | |
8659 | pci_save_state(pdev); | |
4e3b35b0 NP |
8660 | #ifdef CONFIG_I40E_DCB |
8661 | err = i40e_init_pf_dcb(pf); | |
8662 | if (err) { | |
8663 | dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err); | |
4d9b6043 | 8664 | pf->flags &= ~I40E_FLAG_DCB_CAPABLE; |
014269ff | 8665 | /* Continue without DCB enabled */ |
4e3b35b0 NP |
8666 | } |
8667 | #endif /* CONFIG_I40E_DCB */ | |
41c445ff JB |
8668 | |
8669 | /* set up periodic task facility */ | |
8670 | setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf); | |
8671 | pf->service_timer_period = HZ; | |
8672 | ||
8673 | INIT_WORK(&pf->service_task, i40e_service_task); | |
8674 | clear_bit(__I40E_SERVICE_SCHED, &pf->state); | |
8675 | pf->flags |= I40E_FLAG_NEED_LINK_UPDATE; | |
8676 | pf->link_check_timeout = jiffies; | |
8677 | ||
8e2773ae SN |
8678 | /* WoL defaults to disabled */ |
8679 | pf->wol_en = false; | |
8680 | device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); | |
8681 | ||
41c445ff JB |
8682 | /* set up the main switch operations */ |
8683 | i40e_determine_queue_usage(pf); | |
8684 | i40e_init_interrupt_scheme(pf); | |
8685 | ||
505682cd MW |
8686 | /* The number of VSIs reported by the FW is the minimum guaranteed |
8687 | * to us; HW supports far more and we share the remaining pool with | |
8688 | * the other PFs. We allocate space for more than the guarantee with | |
8689 | * the understanding that we might not get them all later. | |
41c445ff | 8690 | */ |
505682cd MW |
8691 | if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC) |
8692 | pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC; | |
8693 | else | |
8694 | pf->num_alloc_vsi = pf->hw.func_caps.num_vsis; | |
8695 | ||
8696 | /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */ | |
8697 | len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi; | |
41c445ff | 8698 | pf->vsi = kzalloc(len, GFP_KERNEL); |
ed87ac09 WY |
8699 | if (!pf->vsi) { |
8700 | err = -ENOMEM; | |
41c445ff | 8701 | goto err_switch_setup; |
ed87ac09 | 8702 | } |
41c445ff | 8703 | |
bc7d338f | 8704 | err = i40e_setup_pf_switch(pf, false); |
41c445ff JB |
8705 | if (err) { |
8706 | dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err); | |
8707 | goto err_vsis; | |
8708 | } | |
8a9eb7d3 | 8709 | /* if FDIR VSI was set up, start it now */ |
505682cd | 8710 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
8a9eb7d3 SN |
8711 | if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) { |
8712 | i40e_vsi_open(pf->vsi[i]); | |
8713 | break; | |
8714 | } | |
8715 | } | |
41c445ff JB |
8716 | |
8717 | /* The main driver is (mostly) up and happy. We need to set this state | |
8718 | * before setting up the misc vector or we get a race and the vector | |
8719 | * ends up disabled forever. | |
8720 | */ | |
8721 | clear_bit(__I40E_DOWN, &pf->state); | |
8722 | ||
8723 | /* In case of MSIX we are going to setup the misc vector right here | |
8724 | * to handle admin queue events etc. In case of legacy and MSI | |
8725 | * the misc functionality and queue processing is combined in | |
8726 | * the same vector and that gets setup at open. | |
8727 | */ | |
8728 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
8729 | err = i40e_setup_misc_vector(pf); | |
8730 | if (err) { | |
8731 | dev_info(&pdev->dev, | |
8732 | "setup of misc vector failed: %d\n", err); | |
8733 | goto err_vsis; | |
8734 | } | |
8735 | } | |
8736 | ||
df805f62 | 8737 | #ifdef CONFIG_PCI_IOV |
41c445ff JB |
8738 | /* prep for VF support */ |
8739 | if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) && | |
4eb3f768 SN |
8740 | (pf->flags & I40E_FLAG_MSIX_ENABLED) && |
8741 | !test_bit(__I40E_BAD_EEPROM, &pf->state)) { | |
41c445ff JB |
8742 | u32 val; |
8743 | ||
8744 | /* disable link interrupts for VFs */ | |
8745 | val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM); | |
8746 | val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK; | |
8747 | wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val); | |
8748 | i40e_flush(hw); | |
4aeec010 MW |
8749 | |
8750 | if (pci_num_vf(pdev)) { | |
8751 | dev_info(&pdev->dev, | |
8752 | "Active VFs found, allocating resources.\n"); | |
8753 | err = i40e_alloc_vfs(pf, pci_num_vf(pdev)); | |
8754 | if (err) | |
8755 | dev_info(&pdev->dev, | |
8756 | "Error %d allocating resources for existing VFs\n", | |
8757 | err); | |
8758 | } | |
41c445ff | 8759 | } |
df805f62 | 8760 | #endif /* CONFIG_PCI_IOV */ |
41c445ff | 8761 | |
93cd765b ASJ |
8762 | pfs_found++; |
8763 | ||
41c445ff JB |
8764 | i40e_dbg_pf_init(pf); |
8765 | ||
8766 | /* tell the firmware that we're starting */ | |
44033fac | 8767 | i40e_send_version(pf); |
41c445ff JB |
8768 | |
8769 | /* since everything's happy, start the service_task timer */ | |
8770 | mod_timer(&pf->service_timer, | |
8771 | round_jiffies(jiffies + pf->service_timer_period)); | |
8772 | ||
d4dfb81a CS |
8773 | /* Get the negotiated link width and speed from PCI config space */ |
8774 | pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status); | |
8775 | ||
8776 | i40e_set_pci_config_data(hw, link_status); | |
8777 | ||
69bfb110 | 8778 | dev_info(&pdev->dev, "PCI-Express: %s %s\n", |
d4dfb81a CS |
8779 | (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" : |
8780 | hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" : | |
8781 | hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" : | |
8782 | "Unknown"), | |
8783 | (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" : | |
8784 | hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" : | |
8785 | hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" : | |
8786 | hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" : | |
8787 | "Unknown")); | |
8788 | ||
8789 | if (hw->bus.width < i40e_bus_width_pcie_x8 || | |
8790 | hw->bus.speed < i40e_bus_speed_8000) { | |
8791 | dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n"); | |
8792 | dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n"); | |
8793 | } | |
8794 | ||
0c22b3dd JB |
8795 | /* print a string summarizing features */ |
8796 | i40e_print_features(pf); | |
8797 | ||
41c445ff JB |
8798 | return 0; |
8799 | ||
8800 | /* Unwind what we've done if something failed in the setup */ | |
8801 | err_vsis: | |
8802 | set_bit(__I40E_DOWN, &pf->state); | |
41c445ff JB |
8803 | i40e_clear_interrupt_scheme(pf); |
8804 | kfree(pf->vsi); | |
04b03013 SN |
8805 | err_switch_setup: |
8806 | i40e_reset_interrupt_capability(pf); | |
41c445ff JB |
8807 | del_timer_sync(&pf->service_timer); |
8808 | err_mac_addr: | |
8809 | err_configure_lan_hmc: | |
8810 | (void)i40e_shutdown_lan_hmc(hw); | |
8811 | err_init_lan_hmc: | |
8812 | kfree(pf->qp_pile); | |
8813 | kfree(pf->irq_pile); | |
8814 | err_sw_init: | |
8815 | err_adminq_setup: | |
8816 | (void)i40e_shutdown_adminq(hw); | |
8817 | err_pf_reset: | |
8818 | iounmap(hw->hw_addr); | |
8819 | err_ioremap: | |
8820 | kfree(pf); | |
8821 | err_pf_alloc: | |
8822 | pci_disable_pcie_error_reporting(pdev); | |
8823 | pci_release_selected_regions(pdev, | |
8824 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
8825 | err_pci_reg: | |
8826 | err_dma: | |
8827 | pci_disable_device(pdev); | |
8828 | return err; | |
8829 | } | |
8830 | ||
8831 | /** | |
8832 | * i40e_remove - Device removal routine | |
8833 | * @pdev: PCI device information struct | |
8834 | * | |
8835 | * i40e_remove is called by the PCI subsystem to alert the driver | |
8836 | * that is should release a PCI device. This could be caused by a | |
8837 | * Hot-Plug event, or because the driver is going to be removed from | |
8838 | * memory. | |
8839 | **/ | |
8840 | static void i40e_remove(struct pci_dev *pdev) | |
8841 | { | |
8842 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8843 | i40e_status ret_code; | |
8844 | u32 reg; | |
8845 | int i; | |
8846 | ||
8847 | i40e_dbg_pf_exit(pf); | |
8848 | ||
beb0dff1 JK |
8849 | i40e_ptp_stop(pf); |
8850 | ||
41c445ff JB |
8851 | /* no more scheduling of any task */ |
8852 | set_bit(__I40E_DOWN, &pf->state); | |
8853 | del_timer_sync(&pf->service_timer); | |
8854 | cancel_work_sync(&pf->service_task); | |
8855 | ||
eb2d80bc MW |
8856 | if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { |
8857 | i40e_free_vfs(pf); | |
8858 | pf->flags &= ~I40E_FLAG_SRIOV_ENABLED; | |
8859 | } | |
8860 | ||
41c445ff JB |
8861 | i40e_fdir_teardown(pf); |
8862 | ||
8863 | /* If there is a switch structure or any orphans, remove them. | |
8864 | * This will leave only the PF's VSI remaining. | |
8865 | */ | |
8866 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
8867 | if (!pf->veb[i]) | |
8868 | continue; | |
8869 | ||
8870 | if (pf->veb[i]->uplink_seid == pf->mac_seid || | |
8871 | pf->veb[i]->uplink_seid == 0) | |
8872 | i40e_switch_branch_release(pf->veb[i]); | |
8873 | } | |
8874 | ||
8875 | /* Now we can shutdown the PF's VSI, just before we kill | |
8876 | * adminq and hmc. | |
8877 | */ | |
8878 | if (pf->vsi[pf->lan_vsi]) | |
8879 | i40e_vsi_release(pf->vsi[pf->lan_vsi]); | |
8880 | ||
8881 | i40e_stop_misc_vector(pf); | |
8882 | if (pf->flags & I40E_FLAG_MSIX_ENABLED) { | |
8883 | synchronize_irq(pf->msix_entries[0].vector); | |
8884 | free_irq(pf->msix_entries[0].vector, pf); | |
8885 | } | |
8886 | ||
8887 | /* shutdown and destroy the HMC */ | |
60442dea SN |
8888 | if (pf->hw.hmc.hmc_obj) { |
8889 | ret_code = i40e_shutdown_lan_hmc(&pf->hw); | |
8890 | if (ret_code) | |
8891 | dev_warn(&pdev->dev, | |
8892 | "Failed to destroy the HMC resources: %d\n", | |
8893 | ret_code); | |
8894 | } | |
41c445ff JB |
8895 | |
8896 | /* shutdown the adminq */ | |
41c445ff JB |
8897 | ret_code = i40e_shutdown_adminq(&pf->hw); |
8898 | if (ret_code) | |
8899 | dev_warn(&pdev->dev, | |
8900 | "Failed to destroy the Admin Queue resources: %d\n", | |
8901 | ret_code); | |
8902 | ||
8903 | /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */ | |
8904 | i40e_clear_interrupt_scheme(pf); | |
505682cd | 8905 | for (i = 0; i < pf->num_alloc_vsi; i++) { |
41c445ff JB |
8906 | if (pf->vsi[i]) { |
8907 | i40e_vsi_clear_rings(pf->vsi[i]); | |
8908 | i40e_vsi_clear(pf->vsi[i]); | |
8909 | pf->vsi[i] = NULL; | |
8910 | } | |
8911 | } | |
8912 | ||
8913 | for (i = 0; i < I40E_MAX_VEB; i++) { | |
8914 | kfree(pf->veb[i]); | |
8915 | pf->veb[i] = NULL; | |
8916 | } | |
8917 | ||
8918 | kfree(pf->qp_pile); | |
8919 | kfree(pf->irq_pile); | |
41c445ff JB |
8920 | kfree(pf->vsi); |
8921 | ||
8922 | /* force a PF reset to clean anything leftover */ | |
8923 | reg = rd32(&pf->hw, I40E_PFGEN_CTRL); | |
8924 | wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK)); | |
8925 | i40e_flush(&pf->hw); | |
8926 | ||
8927 | iounmap(pf->hw.hw_addr); | |
8928 | kfree(pf); | |
8929 | pci_release_selected_regions(pdev, | |
8930 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
8931 | ||
8932 | pci_disable_pcie_error_reporting(pdev); | |
8933 | pci_disable_device(pdev); | |
8934 | } | |
8935 | ||
8936 | /** | |
8937 | * i40e_pci_error_detected - warning that something funky happened in PCI land | |
8938 | * @pdev: PCI device information struct | |
8939 | * | |
8940 | * Called to warn that something happened and the error handling steps | |
8941 | * are in progress. Allows the driver to quiesce things, be ready for | |
8942 | * remediation. | |
8943 | **/ | |
8944 | static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev, | |
8945 | enum pci_channel_state error) | |
8946 | { | |
8947 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8948 | ||
8949 | dev_info(&pdev->dev, "%s: error %d\n", __func__, error); | |
8950 | ||
8951 | /* shutdown all operations */ | |
9007bccd SN |
8952 | if (!test_bit(__I40E_SUSPENDED, &pf->state)) { |
8953 | rtnl_lock(); | |
8954 | i40e_prep_for_reset(pf); | |
8955 | rtnl_unlock(); | |
8956 | } | |
41c445ff JB |
8957 | |
8958 | /* Request a slot reset */ | |
8959 | return PCI_ERS_RESULT_NEED_RESET; | |
8960 | } | |
8961 | ||
8962 | /** | |
8963 | * i40e_pci_error_slot_reset - a PCI slot reset just happened | |
8964 | * @pdev: PCI device information struct | |
8965 | * | |
8966 | * Called to find if the driver can work with the device now that | |
8967 | * the pci slot has been reset. If a basic connection seems good | |
8968 | * (registers are readable and have sane content) then return a | |
8969 | * happy little PCI_ERS_RESULT_xxx. | |
8970 | **/ | |
8971 | static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev) | |
8972 | { | |
8973 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8974 | pci_ers_result_t result; | |
8975 | int err; | |
8976 | u32 reg; | |
8977 | ||
8978 | dev_info(&pdev->dev, "%s\n", __func__); | |
8979 | if (pci_enable_device_mem(pdev)) { | |
8980 | dev_info(&pdev->dev, | |
8981 | "Cannot re-enable PCI device after reset.\n"); | |
8982 | result = PCI_ERS_RESULT_DISCONNECT; | |
8983 | } else { | |
8984 | pci_set_master(pdev); | |
8985 | pci_restore_state(pdev); | |
8986 | pci_save_state(pdev); | |
8987 | pci_wake_from_d3(pdev, false); | |
8988 | ||
8989 | reg = rd32(&pf->hw, I40E_GLGEN_RTRIG); | |
8990 | if (reg == 0) | |
8991 | result = PCI_ERS_RESULT_RECOVERED; | |
8992 | else | |
8993 | result = PCI_ERS_RESULT_DISCONNECT; | |
8994 | } | |
8995 | ||
8996 | err = pci_cleanup_aer_uncorrect_error_status(pdev); | |
8997 | if (err) { | |
8998 | dev_info(&pdev->dev, | |
8999 | "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n", | |
9000 | err); | |
9001 | /* non-fatal, continue */ | |
9002 | } | |
9003 | ||
9004 | return result; | |
9005 | } | |
9006 | ||
9007 | /** | |
9008 | * i40e_pci_error_resume - restart operations after PCI error recovery | |
9009 | * @pdev: PCI device information struct | |
9010 | * | |
9011 | * Called to allow the driver to bring things back up after PCI error | |
9012 | * and/or reset recovery has finished. | |
9013 | **/ | |
9014 | static void i40e_pci_error_resume(struct pci_dev *pdev) | |
9015 | { | |
9016 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
9017 | ||
9018 | dev_info(&pdev->dev, "%s\n", __func__); | |
9007bccd SN |
9019 | if (test_bit(__I40E_SUSPENDED, &pf->state)) |
9020 | return; | |
9021 | ||
9022 | rtnl_lock(); | |
41c445ff | 9023 | i40e_handle_reset_warning(pf); |
9007bccd SN |
9024 | rtnl_lock(); |
9025 | } | |
9026 | ||
9027 | /** | |
9028 | * i40e_shutdown - PCI callback for shutting down | |
9029 | * @pdev: PCI device information struct | |
9030 | **/ | |
9031 | static void i40e_shutdown(struct pci_dev *pdev) | |
9032 | { | |
9033 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8e2773ae | 9034 | struct i40e_hw *hw = &pf->hw; |
9007bccd SN |
9035 | |
9036 | set_bit(__I40E_SUSPENDED, &pf->state); | |
9037 | set_bit(__I40E_DOWN, &pf->state); | |
9038 | rtnl_lock(); | |
9039 | i40e_prep_for_reset(pf); | |
9040 | rtnl_unlock(); | |
9041 | ||
8e2773ae SN |
9042 | wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); |
9043 | wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
9044 | ||
9007bccd | 9045 | if (system_state == SYSTEM_POWER_OFF) { |
8e2773ae | 9046 | pci_wake_from_d3(pdev, pf->wol_en); |
9007bccd SN |
9047 | pci_set_power_state(pdev, PCI_D3hot); |
9048 | } | |
9049 | } | |
9050 | ||
9051 | #ifdef CONFIG_PM | |
9052 | /** | |
9053 | * i40e_suspend - PCI callback for moving to D3 | |
9054 | * @pdev: PCI device information struct | |
9055 | **/ | |
9056 | static int i40e_suspend(struct pci_dev *pdev, pm_message_t state) | |
9057 | { | |
9058 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
8e2773ae | 9059 | struct i40e_hw *hw = &pf->hw; |
9007bccd SN |
9060 | |
9061 | set_bit(__I40E_SUSPENDED, &pf->state); | |
9062 | set_bit(__I40E_DOWN, &pf->state); | |
9063 | rtnl_lock(); | |
9064 | i40e_prep_for_reset(pf); | |
9065 | rtnl_unlock(); | |
9066 | ||
8e2773ae SN |
9067 | wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); |
9068 | wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); | |
9069 | ||
9070 | pci_wake_from_d3(pdev, pf->wol_en); | |
9007bccd SN |
9071 | pci_set_power_state(pdev, PCI_D3hot); |
9072 | ||
9073 | return 0; | |
41c445ff JB |
9074 | } |
9075 | ||
9007bccd SN |
9076 | /** |
9077 | * i40e_resume - PCI callback for waking up from D3 | |
9078 | * @pdev: PCI device information struct | |
9079 | **/ | |
9080 | static int i40e_resume(struct pci_dev *pdev) | |
9081 | { | |
9082 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
9083 | u32 err; | |
9084 | ||
9085 | pci_set_power_state(pdev, PCI_D0); | |
9086 | pci_restore_state(pdev); | |
9087 | /* pci_restore_state() clears dev->state_saves, so | |
9088 | * call pci_save_state() again to restore it. | |
9089 | */ | |
9090 | pci_save_state(pdev); | |
9091 | ||
9092 | err = pci_enable_device_mem(pdev); | |
9093 | if (err) { | |
9094 | dev_err(&pdev->dev, | |
9095 | "%s: Cannot enable PCI device from suspend\n", | |
9096 | __func__); | |
9097 | return err; | |
9098 | } | |
9099 | pci_set_master(pdev); | |
9100 | ||
9101 | /* no wakeup events while running */ | |
9102 | pci_wake_from_d3(pdev, false); | |
9103 | ||
9104 | /* handling the reset will rebuild the device state */ | |
9105 | if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) { | |
9106 | clear_bit(__I40E_DOWN, &pf->state); | |
9107 | rtnl_lock(); | |
9108 | i40e_reset_and_rebuild(pf, false); | |
9109 | rtnl_unlock(); | |
9110 | } | |
9111 | ||
9112 | return 0; | |
9113 | } | |
9114 | ||
9115 | #endif | |
41c445ff JB |
9116 | static const struct pci_error_handlers i40e_err_handler = { |
9117 | .error_detected = i40e_pci_error_detected, | |
9118 | .slot_reset = i40e_pci_error_slot_reset, | |
9119 | .resume = i40e_pci_error_resume, | |
9120 | }; | |
9121 | ||
9122 | static struct pci_driver i40e_driver = { | |
9123 | .name = i40e_driver_name, | |
9124 | .id_table = i40e_pci_tbl, | |
9125 | .probe = i40e_probe, | |
9126 | .remove = i40e_remove, | |
9007bccd SN |
9127 | #ifdef CONFIG_PM |
9128 | .suspend = i40e_suspend, | |
9129 | .resume = i40e_resume, | |
9130 | #endif | |
9131 | .shutdown = i40e_shutdown, | |
41c445ff JB |
9132 | .err_handler = &i40e_err_handler, |
9133 | .sriov_configure = i40e_pci_sriov_configure, | |
9134 | }; | |
9135 | ||
9136 | /** | |
9137 | * i40e_init_module - Driver registration routine | |
9138 | * | |
9139 | * i40e_init_module is the first routine called when the driver is | |
9140 | * loaded. All it does is register with the PCI subsystem. | |
9141 | **/ | |
9142 | static int __init i40e_init_module(void) | |
9143 | { | |
9144 | pr_info("%s: %s - version %s\n", i40e_driver_name, | |
9145 | i40e_driver_string, i40e_driver_version_str); | |
9146 | pr_info("%s: %s\n", i40e_driver_name, i40e_copyright); | |
9147 | i40e_dbg_init(); | |
9148 | return pci_register_driver(&i40e_driver); | |
9149 | } | |
9150 | module_init(i40e_init_module); | |
9151 | ||
9152 | /** | |
9153 | * i40e_exit_module - Driver exit cleanup routine | |
9154 | * | |
9155 | * i40e_exit_module is called just before the driver is removed | |
9156 | * from memory. | |
9157 | **/ | |
9158 | static void __exit i40e_exit_module(void) | |
9159 | { | |
9160 | pci_unregister_driver(&i40e_driver); | |
9161 | i40e_dbg_exit(); | |
9162 | } | |
9163 | module_exit(i40e_exit_module); |