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7daa6bf3 JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
4 | * Copyright(c) 2013 Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * The full GNU General Public License is included in this distribution in | |
20 | * the file called "COPYING". | |
21 | * | |
22 | * Contact Information: | |
23 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | * | |
26 | ******************************************************************************/ | |
27 | ||
28 | /* Interrupt Throttling and Rate Limiting (storm control) Goodies */ | |
29 | ||
30 | #define I40E_MAX_ITR 0x07FF | |
31 | #define I40E_MIN_ITR 0x0001 | |
32 | #define I40E_ITR_USEC_RESOLUTION 2 | |
33 | #define I40E_MAX_IRATE 0x03F | |
34 | #define I40E_MIN_IRATE 0x001 | |
35 | #define I40E_IRATE_USEC_RESOLUTION 4 | |
36 | #define I40E_ITR_100K 0x0005 | |
37 | #define I40E_ITR_20K 0x0019 | |
38 | #define I40E_ITR_8K 0x003E | |
39 | #define I40E_ITR_4K 0x007A | |
40 | #define I40E_ITR_RX_DEF I40E_ITR_8K | |
41 | #define I40E_ITR_TX_DEF I40E_ITR_4K | |
42 | #define I40E_ITR_DYNAMIC 0x8000 /* use top bit as a flag */ | |
43 | #define I40E_MIN_INT_RATE 250 /* ~= 1000000 / (I40E_MAX_ITR * 2) */ | |
44 | #define I40E_MAX_INT_RATE 500000 /* == 1000000 / (I40E_MIN_ITR * 2) */ | |
45 | #define I40E_DEFAULT_IRQ_WORK 256 | |
46 | #define ITR_TO_REG(setting) ((setting & ~I40E_ITR_DYNAMIC) >> 1) | |
47 | #define ITR_IS_DYNAMIC(setting) (!!(setting & I40E_ITR_DYNAMIC)) | |
48 | #define ITR_REG_TO_USEC(itr_reg) (itr_reg << 1) | |
49 | ||
50 | #define I40E_QUEUE_END_OF_LIST 0x7FF | |
51 | ||
52 | #define I40E_ITR_NONE 3 | |
53 | #define I40E_RX_ITR 0 | |
54 | #define I40E_TX_ITR 1 | |
55 | #define I40E_PE_ITR 2 | |
56 | /* Supported Rx Buffer Sizes */ | |
57 | #define I40E_RXBUFFER_512 512 /* Used for packet split */ | |
58 | #define I40E_RXBUFFER_2048 2048 | |
59 | #define I40E_RXBUFFER_3072 3072 /* For FCoE MTU of 2158 */ | |
60 | #define I40E_RXBUFFER_4096 4096 | |
61 | #define I40E_RXBUFFER_8192 8192 | |
62 | #define I40E_MAX_RXBUFFER 9728 /* largest size for single descriptor */ | |
63 | ||
64 | /* NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we | |
65 | * reserve 2 more, and skb_shared_info adds an additional 384 bytes more, | |
66 | * this adds up to 512 bytes of extra data meaning the smallest allocation | |
67 | * we could have is 1K. | |
68 | * i.e. RXBUFFER_512 --> size-1024 slab | |
69 | */ | |
70 | #define I40E_RX_HDR_SIZE I40E_RXBUFFER_512 | |
71 | ||
72 | /* How many Rx Buffers do we bundle into one write to the hardware ? */ | |
73 | #define I40E_RX_BUFFER_WRITE 16 /* Must be power of 2 */ | |
74 | #define I40E_RX_NEXT_DESC(r, i, n) \ | |
75 | do { \ | |
76 | (i)++; \ | |
77 | if ((i) == (r)->count) \ | |
78 | i = 0; \ | |
79 | (n) = I40E_RX_DESC((r), (i)); \ | |
80 | } while (0) | |
81 | ||
82 | #define I40E_RX_NEXT_DESC_PREFETCH(r, i, n) \ | |
83 | do { \ | |
84 | I40E_RX_NEXT_DESC((r), (i), (n)); \ | |
85 | prefetch((n)); \ | |
86 | } while (0) | |
87 | ||
88 | #define i40e_rx_desc i40e_32byte_rx_desc | |
89 | ||
90 | #define I40E_MIN_TX_LEN 17 | |
91 | #define I40E_MAX_DATA_PER_TXD 16383 /* aka 16kB - 1 */ | |
92 | ||
93 | /* Tx Descriptors needed, worst case */ | |
94 | #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), I40E_MAX_DATA_PER_TXD) | |
95 | #define DESC_NEEDED ((MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE)) + 4) | |
96 | ||
97 | #define I40E_TX_FLAGS_CSUM (u32)(1) | |
98 | #define I40E_TX_FLAGS_HW_VLAN (u32)(1 << 1) | |
99 | #define I40E_TX_FLAGS_SW_VLAN (u32)(1 << 2) | |
100 | #define I40E_TX_FLAGS_TSO (u32)(1 << 3) | |
101 | #define I40E_TX_FLAGS_IPV4 (u32)(1 << 4) | |
102 | #define I40E_TX_FLAGS_IPV6 (u32)(1 << 5) | |
103 | #define I40E_TX_FLAGS_FCCRC (u32)(1 << 6) | |
104 | #define I40E_TX_FLAGS_FSO (u32)(1 << 7) | |
7daa6bf3 JB |
105 | #define I40E_TX_FLAGS_VLAN_MASK 0xffff0000 |
106 | #define I40E_TX_FLAGS_VLAN_PRIO_MASK 0xe0000000 | |
107 | #define I40E_TX_FLAGS_VLAN_PRIO_SHIFT 29 | |
108 | #define I40E_TX_FLAGS_VLAN_SHIFT 16 | |
109 | ||
110 | struct i40e_tx_buffer { | |
7daa6bf3 | 111 | struct i40e_tx_desc *next_to_watch; |
35a1e2ad AD |
112 | unsigned long time_stamp; |
113 | struct sk_buff *skb; | |
7daa6bf3 | 114 | unsigned int bytecount; |
35a1e2ad AD |
115 | unsigned short gso_segs; |
116 | DEFINE_DMA_UNMAP_ADDR(dma); | |
117 | DEFINE_DMA_UNMAP_LEN(len); | |
118 | u32 tx_flags; | |
7daa6bf3 JB |
119 | }; |
120 | ||
121 | struct i40e_rx_buffer { | |
122 | struct sk_buff *skb; | |
123 | dma_addr_t dma; | |
124 | struct page *page; | |
125 | dma_addr_t page_dma; | |
126 | unsigned int page_offset; | |
127 | }; | |
128 | ||
a114d0a6 | 129 | struct i40e_queue_stats { |
7daa6bf3 JB |
130 | u64 packets; |
131 | u64 bytes; | |
a114d0a6 AD |
132 | }; |
133 | ||
134 | struct i40e_tx_queue_stats { | |
7daa6bf3 JB |
135 | u64 restart_queue; |
136 | u64 tx_busy; | |
7daa6bf3 JB |
137 | u64 tx_done_old; |
138 | }; | |
139 | ||
140 | struct i40e_rx_queue_stats { | |
7daa6bf3 JB |
141 | u64 non_eop_descs; |
142 | u64 alloc_rx_page_failed; | |
143 | u64 alloc_rx_buff_failed; | |
144 | }; | |
145 | ||
146 | enum i40e_ring_state_t { | |
147 | __I40E_TX_FDIR_INIT_DONE, | |
148 | __I40E_TX_XPS_INIT_DONE, | |
149 | __I40E_TX_DETECT_HANG, | |
150 | __I40E_HANG_CHECK_ARMED, | |
151 | __I40E_RX_PS_ENABLED, | |
152 | __I40E_RX_LRO_ENABLED, | |
153 | __I40E_RX_16BYTE_DESC_ENABLED, | |
154 | }; | |
155 | ||
156 | #define ring_is_ps_enabled(ring) \ | |
157 | test_bit(__I40E_RX_PS_ENABLED, &(ring)->state) | |
158 | #define set_ring_ps_enabled(ring) \ | |
159 | set_bit(__I40E_RX_PS_ENABLED, &(ring)->state) | |
160 | #define clear_ring_ps_enabled(ring) \ | |
161 | clear_bit(__I40E_RX_PS_ENABLED, &(ring)->state) | |
162 | #define check_for_tx_hang(ring) \ | |
163 | test_bit(__I40E_TX_DETECT_HANG, &(ring)->state) | |
164 | #define set_check_for_tx_hang(ring) \ | |
165 | set_bit(__I40E_TX_DETECT_HANG, &(ring)->state) | |
166 | #define clear_check_for_tx_hang(ring) \ | |
167 | clear_bit(__I40E_TX_DETECT_HANG, &(ring)->state) | |
168 | #define ring_is_lro_enabled(ring) \ | |
169 | test_bit(__I40E_RX_LRO_ENABLED, &(ring)->state) | |
170 | #define set_ring_lro_enabled(ring) \ | |
171 | set_bit(__I40E_RX_LRO_ENABLED, &(ring)->state) | |
172 | #define clear_ring_lro_enabled(ring) \ | |
173 | clear_bit(__I40E_RX_LRO_ENABLED, &(ring)->state) | |
174 | #define ring_is_16byte_desc_enabled(ring) \ | |
175 | test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state) | |
176 | #define set_ring_16byte_desc_enabled(ring) \ | |
177 | set_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state) | |
178 | #define clear_ring_16byte_desc_enabled(ring) \ | |
179 | clear_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state) | |
180 | ||
181 | /* struct that defines a descriptor ring, associated with a VSI */ | |
182 | struct i40e_ring { | |
183 | void *desc; /* Descriptor ring memory */ | |
184 | struct device *dev; /* Used for DMA mapping */ | |
185 | struct net_device *netdev; /* netdev ring maps to */ | |
186 | union { | |
187 | struct i40e_tx_buffer *tx_bi; | |
188 | struct i40e_rx_buffer *rx_bi; | |
189 | }; | |
190 | unsigned long state; | |
191 | u16 queue_index; /* Queue number of ring */ | |
192 | u8 dcb_tc; /* Traffic class of ring */ | |
193 | u8 __iomem *tail; | |
194 | ||
195 | u16 count; /* Number of descriptors */ | |
196 | u16 reg_idx; /* HW register index of the ring */ | |
197 | u16 rx_hdr_len; | |
198 | u16 rx_buf_len; | |
199 | u8 dtype; | |
200 | #define I40E_RX_DTYPE_NO_SPLIT 0 | |
201 | #define I40E_RX_DTYPE_SPLIT_ALWAYS 1 | |
202 | #define I40E_RX_DTYPE_HEADER_SPLIT 2 | |
203 | u8 hsplit; | |
204 | #define I40E_RX_SPLIT_L2 0x1 | |
205 | #define I40E_RX_SPLIT_IP 0x2 | |
206 | #define I40E_RX_SPLIT_TCP_UDP 0x4 | |
207 | #define I40E_RX_SPLIT_SCTP 0x8 | |
208 | ||
209 | /* used in interrupt processing */ | |
210 | u16 next_to_use; | |
211 | u16 next_to_clean; | |
212 | ||
213 | u8 atr_sample_rate; | |
214 | u8 atr_count; | |
215 | ||
216 | bool ring_active; /* is ring online or not */ | |
217 | ||
218 | /* stats structs */ | |
a114d0a6 | 219 | struct i40e_queue_stats stats; |
7daa6bf3 JB |
220 | union { |
221 | struct i40e_tx_queue_stats tx_stats; | |
222 | struct i40e_rx_queue_stats rx_stats; | |
223 | }; | |
224 | ||
225 | unsigned int size; /* length of descriptor ring in bytes */ | |
226 | dma_addr_t dma; /* physical address of ring */ | |
227 | ||
228 | struct i40e_vsi *vsi; /* Backreference to associated VSI */ | |
229 | struct i40e_q_vector *q_vector; /* Backreference to associated vector */ | |
230 | } ____cacheline_internodealigned_in_smp; | |
231 | ||
232 | enum i40e_latency_range { | |
233 | I40E_LOWEST_LATENCY = 0, | |
234 | I40E_LOW_LATENCY = 1, | |
235 | I40E_BULK_LATENCY = 2, | |
236 | }; | |
237 | ||
238 | struct i40e_ring_container { | |
239 | #define I40E_MAX_RINGPAIR_PER_VECTOR 8 | |
240 | /* array of pointers to rings */ | |
241 | struct i40e_ring *ring[I40E_MAX_RINGPAIR_PER_VECTOR]; | |
242 | unsigned int total_bytes; /* total bytes processed this int */ | |
243 | unsigned int total_packets; /* total packets processed this int */ | |
244 | u16 count; | |
245 | enum i40e_latency_range latency_range; | |
246 | u16 itr; | |
247 | }; | |
248 | ||
249 | void i40e_alloc_rx_buffers(struct i40e_ring *rxr, u16 cleaned_count); | |
250 | netdev_tx_t i40e_lan_xmit_frame(struct sk_buff *skb, struct net_device *netdev); | |
251 | void i40e_clean_tx_ring(struct i40e_ring *tx_ring); | |
252 | void i40e_clean_rx_ring(struct i40e_ring *rx_ring); | |
253 | int i40e_setup_tx_descriptors(struct i40e_ring *tx_ring); | |
254 | int i40e_setup_rx_descriptors(struct i40e_ring *rx_ring); | |
255 | void i40e_free_tx_resources(struct i40e_ring *tx_ring); | |
256 | void i40e_free_rx_resources(struct i40e_ring *rx_ring); | |
257 | int i40e_napi_poll(struct napi_struct *napi, int budget); |