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5c3c48ac JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
4 | * Copyright(c) 2013 Intel Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License along with | |
16 | * this program; if not, write to the Free Software Foundation, Inc., | |
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | * | |
19 | * The full GNU General Public License is included in this distribution in | |
20 | * the file called "COPYING". | |
21 | * | |
22 | * Contact Information: | |
23 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | * | |
26 | ******************************************************************************/ | |
27 | ||
28 | #include "i40e.h" | |
29 | ||
30 | /***********************misc routines*****************************/ | |
31 | ||
32 | /** | |
33 | * i40e_vc_isvalid_vsi_id | |
34 | * @vf: pointer to the vf info | |
35 | * @vsi_id: vf relative vsi id | |
36 | * | |
37 | * check for the valid vsi id | |
38 | **/ | |
39 | static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u8 vsi_id) | |
40 | { | |
41 | struct i40e_pf *pf = vf->pf; | |
42 | ||
43 | return pf->vsi[vsi_id]->vf_id == vf->vf_id; | |
44 | } | |
45 | ||
46 | /** | |
47 | * i40e_vc_isvalid_queue_id | |
48 | * @vf: pointer to the vf info | |
49 | * @vsi_id: vsi id | |
50 | * @qid: vsi relative queue id | |
51 | * | |
52 | * check for the valid queue id | |
53 | **/ | |
54 | static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u8 vsi_id, | |
55 | u8 qid) | |
56 | { | |
57 | struct i40e_pf *pf = vf->pf; | |
58 | ||
59 | return qid < pf->vsi[vsi_id]->num_queue_pairs; | |
60 | } | |
61 | ||
62 | /** | |
63 | * i40e_vc_isvalid_vector_id | |
64 | * @vf: pointer to the vf info | |
65 | * @vector_id: vf relative vector id | |
66 | * | |
67 | * check for the valid vector id | |
68 | **/ | |
69 | static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id) | |
70 | { | |
71 | struct i40e_pf *pf = vf->pf; | |
72 | ||
54692b40 | 73 | return vector_id <= pf->hw.func_caps.num_msix_vectors_vf; |
5c3c48ac JB |
74 | } |
75 | ||
76 | /***********************vf resource mgmt routines*****************/ | |
77 | ||
78 | /** | |
79 | * i40e_vc_get_pf_queue_id | |
80 | * @vf: pointer to the vf info | |
81 | * @vsi_idx: index of VSI in PF struct | |
82 | * @vsi_queue_id: vsi relative queue id | |
83 | * | |
84 | * return pf relative queue id | |
85 | **/ | |
86 | static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u8 vsi_idx, | |
87 | u8 vsi_queue_id) | |
88 | { | |
89 | struct i40e_pf *pf = vf->pf; | |
90 | struct i40e_vsi *vsi = pf->vsi[vsi_idx]; | |
91 | u16 pf_queue_id = I40E_QUEUE_END_OF_LIST; | |
92 | ||
93 | if (le16_to_cpu(vsi->info.mapping_flags) & | |
94 | I40E_AQ_VSI_QUE_MAP_NONCONTIG) | |
95 | pf_queue_id = | |
96 | le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]); | |
97 | else | |
98 | pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) + | |
99 | vsi_queue_id; | |
100 | ||
101 | return pf_queue_id; | |
102 | } | |
103 | ||
5c3c48ac JB |
104 | /** |
105 | * i40e_config_irq_link_list | |
106 | * @vf: pointer to the vf info | |
107 | * @vsi_idx: index of VSI in PF struct | |
108 | * @vecmap: irq map info | |
109 | * | |
110 | * configure irq link list from the map | |
111 | **/ | |
112 | static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_idx, | |
113 | struct i40e_virtchnl_vector_map *vecmap) | |
114 | { | |
115 | unsigned long linklistmap = 0, tempmap; | |
116 | struct i40e_pf *pf = vf->pf; | |
117 | struct i40e_hw *hw = &pf->hw; | |
118 | u16 vsi_queue_id, pf_queue_id; | |
119 | enum i40e_queue_type qtype; | |
120 | u16 next_q, vector_id; | |
121 | u32 reg, reg_idx; | |
122 | u16 itr_idx = 0; | |
123 | ||
124 | vector_id = vecmap->vector_id; | |
125 | /* setup the head */ | |
126 | if (0 == vector_id) | |
127 | reg_idx = I40E_VPINT_LNKLST0(vf->vf_id); | |
128 | else | |
129 | reg_idx = I40E_VPINT_LNKLSTN( | |
13c60b99 | 130 | (pf->hw.func_caps.num_msix_vectors_vf |
5c3c48ac JB |
131 | * vf->vf_id) + (vector_id - 1)); |
132 | ||
133 | if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) { | |
134 | /* Special case - No queues mapped on this vector */ | |
135 | wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK); | |
136 | goto irq_list_done; | |
137 | } | |
138 | tempmap = vecmap->rxq_map; | |
4836650b | 139 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
140 | linklistmap |= (1 << |
141 | (I40E_VIRTCHNL_SUPPORTED_QTYPES * | |
142 | vsi_queue_id)); | |
5c3c48ac JB |
143 | } |
144 | ||
145 | tempmap = vecmap->txq_map; | |
4836650b | 146 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
147 | linklistmap |= (1 << |
148 | (I40E_VIRTCHNL_SUPPORTED_QTYPES * vsi_queue_id | |
149 | + 1)); | |
5c3c48ac JB |
150 | } |
151 | ||
152 | next_q = find_first_bit(&linklistmap, | |
153 | (I40E_MAX_VSI_QP * | |
154 | I40E_VIRTCHNL_SUPPORTED_QTYPES)); | |
155 | vsi_queue_id = next_q/I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
156 | qtype = next_q%I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
157 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
158 | reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id); | |
159 | ||
160 | wr32(hw, reg_idx, reg); | |
161 | ||
162 | while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) { | |
163 | switch (qtype) { | |
164 | case I40E_QUEUE_TYPE_RX: | |
165 | reg_idx = I40E_QINT_RQCTL(pf_queue_id); | |
166 | itr_idx = vecmap->rxitr_idx; | |
167 | break; | |
168 | case I40E_QUEUE_TYPE_TX: | |
169 | reg_idx = I40E_QINT_TQCTL(pf_queue_id); | |
170 | itr_idx = vecmap->txitr_idx; | |
171 | break; | |
172 | default: | |
173 | break; | |
174 | } | |
175 | ||
176 | next_q = find_next_bit(&linklistmap, | |
177 | (I40E_MAX_VSI_QP * | |
178 | I40E_VIRTCHNL_SUPPORTED_QTYPES), | |
179 | next_q + 1); | |
180 | if (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) { | |
181 | vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
182 | qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES; | |
183 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, | |
184 | vsi_queue_id); | |
185 | } else { | |
186 | pf_queue_id = I40E_QUEUE_END_OF_LIST; | |
187 | qtype = 0; | |
188 | } | |
189 | ||
190 | /* format for the RQCTL & TQCTL regs is same */ | |
191 | reg = (vector_id) | | |
192 | (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) | | |
193 | (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) | | |
194 | (1 << I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) | | |
195 | (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT); | |
196 | wr32(hw, reg_idx, reg); | |
197 | } | |
198 | ||
199 | irq_list_done: | |
200 | i40e_flush(hw); | |
201 | } | |
202 | ||
203 | /** | |
204 | * i40e_config_vsi_tx_queue | |
205 | * @vf: pointer to the vf info | |
206 | * @vsi_idx: index of VSI in PF struct | |
207 | * @vsi_queue_id: vsi relative queue index | |
208 | * @info: config. info | |
209 | * | |
210 | * configure tx queue | |
211 | **/ | |
212 | static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx, | |
213 | u16 vsi_queue_id, | |
214 | struct i40e_virtchnl_txq_info *info) | |
215 | { | |
216 | struct i40e_pf *pf = vf->pf; | |
217 | struct i40e_hw *hw = &pf->hw; | |
218 | struct i40e_hmc_obj_txq tx_ctx; | |
219 | u16 pf_queue_id; | |
220 | u32 qtx_ctl; | |
221 | int ret = 0; | |
222 | ||
223 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
224 | ||
225 | /* clear the context structure first */ | |
226 | memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq)); | |
227 | ||
228 | /* only set the required fields */ | |
229 | tx_ctx.base = info->dma_ring_addr / 128; | |
230 | tx_ctx.qlen = info->ring_len; | |
231 | tx_ctx.rdylist = le16_to_cpu(pf->vsi[vsi_idx]->info.qs_handle[0]); | |
232 | tx_ctx.rdylist_act = 0; | |
233 | ||
234 | /* clear the context in the HMC */ | |
235 | ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id); | |
236 | if (ret) { | |
237 | dev_err(&pf->pdev->dev, | |
238 | "Failed to clear VF LAN Tx queue context %d, error: %d\n", | |
239 | pf_queue_id, ret); | |
240 | ret = -ENOENT; | |
241 | goto error_context; | |
242 | } | |
243 | ||
244 | /* set the context in the HMC */ | |
245 | ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx); | |
246 | if (ret) { | |
247 | dev_err(&pf->pdev->dev, | |
248 | "Failed to set VF LAN Tx queue context %d error: %d\n", | |
249 | pf_queue_id, ret); | |
250 | ret = -ENOENT; | |
251 | goto error_context; | |
252 | } | |
253 | ||
254 | /* associate this queue with the PCI VF function */ | |
255 | qtx_ctl = I40E_QTX_CTL_VF_QUEUE; | |
13fd9774 | 256 | qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) |
5c3c48ac JB |
257 | & I40E_QTX_CTL_PF_INDX_MASK); |
258 | qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id) | |
259 | << I40E_QTX_CTL_VFVM_INDX_SHIFT) | |
260 | & I40E_QTX_CTL_VFVM_INDX_MASK); | |
261 | wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl); | |
262 | i40e_flush(hw); | |
263 | ||
264 | error_context: | |
265 | return ret; | |
266 | } | |
267 | ||
268 | /** | |
269 | * i40e_config_vsi_rx_queue | |
270 | * @vf: pointer to the vf info | |
271 | * @vsi_idx: index of VSI in PF struct | |
272 | * @vsi_queue_id: vsi relative queue index | |
273 | * @info: config. info | |
274 | * | |
275 | * configure rx queue | |
276 | **/ | |
277 | static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx, | |
278 | u16 vsi_queue_id, | |
279 | struct i40e_virtchnl_rxq_info *info) | |
280 | { | |
281 | struct i40e_pf *pf = vf->pf; | |
282 | struct i40e_hw *hw = &pf->hw; | |
283 | struct i40e_hmc_obj_rxq rx_ctx; | |
284 | u16 pf_queue_id; | |
285 | int ret = 0; | |
286 | ||
287 | pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id); | |
288 | ||
289 | /* clear the context structure first */ | |
290 | memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq)); | |
291 | ||
292 | /* only set the required fields */ | |
293 | rx_ctx.base = info->dma_ring_addr / 128; | |
294 | rx_ctx.qlen = info->ring_len; | |
295 | ||
296 | if (info->splithdr_enabled) { | |
297 | rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 | | |
298 | I40E_RX_SPLIT_IP | | |
299 | I40E_RX_SPLIT_TCP_UDP | | |
300 | I40E_RX_SPLIT_SCTP; | |
301 | /* header length validation */ | |
302 | if (info->hdr_size > ((2 * 1024) - 64)) { | |
303 | ret = -EINVAL; | |
304 | goto error_param; | |
305 | } | |
306 | rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT; | |
307 | ||
308 | /* set splitalways mode 10b */ | |
309 | rx_ctx.dtype = 0x2; | |
310 | } | |
311 | ||
312 | /* databuffer length validation */ | |
313 | if (info->databuffer_size > ((16 * 1024) - 128)) { | |
314 | ret = -EINVAL; | |
315 | goto error_param; | |
316 | } | |
317 | rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT; | |
318 | ||
319 | /* max pkt. length validation */ | |
320 | if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) { | |
321 | ret = -EINVAL; | |
322 | goto error_param; | |
323 | } | |
324 | rx_ctx.rxmax = info->max_pkt_size; | |
325 | ||
326 | /* enable 32bytes desc always */ | |
327 | rx_ctx.dsize = 1; | |
328 | ||
329 | /* default values */ | |
330 | rx_ctx.tphrdesc_ena = 1; | |
331 | rx_ctx.tphwdesc_ena = 1; | |
332 | rx_ctx.tphdata_ena = 1; | |
333 | rx_ctx.tphhead_ena = 1; | |
334 | rx_ctx.lrxqthresh = 2; | |
335 | rx_ctx.crcstrip = 1; | |
336 | ||
337 | /* clear the context in the HMC */ | |
338 | ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id); | |
339 | if (ret) { | |
340 | dev_err(&pf->pdev->dev, | |
341 | "Failed to clear VF LAN Rx queue context %d, error: %d\n", | |
342 | pf_queue_id, ret); | |
343 | ret = -ENOENT; | |
344 | goto error_param; | |
345 | } | |
346 | ||
347 | /* set the context in the HMC */ | |
348 | ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx); | |
349 | if (ret) { | |
350 | dev_err(&pf->pdev->dev, | |
351 | "Failed to set VF LAN Rx queue context %d error: %d\n", | |
352 | pf_queue_id, ret); | |
353 | ret = -ENOENT; | |
354 | goto error_param; | |
355 | } | |
356 | ||
357 | error_param: | |
358 | return ret; | |
359 | } | |
360 | ||
361 | /** | |
362 | * i40e_alloc_vsi_res | |
363 | * @vf: pointer to the vf info | |
364 | * @type: type of VSI to allocate | |
365 | * | |
366 | * alloc vf vsi context & resources | |
367 | **/ | |
368 | static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type) | |
369 | { | |
370 | struct i40e_mac_filter *f = NULL; | |
371 | struct i40e_pf *pf = vf->pf; | |
372 | struct i40e_hw *hw = &pf->hw; | |
373 | struct i40e_vsi *vsi; | |
374 | int ret = 0; | |
375 | ||
376 | vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id); | |
377 | ||
378 | if (!vsi) { | |
379 | dev_err(&pf->pdev->dev, | |
380 | "add vsi failed for vf %d, aq_err %d\n", | |
381 | vf->vf_id, pf->hw.aq.asq_last_status); | |
382 | ret = -ENOENT; | |
383 | goto error_alloc_vsi_res; | |
384 | } | |
385 | if (type == I40E_VSI_SRIOV) { | |
386 | vf->lan_vsi_index = vsi->idx; | |
387 | vf->lan_vsi_id = vsi->id; | |
388 | dev_info(&pf->pdev->dev, | |
389 | "LAN VSI index %d, VSI id %d\n", | |
390 | vsi->idx, vsi->id); | |
6c12fcbf GR |
391 | /* If the port VLAN has been configured and then the |
392 | * VF driver was removed then the VSI port VLAN | |
393 | * configuration was destroyed. Check if there is | |
394 | * a port VLAN and restore the VSI configuration if | |
395 | * needed. | |
396 | */ | |
397 | if (vf->port_vlan_id) | |
398 | i40e_vsi_add_pvid(vsi, vf->port_vlan_id); | |
5c3c48ac | 399 | f = i40e_add_filter(vsi, vf->default_lan_addr.addr, |
6c12fcbf | 400 | vf->port_vlan_id, true, false); |
5c3c48ac | 401 | } |
6dbbbfb2 | 402 | |
5c3c48ac JB |
403 | if (!f) { |
404 | dev_err(&pf->pdev->dev, "Unable to add ucast filter\n"); | |
405 | ret = -ENOMEM; | |
406 | goto error_alloc_vsi_res; | |
407 | } | |
408 | ||
409 | /* program mac filter */ | |
410 | ret = i40e_sync_vsi_filters(vsi); | |
411 | if (ret) { | |
412 | dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); | |
413 | goto error_alloc_vsi_res; | |
414 | } | |
415 | ||
416 | /* accept bcast pkts. by default */ | |
417 | ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL); | |
418 | if (ret) { | |
419 | dev_err(&pf->pdev->dev, | |
420 | "set vsi bcast failed for vf %d, vsi %d, aq_err %d\n", | |
421 | vf->vf_id, vsi->idx, pf->hw.aq.asq_last_status); | |
422 | ret = -EINVAL; | |
423 | } | |
424 | ||
425 | error_alloc_vsi_res: | |
426 | return ret; | |
427 | } | |
428 | ||
805bd5bd MW |
429 | /** |
430 | * i40e_enable_vf_mappings | |
431 | * @vf: pointer to the vf info | |
432 | * | |
433 | * enable vf mappings | |
434 | **/ | |
435 | static void i40e_enable_vf_mappings(struct i40e_vf *vf) | |
436 | { | |
437 | struct i40e_pf *pf = vf->pf; | |
438 | struct i40e_hw *hw = &pf->hw; | |
439 | u32 reg, total_queue_pairs = 0; | |
440 | int j; | |
441 | ||
442 | /* Tell the hardware we're using noncontiguous mapping. HW requires | |
443 | * that VF queues be mapped using this method, even when they are | |
444 | * contiguous in real life | |
445 | */ | |
446 | wr32(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id), | |
447 | I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK); | |
448 | ||
449 | /* enable VF vplan_qtable mappings */ | |
450 | reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK; | |
451 | wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg); | |
452 | ||
453 | /* map PF queues to VF queues */ | |
454 | for (j = 0; j < pf->vsi[vf->lan_vsi_index]->num_queue_pairs; j++) { | |
455 | u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, j); | |
456 | reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK); | |
457 | wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg); | |
458 | total_queue_pairs++; | |
459 | } | |
460 | ||
461 | /* map PF queues to VSI */ | |
462 | for (j = 0; j < 7; j++) { | |
463 | if (j * 2 >= pf->vsi[vf->lan_vsi_index]->num_queue_pairs) { | |
464 | reg = 0x07FF07FF; /* unused */ | |
465 | } else { | |
466 | u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, | |
467 | j * 2); | |
468 | reg = qid; | |
469 | qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_index, | |
470 | (j * 2) + 1); | |
471 | reg |= qid << 16; | |
472 | } | |
473 | wr32(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id), reg); | |
474 | } | |
475 | ||
476 | i40e_flush(hw); | |
477 | } | |
478 | ||
479 | /** | |
480 | * i40e_disable_vf_mappings | |
481 | * @vf: pointer to the vf info | |
482 | * | |
483 | * disable vf mappings | |
484 | **/ | |
485 | static void i40e_disable_vf_mappings(struct i40e_vf *vf) | |
486 | { | |
487 | struct i40e_pf *pf = vf->pf; | |
488 | struct i40e_hw *hw = &pf->hw; | |
489 | int i; | |
490 | ||
491 | /* disable qp mappings */ | |
492 | wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0); | |
493 | for (i = 0; i < I40E_MAX_VSI_QP; i++) | |
494 | wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id), | |
495 | I40E_QUEUE_END_OF_LIST); | |
496 | i40e_flush(hw); | |
497 | } | |
498 | ||
499 | /** | |
500 | * i40e_free_vf_res | |
501 | * @vf: pointer to the vf info | |
502 | * | |
503 | * free vf resources | |
504 | **/ | |
505 | static void i40e_free_vf_res(struct i40e_vf *vf) | |
506 | { | |
507 | struct i40e_pf *pf = vf->pf; | |
fc18eaa0 MW |
508 | struct i40e_hw *hw = &pf->hw; |
509 | u32 reg_idx, reg; | |
510 | int i, msix_vf; | |
805bd5bd MW |
511 | |
512 | /* free vsi & disconnect it from the parent uplink */ | |
513 | if (vf->lan_vsi_index) { | |
514 | i40e_vsi_release(pf->vsi[vf->lan_vsi_index]); | |
515 | vf->lan_vsi_index = 0; | |
516 | vf->lan_vsi_id = 0; | |
517 | } | |
fc18eaa0 MW |
518 | msix_vf = pf->hw.func_caps.num_msix_vectors_vf + 1; |
519 | /* disable interrupts so the VF starts in a known state */ | |
520 | for (i = 0; i < msix_vf; i++) { | |
521 | /* format is same for both registers */ | |
522 | if (0 == i) | |
523 | reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id); | |
524 | else | |
525 | reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) * | |
526 | (vf->vf_id)) | |
527 | + (i - 1)); | |
528 | wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK); | |
529 | i40e_flush(hw); | |
530 | } | |
805bd5bd | 531 | |
fc18eaa0 MW |
532 | /* clear the irq settings */ |
533 | for (i = 0; i < msix_vf; i++) { | |
534 | /* format is same for both registers */ | |
535 | if (0 == i) | |
536 | reg_idx = I40E_VPINT_LNKLST0(vf->vf_id); | |
537 | else | |
538 | reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) * | |
539 | (vf->vf_id)) | |
540 | + (i - 1)); | |
541 | reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK | | |
542 | I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK); | |
543 | wr32(hw, reg_idx, reg); | |
544 | i40e_flush(hw); | |
545 | } | |
805bd5bd MW |
546 | /* reset some of the state varibles keeping |
547 | * track of the resources | |
548 | */ | |
549 | vf->num_queue_pairs = 0; | |
550 | vf->vf_states = 0; | |
551 | } | |
552 | ||
553 | /** | |
554 | * i40e_alloc_vf_res | |
555 | * @vf: pointer to the vf info | |
556 | * | |
557 | * allocate vf resources | |
558 | **/ | |
559 | static int i40e_alloc_vf_res(struct i40e_vf *vf) | |
560 | { | |
561 | struct i40e_pf *pf = vf->pf; | |
562 | int total_queue_pairs = 0; | |
563 | int ret; | |
564 | ||
565 | /* allocate hw vsi context & associated resources */ | |
566 | ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV); | |
567 | if (ret) | |
568 | goto error_alloc; | |
569 | total_queue_pairs += pf->vsi[vf->lan_vsi_index]->num_queue_pairs; | |
570 | set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps); | |
571 | ||
572 | /* store the total qps number for the runtime | |
573 | * vf req validation | |
574 | */ | |
575 | vf->num_queue_pairs = total_queue_pairs; | |
576 | ||
577 | /* vf is now completely initialized */ | |
578 | set_bit(I40E_VF_STAT_INIT, &vf->vf_states); | |
579 | ||
580 | error_alloc: | |
581 | if (ret) | |
582 | i40e_free_vf_res(vf); | |
583 | ||
584 | return ret; | |
585 | } | |
586 | ||
fc18eaa0 MW |
587 | #define VF_DEVICE_STATUS 0xAA |
588 | #define VF_TRANS_PENDING_MASK 0x20 | |
589 | /** | |
590 | * i40e_quiesce_vf_pci | |
591 | * @vf: pointer to the vf structure | |
592 | * | |
593 | * Wait for VF PCI transactions to be cleared after reset. Returns -EIO | |
594 | * if the transactions never clear. | |
595 | **/ | |
596 | static int i40e_quiesce_vf_pci(struct i40e_vf *vf) | |
597 | { | |
598 | struct i40e_pf *pf = vf->pf; | |
599 | struct i40e_hw *hw = &pf->hw; | |
600 | int vf_abs_id, i; | |
601 | u32 reg; | |
602 | ||
b141d619 | 603 | vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id; |
fc18eaa0 MW |
604 | |
605 | wr32(hw, I40E_PF_PCI_CIAA, | |
606 | VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT)); | |
607 | for (i = 0; i < 100; i++) { | |
608 | reg = rd32(hw, I40E_PF_PCI_CIAD); | |
609 | if ((reg & VF_TRANS_PENDING_MASK) == 0) | |
610 | return 0; | |
611 | udelay(1); | |
612 | } | |
613 | return -EIO; | |
614 | } | |
615 | ||
5c3c48ac JB |
616 | /** |
617 | * i40e_reset_vf | |
618 | * @vf: pointer to the vf structure | |
619 | * @flr: VFLR was issued or not | |
620 | * | |
621 | * reset the vf | |
622 | **/ | |
fc18eaa0 | 623 | void i40e_reset_vf(struct i40e_vf *vf, bool flr) |
5c3c48ac | 624 | { |
5c3c48ac JB |
625 | struct i40e_pf *pf = vf->pf; |
626 | struct i40e_hw *hw = &pf->hw; | |
5c3c48ac | 627 | bool rsd = false; |
fc18eaa0 MW |
628 | int i; |
629 | u32 reg; | |
5c3c48ac JB |
630 | |
631 | /* warn the VF */ | |
5c3c48ac JB |
632 | clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); |
633 | ||
fc18eaa0 MW |
634 | /* In the case of a VFLR, the HW has already reset the VF and we |
635 | * just need to clean up, so don't hit the VFRTRIG register. | |
5c3c48ac JB |
636 | */ |
637 | if (!flr) { | |
638 | /* reset vf using VPGEN_VFRTRIG reg */ | |
fc18eaa0 MW |
639 | reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id)); |
640 | reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK; | |
5c3c48ac JB |
641 | wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg); |
642 | i40e_flush(hw); | |
643 | } | |
644 | ||
fc18eaa0 MW |
645 | if (i40e_quiesce_vf_pci(vf)) |
646 | dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n", | |
647 | vf->vf_id); | |
648 | ||
5c3c48ac JB |
649 | /* poll VPGEN_VFRSTAT reg to make sure |
650 | * that reset is complete | |
651 | */ | |
fc18eaa0 | 652 | for (i = 0; i < 100; i++) { |
5c3c48ac JB |
653 | /* vf reset requires driver to first reset the |
654 | * vf & than poll the status register to make sure | |
655 | * that the requested op was completed | |
656 | * successfully | |
657 | */ | |
658 | udelay(10); | |
659 | reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id)); | |
660 | if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) { | |
661 | rsd = true; | |
662 | break; | |
663 | } | |
664 | } | |
665 | ||
666 | if (!rsd) | |
fc18eaa0 | 667 | dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n", |
5c3c48ac | 668 | vf->vf_id); |
fc18eaa0 | 669 | wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED); |
5c3c48ac JB |
670 | /* clear the reset bit in the VPGEN_VFRTRIG reg */ |
671 | reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id)); | |
672 | reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK; | |
673 | wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg); | |
fc18eaa0 MW |
674 | |
675 | /* On initial reset, we won't have any queues */ | |
676 | if (vf->lan_vsi_index == 0) | |
677 | goto complete_reset; | |
678 | ||
679 | i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_index], false); | |
680 | complete_reset: | |
681 | /* reallocate vf resources to reset the VSI state */ | |
682 | i40e_free_vf_res(vf); | |
683 | mdelay(10); | |
684 | i40e_alloc_vf_res(vf); | |
685 | i40e_enable_vf_mappings(vf); | |
686 | ||
5c3c48ac | 687 | /* tell the VF the reset is done */ |
fc18eaa0 | 688 | wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE); |
5c3c48ac | 689 | i40e_flush(hw); |
5c3c48ac JB |
690 | } |
691 | ||
5c3c48ac JB |
692 | /** |
693 | * i40e_vfs_are_assigned | |
694 | * @pf: pointer to the pf structure | |
695 | * | |
696 | * Determine if any VFs are assigned to VMs | |
697 | **/ | |
698 | static bool i40e_vfs_are_assigned(struct i40e_pf *pf) | |
699 | { | |
700 | struct pci_dev *pdev = pf->pdev; | |
701 | struct pci_dev *vfdev; | |
702 | ||
703 | /* loop through all the VFs to see if we own any that are assigned */ | |
704 | vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, I40E_VF_DEVICE_ID , NULL); | |
705 | while (vfdev) { | |
706 | /* if we don't own it we don't care */ | |
707 | if (vfdev->is_virtfn && pci_physfn(vfdev) == pdev) { | |
708 | /* if it is assigned we cannot release it */ | |
709 | if (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED) | |
710 | return true; | |
711 | } | |
712 | ||
713 | vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, | |
714 | I40E_VF_DEVICE_ID, | |
715 | vfdev); | |
716 | } | |
717 | ||
718 | return false; | |
719 | } | |
720 | ||
721 | /** | |
722 | * i40e_free_vfs | |
723 | * @pf: pointer to the pf structure | |
724 | * | |
725 | * free vf resources | |
726 | **/ | |
727 | void i40e_free_vfs(struct i40e_pf *pf) | |
728 | { | |
f7414531 MW |
729 | struct i40e_hw *hw = &pf->hw; |
730 | u32 reg_idx, bit_idx; | |
731 | int i, tmp, vf_id; | |
5c3c48ac JB |
732 | |
733 | if (!pf->vf) | |
734 | return; | |
735 | ||
736 | /* Disable interrupt 0 so we don't try to handle the VFLR. */ | |
2ef28cfb MW |
737 | i40e_irq_dynamic_disable_icr0(pf); |
738 | ||
6c1b5bff | 739 | mdelay(10); /* let any messages in transit get finished up */ |
5c3c48ac | 740 | /* free up vf resources */ |
6c1b5bff MW |
741 | tmp = pf->num_alloc_vfs; |
742 | pf->num_alloc_vfs = 0; | |
743 | for (i = 0; i < tmp; i++) { | |
5c3c48ac JB |
744 | if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states)) |
745 | i40e_free_vf_res(&pf->vf[i]); | |
746 | /* disable qp mappings */ | |
747 | i40e_disable_vf_mappings(&pf->vf[i]); | |
748 | } | |
749 | ||
750 | kfree(pf->vf); | |
751 | pf->vf = NULL; | |
5c3c48ac | 752 | |
f7414531 | 753 | if (!i40e_vfs_are_assigned(pf)) { |
5c3c48ac | 754 | pci_disable_sriov(pf->pdev); |
f7414531 MW |
755 | /* Acknowledge VFLR for all VFS. Without this, VFs will fail to |
756 | * work correctly when SR-IOV gets re-enabled. | |
757 | */ | |
758 | for (vf_id = 0; vf_id < tmp; vf_id++) { | |
759 | reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32; | |
760 | bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32; | |
761 | wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx)); | |
762 | } | |
763 | } | |
5c3c48ac JB |
764 | else |
765 | dev_warn(&pf->pdev->dev, | |
766 | "unable to disable SR-IOV because VFs are assigned.\n"); | |
767 | ||
768 | /* Re-enable interrupt 0. */ | |
2ef28cfb | 769 | i40e_irq_dynamic_enable_icr0(pf); |
5c3c48ac JB |
770 | } |
771 | ||
772 | #ifdef CONFIG_PCI_IOV | |
773 | /** | |
774 | * i40e_alloc_vfs | |
775 | * @pf: pointer to the pf structure | |
776 | * @num_alloc_vfs: number of vfs to allocate | |
777 | * | |
778 | * allocate vf resources | |
779 | **/ | |
780 | static int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs) | |
781 | { | |
782 | struct i40e_vf *vfs; | |
783 | int i, ret = 0; | |
784 | ||
6c1b5bff | 785 | /* Disable interrupt 0 so we don't try to handle the VFLR. */ |
2ef28cfb MW |
786 | i40e_irq_dynamic_disable_icr0(pf); |
787 | ||
5c3c48ac JB |
788 | ret = pci_enable_sriov(pf->pdev, num_alloc_vfs); |
789 | if (ret) { | |
790 | dev_err(&pf->pdev->dev, | |
791 | "pci_enable_sriov failed with error %d!\n", ret); | |
792 | pf->num_alloc_vfs = 0; | |
793 | goto err_iov; | |
794 | } | |
795 | ||
796 | /* allocate memory */ | |
797 | vfs = kzalloc(num_alloc_vfs * sizeof(struct i40e_vf), GFP_KERNEL); | |
798 | if (!vfs) { | |
799 | ret = -ENOMEM; | |
800 | goto err_alloc; | |
801 | } | |
802 | ||
803 | /* apply default profile */ | |
804 | for (i = 0; i < num_alloc_vfs; i++) { | |
805 | vfs[i].pf = pf; | |
806 | vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB; | |
807 | vfs[i].vf_id = i; | |
808 | ||
809 | /* assign default capabilities */ | |
810 | set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps); | |
fc18eaa0 MW |
811 | /* vf resources get allocated during reset */ |
812 | i40e_reset_vf(&vfs[i], false); | |
5c3c48ac JB |
813 | |
814 | /* enable vf vplan_qtable mappings */ | |
815 | i40e_enable_vf_mappings(&vfs[i]); | |
816 | } | |
817 | pf->vf = vfs; | |
818 | pf->num_alloc_vfs = num_alloc_vfs; | |
819 | ||
820 | err_alloc: | |
821 | if (ret) | |
822 | i40e_free_vfs(pf); | |
823 | err_iov: | |
6c1b5bff | 824 | /* Re-enable interrupt 0. */ |
2ef28cfb | 825 | i40e_irq_dynamic_enable_icr0(pf); |
5c3c48ac JB |
826 | return ret; |
827 | } | |
828 | ||
829 | #endif | |
830 | /** | |
831 | * i40e_pci_sriov_enable | |
832 | * @pdev: pointer to a pci_dev structure | |
833 | * @num_vfs: number of vfs to allocate | |
834 | * | |
835 | * Enable or change the number of VFs | |
836 | **/ | |
837 | static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs) | |
838 | { | |
839 | #ifdef CONFIG_PCI_IOV | |
840 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
841 | int pre_existing_vfs = pci_num_vf(pdev); | |
842 | int err = 0; | |
843 | ||
844 | dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs); | |
845 | if (pre_existing_vfs && pre_existing_vfs != num_vfs) | |
846 | i40e_free_vfs(pf); | |
847 | else if (pre_existing_vfs && pre_existing_vfs == num_vfs) | |
848 | goto out; | |
849 | ||
850 | if (num_vfs > pf->num_req_vfs) { | |
851 | err = -EPERM; | |
852 | goto err_out; | |
853 | } | |
854 | ||
855 | err = i40e_alloc_vfs(pf, num_vfs); | |
856 | if (err) { | |
857 | dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err); | |
858 | goto err_out; | |
859 | } | |
860 | ||
861 | out: | |
862 | return num_vfs; | |
863 | ||
864 | err_out: | |
865 | return err; | |
866 | #endif | |
867 | return 0; | |
868 | } | |
869 | ||
870 | /** | |
871 | * i40e_pci_sriov_configure | |
872 | * @pdev: pointer to a pci_dev structure | |
873 | * @num_vfs: number of vfs to allocate | |
874 | * | |
875 | * Enable or change the number of VFs. Called when the user updates the number | |
876 | * of VFs in sysfs. | |
877 | **/ | |
878 | int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs) | |
879 | { | |
880 | struct i40e_pf *pf = pci_get_drvdata(pdev); | |
881 | ||
882 | if (num_vfs) | |
883 | return i40e_pci_sriov_enable(pdev, num_vfs); | |
884 | ||
885 | i40e_free_vfs(pf); | |
886 | return 0; | |
887 | } | |
888 | ||
889 | /***********************virtual channel routines******************/ | |
890 | ||
891 | /** | |
892 | * i40e_vc_send_msg_to_vf | |
893 | * @vf: pointer to the vf info | |
894 | * @v_opcode: virtual channel opcode | |
895 | * @v_retval: virtual channel return value | |
896 | * @msg: pointer to the msg buffer | |
897 | * @msglen: msg length | |
898 | * | |
899 | * send msg to vf | |
900 | **/ | |
901 | static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode, | |
902 | u32 v_retval, u8 *msg, u16 msglen) | |
903 | { | |
904 | struct i40e_pf *pf = vf->pf; | |
905 | struct i40e_hw *hw = &pf->hw; | |
7efa84b7 | 906 | int true_vf_id = vf->vf_id + hw->func_caps.vf_base_id; |
5c3c48ac JB |
907 | i40e_status aq_ret; |
908 | ||
909 | /* single place to detect unsuccessful return values */ | |
910 | if (v_retval) { | |
911 | vf->num_invalid_msgs++; | |
912 | dev_err(&pf->pdev->dev, "Failed opcode %d Error: %d\n", | |
913 | v_opcode, v_retval); | |
914 | if (vf->num_invalid_msgs > | |
915 | I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) { | |
916 | dev_err(&pf->pdev->dev, | |
917 | "Number of invalid messages exceeded for VF %d\n", | |
918 | vf->vf_id); | |
919 | dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n"); | |
920 | set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states); | |
921 | } | |
922 | } else { | |
923 | vf->num_valid_msgs++; | |
924 | } | |
925 | ||
7efa84b7 MW |
926 | aq_ret = i40e_aq_send_msg_to_vf(hw, true_vf_id, v_opcode, v_retval, |
927 | msg, msglen, NULL); | |
5c3c48ac JB |
928 | if (aq_ret) { |
929 | dev_err(&pf->pdev->dev, | |
930 | "Unable to send the message to VF %d aq_err %d\n", | |
931 | vf->vf_id, pf->hw.aq.asq_last_status); | |
932 | return -EIO; | |
933 | } | |
934 | ||
935 | return 0; | |
936 | } | |
937 | ||
938 | /** | |
939 | * i40e_vc_send_resp_to_vf | |
940 | * @vf: pointer to the vf info | |
941 | * @opcode: operation code | |
942 | * @retval: return value | |
943 | * | |
944 | * send resp msg to vf | |
945 | **/ | |
946 | static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf, | |
947 | enum i40e_virtchnl_ops opcode, | |
948 | i40e_status retval) | |
949 | { | |
950 | return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0); | |
951 | } | |
952 | ||
953 | /** | |
954 | * i40e_vc_get_version_msg | |
955 | * @vf: pointer to the vf info | |
956 | * | |
957 | * called from the vf to request the API version used by the PF | |
958 | **/ | |
959 | static int i40e_vc_get_version_msg(struct i40e_vf *vf) | |
960 | { | |
961 | struct i40e_virtchnl_version_info info = { | |
962 | I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR | |
963 | }; | |
964 | ||
965 | return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION, | |
966 | I40E_SUCCESS, (u8 *)&info, | |
967 | sizeof(struct | |
968 | i40e_virtchnl_version_info)); | |
969 | } | |
970 | ||
971 | /** | |
972 | * i40e_vc_get_vf_resources_msg | |
973 | * @vf: pointer to the vf info | |
974 | * @msg: pointer to the msg buffer | |
975 | * @msglen: msg length | |
976 | * | |
977 | * called from the vf to request its resources | |
978 | **/ | |
979 | static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf) | |
980 | { | |
981 | struct i40e_virtchnl_vf_resource *vfres = NULL; | |
982 | struct i40e_pf *pf = vf->pf; | |
983 | i40e_status aq_ret = 0; | |
984 | struct i40e_vsi *vsi; | |
985 | int i = 0, len = 0; | |
986 | int num_vsis = 1; | |
987 | int ret; | |
988 | ||
989 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
990 | aq_ret = I40E_ERR_PARAM; | |
991 | goto err; | |
992 | } | |
993 | ||
994 | len = (sizeof(struct i40e_virtchnl_vf_resource) + | |
995 | sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis); | |
996 | ||
997 | vfres = kzalloc(len, GFP_KERNEL); | |
998 | if (!vfres) { | |
999 | aq_ret = I40E_ERR_NO_MEMORY; | |
1000 | len = 0; | |
1001 | goto err; | |
1002 | } | |
1003 | ||
1004 | vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2; | |
1005 | vsi = pf->vsi[vf->lan_vsi_index]; | |
1006 | if (!vsi->info.pvid) | |
1007 | vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN; | |
1008 | ||
1009 | vfres->num_vsis = num_vsis; | |
1010 | vfres->num_queue_pairs = vf->num_queue_pairs; | |
1011 | vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf; | |
1012 | if (vf->lan_vsi_index) { | |
1013 | vfres->vsi_res[i].vsi_id = vf->lan_vsi_index; | |
1014 | vfres->vsi_res[i].vsi_type = I40E_VSI_SRIOV; | |
1015 | vfres->vsi_res[i].num_queue_pairs = | |
1016 | pf->vsi[vf->lan_vsi_index]->num_queue_pairs; | |
1017 | memcpy(vfres->vsi_res[i].default_mac_addr, | |
1018 | vf->default_lan_addr.addr, ETH_ALEN); | |
1019 | i++; | |
1020 | } | |
1021 | set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states); | |
1022 | ||
1023 | err: | |
1024 | /* send the response back to the vf */ | |
1025 | ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES, | |
1026 | aq_ret, (u8 *)vfres, len); | |
1027 | ||
1028 | kfree(vfres); | |
1029 | return ret; | |
1030 | } | |
1031 | ||
1032 | /** | |
1033 | * i40e_vc_reset_vf_msg | |
1034 | * @vf: pointer to the vf info | |
1035 | * @msg: pointer to the msg buffer | |
1036 | * @msglen: msg length | |
1037 | * | |
1038 | * called from the vf to reset itself, | |
1039 | * unlike other virtchnl messages, pf driver | |
1040 | * doesn't send the response back to the vf | |
1041 | **/ | |
fc18eaa0 | 1042 | static void i40e_vc_reset_vf_msg(struct i40e_vf *vf) |
5c3c48ac | 1043 | { |
fc18eaa0 MW |
1044 | if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) |
1045 | i40e_reset_vf(vf, false); | |
5c3c48ac JB |
1046 | } |
1047 | ||
1048 | /** | |
1049 | * i40e_vc_config_promiscuous_mode_msg | |
1050 | * @vf: pointer to the vf info | |
1051 | * @msg: pointer to the msg buffer | |
1052 | * @msglen: msg length | |
1053 | * | |
1054 | * called from the vf to configure the promiscuous mode of | |
1055 | * vf vsis | |
1056 | **/ | |
1057 | static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf, | |
1058 | u8 *msg, u16 msglen) | |
1059 | { | |
1060 | struct i40e_virtchnl_promisc_info *info = | |
1061 | (struct i40e_virtchnl_promisc_info *)msg; | |
1062 | struct i40e_pf *pf = vf->pf; | |
1063 | struct i40e_hw *hw = &pf->hw; | |
1064 | bool allmulti = false; | |
1065 | bool promisc = false; | |
1066 | i40e_status aq_ret; | |
1067 | ||
1068 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1069 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1070 | !i40e_vc_isvalid_vsi_id(vf, info->vsi_id) || | |
1071 | (pf->vsi[info->vsi_id]->type != I40E_VSI_FCOE)) { | |
1072 | aq_ret = I40E_ERR_PARAM; | |
1073 | goto error_param; | |
1074 | } | |
1075 | ||
1076 | if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC) | |
1077 | promisc = true; | |
1078 | aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, info->vsi_id, | |
1079 | promisc, NULL); | |
1080 | if (aq_ret) | |
1081 | goto error_param; | |
1082 | ||
1083 | if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC) | |
1084 | allmulti = true; | |
1085 | aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, info->vsi_id, | |
1086 | allmulti, NULL); | |
1087 | ||
1088 | error_param: | |
1089 | /* send the response to the vf */ | |
1090 | return i40e_vc_send_resp_to_vf(vf, | |
1091 | I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, | |
1092 | aq_ret); | |
1093 | } | |
1094 | ||
1095 | /** | |
1096 | * i40e_vc_config_queues_msg | |
1097 | * @vf: pointer to the vf info | |
1098 | * @msg: pointer to the msg buffer | |
1099 | * @msglen: msg length | |
1100 | * | |
1101 | * called from the vf to configure the rx/tx | |
1102 | * queues | |
1103 | **/ | |
1104 | static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1105 | { | |
1106 | struct i40e_virtchnl_vsi_queue_config_info *qci = | |
1107 | (struct i40e_virtchnl_vsi_queue_config_info *)msg; | |
1108 | struct i40e_virtchnl_queue_pair_info *qpi; | |
1109 | u16 vsi_id, vsi_queue_id; | |
1110 | i40e_status aq_ret = 0; | |
1111 | int i; | |
1112 | ||
1113 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1114 | aq_ret = I40E_ERR_PARAM; | |
1115 | goto error_param; | |
1116 | } | |
1117 | ||
1118 | vsi_id = qci->vsi_id; | |
1119 | if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1120 | aq_ret = I40E_ERR_PARAM; | |
1121 | goto error_param; | |
1122 | } | |
1123 | for (i = 0; i < qci->num_queue_pairs; i++) { | |
1124 | qpi = &qci->qpair[i]; | |
1125 | vsi_queue_id = qpi->txq.queue_id; | |
1126 | if ((qpi->txq.vsi_id != vsi_id) || | |
1127 | (qpi->rxq.vsi_id != vsi_id) || | |
1128 | (qpi->rxq.queue_id != vsi_queue_id) || | |
1129 | !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) { | |
1130 | aq_ret = I40E_ERR_PARAM; | |
1131 | goto error_param; | |
1132 | } | |
1133 | ||
1134 | if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id, | |
1135 | &qpi->rxq) || | |
1136 | i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id, | |
1137 | &qpi->txq)) { | |
1138 | aq_ret = I40E_ERR_PARAM; | |
1139 | goto error_param; | |
1140 | } | |
1141 | } | |
1142 | ||
1143 | error_param: | |
1144 | /* send the response to the vf */ | |
1145 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES, | |
1146 | aq_ret); | |
1147 | } | |
1148 | ||
1149 | /** | |
1150 | * i40e_vc_config_irq_map_msg | |
1151 | * @vf: pointer to the vf info | |
1152 | * @msg: pointer to the msg buffer | |
1153 | * @msglen: msg length | |
1154 | * | |
1155 | * called from the vf to configure the irq to | |
1156 | * queue map | |
1157 | **/ | |
1158 | static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1159 | { | |
1160 | struct i40e_virtchnl_irq_map_info *irqmap_info = | |
1161 | (struct i40e_virtchnl_irq_map_info *)msg; | |
1162 | struct i40e_virtchnl_vector_map *map; | |
1163 | u16 vsi_id, vsi_queue_id, vector_id; | |
1164 | i40e_status aq_ret = 0; | |
1165 | unsigned long tempmap; | |
1166 | int i; | |
1167 | ||
1168 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1169 | aq_ret = I40E_ERR_PARAM; | |
1170 | goto error_param; | |
1171 | } | |
1172 | ||
1173 | for (i = 0; i < irqmap_info->num_vectors; i++) { | |
1174 | map = &irqmap_info->vecmap[i]; | |
1175 | ||
1176 | vector_id = map->vector_id; | |
1177 | vsi_id = map->vsi_id; | |
1178 | /* validate msg params */ | |
1179 | if (!i40e_vc_isvalid_vector_id(vf, vector_id) || | |
1180 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1181 | aq_ret = I40E_ERR_PARAM; | |
1182 | goto error_param; | |
1183 | } | |
1184 | ||
1185 | /* lookout for the invalid queue index */ | |
1186 | tempmap = map->rxq_map; | |
4836650b | 1187 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1188 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, |
1189 | vsi_queue_id)) { | |
1190 | aq_ret = I40E_ERR_PARAM; | |
1191 | goto error_param; | |
1192 | } | |
5c3c48ac JB |
1193 | } |
1194 | ||
1195 | tempmap = map->txq_map; | |
4836650b | 1196 | for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) { |
5c3c48ac JB |
1197 | if (!i40e_vc_isvalid_queue_id(vf, vsi_id, |
1198 | vsi_queue_id)) { | |
1199 | aq_ret = I40E_ERR_PARAM; | |
1200 | goto error_param; | |
1201 | } | |
5c3c48ac JB |
1202 | } |
1203 | ||
1204 | i40e_config_irq_link_list(vf, vsi_id, map); | |
1205 | } | |
1206 | error_param: | |
1207 | /* send the response to the vf */ | |
1208 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP, | |
1209 | aq_ret); | |
1210 | } | |
1211 | ||
1212 | /** | |
1213 | * i40e_vc_enable_queues_msg | |
1214 | * @vf: pointer to the vf info | |
1215 | * @msg: pointer to the msg buffer | |
1216 | * @msglen: msg length | |
1217 | * | |
1218 | * called from the vf to enable all or specific queue(s) | |
1219 | **/ | |
1220 | static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1221 | { | |
1222 | struct i40e_virtchnl_queue_select *vqs = | |
1223 | (struct i40e_virtchnl_queue_select *)msg; | |
1224 | struct i40e_pf *pf = vf->pf; | |
1225 | u16 vsi_id = vqs->vsi_id; | |
1226 | i40e_status aq_ret = 0; | |
5c3c48ac JB |
1227 | |
1228 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1229 | aq_ret = I40E_ERR_PARAM; | |
1230 | goto error_param; | |
1231 | } | |
1232 | ||
1233 | if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1234 | aq_ret = I40E_ERR_PARAM; | |
1235 | goto error_param; | |
1236 | } | |
1237 | ||
1238 | if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) { | |
1239 | aq_ret = I40E_ERR_PARAM; | |
1240 | goto error_param; | |
1241 | } | |
88f6563d MW |
1242 | if (i40e_vsi_control_rings(pf->vsi[vsi_id], true)) |
1243 | aq_ret = I40E_ERR_TIMEOUT; | |
5c3c48ac JB |
1244 | error_param: |
1245 | /* send the response to the vf */ | |
1246 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES, | |
1247 | aq_ret); | |
1248 | } | |
1249 | ||
1250 | /** | |
1251 | * i40e_vc_disable_queues_msg | |
1252 | * @vf: pointer to the vf info | |
1253 | * @msg: pointer to the msg buffer | |
1254 | * @msglen: msg length | |
1255 | * | |
1256 | * called from the vf to disable all or specific | |
1257 | * queue(s) | |
1258 | **/ | |
1259 | static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1260 | { | |
1261 | struct i40e_virtchnl_queue_select *vqs = | |
1262 | (struct i40e_virtchnl_queue_select *)msg; | |
1263 | struct i40e_pf *pf = vf->pf; | |
1264 | u16 vsi_id = vqs->vsi_id; | |
1265 | i40e_status aq_ret = 0; | |
5c3c48ac JB |
1266 | |
1267 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1268 | aq_ret = I40E_ERR_PARAM; | |
1269 | goto error_param; | |
1270 | } | |
1271 | ||
1272 | if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) { | |
1273 | aq_ret = I40E_ERR_PARAM; | |
1274 | goto error_param; | |
1275 | } | |
1276 | ||
1277 | if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) { | |
1278 | aq_ret = I40E_ERR_PARAM; | |
1279 | goto error_param; | |
1280 | } | |
88f6563d MW |
1281 | if (i40e_vsi_control_rings(pf->vsi[vsi_id], false)) |
1282 | aq_ret = I40E_ERR_TIMEOUT; | |
5c3c48ac JB |
1283 | |
1284 | error_param: | |
1285 | /* send the response to the vf */ | |
1286 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES, | |
1287 | aq_ret); | |
1288 | } | |
1289 | ||
1290 | /** | |
1291 | * i40e_vc_get_stats_msg | |
1292 | * @vf: pointer to the vf info | |
1293 | * @msg: pointer to the msg buffer | |
1294 | * @msglen: msg length | |
1295 | * | |
1296 | * called from the vf to get vsi stats | |
1297 | **/ | |
1298 | static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1299 | { | |
1300 | struct i40e_virtchnl_queue_select *vqs = | |
1301 | (struct i40e_virtchnl_queue_select *)msg; | |
1302 | struct i40e_pf *pf = vf->pf; | |
1303 | struct i40e_eth_stats stats; | |
1304 | i40e_status aq_ret = 0; | |
1305 | struct i40e_vsi *vsi; | |
1306 | ||
1307 | memset(&stats, 0, sizeof(struct i40e_eth_stats)); | |
1308 | ||
1309 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) { | |
1310 | aq_ret = I40E_ERR_PARAM; | |
1311 | goto error_param; | |
1312 | } | |
1313 | ||
1314 | if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) { | |
1315 | aq_ret = I40E_ERR_PARAM; | |
1316 | goto error_param; | |
1317 | } | |
1318 | ||
1319 | vsi = pf->vsi[vqs->vsi_id]; | |
1320 | if (!vsi) { | |
1321 | aq_ret = I40E_ERR_PARAM; | |
1322 | goto error_param; | |
1323 | } | |
1324 | i40e_update_eth_stats(vsi); | |
5a9769c8 | 1325 | stats = vsi->eth_stats; |
5c3c48ac JB |
1326 | |
1327 | error_param: | |
1328 | /* send the response back to the vf */ | |
1329 | return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret, | |
1330 | (u8 *)&stats, sizeof(stats)); | |
1331 | } | |
1332 | ||
1333 | /** | |
1334 | * i40e_vc_add_mac_addr_msg | |
1335 | * @vf: pointer to the vf info | |
1336 | * @msg: pointer to the msg buffer | |
1337 | * @msglen: msg length | |
1338 | * | |
1339 | * add guest mac address filter | |
1340 | **/ | |
1341 | static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1342 | { | |
1343 | struct i40e_virtchnl_ether_addr_list *al = | |
1344 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1345 | struct i40e_pf *pf = vf->pf; | |
1346 | struct i40e_vsi *vsi = NULL; | |
1347 | u16 vsi_id = al->vsi_id; | |
1348 | i40e_status aq_ret = 0; | |
1349 | int i; | |
1350 | ||
1351 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1352 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1353 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1354 | aq_ret = I40E_ERR_PARAM; | |
1355 | goto error_param; | |
1356 | } | |
1357 | ||
1358 | for (i = 0; i < al->num_elements; i++) { | |
1359 | if (is_broadcast_ether_addr(al->list[i].addr) || | |
1360 | is_zero_ether_addr(al->list[i].addr)) { | |
1361 | dev_err(&pf->pdev->dev, "invalid VF MAC addr %pMAC\n", | |
1362 | al->list[i].addr); | |
adaf3560 | 1363 | aq_ret = I40E_ERR_INVALID_MAC_ADDR; |
5c3c48ac JB |
1364 | goto error_param; |
1365 | } | |
1366 | } | |
1367 | vsi = pf->vsi[vsi_id]; | |
1368 | ||
1369 | /* add new addresses to the list */ | |
1370 | for (i = 0; i < al->num_elements; i++) { | |
1371 | struct i40e_mac_filter *f; | |
1372 | ||
1373 | f = i40e_find_mac(vsi, al->list[i].addr, true, false); | |
7e68edf9 | 1374 | if (!f) { |
5c3c48ac JB |
1375 | if (i40e_is_vsi_in_vlan(vsi)) |
1376 | f = i40e_put_mac_in_vlan(vsi, al->list[i].addr, | |
1377 | true, false); | |
1378 | else | |
1379 | f = i40e_add_filter(vsi, al->list[i].addr, -1, | |
1380 | true, false); | |
1381 | } | |
1382 | ||
1383 | if (!f) { | |
1384 | dev_err(&pf->pdev->dev, | |
1385 | "Unable to add VF MAC filter\n"); | |
1386 | aq_ret = I40E_ERR_PARAM; | |
1387 | goto error_param; | |
1388 | } | |
1389 | } | |
1390 | ||
1391 | /* program the updated filter list */ | |
1392 | if (i40e_sync_vsi_filters(vsi)) | |
1393 | dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n"); | |
1394 | ||
1395 | error_param: | |
1396 | /* send the response to the vf */ | |
1397 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS, | |
1398 | aq_ret); | |
1399 | } | |
1400 | ||
1401 | /** | |
1402 | * i40e_vc_del_mac_addr_msg | |
1403 | * @vf: pointer to the vf info | |
1404 | * @msg: pointer to the msg buffer | |
1405 | * @msglen: msg length | |
1406 | * | |
1407 | * remove guest mac address filter | |
1408 | **/ | |
1409 | static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1410 | { | |
1411 | struct i40e_virtchnl_ether_addr_list *al = | |
1412 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1413 | struct i40e_pf *pf = vf->pf; | |
1414 | struct i40e_vsi *vsi = NULL; | |
1415 | u16 vsi_id = al->vsi_id; | |
1416 | i40e_status aq_ret = 0; | |
1417 | int i; | |
1418 | ||
1419 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1420 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1421 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1422 | aq_ret = I40E_ERR_PARAM; | |
1423 | goto error_param; | |
1424 | } | |
1425 | vsi = pf->vsi[vsi_id]; | |
1426 | ||
1427 | /* delete addresses from the list */ | |
1428 | for (i = 0; i < al->num_elements; i++) | |
1429 | i40e_del_filter(vsi, al->list[i].addr, | |
1430 | I40E_VLAN_ANY, true, false); | |
1431 | ||
1432 | /* program the updated filter list */ | |
1433 | if (i40e_sync_vsi_filters(vsi)) | |
1434 | dev_err(&pf->pdev->dev, "Unable to program VF MAC filters\n"); | |
1435 | ||
1436 | error_param: | |
1437 | /* send the response to the vf */ | |
1438 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS, | |
1439 | aq_ret); | |
1440 | } | |
1441 | ||
1442 | /** | |
1443 | * i40e_vc_add_vlan_msg | |
1444 | * @vf: pointer to the vf info | |
1445 | * @msg: pointer to the msg buffer | |
1446 | * @msglen: msg length | |
1447 | * | |
1448 | * program guest vlan id | |
1449 | **/ | |
1450 | static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1451 | { | |
1452 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
1453 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
1454 | struct i40e_pf *pf = vf->pf; | |
1455 | struct i40e_vsi *vsi = NULL; | |
1456 | u16 vsi_id = vfl->vsi_id; | |
1457 | i40e_status aq_ret = 0; | |
1458 | int i; | |
1459 | ||
1460 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1461 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1462 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1463 | aq_ret = I40E_ERR_PARAM; | |
1464 | goto error_param; | |
1465 | } | |
1466 | ||
1467 | for (i = 0; i < vfl->num_elements; i++) { | |
1468 | if (vfl->vlan_id[i] > I40E_MAX_VLANID) { | |
1469 | aq_ret = I40E_ERR_PARAM; | |
1470 | dev_err(&pf->pdev->dev, | |
1471 | "invalid VF VLAN id %d\n", vfl->vlan_id[i]); | |
1472 | goto error_param; | |
1473 | } | |
1474 | } | |
1475 | vsi = pf->vsi[vsi_id]; | |
1476 | if (vsi->info.pvid) { | |
1477 | aq_ret = I40E_ERR_PARAM; | |
1478 | goto error_param; | |
1479 | } | |
1480 | ||
1481 | i40e_vlan_stripping_enable(vsi); | |
1482 | for (i = 0; i < vfl->num_elements; i++) { | |
1483 | /* add new VLAN filter */ | |
1484 | int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]); | |
1485 | if (ret) | |
1486 | dev_err(&pf->pdev->dev, | |
1487 | "Unable to add VF vlan filter %d, error %d\n", | |
1488 | vfl->vlan_id[i], ret); | |
1489 | } | |
1490 | ||
1491 | error_param: | |
1492 | /* send the response to the vf */ | |
1493 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret); | |
1494 | } | |
1495 | ||
1496 | /** | |
1497 | * i40e_vc_remove_vlan_msg | |
1498 | * @vf: pointer to the vf info | |
1499 | * @msg: pointer to the msg buffer | |
1500 | * @msglen: msg length | |
1501 | * | |
1502 | * remove programmed guest vlan id | |
1503 | **/ | |
1504 | static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen) | |
1505 | { | |
1506 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
1507 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
1508 | struct i40e_pf *pf = vf->pf; | |
1509 | struct i40e_vsi *vsi = NULL; | |
1510 | u16 vsi_id = vfl->vsi_id; | |
1511 | i40e_status aq_ret = 0; | |
1512 | int i; | |
1513 | ||
1514 | if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) || | |
1515 | !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) || | |
1516 | !i40e_vc_isvalid_vsi_id(vf, vsi_id)) { | |
1517 | aq_ret = I40E_ERR_PARAM; | |
1518 | goto error_param; | |
1519 | } | |
1520 | ||
1521 | for (i = 0; i < vfl->num_elements; i++) { | |
1522 | if (vfl->vlan_id[i] > I40E_MAX_VLANID) { | |
1523 | aq_ret = I40E_ERR_PARAM; | |
1524 | goto error_param; | |
1525 | } | |
1526 | } | |
1527 | ||
1528 | vsi = pf->vsi[vsi_id]; | |
1529 | if (vsi->info.pvid) { | |
1530 | aq_ret = I40E_ERR_PARAM; | |
1531 | goto error_param; | |
1532 | } | |
1533 | ||
1534 | for (i = 0; i < vfl->num_elements; i++) { | |
1535 | int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]); | |
1536 | if (ret) | |
1537 | dev_err(&pf->pdev->dev, | |
1538 | "Unable to delete VF vlan filter %d, error %d\n", | |
1539 | vfl->vlan_id[i], ret); | |
1540 | } | |
1541 | ||
1542 | error_param: | |
1543 | /* send the response to the vf */ | |
1544 | return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret); | |
1545 | } | |
1546 | ||
5c3c48ac JB |
1547 | /** |
1548 | * i40e_vc_validate_vf_msg | |
1549 | * @vf: pointer to the vf info | |
1550 | * @msg: pointer to the msg buffer | |
1551 | * @msglen: msg length | |
1552 | * @msghndl: msg handle | |
1553 | * | |
1554 | * validate msg | |
1555 | **/ | |
1556 | static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode, | |
1557 | u32 v_retval, u8 *msg, u16 msglen) | |
1558 | { | |
1559 | bool err_msg_format = false; | |
1560 | int valid_len; | |
1561 | ||
1562 | /* Check if VF is disabled. */ | |
1563 | if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states)) | |
1564 | return I40E_ERR_PARAM; | |
1565 | ||
1566 | /* Validate message length. */ | |
1567 | switch (v_opcode) { | |
1568 | case I40E_VIRTCHNL_OP_VERSION: | |
1569 | valid_len = sizeof(struct i40e_virtchnl_version_info); | |
1570 | break; | |
1571 | case I40E_VIRTCHNL_OP_RESET_VF: | |
1572 | case I40E_VIRTCHNL_OP_GET_VF_RESOURCES: | |
1573 | valid_len = 0; | |
1574 | break; | |
1575 | case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE: | |
1576 | valid_len = sizeof(struct i40e_virtchnl_txq_info); | |
1577 | break; | |
1578 | case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE: | |
1579 | valid_len = sizeof(struct i40e_virtchnl_rxq_info); | |
1580 | break; | |
1581 | case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES: | |
1582 | valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info); | |
1583 | if (msglen >= valid_len) { | |
1584 | struct i40e_virtchnl_vsi_queue_config_info *vqc = | |
1585 | (struct i40e_virtchnl_vsi_queue_config_info *)msg; | |
1586 | valid_len += (vqc->num_queue_pairs * | |
1587 | sizeof(struct | |
1588 | i40e_virtchnl_queue_pair_info)); | |
1589 | if (vqc->num_queue_pairs == 0) | |
1590 | err_msg_format = true; | |
1591 | } | |
1592 | break; | |
1593 | case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: | |
1594 | valid_len = sizeof(struct i40e_virtchnl_irq_map_info); | |
1595 | if (msglen >= valid_len) { | |
1596 | struct i40e_virtchnl_irq_map_info *vimi = | |
1597 | (struct i40e_virtchnl_irq_map_info *)msg; | |
1598 | valid_len += (vimi->num_vectors * | |
1599 | sizeof(struct i40e_virtchnl_vector_map)); | |
1600 | if (vimi->num_vectors == 0) | |
1601 | err_msg_format = true; | |
1602 | } | |
1603 | break; | |
1604 | case I40E_VIRTCHNL_OP_ENABLE_QUEUES: | |
1605 | case I40E_VIRTCHNL_OP_DISABLE_QUEUES: | |
1606 | valid_len = sizeof(struct i40e_virtchnl_queue_select); | |
1607 | break; | |
1608 | case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS: | |
1609 | case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS: | |
1610 | valid_len = sizeof(struct i40e_virtchnl_ether_addr_list); | |
1611 | if (msglen >= valid_len) { | |
1612 | struct i40e_virtchnl_ether_addr_list *veal = | |
1613 | (struct i40e_virtchnl_ether_addr_list *)msg; | |
1614 | valid_len += veal->num_elements * | |
1615 | sizeof(struct i40e_virtchnl_ether_addr); | |
1616 | if (veal->num_elements == 0) | |
1617 | err_msg_format = true; | |
1618 | } | |
1619 | break; | |
1620 | case I40E_VIRTCHNL_OP_ADD_VLAN: | |
1621 | case I40E_VIRTCHNL_OP_DEL_VLAN: | |
1622 | valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list); | |
1623 | if (msglen >= valid_len) { | |
1624 | struct i40e_virtchnl_vlan_filter_list *vfl = | |
1625 | (struct i40e_virtchnl_vlan_filter_list *)msg; | |
1626 | valid_len += vfl->num_elements * sizeof(u16); | |
1627 | if (vfl->num_elements == 0) | |
1628 | err_msg_format = true; | |
1629 | } | |
1630 | break; | |
1631 | case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: | |
1632 | valid_len = sizeof(struct i40e_virtchnl_promisc_info); | |
1633 | break; | |
1634 | case I40E_VIRTCHNL_OP_GET_STATS: | |
1635 | valid_len = sizeof(struct i40e_virtchnl_queue_select); | |
1636 | break; | |
1637 | /* These are always errors coming from the VF. */ | |
1638 | case I40E_VIRTCHNL_OP_EVENT: | |
1639 | case I40E_VIRTCHNL_OP_UNKNOWN: | |
1640 | default: | |
1641 | return -EPERM; | |
1642 | break; | |
1643 | } | |
1644 | /* few more checks */ | |
1645 | if ((valid_len != msglen) || (err_msg_format)) { | |
1646 | i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM); | |
1647 | return -EINVAL; | |
1648 | } else { | |
1649 | return 0; | |
1650 | } | |
1651 | } | |
1652 | ||
1653 | /** | |
1654 | * i40e_vc_process_vf_msg | |
1655 | * @pf: pointer to the pf structure | |
1656 | * @vf_id: source vf id | |
1657 | * @msg: pointer to the msg buffer | |
1658 | * @msglen: msg length | |
1659 | * @msghndl: msg handle | |
1660 | * | |
1661 | * called from the common aeq/arq handler to | |
1662 | * process request from vf | |
1663 | **/ | |
1664 | int i40e_vc_process_vf_msg(struct i40e_pf *pf, u16 vf_id, u32 v_opcode, | |
1665 | u32 v_retval, u8 *msg, u16 msglen) | |
1666 | { | |
5c3c48ac | 1667 | struct i40e_hw *hw = &pf->hw; |
7efa84b7 | 1668 | int local_vf_id = vf_id - hw->func_caps.vf_base_id; |
6c1b5bff | 1669 | struct i40e_vf *vf; |
5c3c48ac JB |
1670 | int ret; |
1671 | ||
1672 | pf->vf_aq_requests++; | |
7efa84b7 | 1673 | if (local_vf_id >= pf->num_alloc_vfs) |
6c1b5bff | 1674 | return -EINVAL; |
7efa84b7 | 1675 | vf = &(pf->vf[local_vf_id]); |
5c3c48ac JB |
1676 | /* perform basic checks on the msg */ |
1677 | ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen); | |
1678 | ||
1679 | if (ret) { | |
499ec80f | 1680 | dev_err(&pf->pdev->dev, "Invalid message from vf %d, opcode %d, len %d\n", |
7efa84b7 | 1681 | local_vf_id, v_opcode, msglen); |
5c3c48ac JB |
1682 | return ret; |
1683 | } | |
7efa84b7 | 1684 | wr32(hw, I40E_VFGEN_RSTAT1(local_vf_id), I40E_VFR_VFACTIVE); |
5c3c48ac JB |
1685 | switch (v_opcode) { |
1686 | case I40E_VIRTCHNL_OP_VERSION: | |
1687 | ret = i40e_vc_get_version_msg(vf); | |
1688 | break; | |
1689 | case I40E_VIRTCHNL_OP_GET_VF_RESOURCES: | |
1690 | ret = i40e_vc_get_vf_resources_msg(vf); | |
1691 | break; | |
1692 | case I40E_VIRTCHNL_OP_RESET_VF: | |
fc18eaa0 MW |
1693 | i40e_vc_reset_vf_msg(vf); |
1694 | ret = 0; | |
5c3c48ac JB |
1695 | break; |
1696 | case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE: | |
1697 | ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen); | |
1698 | break; | |
1699 | case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES: | |
1700 | ret = i40e_vc_config_queues_msg(vf, msg, msglen); | |
1701 | break; | |
1702 | case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP: | |
1703 | ret = i40e_vc_config_irq_map_msg(vf, msg, msglen); | |
1704 | break; | |
1705 | case I40E_VIRTCHNL_OP_ENABLE_QUEUES: | |
1706 | ret = i40e_vc_enable_queues_msg(vf, msg, msglen); | |
1707 | break; | |
1708 | case I40E_VIRTCHNL_OP_DISABLE_QUEUES: | |
1709 | ret = i40e_vc_disable_queues_msg(vf, msg, msglen); | |
1710 | break; | |
1711 | case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS: | |
1712 | ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen); | |
1713 | break; | |
1714 | case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS: | |
1715 | ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen); | |
1716 | break; | |
1717 | case I40E_VIRTCHNL_OP_ADD_VLAN: | |
1718 | ret = i40e_vc_add_vlan_msg(vf, msg, msglen); | |
1719 | break; | |
1720 | case I40E_VIRTCHNL_OP_DEL_VLAN: | |
1721 | ret = i40e_vc_remove_vlan_msg(vf, msg, msglen); | |
1722 | break; | |
1723 | case I40E_VIRTCHNL_OP_GET_STATS: | |
1724 | ret = i40e_vc_get_stats_msg(vf, msg, msglen); | |
1725 | break; | |
5c3c48ac JB |
1726 | case I40E_VIRTCHNL_OP_UNKNOWN: |
1727 | default: | |
7efa84b7 MW |
1728 | dev_err(&pf->pdev->dev, "Unsupported opcode %d from vf %d\n", |
1729 | v_opcode, local_vf_id); | |
5c3c48ac JB |
1730 | ret = i40e_vc_send_resp_to_vf(vf, v_opcode, |
1731 | I40E_ERR_NOT_IMPLEMENTED); | |
1732 | break; | |
1733 | } | |
1734 | ||
1735 | return ret; | |
1736 | } | |
1737 | ||
1738 | /** | |
1739 | * i40e_vc_process_vflr_event | |
1740 | * @pf: pointer to the pf structure | |
1741 | * | |
1742 | * called from the vlfr irq handler to | |
1743 | * free up vf resources and state variables | |
1744 | **/ | |
1745 | int i40e_vc_process_vflr_event(struct i40e_pf *pf) | |
1746 | { | |
1747 | u32 reg, reg_idx, bit_idx, vf_id; | |
1748 | struct i40e_hw *hw = &pf->hw; | |
1749 | struct i40e_vf *vf; | |
1750 | ||
1751 | if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state)) | |
1752 | return 0; | |
1753 | ||
1754 | clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state); | |
1755 | for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) { | |
1756 | reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32; | |
1757 | bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32; | |
1758 | /* read GLGEN_VFLRSTAT register to find out the flr vfs */ | |
1759 | vf = &pf->vf[vf_id]; | |
1760 | reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx)); | |
1761 | if (reg & (1 << bit_idx)) { | |
1762 | /* clear the bit in GLGEN_VFLRSTAT */ | |
1763 | wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), (1 << bit_idx)); | |
1764 | ||
fc18eaa0 | 1765 | i40e_reset_vf(vf, true); |
5c3c48ac JB |
1766 | } |
1767 | } | |
1768 | ||
1769 | /* re-enable vflr interrupt cause */ | |
1770 | reg = rd32(hw, I40E_PFINT_ICR0_ENA); | |
1771 | reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK; | |
1772 | wr32(hw, I40E_PFINT_ICR0_ENA, reg); | |
1773 | i40e_flush(hw); | |
1774 | ||
1775 | return 0; | |
1776 | } | |
1777 | ||
1778 | /** | |
1779 | * i40e_vc_vf_broadcast | |
1780 | * @pf: pointer to the pf structure | |
1781 | * @opcode: operation code | |
1782 | * @retval: return value | |
1783 | * @msg: pointer to the msg buffer | |
1784 | * @msglen: msg length | |
1785 | * | |
1786 | * send a message to all VFs on a given PF | |
1787 | **/ | |
1788 | static void i40e_vc_vf_broadcast(struct i40e_pf *pf, | |
1789 | enum i40e_virtchnl_ops v_opcode, | |
1790 | i40e_status v_retval, u8 *msg, | |
1791 | u16 msglen) | |
1792 | { | |
1793 | struct i40e_hw *hw = &pf->hw; | |
1794 | struct i40e_vf *vf = pf->vf; | |
1795 | int i; | |
1796 | ||
1797 | for (i = 0; i < pf->num_alloc_vfs; i++) { | |
1798 | /* Ignore return value on purpose - a given VF may fail, but | |
1799 | * we need to keep going and send to all of them | |
1800 | */ | |
1801 | i40e_aq_send_msg_to_vf(hw, vf->vf_id, v_opcode, v_retval, | |
1802 | msg, msglen, NULL); | |
1803 | vf++; | |
1804 | } | |
1805 | } | |
1806 | ||
1807 | /** | |
1808 | * i40e_vc_notify_link_state | |
1809 | * @pf: pointer to the pf structure | |
1810 | * | |
1811 | * send a link status message to all VFs on a given PF | |
1812 | **/ | |
1813 | void i40e_vc_notify_link_state(struct i40e_pf *pf) | |
1814 | { | |
1815 | struct i40e_virtchnl_pf_event pfe; | |
1816 | ||
1817 | pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE; | |
1818 | pfe.severity = I40E_PF_EVENT_SEVERITY_INFO; | |
1819 | pfe.event_data.link_event.link_status = | |
1820 | pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP; | |
1821 | pfe.event_data.link_event.link_speed = pf->hw.phy.link_info.link_speed; | |
1822 | ||
1823 | i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS, | |
1824 | (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event)); | |
1825 | } | |
1826 | ||
1827 | /** | |
1828 | * i40e_vc_notify_reset | |
1829 | * @pf: pointer to the pf structure | |
1830 | * | |
1831 | * indicate a pending reset to all VFs on a given PF | |
1832 | **/ | |
1833 | void i40e_vc_notify_reset(struct i40e_pf *pf) | |
1834 | { | |
1835 | struct i40e_virtchnl_pf_event pfe; | |
1836 | ||
1837 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | |
1838 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | |
1839 | i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, I40E_SUCCESS, | |
1840 | (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event)); | |
1841 | } | |
1842 | ||
1843 | /** | |
1844 | * i40e_vc_notify_vf_reset | |
1845 | * @vf: pointer to the vf structure | |
1846 | * | |
1847 | * indicate a pending reset to the given VF | |
1848 | **/ | |
1849 | void i40e_vc_notify_vf_reset(struct i40e_vf *vf) | |
1850 | { | |
1851 | struct i40e_virtchnl_pf_event pfe; | |
1852 | ||
1853 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | |
1854 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | |
1855 | i40e_aq_send_msg_to_vf(&vf->pf->hw, vf->vf_id, I40E_VIRTCHNL_OP_EVENT, | |
1856 | I40E_SUCCESS, (u8 *)&pfe, | |
1857 | sizeof(struct i40e_virtchnl_pf_event), NULL); | |
1858 | } | |
1859 | ||
1860 | /** | |
1861 | * i40e_ndo_set_vf_mac | |
1862 | * @netdev: network interface device structure | |
1863 | * @vf_id: vf identifier | |
1864 | * @mac: mac address | |
1865 | * | |
1866 | * program vf mac address | |
1867 | **/ | |
1868 | int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac) | |
1869 | { | |
1870 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1871 | struct i40e_vsi *vsi = np->vsi; | |
1872 | struct i40e_pf *pf = vsi->back; | |
1873 | struct i40e_mac_filter *f; | |
1874 | struct i40e_vf *vf; | |
1875 | int ret = 0; | |
1876 | ||
1877 | /* validate the request */ | |
1878 | if (vf_id >= pf->num_alloc_vfs) { | |
1879 | dev_err(&pf->pdev->dev, | |
1880 | "Invalid VF Identifier %d\n", vf_id); | |
1881 | ret = -EINVAL; | |
1882 | goto error_param; | |
1883 | } | |
1884 | ||
1885 | vf = &(pf->vf[vf_id]); | |
1886 | vsi = pf->vsi[vf->lan_vsi_index]; | |
1887 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
1888 | dev_err(&pf->pdev->dev, | |
1889 | "Uninitialized VF %d\n", vf_id); | |
1890 | ret = -EINVAL; | |
1891 | goto error_param; | |
1892 | } | |
1893 | ||
1894 | if (!is_valid_ether_addr(mac)) { | |
1895 | dev_err(&pf->pdev->dev, | |
1896 | "Invalid VF ethernet address\n"); | |
1897 | ret = -EINVAL; | |
1898 | goto error_param; | |
1899 | } | |
1900 | ||
1901 | /* delete the temporary mac address */ | |
1902 | i40e_del_filter(vsi, vf->default_lan_addr.addr, 0, true, false); | |
1903 | ||
1904 | /* add the new mac address */ | |
1905 | f = i40e_add_filter(vsi, mac, 0, true, false); | |
1906 | if (!f) { | |
1907 | dev_err(&pf->pdev->dev, | |
1908 | "Unable to add VF ucast filter\n"); | |
1909 | ret = -ENOMEM; | |
1910 | goto error_param; | |
1911 | } | |
1912 | ||
1913 | dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id); | |
1914 | /* program mac filter */ | |
1915 | if (i40e_sync_vsi_filters(vsi)) { | |
1916 | dev_err(&pf->pdev->dev, "Unable to program ucast filters\n"); | |
1917 | ret = -EIO; | |
1918 | goto error_param; | |
1919 | } | |
1920 | memcpy(vf->default_lan_addr.addr, mac, ETH_ALEN); | |
1921 | dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n"); | |
1922 | ret = 0; | |
1923 | ||
1924 | error_param: | |
1925 | return ret; | |
1926 | } | |
1927 | ||
1928 | /** | |
1929 | * i40e_ndo_set_vf_port_vlan | |
1930 | * @netdev: network interface device structure | |
1931 | * @vf_id: vf identifier | |
1932 | * @vlan_id: mac address | |
1933 | * @qos: priority setting | |
1934 | * | |
1935 | * program vf vlan id and/or qos | |
1936 | **/ | |
1937 | int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, | |
1938 | int vf_id, u16 vlan_id, u8 qos) | |
1939 | { | |
1940 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1941 | struct i40e_pf *pf = np->vsi->back; | |
1942 | struct i40e_vsi *vsi; | |
1943 | struct i40e_vf *vf; | |
1944 | int ret = 0; | |
1945 | ||
1946 | /* validate the request */ | |
1947 | if (vf_id >= pf->num_alloc_vfs) { | |
1948 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
1949 | ret = -EINVAL; | |
1950 | goto error_pvid; | |
1951 | } | |
1952 | ||
1953 | if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) { | |
1954 | dev_err(&pf->pdev->dev, "Invalid VF Parameters\n"); | |
1955 | ret = -EINVAL; | |
1956 | goto error_pvid; | |
1957 | } | |
1958 | ||
1959 | vf = &(pf->vf[vf_id]); | |
1960 | vsi = pf->vsi[vf->lan_vsi_index]; | |
1961 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
1962 | dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id); | |
1963 | ret = -EINVAL; | |
1964 | goto error_pvid; | |
1965 | } | |
1966 | ||
1967 | if (vsi->info.pvid) { | |
1968 | /* kill old VLAN */ | |
1969 | ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) & | |
1970 | VLAN_VID_MASK)); | |
1971 | if (ret) { | |
1972 | dev_info(&vsi->back->pdev->dev, | |
1973 | "remove VLAN failed, ret=%d, aq_err=%d\n", | |
1974 | ret, pf->hw.aq.asq_last_status); | |
1975 | } | |
1976 | } | |
1977 | if (vlan_id || qos) | |
1978 | ret = i40e_vsi_add_pvid(vsi, | |
1979 | vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT)); | |
1980 | else | |
6c12fcbf | 1981 | i40e_vsi_remove_pvid(vsi); |
5c3c48ac JB |
1982 | |
1983 | if (vlan_id) { | |
1984 | dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n", | |
1985 | vlan_id, qos, vf_id); | |
1986 | ||
1987 | /* add new VLAN filter */ | |
1988 | ret = i40e_vsi_add_vlan(vsi, vlan_id); | |
1989 | if (ret) { | |
1990 | dev_info(&vsi->back->pdev->dev, | |
1991 | "add VF VLAN failed, ret=%d aq_err=%d\n", ret, | |
1992 | vsi->back->hw.aq.asq_last_status); | |
1993 | goto error_pvid; | |
1994 | } | |
1995 | } | |
1996 | ||
1997 | if (ret) { | |
1998 | dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n"); | |
1999 | goto error_pvid; | |
2000 | } | |
6c12fcbf GR |
2001 | /* The Port VLAN needs to be saved across resets the same as the |
2002 | * default LAN MAC address. | |
2003 | */ | |
2004 | vf->port_vlan_id = le16_to_cpu(vsi->info.pvid); | |
5c3c48ac JB |
2005 | ret = 0; |
2006 | ||
2007 | error_pvid: | |
2008 | return ret; | |
2009 | } | |
2010 | ||
2011 | /** | |
2012 | * i40e_ndo_set_vf_bw | |
2013 | * @netdev: network interface device structure | |
2014 | * @vf_id: vf identifier | |
2015 | * @tx_rate: tx rate | |
2016 | * | |
2017 | * configure vf tx rate | |
2018 | **/ | |
2019 | int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int tx_rate) | |
2020 | { | |
2021 | return -EOPNOTSUPP; | |
2022 | } | |
2023 | ||
2024 | /** | |
2025 | * i40e_ndo_get_vf_config | |
2026 | * @netdev: network interface device structure | |
2027 | * @vf_id: vf identifier | |
2028 | * @ivi: vf configuration structure | |
2029 | * | |
2030 | * return vf configuration | |
2031 | **/ | |
2032 | int i40e_ndo_get_vf_config(struct net_device *netdev, | |
2033 | int vf_id, struct ifla_vf_info *ivi) | |
2034 | { | |
2035 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5c3c48ac JB |
2036 | struct i40e_vsi *vsi = np->vsi; |
2037 | struct i40e_pf *pf = vsi->back; | |
2038 | struct i40e_vf *vf; | |
2039 | int ret = 0; | |
2040 | ||
2041 | /* validate the request */ | |
2042 | if (vf_id >= pf->num_alloc_vfs) { | |
2043 | dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id); | |
2044 | ret = -EINVAL; | |
2045 | goto error_param; | |
2046 | } | |
2047 | ||
2048 | vf = &(pf->vf[vf_id]); | |
2049 | /* first vsi is always the LAN vsi */ | |
2050 | vsi = pf->vsi[vf->lan_vsi_index]; | |
2051 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) { | |
2052 | dev_err(&pf->pdev->dev, "Uninitialized VF %d\n", vf_id); | |
2053 | ret = -EINVAL; | |
2054 | goto error_param; | |
2055 | } | |
2056 | ||
2057 | ivi->vf = vf_id; | |
2058 | ||
f4a1c5cf | 2059 | memcpy(&ivi->mac, vf->default_lan_addr.addr, ETH_ALEN); |
5c3c48ac JB |
2060 | |
2061 | ivi->tx_rate = 0; | |
2062 | ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK; | |
2063 | ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >> | |
2064 | I40E_VLAN_PRIORITY_SHIFT; | |
2065 | ret = 0; | |
2066 | ||
2067 | error_param: | |
2068 | return ret; | |
2069 | } |