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Merge tag 'binfmt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb...
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_virtchnl_pf.c
CommitLineData
5c3c48ac
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
40d72a50 4 * Copyright(c) 2013 - 2016 Intel Corporation.
5c3c48ac
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
5c3c48ac
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#include "i40e.h"
28
532b0455
MW		 29/*********************notification routines***********************/
30
31/**
32 * i40e_vc_vf_broadcast
33 * @pf: pointer to the PF structure
34 * @opcode: operation code
35 * @retval: return value
36 * @msg: pointer to the msg buffer
37 * @msglen: msg length
38 *
39 * send a message to all VFs on a given PF
40 **/
41static void i40e_vc_vf_broadcast(struct i40e_pf *pf,
42 enum i40e_virtchnl_ops v_opcode,
43 i40e_status v_retval, u8 *msg,
44 u16 msglen)
45{
46 struct i40e_hw *hw = &pf->hw;
47 struct i40e_vf *vf = pf->vf;
48 int i;
49
50 for (i = 0; i < pf->num_alloc_vfs; i++, vf++) {
a1b5a24f 51 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455
MW		 52 /* Not all vfs are enabled so skip the ones that are not */
53 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
54 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
55 continue;
56
57 /* Ignore return value on purpose - a given VF may fail, but
58 * we need to keep going and send to all of them
59 */
60 i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
61 msg, msglen, NULL);
62 }
63}
64
65/**
55f7d723 66 * i40e_vc_notify_vf_link_state
532b0455
MW		 67 * @vf: pointer to the VF structure
68 *
69 * send a link status message to a single VF
70 **/
71static void i40e_vc_notify_vf_link_state(struct i40e_vf *vf)
72{
73 struct i40e_virtchnl_pf_event pfe;
74 struct i40e_pf *pf = vf->pf;
75 struct i40e_hw *hw = &pf->hw;
76 struct i40e_link_status *ls = &pf->hw.phy.link_info;
a1b5a24f 77 int abs_vf_id = vf->vf_id + (int)hw->func_caps.vf_base_id;
532b0455
MW		 78
79 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
80 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
81 if (vf->link_forced) {
82 pfe.event_data.link_event.link_status = vf->link_up;
83 pfe.event_data.link_event.link_speed =
84 (vf->link_up ? I40E_LINK_SPEED_40GB : 0);
85 } else {
86 pfe.event_data.link_event.link_status =
87 ls->link_info & I40E_AQ_LINK_UP;
88 pfe.event_data.link_event.link_speed = ls->link_speed;
89 }
90 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
91 0, (u8 *)&pfe, sizeof(pfe), NULL);
92}
93
94/**
95 * i40e_vc_notify_link_state
96 * @pf: pointer to the PF structure
97 *
98 * send a link status message to all VFs on a given PF
99 **/
100void i40e_vc_notify_link_state(struct i40e_pf *pf)
101{
102 int i;
103
104 for (i = 0; i < pf->num_alloc_vfs; i++)
105 i40e_vc_notify_vf_link_state(&pf->vf[i]);
106}
107
108/**
109 * i40e_vc_notify_reset
110 * @pf: pointer to the PF structure
111 *
112 * indicate a pending reset to all VFs on a given PF
113 **/
114void i40e_vc_notify_reset(struct i40e_pf *pf)
115{
116 struct i40e_virtchnl_pf_event pfe;
117
118 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
119 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
120 i40e_vc_vf_broadcast(pf, I40E_VIRTCHNL_OP_EVENT, 0,
121 (u8 *)&pfe, sizeof(struct i40e_virtchnl_pf_event));
122}
123
124/**
125 * i40e_vc_notify_vf_reset
126 * @vf: pointer to the VF structure
127 *
128 * indicate a pending reset to the given VF
129 **/
130void i40e_vc_notify_vf_reset(struct i40e_vf *vf)
131{
132 struct i40e_virtchnl_pf_event pfe;
133 int abs_vf_id;
134
135 /* validate the request */
136 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
137 return;
138
139 /* verify if the VF is in either init or active before proceeding */
140 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) &&
141 !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
142 return;
143
a1b5a24f 144 abs_vf_id = vf->vf_id + (int)vf->pf->hw.func_caps.vf_base_id;
532b0455
MW		 145
146 pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING;
147 pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM;
148 i40e_aq_send_msg_to_vf(&vf->pf->hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
149 0, (u8 *)&pfe,
150 sizeof(struct i40e_virtchnl_pf_event), NULL);
151}
5c3c48ac
JB		 152/***********************misc routines*****************************/
153
f9b4b627
GR		 154/**
155 * i40e_vc_disable_vf
b40c82e6
JK		 156 * @pf: pointer to the PF info
157 * @vf: pointer to the VF info
f9b4b627
GR		 158 *
159 * Disable the VF through a SW reset
160 **/
161static inline void i40e_vc_disable_vf(struct i40e_pf *pf, struct i40e_vf *vf)
162{
54f455ee
MW		 163 i40e_vc_notify_vf_reset(vf);
164 i40e_reset_vf(vf, false);
f9b4b627
GR		 165}
166
5c3c48ac
JB		 167/**
168 * i40e_vc_isvalid_vsi_id
b40c82e6
JK		 169 * @vf: pointer to the VF info
170 * @vsi_id: VF relative VSI id
5c3c48ac 171 *
b40c82e6 172 * check for the valid VSI id
5c3c48ac 173 **/
fdf0e0bf 174static inline bool i40e_vc_isvalid_vsi_id(struct i40e_vf *vf, u16 vsi_id)
5c3c48ac
JB		 175{
176 struct i40e_pf *pf = vf->pf;
fdf0e0bf 177 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 178
fdf0e0bf 179 return (vsi && (vsi->vf_id == vf->vf_id));
5c3c48ac
JB		 180}
181
182/**
183 * i40e_vc_isvalid_queue_id
b40c82e6 184 * @vf: pointer to the VF info
5c3c48ac
JB		 185 * @vsi_id: vsi id
186 * @qid: vsi relative queue id
187 *
188 * check for the valid queue id
189 **/
fdf0e0bf 190static inline bool i40e_vc_isvalid_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 191 u8 qid)
192{
193 struct i40e_pf *pf = vf->pf;
fdf0e0bf 194 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac 195
fdf0e0bf 196 return (vsi && (qid < vsi->alloc_queue_pairs));
5c3c48ac
JB		 197}
198
199/**
200 * i40e_vc_isvalid_vector_id
b40c82e6
JK		 201 * @vf: pointer to the VF info
202 * @vector_id: VF relative vector id
5c3c48ac
JB		 203 *
204 * check for the valid vector id
205 **/
206static inline bool i40e_vc_isvalid_vector_id(struct i40e_vf *vf, u8 vector_id)
207{
208 struct i40e_pf *pf = vf->pf;
209
9347eb77 210 return vector_id < pf->hw.func_caps.num_msix_vectors_vf;
5c3c48ac
JB		 211}
212
213/***********************vf resource mgmt routines*****************/
214
215/**
216 * i40e_vc_get_pf_queue_id
b40c82e6 217 * @vf: pointer to the VF info
fdf0e0bf 218 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 219 * @vsi_queue_id: vsi relative queue id
220 *
b40c82e6 221 * return PF relative queue id
5c3c48ac 222 **/
fdf0e0bf 223static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 224 u8 vsi_queue_id)
225{
226 struct i40e_pf *pf = vf->pf;
fdf0e0bf 227 struct i40e_vsi *vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 228 u16 pf_queue_id = I40E_QUEUE_END_OF_LIST;
229
fdf0e0bf
ASJ		 230 if (!vsi)
231 return pf_queue_id;
232
5c3c48ac
JB		 233 if (le16_to_cpu(vsi->info.mapping_flags) &
234 I40E_AQ_VSI_QUE_MAP_NONCONTIG)
235 pf_queue_id =
236 le16_to_cpu(vsi->info.queue_mapping[vsi_queue_id]);
237 else
238 pf_queue_id = le16_to_cpu(vsi->info.queue_mapping[0]) +
239 vsi_queue_id;
240
241 return pf_queue_id;
242}
243
5c3c48ac
JB		 244/**
245 * i40e_config_irq_link_list
b40c82e6 246 * @vf: pointer to the VF info
fdf0e0bf 247 * @vsi_id: id of VSI as given by the FW
5c3c48ac
JB		 248 * @vecmap: irq map info
249 *
250 * configure irq link list from the map
251 **/
fdf0e0bf 252static void i40e_config_irq_link_list(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 253 struct i40e_virtchnl_vector_map *vecmap)
254{
255 unsigned long linklistmap = 0, tempmap;
256 struct i40e_pf *pf = vf->pf;
257 struct i40e_hw *hw = &pf->hw;
258 u16 vsi_queue_id, pf_queue_id;
259 enum i40e_queue_type qtype;
260 u16 next_q, vector_id;
261 u32 reg, reg_idx;
262 u16 itr_idx = 0;
263
264 vector_id = vecmap->vector_id;
265 /* setup the head */
266 if (0 == vector_id)
267 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
268 else
269 reg_idx = I40E_VPINT_LNKLSTN(
9347eb77
MW		 270 ((pf->hw.func_caps.num_msix_vectors_vf - 1) * vf->vf_id) +
271 (vector_id - 1));
5c3c48ac
JB		 272
273 if (vecmap->rxq_map == 0 && vecmap->txq_map == 0) {
274 /* Special case - No queues mapped on this vector */
275 wr32(hw, reg_idx, I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
276 goto irq_list_done;
277 }
278 tempmap = vecmap->rxq_map;
4836650b 279 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 280 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
281 vsi_queue_id));
5c3c48ac
JB		 282 }
283
284 tempmap = vecmap->txq_map;
4836650b 285 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
41a1d04b
JB		 286 linklistmap |= (BIT(I40E_VIRTCHNL_SUPPORTED_QTYPES *
287 vsi_queue_id + 1));
5c3c48ac
JB		 288 }
289
290 next_q = find_first_bit(&linklistmap,
291 (I40E_MAX_VSI_QP *
292 I40E_VIRTCHNL_SUPPORTED_QTYPES));
b82bc49e
MW		 293 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
294 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 295 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 296 reg = ((qtype << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT) | pf_queue_id);
297
298 wr32(hw, reg_idx, reg);
299
300 while (next_q < (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
301 switch (qtype) {
302 case I40E_QUEUE_TYPE_RX:
303 reg_idx = I40E_QINT_RQCTL(pf_queue_id);
304 itr_idx = vecmap->rxitr_idx;
305 break;
306 case I40E_QUEUE_TYPE_TX:
307 reg_idx = I40E_QINT_TQCTL(pf_queue_id);
308 itr_idx = vecmap->txitr_idx;
309 break;
310 default:
311 break;
312 }
313
314 next_q = find_next_bit(&linklistmap,
315 (I40E_MAX_VSI_QP *
316 I40E_VIRTCHNL_SUPPORTED_QTYPES),
317 next_q + 1);
829af3ac
MW		 318 if (next_q <
319 (I40E_MAX_VSI_QP * I40E_VIRTCHNL_SUPPORTED_QTYPES)) {
5c3c48ac
JB		 320 vsi_queue_id = next_q / I40E_VIRTCHNL_SUPPORTED_QTYPES;
321 qtype = next_q % I40E_VIRTCHNL_SUPPORTED_QTYPES;
fdf0e0bf 322 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id,
5c3c48ac
JB		 323 vsi_queue_id);
324 } else {
325 pf_queue_id = I40E_QUEUE_END_OF_LIST;
326 qtype = 0;
327 }
328
329 /* format for the RQCTL & TQCTL regs is same */
330 reg = (vector_id) |
331 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
332 (pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
41a1d04b 333 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
5c3c48ac
JB		 334 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
335 wr32(hw, reg_idx, reg);
336 }
337
b8262a6d
ASJ		 338 /* if the vf is running in polling mode and using interrupt zero,
339 * need to disable auto-mask on enabling zero interrupt for VFs.
340 */
341 if ((vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) &&
342 (vector_id == 0)) {
343 reg = rd32(hw, I40E_GLINT_CTL);
344 if (!(reg & I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK)) {
345 reg |= I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK;
346 wr32(hw, I40E_GLINT_CTL, reg);
347 }
348 }
349
5c3c48ac
JB		 350irq_list_done:
351 i40e_flush(hw);
352}
353
e3219ce6
ASJ		 354/**
355 * i40e_release_iwarp_qvlist
356 * @vf: pointer to the VF.
357 *
358 **/
359static void i40e_release_iwarp_qvlist(struct i40e_vf *vf)
360{
361 struct i40e_pf *pf = vf->pf;
362 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info = vf->qvlist_info;
363 u32 msix_vf;
364 u32 i;
365
366 if (!vf->qvlist_info)
367 return;
368
369 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
370 for (i = 0; i < qvlist_info->num_vectors; i++) {
371 struct i40e_virtchnl_iwarp_qv_info *qv_info;
372 u32 next_q_index, next_q_type;
373 struct i40e_hw *hw = &pf->hw;
374 u32 v_idx, reg_idx, reg;
375
376 qv_info = &qvlist_info->qv_info[i];
377 if (!qv_info)
378 continue;
379 v_idx = qv_info->v_idx;
380 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
381 /* Figure out the queue after CEQ and make that the
382 * first queue.
383 */
384 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
385 reg = rd32(hw, I40E_VPINT_CEQCTL(reg_idx));
386 next_q_index = (reg & I40E_VPINT_CEQCTL_NEXTQ_INDX_MASK)
387 >> I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT;
388 next_q_type = (reg & I40E_VPINT_CEQCTL_NEXTQ_TYPE_MASK)
389 >> I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT;
390
391 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
392 reg = (next_q_index &
393 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
394 (next_q_type <<
395 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
396
397 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
398 }
399 }
400 kfree(vf->qvlist_info);
401 vf->qvlist_info = NULL;
402}
403
404/**
405 * i40e_config_iwarp_qvlist
406 * @vf: pointer to the VF info
407 * @qvlist_info: queue and vector list
408 *
409 * Return 0 on success or < 0 on error
410 **/
411static int i40e_config_iwarp_qvlist(struct i40e_vf *vf,
412 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info)
413{
414 struct i40e_pf *pf = vf->pf;
415 struct i40e_hw *hw = &pf->hw;
416 struct i40e_virtchnl_iwarp_qv_info *qv_info;
417 u32 v_idx, i, reg_idx, reg;
418 u32 next_q_idx, next_q_type;
419 u32 msix_vf, size;
420
421 size = sizeof(struct i40e_virtchnl_iwarp_qvlist_info) +
422 (sizeof(struct i40e_virtchnl_iwarp_qv_info) *
423 (qvlist_info->num_vectors - 1));
424 vf->qvlist_info = kzalloc(size, GFP_KERNEL);
425 vf->qvlist_info->num_vectors = qvlist_info->num_vectors;
426
427 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
428 for (i = 0; i < qvlist_info->num_vectors; i++) {
429 qv_info = &qvlist_info->qv_info[i];
430 if (!qv_info)
431 continue;
432 v_idx = qv_info->v_idx;
433
434 /* Validate vector id belongs to this vf */
435 if (!i40e_vc_isvalid_vector_id(vf, v_idx))
436 goto err;
437
438 vf->qvlist_info->qv_info[i] = *qv_info;
439
440 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
441 /* We might be sharing the interrupt, so get the first queue
442 * index and type, push it down the list by adding the new
443 * queue on top. Also link it with the new queue in CEQCTL.
444 */
445 reg = rd32(hw, I40E_VPINT_LNKLSTN(reg_idx));
446 next_q_idx = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) >>
447 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT);
448 next_q_type = ((reg & I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK) >>
449 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
450
451 if (qv_info->ceq_idx != I40E_QUEUE_INVALID_IDX) {
452 reg_idx = (msix_vf - 1) * vf->vf_id + qv_info->ceq_idx;
453 reg = (I40E_VPINT_CEQCTL_CAUSE_ENA_MASK |
454 (v_idx << I40E_VPINT_CEQCTL_MSIX_INDX_SHIFT) |
455 (qv_info->itr_idx << I40E_VPINT_CEQCTL_ITR_INDX_SHIFT) |
456 (next_q_type << I40E_VPINT_CEQCTL_NEXTQ_TYPE_SHIFT) |
457 (next_q_idx << I40E_VPINT_CEQCTL_NEXTQ_INDX_SHIFT));
458 wr32(hw, I40E_VPINT_CEQCTL(reg_idx), reg);
459
460 reg_idx = ((msix_vf - 1) * vf->vf_id) + (v_idx - 1);
461 reg = (qv_info->ceq_idx &
462 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK) |
463 (I40E_QUEUE_TYPE_PE_CEQ <<
464 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT);
465 wr32(hw, I40E_VPINT_LNKLSTN(reg_idx), reg);
466 }
467
468 if (qv_info->aeq_idx != I40E_QUEUE_INVALID_IDX) {
469 reg = (I40E_VPINT_AEQCTL_CAUSE_ENA_MASK |
470 (v_idx << I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT) |
471 (qv_info->itr_idx << I40E_VPINT_AEQCTL_ITR_INDX_SHIFT));
472
473 wr32(hw, I40E_VPINT_AEQCTL(vf->vf_id), reg);
474 }
475 }
476
477 return 0;
478err:
479 kfree(vf->qvlist_info);
480 vf->qvlist_info = NULL;
481 return -EINVAL;
482}
483
5c3c48ac
JB		 484/**
485 * i40e_config_vsi_tx_queue
b40c82e6 486 * @vf: pointer to the VF info
fdf0e0bf 487 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 488 * @vsi_queue_id: vsi relative queue index
489 * @info: config. info
490 *
491 * configure tx queue
492 **/
fdf0e0bf 493static int i40e_config_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 494 u16 vsi_queue_id,
495 struct i40e_virtchnl_txq_info *info)
496{
497 struct i40e_pf *pf = vf->pf;
498 struct i40e_hw *hw = &pf->hw;
499 struct i40e_hmc_obj_txq tx_ctx;
fdf0e0bf 500 struct i40e_vsi *vsi;
5c3c48ac
JB		 501 u16 pf_queue_id;
502 u32 qtx_ctl;
503 int ret = 0;
504
fdf0e0bf
ASJ		 505 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
506 vsi = i40e_find_vsi_from_id(pf, vsi_id);
5c3c48ac
JB		 507
508 /* clear the context structure first */
509 memset(&tx_ctx, 0, sizeof(struct i40e_hmc_obj_txq));
510
511 /* only set the required fields */
512 tx_ctx.base = info->dma_ring_addr / 128;
513 tx_ctx.qlen = info->ring_len;
fdf0e0bf 514 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
5c3c48ac 515 tx_ctx.rdylist_act = 0;
5d29896a
AS		 516 tx_ctx.head_wb_ena = info->headwb_enabled;
517 tx_ctx.head_wb_addr = info->dma_headwb_addr;
5c3c48ac
JB		 518
519 /* clear the context in the HMC */
520 ret = i40e_clear_lan_tx_queue_context(hw, pf_queue_id);
521 if (ret) {
522 dev_err(&pf->pdev->dev,
523 "Failed to clear VF LAN Tx queue context %d, error: %d\n",
524 pf_queue_id, ret);
525 ret = -ENOENT;
526 goto error_context;
527 }
528
529 /* set the context in the HMC */
530 ret = i40e_set_lan_tx_queue_context(hw, pf_queue_id, &tx_ctx);
531 if (ret) {
532 dev_err(&pf->pdev->dev,
533 "Failed to set VF LAN Tx queue context %d error: %d\n",
534 pf_queue_id, ret);
535 ret = -ENOENT;
536 goto error_context;
537 }
538
539 /* associate this queue with the PCI VF function */
540 qtx_ctl = I40E_QTX_CTL_VF_QUEUE;
13fd9774 541 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT)
5c3c48ac
JB		 542 & I40E_QTX_CTL_PF_INDX_MASK);
543 qtx_ctl |= (((vf->vf_id + hw->func_caps.vf_base_id)
544 << I40E_QTX_CTL_VFVM_INDX_SHIFT)
545 & I40E_QTX_CTL_VFVM_INDX_MASK);
546 wr32(hw, I40E_QTX_CTL(pf_queue_id), qtx_ctl);
547 i40e_flush(hw);
548
549error_context:
550 return ret;
551}
552
553/**
554 * i40e_config_vsi_rx_queue
b40c82e6 555 * @vf: pointer to the VF info
fdf0e0bf 556 * @vsi_id: id of VSI as provided by the FW
5c3c48ac
JB		 557 * @vsi_queue_id: vsi relative queue index
558 * @info: config. info
559 *
560 * configure rx queue
561 **/
fdf0e0bf 562static int i40e_config_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_id,
5c3c48ac
JB		 563 u16 vsi_queue_id,
564 struct i40e_virtchnl_rxq_info *info)
565{
566 struct i40e_pf *pf = vf->pf;
567 struct i40e_hw *hw = &pf->hw;
568 struct i40e_hmc_obj_rxq rx_ctx;
569 u16 pf_queue_id;
570 int ret = 0;
571
fdf0e0bf 572 pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_id, vsi_queue_id);
5c3c48ac
JB		 573
574 /* clear the context structure first */
575 memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
576
577 /* only set the required fields */
578 rx_ctx.base = info->dma_ring_addr / 128;
579 rx_ctx.qlen = info->ring_len;
580
581 if (info->splithdr_enabled) {
582 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
583 I40E_RX_SPLIT_IP |
584 I40E_RX_SPLIT_TCP_UDP |
585 I40E_RX_SPLIT_SCTP;
586 /* header length validation */
587 if (info->hdr_size > ((2 * 1024) - 64)) {
588 ret = -EINVAL;
589 goto error_param;
590 }
591 rx_ctx.hbuff = info->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
592
19b85e67 593 /* set split mode 10b */
d6b3bca1 594 rx_ctx.dtype = I40E_RX_DTYPE_HEADER_SPLIT;
5c3c48ac
JB		 595 }
596
597 /* databuffer length validation */
598 if (info->databuffer_size > ((16 * 1024) - 128)) {
599 ret = -EINVAL;
600 goto error_param;
601 }
602 rx_ctx.dbuff = info->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
603
604 /* max pkt. length validation */
605 if (info->max_pkt_size >= (16 * 1024) || info->max_pkt_size < 64) {
606 ret = -EINVAL;
607 goto error_param;
608 }
609 rx_ctx.rxmax = info->max_pkt_size;
610
611 /* enable 32bytes desc always */
612 rx_ctx.dsize = 1;
613
614 /* default values */
5c3c48ac
JB		 615 rx_ctx.lrxqthresh = 2;
616 rx_ctx.crcstrip = 1;
50d41659 617 rx_ctx.prefena = 1;
c1d11cef 618 rx_ctx.l2tsel = 1;
5c3c48ac
JB		 619
620 /* clear the context in the HMC */
621 ret = i40e_clear_lan_rx_queue_context(hw, pf_queue_id);
622 if (ret) {
623 dev_err(&pf->pdev->dev,
624 "Failed to clear VF LAN Rx queue context %d, error: %d\n",
625 pf_queue_id, ret);
626 ret = -ENOENT;
627 goto error_param;
628 }
629
630 /* set the context in the HMC */
631 ret = i40e_set_lan_rx_queue_context(hw, pf_queue_id, &rx_ctx);
632 if (ret) {
633 dev_err(&pf->pdev->dev,
634 "Failed to set VF LAN Rx queue context %d error: %d\n",
635 pf_queue_id, ret);
636 ret = -ENOENT;
637 goto error_param;
638 }
639
640error_param:
641 return ret;
642}
643
644/**
645 * i40e_alloc_vsi_res
b40c82e6 646 * @vf: pointer to the VF info
5c3c48ac
JB		 647 * @type: type of VSI to allocate
648 *
b40c82e6 649 * alloc VF vsi context & resources
5c3c48ac
JB		 650 **/
651static int i40e_alloc_vsi_res(struct i40e_vf *vf, enum i40e_vsi_type type)
652{
653 struct i40e_mac_filter *f = NULL;
654 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 655 struct i40e_vsi *vsi;
656 int ret = 0;
657
658 vsi = i40e_vsi_setup(pf, type, pf->vsi[pf->lan_vsi]->seid, vf->vf_id);
659
660 if (!vsi) {
661 dev_err(&pf->pdev->dev,
b40c82e6 662 "add vsi failed for VF %d, aq_err %d\n",
5c3c48ac
JB		 663 vf->vf_id, pf->hw.aq.asq_last_status);
664 ret = -ENOENT;
665 goto error_alloc_vsi_res;
666 }
667 if (type == I40E_VSI_SRIOV) {
bb360717
MW		 668 u64 hena = i40e_pf_get_default_rss_hena(pf);
669
fdf0e0bf 670 vf->lan_vsi_idx = vsi->idx;
5c3c48ac 671 vf->lan_vsi_id = vsi->id;
6c12fcbf
GR		 672 /* If the port VLAN has been configured and then the
673 * VF driver was removed then the VSI port VLAN
674 * configuration was destroyed. Check if there is
675 * a port VLAN and restore the VSI configuration if
676 * needed.
677 */
678 if (vf->port_vlan_id)
679 i40e_vsi_add_pvid(vsi, vf->port_vlan_id);
21659035
KP		 680
681 spin_lock_bh(&vsi->mac_filter_list_lock);
b7b713a8
MW		 682 if (is_valid_ether_addr(vf->default_lan_addr.addr)) {
683 f = i40e_add_filter(vsi, vf->default_lan_addr.addr,
684 vf->port_vlan_id ? vf->port_vlan_id : -1,
685 true, false);
686 if (!f)
687 dev_info(&pf->pdev->dev,
688 "Could not add MAC filter %pM for VF %d\n",
689 vf->default_lan_addr.addr, vf->vf_id);
690 }
21659035 691 spin_unlock_bh(&vsi->mac_filter_list_lock);
bb360717
MW		 692 i40e_write_rx_ctl(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id),
693 (u32)hena);
694 i40e_write_rx_ctl(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id),
695 (u32)(hena >> 32));
5c3c48ac 696 }
6dbbbfb2 697
5c3c48ac 698 /* program mac filter */
17652c63 699 ret = i40e_sync_vsi_filters(vsi);
fd1646ee 700 if (ret)
5c3c48ac 701 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
5c3c48ac 702
6b192891
MW		 703 /* Set VF bandwidth if specified */
704 if (vf->tx_rate) {
705 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
706 vf->tx_rate / 50, 0, NULL);
707 if (ret)
708 dev_err(&pf->pdev->dev, "Unable to set tx rate, VF %d, error code %d.\n",
709 vf->vf_id, ret);
710 }
711
5c3c48ac
JB		 712error_alloc_vsi_res:
713 return ret;
714}
715
805bd5bd
MW		 716/**
717 * i40e_enable_vf_mappings
b40c82e6 718 * @vf: pointer to the VF info
805bd5bd 719 *
b40c82e6 720 * enable VF mappings
805bd5bd
MW		 721 **/
722static void i40e_enable_vf_mappings(struct i40e_vf *vf)
723{
724 struct i40e_pf *pf = vf->pf;
725 struct i40e_hw *hw = &pf->hw;
726 u32 reg, total_queue_pairs = 0;
727 int j;
728
729 /* Tell the hardware we're using noncontiguous mapping. HW requires
730 * that VF queues be mapped using this method, even when they are
731 * contiguous in real life
732 */
272cdaf2
SN		 733 i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vf->lan_vsi_id),
734 I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
805bd5bd
MW		 735
736 /* enable VF vplan_qtable mappings */
737 reg = I40E_VPLAN_MAPENA_TXRX_ENA_MASK;
738 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), reg);
739
740 /* map PF queues to VF queues */
fdf0e0bf
ASJ		 741 for (j = 0; j < pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs; j++) {
742 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id, j);
6995b36c 743
805bd5bd
MW		 744 reg = (qid & I40E_VPLAN_QTABLE_QINDEX_MASK);
745 wr32(hw, I40E_VPLAN_QTABLE(total_queue_pairs, vf->vf_id), reg);
746 total_queue_pairs++;
747 }
748
749 /* map PF queues to VSI */
750 for (j = 0; j < 7; j++) {
fdf0e0bf 751 if (j * 2 >= pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs) {
805bd5bd
MW		 752 reg = 0x07FF07FF; /* unused */
753 } else {
fdf0e0bf 754 u16 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 755 j * 2);
756 reg = qid;
fdf0e0bf 757 qid = i40e_vc_get_pf_queue_id(vf, vf->lan_vsi_id,
805bd5bd
MW		 758 (j * 2) + 1);
759 reg |= qid << 16;
760 }
272cdaf2
SN		 761 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(j, vf->lan_vsi_id),
762 reg);
805bd5bd
MW		 763 }
764
765 i40e_flush(hw);
766}
767
768/**
769 * i40e_disable_vf_mappings
b40c82e6 770 * @vf: pointer to the VF info
805bd5bd 771 *
b40c82e6 772 * disable VF mappings
805bd5bd
MW		 773 **/
774static void i40e_disable_vf_mappings(struct i40e_vf *vf)
775{
776 struct i40e_pf *pf = vf->pf;
777 struct i40e_hw *hw = &pf->hw;
778 int i;
779
780 /* disable qp mappings */
781 wr32(hw, I40E_VPLAN_MAPENA(vf->vf_id), 0);
782 for (i = 0; i < I40E_MAX_VSI_QP; i++)
783 wr32(hw, I40E_VPLAN_QTABLE(i, vf->vf_id),
784 I40E_QUEUE_END_OF_LIST);
785 i40e_flush(hw);
786}
787
788/**
789 * i40e_free_vf_res
b40c82e6 790 * @vf: pointer to the VF info
805bd5bd 791 *
b40c82e6 792 * free VF resources
805bd5bd
MW		 793 **/
794static void i40e_free_vf_res(struct i40e_vf *vf)
795{
796 struct i40e_pf *pf = vf->pf;
fc18eaa0
MW		 797 struct i40e_hw *hw = &pf->hw;
798 u32 reg_idx, reg;
799 int i, msix_vf;
805bd5bd
MW		 800
801 /* free vsi & disconnect it from the parent uplink */
fdf0e0bf
ASJ		 802 if (vf->lan_vsi_idx) {
803 i40e_vsi_release(pf->vsi[vf->lan_vsi_idx]);
804 vf->lan_vsi_idx = 0;
805bd5bd
MW		 805 vf->lan_vsi_id = 0;
806 }
9347eb77
MW		 807 msix_vf = pf->hw.func_caps.num_msix_vectors_vf;
808
fc18eaa0
MW		 809 /* disable interrupts so the VF starts in a known state */
810 for (i = 0; i < msix_vf; i++) {
811 /* format is same for both registers */
812 if (0 == i)
813 reg_idx = I40E_VFINT_DYN_CTL0(vf->vf_id);
814 else
815 reg_idx = I40E_VFINT_DYN_CTLN(((msix_vf - 1) *
816 (vf->vf_id))
817 + (i - 1));
818 wr32(hw, reg_idx, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
819 i40e_flush(hw);
820 }
805bd5bd 821
fc18eaa0
MW		 822 /* clear the irq settings */
823 for (i = 0; i < msix_vf; i++) {
824 /* format is same for both registers */
825 if (0 == i)
826 reg_idx = I40E_VPINT_LNKLST0(vf->vf_id);
827 else
828 reg_idx = I40E_VPINT_LNKLSTN(((msix_vf - 1) *
829 (vf->vf_id))
830 + (i - 1));
831 reg = (I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_MASK |
832 I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
833 wr32(hw, reg_idx, reg);
834 i40e_flush(hw);
835 }
805bd5bd
MW		 836 /* reset some of the state varibles keeping
837 * track of the resources
838 */
839 vf->num_queue_pairs = 0;
840 vf->vf_states = 0;
21be99ec 841 clear_bit(I40E_VF_STAT_INIT, &vf->vf_states);
805bd5bd
MW		 842}
843
844/**
845 * i40e_alloc_vf_res
b40c82e6 846 * @vf: pointer to the VF info
805bd5bd 847 *
b40c82e6 848 * allocate VF resources
805bd5bd
MW		 849 **/
850static int i40e_alloc_vf_res(struct i40e_vf *vf)
851{
852 struct i40e_pf *pf = vf->pf;
853 int total_queue_pairs = 0;
854 int ret;
855
856 /* allocate hw vsi context & associated resources */
857 ret = i40e_alloc_vsi_res(vf, I40E_VSI_SRIOV);
858 if (ret)
859 goto error_alloc;
fdf0e0bf 860 total_queue_pairs += pf->vsi[vf->lan_vsi_idx]->alloc_queue_pairs;
692fb0a7
ASJ		 861
862 if (vf->trusted)
863 set_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
864 else
865 clear_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
805bd5bd
MW		 866
867 /* store the total qps number for the runtime
b40c82e6 868 * VF req validation
805bd5bd
MW		 869 */
870 vf->num_queue_pairs = total_queue_pairs;
871
b40c82e6 872 /* VF is now completely initialized */
805bd5bd
MW		 873 set_bit(I40E_VF_STAT_INIT, &vf->vf_states);
874
875error_alloc:
876 if (ret)
877 i40e_free_vf_res(vf);
878
879 return ret;
880}
881
fc18eaa0
MW		 882#define VF_DEVICE_STATUS 0xAA
883#define VF_TRANS_PENDING_MASK 0x20
884/**
885 * i40e_quiesce_vf_pci
b40c82e6 886 * @vf: pointer to the VF structure
fc18eaa0
MW		 887 *
888 * Wait for VF PCI transactions to be cleared after reset. Returns -EIO
889 * if the transactions never clear.
890 **/
891static int i40e_quiesce_vf_pci(struct i40e_vf *vf)
892{
893 struct i40e_pf *pf = vf->pf;
894 struct i40e_hw *hw = &pf->hw;
895 int vf_abs_id, i;
896 u32 reg;
897
b141d619 898 vf_abs_id = vf->vf_id + hw->func_caps.vf_base_id;
fc18eaa0
MW		 899
900 wr32(hw, I40E_PF_PCI_CIAA,
901 VF_DEVICE_STATUS | (vf_abs_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
902 for (i = 0; i < 100; i++) {
903 reg = rd32(hw, I40E_PF_PCI_CIAD);
904 if ((reg & VF_TRANS_PENDING_MASK) == 0)
905 return 0;
906 udelay(1);
907 }
908 return -EIO;
909}
910
5c3c48ac
JB		 911/**
912 * i40e_reset_vf
b40c82e6 913 * @vf: pointer to the VF structure
5c3c48ac
JB		 914 * @flr: VFLR was issued or not
915 *
b40c82e6 916 * reset the VF
5c3c48ac 917 **/
fc18eaa0 918void i40e_reset_vf(struct i40e_vf *vf, bool flr)
5c3c48ac 919{
5c3c48ac
JB		 920 struct i40e_pf *pf = vf->pf;
921 struct i40e_hw *hw = &pf->hw;
7e5a313e 922 u32 reg, reg_idx, bit_idx;
5c3c48ac 923 bool rsd = false;
fc18eaa0 924 int i;
5c3c48ac 925
3ba9bcb4
MW		 926 if (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
927 return;
928
5c3c48ac 929 /* warn the VF */
5c3c48ac
JB		 930 clear_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
931
fc18eaa0
MW		 932 /* In the case of a VFLR, the HW has already reset the VF and we
933 * just need to clean up, so don't hit the VFRTRIG register.
5c3c48ac
JB		 934 */
935 if (!flr) {
b40c82e6 936 /* reset VF using VPGEN_VFRTRIG reg */
fc18eaa0
MW		 937 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
938 reg |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
5c3c48ac
JB		 939 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
940 i40e_flush(hw);
941 }
7369ca87
MW		 942 /* clear the VFLR bit in GLGEN_VFLRSTAT */
943 reg_idx = (hw->func_caps.vf_base_id + vf->vf_id) / 32;
944 bit_idx = (hw->func_caps.vf_base_id + vf->vf_id) % 32;
945 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
30728c5b 946 i40e_flush(hw);
5c3c48ac 947
fc18eaa0
MW		 948 if (i40e_quiesce_vf_pci(vf))
949 dev_err(&pf->pdev->dev, "VF %d PCI transactions stuck\n",
950 vf->vf_id);
951
5c3c48ac
JB		 952 /* poll VPGEN_VFRSTAT reg to make sure
953 * that reset is complete
954 */
1750a22f
MW		 955 for (i = 0; i < 10; i++) {
956 /* VF reset requires driver to first reset the VF and then
957 * poll the status register to make sure that the reset
958 * completed successfully. Due to internal HW FIFO flushes,
959 * we must wait 10ms before the register will be valid.
5c3c48ac 960 */
1750a22f 961 usleep_range(10000, 20000);
5c3c48ac
JB		 962 reg = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_id));
963 if (reg & I40E_VPGEN_VFRSTAT_VFRD_MASK) {
964 rsd = true;
965 break;
966 }
967 }
968
57175ac1
ASJ		 969 if (flr)
970 usleep_range(10000, 20000);
971
5c3c48ac 972 if (!rsd)
fc18eaa0 973 dev_err(&pf->pdev->dev, "VF reset check timeout on VF %d\n",
5c3c48ac 974 vf->vf_id);
fc18eaa0 975 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_COMPLETED);
5c3c48ac
JB		 976 /* clear the reset bit in the VPGEN_VFRTRIG reg */
977 reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
978 reg &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
979 wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
fc18eaa0
MW		 980
981 /* On initial reset, we won't have any queues */
fdf0e0bf 982 if (vf->lan_vsi_idx == 0)
fc18eaa0
MW		 983 goto complete_reset;
984
fdf0e0bf 985 i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false);
fc18eaa0 986complete_reset:
b40c82e6 987 /* reallocate VF resources to reset the VSI state */
fc18eaa0 988 i40e_free_vf_res(vf);
21be99ec 989 if (!i40e_alloc_vf_res(vf)) {
e3219ce6 990 int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
21be99ec
MW		 991 i40e_enable_vf_mappings(vf);
992 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
993 clear_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
e3219ce6 994 i40e_notify_client_of_vf_reset(pf, abs_vf_id);
21be99ec 995 }
5c3c48ac 996 /* tell the VF the reset is done */
fc18eaa0 997 wr32(hw, I40E_VFGEN_RSTAT1(vf->vf_id), I40E_VFR_VFACTIVE);
7e5a313e 998
5c3c48ac 999 i40e_flush(hw);
3ba9bcb4 1000 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac 1001}
c354229f 1002
5c3c48ac
JB		 1003/**
1004 * i40e_free_vfs
b40c82e6 1005 * @pf: pointer to the PF structure
5c3c48ac 1006 *
b40c82e6 1007 * free VF resources
5c3c48ac
JB		 1008 **/
1009void i40e_free_vfs(struct i40e_pf *pf)
1010{
f7414531
MW		 1011 struct i40e_hw *hw = &pf->hw;
1012 u32 reg_idx, bit_idx;
1013 int i, tmp, vf_id;
5c3c48ac
JB		 1014
1015 if (!pf->vf)
1016 return;
3ba9bcb4
MW		 1017 while (test_and_set_bit(__I40E_VF_DISABLE, &pf->state))
1018 usleep_range(1000, 2000);
5c3c48ac 1019
e3219ce6 1020 i40e_notify_client_of_vf_enable(pf, 0);
0325fca7
MW		 1021 for (i = 0; i < pf->num_alloc_vfs; i++)
1022 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
1023 i40e_vsi_control_rings(pf->vsi[pf->vf[i].lan_vsi_idx],
1024 false);
44434638 1025
6a9ddb36
MW		 1026 /* Disable IOV before freeing resources. This lets any VF drivers
1027 * running in the host get themselves cleaned up before we yank
1028 * the carpet out from underneath their feet.
1029 */
1030 if (!pci_vfs_assigned(pf->pdev))
1031 pci_disable_sriov(pf->pdev);
6d7b967d
MW		 1032 else
1033 dev_warn(&pf->pdev->dev, "VFs are assigned - not disabling SR-IOV\n");
6a9ddb36
MW		 1034
1035 msleep(20); /* let any messages in transit get finished up */
1036
b40c82e6 1037 /* free up VF resources */
6c1b5bff
MW		 1038 tmp = pf->num_alloc_vfs;
1039 pf->num_alloc_vfs = 0;
1040 for (i = 0; i < tmp; i++) {
5c3c48ac
JB		 1041 if (test_bit(I40E_VF_STAT_INIT, &pf->vf[i].vf_states))
1042 i40e_free_vf_res(&pf->vf[i]);
1043 /* disable qp mappings */
1044 i40e_disable_vf_mappings(&pf->vf[i]);
1045 }
1046
1047 kfree(pf->vf);
1048 pf->vf = NULL;
5c3c48ac 1049
9e5634df
MW		 1050 /* This check is for when the driver is unloaded while VFs are
1051 * assigned. Setting the number of VFs to 0 through sysfs is caught
1052 * before this function ever gets called.
1053 */
c24817b6 1054 if (!pci_vfs_assigned(pf->pdev)) {
f7414531
MW		 1055 /* Acknowledge VFLR for all VFS. Without this, VFs will fail to
1056 * work correctly when SR-IOV gets re-enabled.
1057 */
1058 for (vf_id = 0; vf_id < tmp; vf_id++) {
1059 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
1060 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
41a1d04b 1061 wr32(hw, I40E_GLGEN_VFLRSTAT(reg_idx), BIT(bit_idx));
f7414531 1062 }
c354229f 1063 }
3ba9bcb4 1064 clear_bit(__I40E_VF_DISABLE, &pf->state);
5c3c48ac
JB		 1065}
1066
1067#ifdef CONFIG_PCI_IOV
1068/**
1069 * i40e_alloc_vfs
b40c82e6
JK		 1070 * @pf: pointer to the PF structure
1071 * @num_alloc_vfs: number of VFs to allocate
5c3c48ac 1072 *
b40c82e6 1073 * allocate VF resources
5c3c48ac 1074 **/
4aeec010 1075int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
5c3c48ac
JB		 1076{
1077 struct i40e_vf *vfs;
1078 int i, ret = 0;
1079
6c1b5bff 1080 /* Disable interrupt 0 so we don't try to handle the VFLR. */
2ef28cfb
MW		 1081 i40e_irq_dynamic_disable_icr0(pf);
1082
4aeec010
MW		 1083 /* Check to see if we're just allocating resources for extant VFs */
1084 if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
1085 ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
1086 if (ret) {
de445b3d 1087 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
4aeec010
MW		 1088 pf->num_alloc_vfs = 0;
1089 goto err_iov;
1090 }
5c3c48ac 1091 }
e3219ce6 1092 i40e_notify_client_of_vf_enable(pf, num_alloc_vfs);
5c3c48ac 1093 /* allocate memory */
cc6456af 1094 vfs = kcalloc(num_alloc_vfs, sizeof(struct i40e_vf), GFP_KERNEL);
5c3c48ac
JB		 1095 if (!vfs) {
1096 ret = -ENOMEM;
1097 goto err_alloc;
1098 }
c674d125 1099 pf->vf = vfs;
5c3c48ac
JB		 1100
1101 /* apply default profile */
1102 for (i = 0; i < num_alloc_vfs; i++) {
1103 vfs[i].pf = pf;
1104 vfs[i].parent_type = I40E_SWITCH_ELEMENT_TYPE_VEB;
1105 vfs[i].vf_id = i;
1106
1107 /* assign default capabilities */
1108 set_bit(I40E_VIRTCHNL_VF_CAP_L2, &vfs[i].vf_caps);
c674d125 1109 vfs[i].spoofchk = true;
b40c82e6 1110 /* VF resources get allocated during reset */
fc18eaa0 1111 i40e_reset_vf(&vfs[i], false);
5c3c48ac 1112
5c3c48ac 1113 }
5c3c48ac
JB		 1114 pf->num_alloc_vfs = num_alloc_vfs;
1115
1116err_alloc:
1117 if (ret)
1118 i40e_free_vfs(pf);
1119err_iov:
6c1b5bff 1120 /* Re-enable interrupt 0. */
40d72a50 1121 i40e_irq_dynamic_enable_icr0(pf, false);
5c3c48ac
JB		 1122 return ret;
1123}
1124
1125#endif
1126/**
1127 * i40e_pci_sriov_enable
1128 * @pdev: pointer to a pci_dev structure
b40c82e6 1129 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1130 *
1131 * Enable or change the number of VFs
1132 **/
1133static int i40e_pci_sriov_enable(struct pci_dev *pdev, int num_vfs)
1134{
1135#ifdef CONFIG_PCI_IOV
1136 struct i40e_pf *pf = pci_get_drvdata(pdev);
1137 int pre_existing_vfs = pci_num_vf(pdev);
1138 int err = 0;
1139
6995b36c 1140 if (test_bit(__I40E_TESTING, &pf->state)) {
e17bc411
GR		 1141 dev_warn(&pdev->dev,
1142 "Cannot enable SR-IOV virtual functions while the device is undergoing diagnostic testing\n");
1143 err = -EPERM;
1144 goto err_out;
1145 }
1146
5c3c48ac
JB		 1147 if (pre_existing_vfs && pre_existing_vfs != num_vfs)
1148 i40e_free_vfs(pf);
1149 else if (pre_existing_vfs && pre_existing_vfs == num_vfs)
1150 goto out;
1151
1152 if (num_vfs > pf->num_req_vfs) {
96c8d073
MW		 1153 dev_warn(&pdev->dev, "Unable to enable %d VFs. Limited to %d VFs due to device resource constraints.\n",
1154 num_vfs, pf->num_req_vfs);
5c3c48ac
JB		 1155 err = -EPERM;
1156 goto err_out;
1157 }
1158
96c8d073 1159 dev_info(&pdev->dev, "Allocating %d VFs.\n", num_vfs);
5c3c48ac
JB		 1160 err = i40e_alloc_vfs(pf, num_vfs);
1161 if (err) {
1162 dev_warn(&pdev->dev, "Failed to enable SR-IOV: %d\n", err);
1163 goto err_out;
1164 }
1165
1166out:
1167 return num_vfs;
1168
1169err_out:
1170 return err;
1171#endif
1172 return 0;
1173}
1174
1175/**
1176 * i40e_pci_sriov_configure
1177 * @pdev: pointer to a pci_dev structure
b40c82e6 1178 * @num_vfs: number of VFs to allocate
5c3c48ac
JB		 1179 *
1180 * Enable or change the number of VFs. Called when the user updates the number
1181 * of VFs in sysfs.
1182 **/
1183int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
1184{
1185 struct i40e_pf *pf = pci_get_drvdata(pdev);
1186
fc60861e
ASJ		 1187 if (num_vfs) {
1188 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
1189 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
1190 i40e_do_reset_safe(pf,
1191 BIT_ULL(__I40E_PF_RESET_REQUESTED));
1192 }
5c3c48ac 1193 return i40e_pci_sriov_enable(pdev, num_vfs);
fc60861e 1194 }
5c3c48ac 1195
c24817b6 1196 if (!pci_vfs_assigned(pf->pdev)) {
9e5634df 1197 i40e_free_vfs(pf);
fc60861e
ASJ		 1198 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
1199 i40e_do_reset_safe(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9e5634df
MW		 1200 } else {
1201 dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
1202 return -EINVAL;
1203 }
5c3c48ac
JB		 1204 return 0;
1205}
1206
1207/***********************virtual channel routines******************/
1208
1209/**
1210 * i40e_vc_send_msg_to_vf
b40c82e6 1211 * @vf: pointer to the VF info
5c3c48ac
JB		 1212 * @v_opcode: virtual channel opcode
1213 * @v_retval: virtual channel return value
1214 * @msg: pointer to the msg buffer
1215 * @msglen: msg length
1216 *
b40c82e6 1217 * send msg to VF
5c3c48ac
JB		 1218 **/
1219static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode,
1220 u32 v_retval, u8 *msg, u16 msglen)
1221{
6e7b5bd3
ASJ		 1222 struct i40e_pf *pf;
1223 struct i40e_hw *hw;
1224 int abs_vf_id;
5c3c48ac
JB		 1225 i40e_status aq_ret;
1226
6e7b5bd3
ASJ		 1227 /* validate the request */
1228 if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs)
1229 return -EINVAL;
1230
1231 pf = vf->pf;
1232 hw = &pf->hw;
1233 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
1234
5c3c48ac
JB		 1235 /* single place to detect unsuccessful return values */
1236 if (v_retval) {
1237 vf->num_invalid_msgs++;
18b7af57
MW		 1238 dev_info(&pf->pdev->dev, "VF %d failed opcode %d, retval: %d\n",
1239 vf->vf_id, v_opcode, v_retval);
5c3c48ac
JB		 1240 if (vf->num_invalid_msgs >
1241 I40E_DEFAULT_NUM_INVALID_MSGS_ALLOWED) {
1242 dev_err(&pf->pdev->dev,
1243 "Number of invalid messages exceeded for VF %d\n",
1244 vf->vf_id);
1245 dev_err(&pf->pdev->dev, "Use PF Control I/F to enable the VF\n");
1246 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
1247 }
1248 } else {
1249 vf->num_valid_msgs++;
5d38c93e
JW		 1250 /* reset the invalid counter, if a valid message is received. */
1251 vf->num_invalid_msgs = 0;
5c3c48ac
JB		 1252 }
1253
f19efbb5 1254 aq_ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval,
7efa84b7 1255 msg, msglen, NULL);
5c3c48ac 1256 if (aq_ret) {
18b7af57
MW		 1257 dev_info(&pf->pdev->dev,
1258 "Unable to send the message to VF %d aq_err %d\n",
1259 vf->vf_id, pf->hw.aq.asq_last_status);
5c3c48ac
JB		 1260 return -EIO;
1261 }
1262
1263 return 0;
1264}
1265
1266/**
1267 * i40e_vc_send_resp_to_vf
b40c82e6 1268 * @vf: pointer to the VF info
5c3c48ac
JB		 1269 * @opcode: operation code
1270 * @retval: return value
1271 *
b40c82e6 1272 * send resp msg to VF
5c3c48ac
JB		 1273 **/
1274static int i40e_vc_send_resp_to_vf(struct i40e_vf *vf,
1275 enum i40e_virtchnl_ops opcode,
1276 i40e_status retval)
1277{
1278 return i40e_vc_send_msg_to_vf(vf, opcode, retval, NULL, 0);
1279}
1280
1281/**
1282 * i40e_vc_get_version_msg
b40c82e6 1283 * @vf: pointer to the VF info
5c3c48ac 1284 *
b40c82e6 1285 * called from the VF to request the API version used by the PF
5c3c48ac 1286 **/
f4ca1a22 1287static int i40e_vc_get_version_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1288{
1289 struct i40e_virtchnl_version_info info = {
1290 I40E_VIRTCHNL_VERSION_MAJOR, I40E_VIRTCHNL_VERSION_MINOR
1291 };
1292
f4ca1a22 1293 vf->vf_ver = *(struct i40e_virtchnl_version_info *)msg;
606a5488
MW		 1294 /* VFs running the 1.0 API expect to get 1.0 back or they will cry. */
1295 if (VF_IS_V10(vf))
1296 info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
5c3c48ac
JB		 1297 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
1298 I40E_SUCCESS, (u8 *)&info,
1299 sizeof(struct
1300 i40e_virtchnl_version_info));
1301}
1302
1303/**
1304 * i40e_vc_get_vf_resources_msg
b40c82e6 1305 * @vf: pointer to the VF info
5c3c48ac
JB		 1306 * @msg: pointer to the msg buffer
1307 * @msglen: msg length
1308 *
b40c82e6 1309 * called from the VF to request its resources
5c3c48ac 1310 **/
f4ca1a22 1311static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
5c3c48ac
JB		 1312{
1313 struct i40e_virtchnl_vf_resource *vfres = NULL;
1314 struct i40e_pf *pf = vf->pf;
1315 i40e_status aq_ret = 0;
1316 struct i40e_vsi *vsi;
5c3c48ac 1317 int num_vsis = 1;
442b25e4 1318 int len = 0;
5c3c48ac
JB		 1319 int ret;
1320
1321 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
1322 aq_ret = I40E_ERR_PARAM;
1323 goto err;
1324 }
1325
1326 len = (sizeof(struct i40e_virtchnl_vf_resource) +
1327 sizeof(struct i40e_virtchnl_vsi_resource) * num_vsis);
1328
1329 vfres = kzalloc(len, GFP_KERNEL);
1330 if (!vfres) {
1331 aq_ret = I40E_ERR_NO_MEMORY;
1332 len = 0;
1333 goto err;
1334 }
f4ca1a22
MW		 1335 if (VF_IS_V11(vf))
1336 vf->driver_caps = *(u32 *)msg;
1337 else
1338 vf->driver_caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
1339 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
1340 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
5c3c48ac
JB		 1341
1342 vfres->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2;
fdf0e0bf 1343 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1344 if (!vsi->info.pvid)
e25d00b8 1345 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
e3219ce6
ASJ		 1346
1347 if (i40e_vf_client_capable(pf, vf->vf_id, I40E_CLIENT_IWARP) &&
1348 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_IWARP)) {
1349 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_IWARP;
1350 set_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states);
1351 }
1352
c4e1868c
MW		 1353 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF) {
1354 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RSS_PF;
e25d00b8 1355 } else {
c4e1868c
MW		 1356 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
1357 (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ))
1358 vfres->vf_offload_flags |=
1359 I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ;
1360 else
1361 vfres->vf_offload_flags |=
1362 I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG;
e25d00b8 1363 }
1f012279 1364
3d0da5b7
ASJ		 1365 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
1366 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
1367 vfres->vf_offload_flags |=
1368 I40E_VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
1369 }
1370
14c5f5d2
SN		 1371 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
1372 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
1373 dev_err(&pf->pdev->dev,
1374 "VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
1375 vf->vf_id);
1376 ret = I40E_ERR_PARAM;
1377 goto err;
1378 }
1f012279 1379 vfres->vf_offload_flags |= I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
14c5f5d2 1380 }
1f012279 1381
f6d83d13
ASJ		 1382 if (pf->flags & I40E_FLAG_WB_ON_ITR_CAPABLE) {
1383 if (vf->driver_caps & I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
1384 vfres->vf_offload_flags |=
1385 I40E_VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
1386 }
1387
5c3c48ac
JB		 1388 vfres->num_vsis = num_vsis;
1389 vfres->num_queue_pairs = vf->num_queue_pairs;
1390 vfres->max_vectors = pf->hw.func_caps.num_msix_vectors_vf;
c4e1868c
MW		 1391 vfres->rss_key_size = I40E_HKEY_ARRAY_SIZE;
1392 vfres->rss_lut_size = I40E_VF_HLUT_ARRAY_SIZE;
1393
fdf0e0bf 1394 if (vf->lan_vsi_idx) {
442b25e4
MW		 1395 vfres->vsi_res[0].vsi_id = vf->lan_vsi_id;
1396 vfres->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
1397 vfres->vsi_res[0].num_queue_pairs = vsi->alloc_queue_pairs;
f578f5f4 1398 /* VFs only use TC 0 */
442b25e4 1399 vfres->vsi_res[0].qset_handle
f578f5f4 1400 = le16_to_cpu(vsi->info.qs_handle[0]);
442b25e4 1401 ether_addr_copy(vfres->vsi_res[0].default_mac_addr,
6995b36c 1402 vf->default_lan_addr.addr);
5c3c48ac
JB		 1403 }
1404 set_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states);
1405
1406err:
b40c82e6 1407 /* send the response back to the VF */
5c3c48ac
JB		 1408 ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
1409 aq_ret, (u8 *)vfres, len);
1410
1411 kfree(vfres);
1412 return ret;
1413}
1414
1415/**
1416 * i40e_vc_reset_vf_msg
b40c82e6 1417 * @vf: pointer to the VF info
5c3c48ac
JB		 1418 * @msg: pointer to the msg buffer
1419 * @msglen: msg length
1420 *
b40c82e6
JK		 1421 * called from the VF to reset itself,
1422 * unlike other virtchnl messages, PF driver
1423 * doesn't send the response back to the VF
5c3c48ac 1424 **/
fc18eaa0 1425static void i40e_vc_reset_vf_msg(struct i40e_vf *vf)
5c3c48ac 1426{
fc18eaa0
MW		 1427 if (test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states))
1428 i40e_reset_vf(vf, false);
5c3c48ac
JB		 1429}
1430
5676a8b9
ASJ		 1431/**
1432 * i40e_getnum_vf_vsi_vlan_filters
1433 * @vsi: pointer to the vsi
1434 *
1435 * called to get the number of VLANs offloaded on this VF
1436 **/
1437static inline int i40e_getnum_vf_vsi_vlan_filters(struct i40e_vsi *vsi)
1438{
1439 struct i40e_mac_filter *f;
1440 int num_vlans = 0;
1441
1442 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1443 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID)
1444 num_vlans++;
1445 }
1446
1447 return num_vlans;
1448}
1449
5c3c48ac
JB		 1450/**
1451 * i40e_vc_config_promiscuous_mode_msg
b40c82e6 1452 * @vf: pointer to the VF info
5c3c48ac
JB		 1453 * @msg: pointer to the msg buffer
1454 * @msglen: msg length
1455 *
b40c82e6
JK		 1456 * called from the VF to configure the promiscuous mode of
1457 * VF vsis
5c3c48ac
JB		 1458 **/
1459static int i40e_vc_config_promiscuous_mode_msg(struct i40e_vf *vf,
1460 u8 *msg, u16 msglen)
1461{
1462 struct i40e_virtchnl_promisc_info *info =
1463 (struct i40e_virtchnl_promisc_info *)msg;
1464 struct i40e_pf *pf = vf->pf;
1465 struct i40e_hw *hw = &pf->hw;
5676a8b9
ASJ		 1466 struct i40e_mac_filter *f;
1467 i40e_status aq_ret = 0;
5c3c48ac 1468 bool allmulti = false;
5676a8b9
ASJ		 1469 struct i40e_vsi *vsi;
1470 bool alluni = false;
1471 int aq_err = 0;
5c3c48ac 1472
fdf0e0bf 1473 vsi = i40e_find_vsi_from_id(pf, info->vsi_id);
5c3c48ac 1474 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5676a8b9 1475 !i40e_vc_isvalid_vsi_id(vf, info->vsi_id)) {
eee4172a
MW		 1476 aq_ret = I40E_ERR_PARAM;
1477 goto error_param;
1478 }
1479 if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
5676a8b9 1480 dev_err(&pf->pdev->dev,
eee4172a 1481 "Unprivileged VF %d is attempting to configure promiscuous mode\n",
5676a8b9 1482 vf->vf_id);
eee4172a
MW		 1483 /* Lie to the VF on purpose. */
1484 aq_ret = 0;
5c3c48ac
JB		 1485 goto error_param;
1486 }
5676a8b9 1487 /* Multicast promiscuous handling*/
5c3c48ac
JB		 1488 if (info->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1489 allmulti = true;
5676a8b9
ASJ		 1490
1491 if (vf->port_vlan_id) {
1492 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw, vsi->seid,
1493 allmulti,
1494 vf->port_vlan_id,
1495 NULL);
1496 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1497 list_for_each_entry(f, &vsi->mac_filter_list, list) {
47d34839
ASJ		 1498 if (f->vlan < 0 || f->vlan > I40E_MAX_VLANID)
1499 continue;
1500 aq_ret = i40e_aq_set_vsi_mc_promisc_on_vlan(hw,
1501 vsi->seid,
1502 allmulti,
1503 f->vlan,
1504 NULL);
5676a8b9
ASJ		 1505 aq_err = pf->hw.aq.asq_last_status;
1506 if (aq_ret) {
1507 dev_err(&pf->pdev->dev,
1508 "Could not add VLAN %d to multicast promiscuous domain err %s aq_err %s\n",
1509 f->vlan,
1510 i40e_stat_str(&pf->hw, aq_ret),
1511 i40e_aq_str(&pf->hw, aq_err));
1512 break;
1513 }
1514 }
1515 } else {
1516 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vsi->seid,
1517 allmulti, NULL);
1518 aq_err = pf->hw.aq.asq_last_status;
1519 if (aq_ret) {
1520 dev_err(&pf->pdev->dev,
1521 "VF %d failed to set multicast promiscuous mode err %s aq_err %s\n",
1522 vf->vf_id,
1523 i40e_stat_str(&pf->hw, aq_ret),
1524 i40e_aq_str(&pf->hw, aq_err));
1525 goto error_param_int;
1526 }
1527 }
1528
1529 if (!aq_ret) {
1530 dev_info(&pf->pdev->dev,
1531 "VF %d successfully set multicast promiscuous mode\n",
1532 vf->vf_id);
1533 if (allmulti)
1534 set_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states);
1535 else
1536 clear_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states);
1537 }
1538
1539 if (info->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1540 alluni = true;
1541 if (vf->port_vlan_id) {
1542 aq_ret = i40e_aq_set_vsi_uc_promisc_on_vlan(hw, vsi->seid,
1543 alluni,
1544 vf->port_vlan_id,
1545 NULL);
1546 } else if (i40e_getnum_vf_vsi_vlan_filters(vsi)) {
1547 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1548 aq_ret = 0;
ce927db4 1549 if (f->vlan >= 0 && f->vlan <= I40E_MAX_VLANID) {
5676a8b9
ASJ		 1550 aq_ret =
1551 i40e_aq_set_vsi_uc_promisc_on_vlan(hw,
1552 vsi->seid,
1553 alluni,
1554 f->vlan,
1555 NULL);
1556 aq_err = pf->hw.aq.asq_last_status;
ce927db4 1557 }
5676a8b9
ASJ		 1558 if (aq_ret)
1559 dev_err(&pf->pdev->dev,
1560 "Could not add VLAN %d to Unicast promiscuous domain err %s aq_err %s\n",
1561 f->vlan,
1562 i40e_stat_str(&pf->hw, aq_ret),
1563 i40e_aq_str(&pf->hw, aq_err));
1564 }
1565 } else {
1566 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(hw, vsi->seid,
b5569892
ASJ		 1567 allmulti, NULL,
1568 true);
5676a8b9
ASJ		 1569 aq_err = pf->hw.aq.asq_last_status;
1570 if (aq_ret)
1571 dev_err(&pf->pdev->dev,
1572 "VF %d failed to set unicast promiscuous mode %8.8x err %s aq_err %s\n",
1573 vf->vf_id, info->flags,
1574 i40e_stat_str(&pf->hw, aq_ret),
1575 i40e_aq_str(&pf->hw, aq_err));
1576 }
1577
1578error_param_int:
1579 if (!aq_ret) {
1580 dev_info(&pf->pdev->dev,
1581 "VF %d successfully set unicast promiscuous mode\n",
1582 vf->vf_id);
1583 if (alluni)
1584 set_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states);
1585 else
1586 clear_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states);
1587 }
5c3c48ac
JB		 1588
1589error_param:
b40c82e6 1590 /* send the response to the VF */
5c3c48ac
JB		 1591 return i40e_vc_send_resp_to_vf(vf,
1592 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1593 aq_ret);
1594}
1595
1596/**
1597 * i40e_vc_config_queues_msg
b40c82e6 1598 * @vf: pointer to the VF info
5c3c48ac
JB		 1599 * @msg: pointer to the msg buffer
1600 * @msglen: msg length
1601 *
b40c82e6 1602 * called from the VF to configure the rx/tx
5c3c48ac
JB		 1603 * queues
1604 **/
1605static int i40e_vc_config_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1606{
1607 struct i40e_virtchnl_vsi_queue_config_info *qci =
1608 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
1609 struct i40e_virtchnl_queue_pair_info *qpi;
5f5e33b6 1610 struct i40e_pf *pf = vf->pf;
5c3c48ac
JB		 1611 u16 vsi_id, vsi_queue_id;
1612 i40e_status aq_ret = 0;
1613 int i;
1614
1615 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1616 aq_ret = I40E_ERR_PARAM;
1617 goto error_param;
1618 }
1619
1620 vsi_id = qci->vsi_id;
1621 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1622 aq_ret = I40E_ERR_PARAM;
1623 goto error_param;
1624 }
1625 for (i = 0; i < qci->num_queue_pairs; i++) {
1626 qpi = &qci->qpair[i];
1627 vsi_queue_id = qpi->txq.queue_id;
1628 if ((qpi->txq.vsi_id != vsi_id) ||
1629 (qpi->rxq.vsi_id != vsi_id) ||
1630 (qpi->rxq.queue_id != vsi_queue_id) ||
1631 !i40e_vc_isvalid_queue_id(vf, vsi_id, vsi_queue_id)) {
1632 aq_ret = I40E_ERR_PARAM;
1633 goto error_param;
1634 }
1635
1636 if (i40e_config_vsi_rx_queue(vf, vsi_id, vsi_queue_id,
1637 &qpi->rxq) ||
1638 i40e_config_vsi_tx_queue(vf, vsi_id, vsi_queue_id,
1639 &qpi->txq)) {
1640 aq_ret = I40E_ERR_PARAM;
1641 goto error_param;
1642 }
1643 }
b40c82e6 1644 /* set vsi num_queue_pairs in use to num configured by VF */
fdf0e0bf 1645 pf->vsi[vf->lan_vsi_idx]->num_queue_pairs = qci->num_queue_pairs;
5c3c48ac
JB		 1646
1647error_param:
b40c82e6 1648 /* send the response to the VF */
5c3c48ac
JB		 1649 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
1650 aq_ret);
1651}
1652
1653/**
1654 * i40e_vc_config_irq_map_msg
b40c82e6 1655 * @vf: pointer to the VF info
5c3c48ac
JB		 1656 * @msg: pointer to the msg buffer
1657 * @msglen: msg length
1658 *
b40c82e6 1659 * called from the VF to configure the irq to
5c3c48ac
JB		 1660 * queue map
1661 **/
1662static int i40e_vc_config_irq_map_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1663{
1664 struct i40e_virtchnl_irq_map_info *irqmap_info =
1665 (struct i40e_virtchnl_irq_map_info *)msg;
1666 struct i40e_virtchnl_vector_map *map;
1667 u16 vsi_id, vsi_queue_id, vector_id;
1668 i40e_status aq_ret = 0;
1669 unsigned long tempmap;
1670 int i;
1671
1672 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1673 aq_ret = I40E_ERR_PARAM;
1674 goto error_param;
1675 }
1676
1677 for (i = 0; i < irqmap_info->num_vectors; i++) {
1678 map = &irqmap_info->vecmap[i];
1679
1680 vector_id = map->vector_id;
1681 vsi_id = map->vsi_id;
1682 /* validate msg params */
1683 if (!i40e_vc_isvalid_vector_id(vf, vector_id) ||
1684 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1685 aq_ret = I40E_ERR_PARAM;
1686 goto error_param;
1687 }
1688
1689 /* lookout for the invalid queue index */
1690 tempmap = map->rxq_map;
4836650b 1691 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1692 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1693 vsi_queue_id)) {
1694 aq_ret = I40E_ERR_PARAM;
1695 goto error_param;
1696 }
5c3c48ac
JB		 1697 }
1698
1699 tempmap = map->txq_map;
4836650b 1700 for_each_set_bit(vsi_queue_id, &tempmap, I40E_MAX_VSI_QP) {
5c3c48ac
JB		 1701 if (!i40e_vc_isvalid_queue_id(vf, vsi_id,
1702 vsi_queue_id)) {
1703 aq_ret = I40E_ERR_PARAM;
1704 goto error_param;
1705 }
5c3c48ac
JB		 1706 }
1707
1708 i40e_config_irq_link_list(vf, vsi_id, map);
1709 }
1710error_param:
b40c82e6 1711 /* send the response to the VF */
5c3c48ac
JB		 1712 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
1713 aq_ret);
1714}
1715
1716/**
1717 * i40e_vc_enable_queues_msg
b40c82e6 1718 * @vf: pointer to the VF info
5c3c48ac
JB		 1719 * @msg: pointer to the msg buffer
1720 * @msglen: msg length
1721 *
b40c82e6 1722 * called from the VF to enable all or specific queue(s)
5c3c48ac
JB		 1723 **/
1724static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1725{
1726 struct i40e_virtchnl_queue_select *vqs =
1727 (struct i40e_virtchnl_queue_select *)msg;
1728 struct i40e_pf *pf = vf->pf;
1729 u16 vsi_id = vqs->vsi_id;
1730 i40e_status aq_ret = 0;
5c3c48ac
JB		 1731
1732 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1733 aq_ret = I40E_ERR_PARAM;
1734 goto error_param;
1735 }
1736
1737 if (!i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
1738 aq_ret = I40E_ERR_PARAM;
1739 goto error_param;
1740 }
1741
1742 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1743 aq_ret = I40E_ERR_PARAM;
1744 goto error_param;
1745 }
fdf0e0bf
ASJ		 1746
1747 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], true))
88f6563d 1748 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac 1749error_param:
b40c82e6 1750 /* send the response to the VF */
5c3c48ac
JB		 1751 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1752 aq_ret);
1753}
1754
1755/**
1756 * i40e_vc_disable_queues_msg
b40c82e6 1757 * @vf: pointer to the VF info
5c3c48ac
JB		 1758 * @msg: pointer to the msg buffer
1759 * @msglen: msg length
1760 *
b40c82e6 1761 * called from the VF to disable all or specific
5c3c48ac
JB		 1762 * queue(s)
1763 **/
1764static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1765{
1766 struct i40e_virtchnl_queue_select *vqs =
1767 (struct i40e_virtchnl_queue_select *)msg;
1768 struct i40e_pf *pf = vf->pf;
5c3c48ac 1769 i40e_status aq_ret = 0;
5c3c48ac
JB		 1770
1771 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1772 aq_ret = I40E_ERR_PARAM;
1773 goto error_param;
1774 }
1775
1776 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1777 aq_ret = I40E_ERR_PARAM;
1778 goto error_param;
1779 }
1780
1781 if ((0 == vqs->rx_queues) && (0 == vqs->tx_queues)) {
1782 aq_ret = I40E_ERR_PARAM;
1783 goto error_param;
1784 }
fdf0e0bf
ASJ		 1785
1786 if (i40e_vsi_control_rings(pf->vsi[vf->lan_vsi_idx], false))
88f6563d 1787 aq_ret = I40E_ERR_TIMEOUT;
5c3c48ac
JB		 1788
1789error_param:
b40c82e6 1790 /* send the response to the VF */
5c3c48ac
JB		 1791 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
1792 aq_ret);
1793}
1794
1795/**
1796 * i40e_vc_get_stats_msg
b40c82e6 1797 * @vf: pointer to the VF info
5c3c48ac
JB		 1798 * @msg: pointer to the msg buffer
1799 * @msglen: msg length
1800 *
b40c82e6 1801 * called from the VF to get vsi stats
5c3c48ac
JB		 1802 **/
1803static int i40e_vc_get_stats_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1804{
1805 struct i40e_virtchnl_queue_select *vqs =
1806 (struct i40e_virtchnl_queue_select *)msg;
1807 struct i40e_pf *pf = vf->pf;
1808 struct i40e_eth_stats stats;
1809 i40e_status aq_ret = 0;
1810 struct i40e_vsi *vsi;
1811
1812 memset(&stats, 0, sizeof(struct i40e_eth_stats));
1813
1814 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
1815 aq_ret = I40E_ERR_PARAM;
1816 goto error_param;
1817 }
1818
1819 if (!i40e_vc_isvalid_vsi_id(vf, vqs->vsi_id)) {
1820 aq_ret = I40E_ERR_PARAM;
1821 goto error_param;
1822 }
1823
fdf0e0bf 1824 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 1825 if (!vsi) {
1826 aq_ret = I40E_ERR_PARAM;
1827 goto error_param;
1828 }
1829 i40e_update_eth_stats(vsi);
5a9769c8 1830 stats = vsi->eth_stats;
5c3c48ac
JB		 1831
1832error_param:
b40c82e6 1833 /* send the response back to the VF */
5c3c48ac
JB		 1834 return i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS, aq_ret,
1835 (u8 *)&stats, sizeof(stats));
1836}
1837
5f527ba9
ASJ		 1838/* If the VF is not trusted restrict the number of MAC/VLAN it can program */
1839#define I40E_VC_MAX_MAC_ADDR_PER_VF 8
1840#define I40E_VC_MAX_VLAN_PER_VF 8
1841
f657a6e1
GR		 1842/**
1843 * i40e_check_vf_permission
b40c82e6 1844 * @vf: pointer to the VF info
f657a6e1
GR		 1845 * @macaddr: pointer to the MAC Address being checked
1846 *
1847 * Check if the VF has permission to add or delete unicast MAC address
1848 * filters and return error code -EPERM if not. Then check if the
1849 * address filter requested is broadcast or zero and if so return
1850 * an invalid MAC address error code.
1851 **/
1852static inline int i40e_check_vf_permission(struct i40e_vf *vf, u8 *macaddr)
1853{
1854 struct i40e_pf *pf = vf->pf;
1855 int ret = 0;
1856
1857 if (is_broadcast_ether_addr(macaddr) ||
1858 is_zero_ether_addr(macaddr)) {
1859 dev_err(&pf->pdev->dev, "invalid VF MAC addr %pM\n", macaddr);
1860 ret = I40E_ERR_INVALID_MAC_ADDR;
5017c2a8 1861 } else if (vf->pf_set_mac && !is_multicast_ether_addr(macaddr) &&
692fb0a7 1862 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps) &&
5017c2a8 1863 !ether_addr_equal(macaddr, vf->default_lan_addr.addr)) {
f657a6e1
GR		 1864 /* If the host VMM administrator has set the VF MAC address
1865 * administratively via the ndo_set_vf_mac command then deny
1866 * permission to the VF to add or delete unicast MAC addresses.
692fb0a7 1867 * Unless the VF is privileged and then it can do whatever.
5017c2a8
GR		 1868 * The VF may request to set the MAC address filter already
1869 * assigned to it so do not return an error in that case.
f657a6e1
GR		 1870 */
1871 dev_err(&pf->pdev->dev,
692fb0a7 1872 "VF attempting to override administratively set MAC address, reload the VF driver to resume normal operation\n");
f657a6e1 1873 ret = -EPERM;
5f527ba9
ASJ		 1874 } else if ((vf->num_mac >= I40E_VC_MAX_MAC_ADDR_PER_VF) &&
1875 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
1876 dev_err(&pf->pdev->dev,
1877 "VF is not trusted, switch the VF to trusted to add more functionality\n");
1878 ret = -EPERM;
f657a6e1
GR		 1879 }
1880 return ret;
1881}
1882
5c3c48ac
JB		 1883/**
1884 * i40e_vc_add_mac_addr_msg
b40c82e6 1885 * @vf: pointer to the VF info
5c3c48ac
JB		 1886 * @msg: pointer to the msg buffer
1887 * @msglen: msg length
1888 *
1889 * add guest mac address filter
1890 **/
1891static int i40e_vc_add_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1892{
1893 struct i40e_virtchnl_ether_addr_list *al =
1894 (struct i40e_virtchnl_ether_addr_list *)msg;
1895 struct i40e_pf *pf = vf->pf;
1896 struct i40e_vsi *vsi = NULL;
1897 u16 vsi_id = al->vsi_id;
f657a6e1 1898 i40e_status ret = 0;
5c3c48ac
JB		 1899 int i;
1900
1901 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac 1902 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1903 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1904 goto error_param;
1905 }
1906
1907 for (i = 0; i < al->num_elements; i++) {
f657a6e1
GR		 1908 ret = i40e_check_vf_permission(vf, al->list[i].addr);
1909 if (ret)
5c3c48ac 1910 goto error_param;
5c3c48ac 1911 }
fdf0e0bf 1912 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1913
21659035
KP		 1914 /* Lock once, because all function inside for loop accesses VSI's
1915 * MAC filter list which needs to be protected using same lock.
1916 */
1917 spin_lock_bh(&vsi->mac_filter_list_lock);
1918
5c3c48ac
JB		 1919 /* add new addresses to the list */
1920 for (i = 0; i < al->num_elements; i++) {
1921 struct i40e_mac_filter *f;
1922
1923 f = i40e_find_mac(vsi, al->list[i].addr, true, false);
7e68edf9 1924 if (!f) {
5c3c48ac
JB		 1925 if (i40e_is_vsi_in_vlan(vsi))
1926 f = i40e_put_mac_in_vlan(vsi, al->list[i].addr,
1927 true, false);
1928 else
1929 f = i40e_add_filter(vsi, al->list[i].addr, -1,
1930 true, false);
1931 }
1932
1933 if (!f) {
1934 dev_err(&pf->pdev->dev,
8d8f2295
MW		 1935 "Unable to add MAC filter %pM for VF %d\n",
1936 al->list[i].addr, vf->vf_id);
f657a6e1 1937 ret = I40E_ERR_PARAM;
21659035 1938 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac 1939 goto error_param;
5f527ba9
ASJ		 1940 } else {
1941 vf->num_mac++;
5c3c48ac
JB		 1942 }
1943 }
21659035 1944 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1945
1946 /* program the updated filter list */
ea02e90b
MW		 1947 ret = i40e_sync_vsi_filters(vsi);
1948 if (ret)
1949 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
1950 vf->vf_id, ret);
5c3c48ac
JB		 1951
1952error_param:
b40c82e6 1953 /* send the response to the VF */
5c3c48ac 1954 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
f657a6e1 1955 ret);
5c3c48ac
JB		 1956}
1957
1958/**
1959 * i40e_vc_del_mac_addr_msg
b40c82e6 1960 * @vf: pointer to the VF info
5c3c48ac
JB		 1961 * @msg: pointer to the msg buffer
1962 * @msglen: msg length
1963 *
1964 * remove guest mac address filter
1965 **/
1966static int i40e_vc_del_mac_addr_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
1967{
1968 struct i40e_virtchnl_ether_addr_list *al =
1969 (struct i40e_virtchnl_ether_addr_list *)msg;
1970 struct i40e_pf *pf = vf->pf;
1971 struct i40e_vsi *vsi = NULL;
1972 u16 vsi_id = al->vsi_id;
f657a6e1 1973 i40e_status ret = 0;
5c3c48ac
JB		 1974 int i;
1975
1976 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac 1977 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
f657a6e1 1978 ret = I40E_ERR_PARAM;
5c3c48ac
JB		 1979 goto error_param;
1980 }
f657a6e1
GR		 1981
1982 for (i = 0; i < al->num_elements; i++) {
700bbf6c
MW		 1983 if (is_broadcast_ether_addr(al->list[i].addr) ||
1984 is_zero_ether_addr(al->list[i].addr)) {
8d8f2295
MW		 1985 dev_err(&pf->pdev->dev, "Invalid MAC addr %pM for VF %d\n",
1986 al->list[i].addr, vf->vf_id);
700bbf6c 1987 ret = I40E_ERR_INVALID_MAC_ADDR;
f657a6e1 1988 goto error_param;
700bbf6c 1989 }
f657a6e1 1990 }
fdf0e0bf 1991 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 1992
21659035 1993 spin_lock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 1994 /* delete addresses from the list */
1995 for (i = 0; i < al->num_elements; i++)
b36e9ab5
MW		 1996 if (i40e_del_mac_all_vlan(vsi, al->list[i].addr, true, false)) {
1997 ret = I40E_ERR_INVALID_MAC_ADDR;
1998 spin_unlock_bh(&vsi->mac_filter_list_lock);
1999 goto error_param;
5f527ba9
ASJ		 2000 } else {
2001 vf->num_mac--;
b36e9ab5
MW		 2002 }
2003
21659035 2004 spin_unlock_bh(&vsi->mac_filter_list_lock);
5c3c48ac
JB		 2005
2006 /* program the updated filter list */
ea02e90b
MW		 2007 ret = i40e_sync_vsi_filters(vsi);
2008 if (ret)
2009 dev_err(&pf->pdev->dev, "Unable to program VF %d MAC filters, error %d\n",
2010 vf->vf_id, ret);
5c3c48ac
JB		 2011
2012error_param:
b40c82e6 2013 /* send the response to the VF */
5c3c48ac 2014 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
f657a6e1 2015 ret);
5c3c48ac
JB		 2016}
2017
2018/**
2019 * i40e_vc_add_vlan_msg
b40c82e6 2020 * @vf: pointer to the VF info
5c3c48ac
JB		 2021 * @msg: pointer to the msg buffer
2022 * @msglen: msg length
2023 *
2024 * program guest vlan id
2025 **/
2026static int i40e_vc_add_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2027{
2028 struct i40e_virtchnl_vlan_filter_list *vfl =
2029 (struct i40e_virtchnl_vlan_filter_list *)msg;
2030 struct i40e_pf *pf = vf->pf;
2031 struct i40e_vsi *vsi = NULL;
2032 u16 vsi_id = vfl->vsi_id;
2033 i40e_status aq_ret = 0;
2034 int i;
2035
5f527ba9
ASJ		 2036 if ((vf->num_vlan >= I40E_VC_MAX_VLAN_PER_VF) &&
2037 !test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2038 dev_err(&pf->pdev->dev,
2039 "VF is not trusted, switch the VF to trusted to add more VLAN addresses\n");
2040 goto error_param;
2041 }
5c3c48ac 2042 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2043 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2044 aq_ret = I40E_ERR_PARAM;
2045 goto error_param;
2046 }
2047
2048 for (i = 0; i < vfl->num_elements; i++) {
2049 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2050 aq_ret = I40E_ERR_PARAM;
2051 dev_err(&pf->pdev->dev,
2052 "invalid VF VLAN id %d\n", vfl->vlan_id[i]);
2053 goto error_param;
2054 }
2055 }
fdf0e0bf 2056 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2057 if (vsi->info.pvid) {
2058 aq_ret = I40E_ERR_PARAM;
2059 goto error_param;
2060 }
2061
2062 i40e_vlan_stripping_enable(vsi);
2063 for (i = 0; i < vfl->num_elements; i++) {
2064 /* add new VLAN filter */
2065 int ret = i40e_vsi_add_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2066 if (!ret)
2067 vf->num_vlan++;
6995b36c 2068
5676a8b9
ASJ		 2069 if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states))
2070 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2071 true,
2072 vfl->vlan_id[i],
2073 NULL);
2074 if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states))
2075 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2076 true,
2077 vfl->vlan_id[i],
2078 NULL);
2079
5c3c48ac
JB		 2080 if (ret)
2081 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2082 "Unable to add VLAN filter %d for VF %d, error %d\n",
2083 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2084 }
2085
2086error_param:
b40c82e6 2087 /* send the response to the VF */
5c3c48ac
JB		 2088 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN, aq_ret);
2089}
2090
2091/**
2092 * i40e_vc_remove_vlan_msg
b40c82e6 2093 * @vf: pointer to the VF info
5c3c48ac
JB		 2094 * @msg: pointer to the msg buffer
2095 * @msglen: msg length
2096 *
2097 * remove programmed guest vlan id
2098 **/
2099static int i40e_vc_remove_vlan_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2100{
2101 struct i40e_virtchnl_vlan_filter_list *vfl =
2102 (struct i40e_virtchnl_vlan_filter_list *)msg;
2103 struct i40e_pf *pf = vf->pf;
2104 struct i40e_vsi *vsi = NULL;
2105 u16 vsi_id = vfl->vsi_id;
2106 i40e_status aq_ret = 0;
2107 int i;
2108
2109 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
5c3c48ac
JB		 2110 !i40e_vc_isvalid_vsi_id(vf, vsi_id)) {
2111 aq_ret = I40E_ERR_PARAM;
2112 goto error_param;
2113 }
2114
2115 for (i = 0; i < vfl->num_elements; i++) {
2116 if (vfl->vlan_id[i] > I40E_MAX_VLANID) {
2117 aq_ret = I40E_ERR_PARAM;
2118 goto error_param;
2119 }
2120 }
2121
fdf0e0bf 2122 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac
JB		 2123 if (vsi->info.pvid) {
2124 aq_ret = I40E_ERR_PARAM;
2125 goto error_param;
2126 }
2127
2128 for (i = 0; i < vfl->num_elements; i++) {
2129 int ret = i40e_vsi_kill_vlan(vsi, vfl->vlan_id[i]);
5f527ba9
ASJ		 2130 if (!ret)
2131 vf->num_vlan--;
6995b36c 2132
5676a8b9
ASJ		 2133 if (test_bit(I40E_VF_STAT_UC_PROMISC, &vf->vf_states))
2134 i40e_aq_set_vsi_uc_promisc_on_vlan(&pf->hw, vsi->seid,
2135 false,
2136 vfl->vlan_id[i],
2137 NULL);
2138 if (test_bit(I40E_VF_STAT_MC_PROMISC, &vf->vf_states))
2139 i40e_aq_set_vsi_mc_promisc_on_vlan(&pf->hw, vsi->seid,
2140 false,
2141 vfl->vlan_id[i],
2142 NULL);
2143
5c3c48ac
JB		 2144 if (ret)
2145 dev_err(&pf->pdev->dev,
8d8f2295
MW		 2146 "Unable to delete VLAN filter %d for VF %d, error %d\n",
2147 vfl->vlan_id[i], vf->vf_id, ret);
5c3c48ac
JB		 2148 }
2149
2150error_param:
b40c82e6 2151 /* send the response to the VF */
5c3c48ac
JB		 2152 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN, aq_ret);
2153}
2154
e3219ce6
ASJ		 2155/**
2156 * i40e_vc_iwarp_msg
2157 * @vf: pointer to the VF info
2158 * @msg: pointer to the msg buffer
2159 * @msglen: msg length
2160 *
2161 * called from the VF for the iwarp msgs
2162 **/
2163static int i40e_vc_iwarp_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
2164{
2165 struct i40e_pf *pf = vf->pf;
2166 int abs_vf_id = vf->vf_id + pf->hw.func_caps.vf_base_id;
2167 i40e_status aq_ret = 0;
2168
2169 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
2170 !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
2171 aq_ret = I40E_ERR_PARAM;
2172 goto error_param;
2173 }
2174
2175 i40e_notify_client_of_vf_msg(pf->vsi[pf->lan_vsi], abs_vf_id,
2176 msg, msglen);
2177
2178error_param:
2179 /* send the response to the VF */
2180 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_IWARP,
2181 aq_ret);
2182}
2183
2184/**
2185 * i40e_vc_iwarp_qvmap_msg
2186 * @vf: pointer to the VF info
2187 * @msg: pointer to the msg buffer
2188 * @msglen: msg length
2189 * @config: config qvmap or release it
2190 *
2191 * called from the VF for the iwarp msgs
2192 **/
2193static int i40e_vc_iwarp_qvmap_msg(struct i40e_vf *vf, u8 *msg, u16 msglen,
2194 bool config)
2195{
2196 struct i40e_virtchnl_iwarp_qvlist_info *qvlist_info =
2197 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2198 i40e_status aq_ret = 0;
2199
2200 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
2201 !test_bit(I40E_VF_STAT_IWARPENA, &vf->vf_states)) {
2202 aq_ret = I40E_ERR_PARAM;
2203 goto error_param;
2204 }
2205
2206 if (config) {
2207 if (i40e_config_iwarp_qvlist(vf, qvlist_info))
2208 aq_ret = I40E_ERR_PARAM;
2209 } else {
2210 i40e_release_iwarp_qvlist(vf);
2211 }
2212
2213error_param:
2214 /* send the response to the VF */
2215 return i40e_vc_send_resp_to_vf(vf,
2216 config ? I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP :
2217 I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP,
2218 aq_ret);
2219}
2220
c4e1868c
MW		 2221/**
2222 * i40e_vc_config_rss_key
2223 * @vf: pointer to the VF info
2224 * @msg: pointer to the msg buffer
2225 * @msglen: msg length
2226 *
2227 * Configure the VF's RSS key
2228 **/
2229static int i40e_vc_config_rss_key(struct i40e_vf *vf, u8 *msg, u16 msglen)
2230{
2231 struct i40e_virtchnl_rss_key *vrk =
2232 (struct i40e_virtchnl_rss_key *)msg;
2233 struct i40e_pf *pf = vf->pf;
2234 struct i40e_vsi *vsi = NULL;
2235 u16 vsi_id = vrk->vsi_id;
2236 i40e_status aq_ret = 0;
2237
2238 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2239 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2240 (vrk->key_len != I40E_HKEY_ARRAY_SIZE)) {
2241 aq_ret = I40E_ERR_PARAM;
2242 goto err;
2243 }
2244
2245 vsi = pf->vsi[vf->lan_vsi_idx];
2246 aq_ret = i40e_config_rss(vsi, vrk->key, NULL, 0);
2247err:
2248 /* send the response to the VF */
2249 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_KEY,
2250 aq_ret);
2251}
2252
2253/**
2254 * i40e_vc_config_rss_lut
2255 * @vf: pointer to the VF info
2256 * @msg: pointer to the msg buffer
2257 * @msglen: msg length
2258 *
2259 * Configure the VF's RSS LUT
2260 **/
2261static int i40e_vc_config_rss_lut(struct i40e_vf *vf, u8 *msg, u16 msglen)
2262{
2263 struct i40e_virtchnl_rss_lut *vrl =
2264 (struct i40e_virtchnl_rss_lut *)msg;
2265 struct i40e_pf *pf = vf->pf;
2266 struct i40e_vsi *vsi = NULL;
2267 u16 vsi_id = vrl->vsi_id;
2268 i40e_status aq_ret = 0;
2269
2270 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states) ||
c4e1868c
MW		 2271 !i40e_vc_isvalid_vsi_id(vf, vsi_id) ||
2272 (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE)) {
2273 aq_ret = I40E_ERR_PARAM;
2274 goto err;
2275 }
2276
2277 vsi = pf->vsi[vf->lan_vsi_idx];
2278 aq_ret = i40e_config_rss(vsi, NULL, vrl->lut, I40E_VF_HLUT_ARRAY_SIZE);
2279 /* send the response to the VF */
2280err:
2281 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_RSS_LUT,
2282 aq_ret);
2283}
2284
2285/**
2286 * i40e_vc_get_rss_hena
2287 * @vf: pointer to the VF info
2288 * @msg: pointer to the msg buffer
2289 * @msglen: msg length
2290 *
2291 * Return the RSS HENA bits allowed by the hardware
2292 **/
2293static int i40e_vc_get_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2294{
2295 struct i40e_virtchnl_rss_hena *vrh = NULL;
2296 struct i40e_pf *pf = vf->pf;
2297 i40e_status aq_ret = 0;
2298 int len = 0;
2299
692fb0a7 2300 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2301 aq_ret = I40E_ERR_PARAM;
2302 goto err;
2303 }
2304 len = sizeof(struct i40e_virtchnl_rss_hena);
2305
2306 vrh = kzalloc(len, GFP_KERNEL);
2307 if (!vrh) {
2308 aq_ret = I40E_ERR_NO_MEMORY;
2309 len = 0;
2310 goto err;
2311 }
2312 vrh->hena = i40e_pf_get_default_rss_hena(pf);
2313err:
2314 /* send the response back to the VF */
2315 aq_ret = i40e_vc_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS,
2316 aq_ret, (u8 *)vrh, len);
2317 return aq_ret;
2318}
2319
2320/**
2321 * i40e_vc_set_rss_hena
2322 * @vf: pointer to the VF info
2323 * @msg: pointer to the msg buffer
2324 * @msglen: msg length
2325 *
2326 * Set the RSS HENA bits for the VF
2327 **/
2328static int i40e_vc_set_rss_hena(struct i40e_vf *vf, u8 *msg, u16 msglen)
2329{
2330 struct i40e_virtchnl_rss_hena *vrh =
2331 (struct i40e_virtchnl_rss_hena *)msg;
2332 struct i40e_pf *pf = vf->pf;
2333 struct i40e_hw *hw = &pf->hw;
2334 i40e_status aq_ret = 0;
2335
692fb0a7 2336 if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
c4e1868c
MW		 2337 aq_ret = I40E_ERR_PARAM;
2338 goto err;
2339 }
2340 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena);
2341 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(1, vf->vf_id),
2342 (u32)(vrh->hena >> 32));
2343
2344 /* send the response to the VF */
2345err:
2346 return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_SET_RSS_HENA,
2347 aq_ret);
2348}
2349
5c3c48ac
JB		 2350/**
2351 * i40e_vc_validate_vf_msg
b40c82e6 2352 * @vf: pointer to the VF info
5c3c48ac
JB		 2353 * @msg: pointer to the msg buffer
2354 * @msglen: msg length
2355 * @msghndl: msg handle
2356 *
2357 * validate msg
2358 **/
2359static int i40e_vc_validate_vf_msg(struct i40e_vf *vf, u32 v_opcode,
2360 u32 v_retval, u8 *msg, u16 msglen)
2361{
2362 bool err_msg_format = false;
3ed439c5 2363 int valid_len = 0;
5c3c48ac
JB		 2364
2365 /* Check if VF is disabled. */
2366 if (test_bit(I40E_VF_STAT_DISABLED, &vf->vf_states))
2367 return I40E_ERR_PARAM;
2368
2369 /* Validate message length. */
2370 switch (v_opcode) {
2371 case I40E_VIRTCHNL_OP_VERSION:
2372 valid_len = sizeof(struct i40e_virtchnl_version_info);
2373 break;
2374 case I40E_VIRTCHNL_OP_RESET_VF:
5c3c48ac 2375 break;
f4ca1a22
MW		 2376 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
2377 if (VF_IS_V11(vf))
2378 valid_len = sizeof(u32);
f4ca1a22 2379 break;
5c3c48ac
JB		 2380 case I40E_VIRTCHNL_OP_CONFIG_TX_QUEUE:
2381 valid_len = sizeof(struct i40e_virtchnl_txq_info);
2382 break;
2383 case I40E_VIRTCHNL_OP_CONFIG_RX_QUEUE:
2384 valid_len = sizeof(struct i40e_virtchnl_rxq_info);
2385 break;
2386 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2387 valid_len = sizeof(struct i40e_virtchnl_vsi_queue_config_info);
2388 if (msglen >= valid_len) {
2389 struct i40e_virtchnl_vsi_queue_config_info *vqc =
2390 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
2391 valid_len += (vqc->num_queue_pairs *
2392 sizeof(struct
2393 i40e_virtchnl_queue_pair_info));
2394 if (vqc->num_queue_pairs == 0)
2395 err_msg_format = true;
2396 }
2397 break;
2398 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2399 valid_len = sizeof(struct i40e_virtchnl_irq_map_info);
2400 if (msglen >= valid_len) {
2401 struct i40e_virtchnl_irq_map_info *vimi =
2402 (struct i40e_virtchnl_irq_map_info *)msg;
2403 valid_len += (vimi->num_vectors *
2404 sizeof(struct i40e_virtchnl_vector_map));
2405 if (vimi->num_vectors == 0)
2406 err_msg_format = true;
2407 }
2408 break;
2409 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2410 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2411 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2412 break;
2413 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2414 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2415 valid_len = sizeof(struct i40e_virtchnl_ether_addr_list);
2416 if (msglen >= valid_len) {
2417 struct i40e_virtchnl_ether_addr_list *veal =
2418 (struct i40e_virtchnl_ether_addr_list *)msg;
2419 valid_len += veal->num_elements *
2420 sizeof(struct i40e_virtchnl_ether_addr);
2421 if (veal->num_elements == 0)
2422 err_msg_format = true;
2423 }
2424 break;
2425 case I40E_VIRTCHNL_OP_ADD_VLAN:
2426 case I40E_VIRTCHNL_OP_DEL_VLAN:
2427 valid_len = sizeof(struct i40e_virtchnl_vlan_filter_list);
2428 if (msglen >= valid_len) {
2429 struct i40e_virtchnl_vlan_filter_list *vfl =
2430 (struct i40e_virtchnl_vlan_filter_list *)msg;
2431 valid_len += vfl->num_elements * sizeof(u16);
2432 if (vfl->num_elements == 0)
2433 err_msg_format = true;
2434 }
2435 break;
2436 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2437 valid_len = sizeof(struct i40e_virtchnl_promisc_info);
2438 break;
2439 case I40E_VIRTCHNL_OP_GET_STATS:
2440 valid_len = sizeof(struct i40e_virtchnl_queue_select);
2441 break;
e3219ce6
ASJ		 2442 case I40E_VIRTCHNL_OP_IWARP:
2443 /* These messages are opaque to us and will be validated in
2444 * the RDMA client code. We just need to check for nonzero
2445 * length. The firmware will enforce max length restrictions.
2446 */
2447 if (msglen)
2448 valid_len = msglen;
2449 else
2450 err_msg_format = true;
2451 break;
2452 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2453 valid_len = 0;
2454 break;
2455 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2456 valid_len = sizeof(struct i40e_virtchnl_iwarp_qvlist_info);
2457 if (msglen >= valid_len) {
2458 struct i40e_virtchnl_iwarp_qvlist_info *qv =
2459 (struct i40e_virtchnl_iwarp_qvlist_info *)msg;
2460 if (qv->num_vectors == 0) {
2461 err_msg_format = true;
2462 break;
2463 }
2464 valid_len += ((qv->num_vectors - 1) *
2465 sizeof(struct i40e_virtchnl_iwarp_qv_info));
2466 }
2467 break;
c4e1868c
MW		 2468 case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
2469 valid_len = sizeof(struct i40e_virtchnl_rss_key);
2470 if (msglen >= valid_len) {
2471 struct i40e_virtchnl_rss_key *vrk =
2472 (struct i40e_virtchnl_rss_key *)msg;
2473 if (vrk->key_len != I40E_HKEY_ARRAY_SIZE) {
2474 err_msg_format = true;
2475 break;
2476 }
2477 valid_len += vrk->key_len - 1;
2478 }
2479 break;
2480 case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
2481 valid_len = sizeof(struct i40e_virtchnl_rss_lut);
2482 if (msglen >= valid_len) {
2483 struct i40e_virtchnl_rss_lut *vrl =
2484 (struct i40e_virtchnl_rss_lut *)msg;
2485 if (vrl->lut_entries != I40E_VF_HLUT_ARRAY_SIZE) {
2486 err_msg_format = true;
2487 break;
2488 }
2489 valid_len += vrl->lut_entries - 1;
2490 }
2491 break;
2492 case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
c4e1868c
MW		 2493 break;
2494 case I40E_VIRTCHNL_OP_SET_RSS_HENA:
2495 valid_len = sizeof(struct i40e_virtchnl_rss_hena);
2496 break;
5c3c48ac
JB		 2497 /* These are always errors coming from the VF. */
2498 case I40E_VIRTCHNL_OP_EVENT:
2499 case I40E_VIRTCHNL_OP_UNKNOWN:
2500 default:
2501 return -EPERM;
5c3c48ac
JB		 2502 }
2503 /* few more checks */
2504 if ((valid_len != msglen) || (err_msg_format)) {
2505 i40e_vc_send_resp_to_vf(vf, v_opcode, I40E_ERR_PARAM);
2506 return -EINVAL;
2507 } else {
2508 return 0;
2509 }
2510}
2511
2512/**
2513 * i40e_vc_process_vf_msg
b40c82e6
JK		 2514 * @pf: pointer to the PF structure
2515 * @vf_id: source VF id
5c3c48ac
JB		 2516 * @msg: pointer to the msg buffer
2517 * @msglen: msg length
2518 * @msghndl: msg handle
2519 *
2520 * called from the common aeq/arq handler to
b40c82e6 2521 * process request from VF
5c3c48ac 2522 **/
a1b5a24f 2523int i40e_vc_process_vf_msg(struct i40e_pf *pf, s16 vf_id, u32 v_opcode,
5c3c48ac
JB		 2524 u32 v_retval, u8 *msg, u16 msglen)
2525{
5c3c48ac 2526 struct i40e_hw *hw = &pf->hw;
a1b5a24f 2527 int local_vf_id = vf_id - (s16)hw->func_caps.vf_base_id;
6c1b5bff 2528 struct i40e_vf *vf;
5c3c48ac
JB		 2529 int ret;
2530
2531 pf->vf_aq_requests++;
7efa84b7 2532 if (local_vf_id >= pf->num_alloc_vfs)
6c1b5bff 2533 return -EINVAL;
7efa84b7 2534 vf = &(pf->vf[local_vf_id]);
5c3c48ac
JB		 2535 /* perform basic checks on the msg */
2536 ret = i40e_vc_validate_vf_msg(vf, v_opcode, v_retval, msg, msglen);
2537
2538 if (ret) {
b40c82e6 2539 dev_err(&pf->pdev->dev, "Invalid message from VF %d, opcode %d, len %d\n",
7efa84b7 2540 local_vf_id, v_opcode, msglen);
5c3c48ac
JB		 2541 return ret;
2542 }
bae3cae4 2543
5c3c48ac
JB		 2544 switch (v_opcode) {
2545 case I40E_VIRTCHNL_OP_VERSION:
f4ca1a22 2546 ret = i40e_vc_get_version_msg(vf, msg);
5c3c48ac
JB		 2547 break;
2548 case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
f4ca1a22 2549 ret = i40e_vc_get_vf_resources_msg(vf, msg);
5c3c48ac
JB		 2550 break;
2551 case I40E_VIRTCHNL_OP_RESET_VF:
fc18eaa0
MW		 2552 i40e_vc_reset_vf_msg(vf);
2553 ret = 0;
5c3c48ac
JB		 2554 break;
2555 case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
2556 ret = i40e_vc_config_promiscuous_mode_msg(vf, msg, msglen);
2557 break;
2558 case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
2559 ret = i40e_vc_config_queues_msg(vf, msg, msglen);
2560 break;
2561 case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
2562 ret = i40e_vc_config_irq_map_msg(vf, msg, msglen);
2563 break;
2564 case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
2565 ret = i40e_vc_enable_queues_msg(vf, msg, msglen);
055b295d 2566 i40e_vc_notify_vf_link_state(vf);
5c3c48ac
JB		 2567 break;
2568 case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
2569 ret = i40e_vc_disable_queues_msg(vf, msg, msglen);
2570 break;
2571 case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
2572 ret = i40e_vc_add_mac_addr_msg(vf, msg, msglen);
2573 break;
2574 case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
2575 ret = i40e_vc_del_mac_addr_msg(vf, msg, msglen);
2576 break;
2577 case I40E_VIRTCHNL_OP_ADD_VLAN:
2578 ret = i40e_vc_add_vlan_msg(vf, msg, msglen);
2579 break;
2580 case I40E_VIRTCHNL_OP_DEL_VLAN:
2581 ret = i40e_vc_remove_vlan_msg(vf, msg, msglen);
2582 break;
2583 case I40E_VIRTCHNL_OP_GET_STATS:
2584 ret = i40e_vc_get_stats_msg(vf, msg, msglen);
2585 break;
e3219ce6
ASJ		 2586 case I40E_VIRTCHNL_OP_IWARP:
2587 ret = i40e_vc_iwarp_msg(vf, msg, msglen);
2588 break;
2589 case I40E_VIRTCHNL_OP_CONFIG_IWARP_IRQ_MAP:
2590 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, true);
2591 break;
2592 case I40E_VIRTCHNL_OP_RELEASE_IWARP_IRQ_MAP:
2593 ret = i40e_vc_iwarp_qvmap_msg(vf, msg, msglen, false);
2594 break;
c4e1868c
MW		 2595 case I40E_VIRTCHNL_OP_CONFIG_RSS_KEY:
2596 ret = i40e_vc_config_rss_key(vf, msg, msglen);
2597 break;
2598 case I40E_VIRTCHNL_OP_CONFIG_RSS_LUT:
2599 ret = i40e_vc_config_rss_lut(vf, msg, msglen);
2600 break;
2601 case I40E_VIRTCHNL_OP_GET_RSS_HENA_CAPS:
2602 ret = i40e_vc_get_rss_hena(vf, msg, msglen);
2603 break;
2604 case I40E_VIRTCHNL_OP_SET_RSS_HENA:
2605 ret = i40e_vc_set_rss_hena(vf, msg, msglen);
2606 break;
2607
5c3c48ac
JB		 2608 case I40E_VIRTCHNL_OP_UNKNOWN:
2609 default:
b40c82e6 2610 dev_err(&pf->pdev->dev, "Unsupported opcode %d from VF %d\n",
7efa84b7 2611 v_opcode, local_vf_id);
5c3c48ac
JB		 2612 ret = i40e_vc_send_resp_to_vf(vf, v_opcode,
2613 I40E_ERR_NOT_IMPLEMENTED);
2614 break;
2615 }
2616
2617 return ret;
2618}
2619
2620/**
2621 * i40e_vc_process_vflr_event
b40c82e6 2622 * @pf: pointer to the PF structure
5c3c48ac
JB		 2623 *
2624 * called from the vlfr irq handler to
b40c82e6 2625 * free up VF resources and state variables
5c3c48ac
JB		 2626 **/
2627int i40e_vc_process_vflr_event(struct i40e_pf *pf)
2628{
5c3c48ac 2629 struct i40e_hw *hw = &pf->hw;
a1b5a24f 2630 u32 reg, reg_idx, bit_idx;
5c3c48ac 2631 struct i40e_vf *vf;
a1b5a24f 2632 int vf_id;
5c3c48ac
JB		 2633
2634 if (!test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
2635 return 0;
2636
0d790327
MW		 2637 /* Re-enable the VFLR interrupt cause here, before looking for which
2638 * VF got reset. Otherwise, if another VF gets a reset while the
2639 * first one is being processed, that interrupt will be lost, and
2640 * that VF will be stuck in reset forever.
2641 */
c5c2f7c3
MW		 2642 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
2643 reg |= I40E_PFINT_ICR0_ENA_VFLR_MASK;
2644 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
2645 i40e_flush(hw);
2646
5c3c48ac
JB		 2647 clear_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2648 for (vf_id = 0; vf_id < pf->num_alloc_vfs; vf_id++) {
2649 reg_idx = (hw->func_caps.vf_base_id + vf_id) / 32;
2650 bit_idx = (hw->func_caps.vf_base_id + vf_id) % 32;
b40c82e6 2651 /* read GLGEN_VFLRSTAT register to find out the flr VFs */
5c3c48ac
JB		 2652 vf = &pf->vf[vf_id];
2653 reg = rd32(hw, I40E_GLGEN_VFLRSTAT(reg_idx));
7369ca87 2654 if (reg & BIT(bit_idx))
7e5a313e 2655 /* i40e_reset_vf will clear the bit in GLGEN_VFLRSTAT */
7369ca87 2656 i40e_reset_vf(vf, true);
5c3c48ac
JB		 2657 }
2658
5c3c48ac
JB		 2659 return 0;
2660}
2661
5c3c48ac
JB		 2662/**
2663 * i40e_ndo_set_vf_mac
2664 * @netdev: network interface device structure
b40c82e6 2665 * @vf_id: VF identifier
5c3c48ac
JB		 2666 * @mac: mac address
2667 *
b40c82e6 2668 * program VF mac address
5c3c48ac
JB		 2669 **/
2670int i40e_ndo_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2671{
2672 struct i40e_netdev_priv *np = netdev_priv(netdev);
2673 struct i40e_vsi *vsi = np->vsi;
2674 struct i40e_pf *pf = vsi->back;
2675 struct i40e_mac_filter *f;
2676 struct i40e_vf *vf;
2677 int ret = 0;
2678
2679 /* validate the request */
2680 if (vf_id >= pf->num_alloc_vfs) {
2681 dev_err(&pf->pdev->dev,
2682 "Invalid VF Identifier %d\n", vf_id);
2683 ret = -EINVAL;
2684 goto error_param;
2685 }
2686
2687 vf = &(pf->vf[vf_id]);
fdf0e0bf 2688 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2689 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2690 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2691 vf_id);
2692 ret = -EAGAIN;
5c3c48ac
JB		 2693 goto error_param;
2694 }
2695
efd8e39a 2696 if (is_multicast_ether_addr(mac)) {
5c3c48ac 2697 dev_err(&pf->pdev->dev,
efd8e39a 2698 "Invalid Ethernet address %pM for VF %d\n", mac, vf_id);
5c3c48ac
JB		 2699 ret = -EINVAL;
2700 goto error_param;
2701 }
2702
21659035
KP		 2703 /* Lock once because below invoked function add/del_filter requires
2704 * mac_filter_list_lock to be held
2705 */
2706 spin_lock_bh(&vsi->mac_filter_list_lock);
2707
5c3c48ac 2708 /* delete the temporary mac address */
efd8e39a
MW		 2709 if (!is_zero_ether_addr(vf->default_lan_addr.addr))
2710 i40e_del_filter(vsi, vf->default_lan_addr.addr,
2711 vf->port_vlan_id ? vf->port_vlan_id : -1,
2712 true, false);
5c3c48ac 2713
29f71bb0
GR		 2714 /* Delete all the filters for this VSI - we're going to kill it
2715 * anyway.
2716 */
2717 list_for_each_entry(f, &vsi->mac_filter_list, list)
2718 i40e_del_filter(vsi, f->macaddr, f->vlan, true, false);
5c3c48ac 2719
21659035
KP		 2720 spin_unlock_bh(&vsi->mac_filter_list_lock);
2721
5c3c48ac
JB		 2722 dev_info(&pf->pdev->dev, "Setting MAC %pM on VF %d\n", mac, vf_id);
2723 /* program mac filter */
17652c63 2724 if (i40e_sync_vsi_filters(vsi)) {
5c3c48ac
JB		 2725 dev_err(&pf->pdev->dev, "Unable to program ucast filters\n");
2726 ret = -EIO;
2727 goto error_param;
2728 }
9a173901 2729 ether_addr_copy(vf->default_lan_addr.addr, mac);
f657a6e1 2730 vf->pf_set_mac = true;
17413a80
GR		 2731 /* Force the VF driver stop so it has to reload with new MAC address */
2732 i40e_vc_disable_vf(pf, vf);
5c3c48ac 2733 dev_info(&pf->pdev->dev, "Reload the VF driver to make this change effective.\n");
5c3c48ac
JB		 2734
2735error_param:
2736 return ret;
2737}
2738
2739/**
2740 * i40e_ndo_set_vf_port_vlan
2741 * @netdev: network interface device structure
b40c82e6 2742 * @vf_id: VF identifier
5c3c48ac
JB		 2743 * @vlan_id: mac address
2744 * @qos: priority setting
2745 *
b40c82e6 2746 * program VF vlan id and/or qos
5c3c48ac
JB		 2747 **/
2748int i40e_ndo_set_vf_port_vlan(struct net_device *netdev,
2749 int vf_id, u16 vlan_id, u8 qos)
2750{
f7fc2f2e 2751 u16 vlanprio = vlan_id | (qos << I40E_VLAN_PRIORITY_SHIFT);
5c3c48ac
JB		 2752 struct i40e_netdev_priv *np = netdev_priv(netdev);
2753 struct i40e_pf *pf = np->vsi->back;
21659035 2754 bool is_vsi_in_vlan = false;
5c3c48ac
JB		 2755 struct i40e_vsi *vsi;
2756 struct i40e_vf *vf;
2757 int ret = 0;
2758
2759 /* validate the request */
2760 if (vf_id >= pf->num_alloc_vfs) {
2761 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2762 ret = -EINVAL;
2763 goto error_pvid;
2764 }
2765
2766 if ((vlan_id > I40E_MAX_VLANID) || (qos > 7)) {
2767 dev_err(&pf->pdev->dev, "Invalid VF Parameters\n");
2768 ret = -EINVAL;
2769 goto error_pvid;
2770 }
2771
2772 vf = &(pf->vf[vf_id]);
fdf0e0bf 2773 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2774 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2775 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2776 vf_id);
2777 ret = -EAGAIN;
5c3c48ac
JB		 2778 goto error_pvid;
2779 }
2780
f7fc2f2e 2781 if (le16_to_cpu(vsi->info.pvid) == vlanprio)
85927ec1
MW		 2782 /* duplicate request, so just return success */
2783 goto error_pvid;
2784
21659035
KP		 2785 spin_lock_bh(&vsi->mac_filter_list_lock);
2786 is_vsi_in_vlan = i40e_is_vsi_in_vlan(vsi);
2787 spin_unlock_bh(&vsi->mac_filter_list_lock);
2788
2789 if (le16_to_cpu(vsi->info.pvid) == 0 && is_vsi_in_vlan) {
99a4973c
GR		 2790 dev_err(&pf->pdev->dev,
2791 "VF %d has already configured VLAN filters and the administrator is requesting a port VLAN override.\nPlease unload and reload the VF driver for this change to take effect.\n",
2792 vf_id);
f9b4b627
GR		 2793 /* Administrator Error - knock the VF offline until he does
2794 * the right thing by reconfiguring his network correctly
2795 * and then reloading the VF driver.
2796 */
2797 i40e_vc_disable_vf(pf, vf);
35f3472a
MW		 2798 /* During reset the VF got a new VSI, so refresh the pointer. */
2799 vsi = pf->vsi[vf->lan_vsi_idx];
f9b4b627 2800 }
99a4973c 2801
8d82a7c5
GR		 2802 /* Check for condition where there was already a port VLAN ID
2803 * filter set and now it is being deleted by setting it to zero.
1315f7c3
GR		 2804 * Additionally check for the condition where there was a port
2805 * VLAN but now there is a new and different port VLAN being set.
8d82a7c5
GR		 2806 * Before deleting all the old VLAN filters we must add new ones
2807 * with -1 (I40E_VLAN_ANY) or otherwise we're left with all our
2808 * MAC addresses deleted.
2809 */
1315f7c3 2810 if ((!(vlan_id || qos) ||
f7fc2f2e 2811 vlanprio != le16_to_cpu(vsi->info.pvid)) &&
1315f7c3 2812 vsi->info.pvid)
8d82a7c5
GR		 2813 ret = i40e_vsi_add_vlan(vsi, I40E_VLAN_ANY);
2814
5c3c48ac
JB		 2815 if (vsi->info.pvid) {
2816 /* kill old VLAN */
2817 ret = i40e_vsi_kill_vlan(vsi, (le16_to_cpu(vsi->info.pvid) &
2818 VLAN_VID_MASK));
2819 if (ret) {
2820 dev_info(&vsi->back->pdev->dev,
2821 "remove VLAN failed, ret=%d, aq_err=%d\n",
2822 ret, pf->hw.aq.asq_last_status);
2823 }
2824 }
2825 if (vlan_id || qos)
f7fc2f2e 2826 ret = i40e_vsi_add_pvid(vsi, vlanprio);
5c3c48ac 2827 else
6c12fcbf 2828 i40e_vsi_remove_pvid(vsi);
5c3c48ac
JB		 2829
2830 if (vlan_id) {
2831 dev_info(&pf->pdev->dev, "Setting VLAN %d, QOS 0x%x on VF %d\n",
2832 vlan_id, qos, vf_id);
2833
2834 /* add new VLAN filter */
2835 ret = i40e_vsi_add_vlan(vsi, vlan_id);
2836 if (ret) {
2837 dev_info(&vsi->back->pdev->dev,
2838 "add VF VLAN failed, ret=%d aq_err=%d\n", ret,
2839 vsi->back->hw.aq.asq_last_status);
2840 goto error_pvid;
2841 }
8d82a7c5
GR		 2842 /* Kill non-vlan MAC filters - ignore error return since
2843 * there might not be any non-vlan MAC filters.
2844 */
2845 i40e_vsi_kill_vlan(vsi, I40E_VLAN_ANY);
5c3c48ac
JB		 2846 }
2847
2848 if (ret) {
2849 dev_err(&pf->pdev->dev, "Unable to update VF vsi context\n");
2850 goto error_pvid;
2851 }
6c12fcbf
GR		 2852 /* The Port VLAN needs to be saved across resets the same as the
2853 * default LAN MAC address.
2854 */
2855 vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
5c3c48ac
JB		 2856 ret = 0;
2857
2858error_pvid:
2859 return ret;
2860}
2861
84590fd9
MW		 2862#define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
2863#define I40E_MAX_BW_INACTIVE_ACCUM 4 /* device can accumulate 4 credits max */
5c3c48ac
JB		 2864/**
2865 * i40e_ndo_set_vf_bw
2866 * @netdev: network interface device structure
b40c82e6
JK		 2867 * @vf_id: VF identifier
2868 * @tx_rate: Tx rate
5c3c48ac 2869 *
b40c82e6 2870 * configure VF Tx rate
5c3c48ac 2871 **/
ed616689
SC		 2872int i40e_ndo_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
2873 int max_tx_rate)
5c3c48ac 2874{
6b192891
MW		 2875 struct i40e_netdev_priv *np = netdev_priv(netdev);
2876 struct i40e_pf *pf = np->vsi->back;
2877 struct i40e_vsi *vsi;
2878 struct i40e_vf *vf;
2879 int speed = 0;
2880 int ret = 0;
2881
2882 /* validate the request */
2883 if (vf_id >= pf->num_alloc_vfs) {
2884 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d.\n", vf_id);
2885 ret = -EINVAL;
2886 goto error;
2887 }
2888
ed616689 2889 if (min_tx_rate) {
b40c82e6 2890 dev_err(&pf->pdev->dev, "Invalid min tx rate (%d) (greater than 0) specified for VF %d.\n",
ed616689
SC		 2891 min_tx_rate, vf_id);
2892 return -EINVAL;
2893 }
2894
6b192891 2895 vf = &(pf->vf[vf_id]);
fdf0e0bf 2896 vsi = pf->vsi[vf->lan_vsi_idx];
6b192891 2897 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2898 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2899 vf_id);
2900 ret = -EAGAIN;
6b192891
MW		 2901 goto error;
2902 }
2903
2904 switch (pf->hw.phy.link_info.link_speed) {
2905 case I40E_LINK_SPEED_40GB:
2906 speed = 40000;
2907 break;
07f169c3
MW		 2908 case I40E_LINK_SPEED_20GB:
2909 speed = 20000;
2910 break;
6b192891
MW		 2911 case I40E_LINK_SPEED_10GB:
2912 speed = 10000;
2913 break;
2914 case I40E_LINK_SPEED_1GB:
2915 speed = 1000;
2916 break;
2917 default:
2918 break;
2919 }
2920
ed616689 2921 if (max_tx_rate > speed) {
b40c82e6 2922 dev_err(&pf->pdev->dev, "Invalid max tx rate %d specified for VF %d.",
ed616689 2923 max_tx_rate, vf->vf_id);
6b192891
MW		 2924 ret = -EINVAL;
2925 goto error;
2926 }
2927
dac9b31a
MW		 2928 if ((max_tx_rate < 50) && (max_tx_rate > 0)) {
2929 dev_warn(&pf->pdev->dev, "Setting max Tx rate to minimum usable value of 50Mbps.\n");
2930 max_tx_rate = 50;
2931 }
2932
6b192891 2933 /* Tx rate credits are in values of 50Mbps, 0 is disabled*/
84590fd9
MW		 2934 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, vsi->seid,
2935 max_tx_rate / I40E_BW_CREDIT_DIVISOR,
2936 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
6b192891 2937 if (ret) {
ed616689 2938 dev_err(&pf->pdev->dev, "Unable to set max tx rate, error code %d.\n",
6b192891
MW		 2939 ret);
2940 ret = -EIO;
2941 goto error;
2942 }
ed616689 2943 vf->tx_rate = max_tx_rate;
6b192891
MW		 2944error:
2945 return ret;
5c3c48ac
JB		 2946}
2947
2948/**
2949 * i40e_ndo_get_vf_config
2950 * @netdev: network interface device structure
b40c82e6
JK		 2951 * @vf_id: VF identifier
2952 * @ivi: VF configuration structure
5c3c48ac 2953 *
b40c82e6 2954 * return VF configuration
5c3c48ac
JB		 2955 **/
2956int i40e_ndo_get_vf_config(struct net_device *netdev,
2957 int vf_id, struct ifla_vf_info *ivi)
2958{
2959 struct i40e_netdev_priv *np = netdev_priv(netdev);
5c3c48ac
JB		 2960 struct i40e_vsi *vsi = np->vsi;
2961 struct i40e_pf *pf = vsi->back;
2962 struct i40e_vf *vf;
2963 int ret = 0;
2964
2965 /* validate the request */
2966 if (vf_id >= pf->num_alloc_vfs) {
2967 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
2968 ret = -EINVAL;
2969 goto error_param;
2970 }
2971
2972 vf = &(pf->vf[vf_id]);
2973 /* first vsi is always the LAN vsi */
fdf0e0bf 2974 vsi = pf->vsi[vf->lan_vsi_idx];
5c3c48ac 2975 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
2d166c30
MW		 2976 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
2977 vf_id);
2978 ret = -EAGAIN;
5c3c48ac
JB		 2979 goto error_param;
2980 }
2981
2982 ivi->vf = vf_id;
2983
6995b36c 2984 ether_addr_copy(ivi->mac, vf->default_lan_addr.addr);
5c3c48ac 2985
ed616689
SC		 2986 ivi->max_tx_rate = vf->tx_rate;
2987 ivi->min_tx_rate = 0;
5c3c48ac
JB		 2988 ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
2989 ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
2990 I40E_VLAN_PRIORITY_SHIFT;
84ca55a0
MW		 2991 if (vf->link_forced == false)
2992 ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
2993 else if (vf->link_up == true)
2994 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
2995 else
2996 ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
c674d125 2997 ivi->spoofchk = vf->spoofchk;
5c3c48ac
JB		 2998 ret = 0;
2999
3000error_param:
3001 return ret;
3002}
588aefa0
MW		 3003
3004/**
3005 * i40e_ndo_set_vf_link_state
3006 * @netdev: network interface device structure
b40c82e6 3007 * @vf_id: VF identifier
588aefa0
MW		 3008 * @link: required link state
3009 *
3010 * Set the link state of a specified VF, regardless of physical link state
3011 **/
3012int i40e_ndo_set_vf_link_state(struct net_device *netdev, int vf_id, int link)
3013{
3014 struct i40e_netdev_priv *np = netdev_priv(netdev);
3015 struct i40e_pf *pf = np->vsi->back;
3016 struct i40e_virtchnl_pf_event pfe;
3017 struct i40e_hw *hw = &pf->hw;
3018 struct i40e_vf *vf;
f19efbb5 3019 int abs_vf_id;
588aefa0
MW		 3020 int ret = 0;
3021
3022 /* validate the request */
3023 if (vf_id >= pf->num_alloc_vfs) {
3024 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3025 ret = -EINVAL;
3026 goto error_out;
3027 }
3028
3029 vf = &pf->vf[vf_id];
f19efbb5 3030 abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;
588aefa0
MW		 3031
3032 pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
3033 pfe.severity = I40E_PF_EVENT_SEVERITY_INFO;
3034
3035 switch (link) {
3036 case IFLA_VF_LINK_STATE_AUTO:
3037 vf->link_forced = false;
3038 pfe.event_data.link_event.link_status =
3039 pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP;
3040 pfe.event_data.link_event.link_speed =
3041 pf->hw.phy.link_info.link_speed;
3042 break;
3043 case IFLA_VF_LINK_STATE_ENABLE:
3044 vf->link_forced = true;
3045 vf->link_up = true;
3046 pfe.event_data.link_event.link_status = true;
3047 pfe.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
3048 break;
3049 case IFLA_VF_LINK_STATE_DISABLE:
3050 vf->link_forced = true;
3051 vf->link_up = false;
3052 pfe.event_data.link_event.link_status = false;
3053 pfe.event_data.link_event.link_speed = 0;
3054 break;
3055 default:
3056 ret = -EINVAL;
3057 goto error_out;
3058 }
3059 /* Notify the VF of its new link state */
f19efbb5 3060 i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT,
588aefa0
MW		 3061 0, (u8 *)&pfe, sizeof(pfe), NULL);
3062
3063error_out:
3064 return ret;
3065}
c674d125
MW		 3066
3067/**
3068 * i40e_ndo_set_vf_spoofchk
3069 * @netdev: network interface device structure
b40c82e6 3070 * @vf_id: VF identifier
c674d125
MW		 3071 * @enable: flag to enable or disable feature
3072 *
3073 * Enable or disable VF spoof checking
3074 **/
e6d9004d 3075int i40e_ndo_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool enable)
c674d125
MW		 3076{
3077 struct i40e_netdev_priv *np = netdev_priv(netdev);
3078 struct i40e_vsi *vsi = np->vsi;
3079 struct i40e_pf *pf = vsi->back;
3080 struct i40e_vsi_context ctxt;
3081 struct i40e_hw *hw = &pf->hw;
3082 struct i40e_vf *vf;
3083 int ret = 0;
3084
3085 /* validate the request */
3086 if (vf_id >= pf->num_alloc_vfs) {
3087 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3088 ret = -EINVAL;
3089 goto out;
3090 }
3091
3092 vf = &(pf->vf[vf_id]);
2d166c30
MW		 3093 if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states)) {
3094 dev_err(&pf->pdev->dev, "VF %d still in reset. Try again.\n",
3095 vf_id);
3096 ret = -EAGAIN;
3097 goto out;
3098 }
c674d125
MW		 3099
3100 if (enable == vf->spoofchk)
3101 goto out;
3102
3103 vf->spoofchk = enable;
3104 memset(&ctxt, 0, sizeof(ctxt));
fdf0e0bf 3105 ctxt.seid = pf->vsi[vf->lan_vsi_idx]->seid;
c674d125
MW		 3106 ctxt.pf_num = pf->hw.pf_id;
3107 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
3108 if (enable)
30d71af5
GR		 3109 ctxt.info.sec_flags |= (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
3110 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
c674d125
MW		 3111 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
3112 if (ret) {
3113 dev_err(&pf->pdev->dev, "Error %d updating VSI parameters\n",
3114 ret);
3115 ret = -EIO;
3116 }
3117out:
3118 return ret;
3119}
c3bbbd20
ASJ		 3120
3121/**
3122 * i40e_ndo_set_vf_trust
3123 * @netdev: network interface device structure of the pf
3124 * @vf_id: VF identifier
3125 * @setting: trust setting
3126 *
3127 * Enable or disable VF trust setting
3128 **/
3129int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
3130{
3131 struct i40e_netdev_priv *np = netdev_priv(netdev);
3132 struct i40e_pf *pf = np->vsi->back;
3133 struct i40e_vf *vf;
3134 int ret = 0;
3135
3136 /* validate the request */
3137 if (vf_id >= pf->num_alloc_vfs) {
3138 dev_err(&pf->pdev->dev, "Invalid VF Identifier %d\n", vf_id);
3139 return -EINVAL;
3140 }
3141
3142 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3143 dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
3144 return -EINVAL;
3145 }
3146
3147 vf = &pf->vf[vf_id];
3148
3149 if (!vf)
3150 return -EINVAL;
3151 if (setting == vf->trusted)
3152 goto out;
3153
3154 vf->trusted = setting;
3155 i40e_vc_notify_vf_reset(vf);
3156 i40e_reset_vf(vf, false);
3157 dev_info(&pf->pdev->dev, "VF %u is now %strusted\n",
3158 vf_id, setting ? "" : "un");
3159out:
3160 return ret;
3161}
Linux kernel - Deliverables
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