[deliverable/linux.git] / drivers / net / ethernet / intel / i40evf / i40evf.h

/*******************************************************************************
 *
 * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
 * Copyright(c) 2013 - 2014 Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along
 * with this program.  If not, see <http://www.gnu.org/licenses/>.
 *
 * The full GNU General Public License is included in this distribution in
 * the file called "COPYING".
 *
 * Contact Information:
 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 ******************************************************************************/

#ifndef _I40EVF_H_
#define _I40EVF_H_

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/aer.h>
#include <linux/netdevice.h>
#include <linux/vmalloc.h>
#include <linux/interrupt.h>
#include <linux/ethtool.h>
#include <linux/if_vlan.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/sctp.h>
#include <linux/ipv6.h>
#include <net/ip6_checksum.h>
#include <net/udp.h>

#include "i40e_type.h"
#include "i40e_virtchnl.h"
#include "i40e_txrx.h"

#define DEFAULT_DEBUG_LEVEL_SHIFT 3
#define PFX "i40evf: "

/* dummy struct to make common code less painful */
struct i40e_vsi {
	struct i40evf_adapter *back;
	struct net_device *netdev;
	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
	u16 seid;
	u16 id;
	unsigned long state;
	int base_vector;
	u16 work_limit;
	/* high bit set means dynamic, use accessor routines to read/write.
	 * hardware only supports 2us resolution for the ITR registers.
	 * these values always store the USER setting, and must be converted
	 * before programming to a register.
	 */
	u16 rx_itr_setting;
	u16 tx_itr_setting;
	u16 qs_handle;
	u8 *rss_hkey_user; /* User configured hash keys */
	u8 *rss_lut_user;  /* User configured lookup table entries */
};

/* How many Rx Buffers do we bundle into one write to the hardware ? */
#define I40EVF_RX_BUFFER_WRITE	16	/* Must be power of 2 */
#define I40EVF_DEFAULT_TXD   512
#define I40EVF_DEFAULT_RXD   512
#define I40EVF_MAX_TXD       4096
#define I40EVF_MIN_TXD       64
#define I40EVF_MAX_RXD       4096
#define I40EVF_MIN_RXD       64
#define I40EVF_REQ_DESCRIPTOR_MULTIPLE  32

/* Supported Rx Buffer Sizes */
#define I40EVF_RXBUFFER_64    64     /* Used for packet split */
#define I40EVF_RXBUFFER_128   128    /* Used for packet split */
#define I40EVF_RXBUFFER_256   256    /* Used for packet split */
#define I40EVF_RXBUFFER_2048  2048
#define I40EVF_MAX_RXBUFFER   16384  /* largest size for single descriptor */
#define I40EVF_MAX_AQ_BUF_SIZE    4096
#define I40EVF_AQ_LEN             32
#define I40EVF_AQ_MAX_ERR         20 /* times to try before resetting AQ */

#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)

#define I40E_RX_DESC(R, i) (&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))
#define I40E_TX_DESC(R, i) (&(((struct i40e_tx_desc *)((R)->desc))[i]))
#define I40E_TX_CTXTDESC(R, i) \
	(&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
#define MAX_RX_QUEUES 8
#define MAX_TX_QUEUES MAX_RX_QUEUES

#define I40EVF_HKEY_ARRAY_SIZE ((I40E_VFQF_HKEY_MAX_INDEX + 1) * 4)
#define I40EVF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT_MAX_INDEX + 1) * 4)

/* MAX_MSIX_Q_VECTORS of these are allocated,
 * but we only use one per queue-specific vector.
 */
struct i40e_q_vector {
	struct i40evf_adapter *adapter;
	struct i40e_vsi *vsi;
	struct napi_struct napi;
	unsigned long reg_idx;
	struct i40e_ring_container rx;
	struct i40e_ring_container tx;
	u32 ring_mask;
	u8 num_ringpairs;	/* total number of ring pairs in vector */
#define ITR_COUNTDOWN_START 100
	u8 itr_countdown;	/* when 0 or 1 update ITR */
	int v_idx;	  /* vector index in list */
	char name[IFNAMSIZ + 9];
	bool arm_wb_state;
	cpumask_var_t affinity_mask;
};

/* Helper macros to switch between ints/sec and what the register uses.
 * And yes, it's the same math going both ways.  The lowest value
 * supported by all of the i40e hardware is 8.
 */
#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
	((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG

#define I40EVF_DESC_UNUSED(R) \
	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
	(R)->next_to_clean - (R)->next_to_use - 1)

#define I40EVF_RX_DESC_ADV(R, i)	    \
	(&(((union i40e_adv_rx_desc *)((R).desc))[i]))
#define I40EVF_TX_DESC_ADV(R, i)	    \
	(&(((union i40e_adv_tx_desc *)((R).desc))[i]))
#define I40EVF_TX_CTXTDESC_ADV(R, i)	    \
	(&(((struct i40e_adv_tx_context_desc *)((R).desc))[i]))

#define OTHER_VECTOR 1
#define NONQ_VECS (OTHER_VECTOR)

#define MAX_MSIX_Q_VECTORS 4
#define MAX_MSIX_COUNT 5

#define MIN_MSIX_Q_VECTORS 1
#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NONQ_VECS)

#define I40EVF_QUEUE_END_OF_LIST 0x7FF
#define I40EVF_FREE_VECTOR 0x7FFF
struct i40evf_mac_filter {
	struct list_head list;
	u8 macaddr[ETH_ALEN];
	bool remove;		/* filter needs to be removed */
	bool add;		/* filter needs to be added */
};

struct i40evf_vlan_filter {
	struct list_head list;
	u16 vlan;
	bool remove;		/* filter needs to be removed */
	bool add;		/* filter needs to be added */
};

/* Driver state. The order of these is important! */
enum i40evf_state_t {
	__I40EVF_STARTUP,		/* driver loaded, probe complete */
	__I40EVF_REMOVE,		/* driver is being unloaded */
	__I40EVF_INIT_VERSION_CHECK,	/* aq msg sent, awaiting reply */
	__I40EVF_INIT_GET_RESOURCES,	/* aq msg sent, awaiting reply */
	__I40EVF_INIT_SW,		/* got resources, setting up structs */
	__I40EVF_RESETTING,		/* in reset */
	/* Below here, watchdog is running */
	__I40EVF_DOWN,			/* ready, can be opened */
	__I40EVF_TESTING,		/* in ethtool self-test */
	__I40EVF_RUNNING,		/* opened, working */
};

enum i40evf_critical_section_t {
	__I40EVF_IN_CRITICAL_TASK,	/* cannot be interrupted */
};
/* make common code happy */
#define __I40E_DOWN __I40EVF_DOWN

/* board specific private data structure */
struct i40evf_adapter {
	struct timer_list watchdog_timer;
	struct work_struct reset_task;
	struct work_struct adminq_task;
	struct delayed_work init_task;
	struct i40e_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
	struct list_head vlan_filter_list;
	char misc_vector_name[IFNAMSIZ + 9];
	int num_active_queues;

	/* TX */
	struct i40e_ring *tx_rings[I40E_MAX_VSI_QP];
	u32 tx_timeout_count;
	struct list_head mac_filter_list;
	u32 tx_desc_count;

	/* RX */
	struct i40e_ring *rx_rings[I40E_MAX_VSI_QP];
	u64 hw_csum_rx_error;
	u32 rx_desc_count;
	int num_msix_vectors;
	struct msix_entry *msix_entries;

	u32 flags;
#define I40EVF_FLAG_RX_CSUM_ENABLED              BIT(0)
#define I40EVF_FLAG_RX_1BUF_CAPABLE              BIT(1)
#define I40EVF_FLAG_RX_PS_CAPABLE                BIT(2)
#define I40EVF_FLAG_RX_PS_ENABLED                BIT(3)
#define I40EVF_FLAG_IMIR_ENABLED                 BIT(5)
#define I40EVF_FLAG_MQ_CAPABLE                   BIT(6)
#define I40EVF_FLAG_NEED_LINK_UPDATE             BIT(7)
#define I40EVF_FLAG_PF_COMMS_FAILED              BIT(8)
#define I40EVF_FLAG_RESET_PENDING                BIT(9)
#define I40EVF_FLAG_RESET_NEEDED                 BIT(10)
#define I40EVF_FLAG_WB_ON_ITR_CAPABLE		BIT(11)
#define I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE	BIT(12)
#define I40EVF_FLAG_ADDR_SET_BY_PF		BIT(13)
/* duplicates for common code */
#define I40E_FLAG_FDIR_ATR_ENABLED		 0
#define I40E_FLAG_DCB_ENABLED			 0
#define I40E_FLAG_RX_CSUM_ENABLED                I40EVF_FLAG_RX_CSUM_ENABLED
#define I40E_FLAG_WB_ON_ITR_CAPABLE		I40EVF_FLAG_WB_ON_ITR_CAPABLE
#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE	I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE
	/* flags for admin queue service task */
	u32 aq_required;
#define I40EVF_FLAG_AQ_ENABLE_QUEUES		BIT(0)
#define I40EVF_FLAG_AQ_DISABLE_QUEUES		BIT(1)
#define I40EVF_FLAG_AQ_ADD_MAC_FILTER		BIT(2)
#define I40EVF_FLAG_AQ_ADD_VLAN_FILTER		BIT(3)
#define I40EVF_FLAG_AQ_DEL_MAC_FILTER		BIT(4)
#define I40EVF_FLAG_AQ_DEL_VLAN_FILTER		BIT(5)
#define I40EVF_FLAG_AQ_CONFIGURE_QUEUES		BIT(6)
#define I40EVF_FLAG_AQ_MAP_VECTORS		BIT(7)
#define I40EVF_FLAG_AQ_HANDLE_RESET		BIT(8)
#define I40EVF_FLAG_AQ_CONFIGURE_RSS		BIT(9)
#define I40EVF_FLAG_AQ_GET_CONFIG		BIT(10)

	/* OS defined structs */
	struct net_device *netdev;
	struct pci_dev *pdev;
	struct net_device_stats net_stats;

	struct i40e_hw hw; /* defined in i40e_type.h */

	enum i40evf_state_t state;
	unsigned long crit_section;

	struct work_struct watchdog_task;
	bool netdev_registered;
	bool link_up;
	enum i40e_virtchnl_ops current_op;
#define CLIENT_ENABLED(_a) ((_a)->vf_res->vf_offload_flags & \
			    I40E_VIRTCHNL_VF_OFFLOAD_IWARP)
#define RSS_AQ(_a) ((_a)->vf_res->vf_offload_flags & \
		    I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)
#define VLAN_ALLOWED(_a) ((_a)->vf_res->vf_offload_flags & \
			  I40E_VIRTCHNL_VF_OFFLOAD_VLAN)
	struct i40e_virtchnl_vf_resource *vf_res; /* incl. all VSIs */
	struct i40e_virtchnl_vsi_resource *vsi_res; /* our LAN VSI */
	struct i40e_virtchnl_version_info pf_version;
#define PF_IS_V11(_a) (((_a)->pf_version.major == 1) && \
		       ((_a)->pf_version.minor == 1))
	u16 msg_enable;
	struct i40e_eth_stats current_stats;
	struct i40e_vsi vsi;
	u32 aq_wait_count;
};


/* needed by i40evf_ethtool.c */
extern char i40evf_driver_name[];
extern const char i40evf_driver_version[];

int i40evf_up(struct i40evf_adapter *adapter);
void i40evf_down(struct i40evf_adapter *adapter);
int i40evf_process_config(struct i40evf_adapter *adapter);
void i40evf_reset(struct i40evf_adapter *adapter);
void i40evf_set_ethtool_ops(struct net_device *netdev);
void i40evf_update_stats(struct i40evf_adapter *adapter);
void i40evf_reset_interrupt_capability(struct i40evf_adapter *adapter);
int i40evf_init_interrupt_scheme(struct i40evf_adapter *adapter);
void i40evf_irq_enable_queues(struct i40evf_adapter *adapter, u32 mask);
void i40evf_free_all_tx_resources(struct i40evf_adapter *adapter);
void i40evf_free_all_rx_resources(struct i40evf_adapter *adapter);

void i40e_napi_add_all(struct i40evf_adapter *adapter);
void i40e_napi_del_all(struct i40evf_adapter *adapter);

int i40evf_send_api_ver(struct i40evf_adapter *adapter);
int i40evf_verify_api_ver(struct i40evf_adapter *adapter);
int i40evf_send_vf_config_msg(struct i40evf_adapter *adapter);
int i40evf_get_vf_config(struct i40evf_adapter *adapter);
void i40evf_irq_enable(struct i40evf_adapter *adapter, bool flush);
void i40evf_configure_queues(struct i40evf_adapter *adapter);
void i40evf_deconfigure_queues(struct i40evf_adapter *adapter);
void i40evf_enable_queues(struct i40evf_adapter *adapter);
void i40evf_disable_queues(struct i40evf_adapter *adapter);
void i40evf_map_queues(struct i40evf_adapter *adapter);
void i40evf_add_ether_addrs(struct i40evf_adapter *adapter);
void i40evf_del_ether_addrs(struct i40evf_adapter *adapter);
void i40evf_add_vlans(struct i40evf_adapter *adapter);
void i40evf_del_vlans(struct i40evf_adapter *adapter);
void i40evf_set_promiscuous(struct i40evf_adapter *adapter, int flags);
void i40evf_request_stats(struct i40evf_adapter *adapter);
void i40evf_request_reset(struct i40evf_adapter *adapter);
void i40evf_virtchnl_completion(struct i40evf_adapter *adapter,
				enum i40e_virtchnl_ops v_opcode,
				i40e_status v_retval, u8 *msg, u16 msglen);
int i40evf_config_rss(struct i40e_vsi *vsi, const u8 *seed, u8 *lut,
		      u16 lut_size);
int i40evf_get_rss(struct i40e_vsi *vsi, const u8 *seed, u8 *lut,
		   u16 lut_size);
#endif /* _I40EVF_H_ */
Commit	Line	Data
5321a21c GR	1	/*******************************************************************************
	2	*
	3	* Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
a377384a	4	* Copyright(c) 2013 - 2014 Intel Corporation.
5321a21c GR	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
b831607d JB	15	* You should have received a copy of the GNU General Public License along
	16	* with this program. If not, see <http://www.gnu.org/licenses/>.
	17	*
5321a21c GR	18	* The full GNU General Public License is included in this distribution in
	19	* the file called "COPYING".
	20	*
	21	* Contact Information:
	22	* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
	23	* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	24	*
	25	******************************************************************************/
	26
	27	#ifndef _I40EVF_H_
	28	#define _I40EVF_H_
	29
	30	#include <linux/module.h>
	31	#include <linux/pci.h>
	32	#include <linux/aer.h>
	33	#include <linux/netdevice.h>
	34	#include <linux/vmalloc.h>
	35	#include <linux/interrupt.h>
	36	#include <linux/ethtool.h>
	37	#include <linux/if_vlan.h>
	38	#include <linux/ip.h>
	39	#include <linux/tcp.h>
	40	#include <linux/sctp.h>
	41	#include <linux/ipv6.h>
	42	#include <net/ip6_checksum.h>
	43	#include <net/udp.h>
5321a21c GR	44
	45	#include "i40e_type.h"
	46	#include "i40e_virtchnl.h"
	47	#include "i40e_txrx.h"
	48
	49	#define DEFAULT_DEBUG_LEVEL_SHIFT 3
	50	#define PFX "i40evf: "
5321a21c GR	51
	52	/* dummy struct to make common code less painful */
	53	struct i40e_vsi {
	54	struct i40evf_adapter *back;
	55	struct net_device *netdev;
	56	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
	57	u16 seid;
	58	u16 id;
	59	unsigned long state;
	60	int base_vector;
	61	u16 work_limit;
	62	/* high bit set means dynamic, use accessor routines to read/write.
	63	* hardware only supports 2us resolution for the ITR registers.
	64	* these values always store the USER setting, and must be converted
	65	* before programming to a register.
	66	*/
	67	u16 rx_itr_setting;
	68	u16 tx_itr_setting;
f578f5f4	69	u16 qs_handle;
66f9af85 HZ	70	u8 rss_hkey_user; / User configured hash keys */
66f9af85 HZ	71	u8 rss_lut_user; / User configured lookup table entries */
5321a21c GR	72	};
	73
	74	/* How many Rx Buffers do we bundle into one write to the hardware ? */
	75	#define I40EVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
	76	#define I40EVF_DEFAULT_TXD 512
	77	#define I40EVF_DEFAULT_RXD 512
	78	#define I40EVF_MAX_TXD 4096
	79	#define I40EVF_MIN_TXD 64
	80	#define I40EVF_MAX_RXD 4096
	81	#define I40EVF_MIN_RXD 64
337eb08e	82	#define I40EVF_REQ_DESCRIPTOR_MULTIPLE 32
5321a21c GR	83
	84	/* Supported Rx Buffer Sizes */
	85	#define I40EVF_RXBUFFER_64 64 /* Used for packet split */
	86	#define I40EVF_RXBUFFER_128 128 /* Used for packet split */
	87	#define I40EVF_RXBUFFER_256 256 /* Used for packet split */
	88	#define I40EVF_RXBUFFER_2048 2048
	89	#define I40EVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
	90	#define I40EVF_MAX_AQ_BUF_SIZE 4096
	91	#define I40EVF_AQ_LEN 32
3f7e5c33	92	#define I40EVF_AQ_MAX_ERR 20 /* times to try before resetting AQ */
5321a21c GR	93
	94	#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
	95
	96	#define I40E_RX_DESC(R, i) (&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))
	97	#define I40E_TX_DESC(R, i) (&(((struct i40e_tx_desc *)((R)->desc))[i]))
	98	#define I40E_TX_CTXTDESC(R, i) \
	99	(&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
	100	#define MAX_RX_QUEUES 8
	101	#define MAX_TX_QUEUES MAX_RX_QUEUES
	102
e25d00b8	103	#define I40EVF_HKEY_ARRAY_SIZE ((I40E_VFQF_HKEY_MAX_INDEX + 1) * 4)
2c86ac3c	104	#define I40EVF_HLUT_ARRAY_SIZE ((I40E_VFQF_HLUT_MAX_INDEX + 1) * 4)
e25d00b8	105
5321a21c GR	106	/* MAX_MSIX_Q_VECTORS of these are allocated,
	107	* but we only use one per queue-specific vector.
	108	*/
	109	struct i40e_q_vector {
	110	struct i40evf_adapter *adapter;
	111	struct i40e_vsi *vsi;
	112	struct napi_struct napi;
	113	unsigned long reg_idx;
	114	struct i40e_ring_container rx;
	115	struct i40e_ring_container tx;
	116	u32 ring_mask;
	117	u8 num_ringpairs; /* total number of ring pairs in vector */
ee2319cf JB	118	#define ITR_COUNTDOWN_START 100
ee2319cf JB	119	u8 itr_countdown; /* when 0 or 1 update ITR */
5321a21c GR	120	int v_idx; /* vector index in list */
5321a21c GR	121	char name[IFNAMSIZ + 9];
8e0764b4	122	bool arm_wb_state;
5321a21c GR	123	cpumask_var_t affinity_mask;
	124	};
	125
	126	/* Helper macros to switch between ints/sec and what the register uses.
	127	* And yes, it's the same math going both ways. The lowest value
	128	* supported by all of the i40e hardware is 8.
	129	*/
	130	#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
	131	((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
	132	#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
	133
	134	#define I40EVF_DESC_UNUSED(R) \
	135	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
	136	(R)->next_to_clean - (R)->next_to_use - 1)
	137
	138	#define I40EVF_RX_DESC_ADV(R, i) \
	139	(&(((union i40e_adv_rx_desc *)((R).desc))[i]))
	140	#define I40EVF_TX_DESC_ADV(R, i) \
	141	(&(((union i40e_adv_tx_desc *)((R).desc))[i]))
	142	#define I40EVF_TX_CTXTDESC_ADV(R, i) \
	143	(&(((struct i40e_adv_tx_context_desc *)((R).desc))[i]))
	144
	145	#define OTHER_VECTOR 1
	146	#define NONQ_VECS (OTHER_VECTOR)
	147
	148	#define MAX_MSIX_Q_VECTORS 4
	149	#define MAX_MSIX_COUNT 5
	150
	151	#define MIN_MSIX_Q_VECTORS 1
	152	#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NONQ_VECS)
	153
	154	#define I40EVF_QUEUE_END_OF_LIST 0x7FF
	155	#define I40EVF_FREE_VECTOR 0x7FFF
	156	struct i40evf_mac_filter {
	157	struct list_head list;
	158	u8 macaddr[ETH_ALEN];
	159	bool remove; /* filter needs to be removed */
	160	bool add; /* filter needs to be added */
	161	};
	162
	163	struct i40evf_vlan_filter {
	164	struct list_head list;
	165	u16 vlan;
	166	bool remove; /* filter needs to be removed */
	167	bool add; /* filter needs to be added */
	168	};
	169
	170	/* Driver state. The order of these is important! */
	171	enum i40evf_state_t {
	172	__I40EVF_STARTUP, /* driver loaded, probe complete */
5321a21c GR	173	__I40EVF_REMOVE, /* driver is being unloaded */
	174	__I40EVF_INIT_VERSION_CHECK, /* aq msg sent, awaiting reply */
	175	__I40EVF_INIT_GET_RESOURCES, /* aq msg sent, awaiting reply */
	176	__I40EVF_INIT_SW, /* got resources, setting up structs */
ef8693eb	177	__I40EVF_RESETTING, /* in reset */
5321a21c GR	178	/* Below here, watchdog is running */
	179	__I40EVF_DOWN, /* ready, can be opened */
	180	__I40EVF_TESTING, /* in ethtool self-test */
5321a21c GR	181	__I40EVF_RUNNING, /* opened, working */
	182	};
	183
	184	enum i40evf_critical_section_t {
	185	__I40EVF_IN_CRITICAL_TASK, /* cannot be interrupted */
	186	};
	187	/* make common code happy */
	188	#define __I40E_DOWN __I40EVF_DOWN
	189
	190	/* board specific private data structure */
	191	struct i40evf_adapter {
	192	struct timer_list watchdog_timer;
5321a21c GR	193	struct work_struct reset_task;
	194	struct work_struct adminq_task;
	195	struct delayed_work init_task;
	196	struct i40e_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
	197	struct list_head vlan_filter_list;
e1dfee8e	198	char misc_vector_name[IFNAMSIZ + 9];
cc052927	199	int num_active_queues;
5321a21c	200
5321a21c GR	201	/* TX */
5321a21c GR	202	struct i40e_ring *tx_rings[I40E_MAX_VSI_QP];
5321a21c GR	203	u32 tx_timeout_count;
5321a21c GR	204	struct list_head mac_filter_list;
d732a184	205	u32 tx_desc_count;
5321a21c GR	206
	207	/* RX */
	208	struct i40e_ring *rx_rings[I40E_MAX_VSI_QP];
5321a21c	209	u64 hw_csum_rx_error;
d732a184	210	u32 rx_desc_count;
5321a21c GR	211	int num_msix_vectors;
	212	struct msix_entry *msix_entries;
	213
e8106ebe	214	u32 flags;
41a1d04b JB	215	#define I40EVF_FLAG_RX_CSUM_ENABLED BIT(0)
	216	#define I40EVF_FLAG_RX_1BUF_CAPABLE BIT(1)
	217	#define I40EVF_FLAG_RX_PS_CAPABLE BIT(2)
	218	#define I40EVF_FLAG_RX_PS_ENABLED BIT(3)
41a1d04b JB	219	#define I40EVF_FLAG_IMIR_ENABLED BIT(5)
	220	#define I40EVF_FLAG_MQ_CAPABLE BIT(6)
	221	#define I40EVF_FLAG_NEED_LINK_UPDATE BIT(7)
	222	#define I40EVF_FLAG_PF_COMMS_FAILED BIT(8)
	223	#define I40EVF_FLAG_RESET_PENDING BIT(9)
	224	#define I40EVF_FLAG_RESET_NEEDED BIT(10)
d502ce01 ASJ	225	#define I40EVF_FLAG_WB_ON_ITR_CAPABLE BIT(11)
d502ce01 ASJ	226	#define I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE BIT(12)
14e52ee2	227	#define I40EVF_FLAG_ADDR_SET_BY_PF BIT(13)
d502ce01	228	/* duplicates for common code */
5321a21c GR	229	#define I40E_FLAG_FDIR_ATR_ENABLED 0
5321a21c GR	230	#define I40E_FLAG_DCB_ENABLED 0
5321a21c	231	#define I40E_FLAG_RX_CSUM_ENABLED I40EVF_FLAG_RX_CSUM_ENABLED
d502ce01 ASJ	232	#define I40E_FLAG_WB_ON_ITR_CAPABLE I40EVF_FLAG_WB_ON_ITR_CAPABLE
d502ce01 ASJ	233	#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE I40EVF_FLAG_OUTER_UDP_CSUM_CAPABLE
5321a21c GR	234	/* flags for admin queue service task */
5321a21c GR	235	u32 aq_required;
41a1d04b JB	236	#define I40EVF_FLAG_AQ_ENABLE_QUEUES BIT(0)
	237	#define I40EVF_FLAG_AQ_DISABLE_QUEUES BIT(1)
	238	#define I40EVF_FLAG_AQ_ADD_MAC_FILTER BIT(2)
	239	#define I40EVF_FLAG_AQ_ADD_VLAN_FILTER BIT(3)
	240	#define I40EVF_FLAG_AQ_DEL_MAC_FILTER BIT(4)
	241	#define I40EVF_FLAG_AQ_DEL_VLAN_FILTER BIT(5)
	242	#define I40EVF_FLAG_AQ_CONFIGURE_QUEUES BIT(6)
	243	#define I40EVF_FLAG_AQ_MAP_VECTORS BIT(7)
	244	#define I40EVF_FLAG_AQ_HANDLE_RESET BIT(8)
d502ce01	245	#define I40EVF_FLAG_AQ_CONFIGURE_RSS BIT(9)
41a1d04b	246	#define I40EVF_FLAG_AQ_GET_CONFIG BIT(10)
ef8693eb	247
5321a21c GR	248	/* OS defined structs */
	249	struct net_device *netdev;
	250	struct pci_dev *pdev;
	251	struct net_device_stats net_stats;
	252
708e8c24	253	struct i40e_hw hw; /* defined in i40e_type.h */
5321a21c GR	254
5321a21c GR	255	enum i40evf_state_t state;
75a64435	256	unsigned long crit_section;
5321a21c GR	257
	258	struct work_struct watchdog_task;
	259	bool netdev_registered;
5321a21c GR	260	bool link_up;
5321a21c GR	261	enum i40e_virtchnl_ops current_op;
17a65a7f MW	262	#define CLIENT_ENABLED(_a) ((_a)->vf_res->vf_offload_flags & \
	263	I40E_VIRTCHNL_VF_OFFLOAD_IWARP)
	264	#define RSS_AQ(_a) ((_a)->vf_res->vf_offload_flags & \
	265	I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ)
	266	#define VLAN_ALLOWED(_a) ((_a)->vf_res->vf_offload_flags & \
	267	I40E_VIRTCHNL_VF_OFFLOAD_VLAN)
5321a21c GR	268	struct i40e_virtchnl_vf_resource vf_res; / incl. all VSIs */
5321a21c GR	269	struct i40e_virtchnl_vsi_resource vsi_res; / our LAN VSI */
17a65a7f MW	270	struct i40e_virtchnl_version_info pf_version;
	271	#define PF_IS_V11(_a) (((_a)->pf_version.major == 1) && \
	272	((_a)->pf_version.minor == 1))
5321a21c GR	273	u16 msg_enable;
	274	struct i40e_eth_stats current_stats;
	275	struct i40e_vsi vsi;
	276	u32 aq_wait_count;
	277	};
	278
5321a21c GR	279
	280	/* needed by i40evf_ethtool.c */
	281	extern char i40evf_driver_name[];
	282	extern const char i40evf_driver_version[];
	283
	284	int i40evf_up(struct i40evf_adapter *adapter);
	285	void i40evf_down(struct i40evf_adapter *adapter);
e6d038de	286	int i40evf_process_config(struct i40evf_adapter *adapter);
5321a21c GR	287	void i40evf_reset(struct i40evf_adapter *adapter);
	288	void i40evf_set_ethtool_ops(struct net_device *netdev);
	289	void i40evf_update_stats(struct i40evf_adapter *adapter);
	290	void i40evf_reset_interrupt_capability(struct i40evf_adapter *adapter);
	291	int i40evf_init_interrupt_scheme(struct i40evf_adapter *adapter);
	292	void i40evf_irq_enable_queues(struct i40evf_adapter *adapter, u32 mask);
e284fc88 MW	293	void i40evf_free_all_tx_resources(struct i40evf_adapter *adapter);
e284fc88 MW	294	void i40evf_free_all_rx_resources(struct i40evf_adapter *adapter);
5321a21c GR	295
	296	void i40e_napi_add_all(struct i40evf_adapter *adapter);
	297	void i40e_napi_del_all(struct i40evf_adapter *adapter);
	298
	299	int i40evf_send_api_ver(struct i40evf_adapter *adapter);
	300	int i40evf_verify_api_ver(struct i40evf_adapter *adapter);
	301	int i40evf_send_vf_config_msg(struct i40evf_adapter *adapter);
	302	int i40evf_get_vf_config(struct i40evf_adapter *adapter);
	303	void i40evf_irq_enable(struct i40evf_adapter *adapter, bool flush);
	304	void i40evf_configure_queues(struct i40evf_adapter *adapter);
	305	void i40evf_deconfigure_queues(struct i40evf_adapter *adapter);
	306	void i40evf_enable_queues(struct i40evf_adapter *adapter);
	307	void i40evf_disable_queues(struct i40evf_adapter *adapter);
	308	void i40evf_map_queues(struct i40evf_adapter *adapter);
	309	void i40evf_add_ether_addrs(struct i40evf_adapter *adapter);
	310	void i40evf_del_ether_addrs(struct i40evf_adapter *adapter);
	311	void i40evf_add_vlans(struct i40evf_adapter *adapter);
	312	void i40evf_del_vlans(struct i40evf_adapter *adapter);
	313	void i40evf_set_promiscuous(struct i40evf_adapter *adapter, int flags);
	314	void i40evf_request_stats(struct i40evf_adapter *adapter);
625777e3	315	void i40evf_request_reset(struct i40evf_adapter *adapter);
5321a21c GR	316	void i40evf_virtchnl_completion(struct i40evf_adapter *adapter,
	317	enum i40e_virtchnl_ops v_opcode,
	318	i40e_status v_retval, u8 *msg, u16 msglen);
2c86ac3c HZ	319	int i40evf_config_rss(struct i40e_vsi vsi, const u8 seed, u8 *lut,
2c86ac3c HZ	320	u16 lut_size);
90b02b43 HZ	321	int i40evf_get_rss(struct i40e_vsi vsi, const u8 seed, u8 *lut,
90b02b43 HZ	322	u16 lut_size);
5321a21c	323	#endif /* _I40EVF_H_ */