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2f90b865 AD |
1 | /******************************************************************************* |
2 | ||
3 | Intel 10 Gigabit PCI Express Linux driver | |
434c5e39 | 4 | Copyright(c) 1999 - 2013 Intel Corporation. |
2f90b865 AD |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | Linux NICS <linux.nics@intel.com> | |
24 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
25 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
26 | ||
27 | *******************************************************************************/ | |
28 | ||
29 | #include "ixgbe.h" | |
30 | #include <linux/dcbnl.h> | |
62551d3e PWJ |
31 | #include "ixgbe_dcb_82598.h" |
32 | #include "ixgbe_dcb_82599.h" | |
610a63fc | 33 | #include "ixgbe_sriov.h" |
2f90b865 AD |
34 | |
35 | /* Callbacks for DCB netlink in the kernel */ | |
36 | #define BIT_DCB_MODE 0x01 | |
37 | #define BIT_PFC 0x02 | |
38 | #define BIT_PG_RX 0x04 | |
39 | #define BIT_PG_TX 0x08 | |
8de8b2e6 | 40 | #define BIT_APP_UPCHG 0x10 |
235ea828 | 41 | #define BIT_LINKSPEED 0x80 |
2f90b865 | 42 | |
62551d3e PWJ |
43 | /* Responses for the DCB_C_SET_ALL command */ |
44 | #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */ | |
45 | #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */ | |
46 | #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */ | |
47 | ||
f525c6d2 | 48 | static int ixgbe_copy_dcb_cfg(struct ixgbe_adapter *adapter, int tc_max) |
2f90b865 | 49 | { |
f525c6d2 JF |
50 | struct ixgbe_dcb_config *scfg = &adapter->temp_dcb_cfg; |
51 | struct ixgbe_dcb_config *dcfg = &adapter->dcb_cfg; | |
aacc1bea ME |
52 | struct tc_configuration *src = NULL; |
53 | struct tc_configuration *dst = NULL; | |
54 | int i, j; | |
55 | int tx = DCB_TX_CONFIG; | |
56 | int rx = DCB_RX_CONFIG; | |
57 | int changes = 0; | |
f525c6d2 JF |
58 | #ifdef IXGBE_FCOE |
59 | struct dcb_app app = { | |
60 | .selector = DCB_APP_IDTYPE_ETHTYPE, | |
61 | .protocol = ETH_P_FCOE, | |
62 | }; | |
63 | u8 up = dcb_getapp(adapter->netdev, &app); | |
2f90b865 | 64 | |
f525c6d2 JF |
65 | if (up && !(up & (1 << adapter->fcoe.up))) |
66 | changes |= BIT_APP_UPCHG; | |
67 | #endif | |
2f90b865 AD |
68 | |
69 | for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) { | |
aacc1bea ME |
70 | src = &scfg->tc_config[i - DCB_PG_ATTR_TC_0]; |
71 | dst = &dcfg->tc_config[i - DCB_PG_ATTR_TC_0]; | |
2f90b865 | 72 | |
aacc1bea ME |
73 | if (dst->path[tx].prio_type != src->path[tx].prio_type) { |
74 | dst->path[tx].prio_type = src->path[tx].prio_type; | |
75 | changes |= BIT_PG_TX; | |
76 | } | |
2f90b865 | 77 | |
aacc1bea ME |
78 | if (dst->path[tx].bwg_id != src->path[tx].bwg_id) { |
79 | dst->path[tx].bwg_id = src->path[tx].bwg_id; | |
80 | changes |= BIT_PG_TX; | |
81 | } | |
2f90b865 | 82 | |
aacc1bea ME |
83 | if (dst->path[tx].bwg_percent != src->path[tx].bwg_percent) { |
84 | dst->path[tx].bwg_percent = src->path[tx].bwg_percent; | |
85 | changes |= BIT_PG_TX; | |
86 | } | |
2f90b865 | 87 | |
aacc1bea ME |
88 | if (dst->path[tx].up_to_tc_bitmap != |
89 | src->path[tx].up_to_tc_bitmap) { | |
90 | dst->path[tx].up_to_tc_bitmap = | |
91 | src->path[tx].up_to_tc_bitmap; | |
92 | changes |= (BIT_PG_TX | BIT_PFC | BIT_APP_UPCHG); | |
93 | } | |
2f90b865 | 94 | |
aacc1bea ME |
95 | if (dst->path[rx].prio_type != src->path[rx].prio_type) { |
96 | dst->path[rx].prio_type = src->path[rx].prio_type; | |
97 | changes |= BIT_PG_RX; | |
98 | } | |
2f90b865 | 99 | |
aacc1bea ME |
100 | if (dst->path[rx].bwg_id != src->path[rx].bwg_id) { |
101 | dst->path[rx].bwg_id = src->path[rx].bwg_id; | |
102 | changes |= BIT_PG_RX; | |
103 | } | |
2f90b865 | 104 | |
aacc1bea ME |
105 | if (dst->path[rx].bwg_percent != src->path[rx].bwg_percent) { |
106 | dst->path[rx].bwg_percent = src->path[rx].bwg_percent; | |
107 | changes |= BIT_PG_RX; | |
108 | } | |
2f90b865 | 109 | |
aacc1bea ME |
110 | if (dst->path[rx].up_to_tc_bitmap != |
111 | src->path[rx].up_to_tc_bitmap) { | |
112 | dst->path[rx].up_to_tc_bitmap = | |
113 | src->path[rx].up_to_tc_bitmap; | |
114 | changes |= (BIT_PG_RX | BIT_PFC | BIT_APP_UPCHG); | |
115 | } | |
2f90b865 AD |
116 | } |
117 | ||
118 | for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) { | |
aacc1bea ME |
119 | j = i - DCB_PG_ATTR_BW_ID_0; |
120 | if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) { | |
121 | dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j]; | |
122 | changes |= BIT_PG_TX; | |
123 | } | |
124 | if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) { | |
125 | dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j]; | |
126 | changes |= BIT_PG_RX; | |
127 | } | |
2f90b865 AD |
128 | } |
129 | ||
130 | for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) { | |
aacc1bea ME |
131 | j = i - DCB_PFC_UP_ATTR_0; |
132 | if (dcfg->tc_config[j].dcb_pfc != scfg->tc_config[j].dcb_pfc) { | |
133 | dcfg->tc_config[j].dcb_pfc = scfg->tc_config[j].dcb_pfc; | |
134 | changes |= BIT_PFC; | |
135 | } | |
2f90b865 AD |
136 | } |
137 | ||
aacc1bea ME |
138 | if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) { |
139 | dcfg->pfc_mode_enable = scfg->pfc_mode_enable; | |
140 | changes |= BIT_PFC; | |
141 | } | |
ea4af4f4 | 142 | |
aacc1bea | 143 | return changes; |
2f90b865 AD |
144 | } |
145 | ||
146 | static u8 ixgbe_dcbnl_get_state(struct net_device *netdev) | |
147 | { | |
148 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
149 | ||
2f90b865 AD |
150 | return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED); |
151 | } | |
152 | ||
1486a61e | 153 | static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state) |
2f90b865 AD |
154 | { |
155 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
02debdc9 | 156 | int err = 0; |
2f90b865 | 157 | |
4c09f3a0 JF |
158 | /* Fail command if not in CEE mode */ |
159 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) | |
160 | return 1; | |
161 | ||
03ecf91a | 162 | /* verify there is something to do, if not then exit */ |
02debdc9 | 163 | if (!state == !(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) |
89d27a3c | 164 | goto out; |
03ecf91a | 165 | |
02debdc9 AD |
166 | err = ixgbe_setup_tc(netdev, |
167 | state ? adapter->dcb_cfg.num_tcs.pg_tcs : 0); | |
89d27a3c | 168 | out: |
02debdc9 | 169 | return !!err; |
2f90b865 AD |
170 | } |
171 | ||
172 | static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev, | |
173 | u8 *perm_addr) | |
174 | { | |
175 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
aca6bee7 | 176 | int i, j; |
2f90b865 | 177 | |
86e713a0 LL |
178 | memset(perm_addr, 0xff, MAX_ADDR_LEN); |
179 | ||
2f90b865 AD |
180 | for (i = 0; i < netdev->addr_len; i++) |
181 | perm_addr[i] = adapter->hw.mac.perm_addr[i]; | |
aca6bee7 | 182 | |
b93a2226 DS |
183 | switch (adapter->hw.mac.type) { |
184 | case ixgbe_mac_82599EB: | |
185 | case ixgbe_mac_X540: | |
aca6bee7 WJP |
186 | for (j = 0; j < netdev->addr_len; j++, i++) |
187 | perm_addr[i] = adapter->hw.mac.san_addr[j]; | |
b93a2226 DS |
188 | break; |
189 | default: | |
190 | break; | |
aca6bee7 | 191 | } |
2f90b865 AD |
192 | } |
193 | ||
194 | static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
195 | u8 prio, u8 bwg_id, u8 bw_pct, | |
196 | u8 up_map) | |
197 | { | |
198 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
199 | ||
200 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
201 | adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio; | |
202 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
203 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id; | |
204 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
205 | adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent = | |
206 | bw_pct; | |
207 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
208 | adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap = | |
209 | up_map; | |
2f90b865 AD |
210 | } |
211 | ||
212 | static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
213 | u8 bw_pct) | |
214 | { | |
215 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
216 | ||
217 | adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct; | |
2f90b865 AD |
218 | } |
219 | ||
220 | static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
221 | u8 prio, u8 bwg_id, u8 bw_pct, | |
222 | u8 up_map) | |
223 | { | |
224 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
225 | ||
226 | if (prio != DCB_ATTR_VALUE_UNDEFINED) | |
227 | adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio; | |
228 | if (bwg_id != DCB_ATTR_VALUE_UNDEFINED) | |
229 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id; | |
230 | if (bw_pct != DCB_ATTR_VALUE_UNDEFINED) | |
231 | adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent = | |
232 | bw_pct; | |
233 | if (up_map != DCB_ATTR_VALUE_UNDEFINED) | |
234 | adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap = | |
235 | up_map; | |
2f90b865 AD |
236 | } |
237 | ||
238 | static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
239 | u8 bw_pct) | |
240 | { | |
241 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
242 | ||
243 | adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct; | |
2f90b865 AD |
244 | } |
245 | ||
246 | static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, | |
247 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
248 | u8 *up_map) | |
249 | { | |
250 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
251 | ||
252 | *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type; | |
253 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id; | |
254 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent; | |
255 | *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap; | |
256 | } | |
257 | ||
258 | static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id, | |
259 | u8 *bw_pct) | |
260 | { | |
261 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
262 | ||
263 | *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id]; | |
264 | } | |
265 | ||
266 | static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc, | |
267 | u8 *prio, u8 *bwg_id, u8 *bw_pct, | |
268 | u8 *up_map) | |
269 | { | |
270 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
271 | ||
272 | *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type; | |
273 | *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id; | |
274 | *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent; | |
275 | *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap; | |
276 | } | |
277 | ||
278 | static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id, | |
279 | u8 *bw_pct) | |
280 | { | |
281 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
282 | ||
283 | *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id]; | |
284 | } | |
285 | ||
286 | static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority, | |
287 | u8 setting) | |
288 | { | |
289 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
290 | ||
291 | adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting; | |
292 | if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc != | |
aacc1bea | 293 | adapter->dcb_cfg.tc_config[priority].dcb_pfc) |
ea4af4f4 | 294 | adapter->temp_dcb_cfg.pfc_mode_enable = true; |
2f90b865 AD |
295 | } |
296 | ||
297 | static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority, | |
298 | u8 *setting) | |
299 | { | |
300 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
301 | ||
302 | *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc; | |
303 | } | |
304 | ||
4909fe97 JF |
305 | static void ixgbe_dcbnl_devreset(struct net_device *dev) |
306 | { | |
307 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
308 | ||
309 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | |
310 | usleep_range(1000, 2000); | |
311 | ||
312 | if (netif_running(dev)) | |
313 | dev->netdev_ops->ndo_stop(dev); | |
314 | ||
315 | ixgbe_clear_interrupt_scheme(adapter); | |
316 | ixgbe_init_interrupt_scheme(adapter); | |
317 | ||
318 | if (netif_running(dev)) | |
319 | dev->netdev_ops->ndo_open(dev); | |
320 | ||
321 | clear_bit(__IXGBE_RESETTING, &adapter->state); | |
322 | } | |
4909fe97 | 323 | |
2f90b865 AD |
324 | static u8 ixgbe_dcbnl_set_all(struct net_device *netdev) |
325 | { | |
326 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
943561d3 AD |
327 | struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg; |
328 | struct ixgbe_hw *hw = &adapter->hw; | |
aacc1bea ME |
329 | int ret = DCB_NO_HW_CHG; |
330 | int i; | |
2f90b865 | 331 | |
4c09f3a0 JF |
332 | /* Fail command if not in CEE mode */ |
333 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) | |
aacc1bea | 334 | return ret; |
4c09f3a0 | 335 | |
f525c6d2 | 336 | adapter->dcb_set_bitmap |= ixgbe_copy_dcb_cfg(adapter, |
aacc1bea ME |
337 | MAX_TRAFFIC_CLASS); |
338 | if (!adapter->dcb_set_bitmap) | |
339 | return ret; | |
3ce1cc52 | 340 | |
d43f5c21 JF |
341 | if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) { |
342 | u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS]; | |
343 | u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS]; | |
17049d30 | 344 | /* Priority to TC mapping in CEE case default to 1:1 */ |
32701dc2 | 345 | u8 prio_tc[MAX_USER_PRIORITY]; |
d43f5c21 JF |
346 | int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
347 | ||
971060b1 | 348 | #ifdef IXGBE_FCOE |
d43f5c21 JF |
349 | if (adapter->netdev->features & NETIF_F_FCOE_MTU) |
350 | max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE); | |
351 | #endif | |
352 | ||
943561d3 AD |
353 | ixgbe_dcb_calculate_tc_credits(hw, dcb_cfg, max_frame, |
354 | DCB_TX_CONFIG); | |
355 | ixgbe_dcb_calculate_tc_credits(hw, dcb_cfg, max_frame, | |
356 | DCB_RX_CONFIG); | |
d43f5c21 | 357 | |
943561d3 AD |
358 | ixgbe_dcb_unpack_refill(dcb_cfg, DCB_TX_CONFIG, refill); |
359 | ixgbe_dcb_unpack_max(dcb_cfg, max); | |
360 | ixgbe_dcb_unpack_bwgid(dcb_cfg, DCB_TX_CONFIG, bwg_id); | |
361 | ixgbe_dcb_unpack_prio(dcb_cfg, DCB_TX_CONFIG, prio_type); | |
362 | ixgbe_dcb_unpack_map(dcb_cfg, DCB_TX_CONFIG, prio_tc); | |
d43f5c21 | 363 | |
943561d3 AD |
364 | ixgbe_dcb_hw_ets_config(hw, refill, max, bwg_id, |
365 | prio_type, prio_tc); | |
32701dc2 JF |
366 | |
367 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) | |
368 | netdev_set_prio_tc_map(netdev, i, prio_tc[i]); | |
aacc1bea ME |
369 | |
370 | ret = DCB_HW_CHG_RST; | |
32701dc2 JF |
371 | } |
372 | ||
373 | if (adapter->dcb_set_bitmap & BIT_PFC) { | |
943561d3 AD |
374 | if (dcb_cfg->pfc_mode_enable) { |
375 | u8 pfc_en; | |
376 | u8 prio_tc[MAX_USER_PRIORITY]; | |
377 | ||
378 | ixgbe_dcb_unpack_map(dcb_cfg, DCB_TX_CONFIG, prio_tc); | |
379 | ixgbe_dcb_unpack_pfc(dcb_cfg, &pfc_en); | |
380 | ixgbe_dcb_hw_pfc_config(hw, pfc_en, prio_tc); | |
381 | } else { | |
382 | hw->mac.ops.fc_enable(hw); | |
383 | } | |
3ebe8fde AD |
384 | |
385 | ixgbe_set_rx_drop_en(adapter); | |
386 | ||
943561d3 | 387 | ret = DCB_HW_CHG; |
d43f5c21 JF |
388 | } |
389 | ||
4909fe97 | 390 | #ifdef IXGBE_FCOE |
43497cc2 JF |
391 | /* Reprogam FCoE hardware offloads when the traffic class |
392 | * FCoE is using changes. This happens if the APP info | |
393 | * changes or the up2tc mapping is updated. | |
394 | */ | |
f525c6d2 JF |
395 | if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) { |
396 | struct dcb_app app = { | |
397 | .selector = DCB_APP_IDTYPE_ETHTYPE, | |
398 | .protocol = ETH_P_FCOE, | |
399 | }; | |
400 | u8 up = dcb_getapp(netdev, &app); | |
401 | ||
4909fe97 JF |
402 | adapter->fcoe.up = ffs(up) - 1; |
403 | ixgbe_dcbnl_devreset(netdev); | |
404 | ret = DCB_HW_CHG_RST; | |
405 | } | |
406 | #endif | |
407 | ||
2f90b865 | 408 | adapter->dcb_set_bitmap = 0x00; |
2f90b865 AD |
409 | return ret; |
410 | } | |
411 | ||
46132188 AD |
412 | static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap) |
413 | { | |
414 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
46132188 | 415 | |
3032309b JF |
416 | switch (capid) { |
417 | case DCB_CAP_ATTR_PG: | |
418 | *cap = true; | |
419 | break; | |
420 | case DCB_CAP_ATTR_PFC: | |
421 | *cap = true; | |
422 | break; | |
423 | case DCB_CAP_ATTR_UP2TC: | |
424 | *cap = false; | |
425 | break; | |
426 | case DCB_CAP_ATTR_PG_TCS: | |
427 | *cap = 0x80; | |
428 | break; | |
429 | case DCB_CAP_ATTR_PFC_TCS: | |
430 | *cap = 0x80; | |
431 | break; | |
432 | case DCB_CAP_ATTR_GSP: | |
433 | *cap = true; | |
434 | break; | |
435 | case DCB_CAP_ATTR_BCN: | |
436 | *cap = false; | |
437 | break; | |
438 | case DCB_CAP_ATTR_DCBX: | |
439 | *cap = adapter->dcbx_cap; | |
440 | break; | |
441 | default: | |
442 | *cap = false; | |
443 | break; | |
46132188 AD |
444 | } |
445 | ||
3032309b | 446 | return 0; |
46132188 AD |
447 | } |
448 | ||
2b88f2de | 449 | static int ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num) |
33dbabc4 AD |
450 | { |
451 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
33dbabc4 AD |
452 | |
453 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | |
454 | switch (tcid) { | |
455 | case DCB_NUMTCS_ATTR_PG: | |
32701dc2 | 456 | *num = adapter->dcb_cfg.num_tcs.pg_tcs; |
33dbabc4 AD |
457 | break; |
458 | case DCB_NUMTCS_ATTR_PFC: | |
32701dc2 | 459 | *num = adapter->dcb_cfg.num_tcs.pfc_tcs; |
33dbabc4 AD |
460 | break; |
461 | default: | |
d2c47b62 | 462 | return -EINVAL; |
33dbabc4 AD |
463 | break; |
464 | } | |
465 | } else { | |
d2c47b62 | 466 | return -EINVAL; |
33dbabc4 AD |
467 | } |
468 | ||
d2c47b62 | 469 | return 0; |
33dbabc4 AD |
470 | } |
471 | ||
2b88f2de | 472 | static int ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num) |
33dbabc4 AD |
473 | { |
474 | return -EINVAL; | |
475 | } | |
476 | ||
0eb3aa9b AD |
477 | static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev) |
478 | { | |
479 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | |
480 | ||
264857b8 | 481 | return adapter->dcb_cfg.pfc_mode_enable; |
0eb3aa9b AD |
482 | } |
483 | ||
484 | static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state) | |
485 | { | |
264857b8 PWJ |
486 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
487 | ||
488 | adapter->temp_dcb_cfg.pfc_mode_enable = state; | |
0eb3aa9b AD |
489 | } |
490 | ||
6ee16520 YZ |
491 | /** |
492 | * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority | |
493 | * @netdev : the corresponding netdev | |
494 | * @idtype : identifies the id as ether type or TCP/UDP port number | |
495 | * @id: id is either ether type or TCP/UDP port number | |
496 | * | |
497 | * Returns : on success, returns a non-zero 802.1p user priority bitmap | |
498 | * otherwise returns 0 as the invalid user priority bitmap to indicate an | |
499 | * error. | |
500 | */ | |
501 | static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id) | |
502 | { | |
3032309b | 503 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
dc166e22 JF |
504 | struct dcb_app app = { |
505 | .selector = idtype, | |
506 | .protocol = id, | |
507 | }; | |
6ee16520 | 508 | |
3032309b | 509 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)) |
dc166e22 | 510 | return 0; |
3032309b | 511 | |
dc166e22 | 512 | return dcb_getapp(netdev, &app); |
6ee16520 YZ |
513 | } |
514 | ||
d033d526 JF |
515 | static int ixgbe_dcbnl_ieee_getets(struct net_device *dev, |
516 | struct ieee_ets *ets) | |
517 | { | |
518 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
519 | struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets; | |
520 | ||
8599e251 JF |
521 | ets->ets_cap = adapter->dcb_cfg.num_tcs.pg_tcs; |
522 | ||
d033d526 JF |
523 | /* No IEEE PFC settings available */ |
524 | if (!my_ets) | |
8599e251 | 525 | return 0; |
d033d526 | 526 | |
d033d526 JF |
527 | ets->cbs = my_ets->cbs; |
528 | memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw)); | |
529 | memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw)); | |
530 | memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa)); | |
531 | memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc)); | |
532 | return 0; | |
533 | } | |
534 | ||
535 | static int ixgbe_dcbnl_ieee_setets(struct net_device *dev, | |
536 | struct ieee_ets *ets) | |
537 | { | |
538 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
d033d526 | 539 | int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN; |
89d27a3c | 540 | int i, err = 0; |
4c09f3a0 | 541 | __u8 max_tc = 0; |
d1d18b30 | 542 | __u8 map_chg = 0; |
d033d526 | 543 | |
3032309b JF |
544 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) |
545 | return -EINVAL; | |
546 | ||
d033d526 JF |
547 | if (!adapter->ixgbe_ieee_ets) { |
548 | adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets), | |
549 | GFP_KERNEL); | |
550 | if (!adapter->ixgbe_ieee_ets) | |
551 | return -ENOMEM; | |
d033d526 | 552 | |
d1d18b30 AH |
553 | /* initialize UP2TC mappings to invalid value */ |
554 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) | |
555 | adapter->ixgbe_ieee_ets->prio_tc[i] = | |
556 | IEEE_8021QAZ_MAX_TCS; | |
e8915beb AH |
557 | /* if possible update UP2TC mappings from HW */ |
558 | ixgbe_dcb_read_rtrup2tc(&adapter->hw, | |
559 | adapter->ixgbe_ieee_ets->prio_tc); | |
d1d18b30 | 560 | } |
d033d526 | 561 | |
3b97fd69 | 562 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
4c09f3a0 JF |
563 | if (ets->prio_tc[i] > max_tc) |
564 | max_tc = ets->prio_tc[i]; | |
d1d18b30 AH |
565 | if (ets->prio_tc[i] != adapter->ixgbe_ieee_ets->prio_tc[i]) |
566 | map_chg = 1; | |
3b97fd69 JF |
567 | } |
568 | ||
d1d18b30 AH |
569 | memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets)); |
570 | ||
4c09f3a0 JF |
571 | if (max_tc) |
572 | max_tc++; | |
17049d30 | 573 | |
32701dc2 JF |
574 | if (max_tc > adapter->dcb_cfg.num_tcs.pg_tcs) |
575 | return -EINVAL; | |
576 | ||
4c09f3a0 | 577 | if (max_tc != netdev_get_num_tc(dev)) |
89d27a3c | 578 | err = ixgbe_setup_tc(dev, max_tc); |
d1d18b30 AH |
579 | else if (map_chg) |
580 | ixgbe_dcbnl_devreset(dev); | |
89d27a3c JF |
581 | |
582 | if (err) | |
583 | goto err_out; | |
4c09f3a0 | 584 | |
89d27a3c JF |
585 | err = ixgbe_dcb_hw_ets(&adapter->hw, ets, max_frame); |
586 | err_out: | |
587 | return err; | |
d033d526 JF |
588 | } |
589 | ||
590 | static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev, | |
591 | struct ieee_pfc *pfc) | |
592 | { | |
593 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
594 | struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc; | |
595 | int i; | |
596 | ||
8599e251 JF |
597 | pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs; |
598 | ||
d033d526 JF |
599 | /* No IEEE PFC settings available */ |
600 | if (!my_pfc) | |
8599e251 | 601 | return 0; |
d033d526 | 602 | |
d033d526 JF |
603 | pfc->pfc_en = my_pfc->pfc_en; |
604 | pfc->mbc = my_pfc->mbc; | |
605 | pfc->delay = my_pfc->delay; | |
606 | ||
607 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | |
608 | pfc->requests[i] = adapter->stats.pxoffrxc[i]; | |
609 | pfc->indications[i] = adapter->stats.pxofftxc[i]; | |
610 | } | |
611 | ||
612 | return 0; | |
613 | } | |
614 | ||
615 | static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev, | |
616 | struct ieee_pfc *pfc) | |
617 | { | |
618 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
943561d3 | 619 | struct ixgbe_hw *hw = &adapter->hw; |
32701dc2 | 620 | u8 *prio_tc; |
943561d3 | 621 | int err; |
d033d526 | 622 | |
3032309b JF |
623 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) |
624 | return -EINVAL; | |
625 | ||
d033d526 JF |
626 | if (!adapter->ixgbe_ieee_pfc) { |
627 | adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc), | |
628 | GFP_KERNEL); | |
629 | if (!adapter->ixgbe_ieee_pfc) | |
630 | return -ENOMEM; | |
631 | } | |
632 | ||
32701dc2 | 633 | prio_tc = adapter->ixgbe_ieee_ets->prio_tc; |
d033d526 | 634 | memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc)); |
943561d3 AD |
635 | |
636 | /* Enable link flow control parameters if PFC is disabled */ | |
637 | if (pfc->pfc_en) | |
638 | err = ixgbe_dcb_hw_pfc_config(hw, pfc->pfc_en, prio_tc); | |
639 | else | |
640 | err = hw->mac.ops.fc_enable(hw); | |
641 | ||
3ebe8fde AD |
642 | ixgbe_set_rx_drop_en(adapter); |
643 | ||
943561d3 | 644 | return err; |
d033d526 JF |
645 | } |
646 | ||
f8628d40 JF |
647 | static int ixgbe_dcbnl_ieee_setapp(struct net_device *dev, |
648 | struct dcb_app *app) | |
649 | { | |
650 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
9372453e | 651 | int err = -EINVAL; |
f8628d40 JF |
652 | |
653 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) | |
9372453e | 654 | return err; |
f8628d40 | 655 | |
9372453e | 656 | err = dcb_ieee_setapp(dev, app); |
610a63fc JF |
657 | if (err) |
658 | return err; | |
f8628d40 | 659 | |
c8ca76eb | 660 | #ifdef IXGBE_FCOE |
610a63fc | 661 | if (app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && |
9372453e JF |
662 | app->protocol == ETH_P_FCOE) { |
663 | u8 app_mask = dcb_ieee_getapp_mask(dev, app); | |
664 | ||
665 | if (app_mask & (1 << adapter->fcoe.up)) | |
666 | return err; | |
667 | ||
668 | adapter->fcoe.up = app->priority; | |
42532da6 JF |
669 | ixgbe_dcbnl_devreset(dev); |
670 | } | |
671 | #endif | |
610a63fc JF |
672 | |
673 | /* VF devices should use default UP when available */ | |
674 | if (app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && | |
675 | app->protocol == 0) { | |
676 | int vf; | |
677 | ||
678 | adapter->default_up = app->priority; | |
679 | ||
680 | for (vf = 0; vf < adapter->num_vfs; vf++) { | |
681 | struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; | |
682 | ||
683 | if (!vfinfo->pf_qos) | |
684 | ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, | |
685 | app->priority, vf); | |
686 | } | |
687 | } | |
688 | ||
42532da6 JF |
689 | return 0; |
690 | } | |
691 | ||
692 | static int ixgbe_dcbnl_ieee_delapp(struct net_device *dev, | |
693 | struct dcb_app *app) | |
694 | { | |
695 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
696 | int err; | |
697 | ||
698 | if (!(adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)) | |
699 | return -EINVAL; | |
9372453e | 700 | |
42532da6 | 701 | err = dcb_ieee_delapp(dev, app); |
9372453e | 702 | |
42532da6 JF |
703 | #ifdef IXGBE_FCOE |
704 | if (!err && app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && | |
705 | app->protocol == ETH_P_FCOE) { | |
706 | u8 app_mask = dcb_ieee_getapp_mask(dev, app); | |
707 | ||
708 | if (app_mask & (1 << adapter->fcoe.up)) | |
709 | return err; | |
9372453e | 710 | |
42532da6 JF |
711 | adapter->fcoe.up = app_mask ? |
712 | ffs(app_mask) - 1 : IXGBE_FCOE_DEFTC; | |
713 | ixgbe_dcbnl_devreset(dev); | |
9372453e | 714 | } |
f8628d40 | 715 | #endif |
610a63fc JF |
716 | /* IF default priority is being removed clear VF default UP */ |
717 | if (app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE && | |
718 | app->protocol == 0 && adapter->default_up == app->priority) { | |
719 | int vf; | |
720 | long unsigned int app_mask = dcb_ieee_getapp_mask(dev, app); | |
721 | int qos = app_mask ? find_first_bit(&app_mask, 8) : 0; | |
722 | ||
723 | adapter->default_up = qos; | |
724 | ||
725 | for (vf = 0; vf < adapter->num_vfs; vf++) { | |
726 | struct vf_data_storage *vfinfo = &adapter->vfinfo[vf]; | |
727 | ||
728 | if (!vfinfo->pf_qos) | |
729 | ixgbe_set_vmvir(adapter, vfinfo->pf_vlan, | |
730 | qos, vf); | |
731 | } | |
732 | } | |
733 | ||
9372453e | 734 | return err; |
f8628d40 JF |
735 | } |
736 | ||
3032309b JF |
737 | static u8 ixgbe_dcbnl_getdcbx(struct net_device *dev) |
738 | { | |
739 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
740 | return adapter->dcbx_cap; | |
741 | } | |
742 | ||
743 | static u8 ixgbe_dcbnl_setdcbx(struct net_device *dev, u8 mode) | |
744 | { | |
745 | struct ixgbe_adapter *adapter = netdev_priv(dev); | |
746 | struct ieee_ets ets = {0}; | |
747 | struct ieee_pfc pfc = {0}; | |
89d27a3c | 748 | int err = 0; |
3032309b JF |
749 | |
750 | /* no support for LLD_MANAGED modes or CEE+IEEE */ | |
751 | if ((mode & DCB_CAP_DCBX_LLD_MANAGED) || | |
752 | ((mode & DCB_CAP_DCBX_VER_IEEE) && (mode & DCB_CAP_DCBX_VER_CEE)) || | |
753 | !(mode & DCB_CAP_DCBX_HOST)) | |
754 | return 1; | |
755 | ||
756 | if (mode == adapter->dcbx_cap) | |
757 | return 0; | |
758 | ||
759 | adapter->dcbx_cap = mode; | |
760 | ||
761 | /* ETS and PFC defaults */ | |
762 | ets.ets_cap = 8; | |
763 | pfc.pfc_cap = 8; | |
764 | ||
765 | if (mode & DCB_CAP_DCBX_VER_IEEE) { | |
766 | ixgbe_dcbnl_ieee_setets(dev, &ets); | |
767 | ixgbe_dcbnl_ieee_setpfc(dev, &pfc); | |
768 | } else if (mode & DCB_CAP_DCBX_VER_CEE) { | |
43497cc2 JF |
769 | u8 mask = BIT_PFC | BIT_PG_TX | BIT_PG_RX | BIT_APP_UPCHG; |
770 | ||
771 | adapter->dcb_set_bitmap |= mask; | |
3032309b JF |
772 | ixgbe_dcbnl_set_all(dev); |
773 | } else { | |
774 | /* Drop into single TC mode strict priority as this | |
775 | * indicates CEE and IEEE versions are disabled | |
776 | */ | |
777 | ixgbe_dcbnl_ieee_setets(dev, &ets); | |
778 | ixgbe_dcbnl_ieee_setpfc(dev, &pfc); | |
89d27a3c | 779 | err = ixgbe_setup_tc(dev, 0); |
3032309b JF |
780 | } |
781 | ||
89d27a3c | 782 | return err ? 1 : 0; |
3032309b JF |
783 | } |
784 | ||
32953543 | 785 | const struct dcbnl_rtnl_ops dcbnl_ops = { |
d033d526 JF |
786 | .ieee_getets = ixgbe_dcbnl_ieee_getets, |
787 | .ieee_setets = ixgbe_dcbnl_ieee_setets, | |
788 | .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc, | |
789 | .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc, | |
f8628d40 | 790 | .ieee_setapp = ixgbe_dcbnl_ieee_setapp, |
42532da6 | 791 | .ieee_delapp = ixgbe_dcbnl_ieee_delapp, |
2f90b865 AD |
792 | .getstate = ixgbe_dcbnl_get_state, |
793 | .setstate = ixgbe_dcbnl_set_state, | |
794 | .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr, | |
795 | .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx, | |
796 | .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx, | |
797 | .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx, | |
798 | .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx, | |
799 | .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx, | |
800 | .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx, | |
801 | .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx, | |
802 | .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx, | |
803 | .setpfccfg = ixgbe_dcbnl_set_pfc_cfg, | |
804 | .getpfccfg = ixgbe_dcbnl_get_pfc_cfg, | |
46132188 | 805 | .setall = ixgbe_dcbnl_set_all, |
33dbabc4 AD |
806 | .getcap = ixgbe_dcbnl_getcap, |
807 | .getnumtcs = ixgbe_dcbnl_getnumtcs, | |
0eb3aa9b AD |
808 | .setnumtcs = ixgbe_dcbnl_setnumtcs, |
809 | .getpfcstate = ixgbe_dcbnl_getpfcstate, | |
859ee3c4 | 810 | .setpfcstate = ixgbe_dcbnl_setpfcstate, |
6ee16520 | 811 | .getapp = ixgbe_dcbnl_getapp, |
3032309b JF |
812 | .getdcbx = ixgbe_dcbnl_getdcbx, |
813 | .setdcbx = ixgbe_dcbnl_setdcbx, | |
2f90b865 | 814 | }; |