[deliverable/linux.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf.h

/*******************************************************************************

  Intel 82599 Virtual Function driver
  Copyright(c) 1999 - 2012 Intel Corporation.

  This program is free software; you can redistribute it and/or modify it
  under the terms and conditions of the GNU General Public License,
  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License along with
  this program; if not, write to the Free Software Foundation, Inc.,
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in
  the file called "COPYING".

  Contact Information:
  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/

#ifndef _IXGBEVF_H_
#define _IXGBEVF_H_

#include <linux/types.h>
#include <linux/bitops.h>
#include <linux/timer.h>
#include <linux/io.h>
#include <linux/netdevice.h>
#include <linux/if_vlan.h>
#include <linux/u64_stats_sync.h>

#include "vf.h"

/* wrapper around a pointer to a socket buffer,
 * so a DMA handle can be stored along with the buffer */
struct ixgbevf_tx_buffer {
	struct sk_buff *skb;
	dma_addr_t dma;
	unsigned long time_stamp;
	u16 length;
	u16 next_to_watch;
	u16 mapped_as_page;
};

struct ixgbevf_rx_buffer {
	struct sk_buff *skb;
	dma_addr_t dma;
};

struct ixgbevf_ring {
	struct ixgbevf_ring *next;
	struct ixgbevf_adapter *adapter;  /* backlink */
	void *desc;			/* descriptor ring memory */
	dma_addr_t dma;			/* phys. address of descriptor ring */
	unsigned int size;		/* length in bytes */
	unsigned int count;		/* amount of descriptors */
	unsigned int next_to_use;
	unsigned int next_to_clean;

	int queue_index; /* needed for multiqueue queue management */
	union {
		struct ixgbevf_tx_buffer *tx_buffer_info;
		struct ixgbevf_rx_buffer *rx_buffer_info;
	};

	u64			total_bytes;
	u64			total_packets;
	struct u64_stats_sync	syncp;

	u16 head;
	u16 tail;

	u16 reg_idx; /* holds the special value that gets the hardware register
		      * offset associated with this ring, which is different
		      * for DCB and RSS modes */

	u16 rx_buf_len;
};

/* How many Rx Buffers do we bundle into one write to the hardware ? */
#define IXGBEVF_RX_BUFFER_WRITE	16	/* Must be power of 2 */

#define MAX_RX_QUEUES 1
#define MAX_TX_QUEUES 1

#define IXGBEVF_DEFAULT_TXD   1024
#define IXGBEVF_DEFAULT_RXD   512
#define IXGBEVF_MAX_TXD       4096
#define IXGBEVF_MIN_TXD       64
#define IXGBEVF_MAX_RXD       4096
#define IXGBEVF_MIN_RXD       64

/* Supported Rx Buffer Sizes */
#define IXGBEVF_RXBUFFER_256   256    /* Used for packet split */
#define IXGBEVF_RXBUFFER_2048  2048
#define IXGBEVF_MAX_RXBUFFER   16384  /* largest size for single descriptor */

#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256

#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)

#define IXGBE_TX_FLAGS_CSUM		(u32)(1)
#define IXGBE_TX_FLAGS_VLAN		(u32)(1 << 1)
#define IXGBE_TX_FLAGS_TSO		(u32)(1 << 2)
#define IXGBE_TX_FLAGS_IPV4		(u32)(1 << 3)
#define IXGBE_TX_FLAGS_FCOE		(u32)(1 << 4)
#define IXGBE_TX_FLAGS_FSO		(u32)(1 << 5)
#define IXGBE_TX_FLAGS_VLAN_MASK	0xffff0000
#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK	0x0000e000
#define IXGBE_TX_FLAGS_VLAN_SHIFT	16

struct ixgbevf_ring_container {
	struct ixgbevf_ring *ring;	/* pointer to linked list of rings */
	u8 count;			/* total number of rings in vector */
	u8 itr;				/* current ITR setting for ring */
};

/* iterator for handling rings in ring container */
#define ixgbevf_for_each_ring(pos, head) \
	for (pos = (head).ring; pos != NULL; pos = pos->next)

/* MAX_MSIX_Q_VECTORS of these are allocated,
 * but we only use one per queue-specific vector.
 */
struct ixgbevf_q_vector {
	struct ixgbevf_adapter *adapter;
	struct napi_struct napi;
	struct ixgbevf_ring_container rx, tx;
	u32 eitr;
	int v_idx;	  /* vector index in list */
	char name[IFNAMSIZ + 9];
};

/* Helper macros to switch between ints/sec and what the register uses.
 * And yes, it's the same math going both ways.  The lowest value
 * supported by all of the ixgbe hardware is 8.
 */
#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
	((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG

#define IXGBE_DESC_UNUSED(R) \
	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
	(R)->next_to_clean - (R)->next_to_use - 1)

#define IXGBE_RX_DESC_ADV(R, i)	    \
	(&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
#define IXGBE_TX_DESC_ADV(R, i)	    \
	(&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
#define IXGBE_TX_CTXTDESC_ADV(R, i)	    \
	(&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))

#define IXGBE_MAX_JUMBO_FRAME_SIZE        16128

#define OTHER_VECTOR 1
#define NON_Q_VECTORS (OTHER_VECTOR)

#define MAX_MSIX_Q_VECTORS 2

#define MIN_MSIX_Q_VECTORS 1
#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)

/* board specific private data structure */
struct ixgbevf_adapter {
	struct timer_list watchdog_timer;
	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
	u16 bd_number;
	struct work_struct reset_task;
	struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];

	/* Interrupt Throttle Rate */
	u32 itr_setting;

	/* TX */
	struct ixgbevf_ring *tx_ring;	/* One per active queue */
	int num_tx_queues;
	u16 tx_itr_setting;
	u64 restart_queue;
	u64 hw_csum_tx_good;
	u64 lsc_int;
	u64 hw_tso_ctxt;
	u64 hw_tso6_ctxt;
	u32 tx_timeout_count;

	/* RX */
	struct ixgbevf_ring *rx_ring;	/* One per active queue */
	int num_rx_queues;
	u16 rx_itr_setting;
	u64 hw_csum_rx_error;
	u64 hw_rx_no_dma_resources;
	u64 hw_csum_rx_good;
	u64 non_eop_descs;
	int num_msix_vectors;
	struct msix_entry *msix_entries;

	u32 alloc_rx_page_failed;
	u32 alloc_rx_buff_failed;

	/* Some features need tri-state capability,
	 * thus the additional *_CAPABLE flags.
	 */
	u32 flags;
#define IXGBE_FLAG_IN_WATCHDOG_TASK             (u32)(1)

	/* OS defined structs */
	struct net_device *netdev;
	struct pci_dev *pdev;

	/* structs defined in ixgbe_vf.h */
	struct ixgbe_hw hw;
	u16 msg_enable;
	struct ixgbevf_hw_stats stats;
	u64 zero_base;
	/* Interrupt Throttle Rate */
	u32 eitr_param;

	unsigned long state;
	u64 tx_busy;
	unsigned int tx_ring_count;
	unsigned int rx_ring_count;

	u32 link_speed;
	bool link_up;

	struct work_struct watchdog_task;
};

enum ixbgevf_state_t {
	__IXGBEVF_TESTING,
	__IXGBEVF_RESETTING,
	__IXGBEVF_DOWN
};

enum ixgbevf_boards {
	board_82599_vf,
	board_X540_vf,
};

extern const struct ixgbevf_info ixgbevf_82599_vf_info;
extern const struct ixgbevf_info ixgbevf_X540_vf_info;
extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;

/* needed by ethtool.c */
extern const char ixgbevf_driver_name[];
extern const char ixgbevf_driver_version[];

extern void ixgbevf_up(struct ixgbevf_adapter *adapter);
extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
				      struct ixgbevf_ring *);
extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
				      struct ixgbevf_ring *);
extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
				      struct ixgbevf_ring *);
extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
				      struct ixgbevf_ring *);
extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);

extern int ethtool_ioctl(struct ifreq *ifr);

extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);

#ifdef DEBUG
extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
#define hw_dbg(hw, format, arg...) \
	printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
#else
#define hw_dbg(hw, format, arg...) do {} while (0)
#endif

#endif /* _IXGBEVF_H_ */
Commit	Line	Data
92915f71 GR	1	/*******************************************************************************
	2
	3	Intel 82599 Virtual Function driver
5c47a2b6	4	Copyright(c) 1999 - 2012 Intel Corporation.
92915f71 GR	5
	6	This program is free software; you can redistribute it and/or modify it
	7	under the terms and conditions of the GNU General Public License,
	8	version 2, as published by the Free Software Foundation.
	9
	10	This program is distributed in the hope it will be useful, but WITHOUT
	11	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	more details.
	14
	15	You should have received a copy of the GNU General Public License along with
	16	this program; if not, write to the Free Software Foundation, Inc.,
	17	51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	18
	19	The full GNU General Public License is included in this distribution in
	20	the file called "COPYING".
	21
	22	Contact Information:
	23	e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
	24	Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	25
	26	*******************************************************************************/
	27
	28	#ifndef _IXGBEVF_H_
	29	#define _IXGBEVF_H_
	30
	31	#include <linux/types.h>
dadcd65f	32	#include <linux/bitops.h>
92915f71 GR	33	#include <linux/timer.h>
	34	#include <linux/io.h>
	35	#include <linux/netdevice.h>
dadcd65f	36	#include <linux/if_vlan.h>
4197aa7b	37	#include <linux/u64_stats_sync.h>
92915f71 GR	38
	39	#include "vf.h"
	40
	41	/* wrapper around a pointer to a socket buffer,
	42	* so a DMA handle can be stored along with the buffer */
	43	struct ixgbevf_tx_buffer {
	44	struct sk_buff *skb;
	45	dma_addr_t dma;
	46	unsigned long time_stamp;
	47	u16 length;
	48	u16 next_to_watch;
	49	u16 mapped_as_page;
	50	};
	51
	52	struct ixgbevf_rx_buffer {
	53	struct sk_buff *skb;
	54	dma_addr_t dma;
92915f71 GR	55	};
	56
	57	struct ixgbevf_ring {
6b43c446	58	struct ixgbevf_ring *next;
92915f71 GR	59	struct ixgbevf_adapter adapter; / backlink */
	60	void desc; / descriptor ring memory */
	61	dma_addr_t dma; /* phys. address of descriptor ring */
	62	unsigned int size; /* length in bytes */
	63	unsigned int count; /* amount of descriptors */
	64	unsigned int next_to_use;
	65	unsigned int next_to_clean;
	66
	67	int queue_index; /* needed for multiqueue queue management */
	68	union {
	69	struct ixgbevf_tx_buffer *tx_buffer_info;
	70	struct ixgbevf_rx_buffer *rx_buffer_info;
	71	};
	72
4197aa7b ED	73	u64 total_bytes;
	74	u64 total_packets;
	75	struct u64_stats_sync syncp;
	76
92915f71 GR	77	u16 head;
	78	u16 tail;
	79
92915f71 GR	80	u16 reg_idx; /* holds the special value that gets the hardware register
	81	* offset associated with this ring, which is different
	82	* for DCB and RSS modes */
	83
92915f71 GR	84	u16 rx_buf_len;
	85	};
	86
92915f71 GR	87	/* How many Rx Buffers do we bundle into one write to the hardware ? */
	88	#define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
	89
	90	#define MAX_RX_QUEUES 1
	91	#define MAX_TX_QUEUES 1
	92
	93	#define IXGBEVF_DEFAULT_TXD 1024
	94	#define IXGBEVF_DEFAULT_RXD 512
	95	#define IXGBEVF_MAX_TXD 4096
	96	#define IXGBEVF_MIN_TXD 64
	97	#define IXGBEVF_MAX_RXD 4096
	98	#define IXGBEVF_MIN_RXD 64
	99
	100	/* Supported Rx Buffer Sizes */
92915f71 GR	101	#define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
	102	#define IXGBEVF_RXBUFFER_2048 2048
	103	#define IXGBEVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
	104
	105	#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
	106
	107	#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
	108
	109	#define IXGBE_TX_FLAGS_CSUM (u32)(1)
	110	#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
	111	#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
	112	#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
	113	#define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
	114	#define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
	115	#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
	116	#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
	117	#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
	118
6b43c446 AD	119	struct ixgbevf_ring_container {
	120	struct ixgbevf_ring ring; / pointer to linked list of rings */
	121	u8 count; /* total number of rings in vector */
	122	u8 itr; /* current ITR setting for ring */
	123	};
	124
	125	/* iterator for handling rings in ring container */
	126	#define ixgbevf_for_each_ring(pos, head) \
	127	for (pos = (head).ring; pos != NULL; pos = pos->next)
	128
92915f71 GR	129	/* MAX_MSIX_Q_VECTORS of these are allocated,
	130	* but we only use one per queue-specific vector.
	131	*/
	132	struct ixgbevf_q_vector {
	133	struct ixgbevf_adapter *adapter;
	134	struct napi_struct napi;
6b43c446	135	struct ixgbevf_ring_container rx, tx;
92915f71 GR	136	u32 eitr;
92915f71 GR	137	int v_idx; /* vector index in list */
fa71ae27	138	char name[IFNAMSIZ + 9];
92915f71 GR	139	};
	140
	141	/* Helper macros to switch between ints/sec and what the register uses.
	142	* And yes, it's the same math going both ways. The lowest value
	143	* supported by all of the ixgbe hardware is 8.
	144	*/
	145	#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
	146	((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
	147	#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
	148
	149	#define IXGBE_DESC_UNUSED(R) \
	150	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
	151	(R)->next_to_clean - (R)->next_to_use - 1)
	152
	153	#define IXGBE_RX_DESC_ADV(R, i) \
	154	(&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
	155	#define IXGBE_TX_DESC_ADV(R, i) \
	156	(&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
	157	#define IXGBE_TX_CTXTDESC_ADV(R, i) \
	158	(&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
	159
	160	#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
	161
	162	#define OTHER_VECTOR 1
	163	#define NON_Q_VECTORS (OTHER_VECTOR)
	164
	165	#define MAX_MSIX_Q_VECTORS 2
92915f71	166
fa71ae27	167	#define MIN_MSIX_Q_VECTORS 1
92915f71 GR	168	#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
	169
	170	/* board specific private data structure */
	171	struct ixgbevf_adapter {
	172	struct timer_list watchdog_timer;
dadcd65f	173	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
92915f71 GR	174	u16 bd_number;
	175	struct work_struct reset_task;
	176	struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
92915f71 GR	177
	178	/* Interrupt Throttle Rate */
	179	u32 itr_setting;
92915f71 GR	180
	181	/* TX */
	182	struct ixgbevf_ring tx_ring; / One per active queue */
	183	int num_tx_queues;
fa71ae27	184	u16 tx_itr_setting;
92915f71 GR	185	u64 restart_queue;
	186	u64 hw_csum_tx_good;
	187	u64 lsc_int;
	188	u64 hw_tso_ctxt;
	189	u64 hw_tso6_ctxt;
	190	u32 tx_timeout_count;
92915f71 GR	191
	192	/* RX */
	193	struct ixgbevf_ring rx_ring; / One per active queue */
	194	int num_rx_queues;
fa71ae27	195	u16 rx_itr_setting;
92915f71 GR	196	u64 hw_csum_rx_error;
	197	u64 hw_rx_no_dma_resources;
	198	u64 hw_csum_rx_good;
	199	u64 non_eop_descs;
	200	int num_msix_vectors;
92915f71 GR	201	struct msix_entry *msix_entries;
92915f71 GR	202
92915f71 GR	203	u32 alloc_rx_page_failed;
	204	u32 alloc_rx_buff_failed;
	205
	206	/* Some features need tri-state capability,
	207	* thus the additional *_CAPABLE flags.
	208	*/
	209	u32 flags;
525a940c	210	#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1)
77d5dfca	211
92915f71 GR	212	/* OS defined structs */
	213	struct net_device *netdev;
	214	struct pci_dev *pdev;
92915f71 GR	215
	216	/* structs defined in ixgbe_vf.h */
	217	struct ixgbe_hw hw;
	218	u16 msg_enable;
	219	struct ixgbevf_hw_stats stats;
	220	u64 zero_base;
	221	/* Interrupt Throttle Rate */
	222	u32 eitr_param;
	223
	224	unsigned long state;
92915f71 GR	225	u64 tx_busy;
	226	unsigned int tx_ring_count;
	227	unsigned int rx_ring_count;
	228
	229	u32 link_speed;
	230	bool link_up;
92915f71 GR	231
92915f71 GR	232	struct work_struct watchdog_task;
92915f71 GR	233	};
	234
	235	enum ixbgevf_state_t {
	236	__IXGBEVF_TESTING,
	237	__IXGBEVF_RESETTING,
	238	__IXGBEVF_DOWN
	239	};
	240
	241	enum ixgbevf_boards {
	242	board_82599_vf,
2316aa2a	243	board_X540_vf,
92915f71 GR	244	};
92915f71 GR	245
3d8fe98f SH	246	extern const struct ixgbevf_info ixgbevf_82599_vf_info;
3d8fe98f SH	247	extern const struct ixgbevf_info ixgbevf_X540_vf_info;
b5417bf8	248	extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
92915f71 GR	249
92915f71 GR	250	/* needed by ethtool.c */
3d8fe98f	251	extern const char ixgbevf_driver_name[];
92915f71 GR	252	extern const char ixgbevf_driver_version[];
92915f71 GR	253
795180d8	254	extern void ixgbevf_up(struct ixgbevf_adapter *adapter);
92915f71 GR	255	extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
	256	extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
	257	extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
	258	extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
	259	extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
	260	struct ixgbevf_ring *);
	261	extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
	262	struct ixgbevf_ring *);
	263	extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
	264	struct ixgbevf_ring *);
	265	extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
	266	struct ixgbevf_ring *);
	267	extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
	268
92915f71 GR	269	extern int ethtool_ioctl(struct ifreq *ifr);
92915f71 GR	270
92915f71 GR	271	extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
	272	extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
	273
	274	#ifdef DEBUG
	275	extern char ixgbevf_get_hw_dev_name(struct ixgbe_hw hw);
	276	#define hw_dbg(hw, format, arg...) \
	277	printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
	278	#else
	279	#define hw_dbg(hw, format, arg...) do {} while (0)
	280	#endif
	281
	282	#endif /* _IXGBEVF_H_ */