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ixgbevf: add support for X550 VFs
[deliverable/linux.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
2e7cfbdd 4 Copyright(c) 1999 - 2014 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
dbd9636e
JK		 32
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
92915f71 35#include <linux/types.h>
dadcd65f 36#include <linux/bitops.h>
92915f71
GR		 37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
70a10e25 45#include <linux/sctp.h>
92915f71 46#include <linux/ipv6.h>
5a0e3ad6 47#include <linux/slab.h>
92915f71
GR		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
01789349 51#include <linux/if.h>
92915f71 52#include <linux/if_vlan.h>
70c71606 53#include <linux/prefetch.h>
92915f71
GR		 54
55#include "ixgbevf.h"
56
3d8fe98f 57const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 58static const char ixgbevf_driver_string[] =
422e05d1 59 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 60
86f359f6 61#define DRV_VERSION "2.12.1-k"
92915f71 62const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 63static char ixgbevf_copyright[] =
5c47a2b6 64 "Copyright (c) 2009 - 2012 Intel Corporation.";
92915f71
GR		 65
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 67 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
47068b0d
ET		 69 [board_X550_vf] = &ixgbevf_X550_vf_info,
70 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
92915f71
GR		 71};
72
73/* ixgbevf_pci_tbl - PCI Device ID Table
74 *
75 * Wildcard entries (PCI_ANY_ID) should come last
76 * Last entry must be all 0s
77 *
78 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
79 * Class, Class Mask, private data (not used) }
80 */
9baa3c34 81static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4
SH		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
47068b0d
ET		 84 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
92915f71
GR		 86 /* required last entry */
87 {0, }
88};
89MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
90
91MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 92MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
92915f71
GR		 93MODULE_LICENSE("GPL");
94MODULE_VERSION(DRV_VERSION);
95
b3f4d599 96#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
97static int debug = -1;
98module_param(debug, int, 0);
99MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71
GR		 100
101/* forward decls */
220fe050 102static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 103static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 104static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 105
dbf8b0d8
MR		 106static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
107{
108 struct ixgbevf_adapter *adapter = hw->back;
109
110 if (!hw->hw_addr)
111 return;
112 hw->hw_addr = NULL;
113 dev_err(&adapter->pdev->dev, "Adapter removed\n");
ea699569
MR		 114 if (test_bit(__IXGBEVF_WORK_INIT, &adapter->state))
115 schedule_work(&adapter->watchdog_task);
dbf8b0d8
MR		 116}
117
118static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
119{
120 u32 value;
121
122 /* The following check not only optimizes a bit by not
123 * performing a read on the status register when the
124 * register just read was a status register read that
125 * returned IXGBE_FAILED_READ_REG. It also blocks any
126 * potential recursion.
127 */
128 if (reg == IXGBE_VFSTATUS) {
129 ixgbevf_remove_adapter(hw);
130 return;
131 }
32c74949 132 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 133 if (value == IXGBE_FAILED_READ_REG)
134 ixgbevf_remove_adapter(hw);
135}
136
32c74949 137u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8
MR		 138{
139 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
140 u32 value;
141
142 if (IXGBE_REMOVED(reg_addr))
143 return IXGBE_FAILED_READ_REG;
144 value = readl(reg_addr + reg);
145 if (unlikely(value == IXGBE_FAILED_READ_REG))
146 ixgbevf_check_remove(hw, reg);
147 return value;
148}
149
49ce9c2c 150/**
65d676c8 151 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 152 * @adapter: pointer to adapter struct
153 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
154 * @queue: queue to map the corresponding interrupt to
155 * @msix_vector: the vector to map to the corresponding queue
92915f71
GR		 156 */
157static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
158 u8 queue, u8 msix_vector)
159{
160 u32 ivar, index;
161 struct ixgbe_hw *hw = &adapter->hw;
162 if (direction == -1) {
163 /* other causes */
164 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
165 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
166 ivar &= ~0xFF;
167 ivar |= msix_vector;
168 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
169 } else {
170 /* tx or rx causes */
171 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
172 index = ((16 * (queue & 1)) + (8 * direction));
173 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
174 ivar &= ~(0xFF << index);
175 ivar |= (msix_vector << index);
176 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
177 }
178}
179
70a10e25 180static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
ET		 181 struct ixgbevf_tx_buffer *tx_buffer)
182{
183 if (tx_buffer->skb) {
184 dev_kfree_skb_any(tx_buffer->skb);
185 if (dma_unmap_len(tx_buffer, len))
70a10e25 186 dma_unmap_single(tx_ring->dev,
9bdfefd2
ET		 187 dma_unmap_addr(tx_buffer, dma),
188 dma_unmap_len(tx_buffer, len),
2a1f8794 189 DMA_TO_DEVICE);
9bdfefd2
ET		 190 } else if (dma_unmap_len(tx_buffer, len)) {
191 dma_unmap_page(tx_ring->dev,
192 dma_unmap_addr(tx_buffer, dma),
193 dma_unmap_len(tx_buffer, len),
194 DMA_TO_DEVICE);
92915f71 195 }
9bdfefd2
ET		 196 tx_buffer->next_to_watch = NULL;
197 tx_buffer->skb = NULL;
198 dma_unmap_len_set(tx_buffer, len, 0);
199 /* tx_buffer must be completely set up in the transmit path */
92915f71
GR		 200}
201
92915f71
GR		 202#define IXGBE_MAX_TXD_PWR 14
203#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
204
205/* Tx Descriptors needed, worst case */
3595990a
AD		 206#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
207#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
92915f71
GR		 208
209static void ixgbevf_tx_timeout(struct net_device *netdev);
210
211/**
212 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 213 * @q_vector: board private structure
92915f71
GR		 214 * @tx_ring: tx ring to clean
215 **/
fa71ae27 216static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 217 struct ixgbevf_ring *tx_ring)
218{
fa71ae27 219 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 220 struct ixgbevf_tx_buffer *tx_buffer;
221 union ixgbe_adv_tx_desc *tx_desc;
92915f71 222 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
ET		 223 unsigned int budget = tx_ring->count / 2;
224 unsigned int i = tx_ring->next_to_clean;
92915f71 225
10cc1bdd
AD		 226 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
227 return true;
228
7ad1a093
ET		 229 tx_buffer = &tx_ring->tx_buffer_info[i];
230 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
231 i -= tx_ring->count;
92915f71 232
e757e3e1 233 do {
7ad1a093 234 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 235
236 /* if next_to_watch is not set then there is no work pending */
237 if (!eop_desc)
238 break;
239
240 /* prevent any other reads prior to eop_desc */
241 read_barrier_depends();
242
243 /* if DD is not set pending work has not been completed */
244 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
245 break;
246
247 /* clear next_to_watch to prevent false hangs */
7ad1a093 248 tx_buffer->next_to_watch = NULL;
e757e3e1 249
7ad1a093
ET		 250 /* update the statistics for this packet */
251 total_bytes += tx_buffer->bytecount;
252 total_packets += tx_buffer->gso_segs;
92915f71 253
9bdfefd2
ET		 254 /* free the skb */
255 dev_kfree_skb_any(tx_buffer->skb);
256
257 /* unmap skb header data */
258 dma_unmap_single(tx_ring->dev,
259 dma_unmap_addr(tx_buffer, dma),
260 dma_unmap_len(tx_buffer, len),
261 DMA_TO_DEVICE);
262
7ad1a093 263 /* clear tx_buffer data */
9bdfefd2
ET		 264 tx_buffer->skb = NULL;
265 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 266
7ad1a093
ET		 267 /* unmap remaining buffers */
268 while (tx_desc != eop_desc) {
7ad1a093
ET		 269 tx_buffer++;
270 tx_desc++;
92915f71 271 i++;
7ad1a093
ET		 272 if (unlikely(!i)) {
273 i -= tx_ring->count;
274 tx_buffer = tx_ring->tx_buffer_info;
275 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
276 }
e757e3e1 277
9bdfefd2
ET		 278 /* unmap any remaining paged data */
279 if (dma_unmap_len(tx_buffer, len)) {
280 dma_unmap_page(tx_ring->dev,
281 dma_unmap_addr(tx_buffer, dma),
282 dma_unmap_len(tx_buffer, len),
283 DMA_TO_DEVICE);
284 dma_unmap_len_set(tx_buffer, len, 0);
285 }
92915f71
GR		 286 }
287
7ad1a093
ET		 288 /* move us one more past the eop_desc for start of next pkt */
289 tx_buffer++;
290 tx_desc++;
291 i++;
292 if (unlikely(!i)) {
293 i -= tx_ring->count;
294 tx_buffer = tx_ring->tx_buffer_info;
295 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
296 }
297
298 /* issue prefetch for next Tx descriptor */
299 prefetch(tx_desc);
300
301 /* update budget accounting */
302 budget--;
303 } while (likely(budget));
304
305 i += tx_ring->count;
92915f71 306 tx_ring->next_to_clean = i;
7ad1a093
ET		 307 u64_stats_update_begin(&tx_ring->syncp);
308 tx_ring->stats.bytes += total_bytes;
309 tx_ring->stats.packets += total_packets;
310 u64_stats_update_end(&tx_ring->syncp);
311 q_vector->tx.total_bytes += total_bytes;
312 q_vector->tx.total_packets += total_packets;
92915f71
GR		 313
314#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 315 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 316 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 317 /* Make sure that anybody stopping the queue after this
318 * sees the new next_to_clean.
319 */
320 smp_mb();
7ad1a093 321
fb40195c
AD		 322 if (__netif_subqueue_stopped(tx_ring->netdev,
323 tx_ring->queue_index) &&
92915f71 324 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 325 netif_wake_subqueue(tx_ring->netdev,
326 tx_ring->queue_index);
7ad1a093 327 ++tx_ring->tx_stats.restart_queue;
92915f71 328 }
92915f71
GR		 329 }
330
7ad1a093 331 return !!budget;
92915f71
GR		 332}
333
08681618
JK		 334/**
335 * ixgbevf_rx_skb - Helper function to determine proper Rx method
336 * @q_vector: structure containing interrupt and ring information
337 * @skb: packet to send up
08681618
JK		 338 **/
339static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 340 struct sk_buff *skb)
08681618 341{
c777cdfa
JK		 342#ifdef CONFIG_NET_RX_BUSY_POLL
343 skb_mark_napi_id(skb, &q_vector->napi);
344
345 if (ixgbevf_qv_busy_polling(q_vector)) {
346 netif_receive_skb(skb);
347 /* exit early if we busy polled */
348 return;
349 }
350#endif /* CONFIG_NET_RX_BUSY_POLL */
688ff32d
ET		 351
352 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 353}
354
ec62fe26
ET		 355/* ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
356 * @ring: structure containig ring specific data
357 * @rx_desc: current Rx descriptor being processed
92915f71 358 * @skb: skb currently being received and modified
ec62fe26 359 */
55fb277c 360static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 361 union ixgbe_adv_rx_desc *rx_desc,
362 struct sk_buff *skb)
92915f71 363{
bc8acf2c 364 skb_checksum_none_assert(skb);
92915f71
GR		 365
366 /* Rx csum disabled */
fb40195c 367 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 368 return;
369
370 /* if IP and error */
ec62fe26
ET		 371 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
372 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 373 ring->rx_stats.csum_err++;
92915f71
GR		 374 return;
375 }
376
ec62fe26 377 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 378 return;
379
ec62fe26 380 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 381 ring->rx_stats.csum_err++;
92915f71
GR		 382 return;
383 }
384
385 /* It must be a TCP or UDP packet with a valid checksum */
386 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 387}
388
dff80520
ET		 389/* ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
390 * @rx_ring: rx descriptor ring packet is being transacted on
391 * @rx_desc: pointer to the EOP Rx descriptor
392 * @skb: pointer to current skb being populated
393 *
394 * This function checks the ring, descriptor, and packet information in
395 * order to populate the checksum, VLAN, protocol, and other fields within
396 * the skb.
397 */
398static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
399 union ixgbe_adv_rx_desc *rx_desc,
400 struct sk_buff *skb)
401{
402 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
403
404 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
405 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
406 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
407
408 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
409 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
410 }
411
412 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
413}
414
4b95fe3d
ET		 415/**
416 * ixgbevf_is_non_eop - process handling of non-EOP buffers
417 * @rx_ring: Rx ring being processed
418 * @rx_desc: Rx descriptor for current buffer
419 * @skb: current socket buffer containing buffer in progress
420 *
421 * This function updates next to clean. If the buffer is an EOP buffer
422 * this function exits returning false, otherwise it will place the
423 * sk_buff in the next buffer to be chained and return true indicating
424 * that this is in fact a non-EOP buffer.
425 **/
426static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 427 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 428{
429 u32 ntc = rx_ring->next_to_clean + 1;
430
431 /* fetch, update, and store next to clean */
432 ntc = (ntc < rx_ring->count) ? ntc : 0;
433 rx_ring->next_to_clean = ntc;
434
435 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
436
437 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
438 return false;
439
440 return true;
441}
442
bad17234
ET		 443static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
444 struct ixgbevf_rx_buffer *bi)
bafa578f 445{
bad17234 446 struct page *page = bi->page;
bafa578f
ET		 447 dma_addr_t dma = bi->dma;
448
bad17234
ET		 449 /* since we are recycling buffers we should seldom need to alloc */
450 if (likely(page))
bafa578f
ET		 451 return true;
452
bad17234
ET		 453 /* alloc new page for storage */
454 page = dev_alloc_page();
455 if (unlikely(!page)) {
456 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 457 return false;
458 }
459
bad17234
ET		 460 /* map page for use */
461 dma = dma_map_page(rx_ring->dev, page, 0,
462 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET		 463
464 /* if mapping failed free memory back to system since
465 * there isn't much point in holding memory we can't use
466 */
467 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 468 __free_page(page);
bafa578f
ET		 469
470 rx_ring->rx_stats.alloc_rx_buff_failed++;
471 return false;
472 }
473
bafa578f 474 bi->dma = dma;
bad17234
ET		 475 bi->page = page;
476 bi->page_offset = 0;
bafa578f
ET		 477
478 return true;
479}
480
92915f71
GR		 481/**
482 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 483 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 484 * @cleaned_count: number of buffers to replace
92915f71 485 **/
095e2617 486static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 487 u16 cleaned_count)
92915f71 488{
92915f71
GR		 489 union ixgbe_adv_rx_desc *rx_desc;
490 struct ixgbevf_rx_buffer *bi;
fb40195c 491 unsigned int i = rx_ring->next_to_use;
92915f71 492
bafa578f
ET		 493 /* nothing to do or no valid netdev defined */
494 if (!cleaned_count || !rx_ring->netdev)
495 return;
b9dd245b 496
bafa578f
ET		 497 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
498 bi = &rx_ring->rx_buffer_info[i];
499 i -= rx_ring->count;
05d063aa 500
bafa578f 501 do {
bad17234 502 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 503 break;
b9dd245b 504
bafa578f
ET		 505 /* Refresh the desc even if pkt_addr didn't change
506 * because each write-back erases this info.
507 */
bad17234 508 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 509
bafa578f
ET		 510 rx_desc++;
511 bi++;
92915f71 512 i++;
bafa578f
ET		 513 if (unlikely(!i)) {
514 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
515 bi = rx_ring->rx_buffer_info;
516 i -= rx_ring->count;
517 }
518
519 /* clear the hdr_addr for the next_to_use descriptor */
520 rx_desc->read.hdr_addr = 0;
521
522 cleaned_count--;
523 } while (cleaned_count);
524
525 i += rx_ring->count;
92915f71 526
bafa578f
ET		 527 if (rx_ring->next_to_use != i) {
528 /* record the next descriptor to use */
529 rx_ring->next_to_use = i;
530
bad17234
ET		 531 /* update next to alloc since we have filled the ring */
532 rx_ring->next_to_alloc = i;
533
bafa578f
ET		 534 /* Force memory writes to complete before letting h/w
535 * know there are new descriptors to fetch. (Only
536 * applicable for weak-ordered memory model archs,
537 * such as IA-64).
538 */
539 wmb();
540 ixgbevf_write_tail(rx_ring, i);
541 }
92915f71
GR		 542}
543
bad17234
ET		 544/* ixgbevf_pull_tail - ixgbevf specific version of skb_pull_tail
545 * @rx_ring: rx descriptor ring packet is being transacted on
546 * @skb: pointer to current skb being adjusted
547 *
548 * This function is an ixgbevf specific version of __pskb_pull_tail. The
549 * main difference between this version and the original function is that
550 * this function can make several assumptions about the state of things
551 * that allow for significant optimizations versus the standard function.
552 * As a result we can do things like drop a frag and maintain an accurate
553 * truesize for the skb.
554 */
555static void ixgbevf_pull_tail(struct ixgbevf_ring *rx_ring,
556 struct sk_buff *skb)
557{
558 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
559 unsigned char *va;
560 unsigned int pull_len;
561
562 /* it is valid to use page_address instead of kmap since we are
563 * working with pages allocated out of the lomem pool per
564 * alloc_page(GFP_ATOMIC)
565 */
566 va = skb_frag_address(frag);
567
568 /* we need the header to contain the greater of either ETH_HLEN or
569 * 60 bytes if the skb->len is less than 60 for skb_pad.
570 */
571 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
572
573 /* align pull length to size of long to optimize memcpy performance */
574 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
575
576 /* update all of the pointers */
577 skb_frag_size_sub(frag, pull_len);
578 frag->page_offset += pull_len;
579 skb->data_len -= pull_len;
580 skb->tail += pull_len;
581}
582
583/* ixgbevf_cleanup_headers - Correct corrupted or empty headers
584 * @rx_ring: rx descriptor ring packet is being transacted on
585 * @rx_desc: pointer to the EOP Rx descriptor
586 * @skb: pointer to current skb being fixed
587 *
588 * Check for corrupted packet headers caused by senders on the local L2
589 * embedded NIC switch not setting up their Tx Descriptors right. These
590 * should be very rare.
591 *
592 * Also address the case where we are pulling data in on pages only
593 * and as such no data is present in the skb header.
594 *
595 * In addition if skb is not at least 60 bytes we need to pad it so that
596 * it is large enough to qualify as a valid Ethernet frame.
597 *
598 * Returns true if an error was encountered and skb was freed.
599 */
600static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
601 union ixgbe_adv_rx_desc *rx_desc,
602 struct sk_buff *skb)
603{
604 /* verify that the packet does not have any known errors */
605 if (unlikely(ixgbevf_test_staterr(rx_desc,
606 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
607 struct net_device *netdev = rx_ring->netdev;
608
609 if (!(netdev->features & NETIF_F_RXALL)) {
610 dev_kfree_skb_any(skb);
611 return true;
612 }
613 }
614
615 /* place header in linear portion of buffer */
616 if (skb_is_nonlinear(skb))
617 ixgbevf_pull_tail(rx_ring, skb);
618
619 /* if skb_pad returns an error the skb was freed */
620 if (unlikely(skb->len < 60)) {
621 int pad_len = 60 - skb->len;
622
623 if (skb_pad(skb, pad_len))
624 return true;
625 __skb_put(skb, pad_len);
626 }
627
628 return false;
629}
630
631/* ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
632 * @rx_ring: rx descriptor ring to store buffers on
633 * @old_buff: donor buffer to have page reused
634 *
635 * Synchronizes page for reuse by the adapter
636 */
637static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
638 struct ixgbevf_rx_buffer *old_buff)
639{
640 struct ixgbevf_rx_buffer *new_buff;
641 u16 nta = rx_ring->next_to_alloc;
642
643 new_buff = &rx_ring->rx_buffer_info[nta];
644
645 /* update, and store next to alloc */
646 nta++;
647 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
648
649 /* transfer page from old buffer to new buffer */
650 new_buff->page = old_buff->page;
651 new_buff->dma = old_buff->dma;
652 new_buff->page_offset = old_buff->page_offset;
653
654 /* sync the buffer for use by the device */
655 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
656 new_buff->page_offset,
657 IXGBEVF_RX_BUFSZ,
658 DMA_FROM_DEVICE);
659}
660
661static inline bool ixgbevf_page_is_reserved(struct page *page)
662{
663 return (page_to_nid(page) != numa_mem_id()) || page->pfmemalloc;
664}
665
666/* ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
667 * @rx_ring: rx descriptor ring to transact packets on
668 * @rx_buffer: buffer containing page to add
669 * @rx_desc: descriptor containing length of buffer written by hardware
670 * @skb: sk_buff to place the data into
671 *
672 * This function will add the data contained in rx_buffer->page to the skb.
673 * This is done either through a direct copy if the data in the buffer is
674 * less than the skb header size, otherwise it will just attach the page as
675 * a frag to the skb.
676 *
677 * The function will then update the page offset if necessary and return
678 * true if the buffer can be reused by the adapter.
679 */
680static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
681 struct ixgbevf_rx_buffer *rx_buffer,
682 union ixgbe_adv_rx_desc *rx_desc,
683 struct sk_buff *skb)
684{
685 struct page *page = rx_buffer->page;
686 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
687#if (PAGE_SIZE < 8192)
688 unsigned int truesize = IXGBEVF_RX_BUFSZ;
689#else
690 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
691#endif
692
693 if ((size <= IXGBEVF_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
694 unsigned char *va = page_address(page) + rx_buffer->page_offset;
695
696 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
697
698 /* page is not reserved, we can reuse buffer as is */
699 if (likely(!ixgbevf_page_is_reserved(page)))
700 return true;
701
702 /* this page cannot be reused so discard it */
703 put_page(page);
704 return false;
705 }
706
707 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
708 rx_buffer->page_offset, size, truesize);
709
710 /* avoid re-using remote pages */
711 if (unlikely(ixgbevf_page_is_reserved(page)))
712 return false;
713
714#if (PAGE_SIZE < 8192)
715 /* if we are only owner of page we can reuse it */
716 if (unlikely(page_count(page) != 1))
717 return false;
718
719 /* flip page offset to other buffer */
720 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
721
722#else
723 /* move offset up to the next cache line */
724 rx_buffer->page_offset += truesize;
725
726 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
727 return false;
728
729#endif
730 /* Even if we own the page, we are not allowed to use atomic_set()
731 * This would break get_page_unless_zero() users.
732 */
733 atomic_inc(&page->_count);
734
735 return true;
736}
737
738static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
739 union ixgbe_adv_rx_desc *rx_desc,
740 struct sk_buff *skb)
741{
742 struct ixgbevf_rx_buffer *rx_buffer;
743 struct page *page;
744
745 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
746 page = rx_buffer->page;
747 prefetchw(page);
748
749 if (likely(!skb)) {
750 void *page_addr = page_address(page) +
751 rx_buffer->page_offset;
752
753 /* prefetch first cache line of first page */
754 prefetch(page_addr);
755#if L1_CACHE_BYTES < 128
756 prefetch(page_addr + L1_CACHE_BYTES);
757#endif
758
759 /* allocate a skb to store the frags */
760 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
761 IXGBEVF_RX_HDR_SIZE);
762 if (unlikely(!skb)) {
763 rx_ring->rx_stats.alloc_rx_buff_failed++;
764 return NULL;
765 }
766
767 /* we will be copying header into skb->data in
768 * pskb_may_pull so it is in our interest to prefetch
769 * it now to avoid a possible cache miss
770 */
771 prefetchw(skb->data);
772 }
773
774 /* we are reusing so sync this buffer for CPU use */
775 dma_sync_single_range_for_cpu(rx_ring->dev,
776 rx_buffer->dma,
777 rx_buffer->page_offset,
778 IXGBEVF_RX_BUFSZ,
779 DMA_FROM_DEVICE);
780
781 /* pull page into skb */
782 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
783 /* hand second half of page back to the ring */
784 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
785 } else {
786 /* we are not reusing the buffer so unmap it */
787 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
788 PAGE_SIZE, DMA_FROM_DEVICE);
789 }
790
791 /* clear contents of buffer_info */
792 rx_buffer->dma = 0;
793 rx_buffer->page = NULL;
794
795 return skb;
796}
797
92915f71 798static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 799 u32 qmask)
92915f71 800{
92915f71
GR		 801 struct ixgbe_hw *hw = &adapter->hw;
802
5f3600eb 803 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 804}
805
08e50a20
JK		 806static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
807 struct ixgbevf_ring *rx_ring,
808 int budget)
92915f71 809{
92915f71 810 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 811 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 812 struct sk_buff *skb = rx_ring->skb;
92915f71 813
6622402a 814 while (likely(total_rx_packets < budget)) {
4b95fe3d 815 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 816
0579eefc
ET		 817 /* return some buffers to hardware, one at a time is too slow */
818 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
819 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
820 cleaned_count = 0;
821 }
822
bad17234 823 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET		 824
825 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 826 break;
92915f71 827
0579eefc
ET		 828 /* This memory barrier is needed to keep us from reading
829 * any other fields out of the rx_desc until we know the
830 * RXD_STAT_DD bit is set
831 */
832 rmb();
ec62fe26 833
bad17234
ET		 834 /* retrieve a buffer from the ring */
835 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 836
bad17234
ET		 837 /* exit if we failed to retrieve a buffer */
838 if (!skb)
839 break;
92915f71 840
b97fe3b1
ET		 841 cleaned_count++;
842
bad17234
ET		 843 /* fetch next buffer in frame if non-eop */
844 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 845 continue;
5c60f81a 846
bad17234
ET		 847 /* verify the packet layout is correct */
848 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
849 skb = NULL;
0579eefc 850 continue;
92915f71
GR		 851 }
852
92915f71
GR		 853 /* probably a little skewed due to removing CRC */
854 total_rx_bytes += skb->len;
92915f71 855
815cccbf
JF		 856 /* Workaround hardware that can't do proper VEPA multicast
857 * source pruning.
858 */
bd9d5592
FF		 859 if ((skb->pkt_type == PACKET_BROADCAST ||
860 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 861 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 862 eth_hdr(skb)->h_source)) {
815cccbf 863 dev_kfree_skb_irq(skb);
0579eefc 864 continue;
815cccbf
JF		 865 }
866
dff80520
ET		 867 /* populate checksum, VLAN, and protocol */
868 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
869
870 ixgbevf_rx_skb(q_vector, skb);
92915f71 871
bad17234
ET		 872 /* reset skb pointer */
873 skb = NULL;
874
0579eefc 875 /* update budget accounting */
6622402a
ET		 876 total_rx_packets++;
877 }
92915f71 878
bad17234
ET		 879 /* place incomplete frames back on ring for completion */
880 rx_ring->skb = skb;
881
4197aa7b 882 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 883 rx_ring->stats.packets += total_rx_packets;
884 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 885 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 886 q_vector->rx.total_packets += total_rx_packets;
887 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 888
08e50a20 889 return total_rx_packets;
92915f71
GR		 890}
891
892/**
fa71ae27 893 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 894 * @napi: napi struct with our devices info in it
895 * @budget: amount of work driver is allowed to do this pass, in packets
896 *
fa71ae27 897 * This function will clean more than one or more rings associated with a
92915f71
GR		 898 * q_vector.
899 **/
fa71ae27 900static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 901{
902 struct ixgbevf_q_vector *q_vector =
903 container_of(napi, struct ixgbevf_q_vector, napi);
904 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27
AD		 905 struct ixgbevf_ring *ring;
906 int per_ring_budget;
907 bool clean_complete = true;
908
909 ixgbevf_for_each_ring(ring, q_vector->tx)
910 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71 911
c777cdfa
JK		 912#ifdef CONFIG_NET_RX_BUSY_POLL
913 if (!ixgbevf_qv_lock_napi(q_vector))
914 return budget;
915#endif
916
92915f71
GR		 917 /* attempt to distribute budget to each queue fairly, but don't allow
918 * the budget to go below 1 because we'll exit polling */
fa71ae27
AD		 919 if (q_vector->rx.count > 1)
920 per_ring_budget = max(budget/q_vector->rx.count, 1);
921 else
922 per_ring_budget = budget;
923
924 ixgbevf_for_each_ring(ring, q_vector->rx)
08e50a20
JK		 925 clean_complete &= (ixgbevf_clean_rx_irq(q_vector, ring,
926 per_ring_budget)
927 < per_ring_budget);
fa71ae27 928
c777cdfa
JK		 929#ifdef CONFIG_NET_RX_BUSY_POLL
930 ixgbevf_qv_unlock_napi(q_vector);
931#endif
932
fa71ae27
AD		 933 /* If all work not completed, return budget and keep polling */
934 if (!clean_complete)
935 return budget;
936 /* all work done, exit the polling mode */
937 napi_complete(napi);
938 if (adapter->rx_itr_setting & 1)
939 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 940 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
941 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27
AD		 942 ixgbevf_irq_enable_queues(adapter,
943 1 << q_vector->v_idx);
92915f71 944
fa71ae27 945 return 0;
92915f71
GR		 946}
947
ce422606
GR		 948/**
949 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
950 * @q_vector: structure containing interrupt and ring information
951 */
3849623e 952void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 953{
954 struct ixgbevf_adapter *adapter = q_vector->adapter;
955 struct ixgbe_hw *hw = &adapter->hw;
956 int v_idx = q_vector->v_idx;
957 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
958
959 /*
960 * set the WDIS bit to not clear the timer bits and cause an
961 * immediate assertion of the interrupt
962 */
963 itr_reg |= IXGBE_EITR_CNT_WDIS;
964
965 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
966}
92915f71 967
c777cdfa
JK		 968#ifdef CONFIG_NET_RX_BUSY_POLL
969/* must be called with local_bh_disable()d */
970static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
971{
972 struct ixgbevf_q_vector *q_vector =
973 container_of(napi, struct ixgbevf_q_vector, napi);
974 struct ixgbevf_adapter *adapter = q_vector->adapter;
975 struct ixgbevf_ring *ring;
976 int found = 0;
977
978 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
979 return LL_FLUSH_FAILED;
980
981 if (!ixgbevf_qv_lock_poll(q_vector))
982 return LL_FLUSH_BUSY;
983
984 ixgbevf_for_each_ring(ring, q_vector->rx) {
985 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
3b5dca26
JK		 986#ifdef BP_EXTENDED_STATS
987 if (found)
095e2617 988 ring->stats.cleaned += found;
3b5dca26 989 else
095e2617 990 ring->stats.misses++;
3b5dca26 991#endif
c777cdfa
JK		 992 if (found)
993 break;
994 }
995
996 ixgbevf_qv_unlock_poll(q_vector);
997
998 return found;
999}
1000#endif /* CONFIG_NET_RX_BUSY_POLL */
1001
92915f71
GR		 1002/**
1003 * ixgbevf_configure_msix - Configure MSI-X hardware
1004 * @adapter: board private structure
1005 *
1006 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1007 * interrupts.
1008 **/
1009static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1010{
1011 struct ixgbevf_q_vector *q_vector;
6b43c446 1012 int q_vectors, v_idx;
92915f71
GR		 1013
1014 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1015 adapter->eims_enable_mask = 0;
92915f71
GR		 1016
1017 /*
1018 * Populate the IVAR table and set the ITR values to the
1019 * corresponding register.
1020 */
1021 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1022 struct ixgbevf_ring *ring;
92915f71 1023 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1024
1025 ixgbevf_for_each_ring(ring, q_vector->rx)
1026 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1027
1028 ixgbevf_for_each_ring(ring, q_vector->tx)
1029 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1030
5f3600eb
AD		 1031 if (q_vector->tx.ring && !q_vector->rx.ring) {
1032 /* tx only vector */
1033 if (adapter->tx_itr_setting == 1)
1034 q_vector->itr = IXGBE_10K_ITR;
1035 else
1036 q_vector->itr = adapter->tx_itr_setting;
1037 } else {
1038 /* rx or rx/tx vector */
1039 if (adapter->rx_itr_setting == 1)
1040 q_vector->itr = IXGBE_20K_ITR;
1041 else
1042 q_vector->itr = adapter->rx_itr_setting;
1043 }
1044
1045 /* add q_vector eims value to global eims_enable_mask */
1046 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 1047
5f3600eb 1048 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1049 }
1050
1051 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 1052 /* setup eims_other and add value to global eims_enable_mask */
1053 adapter->eims_other = 1 << v_idx;
1054 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1055}
1056
1057enum latency_range {
1058 lowest_latency = 0,
1059 low_latency = 1,
1060 bulk_latency = 2,
1061 latency_invalid = 255
1062};
1063
1064/**
1065 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1066 * @q_vector: structure containing interrupt and ring information
1067 * @ring_container: structure containing ring performance data
92915f71
GR		 1068 *
1069 * Stores a new ITR value based on packets and byte
1070 * counts during the last interrupt. The advantage of per interrupt
1071 * computation is faster updates and more accurate ITR for the current
1072 * traffic pattern. Constants in this function were computed
1073 * based on theoretical maximum wire speed and thresholds were set based
1074 * on testing data as well as attempting to minimize response time
1075 * while increasing bulk throughput.
1076 **/
5f3600eb
AD		 1077static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1078 struct ixgbevf_ring_container *ring_container)
92915f71 1079{
5f3600eb
AD		 1080 int bytes = ring_container->total_bytes;
1081 int packets = ring_container->total_packets;
92915f71
GR		 1082 u32 timepassed_us;
1083 u64 bytes_perint;
5f3600eb 1084 u8 itr_setting = ring_container->itr;
92915f71
GR		 1085
1086 if (packets == 0)
5f3600eb 1087 return;
92915f71
GR		 1088
1089 /* simple throttlerate management
1090 * 0-20MB/s lowest (100000 ints/s)
1091 * 20-100MB/s low (20000 ints/s)
1092 * 100-1249MB/s bulk (8000 ints/s)
1093 */
1094 /* what was last interrupt timeslice? */
5f3600eb 1095 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1096 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1097
1098 switch (itr_setting) {
1099 case lowest_latency:
e2c28ce7 1100 if (bytes_perint > 10)
5f3600eb 1101 itr_setting = low_latency;
92915f71
GR		 1102 break;
1103 case low_latency:
e2c28ce7 1104 if (bytes_perint > 20)
5f3600eb 1105 itr_setting = bulk_latency;
e2c28ce7 1106 else if (bytes_perint <= 10)
5f3600eb 1107 itr_setting = lowest_latency;
92915f71
GR		 1108 break;
1109 case bulk_latency:
e2c28ce7 1110 if (bytes_perint <= 20)
5f3600eb 1111 itr_setting = low_latency;
92915f71
GR		 1112 break;
1113 }
1114
5f3600eb
AD		 1115 /* clear work counters since we have the values we need */
1116 ring_container->total_bytes = 0;
1117 ring_container->total_packets = 0;
1118
1119 /* write updated itr to ring container */
1120 ring_container->itr = itr_setting;
92915f71
GR		 1121}
1122
fa71ae27 1123static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1124{
5f3600eb
AD		 1125 u32 new_itr = q_vector->itr;
1126 u8 current_itr;
92915f71 1127
5f3600eb
AD		 1128 ixgbevf_update_itr(q_vector, &q_vector->tx);
1129 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1130
6b43c446 1131 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1132
1133 switch (current_itr) {
1134 /* counts and packets in update_itr are dependent on these numbers */
1135 case lowest_latency:
5f3600eb 1136 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1137 break;
1138 case low_latency:
5f3600eb 1139 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1140 break;
1141 case bulk_latency:
1142 default:
5f3600eb 1143 new_itr = IXGBE_8K_ITR;
92915f71
GR		 1144 break;
1145 }
1146
5f3600eb 1147 if (new_itr != q_vector->itr) {
92915f71 1148 /* do an exponential smoothing */
5f3600eb
AD		 1149 new_itr = (10 * new_itr * q_vector->itr) /
1150 ((9 * new_itr) + q_vector->itr);
1151
1152 /* save the algorithm value here */
1153 q_vector->itr = new_itr;
1154
1155 ixgbevf_write_eitr(q_vector);
92915f71 1156 }
92915f71
GR		 1157}
1158
4b2cd27f 1159static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1160{
fa71ae27 1161 struct ixgbevf_adapter *adapter = data;
92915f71 1162 struct ixgbe_hw *hw = &adapter->hw;
08259594 1163
4b2cd27f 1164 hw->mac.get_link_status = 1;
1e72bfc3 1165
2e7cfbdd
MR		 1166 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1167 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
c7bb417d 1168 mod_timer(&adapter->watchdog_timer, jiffies);
3a2c4033 1169
5f3600eb
AD		 1170 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1171
92915f71
GR		 1172 return IRQ_HANDLED;
1173}
1174
92915f71 1175/**
fa71ae27 1176 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1177 * @irq: unused
1178 * @data: pointer to our q_vector struct for this interrupt vector
1179 **/
fa71ae27 1180static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1181{
1182 struct ixgbevf_q_vector *q_vector = data;
92915f71 1183
5f3600eb 1184 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27
AD		 1185 if (q_vector->rx.ring || q_vector->tx.ring)
1186 napi_schedule(&q_vector->napi);
92915f71
GR		 1187
1188 return IRQ_HANDLED;
1189}
1190
1191static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1192 int r_idx)
1193{
1194 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1195
87e70ab9
DS		 1196 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1197 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1198 q_vector->rx.count++;
92915f71
GR		 1199}
1200
1201static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1202 int t_idx)
1203{
1204 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1205
87e70ab9
DS		 1206 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1207 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1208 q_vector->tx.count++;
92915f71
GR		 1209}
1210
1211/**
1212 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1213 * @adapter: board private structure to initialize
1214 *
1215 * This function maps descriptor rings to the queue-specific vectors
1216 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1217 * one vector per ring/queue, but on a constrained vector budget, we
1218 * group the rings as "efficiently" as possible. You would add new
1219 * mapping configurations in here.
1220 **/
1221static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1222{
1223 int q_vectors;
1224 int v_start = 0;
1225 int rxr_idx = 0, txr_idx = 0;
1226 int rxr_remaining = adapter->num_rx_queues;
1227 int txr_remaining = adapter->num_tx_queues;
1228 int i, j;
1229 int rqpv, tqpv;
1230 int err = 0;
1231
1232 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1233
1234 /*
1235 * The ideal configuration...
1236 * We have enough vectors to map one per queue.
1237 */
1238 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1239 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1240 map_vector_to_rxq(adapter, v_start, rxr_idx);
1241
1242 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1243 map_vector_to_txq(adapter, v_start, txr_idx);
1244 goto out;
1245 }
1246
1247 /*
1248 * If we don't have enough vectors for a 1-to-1
1249 * mapping, we'll have to group them so there are
1250 * multiple queues per vector.
1251 */
1252 /* Re-adjusting *qpv takes care of the remainder. */
1253 for (i = v_start; i < q_vectors; i++) {
1254 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1255 for (j = 0; j < rqpv; j++) {
1256 map_vector_to_rxq(adapter, i, rxr_idx);
1257 rxr_idx++;
1258 rxr_remaining--;
1259 }
1260 }
1261 for (i = v_start; i < q_vectors; i++) {
1262 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1263 for (j = 0; j < tqpv; j++) {
1264 map_vector_to_txq(adapter, i, txr_idx);
1265 txr_idx++;
1266 txr_remaining--;
1267 }
1268 }
1269
1270out:
1271 return err;
1272}
1273
1274/**
1275 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1276 * @adapter: board private structure
1277 *
1278 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1279 * interrupts from the kernel.
1280 **/
1281static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1282{
1283 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 1284 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1285 int vector, err;
92915f71
GR		 1286 int ri = 0, ti = 0;
1287
92915f71 1288 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1289 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1290 struct msix_entry *entry = &adapter->msix_entries[vector];
1291
1292 if (q_vector->tx.ring && q_vector->rx.ring) {
1293 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1294 "%s-%s-%d", netdev->name, "TxRx", ri++);
1295 ti++;
1296 } else if (q_vector->rx.ring) {
1297 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1298 "%s-%s-%d", netdev->name, "rx", ri++);
1299 } else if (q_vector->tx.ring) {
1300 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1301 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 1302 } else {
1303 /* skip this unused q_vector */
1304 continue;
1305 }
fa71ae27
AD		 1306 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1307 q_vector->name, q_vector);
92915f71
GR		 1308 if (err) {
1309 hw_dbg(&adapter->hw,
1310 "request_irq failed for MSIX interrupt "
1311 "Error: %d\n", err);
1312 goto free_queue_irqs;
1313 }
1314 }
1315
92915f71 1316 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1317 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71
GR		 1318 if (err) {
1319 hw_dbg(&adapter->hw,
4b2cd27f 1320 "request_irq for msix_other failed: %d\n", err);
92915f71
GR		 1321 goto free_queue_irqs;
1322 }
1323
1324 return 0;
1325
1326free_queue_irqs:
fa71ae27
AD		 1327 while (vector) {
1328 vector--;
1329 free_irq(adapter->msix_entries[vector].vector,
1330 adapter->q_vector[vector]);
1331 }
a1f6c6b1 1332 /* This failure is non-recoverable - it indicates the system is
1333 * out of MSIX vector resources and the VF driver cannot run
1334 * without them. Set the number of msix vectors to zero
1335 * indicating that not enough can be allocated. The error
1336 * will be returned to the user indicating device open failed.
1337 * Any further attempts to force the driver to open will also
1338 * fail. The only way to recover is to unload the driver and
1339 * reload it again. If the system has recovered some MSIX
1340 * vectors then it may succeed.
1341 */
1342 adapter->num_msix_vectors = 0;
92915f71
GR		 1343 return err;
1344}
1345
1346static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1347{
1348 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1349
1350 for (i = 0; i < q_vectors; i++) {
1351 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
6b43c446
AD		 1352 q_vector->rx.ring = NULL;
1353 q_vector->tx.ring = NULL;
1354 q_vector->rx.count = 0;
1355 q_vector->tx.count = 0;
92915f71
GR		 1356 }
1357}
1358
1359/**
1360 * ixgbevf_request_irq - initialize interrupts
1361 * @adapter: board private structure
1362 *
1363 * Attempts to configure interrupts using the best available
1364 * capabilities of the hardware and kernel.
1365 **/
1366static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1367{
1368 int err = 0;
1369
1370 err = ixgbevf_request_msix_irqs(adapter);
1371
1372 if (err)
1373 hw_dbg(&adapter->hw,
1374 "request_irq failed, Error %d\n", err);
1375
1376 return err;
1377}
1378
1379static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1380{
92915f71
GR		 1381 int i, q_vectors;
1382
1383 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1384 i = q_vectors - 1;
1385
fa71ae27 1386 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1387 i--;
1388
1389 for (; i >= 0; i--) {
fa71ae27
AD		 1390 /* free only the irqs that were actually requested */
1391 if (!adapter->q_vector[i]->rx.ring &&
1392 !adapter->q_vector[i]->tx.ring)
1393 continue;
1394
92915f71
GR		 1395 free_irq(adapter->msix_entries[i].vector,
1396 adapter->q_vector[i]);
1397 }
1398
1399 ixgbevf_reset_q_vectors(adapter);
1400}
1401
1402/**
1403 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1404 * @adapter: board private structure
1405 **/
1406static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1407{
92915f71 1408 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1409 int i;
92915f71 1410
5f3600eb 1411 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1412 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1413 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1414
1415 IXGBE_WRITE_FLUSH(hw);
1416
1417 for (i = 0; i < adapter->num_msix_vectors; i++)
1418 synchronize_irq(adapter->msix_entries[i].vector);
1419}
1420
1421/**
1422 * ixgbevf_irq_enable - Enable default interrupt generation settings
1423 * @adapter: board private structure
1424 **/
5f3600eb 1425static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1426{
1427 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1428
5f3600eb
AD		 1429 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1430 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1431 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1432}
1433
de02decb
DS		 1434/**
1435 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1436 * @adapter: board private structure
1437 * @ring: structure containing ring specific data
1438 *
1439 * Configure the Tx descriptor ring after a reset.
1440 **/
1441static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1442 struct ixgbevf_ring *ring)
1443{
1444 struct ixgbe_hw *hw = &adapter->hw;
1445 u64 tdba = ring->dma;
1446 int wait_loop = 10;
1447 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1448 u8 reg_idx = ring->reg_idx;
1449
1450 /* disable queue to avoid issues while updating state */
1451 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1452 IXGBE_WRITE_FLUSH(hw);
1453
1454 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1455 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1456 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1457 ring->count * sizeof(union ixgbe_adv_tx_desc));
1458
1459 /* disable head writeback */
1460 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1461 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1462
1463 /* enable relaxed ordering */
1464 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1465 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1466 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1467
1468 /* reset head and tail pointers */
1469 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1470 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1471 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1472
1473 /* reset ntu and ntc to place SW in sync with hardwdare */
1474 ring->next_to_clean = 0;
1475 ring->next_to_use = 0;
1476
1477 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1478 * to or less than the number of on chip descriptors, which is
1479 * currently 40.
1480 */
1481 txdctl |= (8 << 16); /* WTHRESH = 8 */
1482
1483 /* Setting PTHRESH to 32 both improves performance */
1484 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1485 32; /* PTHRESH = 32 */
1486
1487 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1488
1489 /* poll to verify queue is enabled */
1490 do {
1491 usleep_range(1000, 2000);
1492 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1493 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1494 if (!wait_loop)
1495 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1496}
1497
92915f71
GR		 1498/**
1499 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1500 * @adapter: board private structure
1501 *
1502 * Configure the Tx unit of the MAC after a reset.
1503 **/
1504static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1505{
de02decb 1506 u32 i;
92915f71
GR		 1507
1508 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1509 for (i = 0; i < adapter->num_tx_queues; i++)
1510 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR		 1511}
1512
1513#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1514
1515static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1516{
92915f71
GR		 1517 struct ixgbe_hw *hw = &adapter->hw;
1518 u32 srrctl;
1519
92915f71
GR		 1520 srrctl = IXGBE_SRRCTL_DROP_EN;
1521
bad17234
ET		 1522 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1523 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1524 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1525
92915f71
GR		 1526 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1527}
1528
1bb9c639
DS		 1529static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1530{
1531 struct ixgbe_hw *hw = &adapter->hw;
1532
1533 /* PSRTYPE must be initialized in 82599 */
1534 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1535 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1536 IXGBE_PSRTYPE_L2HDR;
1537
1538 if (adapter->num_rx_queues > 1)
1539 psrtype |= 1 << 29;
1540
1541 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1542}
1543
de02decb
DS		 1544#define IXGBEVF_MAX_RX_DESC_POLL 10
1545static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1546 struct ixgbevf_ring *ring)
1547{
1548 struct ixgbe_hw *hw = &adapter->hw;
1549 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1550 u32 rxdctl;
1551 u8 reg_idx = ring->reg_idx;
1552
26597802
MR		 1553 if (IXGBE_REMOVED(hw->hw_addr))
1554 return;
de02decb
DS		 1555 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1556 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1557
1558 /* write value back with RXDCTL.ENABLE bit cleared */
1559 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1560
1561 /* the hardware may take up to 100us to really disable the rx queue */
1562 do {
1563 udelay(10);
1564 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1565 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1566
1567 if (!wait_loop)
1568 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1569 reg_idx);
1570}
1571
1572static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1573 struct ixgbevf_ring *ring)
1574{
1575 struct ixgbe_hw *hw = &adapter->hw;
1576 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1577 u32 rxdctl;
1578 u8 reg_idx = ring->reg_idx;
1579
26597802
MR		 1580 if (IXGBE_REMOVED(hw->hw_addr))
1581 return;
de02decb
DS		 1582 do {
1583 usleep_range(1000, 2000);
1584 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1585 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1586
1587 if (!wait_loop)
1588 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1589 reg_idx);
1590}
1591
1592static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1593 struct ixgbevf_ring *ring)
1594{
1595 struct ixgbe_hw *hw = &adapter->hw;
1596 u64 rdba = ring->dma;
1597 u32 rxdctl;
1598 u8 reg_idx = ring->reg_idx;
1599
1600 /* disable queue to avoid issues while updating state */
1601 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1602 ixgbevf_disable_rx_queue(adapter, ring);
1603
1604 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1605 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1606 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1607 ring->count * sizeof(union ixgbe_adv_rx_desc));
1608
1609 /* enable relaxed ordering */
1610 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1611 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1612
1613 /* reset head and tail pointers */
1614 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1615 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1616 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS		 1617
1618 /* reset ntu and ntc to place SW in sync with hardwdare */
1619 ring->next_to_clean = 0;
1620 ring->next_to_use = 0;
bad17234 1621 ring->next_to_alloc = 0;
de02decb
DS		 1622
1623 ixgbevf_configure_srrctl(adapter, reg_idx);
1624
bad17234
ET		 1625 /* allow any size packet since we can handle overflow */
1626 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1627
de02decb
DS		 1628 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1629 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1630
1631 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1632 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1633}
1634
92915f71
GR		 1635/**
1636 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1637 * @adapter: board private structure
1638 *
1639 * Configure the Rx unit of the MAC after a reset.
1640 **/
1641static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1642{
de02decb 1643 int i;
bad17234
ET		 1644 struct ixgbe_hw *hw = &adapter->hw;
1645 struct net_device *netdev = adapter->netdev;
92915f71 1646
1bb9c639 1647 ixgbevf_setup_psrtype(adapter);
dd1fe113 1648
bad17234
ET		 1649 /* notify the PF of our intent to use this size of frame */
1650 ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
92915f71 1651
92915f71
GR		 1652 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1653 * the Base and Length of the Rx Descriptor Ring */
de02decb
DS		 1654 for (i = 0; i < adapter->num_rx_queues; i++)
1655 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR		 1656}
1657
80d5c368
PM		 1658static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1659 __be16 proto, u16 vid)
92915f71
GR		 1660{
1661 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1662 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1663 int err;
1664
55fdd45b 1665 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1666
92915f71 1667 /* add VID to filter table */
2ddc7fe1 1668 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1669
55fdd45b 1670 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1671
2ddc7fe1
AD		 1672 /* translate error return types so error makes sense */
1673 if (err == IXGBE_ERR_MBX)
1674 return -EIO;
1675
1676 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1677 return -EACCES;
1678
dadcd65f 1679 set_bit(vid, adapter->active_vlans);
8e586137 1680
2ddc7fe1 1681 return err;
92915f71
GR		 1682}
1683
80d5c368
PM		 1684static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1685 __be16 proto, u16 vid)
92915f71
GR		 1686{
1687 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1688 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1 1689 int err = -EOPNOTSUPP;
92915f71 1690
55fdd45b 1691 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1692
92915f71 1693 /* remove VID from filter table */
92fe0bf7 1694 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1695
55fdd45b 1696 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1697
dadcd65f 1698 clear_bit(vid, adapter->active_vlans);
8e586137 1699
2ddc7fe1 1700 return err;
92915f71
GR		 1701}
1702
1703static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1704{
dadcd65f 1705 u16 vid;
92915f71 1706
dadcd65f 1707 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 1708 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1709 htons(ETH_P_8021Q), vid);
92915f71
GR		 1710}
1711
46ec20ff
GR		 1712static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1713{
1714 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1715 struct ixgbe_hw *hw = &adapter->hw;
1716 int count = 0;
1717
1718 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1719 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1720 return -ENOSPC;
1721 }
1722
1723 if (!netdev_uc_empty(netdev)) {
1724 struct netdev_hw_addr *ha;
1725 netdev_for_each_uc_addr(ha, netdev) {
1726 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1727 udelay(200);
1728 }
1729 } else {
1730 /*
1731 * If the list is empty then send message to PF driver to
1732 * clear all macvlans on this VF.
1733 */
1734 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1735 }
1736
1737 return count;
1738}
1739
92915f71 1740/**
dee847f5 1741 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 1742 * @netdev: network interface device structure
1743 *
1744 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 1745 * list, unicast address list or the network interface flags are updated.
1746 * This routine is responsible for configuring the hardware for proper
1747 * multicast mode and configuring requested unicast filters.
92915f71
GR		 1748 **/
1749static void ixgbevf_set_rx_mode(struct net_device *netdev)
1750{
1751 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1752 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1753
55fdd45b 1754 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1755
92915f71 1756 /* reprogram multicast list */
92fe0bf7 1757 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1758
1759 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1760
55fdd45b 1761 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1762}
1763
1764static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1765{
1766 int q_idx;
1767 struct ixgbevf_q_vector *q_vector;
1768 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1769
1770 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1771 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 1772#ifdef CONFIG_NET_RX_BUSY_POLL
1773 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1774#endif
fa71ae27 1775 napi_enable(&q_vector->napi);
92915f71
GR		 1776 }
1777}
1778
1779static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1780{
1781 int q_idx;
1782 struct ixgbevf_q_vector *q_vector;
1783 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1784
1785 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1786 q_vector = adapter->q_vector[q_idx];
92915f71 1787 napi_disable(&q_vector->napi);
c777cdfa
JK		 1788#ifdef CONFIG_NET_RX_BUSY_POLL
1789 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1790 pr_info("QV %d locked\n", q_idx);
1791 usleep_range(1000, 20000);
1792 }
1793#endif /* CONFIG_NET_RX_BUSY_POLL */
92915f71
GR		 1794 }
1795}
1796
220fe050
DS		 1797static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1798{
1799 struct ixgbe_hw *hw = &adapter->hw;
1800 unsigned int def_q = 0;
1801 unsigned int num_tcs = 0;
1802 unsigned int num_rx_queues = 1;
1803 int err;
1804
1805 spin_lock_bh(&adapter->mbx_lock);
1806
1807 /* fetch queue configuration from the PF */
1808 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1809
1810 spin_unlock_bh(&adapter->mbx_lock);
1811
1812 if (err)
1813 return err;
1814
1815 if (num_tcs > 1) {
1816 /* update default Tx ring register index */
87e70ab9 1817 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 1818
1819 /* we need as many queues as traffic classes */
1820 num_rx_queues = num_tcs;
1821 }
1822
1823 /* if we have a bad config abort request queue reset */
1824 if (adapter->num_rx_queues != num_rx_queues) {
1825 /* force mailbox timeout to prevent further messages */
1826 hw->mbx.timeout = 0;
1827
1828 /* wait for watchdog to come around and bail us out */
1829 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1830 }
1831
1832 return 0;
1833}
1834
92915f71
GR		 1835static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1836{
220fe050
DS		 1837 ixgbevf_configure_dcb(adapter);
1838
de02decb 1839 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 1840
1841 ixgbevf_restore_vlan(adapter);
1842
1843 ixgbevf_configure_tx(adapter);
1844 ixgbevf_configure_rx(adapter);
92915f71
GR		 1845}
1846
33bd9f60
GR		 1847static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1848{
1849 /* Only save pre-reset stats if there are some */
1850 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1851 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1852 adapter->stats.base_vfgprc;
1853 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1854 adapter->stats.base_vfgptc;
1855 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1856 adapter->stats.base_vfgorc;
1857 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1858 adapter->stats.base_vfgotc;
1859 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1860 adapter->stats.base_vfmprc;
1861 }
1862}
1863
1864static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1865{
1866 struct ixgbe_hw *hw = &adapter->hw;
1867
1868 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1869 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1870 adapter->stats.last_vfgorc |=
1871 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1872 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1873 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1874 adapter->stats.last_vfgotc |=
1875 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1876 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1877
1878 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1879 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1880 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1881 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1882 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1883}
1884
31186785
AD		 1885static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
1886{
1887 struct ixgbe_hw *hw = &adapter->hw;
56e94095
AD		 1888 int api[] = { ixgbe_mbox_api_11,
1889 ixgbe_mbox_api_10,
31186785
AD		 1890 ixgbe_mbox_api_unknown };
1891 int err = 0, idx = 0;
1892
55fdd45b 1893 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 1894
1895 while (api[idx] != ixgbe_mbox_api_unknown) {
1896 err = ixgbevf_negotiate_api_version(hw, api[idx]);
1897 if (!err)
1898 break;
1899 idx++;
1900 }
1901
55fdd45b 1902 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 1903}
1904
795180d8 1905static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 1906{
1907 struct net_device *netdev = adapter->netdev;
1908 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1909
1910 ixgbevf_configure_msix(adapter);
1911
55fdd45b 1912 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1913
92fe0bf7
GR		 1914 if (is_valid_ether_addr(hw->mac.addr))
1915 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1916 else
1917 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 1918
55fdd45b 1919 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1920
4e857c58 1921 smp_mb__before_atomic();
92915f71
GR		 1922 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1923 ixgbevf_napi_enable_all(adapter);
1924
1925 /* enable transmits */
1926 netif_tx_start_all_queues(netdev);
1927
33bd9f60
GR		 1928 ixgbevf_save_reset_stats(adapter);
1929 ixgbevf_init_last_counter_stats(adapter);
1930
4b2cd27f 1931 hw->mac.get_link_status = 1;
92915f71 1932 mod_timer(&adapter->watchdog_timer, jiffies);
92915f71
GR		 1933}
1934
795180d8 1935void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 1936{
92915f71
GR		 1937 struct ixgbe_hw *hw = &adapter->hw;
1938
1939 ixgbevf_configure(adapter);
1940
795180d8 1941 ixgbevf_up_complete(adapter);
92915f71
GR		 1942
1943 /* clear any pending interrupts, may auto mask */
1944 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1945
5f3600eb 1946 ixgbevf_irq_enable(adapter);
92915f71
GR		 1947}
1948
1949/**
1950 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 1951 * @rx_ring: ring to free buffers from
1952 **/
05d063aa 1953static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 1954{
bad17234 1955 struct device *dev = rx_ring->dev;
92915f71
GR		 1956 unsigned long size;
1957 unsigned int i;
1958
bad17234
ET		 1959 /* Free Rx ring sk_buff */
1960 if (rx_ring->skb) {
1961 dev_kfree_skb(rx_ring->skb);
1962 rx_ring->skb = NULL;
1963 }
1964
1965 /* ring already cleared, nothing to do */
c0456c23
GR		 1966 if (!rx_ring->rx_buffer_info)
1967 return;
92915f71 1968
bad17234 1969 /* Free all the Rx ring pages */
92915f71 1970 for (i = 0; i < rx_ring->count; i++) {
bad17234 1971 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 1972
bad17234
ET		 1973 rx_buffer = &rx_ring->rx_buffer_info[i];
1974 if (rx_buffer->dma)
1975 dma_unmap_page(dev, rx_buffer->dma,
1976 PAGE_SIZE, DMA_FROM_DEVICE);
1977 rx_buffer->dma = 0;
1978 if (rx_buffer->page)
1979 __free_page(rx_buffer->page);
1980 rx_buffer->page = NULL;
92915f71
GR		 1981 }
1982
1983 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1984 memset(rx_ring->rx_buffer_info, 0, size);
1985
1986 /* Zero out the descriptor ring */
1987 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR		 1988}
1989
1990/**
1991 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 1992 * @tx_ring: ring to be cleaned
1993 **/
05d063aa 1994static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR		 1995{
1996 struct ixgbevf_tx_buffer *tx_buffer_info;
1997 unsigned long size;
1998 unsigned int i;
1999
c0456c23
GR		 2000 if (!tx_ring->tx_buffer_info)
2001 return;
2002
92915f71 2003 /* Free all the Tx ring sk_buffs */
92915f71
GR		 2004 for (i = 0; i < tx_ring->count; i++) {
2005 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2006 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2007 }
2008
2009 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2010 memset(tx_ring->tx_buffer_info, 0, size);
2011
2012 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR		 2013}
2014
2015/**
2016 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2017 * @adapter: board private structure
2018 **/
2019static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2020{
2021 int i;
2022
2023 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2024 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2025}
2026
2027/**
2028 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2029 * @adapter: board private structure
2030 **/
2031static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2032{
2033 int i;
2034
2035 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2036 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR		 2037}
2038
2039void ixgbevf_down(struct ixgbevf_adapter *adapter)
2040{
2041 struct net_device *netdev = adapter->netdev;
2042 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2043 int i;
92915f71
GR		 2044
2045 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2046 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2047 return; /* do nothing if already down */
858c3dda
DS		 2048
2049 /* disable all enabled rx queues */
2050 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2051 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71
GR		 2052
2053 netif_tx_disable(netdev);
2054
2055 msleep(10);
2056
2057 netif_tx_stop_all_queues(netdev);
2058
2059 ixgbevf_irq_disable(adapter);
2060
2061 ixgbevf_napi_disable_all(adapter);
2062
2063 del_timer_sync(&adapter->watchdog_timer);
2064 /* can't call flush scheduled work here because it can deadlock
2065 * if linkwatch_event tries to acquire the rtnl_lock which we are
2066 * holding */
2067 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
2068 msleep(1);
2069
2070 /* disable transmits in the hardware now that interrupts are off */
2071 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2072 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2073
2074 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2075 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2076 }
2077
2078 netif_carrier_off(netdev);
2079
2080 if (!pci_channel_offline(adapter->pdev))
2081 ixgbevf_reset(adapter);
2082
2083 ixgbevf_clean_all_tx_rings(adapter);
2084 ixgbevf_clean_all_rx_rings(adapter);
2085}
2086
2087void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2088{
2089 WARN_ON(in_interrupt());
c0456c23 2090
92915f71
GR		 2091 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2092 msleep(1);
2093
4b2cd27f
AD		 2094 ixgbevf_down(adapter);
2095 ixgbevf_up(adapter);
92915f71
GR		 2096
2097 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2098}
2099
2100void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2101{
2102 struct ixgbe_hw *hw = &adapter->hw;
2103 struct net_device *netdev = adapter->netdev;
2104
798e381a 2105 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2106 hw_dbg(hw, "PF still resetting\n");
798e381a 2107 } else {
92915f71 2108 hw->mac.ops.init_hw(hw);
798e381a
DS		 2109 ixgbevf_negotiate_api(adapter);
2110 }
92915f71
GR		 2111
2112 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
2113 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
2114 netdev->addr_len);
2115 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
2116 netdev->addr_len);
2117 }
2118}
2119
e45dd5fe
JK		 2120static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2121 int vectors)
92915f71 2122{
a5f9337b 2123 int vector_threshold;
92915f71 2124
fa71ae27
AD		 2125 /* We'll want at least 2 (vector_threshold):
2126 * 1) TxQ[0] + RxQ[0] handler
2127 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2128 */
2129 vector_threshold = MIN_MSIX_COUNT;
2130
2131 /* The more we get, the more we will assign to Tx/Rx Cleanup
2132 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2133 * Right now, we simply care about how many we'll get; we'll
2134 * set them up later while requesting irq's.
2135 */
5c1e3588
AG		 2136 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2137 vector_threshold, vectors);
92915f71 2138
5c1e3588 2139 if (vectors < 0) {
e45dd5fe
JK		 2140 dev_err(&adapter->pdev->dev,
2141 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2142 kfree(adapter->msix_entries);
2143 adapter->msix_entries = NULL;
5c1e3588 2144 return vectors;
92915f71 2145 }
dee847f5 2146
5c1e3588
AG		 2147 /* Adjust for only the vectors we'll use, which is minimum
2148 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2149 * vectors we were allocated.
2150 */
2151 adapter->num_msix_vectors = vectors;
2152
2153 return 0;
92915f71
GR		 2154}
2155
49ce9c2c
BH		 2156/**
2157 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2158 * @adapter: board private structure to initialize
2159 *
2160 * This is the top level queue allocation routine. The order here is very
2161 * important, starting with the "most" number of features turned on at once,
2162 * and ending with the smallest set of features. This way large combinations
2163 * can be allocated if they're turned on, and smaller combinations are the
2164 * fallthrough conditions.
2165 *
2166 **/
2167static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2168{
220fe050
DS		 2169 struct ixgbe_hw *hw = &adapter->hw;
2170 unsigned int def_q = 0;
2171 unsigned int num_tcs = 0;
2172 int err;
2173
92915f71
GR		 2174 /* Start with base case */
2175 adapter->num_rx_queues = 1;
2176 adapter->num_tx_queues = 1;
220fe050
DS		 2177
2178 spin_lock_bh(&adapter->mbx_lock);
2179
2180 /* fetch queue configuration from the PF */
2181 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2182
2183 spin_unlock_bh(&adapter->mbx_lock);
2184
2185 if (err)
2186 return;
2187
2188 /* we need as many queues as traffic classes */
2189 if (num_tcs > 1)
2190 adapter->num_rx_queues = num_tcs;
92915f71
GR		 2191}
2192
2193/**
2194 * ixgbevf_alloc_queues - Allocate memory for all rings
2195 * @adapter: board private structure to initialize
2196 *
2197 * We allocate one ring per queue at run-time since we don't know the
2198 * number of queues at compile-time. The polling_netdev array is
2199 * intended for Multiqueue, but should work fine with a single queue.
2200 **/
2201static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2202{
87e70ab9
DS		 2203 struct ixgbevf_ring *ring;
2204 int rx = 0, tx = 0;
92915f71 2205
87e70ab9
DS		 2206 for (; tx < adapter->num_tx_queues; tx++) {
2207 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2208 if (!ring)
2209 goto err_allocation;
92915f71 2210
87e70ab9
DS		 2211 ring->dev = &adapter->pdev->dev;
2212 ring->netdev = adapter->netdev;
2213 ring->count = adapter->tx_ring_count;
2214 ring->queue_index = tx;
2215 ring->reg_idx = tx;
92915f71 2216
87e70ab9 2217 adapter->tx_ring[tx] = ring;
92915f71
GR		 2218 }
2219
87e70ab9
DS		 2220 for (; rx < adapter->num_rx_queues; rx++) {
2221 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2222 if (!ring)
2223 goto err_allocation;
2224
2225 ring->dev = &adapter->pdev->dev;
2226 ring->netdev = adapter->netdev;
2227
2228 ring->count = adapter->rx_ring_count;
2229 ring->queue_index = rx;
2230 ring->reg_idx = rx;
2231
2232 adapter->rx_ring[rx] = ring;
92915f71
GR		 2233 }
2234
2235 return 0;
2236
87e70ab9
DS		 2237err_allocation:
2238 while (tx) {
2239 kfree(adapter->tx_ring[--tx]);
2240 adapter->tx_ring[tx] = NULL;
2241 }
2242
2243 while (rx) {
2244 kfree(adapter->rx_ring[--rx]);
2245 adapter->rx_ring[rx] = NULL;
2246 }
92915f71
GR		 2247 return -ENOMEM;
2248}
2249
2250/**
2251 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2252 * @adapter: board private structure to initialize
2253 *
2254 * Attempt to configure the interrupts using the best available
2255 * capabilities of the hardware and the kernel.
2256 **/
2257static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2258{
91e2b89b 2259 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2260 int err = 0;
2261 int vector, v_budget;
2262
2263 /*
2264 * It's easy to be greedy for MSI-X vectors, but it really
2265 * doesn't do us much good if we have a lot more vectors
2266 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 2267 * (roughly) the same number of vectors as there are CPU's.
2268 * The default is to use pairs of vectors.
92915f71 2269 */
fa71ae27
AD		 2270 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2271 v_budget = min_t(int, v_budget, num_online_cpus());
2272 v_budget += NON_Q_VECTORS;
92915f71
GR		 2273
2274 /* A failure in MSI-X entry allocation isn't fatal, but it does
2275 * mean we disable MSI-X capabilities of the adapter. */
2276 adapter->msix_entries = kcalloc(v_budget,
2277 sizeof(struct msix_entry), GFP_KERNEL);
2278 if (!adapter->msix_entries) {
2279 err = -ENOMEM;
2280 goto out;
2281 }
2282
2283 for (vector = 0; vector < v_budget; vector++)
2284 adapter->msix_entries[vector].entry = vector;
2285
e45dd5fe
JK		 2286 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2287 if (err)
2288 goto out;
92915f71 2289
91e2b89b
GR		 2290 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2291 if (err)
2292 goto out;
2293
2294 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
2295
92915f71
GR		 2296out:
2297 return err;
2298}
2299
2300/**
2301 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2302 * @adapter: board private structure to initialize
2303 *
2304 * We allocate one q_vector per queue interrupt. If allocation fails we
2305 * return -ENOMEM.
2306 **/
2307static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2308{
2309 int q_idx, num_q_vectors;
2310 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 2311
2312 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2313
2314 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2315 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2316 if (!q_vector)
2317 goto err_out;
2318 q_vector->adapter = adapter;
2319 q_vector->v_idx = q_idx;
fa71ae27
AD		 2320 netif_napi_add(adapter->netdev, &q_vector->napi,
2321 ixgbevf_poll, 64);
c777cdfa
JK		 2322#ifdef CONFIG_NET_RX_BUSY_POLL
2323 napi_hash_add(&q_vector->napi);
2324#endif
92915f71
GR		 2325 adapter->q_vector[q_idx] = q_vector;
2326 }
2327
2328 return 0;
2329
2330err_out:
2331 while (q_idx) {
2332 q_idx--;
2333 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 2334#ifdef CONFIG_NET_RX_BUSY_POLL
2335 napi_hash_del(&q_vector->napi);
2336#endif
92915f71
GR		 2337 netif_napi_del(&q_vector->napi);
2338 kfree(q_vector);
2339 adapter->q_vector[q_idx] = NULL;
2340 }
2341 return -ENOMEM;
2342}
2343
2344/**
2345 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2346 * @adapter: board private structure to initialize
2347 *
2348 * This function frees the memory allocated to the q_vectors. In addition if
2349 * NAPI is enabled it will delete any references to the NAPI struct prior
2350 * to freeing the q_vector.
2351 **/
2352static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2353{
f4477702 2354 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2355
2356 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2357 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2358
2359 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK		 2360#ifdef CONFIG_NET_RX_BUSY_POLL
2361 napi_hash_del(&q_vector->napi);
2362#endif
f4477702 2363 netif_napi_del(&q_vector->napi);
92915f71
GR		 2364 kfree(q_vector);
2365 }
2366}
2367
2368/**
2369 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2370 * @adapter: board private structure
2371 *
2372 **/
2373static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2374{
2375 pci_disable_msix(adapter->pdev);
2376 kfree(adapter->msix_entries);
2377 adapter->msix_entries = NULL;
92915f71
GR		 2378}
2379
2380/**
2381 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2382 * @adapter: board private structure to initialize
2383 *
2384 **/
2385static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2386{
2387 int err;
2388
2389 /* Number of supported queues */
2390 ixgbevf_set_num_queues(adapter);
2391
2392 err = ixgbevf_set_interrupt_capability(adapter);
2393 if (err) {
2394 hw_dbg(&adapter->hw,
2395 "Unable to setup interrupt capabilities\n");
2396 goto err_set_interrupt;
2397 }
2398
2399 err = ixgbevf_alloc_q_vectors(adapter);
2400 if (err) {
2401 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2402 "vectors\n");
2403 goto err_alloc_q_vectors;
2404 }
2405
2406 err = ixgbevf_alloc_queues(adapter);
2407 if (err) {
dbd9636e 2408 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2409 goto err_alloc_queues;
2410 }
2411
2412 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2413 "Tx Queue count = %u\n",
2414 (adapter->num_rx_queues > 1) ? "Enabled" :
2415 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2416
2417 set_bit(__IXGBEVF_DOWN, &adapter->state);
2418
2419 return 0;
2420err_alloc_queues:
2421 ixgbevf_free_q_vectors(adapter);
2422err_alloc_q_vectors:
2423 ixgbevf_reset_interrupt_capability(adapter);
2424err_set_interrupt:
2425 return err;
2426}
2427
0ac1e8ce
AD		 2428/**
2429 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2430 * @adapter: board private structure to clear interrupt scheme on
2431 *
2432 * We go through and clear interrupt specific resources and reset the structure
2433 * to pre-load conditions
2434 **/
2435static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2436{
87e70ab9
DS		 2437 int i;
2438
2439 for (i = 0; i < adapter->num_tx_queues; i++) {
2440 kfree(adapter->tx_ring[i]);
2441 adapter->tx_ring[i] = NULL;
2442 }
2443 for (i = 0; i < adapter->num_rx_queues; i++) {
2444 kfree(adapter->rx_ring[i]);
2445 adapter->rx_ring[i] = NULL;
2446 }
2447
0ac1e8ce
AD		 2448 adapter->num_tx_queues = 0;
2449 adapter->num_rx_queues = 0;
2450
2451 ixgbevf_free_q_vectors(adapter);
2452 ixgbevf_reset_interrupt_capability(adapter);
2453}
2454
92915f71
GR		 2455/**
2456 * ixgbevf_sw_init - Initialize general software structures
2457 * (struct ixgbevf_adapter)
2458 * @adapter: board private structure to initialize
2459 *
2460 * ixgbevf_sw_init initializes the Adapter private data structure.
2461 * Fields are initialized based on PCI device information and
2462 * OS network device settings (MTU size).
2463 **/
9f9a12f8 2464static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2465{
2466 struct ixgbe_hw *hw = &adapter->hw;
2467 struct pci_dev *pdev = adapter->pdev;
e1941a74 2468 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2469 int err;
2470
2471 /* PCI config space info */
2472
2473 hw->vendor_id = pdev->vendor;
2474 hw->device_id = pdev->device;
ff938e43 2475 hw->revision_id = pdev->revision;
92915f71
GR		 2476 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2477 hw->subsystem_device_id = pdev->subsystem_device;
2478
2479 hw->mbx.ops.init_params(hw);
56e94095
AD		 2480
2481 /* assume legacy case in which PF would only give VF 2 queues */
2482 hw->mac.max_tx_queues = 2;
2483 hw->mac.max_rx_queues = 2;
2484
798e381a
DS		 2485 /* lock to protect mailbox accesses */
2486 spin_lock_init(&adapter->mbx_lock);
2487
92915f71
GR		 2488 err = hw->mac.ops.reset_hw(hw);
2489 if (err) {
2490 dev_info(&pdev->dev,
e1941a74 2491 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 2492 } else {
2493 err = hw->mac.ops.init_hw(hw);
2494 if (err) {
dbd9636e 2495 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2496 goto out;
2497 }
798e381a 2498 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 2499 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2500 if (err)
2501 dev_info(&pdev->dev, "Error reading MAC address\n");
2502 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2503 dev_info(&pdev->dev,
2504 "MAC address not assigned by administrator.\n");
2505 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2506 }
2507
2508 if (!is_valid_ether_addr(netdev->dev_addr)) {
2509 dev_info(&pdev->dev, "Assigning random MAC address\n");
2510 eth_hw_addr_random(netdev);
2511 memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
92915f71
GR		 2512 }
2513
2514 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2515 adapter->rx_itr_setting = 1;
2516 adapter->tx_itr_setting = 1;
92915f71 2517
92915f71
GR		 2518 /* set default ring sizes */
2519 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2520 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2521
92915f71 2522 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2523 return 0;
92915f71
GR		 2524
2525out:
2526 return err;
2527}
2528
92915f71
GR		 2529#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2530 { \
2531 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2532 if (current_counter < last_counter) \
2533 counter += 0x100000000LL; \
2534 last_counter = current_counter; \
2535 counter &= 0xFFFFFFFF00000000LL; \
2536 counter |= current_counter; \
2537 }
2538
2539#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2540 { \
2541 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2542 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2543 u64 current_counter = (current_counter_msb << 32) | \
2544 current_counter_lsb; \
2545 if (current_counter < last_counter) \
2546 counter += 0x1000000000LL; \
2547 last_counter = current_counter; \
2548 counter &= 0xFFFFFFF000000000LL; \
2549 counter |= current_counter; \
2550 }
2551/**
2552 * ixgbevf_update_stats - Update the board statistics counters.
2553 * @adapter: board private structure
2554 **/
2555void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2556{
2557 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2558 int i;
92915f71 2559
088245a3
GR		 2560 if (!adapter->link_up)
2561 return;
2562
92915f71
GR		 2563 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2564 adapter->stats.vfgprc);
2565 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2566 adapter->stats.vfgptc);
2567 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2568 adapter->stats.last_vfgorc,
2569 adapter->stats.vfgorc);
2570 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2571 adapter->stats.last_vfgotc,
2572 adapter->stats.vfgotc);
2573 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2574 adapter->stats.vfmprc);
55fb277c
GR		 2575
2576 for (i = 0; i < adapter->num_rx_queues; i++) {
2577 adapter->hw_csum_rx_error +=
87e70ab9 2578 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2579 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2580 }
92915f71
GR		 2581}
2582
2583/**
2584 * ixgbevf_watchdog - Timer Call-back
2585 * @data: pointer to adapter cast into an unsigned long
2586 **/
2587static void ixgbevf_watchdog(unsigned long data)
2588{
2589 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2590 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2591 u32 eics = 0;
92915f71
GR		 2592 int i;
2593
2594 /*
2595 * Do the watchdog outside of interrupt context due to the lovely
2596 * delays that some of the newer hardware requires
2597 */
2598
2599 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2600 goto watchdog_short_circuit;
2601
2602 /* get one bit for every active tx/rx interrupt vector */
2603 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2604 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
6b43c446 2605 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2606 eics |= 1 << i;
92915f71
GR		 2607 }
2608
5f3600eb 2609 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
92915f71
GR		 2610
2611watchdog_short_circuit:
2612 schedule_work(&adapter->watchdog_task);
2613}
2614
2615/**
2616 * ixgbevf_tx_timeout - Respond to a Tx Hang
2617 * @netdev: network interface device structure
2618 **/
2619static void ixgbevf_tx_timeout(struct net_device *netdev)
2620{
2621 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2622
2623 /* Do the reset outside of interrupt context */
2624 schedule_work(&adapter->reset_task);
2625}
2626
2627static void ixgbevf_reset_task(struct work_struct *work)
2628{
2629 struct ixgbevf_adapter *adapter;
2630 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2631
2632 /* If we're already down or resetting, just bail */
2633 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2e7cfbdd 2634 test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
92915f71
GR		 2635 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2636 return;
2637
2638 adapter->tx_timeout_count++;
2639
2640 ixgbevf_reinit_locked(adapter);
2641}
2642
2643/**
2644 * ixgbevf_watchdog_task - worker thread to bring link up
2645 * @work: pointer to work_struct containing our data
2646 **/
2647static void ixgbevf_watchdog_task(struct work_struct *work)
2648{
2649 struct ixgbevf_adapter *adapter = container_of(work,
2650 struct ixgbevf_adapter,
2651 watchdog_task);
2652 struct net_device *netdev = adapter->netdev;
2653 struct ixgbe_hw *hw = &adapter->hw;
2654 u32 link_speed = adapter->link_speed;
2655 bool link_up = adapter->link_up;
92fe0bf7 2656 s32 need_reset;
92915f71 2657
26597802
MR		 2658 if (IXGBE_REMOVED(hw->hw_addr)) {
2659 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2660 rtnl_lock();
2661 ixgbevf_down(adapter);
2662 rtnl_unlock();
2663 }
2664 return;
2665 }
220fe050
DS		 2666 ixgbevf_queue_reset_subtask(adapter);
2667
92915f71
GR		 2668 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2669
2670 /*
2671 * Always check the link on the watchdog because we have
2672 * no LSC interrupt
2673 */
92fe0bf7 2674 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2675
92fe0bf7 2676 need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
1c55ed76 2677
92fe0bf7 2678 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2679
92fe0bf7
GR		 2680 if (need_reset) {
2681 adapter->link_up = link_up;
2682 adapter->link_speed = link_speed;
2683 netif_carrier_off(netdev);
2684 netif_tx_stop_all_queues(netdev);
2685 schedule_work(&adapter->reset_task);
2686 goto pf_has_reset;
92915f71
GR		 2687 }
2688 adapter->link_up = link_up;
2689 adapter->link_speed = link_speed;
2690
2691 if (link_up) {
2692 if (!netif_carrier_ok(netdev)) {
b876a744
GR		 2693 char *link_speed_string;
2694 switch (link_speed) {
2695 case IXGBE_LINK_SPEED_10GB_FULL:
2696 link_speed_string = "10 Gbps";
2697 break;
2698 case IXGBE_LINK_SPEED_1GB_FULL:
2699 link_speed_string = "1 Gbps";
2700 break;
2701 case IXGBE_LINK_SPEED_100_FULL:
2702 link_speed_string = "100 Mbps";
2703 break;
2704 default:
2705 link_speed_string = "unknown speed";
2706 break;
2707 }
6fe59675 2708 dev_info(&adapter->pdev->dev,
b876a744 2709 "NIC Link is Up, %s\n", link_speed_string);
92915f71
GR		 2710 netif_carrier_on(netdev);
2711 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2712 }
2713 } else {
2714 adapter->link_up = false;
2715 adapter->link_speed = 0;
2716 if (netif_carrier_ok(netdev)) {
6fe59675 2717 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
92915f71
GR		 2718 netif_carrier_off(netdev);
2719 netif_tx_stop_all_queues(netdev);
2720 }
2721 }
2722
92915f71
GR		 2723 ixgbevf_update_stats(adapter);
2724
33bd9f60 2725pf_has_reset:
92915f71 2726 /* Reset the timer */
2e7cfbdd
MR		 2727 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
2728 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
92915f71
GR		 2729 mod_timer(&adapter->watchdog_timer,
2730 round_jiffies(jiffies + (2 * HZ)));
2731
2732 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2733}
2734
2735/**
2736 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 2737 * @tx_ring: Tx descriptor ring for a specific queue
2738 *
2739 * Free all transmit software resources
2740 **/
05d063aa 2741void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2742{
05d063aa 2743 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 2744
2745 vfree(tx_ring->tx_buffer_info);
2746 tx_ring->tx_buffer_info = NULL;
2747
de02decb
DS		 2748 /* if not set, then don't free */
2749 if (!tx_ring->desc)
2750 return;
2751
05d063aa 2752 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2753 tx_ring->dma);
92915f71
GR		 2754
2755 tx_ring->desc = NULL;
2756}
2757
2758/**
2759 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2760 * @adapter: board private structure
2761 *
2762 * Free all transmit software resources
2763 **/
2764static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2765{
2766 int i;
2767
2768 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2769 if (adapter->tx_ring[i]->desc)
05d063aa 2770 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2771}
2772
2773/**
2774 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
92915f71
GR		 2775 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2776 *
2777 * Return 0 on success, negative on failure
2778 **/
05d063aa 2779int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2780{
92915f71
GR		 2781 int size;
2782
2783 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2784 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2785 if (!tx_ring->tx_buffer_info)
2786 goto err;
92915f71
GR		 2787
2788 /* round up to nearest 4K */
2789 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2790 tx_ring->size = ALIGN(tx_ring->size, 4096);
2791
05d063aa 2792 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2793 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2794 if (!tx_ring->desc)
2795 goto err;
2796
92915f71
GR		 2797 return 0;
2798
2799err:
2800 vfree(tx_ring->tx_buffer_info);
2801 tx_ring->tx_buffer_info = NULL;
2802 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2803 "descriptor ring\n");
2804 return -ENOMEM;
2805}
2806
2807/**
2808 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2809 * @adapter: board private structure
2810 *
2811 * If this function returns with an error, then it's possible one or
2812 * more of the rings is populated (while the rest are not). It is the
2813 * callers duty to clean those orphaned rings.
2814 *
2815 * Return 0 on success, negative on failure
2816 **/
2817static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2818{
2819 int i, err = 0;
2820
2821 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 2822 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2823 if (!err)
2824 continue;
2825 hw_dbg(&adapter->hw,
2826 "Allocation for Tx Queue %u failed\n", i);
2827 break;
2828 }
2829
2830 return err;
2831}
2832
2833/**
2834 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
92915f71
GR		 2835 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2836 *
2837 * Returns 0 on success, negative on failure
2838 **/
05d063aa 2839int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 2840{
92915f71
GR		 2841 int size;
2842
2843 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2844 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 2845 if (!rx_ring->rx_buffer_info)
05d063aa 2846 goto err;
92915f71
GR		 2847
2848 /* Round up to nearest 4K */
2849 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2850 rx_ring->size = ALIGN(rx_ring->size, 4096);
2851
05d063aa 2852 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 2853 &rx_ring->dma, GFP_KERNEL);
92915f71 2854
05d063aa
ET		 2855 if (!rx_ring->desc)
2856 goto err;
92915f71 2857
92915f71 2858 return 0;
05d063aa
ET		 2859err:
2860 vfree(rx_ring->rx_buffer_info);
2861 rx_ring->rx_buffer_info = NULL;
2862 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 2863 return -ENOMEM;
2864}
2865
2866/**
2867 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2868 * @adapter: board private structure
2869 *
2870 * If this function returns with an error, then it's possible one or
2871 * more of the rings is populated (while the rest are not). It is the
2872 * callers duty to clean those orphaned rings.
2873 *
2874 * Return 0 on success, negative on failure
2875 **/
2876static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2877{
2878 int i, err = 0;
2879
2880 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 2881 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 2882 if (!err)
2883 continue;
2884 hw_dbg(&adapter->hw,
2885 "Allocation for Rx Queue %u failed\n", i);
2886 break;
2887 }
2888 return err;
2889}
2890
2891/**
2892 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 2893 * @rx_ring: ring to clean the resources from
2894 *
2895 * Free all receive software resources
2896 **/
05d063aa 2897void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 2898{
05d063aa 2899 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR		 2900
2901 vfree(rx_ring->rx_buffer_info);
2902 rx_ring->rx_buffer_info = NULL;
2903
05d063aa 2904 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 2905 rx_ring->dma);
92915f71
GR		 2906
2907 rx_ring->desc = NULL;
2908}
2909
2910/**
2911 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2912 * @adapter: board private structure
2913 *
2914 * Free all receive software resources
2915 **/
2916static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2917{
2918 int i;
2919
2920 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2921 if (adapter->rx_ring[i]->desc)
05d063aa 2922 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 2923}
2924
2925/**
2926 * ixgbevf_open - Called when a network interface is made active
2927 * @netdev: network interface device structure
2928 *
2929 * Returns 0 on success, negative value on failure
2930 *
2931 * The open entry point is called when a network interface is made
2932 * active by the system (IFF_UP). At this point all resources needed
2933 * for transmit and receive operations are allocated, the interrupt
2934 * handler is registered with the OS, the watchdog timer is started,
2935 * and the stack is notified that the interface is ready.
2936 **/
2937static int ixgbevf_open(struct net_device *netdev)
2938{
2939 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2940 struct ixgbe_hw *hw = &adapter->hw;
2941 int err;
2942
a1f6c6b1 2943 /* A previous failure to open the device because of a lack of
2944 * available MSIX vector resources may have reset the number
2945 * of msix vectors variable to zero. The only way to recover
2946 * is to unload/reload the driver and hope that the system has
2947 * been able to recover some MSIX vector resources.
2948 */
2949 if (!adapter->num_msix_vectors)
2950 return -ENOMEM;
2951
92915f71
GR		 2952 /* disallow open during test */
2953 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2954 return -EBUSY;
2955
2956 if (hw->adapter_stopped) {
2957 ixgbevf_reset(adapter);
2958 /* if adapter is still stopped then PF isn't up and
2959 * the vf can't start. */
2960 if (hw->adapter_stopped) {
2961 err = IXGBE_ERR_MBX;
dbd9636e
JK		 2962 pr_err("Unable to start - perhaps the PF Driver isn't "
2963 "up yet\n");
92915f71
GR		 2964 goto err_setup_reset;
2965 }
2966 }
2967
2968 /* allocate transmit descriptors */
2969 err = ixgbevf_setup_all_tx_resources(adapter);
2970 if (err)
2971 goto err_setup_tx;
2972
2973 /* allocate receive descriptors */
2974 err = ixgbevf_setup_all_rx_resources(adapter);
2975 if (err)
2976 goto err_setup_rx;
2977
2978 ixgbevf_configure(adapter);
2979
2980 /*
2981 * Map the Tx/Rx rings to the vectors we were allotted.
2982 * if request_irq will be called in this function map_rings
2983 * must be called *before* up_complete
2984 */
2985 ixgbevf_map_rings_to_vectors(adapter);
2986
795180d8 2987 ixgbevf_up_complete(adapter);
92915f71
GR		 2988
2989 /* clear any pending interrupts, may auto mask */
2990 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2991 err = ixgbevf_request_irq(adapter);
2992 if (err)
2993 goto err_req_irq;
2994
5f3600eb 2995 ixgbevf_irq_enable(adapter);
92915f71
GR		 2996
2997 return 0;
2998
2999err_req_irq:
3000 ixgbevf_down(adapter);
92915f71
GR		 3001err_setup_rx:
3002 ixgbevf_free_all_rx_resources(adapter);
3003err_setup_tx:
3004 ixgbevf_free_all_tx_resources(adapter);
3005 ixgbevf_reset(adapter);
3006
3007err_setup_reset:
3008
3009 return err;
3010}
3011
3012/**
3013 * ixgbevf_close - Disables a network interface
3014 * @netdev: network interface device structure
3015 *
3016 * Returns 0, this is not allowed to fail
3017 *
3018 * The close entry point is called when an interface is de-activated
3019 * by the OS. The hardware is still under the drivers control, but
3020 * needs to be disabled. A global MAC reset is issued to stop the
3021 * hardware, and all transmit and receive resources are freed.
3022 **/
3023static int ixgbevf_close(struct net_device *netdev)
3024{
3025 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3026
3027 ixgbevf_down(adapter);
3028 ixgbevf_free_irq(adapter);
3029
3030 ixgbevf_free_all_tx_resources(adapter);
3031 ixgbevf_free_all_rx_resources(adapter);
3032
3033 return 0;
3034}
3035
220fe050
DS		 3036static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3037{
3038 struct net_device *dev = adapter->netdev;
3039
3040 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
3041 return;
3042
3043 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
3044
3045 /* if interface is down do nothing */
3046 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3047 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3048 return;
3049
3050 /* Hardware has to reinitialize queues and interrupts to
3051 * match packet buffer alignment. Unfortunately, the
3052 * hardware is not flexible enough to do this dynamically.
3053 */
3054 if (netif_running(dev))
3055 ixgbevf_close(dev);
3056
3057 ixgbevf_clear_interrupt_scheme(adapter);
3058 ixgbevf_init_interrupt_scheme(adapter);
3059
3060 if (netif_running(dev))
3061 ixgbevf_open(dev);
3062}
3063
70a10e25
AD		 3064static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3065 u32 vlan_macip_lens, u32 type_tucmd,
3066 u32 mss_l4len_idx)
92915f71
GR		 3067{
3068 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3069 u16 i = tx_ring->next_to_use;
92915f71 3070
70a10e25 3071 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3072
70a10e25
AD		 3073 i++;
3074 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3075
70a10e25
AD		 3076 /* set bits to identify this as an advanced context descriptor */
3077 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3078
70a10e25
AD		 3079 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3080 context_desc->seqnum_seed = 0;
3081 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3082 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3083}
3084
3085static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET		 3086 struct ixgbevf_tx_buffer *first,
3087 u8 *hdr_len)
70a10e25 3088{
7ad1a093 3089 struct sk_buff *skb = first->skb;
70a10e25
AD		 3090 u32 vlan_macip_lens, type_tucmd;
3091 u32 mss_l4len_idx, l4len;
8f12c034 3092 int err;
70a10e25 3093
01a545cf
ET		 3094 if (skb->ip_summed != CHECKSUM_PARTIAL)
3095 return 0;
3096
70a10e25
AD		 3097 if (!skb_is_gso(skb))
3098 return 0;
92915f71 3099
8f12c034
FR		 3100 err = skb_cow_head(skb, 0);
3101 if (err < 0)
3102 return err;
92915f71 3103
70a10e25
AD		 3104 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3105 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3106
3107 if (skb->protocol == htons(ETH_P_IP)) {
3108 struct iphdr *iph = ip_hdr(skb);
3109 iph->tot_len = 0;
3110 iph->check = 0;
3111 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3112 iph->daddr, 0,
3113 IPPROTO_TCP,
3114 0);
3115 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7ad1a093
ET		 3116 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3117 IXGBE_TX_FLAGS_CSUM |
3118 IXGBE_TX_FLAGS_IPV4;
70a10e25
AD		 3119 } else if (skb_is_gso_v6(skb)) {
3120 ipv6_hdr(skb)->payload_len = 0;
3121 tcp_hdr(skb)->check =
3122 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3123 &ipv6_hdr(skb)->daddr,
3124 0, IPPROTO_TCP, 0);
7ad1a093
ET		 3125 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3126 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3127 }
3128
3129 /* compute header lengths */
3130 l4len = tcp_hdrlen(skb);
3131 *hdr_len += l4len;
3132 *hdr_len = skb_transport_offset(skb) + l4len;
3133
7ad1a093
ET		 3134 /* update gso size and bytecount with header size */
3135 first->gso_segs = skb_shinfo(skb)->gso_segs;
3136 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3137
70a10e25
AD		 3138 /* mss_l4len_id: use 1 as index for TSO */
3139 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
3140 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3141 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
3142
3143 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3144 vlan_macip_lens = skb_network_header_len(skb);
3145 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3146 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3147
3148 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3149 type_tucmd, mss_l4len_idx);
3150
3151 return 1;
92915f71
GR		 3152}
3153
7ad1a093
ET		 3154static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3155 struct ixgbevf_tx_buffer *first)
92915f71 3156{
7ad1a093 3157 struct sk_buff *skb = first->skb;
70a10e25
AD		 3158 u32 vlan_macip_lens = 0;
3159 u32 mss_l4len_idx = 0;
3160 u32 type_tucmd = 0;
92915f71 3161
70a10e25
AD		 3162 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3163 u8 l4_hdr = 0;
3164 switch (skb->protocol) {
0933ce4a 3165 case htons(ETH_P_IP):
70a10e25
AD		 3166 vlan_macip_lens |= skb_network_header_len(skb);
3167 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3168 l4_hdr = ip_hdr(skb)->protocol;
3169 break;
0933ce4a 3170 case htons(ETH_P_IPV6):
70a10e25
AD		 3171 vlan_macip_lens |= skb_network_header_len(skb);
3172 l4_hdr = ipv6_hdr(skb)->nexthdr;
3173 break;
3174 default:
3175 if (unlikely(net_ratelimit())) {
3176 dev_warn(tx_ring->dev,
3177 "partial checksum but proto=%x!\n",
7ad1a093 3178 first->protocol);
70a10e25
AD		 3179 }
3180 break;
3181 }
92915f71 3182
70a10e25
AD		 3183 switch (l4_hdr) {
3184 case IPPROTO_TCP:
3185 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3186 mss_l4len_idx = tcp_hdrlen(skb) <<
3187 IXGBE_ADVTXD_L4LEN_SHIFT;
3188 break;
3189 case IPPROTO_SCTP:
3190 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3191 mss_l4len_idx = sizeof(struct sctphdr) <<
3192 IXGBE_ADVTXD_L4LEN_SHIFT;
3193 break;
3194 case IPPROTO_UDP:
3195 mss_l4len_idx = sizeof(struct udphdr) <<
3196 IXGBE_ADVTXD_L4LEN_SHIFT;
3197 break;
3198 default:
3199 if (unlikely(net_ratelimit())) {
3200 dev_warn(tx_ring->dev,
3201 "partial checksum but l4 proto=%x!\n",
3202 l4_hdr);
3203 }
3204 break;
3205 }
7ad1a093
ET		 3206
3207 /* update TX checksum flag */
3208 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
92915f71
GR		 3209 }
3210
70a10e25
AD		 3211 /* vlan_macip_lens: MACLEN, VLAN tag */
3212 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3213 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3214
3215 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3216 type_tucmd, mss_l4len_idx);
92915f71
GR		 3217}
3218
29d37fa1 3219static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3220{
29d37fa1
ET		 3221 /* set type for advanced descriptor with frame checksum insertion */
3222 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3223 IXGBE_ADVTXD_DCMD_IFCS |
3224 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3225
29d37fa1
ET		 3226 /* set HW vlan bit if vlan is present */
3227 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3228 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3229
29d37fa1
ET		 3230 /* set segmentation enable bits for TSO/FSO */
3231 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3232 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3233
29d37fa1
ET		 3234 return cmd_type;
3235}
92915f71 3236
29d37fa1
ET		 3237static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3238 u32 tx_flags, unsigned int paylen)
3239{
3240 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3241
29d37fa1
ET		 3242 /* enable L4 checksum for TSO and TX checksum offload */
3243 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3244 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3245
29d37fa1
ET		 3246 /* enble IPv4 checksum for TSO */
3247 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3248 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3249
29d37fa1
ET		 3250 /* use index 1 context for TSO/FSO/FCOE */
3251 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3252 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3253
29d37fa1
ET		 3254 /* Check Context must be set if Tx switch is enabled, which it
3255 * always is for case where virtual functions are running
3256 */
3257 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3258
29d37fa1
ET		 3259 tx_desc->read.olinfo_status = olinfo_status;
3260}
92915f71 3261
29d37fa1
ET		 3262static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3263 struct ixgbevf_tx_buffer *first,
3264 const u8 hdr_len)
3265{
3266 dma_addr_t dma;
3267 struct sk_buff *skb = first->skb;
3268 struct ixgbevf_tx_buffer *tx_buffer;
3269 union ixgbe_adv_tx_desc *tx_desc;
3270 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3271 unsigned int data_len = skb->data_len;
3272 unsigned int size = skb_headlen(skb);
3273 unsigned int paylen = skb->len - hdr_len;
3274 u32 tx_flags = first->tx_flags;
3275 __le32 cmd_type;
3276 u16 i = tx_ring->next_to_use;
9bdfefd2 3277
29d37fa1 3278 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3279
29d37fa1
ET		 3280 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3281 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3282
29d37fa1
ET		 3283 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3284 if (dma_mapping_error(tx_ring->dev, dma))
3285 goto dma_error;
92915f71 3286
29d37fa1
ET		 3287 /* record length, and DMA address */
3288 dma_unmap_len_set(first, len, size);
3289 dma_unmap_addr_set(first, dma, dma);
92915f71 3290
29d37fa1 3291 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3292
29d37fa1
ET		 3293 for (;;) {
3294 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3295 tx_desc->read.cmd_type_len =
3296 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3297
29d37fa1
ET		 3298 i++;
3299 tx_desc++;
3300 if (i == tx_ring->count) {
3301 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3302 i = 0;
3303 }
92915f71 3304
29d37fa1
ET		 3305 dma += IXGBE_MAX_DATA_PER_TXD;
3306 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3307
29d37fa1
ET		 3308 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3309 tx_desc->read.olinfo_status = 0;
3310 }
92915f71 3311
29d37fa1
ET		 3312 if (likely(!data_len))
3313 break;
92915f71 3314
29d37fa1 3315 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3316
29d37fa1
ET		 3317 i++;
3318 tx_desc++;
3319 if (i == tx_ring->count) {
3320 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3321 i = 0;
3322 }
92915f71 3323
29d37fa1
ET		 3324 size = skb_frag_size(frag);
3325 data_len -= size;
92915f71 3326
29d37fa1
ET		 3327 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3328 DMA_TO_DEVICE);
3329 if (dma_mapping_error(tx_ring->dev, dma))
3330 goto dma_error;
70a10e25 3331
29d37fa1
ET		 3332 tx_buffer = &tx_ring->tx_buffer_info[i];
3333 dma_unmap_len_set(tx_buffer, len, size);
3334 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3335
29d37fa1
ET		 3336 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3337 tx_desc->read.olinfo_status = 0;
3338
3339 frag++;
70a10e25 3340 }
92915f71 3341
29d37fa1
ET		 3342 /* write last descriptor with RS and EOP bits */
3343 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3344 tx_desc->read.cmd_type_len = cmd_type;
3345
3346 /* set the timestamp */
3347 first->time_stamp = jiffies;
3348
3349 /* Force memory writes to complete before letting h/w know there
3350 * are new descriptors to fetch. (Only applicable for weak-ordered
3351 * memory model archs, such as IA-64).
3352 *
3353 * We also need this memory barrier (wmb) to make certain all of the
3354 * status bits have been updated before next_to_watch is written.
70a10e25 3355 */
29d37fa1 3356 wmb();
92915f71 3357
29d37fa1
ET		 3358 /* set next_to_watch value indicating a packet is present */
3359 first->next_to_watch = tx_desc;
92915f71 3360
29d37fa1
ET		 3361 i++;
3362 if (i == tx_ring->count)
3363 i = 0;
9bdfefd2 3364
29d37fa1 3365 tx_ring->next_to_use = i;
92915f71 3366
29d37fa1 3367 /* notify HW of packet */
06380db6 3368 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 3369
3370 return;
3371dma_error:
3372 dev_err(tx_ring->dev, "TX DMA map failed\n");
3373
3374 /* clear dma mappings for failed tx_buffer_info map */
3375 for (;;) {
3376 tx_buffer = &tx_ring->tx_buffer_info[i];
3377 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3378 if (tx_buffer == first)
3379 break;
3380 if (i == 0)
3381 i = tx_ring->count;
3382 i--;
3383 }
92915f71 3384
92915f71 3385 tx_ring->next_to_use = i;
92915f71
GR		 3386}
3387
fb40195c 3388static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3389{
fb40195c 3390 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 3391 /* Herbert's original patch had:
3392 * smp_mb__after_netif_stop_queue();
3393 * but since that doesn't exist yet, just open code it. */
3394 smp_mb();
3395
3396 /* We need to check again in a case another CPU has just
3397 * made room available. */
f880d07b 3398 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 3399 return -EBUSY;
3400
3401 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3402 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 3403 ++tx_ring->tx_stats.restart_queue;
3404
92915f71
GR		 3405 return 0;
3406}
3407
fb40195c 3408static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3409{
f880d07b 3410 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3411 return 0;
fb40195c 3412 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 3413}
3414
3415static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3416{
3417 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3418 struct ixgbevf_tx_buffer *first;
92915f71 3419 struct ixgbevf_ring *tx_ring;
7ad1a093
ET		 3420 int tso;
3421 u32 tx_flags = 0;
3595990a
AD		 3422 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3423#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3424 unsigned short f;
3425#endif
7ad1a093 3426 u8 hdr_len = 0;
f9d08f16 3427 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3428
46acc460 3429 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
f9d08f16
GR		 3430 dev_kfree_skb(skb);
3431 return NETDEV_TX_OK;
3432 }
92915f71 3433
7ad1a093 3434 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3435
3595990a
AD		 3436 /*
3437 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3438 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3439 * + 2 desc gap to keep tail from touching head,
3440 * + 1 desc for context descriptor,
3441 * otherwise try next time
3442 */
3443#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3444 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3445 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3446#else
3447 count += skb_shinfo(skb)->nr_frags;
3448#endif
fb40195c 3449 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3450 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 3451 return NETDEV_TX_BUSY;
3452 }
3453
7ad1a093
ET		 3454 /* record the location of the first descriptor for this packet */
3455 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3456 first->skb = skb;
3457 first->bytecount = skb->len;
3458 first->gso_segs = 1;
3459
eab6d18d 3460 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 3461 tx_flags |= vlan_tx_tag_get(skb);
3462 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3463 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3464 }
3465
7ad1a093
ET		 3466 /* record initial flags and protocol */
3467 first->tx_flags = tx_flags;
3468 first->protocol = vlan_get_protocol(skb);
92915f71 3469
7ad1a093
ET		 3470 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3471 if (tso < 0)
3472 goto out_drop;
b5d217f3 3473 else if (!tso)
7ad1a093 3474 ixgbevf_tx_csum(tx_ring, first);
92915f71 3475
29d37fa1 3476 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3477
fb40195c 3478 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3479
7ad1a093
ET		 3480 return NETDEV_TX_OK;
3481
3482out_drop:
3483 dev_kfree_skb_any(first->skb);
3484 first->skb = NULL;
3485
92915f71
GR		 3486 return NETDEV_TX_OK;
3487}
3488
92915f71
GR		 3489/**
3490 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3491 * @netdev: network interface device structure
3492 * @p: pointer to an address structure
3493 *
3494 * Returns 0 on success, negative on failure
3495 **/
3496static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3497{
3498 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3499 struct ixgbe_hw *hw = &adapter->hw;
3500 struct sockaddr *addr = p;
3501
3502 if (!is_valid_ether_addr(addr->sa_data))
3503 return -EADDRNOTAVAIL;
3504
3505 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3506 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3507
55fdd45b 3508 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3509
92fe0bf7 3510 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
92915f71 3511
55fdd45b 3512 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3513
92915f71
GR		 3514 return 0;
3515}
3516
3517/**
3518 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3519 * @netdev: network interface device structure
3520 * @new_mtu: new value for maximum frame size
3521 *
3522 * Returns 0 on success, negative on failure
3523 **/
3524static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3525{
3526 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3527 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3528 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3529 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3530
56e94095
AD		 3531 switch (adapter->hw.api_version) {
3532 case ixgbe_mbox_api_11:
69bfbec4 3533 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD		 3534 break;
3535 default:
47068b0d 3536 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
56e94095
AD		 3537 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3538 break;
3539 }
92915f71
GR		 3540
3541 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3542 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3543 return -EINVAL;
3544
bad17234 3545 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71
GR		 3546 netdev->mtu, new_mtu);
3547 /* must set new MTU before calling down or up */
3548 netdev->mtu = new_mtu;
3549
bad17234
ET		 3550 /* notify the PF of our intent to use this size of frame */
3551 ixgbevf_rlpml_set_vf(hw, max_frame);
92915f71
GR		 3552
3553 return 0;
3554}
3555
688ff32d
ET		 3556#ifdef CONFIG_NET_POLL_CONTROLLER
3557/* Polling 'interrupt' - used by things like netconsole to send skbs
3558 * without having to re-enable interrupts. It's not called while
3559 * the interrupt routine is executing.
3560 */
3561static void ixgbevf_netpoll(struct net_device *netdev)
3562{
3563 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3564 int i;
3565
3566 /* if interface is down do nothing */
3567 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3568 return;
3569 for (i = 0; i < adapter->num_rx_queues; i++)
3570 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3571}
3572#endif /* CONFIG_NET_POLL_CONTROLLER */
3573
0ac1e8ce 3574static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3575{
3576 struct net_device *netdev = pci_get_drvdata(pdev);
3577 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3578#ifdef CONFIG_PM
3579 int retval = 0;
3580#endif
92915f71
GR		 3581
3582 netif_device_detach(netdev);
3583
3584 if (netif_running(netdev)) {
0ac1e8ce 3585 rtnl_lock();
92915f71
GR		 3586 ixgbevf_down(adapter);
3587 ixgbevf_free_irq(adapter);
3588 ixgbevf_free_all_tx_resources(adapter);
3589 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3590 rtnl_unlock();
92915f71
GR		 3591 }
3592
0ac1e8ce 3593 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3594
0ac1e8ce
AD		 3595#ifdef CONFIG_PM
3596 retval = pci_save_state(pdev);
3597 if (retval)
3598 return retval;
92915f71 3599
0ac1e8ce 3600#endif
bc0c7151
MR		 3601 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3602 pci_disable_device(pdev);
0ac1e8ce
AD		 3603
3604 return 0;
3605}
3606
3607#ifdef CONFIG_PM
3608static int ixgbevf_resume(struct pci_dev *pdev)
3609{
27ae2967
WY		 3610 struct net_device *netdev = pci_get_drvdata(pdev);
3611 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3612 u32 err;
3613
0ac1e8ce
AD		 3614 pci_restore_state(pdev);
3615 /*
3616 * pci_restore_state clears dev->state_saved so call
3617 * pci_save_state to restore it.
3618 */
3619 pci_save_state(pdev);
3620
3621 err = pci_enable_device_mem(pdev);
3622 if (err) {
3623 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3624 return err;
3625 }
4e857c58 3626 smp_mb__before_atomic();
bc0c7151 3627 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 3628 pci_set_master(pdev);
3629
798e381a
DS		 3630 ixgbevf_reset(adapter);
3631
0ac1e8ce
AD		 3632 rtnl_lock();
3633 err = ixgbevf_init_interrupt_scheme(adapter);
3634 rtnl_unlock();
3635 if (err) {
3636 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3637 return err;
3638 }
3639
0ac1e8ce
AD		 3640 if (netif_running(netdev)) {
3641 err = ixgbevf_open(netdev);
3642 if (err)
3643 return err;
3644 }
3645
3646 netif_device_attach(netdev);
3647
3648 return err;
3649}
3650
3651#endif /* CONFIG_PM */
3652static void ixgbevf_shutdown(struct pci_dev *pdev)
3653{
3654 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3655}
3656
4197aa7b
ED		 3657static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3658 struct rtnl_link_stats64 *stats)
3659{
3660 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3661 unsigned int start;
3662 u64 bytes, packets;
3663 const struct ixgbevf_ring *ring;
3664 int i;
3665
3666 ixgbevf_update_stats(adapter);
3667
3668 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3669
3670 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3671 ring = adapter->rx_ring[i];
4197aa7b 3672 do {
57a7744e 3673 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3674 bytes = ring->stats.bytes;
3675 packets = ring->stats.packets;
57a7744e 3676 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3677 stats->rx_bytes += bytes;
3678 stats->rx_packets += packets;
3679 }
3680
3681 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3682 ring = adapter->tx_ring[i];
4197aa7b 3683 do {
57a7744e 3684 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3685 bytes = ring->stats.bytes;
3686 packets = ring->stats.packets;
57a7744e 3687 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3688 stats->tx_bytes += bytes;
3689 stats->tx_packets += packets;
3690 }
3691
3692 return stats;
3693}
3694
0ac1e8ce 3695static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3696 .ndo_open = ixgbevf_open,
3697 .ndo_stop = ixgbevf_close,
3698 .ndo_start_xmit = ixgbevf_xmit_frame,
3699 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3700 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3701 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3702 .ndo_set_mac_address = ixgbevf_set_mac,
3703 .ndo_change_mtu = ixgbevf_change_mtu,
3704 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3705 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3706 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
c777cdfa
JK		 3707#ifdef CONFIG_NET_RX_BUSY_POLL
3708 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3709#endif
688ff32d
ET		 3710#ifdef CONFIG_NET_POLL_CONTROLLER
3711 .ndo_poll_controller = ixgbevf_netpoll,
3712#endif
92915f71 3713};
92915f71
GR		 3714
3715static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3716{
0ac1e8ce 3717 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3718 ixgbevf_set_ethtool_ops(dev);
3719 dev->watchdog_timeo = 5 * HZ;
3720}
3721
3722/**
3723 * ixgbevf_probe - Device Initialization Routine
3724 * @pdev: PCI device information struct
3725 * @ent: entry in ixgbevf_pci_tbl
3726 *
3727 * Returns 0 on success, negative on failure
3728 *
3729 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3730 * The OS initialization, configuring of the adapter private structure,
3731 * and a hardware reset occur.
3732 **/
1dd06ae8 3733static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 3734{
3735 struct net_device *netdev;
3736 struct ixgbevf_adapter *adapter = NULL;
3737 struct ixgbe_hw *hw = NULL;
3738 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71
GR		 3739 int err, pci_using_dac;
3740
3741 err = pci_enable_device(pdev);
3742 if (err)
3743 return err;
3744
53567aa4 3745 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3746 pci_using_dac = 1;
3747 } else {
53567aa4 3748 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3749 if (err) {
53567aa4
RK		 3750 dev_err(&pdev->dev, "No usable DMA "
3751 "configuration, aborting\n");
3752 goto err_dma;
92915f71
GR		 3753 }
3754 pci_using_dac = 0;
3755 }
3756
3757 err = pci_request_regions(pdev, ixgbevf_driver_name);
3758 if (err) {
3759 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3760 goto err_pci_reg;
3761 }
3762
3763 pci_set_master(pdev);
3764
92915f71
GR		 3765 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3766 MAX_TX_QUEUES);
92915f71
GR		 3767 if (!netdev) {
3768 err = -ENOMEM;
3769 goto err_alloc_etherdev;
3770 }
3771
3772 SET_NETDEV_DEV(netdev, &pdev->dev);
3773
3774 pci_set_drvdata(pdev, netdev);
3775 adapter = netdev_priv(netdev);
3776
3777 adapter->netdev = netdev;
3778 adapter->pdev = pdev;
3779 hw = &adapter->hw;
3780 hw->back = adapter;
b3f4d599 3781 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71
GR		 3782
3783 /*
3784 * call save state here in standalone driver because it relies on
3785 * adapter struct to exist, and needs to call netdev_priv
3786 */
3787 pci_save_state(pdev);
3788
3789 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3790 pci_resource_len(pdev, 0));
dbf8b0d8 3791 adapter->io_addr = hw->hw_addr;
92915f71
GR		 3792 if (!hw->hw_addr) {
3793 err = -EIO;
3794 goto err_ioremap;
3795 }
3796
3797 ixgbevf_assign_netdev_ops(netdev);
3798
92915f71
GR		 3799 /* Setup hw api */
3800 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3801 hw->mac.type = ii->mac;
3802
3803 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3804 sizeof(struct ixgbe_mbx_operations));
92915f71 3805
92915f71
GR		 3806 /* setup the private structure */
3807 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 3808 if (err)
3809 goto err_sw_init;
3810
3811 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 3812 if (!is_valid_ether_addr(netdev->dev_addr)) {
3813 pr_err("invalid MAC address\n");
3814 err = -EIO;
3815 goto err_sw_init;
3816 }
92915f71 3817
471a76de 3818 netdev->hw_features = NETIF_F_SG |
92915f71 3819 NETIF_F_IP_CSUM |
471a76de
MM		 3820 NETIF_F_IPV6_CSUM |
3821 NETIF_F_TSO |
3822 NETIF_F_TSO6 |
3823 NETIF_F_RXCSUM;
3824
3825 netdev->features = netdev->hw_features |
f646968f
PM		 3826 NETIF_F_HW_VLAN_CTAG_TX |
3827 NETIF_F_HW_VLAN_CTAG_RX |
3828 NETIF_F_HW_VLAN_CTAG_FILTER;
92915f71 3829
92915f71
GR		 3830 netdev->vlan_features |= NETIF_F_TSO;
3831 netdev->vlan_features |= NETIF_F_TSO6;
3832 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3833 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3834 netdev->vlan_features |= NETIF_F_SG;
3835
3836 if (pci_using_dac)
3837 netdev->features |= NETIF_F_HIGHDMA;
3838
01789349
JP		 3839 netdev->priv_flags |= IFF_UNICAST_FLT;
3840
92915f71 3841 init_timer(&adapter->watchdog_timer);
c061b18d 3842 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3843 adapter->watchdog_timer.data = (unsigned long)adapter;
3844
ea699569
MR		 3845 if (IXGBE_REMOVED(hw->hw_addr)) {
3846 err = -EIO;
3847 goto err_sw_init;
3848 }
92915f71
GR		 3849 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3850 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
ea699569 3851 set_bit(__IXGBEVF_WORK_INIT, &adapter->state);
92915f71
GR		 3852
3853 err = ixgbevf_init_interrupt_scheme(adapter);
3854 if (err)
3855 goto err_sw_init;
3856
92915f71
GR		 3857 strcpy(netdev->name, "eth%d");
3858
3859 err = register_netdev(netdev);
3860 if (err)
3861 goto err_register;
3862
5d426ad1
GR		 3863 netif_carrier_off(netdev);
3864
33bd9f60
GR		 3865 ixgbevf_init_last_counter_stats(adapter);
3866
47068b0d
ET		 3867 /* print the VF info */
3868 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
3869 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 3870
47068b0d
ET		 3871 switch (hw->mac.type) {
3872 case ixgbe_mac_X550_vf:
3873 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
3874 break;
3875 case ixgbe_mac_X540_vf:
3876 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
3877 break;
3878 case ixgbe_mac_82599_vf:
3879 default:
3880 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
3881 break;
3882 }
92915f71 3883
92915f71
GR		 3884 return 0;
3885
3886err_register:
0ac1e8ce 3887 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 3888err_sw_init:
3889 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 3890 iounmap(adapter->io_addr);
92915f71
GR		 3891err_ioremap:
3892 free_netdev(netdev);
3893err_alloc_etherdev:
3894 pci_release_regions(pdev);
3895err_pci_reg:
3896err_dma:
bc0c7151
MR		 3897 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3898 pci_disable_device(pdev);
92915f71
GR		 3899 return err;
3900}
3901
3902/**
3903 * ixgbevf_remove - Device Removal Routine
3904 * @pdev: PCI device information struct
3905 *
3906 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3907 * that it should release a PCI device. The could be caused by a
3908 * Hot-Plug event, or because the driver is going to be removed from
3909 * memory.
3910 **/
9f9a12f8 3911static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 3912{
3913 struct net_device *netdev = pci_get_drvdata(pdev);
3914 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3915
2e7cfbdd 3916 set_bit(__IXGBEVF_REMOVING, &adapter->state);
92915f71
GR		 3917
3918 del_timer_sync(&adapter->watchdog_timer);
3919
23f333a2 3920 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3921 cancel_work_sync(&adapter->watchdog_task);
3922
fd13a9ab 3923 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 3924 unregister_netdev(netdev);
92915f71 3925
0ac1e8ce 3926 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 3927 ixgbevf_reset_interrupt_capability(adapter);
3928
dbf8b0d8 3929 iounmap(adapter->io_addr);
92915f71
GR		 3930 pci_release_regions(pdev);
3931
3932 hw_dbg(&adapter->hw, "Remove complete\n");
3933
92915f71
GR		 3934 free_netdev(netdev);
3935
bc0c7151
MR		 3936 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3937 pci_disable_device(pdev);
92915f71
GR		 3938}
3939
9f19f31d
AD		 3940/**
3941 * ixgbevf_io_error_detected - called when PCI error is detected
3942 * @pdev: Pointer to PCI device
3943 * @state: The current pci connection state
3944 *
3945 * This function is called after a PCI bus error affecting
3946 * this device has been detected.
3947 */
3948static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
3949 pci_channel_state_t state)
3950{
3951 struct net_device *netdev = pci_get_drvdata(pdev);
3952 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3953
ea699569
MR		 3954 if (!test_bit(__IXGBEVF_WORK_INIT, &adapter->state))
3955 return PCI_ERS_RESULT_DISCONNECT;
3956
bc0c7151 3957 rtnl_lock();
9f19f31d
AD		 3958 netif_device_detach(netdev);
3959
bc0c7151
MR		 3960 if (state == pci_channel_io_perm_failure) {
3961 rtnl_unlock();
9f19f31d 3962 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 3963 }
9f19f31d
AD		 3964
3965 if (netif_running(netdev))
3966 ixgbevf_down(adapter);
3967
bc0c7151
MR		 3968 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3969 pci_disable_device(pdev);
3970 rtnl_unlock();
9f19f31d
AD		 3971
3972 /* Request a slot slot reset. */
3973 return PCI_ERS_RESULT_NEED_RESET;
3974}
3975
3976/**
3977 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
3978 * @pdev: Pointer to PCI device
3979 *
3980 * Restart the card from scratch, as if from a cold-boot. Implementation
3981 * resembles the first-half of the ixgbevf_resume routine.
3982 */
3983static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
3984{
3985 struct net_device *netdev = pci_get_drvdata(pdev);
3986 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3987
3988 if (pci_enable_device_mem(pdev)) {
3989 dev_err(&pdev->dev,
3990 "Cannot re-enable PCI device after reset.\n");
3991 return PCI_ERS_RESULT_DISCONNECT;
3992 }
3993
4e857c58 3994 smp_mb__before_atomic();
bc0c7151 3995 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 3996 pci_set_master(pdev);
3997
3998 ixgbevf_reset(adapter);
3999
4000 return PCI_ERS_RESULT_RECOVERED;
4001}
4002
4003/**
4004 * ixgbevf_io_resume - called when traffic can start flowing again.
4005 * @pdev: Pointer to PCI device
4006 *
4007 * This callback is called when the error recovery driver tells us that
4008 * its OK to resume normal operation. Implementation resembles the
4009 * second-half of the ixgbevf_resume routine.
4010 */
4011static void ixgbevf_io_resume(struct pci_dev *pdev)
4012{
4013 struct net_device *netdev = pci_get_drvdata(pdev);
4014 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4015
4016 if (netif_running(netdev))
4017 ixgbevf_up(adapter);
4018
4019 netif_device_attach(netdev);
4020}
4021
4022/* PCI Error Recovery (ERS) */
3646f0e5 4023static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4024 .error_detected = ixgbevf_io_error_detected,
4025 .slot_reset = ixgbevf_io_slot_reset,
4026 .resume = ixgbevf_io_resume,
4027};
4028
92915f71
GR		 4029static struct pci_driver ixgbevf_driver = {
4030 .name = ixgbevf_driver_name,
4031 .id_table = ixgbevf_pci_tbl,
4032 .probe = ixgbevf_probe,
9f9a12f8 4033 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4034#ifdef CONFIG_PM
4035 /* Power Management Hooks */
4036 .suspend = ixgbevf_suspend,
4037 .resume = ixgbevf_resume,
4038#endif
92915f71 4039 .shutdown = ixgbevf_shutdown,
9f19f31d 4040 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4041};
4042
4043/**
65d676c8 4044 * ixgbevf_init_module - Driver Registration Routine
92915f71 4045 *
65d676c8 4046 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4047 * loaded. All it does is register with the PCI subsystem.
4048 **/
4049static int __init ixgbevf_init_module(void)
4050{
4051 int ret;
dbd9636e
JK		 4052 pr_info("%s - version %s\n", ixgbevf_driver_string,
4053 ixgbevf_driver_version);
92915f71 4054
dbd9636e 4055 pr_info("%s\n", ixgbevf_copyright);
92915f71
GR		 4056
4057 ret = pci_register_driver(&ixgbevf_driver);
4058 return ret;
4059}
4060
4061module_init(ixgbevf_init_module);
4062
4063/**
65d676c8 4064 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4065 *
65d676c8 4066 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4067 * from memory.
4068 **/
4069static void __exit ixgbevf_exit_module(void)
4070{
4071 pci_unregister_driver(&ixgbevf_driver);
4072}
4073
4074#ifdef DEBUG
4075/**
65d676c8 4076 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 4077 * used by hardware layer to print debugging information
4078 **/
4079char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4080{
4081 struct ixgbevf_adapter *adapter = hw->back;
4082 return adapter->netdev->name;
4083}
4084
4085#endif
4086module_exit(ixgbevf_exit_module);
4087
4088/* ixgbevf_main.c */
Linux kernel - Deliverables
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