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ixgbevf: Minor cleanups
[deliverable/linux.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
dec0d8e4 4 Copyright(c) 1999 - 2015 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
dec0d8e4 16 this program; if not, see <http://www.gnu.org/licenses/>.
92915f71
GR		 17
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
92915f71
GR		 27/******************************************************************************
28 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
29******************************************************************************/
dbd9636e
JK		 30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
92915f71 33#include <linux/types.h>
dadcd65f 34#include <linux/bitops.h>
92915f71
GR		 35#include <linux/module.h>
36#include <linux/pci.h>
37#include <linux/netdevice.h>
38#include <linux/vmalloc.h>
39#include <linux/string.h>
40#include <linux/in.h>
41#include <linux/ip.h>
42#include <linux/tcp.h>
70a10e25 43#include <linux/sctp.h>
92915f71 44#include <linux/ipv6.h>
5a0e3ad6 45#include <linux/slab.h>
92915f71
GR		 46#include <net/checksum.h>
47#include <net/ip6_checksum.h>
48#include <linux/ethtool.h>
01789349 49#include <linux/if.h>
92915f71 50#include <linux/if_vlan.h>
70c71606 51#include <linux/prefetch.h>
92915f71
GR		 52
53#include "ixgbevf.h"
54
3d8fe98f 55const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 56static const char ixgbevf_driver_string[] =
422e05d1 57 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 58
86f359f6 59#define DRV_VERSION "2.12.1-k"
92915f71 60const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 61static char ixgbevf_copyright[] =
40a13e24 62 "Copyright (c) 2009 - 2015 Intel Corporation.";
92915f71
GR		 63
64static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 65 [board_82599_vf] = &ixgbevf_82599_vf_info,
66 [board_X540_vf] = &ixgbevf_X540_vf_info,
47068b0d
ET		 67 [board_X550_vf] = &ixgbevf_X550_vf_info,
68 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
92915f71
GR		 69};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
9baa3c34 79static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4
SH		 80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
47068b0d
ET		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
92915f71
GR		 84 /* required last entry */
85 {0, }
86};
87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
88
89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 90MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
92915f71
GR		 91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
b3f4d599 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
95static int debug = -1;
96module_param(debug, int, 0);
97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 98
40a13e24
MR		 99static struct workqueue_struct *ixgbevf_wq;
100
9ac5c5cc
ET		 101static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
102{
103 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
104 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
105 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 106 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 107}
108
109static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
110{
111 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
112
113 /* flush memory to make sure state is correct before next watchdog */
114 smp_mb__before_atomic();
115 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
116}
117
92915f71 118/* forward decls */
220fe050 119static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 120static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 121static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 122
dbf8b0d8
MR		 123static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
124{
125 struct ixgbevf_adapter *adapter = hw->back;
126
127 if (!hw->hw_addr)
128 return;
129 hw->hw_addr = NULL;
130 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 131 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
132 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 133}
134
135static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
136{
137 u32 value;
138
139 /* The following check not only optimizes a bit by not
140 * performing a read on the status register when the
141 * register just read was a status register read that
142 * returned IXGBE_FAILED_READ_REG. It also blocks any
143 * potential recursion.
144 */
145 if (reg == IXGBE_VFSTATUS) {
146 ixgbevf_remove_adapter(hw);
147 return;
148 }
32c74949 149 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 150 if (value == IXGBE_FAILED_READ_REG)
151 ixgbevf_remove_adapter(hw);
152}
153
32c74949 154u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8
MR		 155{
156 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
157 u32 value;
158
159 if (IXGBE_REMOVED(reg_addr))
160 return IXGBE_FAILED_READ_REG;
161 value = readl(reg_addr + reg);
162 if (unlikely(value == IXGBE_FAILED_READ_REG))
163 ixgbevf_check_remove(hw, reg);
164 return value;
165}
166
49ce9c2c 167/**
65d676c8 168 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 169 * @adapter: pointer to adapter struct
170 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
171 * @queue: queue to map the corresponding interrupt to
172 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 173 **/
92915f71
GR		 174static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
175 u8 queue, u8 msix_vector)
176{
177 u32 ivar, index;
178 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 179
92915f71
GR		 180 if (direction == -1) {
181 /* other causes */
182 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
183 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
184 ivar &= ~0xFF;
185 ivar |= msix_vector;
186 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
187 } else {
dec0d8e4 188 /* Tx or Rx causes */
92915f71
GR		 189 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
190 index = ((16 * (queue & 1)) + (8 * direction));
191 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
192 ivar &= ~(0xFF << index);
193 ivar |= (msix_vector << index);
194 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
195 }
196}
197
70a10e25 198static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
ET		 199 struct ixgbevf_tx_buffer *tx_buffer)
200{
201 if (tx_buffer->skb) {
202 dev_kfree_skb_any(tx_buffer->skb);
203 if (dma_unmap_len(tx_buffer, len))
70a10e25 204 dma_unmap_single(tx_ring->dev,
9bdfefd2
ET		 205 dma_unmap_addr(tx_buffer, dma),
206 dma_unmap_len(tx_buffer, len),
2a1f8794 207 DMA_TO_DEVICE);
9bdfefd2
ET		 208 } else if (dma_unmap_len(tx_buffer, len)) {
209 dma_unmap_page(tx_ring->dev,
210 dma_unmap_addr(tx_buffer, dma),
211 dma_unmap_len(tx_buffer, len),
212 DMA_TO_DEVICE);
92915f71 213 }
9bdfefd2
ET		 214 tx_buffer->next_to_watch = NULL;
215 tx_buffer->skb = NULL;
216 dma_unmap_len_set(tx_buffer, len, 0);
217 /* tx_buffer must be completely set up in the transmit path */
92915f71
GR		 218}
219
e08400b7
ET		 220static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
221{
222 return ring->stats.packets;
223}
92915f71 224
e08400b7
ET		 225static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
226{
227 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
228 struct ixgbe_hw *hw = &adapter->hw;
92915f71 229
e08400b7
ET		 230 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
231 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
232
233 if (head != tail)
234 return (head < tail) ?
235 tail - head : (tail + ring->count - head);
236
237 return 0;
238}
239
240static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
241{
242 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
243 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
244 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
245
246 clear_check_for_tx_hang(tx_ring);
247
248 /* Check for a hung queue, but be thorough. This verifies
249 * that a transmit has been completed since the previous
250 * check AND there is at least one packet pending. The
251 * ARMED bit is set to indicate a potential hang.
252 */
253 if ((tx_done_old == tx_done) && tx_pending) {
254 /* make sure it is true for two checks in a row */
255 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
256 &tx_ring->state);
257 }
258 /* reset the countdown */
259 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
260
261 /* update completed stats and continue */
262 tx_ring->tx_stats.tx_done_old = tx_done;
263
264 return false;
265}
266
9ac5c5cc
ET		 267static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
268{
269 /* Do the reset outside of interrupt context */
270 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
271 adapter->flags |= IXGBEVF_FLAG_RESET_REQUESTED;
272 ixgbevf_service_event_schedule(adapter);
273 }
274}
275
e08400b7
ET		 276/**
277 * ixgbevf_tx_timeout - Respond to a Tx Hang
278 * @netdev: network interface device structure
279 **/
280static void ixgbevf_tx_timeout(struct net_device *netdev)
281{
282 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
283
9ac5c5cc 284 ixgbevf_tx_timeout_reset(adapter);
e08400b7 285}
92915f71
GR		 286
287/**
288 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 289 * @q_vector: board private structure
92915f71
GR		 290 * @tx_ring: tx ring to clean
291 **/
fa71ae27 292static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 293 struct ixgbevf_ring *tx_ring)
294{
fa71ae27 295 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 296 struct ixgbevf_tx_buffer *tx_buffer;
297 union ixgbe_adv_tx_desc *tx_desc;
92915f71 298 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
ET		 299 unsigned int budget = tx_ring->count / 2;
300 unsigned int i = tx_ring->next_to_clean;
92915f71 301
10cc1bdd
AD		 302 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
303 return true;
304
7ad1a093
ET		 305 tx_buffer = &tx_ring->tx_buffer_info[i];
306 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
307 i -= tx_ring->count;
92915f71 308
e757e3e1 309 do {
7ad1a093 310 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 311
312 /* if next_to_watch is not set then there is no work pending */
313 if (!eop_desc)
314 break;
315
316 /* prevent any other reads prior to eop_desc */
317 read_barrier_depends();
318
319 /* if DD is not set pending work has not been completed */
320 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
321 break;
322
323 /* clear next_to_watch to prevent false hangs */
7ad1a093 324 tx_buffer->next_to_watch = NULL;
e757e3e1 325
7ad1a093
ET		 326 /* update the statistics for this packet */
327 total_bytes += tx_buffer->bytecount;
328 total_packets += tx_buffer->gso_segs;
92915f71 329
9bdfefd2
ET		 330 /* free the skb */
331 dev_kfree_skb_any(tx_buffer->skb);
332
333 /* unmap skb header data */
334 dma_unmap_single(tx_ring->dev,
335 dma_unmap_addr(tx_buffer, dma),
336 dma_unmap_len(tx_buffer, len),
337 DMA_TO_DEVICE);
338
7ad1a093 339 /* clear tx_buffer data */
9bdfefd2
ET		 340 tx_buffer->skb = NULL;
341 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 342
7ad1a093
ET		 343 /* unmap remaining buffers */
344 while (tx_desc != eop_desc) {
7ad1a093
ET		 345 tx_buffer++;
346 tx_desc++;
92915f71 347 i++;
7ad1a093
ET		 348 if (unlikely(!i)) {
349 i -= tx_ring->count;
350 tx_buffer = tx_ring->tx_buffer_info;
351 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
352 }
e757e3e1 353
9bdfefd2
ET		 354 /* unmap any remaining paged data */
355 if (dma_unmap_len(tx_buffer, len)) {
356 dma_unmap_page(tx_ring->dev,
357 dma_unmap_addr(tx_buffer, dma),
358 dma_unmap_len(tx_buffer, len),
359 DMA_TO_DEVICE);
360 dma_unmap_len_set(tx_buffer, len, 0);
361 }
92915f71
GR		 362 }
363
7ad1a093
ET		 364 /* move us one more past the eop_desc for start of next pkt */
365 tx_buffer++;
366 tx_desc++;
367 i++;
368 if (unlikely(!i)) {
369 i -= tx_ring->count;
370 tx_buffer = tx_ring->tx_buffer_info;
371 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
372 }
373
374 /* issue prefetch for next Tx descriptor */
375 prefetch(tx_desc);
376
377 /* update budget accounting */
378 budget--;
379 } while (likely(budget));
380
381 i += tx_ring->count;
92915f71 382 tx_ring->next_to_clean = i;
7ad1a093
ET		 383 u64_stats_update_begin(&tx_ring->syncp);
384 tx_ring->stats.bytes += total_bytes;
385 tx_ring->stats.packets += total_packets;
386 u64_stats_update_end(&tx_ring->syncp);
387 q_vector->tx.total_bytes += total_bytes;
388 q_vector->tx.total_packets += total_packets;
92915f71 389
e08400b7
ET		 390 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
391 struct ixgbe_hw *hw = &adapter->hw;
392 union ixgbe_adv_tx_desc *eop_desc;
393
394 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
395
396 pr_err("Detected Tx Unit Hang\n"
397 " Tx Queue <%d>\n"
398 " TDH, TDT <%x>, <%x>\n"
399 " next_to_use <%x>\n"
400 " next_to_clean <%x>\n"
401 "tx_buffer_info[next_to_clean]\n"
402 " next_to_watch <%p>\n"
403 " eop_desc->wb.status <%x>\n"
404 " time_stamp <%lx>\n"
405 " jiffies <%lx>\n",
406 tx_ring->queue_index,
407 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
408 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
409 tx_ring->next_to_use, i,
410 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
411 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
412
413 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
414
415 /* schedule immediate reset if we believe we hung */
9ac5c5cc 416 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 417
418 return true;
419 }
420
92915f71 421#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 422 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 423 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 424 /* Make sure that anybody stopping the queue after this
425 * sees the new next_to_clean.
426 */
427 smp_mb();
7ad1a093 428
fb40195c
AD		 429 if (__netif_subqueue_stopped(tx_ring->netdev,
430 tx_ring->queue_index) &&
92915f71 431 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 432 netif_wake_subqueue(tx_ring->netdev,
433 tx_ring->queue_index);
7ad1a093 434 ++tx_ring->tx_stats.restart_queue;
92915f71 435 }
92915f71
GR		 436 }
437
7ad1a093 438 return !!budget;
92915f71
GR		 439}
440
08681618
JK		 441/**
442 * ixgbevf_rx_skb - Helper function to determine proper Rx method
443 * @q_vector: structure containing interrupt and ring information
444 * @skb: packet to send up
08681618
JK		 445 **/
446static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 447 struct sk_buff *skb)
08681618 448{
c777cdfa
JK		 449#ifdef CONFIG_NET_RX_BUSY_POLL
450 skb_mark_napi_id(skb, &q_vector->napi);
451
452 if (ixgbevf_qv_busy_polling(q_vector)) {
453 netif_receive_skb(skb);
454 /* exit early if we busy polled */
455 return;
456 }
457#endif /* CONFIG_NET_RX_BUSY_POLL */
688ff32d
ET		 458
459 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 460}
461
1e1429d6
FD		 462#define IXGBE_RSS_L4_TYPES_MASK \
463 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
464 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
465 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
466 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
467
468static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
469 union ixgbe_adv_rx_desc *rx_desc,
470 struct sk_buff *skb)
471{
472 u16 rss_type;
473
474 if (!(ring->netdev->features & NETIF_F_RXHASH))
475 return;
476
477 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
478 IXGBE_RXDADV_RSSTYPE_MASK;
479
480 if (!rss_type)
481 return;
482
483 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
484 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
485 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
486}
487
dec0d8e4
JK		 488/**
489 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 490 * @ring: structure containig ring specific data
491 * @rx_desc: current Rx descriptor being processed
92915f71 492 * @skb: skb currently being received and modified
dec0d8e4 493 **/
55fb277c 494static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 495 union ixgbe_adv_rx_desc *rx_desc,
496 struct sk_buff *skb)
92915f71 497{
bc8acf2c 498 skb_checksum_none_assert(skb);
92915f71
GR		 499
500 /* Rx csum disabled */
fb40195c 501 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 502 return;
503
504 /* if IP and error */
ec62fe26
ET		 505 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
506 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 507 ring->rx_stats.csum_err++;
92915f71
GR		 508 return;
509 }
510
ec62fe26 511 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 512 return;
513
ec62fe26 514 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 515 ring->rx_stats.csum_err++;
92915f71
GR		 516 return;
517 }
518
519 /* It must be a TCP or UDP packet with a valid checksum */
520 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 521}
522
dec0d8e4
JK		 523/**
524 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 525 * @rx_ring: rx descriptor ring packet is being transacted on
526 * @rx_desc: pointer to the EOP Rx descriptor
527 * @skb: pointer to current skb being populated
528 *
529 * This function checks the ring, descriptor, and packet information in
530 * order to populate the checksum, VLAN, protocol, and other fields within
531 * the skb.
dec0d8e4 532 **/
dff80520
ET		 533static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
534 union ixgbe_adv_rx_desc *rx_desc,
535 struct sk_buff *skb)
536{
1e1429d6 537 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 538 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
539
540 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
541 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
542 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
543
544 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
545 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
546 }
547
548 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
549}
550
4b95fe3d
ET		 551/**
552 * ixgbevf_is_non_eop - process handling of non-EOP buffers
553 * @rx_ring: Rx ring being processed
554 * @rx_desc: Rx descriptor for current buffer
555 * @skb: current socket buffer containing buffer in progress
556 *
557 * This function updates next to clean. If the buffer is an EOP buffer
558 * this function exits returning false, otherwise it will place the
559 * sk_buff in the next buffer to be chained and return true indicating
560 * that this is in fact a non-EOP buffer.
561 **/
562static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 563 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 564{
565 u32 ntc = rx_ring->next_to_clean + 1;
566
567 /* fetch, update, and store next to clean */
568 ntc = (ntc < rx_ring->count) ? ntc : 0;
569 rx_ring->next_to_clean = ntc;
570
571 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
572
573 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
574 return false;
575
576 return true;
577}
578
bad17234
ET		 579static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
580 struct ixgbevf_rx_buffer *bi)
bafa578f 581{
bad17234 582 struct page *page = bi->page;
bafa578f
ET		 583 dma_addr_t dma = bi->dma;
584
bad17234
ET		 585 /* since we are recycling buffers we should seldom need to alloc */
586 if (likely(page))
bafa578f
ET		 587 return true;
588
bad17234
ET		 589 /* alloc new page for storage */
590 page = dev_alloc_page();
591 if (unlikely(!page)) {
592 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 593 return false;
594 }
595
bad17234
ET		 596 /* map page for use */
597 dma = dma_map_page(rx_ring->dev, page, 0,
598 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET		 599
600 /* if mapping failed free memory back to system since
601 * there isn't much point in holding memory we can't use
602 */
603 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 604 __free_page(page);
bafa578f
ET		 605
606 rx_ring->rx_stats.alloc_rx_buff_failed++;
607 return false;
608 }
609
bafa578f 610 bi->dma = dma;
bad17234
ET		 611 bi->page = page;
612 bi->page_offset = 0;
bafa578f
ET		 613
614 return true;
615}
616
92915f71
GR		 617/**
618 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 619 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 620 * @cleaned_count: number of buffers to replace
92915f71 621 **/
095e2617 622static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 623 u16 cleaned_count)
92915f71 624{
92915f71
GR		 625 union ixgbe_adv_rx_desc *rx_desc;
626 struct ixgbevf_rx_buffer *bi;
fb40195c 627 unsigned int i = rx_ring->next_to_use;
92915f71 628
bafa578f
ET		 629 /* nothing to do or no valid netdev defined */
630 if (!cleaned_count || !rx_ring->netdev)
631 return;
b9dd245b 632
bafa578f
ET		 633 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
634 bi = &rx_ring->rx_buffer_info[i];
635 i -= rx_ring->count;
05d063aa 636
bafa578f 637 do {
bad17234 638 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 639 break;
b9dd245b 640
bafa578f
ET		 641 /* Refresh the desc even if pkt_addr didn't change
642 * because each write-back erases this info.
643 */
bad17234 644 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 645
bafa578f
ET		 646 rx_desc++;
647 bi++;
92915f71 648 i++;
bafa578f
ET		 649 if (unlikely(!i)) {
650 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
651 bi = rx_ring->rx_buffer_info;
652 i -= rx_ring->count;
653 }
654
655 /* clear the hdr_addr for the next_to_use descriptor */
656 rx_desc->read.hdr_addr = 0;
657
658 cleaned_count--;
659 } while (cleaned_count);
660
661 i += rx_ring->count;
92915f71 662
bafa578f
ET		 663 if (rx_ring->next_to_use != i) {
664 /* record the next descriptor to use */
665 rx_ring->next_to_use = i;
666
bad17234
ET		 667 /* update next to alloc since we have filled the ring */
668 rx_ring->next_to_alloc = i;
669
bafa578f
ET		 670 /* Force memory writes to complete before letting h/w
671 * know there are new descriptors to fetch. (Only
672 * applicable for weak-ordered memory model archs,
673 * such as IA-64).
674 */
675 wmb();
676 ixgbevf_write_tail(rx_ring, i);
677 }
92915f71
GR		 678}
679
dec0d8e4
JK		 680/**
681 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 682 * @rx_ring: rx descriptor ring packet is being transacted on
683 * @rx_desc: pointer to the EOP Rx descriptor
684 * @skb: pointer to current skb being fixed
685 *
686 * Check for corrupted packet headers caused by senders on the local L2
687 * embedded NIC switch not setting up their Tx Descriptors right. These
688 * should be very rare.
689 *
690 * Also address the case where we are pulling data in on pages only
691 * and as such no data is present in the skb header.
692 *
693 * In addition if skb is not at least 60 bytes we need to pad it so that
694 * it is large enough to qualify as a valid Ethernet frame.
695 *
696 * Returns true if an error was encountered and skb was freed.
dec0d8e4 697 **/
bad17234
ET		 698static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
699 union ixgbe_adv_rx_desc *rx_desc,
700 struct sk_buff *skb)
701{
702 /* verify that the packet does not have any known errors */
703 if (unlikely(ixgbevf_test_staterr(rx_desc,
704 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
705 struct net_device *netdev = rx_ring->netdev;
706
707 if (!(netdev->features & NETIF_F_RXALL)) {
708 dev_kfree_skb_any(skb);
709 return true;
710 }
711 }
712
a94d9e22
AD		 713 /* if eth_skb_pad returns an error the skb was freed */
714 if (eth_skb_pad(skb))
715 return true;
bad17234
ET		 716
717 return false;
718}
719
dec0d8e4
JK		 720/**
721 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 722 * @rx_ring: rx descriptor ring to store buffers on
723 * @old_buff: donor buffer to have page reused
724 *
725 * Synchronizes page for reuse by the adapter
dec0d8e4 726 **/
bad17234
ET		 727static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
728 struct ixgbevf_rx_buffer *old_buff)
729{
730 struct ixgbevf_rx_buffer *new_buff;
731 u16 nta = rx_ring->next_to_alloc;
732
733 new_buff = &rx_ring->rx_buffer_info[nta];
734
735 /* update, and store next to alloc */
736 nta++;
737 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
738
739 /* transfer page from old buffer to new buffer */
740 new_buff->page = old_buff->page;
741 new_buff->dma = old_buff->dma;
742 new_buff->page_offset = old_buff->page_offset;
743
744 /* sync the buffer for use by the device */
745 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
746 new_buff->page_offset,
747 IXGBEVF_RX_BUFSZ,
748 DMA_FROM_DEVICE);
749}
750
751static inline bool ixgbevf_page_is_reserved(struct page *page)
752{
2f064f34 753 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
bad17234
ET		 754}
755
dec0d8e4
JK		 756/**
757 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 758 * @rx_ring: rx descriptor ring to transact packets on
759 * @rx_buffer: buffer containing page to add
760 * @rx_desc: descriptor containing length of buffer written by hardware
761 * @skb: sk_buff to place the data into
762 *
763 * This function will add the data contained in rx_buffer->page to the skb.
764 * This is done either through a direct copy if the data in the buffer is
765 * less than the skb header size, otherwise it will just attach the page as
766 * a frag to the skb.
767 *
768 * The function will then update the page offset if necessary and return
769 * true if the buffer can be reused by the adapter.
dec0d8e4 770 **/
bad17234
ET		 771static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
772 struct ixgbevf_rx_buffer *rx_buffer,
773 union ixgbe_adv_rx_desc *rx_desc,
774 struct sk_buff *skb)
775{
776 struct page *page = rx_buffer->page;
5505bdb5 777 unsigned char *va = page_address(page) + rx_buffer->page_offset;
bad17234
ET		 778 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
779#if (PAGE_SIZE < 8192)
780 unsigned int truesize = IXGBEVF_RX_BUFSZ;
781#else
782 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
783#endif
5505bdb5 784 unsigned int pull_len;
bad17234 785
5505bdb5
AD		 786 if (unlikely(skb_is_nonlinear(skb)))
787 goto add_tail_frag;
bad17234 788
5505bdb5 789 if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
bad17234
ET		 790 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
791
792 /* page is not reserved, we can reuse buffer as is */
793 if (likely(!ixgbevf_page_is_reserved(page)))
794 return true;
795
796 /* this page cannot be reused so discard it */
797 put_page(page);
798 return false;
799 }
800
5505bdb5
AD		 801 /* we need the header to contain the greater of either ETH_HLEN or
802 * 60 bytes if the skb->len is less than 60 for skb_pad.
803 */
804 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
805
806 /* align pull length to size of long to optimize memcpy performance */
807 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
808
809 /* update all of the pointers */
810 va += pull_len;
811 size -= pull_len;
812
813add_tail_frag:
bad17234 814 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5505bdb5 815 (unsigned long)va & ~PAGE_MASK, size, truesize);
bad17234
ET		 816
817 /* avoid re-using remote pages */
818 if (unlikely(ixgbevf_page_is_reserved(page)))
819 return false;
820
821#if (PAGE_SIZE < 8192)
822 /* if we are only owner of page we can reuse it */
823 if (unlikely(page_count(page) != 1))
824 return false;
825
826 /* flip page offset to other buffer */
827 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
828
829#else
830 /* move offset up to the next cache line */
831 rx_buffer->page_offset += truesize;
832
833 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
834 return false;
835
836#endif
837 /* Even if we own the page, we are not allowed to use atomic_set()
838 * This would break get_page_unless_zero() users.
839 */
840 atomic_inc(&page->_count);
841
842 return true;
843}
844
845static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
846 union ixgbe_adv_rx_desc *rx_desc,
847 struct sk_buff *skb)
848{
849 struct ixgbevf_rx_buffer *rx_buffer;
850 struct page *page;
851
852 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
853 page = rx_buffer->page;
854 prefetchw(page);
855
856 if (likely(!skb)) {
857 void *page_addr = page_address(page) +
858 rx_buffer->page_offset;
859
860 /* prefetch first cache line of first page */
861 prefetch(page_addr);
862#if L1_CACHE_BYTES < 128
863 prefetch(page_addr + L1_CACHE_BYTES);
864#endif
865
866 /* allocate a skb to store the frags */
867 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
868 IXGBEVF_RX_HDR_SIZE);
869 if (unlikely(!skb)) {
870 rx_ring->rx_stats.alloc_rx_buff_failed++;
871 return NULL;
872 }
873
874 /* we will be copying header into skb->data in
875 * pskb_may_pull so it is in our interest to prefetch
876 * it now to avoid a possible cache miss
877 */
878 prefetchw(skb->data);
879 }
880
881 /* we are reusing so sync this buffer for CPU use */
882 dma_sync_single_range_for_cpu(rx_ring->dev,
883 rx_buffer->dma,
884 rx_buffer->page_offset,
885 IXGBEVF_RX_BUFSZ,
886 DMA_FROM_DEVICE);
887
888 /* pull page into skb */
889 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
890 /* hand second half of page back to the ring */
891 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
892 } else {
893 /* we are not reusing the buffer so unmap it */
894 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
895 PAGE_SIZE, DMA_FROM_DEVICE);
896 }
897
898 /* clear contents of buffer_info */
899 rx_buffer->dma = 0;
900 rx_buffer->page = NULL;
901
902 return skb;
903}
904
92915f71 905static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 906 u32 qmask)
92915f71 907{
92915f71
GR		 908 struct ixgbe_hw *hw = &adapter->hw;
909
5f3600eb 910 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 911}
912
08e50a20
JK		 913static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
914 struct ixgbevf_ring *rx_ring,
915 int budget)
92915f71 916{
92915f71 917 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 918 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 919 struct sk_buff *skb = rx_ring->skb;
92915f71 920
6622402a 921 while (likely(total_rx_packets < budget)) {
4b95fe3d 922 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 923
0579eefc
ET		 924 /* return some buffers to hardware, one at a time is too slow */
925 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
926 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
927 cleaned_count = 0;
928 }
929
bad17234 930 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET		 931
932 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 933 break;
92915f71 934
0579eefc
ET		 935 /* This memory barrier is needed to keep us from reading
936 * any other fields out of the rx_desc until we know the
937 * RXD_STAT_DD bit is set
938 */
939 rmb();
ec62fe26 940
bad17234
ET		 941 /* retrieve a buffer from the ring */
942 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 943
bad17234
ET		 944 /* exit if we failed to retrieve a buffer */
945 if (!skb)
946 break;
92915f71 947
b97fe3b1
ET		 948 cleaned_count++;
949
bad17234
ET		 950 /* fetch next buffer in frame if non-eop */
951 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 952 continue;
5c60f81a 953
bad17234
ET		 954 /* verify the packet layout is correct */
955 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
956 skb = NULL;
0579eefc 957 continue;
92915f71
GR		 958 }
959
92915f71
GR		 960 /* probably a little skewed due to removing CRC */
961 total_rx_bytes += skb->len;
92915f71 962
815cccbf
JF		 963 /* Workaround hardware that can't do proper VEPA multicast
964 * source pruning.
965 */
bd9d5592 966 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 967 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 968 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 969 eth_hdr(skb)->h_source)) {
815cccbf 970 dev_kfree_skb_irq(skb);
0579eefc 971 continue;
815cccbf
JF		 972 }
973
dff80520
ET		 974 /* populate checksum, VLAN, and protocol */
975 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
976
977 ixgbevf_rx_skb(q_vector, skb);
92915f71 978
bad17234
ET		 979 /* reset skb pointer */
980 skb = NULL;
981
0579eefc 982 /* update budget accounting */
6622402a
ET		 983 total_rx_packets++;
984 }
92915f71 985
bad17234
ET		 986 /* place incomplete frames back on ring for completion */
987 rx_ring->skb = skb;
988
4197aa7b 989 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 990 rx_ring->stats.packets += total_rx_packets;
991 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 992 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 993 q_vector->rx.total_packets += total_rx_packets;
994 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 995
08e50a20 996 return total_rx_packets;
92915f71
GR		 997}
998
999/**
fa71ae27 1000 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1001 * @napi: napi struct with our devices info in it
1002 * @budget: amount of work driver is allowed to do this pass, in packets
1003 *
fa71ae27 1004 * This function will clean more than one or more rings associated with a
92915f71
GR		 1005 * q_vector.
1006 **/
fa71ae27 1007static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1008{
1009 struct ixgbevf_q_vector *q_vector =
1010 container_of(napi, struct ixgbevf_q_vector, napi);
1011 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1012 struct ixgbevf_ring *ring;
32b3e08f 1013 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1014 bool clean_complete = true;
1015
1016 ixgbevf_for_each_ring(ring, q_vector->tx)
1017 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71 1018
c777cdfa
JK		 1019#ifdef CONFIG_NET_RX_BUSY_POLL
1020 if (!ixgbevf_qv_lock_napi(q_vector))
1021 return budget;
1022#endif
1023
92915f71 1024 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1025 * the budget to go below 1 because we'll exit polling
1026 */
fa71ae27
AD		 1027 if (q_vector->rx.count > 1)
1028 per_ring_budget = max(budget/q_vector->rx.count, 1);
1029 else
1030 per_ring_budget = budget;
1031
32b3e08f
JB		 1032 ixgbevf_for_each_ring(ring, q_vector->rx) {
1033 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1034 per_ring_budget);
1035 work_done += cleaned;
1036 clean_complete &= (cleaned < per_ring_budget);
1037 }
fa71ae27 1038
c777cdfa
JK		 1039#ifdef CONFIG_NET_RX_BUSY_POLL
1040 ixgbevf_qv_unlock_napi(q_vector);
1041#endif
1042
fa71ae27
AD		 1043 /* If all work not completed, return budget and keep polling */
1044 if (!clean_complete)
1045 return budget;
1046 /* all work done, exit the polling mode */
32b3e08f 1047 napi_complete_done(napi, work_done);
fa71ae27
AD		 1048 if (adapter->rx_itr_setting & 1)
1049 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 1050 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1051 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27
AD		 1052 ixgbevf_irq_enable_queues(adapter,
1053 1 << q_vector->v_idx);
92915f71 1054
fa71ae27 1055 return 0;
92915f71
GR		 1056}
1057
ce422606
GR		 1058/**
1059 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1060 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1061 **/
3849623e 1062void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1063{
1064 struct ixgbevf_adapter *adapter = q_vector->adapter;
1065 struct ixgbe_hw *hw = &adapter->hw;
1066 int v_idx = q_vector->v_idx;
1067 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1068
dec0d8e4 1069 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1070 * immediate assertion of the interrupt
1071 */
1072 itr_reg |= IXGBE_EITR_CNT_WDIS;
1073
1074 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1075}
92915f71 1076
c777cdfa
JK		 1077#ifdef CONFIG_NET_RX_BUSY_POLL
1078/* must be called with local_bh_disable()d */
1079static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
1080{
1081 struct ixgbevf_q_vector *q_vector =
1082 container_of(napi, struct ixgbevf_q_vector, napi);
1083 struct ixgbevf_adapter *adapter = q_vector->adapter;
1084 struct ixgbevf_ring *ring;
1085 int found = 0;
1086
1087 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
1088 return LL_FLUSH_FAILED;
1089
1090 if (!ixgbevf_qv_lock_poll(q_vector))
1091 return LL_FLUSH_BUSY;
1092
1093 ixgbevf_for_each_ring(ring, q_vector->rx) {
1094 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
3b5dca26
JK		 1095#ifdef BP_EXTENDED_STATS
1096 if (found)
095e2617 1097 ring->stats.cleaned += found;
3b5dca26 1098 else
095e2617 1099 ring->stats.misses++;
3b5dca26 1100#endif
c777cdfa
JK		 1101 if (found)
1102 break;
1103 }
1104
1105 ixgbevf_qv_unlock_poll(q_vector);
1106
1107 return found;
1108}
1109#endif /* CONFIG_NET_RX_BUSY_POLL */
1110
92915f71
GR		 1111/**
1112 * ixgbevf_configure_msix - Configure MSI-X hardware
1113 * @adapter: board private structure
1114 *
1115 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1116 * interrupts.
1117 **/
1118static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1119{
1120 struct ixgbevf_q_vector *q_vector;
6b43c446 1121 int q_vectors, v_idx;
92915f71
GR		 1122
1123 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1124 adapter->eims_enable_mask = 0;
92915f71 1125
dec0d8e4 1126 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1127 * corresponding register.
1128 */
1129 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1130 struct ixgbevf_ring *ring;
dec0d8e4 1131
92915f71 1132 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1133
1134 ixgbevf_for_each_ring(ring, q_vector->rx)
1135 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1136
1137 ixgbevf_for_each_ring(ring, q_vector->tx)
1138 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1139
5f3600eb 1140 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1141 /* Tx only vector */
5f3600eb 1142 if (adapter->tx_itr_setting == 1)
8a9ca110 1143 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1144 else
1145 q_vector->itr = adapter->tx_itr_setting;
1146 } else {
dec0d8e4 1147 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1148 if (adapter->rx_itr_setting == 1)
1149 q_vector->itr = IXGBE_20K_ITR;
1150 else
1151 q_vector->itr = adapter->rx_itr_setting;
1152 }
1153
1154 /* add q_vector eims value to global eims_enable_mask */
1155 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 1156
5f3600eb 1157 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1158 }
1159
1160 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 1161 /* setup eims_other and add value to global eims_enable_mask */
1162 adapter->eims_other = 1 << v_idx;
1163 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1164}
1165
1166enum latency_range {
1167 lowest_latency = 0,
1168 low_latency = 1,
1169 bulk_latency = 2,
1170 latency_invalid = 255
1171};
1172
1173/**
1174 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1175 * @q_vector: structure containing interrupt and ring information
1176 * @ring_container: structure containing ring performance data
92915f71 1177 *
dec0d8e4
JK		 1178 * Stores a new ITR value based on packets and byte
1179 * counts during the last interrupt. The advantage of per interrupt
1180 * computation is faster updates and more accurate ITR for the current
1181 * traffic pattern. Constants in this function were computed
1182 * based on theoretical maximum wire speed and thresholds were set based
1183 * on testing data as well as attempting to minimize response time
1184 * while increasing bulk throughput.
92915f71 1185 **/
5f3600eb
AD		 1186static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1187 struct ixgbevf_ring_container *ring_container)
92915f71 1188{
5f3600eb
AD		 1189 int bytes = ring_container->total_bytes;
1190 int packets = ring_container->total_packets;
92915f71
GR		 1191 u32 timepassed_us;
1192 u64 bytes_perint;
5f3600eb 1193 u8 itr_setting = ring_container->itr;
92915f71
GR		 1194
1195 if (packets == 0)
5f3600eb 1196 return;
92915f71 1197
dec0d8e4 1198 /* simple throttle rate management
92915f71
GR		 1199 * 0-20MB/s lowest (100000 ints/s)
1200 * 20-100MB/s low (20000 ints/s)
8a9ca110 1201 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1202 */
1203 /* what was last interrupt timeslice? */
5f3600eb 1204 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1205 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1206
1207 switch (itr_setting) {
1208 case lowest_latency:
e2c28ce7 1209 if (bytes_perint > 10)
5f3600eb 1210 itr_setting = low_latency;
92915f71
GR		 1211 break;
1212 case low_latency:
e2c28ce7 1213 if (bytes_perint > 20)
5f3600eb 1214 itr_setting = bulk_latency;
e2c28ce7 1215 else if (bytes_perint <= 10)
5f3600eb 1216 itr_setting = lowest_latency;
92915f71
GR		 1217 break;
1218 case bulk_latency:
e2c28ce7 1219 if (bytes_perint <= 20)
5f3600eb 1220 itr_setting = low_latency;
92915f71
GR		 1221 break;
1222 }
1223
5f3600eb
AD		 1224 /* clear work counters since we have the values we need */
1225 ring_container->total_bytes = 0;
1226 ring_container->total_packets = 0;
1227
1228 /* write updated itr to ring container */
1229 ring_container->itr = itr_setting;
92915f71
GR		 1230}
1231
fa71ae27 1232static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1233{
5f3600eb
AD		 1234 u32 new_itr = q_vector->itr;
1235 u8 current_itr;
92915f71 1236
5f3600eb
AD		 1237 ixgbevf_update_itr(q_vector, &q_vector->tx);
1238 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1239
6b43c446 1240 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1241
1242 switch (current_itr) {
1243 /* counts and packets in update_itr are dependent on these numbers */
1244 case lowest_latency:
5f3600eb 1245 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1246 break;
1247 case low_latency:
5f3600eb 1248 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1249 break;
1250 case bulk_latency:
1251 default:
8a9ca110 1252 new_itr = IXGBE_12K_ITR;
92915f71
GR		 1253 break;
1254 }
1255
5f3600eb 1256 if (new_itr != q_vector->itr) {
92915f71 1257 /* do an exponential smoothing */
5f3600eb
AD		 1258 new_itr = (10 * new_itr * q_vector->itr) /
1259 ((9 * new_itr) + q_vector->itr);
1260
1261 /* save the algorithm value here */
1262 q_vector->itr = new_itr;
1263
1264 ixgbevf_write_eitr(q_vector);
92915f71 1265 }
92915f71
GR		 1266}
1267
4b2cd27f 1268static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1269{
fa71ae27 1270 struct ixgbevf_adapter *adapter = data;
92915f71 1271 struct ixgbe_hw *hw = &adapter->hw;
08259594 1272
4b2cd27f 1273 hw->mac.get_link_status = 1;
1e72bfc3 1274
9ac5c5cc 1275 ixgbevf_service_event_schedule(adapter);
3a2c4033 1276
5f3600eb
AD		 1277 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1278
92915f71
GR		 1279 return IRQ_HANDLED;
1280}
1281
92915f71 1282/**
fa71ae27 1283 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1284 * @irq: unused
1285 * @data: pointer to our q_vector struct for this interrupt vector
1286 **/
fa71ae27 1287static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1288{
1289 struct ixgbevf_q_vector *q_vector = data;
92915f71 1290
5f3600eb 1291 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1292 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1293 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1294
1295 return IRQ_HANDLED;
1296}
1297
1298static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1299 int r_idx)
1300{
1301 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1302
87e70ab9
DS		 1303 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1304 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1305 q_vector->rx.count++;
92915f71
GR		 1306}
1307
1308static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1309 int t_idx)
1310{
1311 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1312
87e70ab9
DS		 1313 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1314 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1315 q_vector->tx.count++;
92915f71
GR		 1316}
1317
1318/**
1319 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1320 * @adapter: board private structure to initialize
1321 *
1322 * This function maps descriptor rings to the queue-specific vectors
1323 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1324 * one vector per ring/queue, but on a constrained vector budget, we
1325 * group the rings as "efficiently" as possible. You would add new
1326 * mapping configurations in here.
1327 **/
1328static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1329{
1330 int q_vectors;
1331 int v_start = 0;
1332 int rxr_idx = 0, txr_idx = 0;
1333 int rxr_remaining = adapter->num_rx_queues;
1334 int txr_remaining = adapter->num_tx_queues;
1335 int i, j;
1336 int rqpv, tqpv;
92915f71
GR		 1337
1338 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1339
dec0d8e4 1340 /* The ideal configuration...
92915f71
GR		 1341 * We have enough vectors to map one per queue.
1342 */
1343 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1344 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1345 map_vector_to_rxq(adapter, v_start, rxr_idx);
1346
1347 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1348 map_vector_to_txq(adapter, v_start, txr_idx);
50985b5f 1349 return 0;
92915f71
GR		 1350 }
1351
dec0d8e4 1352 /* If we don't have enough vectors for a 1-to-1
92915f71
GR		 1353 * mapping, we'll have to group them so there are
1354 * multiple queues per vector.
1355 */
1356 /* Re-adjusting *qpv takes care of the remainder. */
1357 for (i = v_start; i < q_vectors; i++) {
1358 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1359 for (j = 0; j < rqpv; j++) {
1360 map_vector_to_rxq(adapter, i, rxr_idx);
1361 rxr_idx++;
1362 rxr_remaining--;
1363 }
1364 }
1365 for (i = v_start; i < q_vectors; i++) {
1366 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1367 for (j = 0; j < tqpv; j++) {
1368 map_vector_to_txq(adapter, i, txr_idx);
1369 txr_idx++;
1370 txr_remaining--;
1371 }
1372 }
1373
50985b5f 1374 return 0;
92915f71
GR		 1375}
1376
1377/**
1378 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1379 * @adapter: board private structure
1380 *
1381 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1382 * interrupts from the kernel.
1383 **/
1384static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1385{
1386 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 1387 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1388 int vector, err;
92915f71
GR		 1389 int ri = 0, ti = 0;
1390
92915f71 1391 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1392 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1393 struct msix_entry *entry = &adapter->msix_entries[vector];
1394
1395 if (q_vector->tx.ring && q_vector->rx.ring) {
1396 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1397 "%s-%s-%d", netdev->name, "TxRx", ri++);
1398 ti++;
1399 } else if (q_vector->rx.ring) {
1400 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1401 "%s-%s-%d", netdev->name, "rx", ri++);
1402 } else if (q_vector->tx.ring) {
1403 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1404 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 1405 } else {
1406 /* skip this unused q_vector */
1407 continue;
1408 }
fa71ae27
AD		 1409 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1410 q_vector->name, q_vector);
92915f71
GR		 1411 if (err) {
1412 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1413 "request_irq failed for MSIX interrupt Error: %d\n",
1414 err);
92915f71
GR		 1415 goto free_queue_irqs;
1416 }
1417 }
1418
92915f71 1419 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1420 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1421 if (err) {
dec0d8e4
JK		 1422 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1423 err);
92915f71
GR		 1424 goto free_queue_irqs;
1425 }
1426
1427 return 0;
1428
1429free_queue_irqs:
fa71ae27
AD		 1430 while (vector) {
1431 vector--;
1432 free_irq(adapter->msix_entries[vector].vector,
1433 adapter->q_vector[vector]);
1434 }
a1f6c6b1 1435 /* This failure is non-recoverable - it indicates the system is
1436 * out of MSIX vector resources and the VF driver cannot run
1437 * without them. Set the number of msix vectors to zero
1438 * indicating that not enough can be allocated. The error
1439 * will be returned to the user indicating device open failed.
1440 * Any further attempts to force the driver to open will also
1441 * fail. The only way to recover is to unload the driver and
1442 * reload it again. If the system has recovered some MSIX
1443 * vectors then it may succeed.
1444 */
1445 adapter->num_msix_vectors = 0;
92915f71
GR		 1446 return err;
1447}
1448
1449static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1450{
1451 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1452
1453 for (i = 0; i < q_vectors; i++) {
1454 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
dec0d8e4 1455
6b43c446
AD		 1456 q_vector->rx.ring = NULL;
1457 q_vector->tx.ring = NULL;
1458 q_vector->rx.count = 0;
1459 q_vector->tx.count = 0;
92915f71
GR		 1460 }
1461}
1462
1463/**
1464 * ixgbevf_request_irq - initialize interrupts
1465 * @adapter: board private structure
1466 *
1467 * Attempts to configure interrupts using the best available
1468 * capabilities of the hardware and kernel.
1469 **/
1470static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1471{
50985b5f 1472 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1473
1474 if (err)
dec0d8e4 1475 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1476
1477 return err;
1478}
1479
1480static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1481{
92915f71
GR		 1482 int i, q_vectors;
1483
1484 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1485 i = q_vectors - 1;
1486
fa71ae27 1487 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1488 i--;
1489
1490 for (; i >= 0; i--) {
fa71ae27
AD		 1491 /* free only the irqs that were actually requested */
1492 if (!adapter->q_vector[i]->rx.ring &&
1493 !adapter->q_vector[i]->tx.ring)
1494 continue;
1495
92915f71
GR		 1496 free_irq(adapter->msix_entries[i].vector,
1497 adapter->q_vector[i]);
1498 }
1499
1500 ixgbevf_reset_q_vectors(adapter);
1501}
1502
1503/**
1504 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1505 * @adapter: board private structure
1506 **/
1507static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1508{
92915f71 1509 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1510 int i;
92915f71 1511
5f3600eb 1512 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1513 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1514 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1515
1516 IXGBE_WRITE_FLUSH(hw);
1517
1518 for (i = 0; i < adapter->num_msix_vectors; i++)
1519 synchronize_irq(adapter->msix_entries[i].vector);
1520}
1521
1522/**
1523 * ixgbevf_irq_enable - Enable default interrupt generation settings
1524 * @adapter: board private structure
1525 **/
5f3600eb 1526static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1527{
1528 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1529
5f3600eb
AD		 1530 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1531 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1532 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1533}
1534
de02decb
DS		 1535/**
1536 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1537 * @adapter: board private structure
1538 * @ring: structure containing ring specific data
1539 *
1540 * Configure the Tx descriptor ring after a reset.
1541 **/
1542static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1543 struct ixgbevf_ring *ring)
1544{
1545 struct ixgbe_hw *hw = &adapter->hw;
1546 u64 tdba = ring->dma;
1547 int wait_loop = 10;
1548 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1549 u8 reg_idx = ring->reg_idx;
1550
1551 /* disable queue to avoid issues while updating state */
1552 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1553 IXGBE_WRITE_FLUSH(hw);
1554
1555 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1556 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1557 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1558 ring->count * sizeof(union ixgbe_adv_tx_desc));
1559
1560 /* disable head writeback */
1561 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1562 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1563
1564 /* enable relaxed ordering */
1565 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1566 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1567 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1568
1569 /* reset head and tail pointers */
1570 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1571 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1572 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1573
1574 /* reset ntu and ntc to place SW in sync with hardwdare */
1575 ring->next_to_clean = 0;
1576 ring->next_to_use = 0;
1577
1578 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1579 * to or less than the number of on chip descriptors, which is
1580 * currently 40.
1581 */
1582 txdctl |= (8 << 16); /* WTHRESH = 8 */
1583
1584 /* Setting PTHRESH to 32 both improves performance */
1585 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1586 32; /* PTHRESH = 32 */
1587
e08400b7
ET		 1588 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1589
de02decb
DS		 1590 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1591
1592 /* poll to verify queue is enabled */
1593 do {
1594 usleep_range(1000, 2000);
1595 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1596 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1597 if (!wait_loop)
1598 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1599}
1600
92915f71
GR		 1601/**
1602 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1603 * @adapter: board private structure
1604 *
1605 * Configure the Tx unit of the MAC after a reset.
1606 **/
1607static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1608{
de02decb 1609 u32 i;
92915f71
GR		 1610
1611 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1612 for (i = 0; i < adapter->num_tx_queues; i++)
1613 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR		 1614}
1615
1616#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1617
1618static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1619{
92915f71
GR		 1620 struct ixgbe_hw *hw = &adapter->hw;
1621 u32 srrctl;
1622
92915f71
GR		 1623 srrctl = IXGBE_SRRCTL_DROP_EN;
1624
bad17234
ET		 1625 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1626 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1627 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1628
92915f71
GR		 1629 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1630}
1631
1bb9c639
DS		 1632static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1633{
1634 struct ixgbe_hw *hw = &adapter->hw;
1635
1636 /* PSRTYPE must be initialized in 82599 */
1637 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1638 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1639 IXGBE_PSRTYPE_L2HDR;
1640
1641 if (adapter->num_rx_queues > 1)
1642 psrtype |= 1 << 29;
1643
1644 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1645}
1646
de02decb
DS		 1647#define IXGBEVF_MAX_RX_DESC_POLL 10
1648static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1649 struct ixgbevf_ring *ring)
1650{
1651 struct ixgbe_hw *hw = &adapter->hw;
1652 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1653 u32 rxdctl;
1654 u8 reg_idx = ring->reg_idx;
1655
26597802
MR		 1656 if (IXGBE_REMOVED(hw->hw_addr))
1657 return;
de02decb
DS		 1658 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1659 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1660
1661 /* write value back with RXDCTL.ENABLE bit cleared */
1662 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1663
dec0d8e4 1664 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1665 do {
1666 udelay(10);
1667 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1668 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1669
1670 if (!wait_loop)
1671 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1672 reg_idx);
1673}
1674
1675static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1676 struct ixgbevf_ring *ring)
1677{
1678 struct ixgbe_hw *hw = &adapter->hw;
1679 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1680 u32 rxdctl;
1681 u8 reg_idx = ring->reg_idx;
1682
26597802
MR		 1683 if (IXGBE_REMOVED(hw->hw_addr))
1684 return;
de02decb
DS		 1685 do {
1686 usleep_range(1000, 2000);
1687 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1688 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1689
1690 if (!wait_loop)
1691 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1692 reg_idx);
1693}
1694
9295edb4
ET		 1695static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1696{
1697 struct ixgbe_hw *hw = &adapter->hw;
1698 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1699 u16 rss_i = adapter->num_rx_queues;
9cba434f 1700 u8 i, j;
9295edb4
ET		 1701
1702 /* Fill out hash function seeds */
9cba434f
ET		 1703 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
1704 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1705 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), adapter->rss_key[i]);
9295edb4 1706
9cba434f 1707 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1708 if (j == rss_i)
1709 j = 0;
9cba434f
ET		 1710
1711 adapter->rss_indir_tbl[i] = j;
1712
1713 vfreta |= j << (i & 0x3) * 8;
1714 if ((i & 3) == 3) {
9295edb4 1715 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1716 vfreta = 0;
1717 }
9295edb4
ET		 1718 }
1719
1720 /* Perform hash on these packet types */
1721 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1722 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1723 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1724 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1725
1726 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1727
1728 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1729}
1730
de02decb
DS		 1731static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1732 struct ixgbevf_ring *ring)
1733{
1734 struct ixgbe_hw *hw = &adapter->hw;
1735 u64 rdba = ring->dma;
1736 u32 rxdctl;
1737 u8 reg_idx = ring->reg_idx;
1738
1739 /* disable queue to avoid issues while updating state */
1740 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1741 ixgbevf_disable_rx_queue(adapter, ring);
1742
1743 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1744 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1745 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1746 ring->count * sizeof(union ixgbe_adv_rx_desc));
1747
1748 /* enable relaxed ordering */
1749 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1750 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1751
1752 /* reset head and tail pointers */
1753 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1754 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1755 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS		 1756
1757 /* reset ntu and ntc to place SW in sync with hardwdare */
1758 ring->next_to_clean = 0;
1759 ring->next_to_use = 0;
bad17234 1760 ring->next_to_alloc = 0;
de02decb
DS		 1761
1762 ixgbevf_configure_srrctl(adapter, reg_idx);
1763
bad17234
ET		 1764 /* allow any size packet since we can handle overflow */
1765 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1766
de02decb
DS		 1767 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1768 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1769
1770 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1771 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1772}
1773
92915f71
GR		 1774/**
1775 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1776 * @adapter: board private structure
1777 *
1778 * Configure the Rx unit of the MAC after a reset.
1779 **/
1780static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1781{
de02decb 1782 int i;
bad17234
ET		 1783 struct ixgbe_hw *hw = &adapter->hw;
1784 struct net_device *netdev = adapter->netdev;
92915f71 1785
1bb9c639 1786 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 1787 if (hw->mac.type >= ixgbe_mac_X550_vf)
1788 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1789
bad17234
ET		 1790 /* notify the PF of our intent to use this size of frame */
1791 ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
92915f71 1792
92915f71 1793 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 1794 * the Base and Length of the Rx Descriptor Ring
1795 */
de02decb
DS		 1796 for (i = 0; i < adapter->num_rx_queues; i++)
1797 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR		 1798}
1799
80d5c368
PM		 1800static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1801 __be16 proto, u16 vid)
92915f71
GR		 1802{
1803 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1804 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1805 int err;
1806
55fdd45b 1807 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1808
92915f71 1809 /* add VID to filter table */
2ddc7fe1 1810 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1811
55fdd45b 1812 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1813
2ddc7fe1
AD		 1814 /* translate error return types so error makes sense */
1815 if (err == IXGBE_ERR_MBX)
1816 return -EIO;
1817
1818 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1819 return -EACCES;
1820
dadcd65f 1821 set_bit(vid, adapter->active_vlans);
8e586137 1822
2ddc7fe1 1823 return err;
92915f71
GR		 1824}
1825
80d5c368
PM		 1826static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1827 __be16 proto, u16 vid)
92915f71
GR		 1828{
1829 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1830 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 1831 int err;
92915f71 1832
55fdd45b 1833 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1834
92915f71 1835 /* remove VID from filter table */
92fe0bf7 1836 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1837
55fdd45b 1838 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1839
dadcd65f 1840 clear_bit(vid, adapter->active_vlans);
8e586137 1841
2ddc7fe1 1842 return err;
92915f71
GR		 1843}
1844
1845static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1846{
dadcd65f 1847 u16 vid;
92915f71 1848
dadcd65f 1849 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 1850 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1851 htons(ETH_P_8021Q), vid);
92915f71
GR		 1852}
1853
46ec20ff
GR		 1854static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1855{
1856 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1857 struct ixgbe_hw *hw = &adapter->hw;
1858 int count = 0;
1859
1860 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1861 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1862 return -ENOSPC;
1863 }
1864
1865 if (!netdev_uc_empty(netdev)) {
1866 struct netdev_hw_addr *ha;
dec0d8e4 1867
46ec20ff
GR		 1868 netdev_for_each_uc_addr(ha, netdev) {
1869 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1870 udelay(200);
1871 }
1872 } else {
dec0d8e4
JK		 1873 /* If the list is empty then send message to PF driver to
1874 * clear all MAC VLANs on this VF.
46ec20ff
GR		 1875 */
1876 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1877 }
1878
1879 return count;
1880}
1881
92915f71 1882/**
dee847f5 1883 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 1884 * @netdev: network interface device structure
1885 *
1886 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 1887 * list, unicast address list or the network interface flags are updated.
1888 * This routine is responsible for configuring the hardware for proper
1889 * multicast mode and configuring requested unicast filters.
92915f71
GR		 1890 **/
1891static void ixgbevf_set_rx_mode(struct net_device *netdev)
1892{
1893 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1894 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 1895 unsigned int flags = netdev->flags;
1896 int xcast_mode;
1897
1898 xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
1899 (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
1900 IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
92915f71 1901
55fdd45b 1902 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1903
8443c1a4
HS		 1904 hw->mac.ops.update_xcast_mode(hw, netdev, xcast_mode);
1905
92915f71 1906 /* reprogram multicast list */
92fe0bf7 1907 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1908
1909 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1910
55fdd45b 1911 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1912}
1913
1914static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1915{
1916 int q_idx;
1917 struct ixgbevf_q_vector *q_vector;
1918 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1919
1920 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1921 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 1922#ifdef CONFIG_NET_RX_BUSY_POLL
1923 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1924#endif
fa71ae27 1925 napi_enable(&q_vector->napi);
92915f71
GR		 1926 }
1927}
1928
1929static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1930{
1931 int q_idx;
1932 struct ixgbevf_q_vector *q_vector;
1933 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1934
1935 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1936 q_vector = adapter->q_vector[q_idx];
92915f71 1937 napi_disable(&q_vector->napi);
c777cdfa
JK		 1938#ifdef CONFIG_NET_RX_BUSY_POLL
1939 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1940 pr_info("QV %d locked\n", q_idx);
1941 usleep_range(1000, 20000);
1942 }
1943#endif /* CONFIG_NET_RX_BUSY_POLL */
92915f71
GR		 1944 }
1945}
1946
220fe050
DS		 1947static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1948{
1949 struct ixgbe_hw *hw = &adapter->hw;
1950 unsigned int def_q = 0;
1951 unsigned int num_tcs = 0;
2dc571aa
ET		 1952 unsigned int num_rx_queues = adapter->num_rx_queues;
1953 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 1954 int err;
1955
1956 spin_lock_bh(&adapter->mbx_lock);
1957
1958 /* fetch queue configuration from the PF */
1959 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1960
1961 spin_unlock_bh(&adapter->mbx_lock);
1962
1963 if (err)
1964 return err;
1965
1966 if (num_tcs > 1) {
2dc571aa
ET		 1967 /* we need only one Tx queue */
1968 num_tx_queues = 1;
1969
220fe050 1970 /* update default Tx ring register index */
87e70ab9 1971 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 1972
1973 /* we need as many queues as traffic classes */
1974 num_rx_queues = num_tcs;
1975 }
1976
1977 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 1978 if ((adapter->num_rx_queues != num_rx_queues) ||
1979 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 1980 /* force mailbox timeout to prevent further messages */
1981 hw->mbx.timeout = 0;
1982
1983 /* wait for watchdog to come around and bail us out */
1984 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1985 }
1986
1987 return 0;
1988}
1989
92915f71
GR		 1990static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1991{
220fe050
DS		 1992 ixgbevf_configure_dcb(adapter);
1993
de02decb 1994 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 1995
1996 ixgbevf_restore_vlan(adapter);
1997
1998 ixgbevf_configure_tx(adapter);
1999 ixgbevf_configure_rx(adapter);
92915f71
GR		 2000}
2001
33bd9f60
GR		 2002static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2003{
2004 /* Only save pre-reset stats if there are some */
2005 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2006 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2007 adapter->stats.base_vfgprc;
2008 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2009 adapter->stats.base_vfgptc;
2010 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2011 adapter->stats.base_vfgorc;
2012 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2013 adapter->stats.base_vfgotc;
2014 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2015 adapter->stats.base_vfmprc;
2016 }
2017}
2018
2019static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2020{
2021 struct ixgbe_hw *hw = &adapter->hw;
2022
2023 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2024 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2025 adapter->stats.last_vfgorc |=
2026 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2027 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2028 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2029 adapter->stats.last_vfgotc |=
2030 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2031 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2032
2033 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2034 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2035 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2036 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2037 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2038}
2039
31186785
AD		 2040static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2041{
2042 struct ixgbe_hw *hw = &adapter->hw;
94cf66f8
VZ		 2043 int api[] = { ixgbe_mbox_api_12,
2044 ixgbe_mbox_api_11,
56e94095 2045 ixgbe_mbox_api_10,
31186785 2046 ixgbe_mbox_api_unknown };
50985b5f 2047 int err, idx = 0;
31186785 2048
55fdd45b 2049 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2050
2051 while (api[idx] != ixgbe_mbox_api_unknown) {
2052 err = ixgbevf_negotiate_api_version(hw, api[idx]);
2053 if (!err)
2054 break;
2055 idx++;
2056 }
2057
55fdd45b 2058 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2059}
2060
795180d8 2061static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2062{
2063 struct net_device *netdev = adapter->netdev;
2064 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 2065
2066 ixgbevf_configure_msix(adapter);
2067
55fdd45b 2068 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2069
92fe0bf7
GR		 2070 if (is_valid_ether_addr(hw->mac.addr))
2071 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2072 else
2073 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2074
55fdd45b 2075 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2076
4e857c58 2077 smp_mb__before_atomic();
92915f71
GR		 2078 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2079 ixgbevf_napi_enable_all(adapter);
2080
d9bdb57f
ET		 2081 /* clear any pending interrupts, may auto mask */
2082 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2083 ixgbevf_irq_enable(adapter);
2084
92915f71
GR		 2085 /* enable transmits */
2086 netif_tx_start_all_queues(netdev);
2087
33bd9f60
GR		 2088 ixgbevf_save_reset_stats(adapter);
2089 ixgbevf_init_last_counter_stats(adapter);
2090
4b2cd27f 2091 hw->mac.get_link_status = 1;
9ac5c5cc 2092 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2093}
2094
795180d8 2095void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2096{
92915f71
GR		 2097 ixgbevf_configure(adapter);
2098
795180d8 2099 ixgbevf_up_complete(adapter);
92915f71
GR		 2100}
2101
2102/**
2103 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2104 * @rx_ring: ring to free buffers from
2105 **/
05d063aa 2106static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2107{
bad17234 2108 struct device *dev = rx_ring->dev;
92915f71
GR		 2109 unsigned long size;
2110 unsigned int i;
2111
bad17234
ET		 2112 /* Free Rx ring sk_buff */
2113 if (rx_ring->skb) {
2114 dev_kfree_skb(rx_ring->skb);
2115 rx_ring->skb = NULL;
2116 }
2117
2118 /* ring already cleared, nothing to do */
c0456c23
GR		 2119 if (!rx_ring->rx_buffer_info)
2120 return;
92915f71 2121
bad17234 2122 /* Free all the Rx ring pages */
92915f71 2123 for (i = 0; i < rx_ring->count; i++) {
bad17234 2124 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2125
bad17234
ET		 2126 rx_buffer = &rx_ring->rx_buffer_info[i];
2127 if (rx_buffer->dma)
2128 dma_unmap_page(dev, rx_buffer->dma,
2129 PAGE_SIZE, DMA_FROM_DEVICE);
2130 rx_buffer->dma = 0;
2131 if (rx_buffer->page)
2132 __free_page(rx_buffer->page);
2133 rx_buffer->page = NULL;
92915f71
GR		 2134 }
2135
2136 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2137 memset(rx_ring->rx_buffer_info, 0, size);
2138
2139 /* Zero out the descriptor ring */
2140 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR		 2141}
2142
2143/**
2144 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2145 * @tx_ring: ring to be cleaned
2146 **/
05d063aa 2147static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR		 2148{
2149 struct ixgbevf_tx_buffer *tx_buffer_info;
2150 unsigned long size;
2151 unsigned int i;
2152
c0456c23
GR		 2153 if (!tx_ring->tx_buffer_info)
2154 return;
2155
92915f71 2156 /* Free all the Tx ring sk_buffs */
92915f71
GR		 2157 for (i = 0; i < tx_ring->count; i++) {
2158 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2159 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2160 }
2161
2162 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2163 memset(tx_ring->tx_buffer_info, 0, size);
2164
2165 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR		 2166}
2167
2168/**
2169 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2170 * @adapter: board private structure
2171 **/
2172static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2173{
2174 int i;
2175
2176 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2177 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2178}
2179
2180/**
2181 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2182 * @adapter: board private structure
2183 **/
2184static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2185{
2186 int i;
2187
2188 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2189 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR		 2190}
2191
2192void ixgbevf_down(struct ixgbevf_adapter *adapter)
2193{
2194 struct net_device *netdev = adapter->netdev;
2195 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2196 int i;
92915f71
GR		 2197
2198 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2199 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2200 return; /* do nothing if already down */
858c3dda 2201
dec0d8e4 2202 /* disable all enabled Rx queues */
858c3dda 2203 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2204 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2205
d9bdb57f 2206 usleep_range(10000, 20000);
92915f71
GR		 2207
2208 netif_tx_stop_all_queues(netdev);
2209
d9bdb57f
ET		 2210 /* call carrier off first to avoid false dev_watchdog timeouts */
2211 netif_carrier_off(netdev);
2212 netif_tx_disable(netdev);
2213
92915f71
GR		 2214 ixgbevf_irq_disable(adapter);
2215
2216 ixgbevf_napi_disable_all(adapter);
2217
9ac5c5cc 2218 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2219
2220 /* disable transmits in the hardware now that interrupts are off */
2221 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2222 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2223
2224 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2225 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2226 }
2227
92915f71
GR		 2228 if (!pci_channel_offline(adapter->pdev))
2229 ixgbevf_reset(adapter);
2230
2231 ixgbevf_clean_all_tx_rings(adapter);
2232 ixgbevf_clean_all_rx_rings(adapter);
2233}
2234
2235void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2236{
2237 WARN_ON(in_interrupt());
c0456c23 2238
92915f71
GR		 2239 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2240 msleep(1);
2241
4b2cd27f
AD		 2242 ixgbevf_down(adapter);
2243 ixgbevf_up(adapter);
92915f71
GR		 2244
2245 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2246}
2247
2248void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2249{
2250 struct ixgbe_hw *hw = &adapter->hw;
2251 struct net_device *netdev = adapter->netdev;
2252
798e381a 2253 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2254 hw_dbg(hw, "PF still resetting\n");
798e381a 2255 } else {
92915f71 2256 hw->mac.ops.init_hw(hw);
798e381a
DS		 2257 ixgbevf_negotiate_api(adapter);
2258 }
92915f71
GR		 2259
2260 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
91a76baa
ET		 2261 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2262 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2263 }
e66c92ad
ET		 2264
2265 adapter->last_reset = jiffies;
92915f71
GR		 2266}
2267
e45dd5fe
JK		 2268static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2269 int vectors)
92915f71 2270{
a5f9337b 2271 int vector_threshold;
92915f71 2272
fa71ae27
AD		 2273 /* We'll want at least 2 (vector_threshold):
2274 * 1) TxQ[0] + RxQ[0] handler
2275 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2276 */
2277 vector_threshold = MIN_MSIX_COUNT;
2278
2279 /* The more we get, the more we will assign to Tx/Rx Cleanup
2280 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2281 * Right now, we simply care about how many we'll get; we'll
2282 * set them up later while requesting irq's.
2283 */
5c1e3588
AG		 2284 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2285 vector_threshold, vectors);
92915f71 2286
5c1e3588 2287 if (vectors < 0) {
e45dd5fe
JK		 2288 dev_err(&adapter->pdev->dev,
2289 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2290 kfree(adapter->msix_entries);
2291 adapter->msix_entries = NULL;
5c1e3588 2292 return vectors;
92915f71 2293 }
dee847f5 2294
5c1e3588
AG		 2295 /* Adjust for only the vectors we'll use, which is minimum
2296 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2297 * vectors we were allocated.
2298 */
2299 adapter->num_msix_vectors = vectors;
2300
2301 return 0;
92915f71
GR		 2302}
2303
49ce9c2c
BH		 2304/**
2305 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2306 * @adapter: board private structure to initialize
2307 *
2308 * This is the top level queue allocation routine. The order here is very
2309 * important, starting with the "most" number of features turned on at once,
2310 * and ending with the smallest set of features. This way large combinations
2311 * can be allocated if they're turned on, and smaller combinations are the
2312 * fallthrough conditions.
2313 *
2314 **/
2315static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2316{
220fe050
DS		 2317 struct ixgbe_hw *hw = &adapter->hw;
2318 unsigned int def_q = 0;
2319 unsigned int num_tcs = 0;
2320 int err;
2321
92915f71
GR		 2322 /* Start with base case */
2323 adapter->num_rx_queues = 1;
2324 adapter->num_tx_queues = 1;
220fe050
DS		 2325
2326 spin_lock_bh(&adapter->mbx_lock);
2327
2328 /* fetch queue configuration from the PF */
2329 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2330
2331 spin_unlock_bh(&adapter->mbx_lock);
2332
2333 if (err)
2334 return;
2335
2336 /* we need as many queues as traffic classes */
2dc571aa 2337 if (num_tcs > 1) {
220fe050 2338 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2339 } else {
2340 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2341
2342 switch (hw->api_version) {
2343 case ixgbe_mbox_api_11:
94cf66f8 2344 case ixgbe_mbox_api_12:
2dc571aa
ET		 2345 adapter->num_rx_queues = rss;
2346 adapter->num_tx_queues = rss;
2347 default:
2348 break;
2349 }
2350 }
92915f71
GR		 2351}
2352
2353/**
2354 * ixgbevf_alloc_queues - Allocate memory for all rings
2355 * @adapter: board private structure to initialize
2356 *
2357 * We allocate one ring per queue at run-time since we don't know the
2358 * number of queues at compile-time. The polling_netdev array is
2359 * intended for Multiqueue, but should work fine with a single queue.
2360 **/
2361static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2362{
87e70ab9
DS		 2363 struct ixgbevf_ring *ring;
2364 int rx = 0, tx = 0;
92915f71 2365
87e70ab9
DS		 2366 for (; tx < adapter->num_tx_queues; tx++) {
2367 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2368 if (!ring)
2369 goto err_allocation;
92915f71 2370
87e70ab9
DS		 2371 ring->dev = &adapter->pdev->dev;
2372 ring->netdev = adapter->netdev;
2373 ring->count = adapter->tx_ring_count;
2374 ring->queue_index = tx;
2375 ring->reg_idx = tx;
92915f71 2376
87e70ab9 2377 adapter->tx_ring[tx] = ring;
92915f71
GR		 2378 }
2379
87e70ab9
DS		 2380 for (; rx < adapter->num_rx_queues; rx++) {
2381 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2382 if (!ring)
2383 goto err_allocation;
2384
2385 ring->dev = &adapter->pdev->dev;
2386 ring->netdev = adapter->netdev;
2387
2388 ring->count = adapter->rx_ring_count;
2389 ring->queue_index = rx;
2390 ring->reg_idx = rx;
2391
2392 adapter->rx_ring[rx] = ring;
92915f71
GR		 2393 }
2394
2395 return 0;
2396
87e70ab9
DS		 2397err_allocation:
2398 while (tx) {
2399 kfree(adapter->tx_ring[--tx]);
2400 adapter->tx_ring[tx] = NULL;
2401 }
2402
2403 while (rx) {
2404 kfree(adapter->rx_ring[--rx]);
2405 adapter->rx_ring[rx] = NULL;
2406 }
92915f71
GR		 2407 return -ENOMEM;
2408}
2409
2410/**
2411 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2412 * @adapter: board private structure to initialize
2413 *
2414 * Attempt to configure the interrupts using the best available
2415 * capabilities of the hardware and the kernel.
2416 **/
2417static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2418{
91e2b89b 2419 struct net_device *netdev = adapter->netdev;
50985b5f 2420 int err;
92915f71
GR		 2421 int vector, v_budget;
2422
dec0d8e4 2423 /* It's easy to be greedy for MSI-X vectors, but it really
92915f71
GR		 2424 * doesn't do us much good if we have a lot more vectors
2425 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 2426 * (roughly) the same number of vectors as there are CPU's.
2427 * The default is to use pairs of vectors.
92915f71 2428 */
fa71ae27
AD		 2429 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2430 v_budget = min_t(int, v_budget, num_online_cpus());
2431 v_budget += NON_Q_VECTORS;
92915f71
GR		 2432
2433 /* A failure in MSI-X entry allocation isn't fatal, but it does
dec0d8e4
JK		 2434 * mean we disable MSI-X capabilities of the adapter.
2435 */
92915f71
GR		 2436 adapter->msix_entries = kcalloc(v_budget,
2437 sizeof(struct msix_entry), GFP_KERNEL);
50985b5f
MR		 2438 if (!adapter->msix_entries)
2439 return -ENOMEM;
92915f71
GR		 2440
2441 for (vector = 0; vector < v_budget; vector++)
2442 adapter->msix_entries[vector].entry = vector;
2443
e45dd5fe
JK		 2444 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2445 if (err)
50985b5f 2446 return err;
92915f71 2447
91e2b89b
GR		 2448 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2449 if (err)
50985b5f 2450 return err;
91e2b89b 2451
50985b5f 2452 return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
92915f71
GR		 2453}
2454
2455/**
2456 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2457 * @adapter: board private structure to initialize
2458 *
2459 * We allocate one q_vector per queue interrupt. If allocation fails we
2460 * return -ENOMEM.
2461 **/
2462static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2463{
2464 int q_idx, num_q_vectors;
2465 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 2466
2467 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2468
2469 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2470 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2471 if (!q_vector)
2472 goto err_out;
2473 q_vector->adapter = adapter;
2474 q_vector->v_idx = q_idx;
fa71ae27
AD		 2475 netif_napi_add(adapter->netdev, &q_vector->napi,
2476 ixgbevf_poll, 64);
92915f71
GR		 2477 adapter->q_vector[q_idx] = q_vector;
2478 }
2479
2480 return 0;
2481
2482err_out:
2483 while (q_idx) {
2484 q_idx--;
2485 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 2486#ifdef CONFIG_NET_RX_BUSY_POLL
2487 napi_hash_del(&q_vector->napi);
2488#endif
92915f71
GR		 2489 netif_napi_del(&q_vector->napi);
2490 kfree(q_vector);
2491 adapter->q_vector[q_idx] = NULL;
2492 }
2493 return -ENOMEM;
2494}
2495
2496/**
2497 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2498 * @adapter: board private structure to initialize
2499 *
2500 * This function frees the memory allocated to the q_vectors. In addition if
2501 * NAPI is enabled it will delete any references to the NAPI struct prior
2502 * to freeing the q_vector.
2503 **/
2504static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2505{
f4477702 2506 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2507
2508 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2509 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2510
2511 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK		 2512#ifdef CONFIG_NET_RX_BUSY_POLL
2513 napi_hash_del(&q_vector->napi);
2514#endif
f4477702 2515 netif_napi_del(&q_vector->napi);
92915f71
GR		 2516 kfree(q_vector);
2517 }
2518}
2519
2520/**
2521 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2522 * @adapter: board private structure
2523 *
2524 **/
2525static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2526{
2527 pci_disable_msix(adapter->pdev);
2528 kfree(adapter->msix_entries);
2529 adapter->msix_entries = NULL;
92915f71
GR		 2530}
2531
2532/**
2533 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2534 * @adapter: board private structure to initialize
2535 *
2536 **/
2537static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2538{
2539 int err;
2540
2541 /* Number of supported queues */
2542 ixgbevf_set_num_queues(adapter);
2543
2544 err = ixgbevf_set_interrupt_capability(adapter);
2545 if (err) {
2546 hw_dbg(&adapter->hw,
2547 "Unable to setup interrupt capabilities\n");
2548 goto err_set_interrupt;
2549 }
2550
2551 err = ixgbevf_alloc_q_vectors(adapter);
2552 if (err) {
dec0d8e4 2553 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2554 goto err_alloc_q_vectors;
2555 }
2556
2557 err = ixgbevf_alloc_queues(adapter);
2558 if (err) {
dbd9636e 2559 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2560 goto err_alloc_queues;
2561 }
2562
dec0d8e4 2563 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
92915f71
GR		 2564 (adapter->num_rx_queues > 1) ? "Enabled" :
2565 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2566
2567 set_bit(__IXGBEVF_DOWN, &adapter->state);
2568
2569 return 0;
2570err_alloc_queues:
2571 ixgbevf_free_q_vectors(adapter);
2572err_alloc_q_vectors:
2573 ixgbevf_reset_interrupt_capability(adapter);
2574err_set_interrupt:
2575 return err;
2576}
2577
0ac1e8ce
AD		 2578/**
2579 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2580 * @adapter: board private structure to clear interrupt scheme on
2581 *
2582 * We go through and clear interrupt specific resources and reset the structure
2583 * to pre-load conditions
2584 **/
2585static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2586{
87e70ab9
DS		 2587 int i;
2588
2589 for (i = 0; i < adapter->num_tx_queues; i++) {
2590 kfree(adapter->tx_ring[i]);
2591 adapter->tx_ring[i] = NULL;
2592 }
2593 for (i = 0; i < adapter->num_rx_queues; i++) {
2594 kfree(adapter->rx_ring[i]);
2595 adapter->rx_ring[i] = NULL;
2596 }
2597
0ac1e8ce
AD		 2598 adapter->num_tx_queues = 0;
2599 adapter->num_rx_queues = 0;
2600
2601 ixgbevf_free_q_vectors(adapter);
2602 ixgbevf_reset_interrupt_capability(adapter);
2603}
2604
92915f71
GR		 2605/**
2606 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 2607 * @adapter: board private structure to initialize
2608 *
2609 * ixgbevf_sw_init initializes the Adapter private data structure.
2610 * Fields are initialized based on PCI device information and
2611 * OS network device settings (MTU size).
2612 **/
9f9a12f8 2613static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2614{
2615 struct ixgbe_hw *hw = &adapter->hw;
2616 struct pci_dev *pdev = adapter->pdev;
e1941a74 2617 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2618 int err;
2619
2620 /* PCI config space info */
92915f71
GR		 2621 hw->vendor_id = pdev->vendor;
2622 hw->device_id = pdev->device;
ff938e43 2623 hw->revision_id = pdev->revision;
92915f71
GR		 2624 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2625 hw->subsystem_device_id = pdev->subsystem_device;
2626
2627 hw->mbx.ops.init_params(hw);
56e94095
AD		 2628
2629 /* assume legacy case in which PF would only give VF 2 queues */
2630 hw->mac.max_tx_queues = 2;
2631 hw->mac.max_rx_queues = 2;
2632
798e381a
DS		 2633 /* lock to protect mailbox accesses */
2634 spin_lock_init(&adapter->mbx_lock);
2635
92915f71
GR		 2636 err = hw->mac.ops.reset_hw(hw);
2637 if (err) {
2638 dev_info(&pdev->dev,
e1941a74 2639 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 2640 } else {
2641 err = hw->mac.ops.init_hw(hw);
2642 if (err) {
dbd9636e 2643 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2644 goto out;
2645 }
798e381a 2646 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 2647 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2648 if (err)
2649 dev_info(&pdev->dev, "Error reading MAC address\n");
2650 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2651 dev_info(&pdev->dev,
2652 "MAC address not assigned by administrator.\n");
91a76baa 2653 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
e1941a74
GR		 2654 }
2655
2656 if (!is_valid_ether_addr(netdev->dev_addr)) {
2657 dev_info(&pdev->dev, "Assigning random MAC address\n");
2658 eth_hw_addr_random(netdev);
91a76baa 2659 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 2660 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 2661 }
2662
2663 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2664 adapter->rx_itr_setting = 1;
2665 adapter->tx_itr_setting = 1;
92915f71 2666
92915f71
GR		 2667 /* set default ring sizes */
2668 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2669 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2670
92915f71 2671 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2672 return 0;
92915f71
GR		 2673
2674out:
2675 return err;
2676}
2677
92915f71
GR		 2678#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2679 { \
2680 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2681 if (current_counter < last_counter) \
2682 counter += 0x100000000LL; \
2683 last_counter = current_counter; \
2684 counter &= 0xFFFFFFFF00000000LL; \
2685 counter |= current_counter; \
2686 }
2687
2688#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2689 { \
2690 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2691 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 2692 u64 current_counter = (current_counter_msb << 32) | \
2693 current_counter_lsb; \
92915f71
GR		 2694 if (current_counter < last_counter) \
2695 counter += 0x1000000000LL; \
2696 last_counter = current_counter; \
2697 counter &= 0xFFFFFFF000000000LL; \
2698 counter |= current_counter; \
2699 }
2700/**
2701 * ixgbevf_update_stats - Update the board statistics counters.
2702 * @adapter: board private structure
2703 **/
2704void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2705{
2706 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2707 int i;
92915f71 2708
e66c92ad
ET		 2709 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2710 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 2711 return;
2712
92915f71
GR		 2713 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2714 adapter->stats.vfgprc);
2715 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2716 adapter->stats.vfgptc);
2717 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2718 adapter->stats.last_vfgorc,
2719 adapter->stats.vfgorc);
2720 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2721 adapter->stats.last_vfgotc,
2722 adapter->stats.vfgotc);
2723 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2724 adapter->stats.vfmprc);
55fb277c
GR		 2725
2726 for (i = 0; i < adapter->num_rx_queues; i++) {
2727 adapter->hw_csum_rx_error +=
87e70ab9 2728 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2729 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2730 }
92915f71
GR		 2731}
2732
2733/**
9ac5c5cc 2734 * ixgbevf_service_timer - Timer Call-back
92915f71
GR		 2735 * @data: pointer to adapter cast into an unsigned long
2736 **/
9ac5c5cc 2737static void ixgbevf_service_timer(unsigned long data)
92915f71
GR		 2738{
2739 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
e66c92ad 2740
9ac5c5cc
ET		 2741 /* Reset the timer */
2742 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
2743
2744 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 2745}
2746
9ac5c5cc 2747static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 2748{
9ac5c5cc
ET		 2749 if (!(adapter->flags & IXGBEVF_FLAG_RESET_REQUESTED))
2750 return;
e66c92ad 2751
9ac5c5cc 2752 adapter->flags &= ~IXGBEVF_FLAG_RESET_REQUESTED;
e66c92ad
ET		 2753
2754 /* If we're already down or resetting, just bail */
2755 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2756 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2757 return;
2758
2759 adapter->tx_timeout_count++;
2760
2761 ixgbevf_reinit_locked(adapter);
2762}
2763
dec0d8e4
JK		 2764/**
2765 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
2766 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2767 *
2768 * This function serves two purposes. First it strobes the interrupt lines
2769 * in order to make certain interrupts are occurring. Secondly it sets the
2770 * bits needed to check for TX hangs. As a result we should immediately
2771 * determine if a hang has occurred.
dec0d8e4 2772 **/
e66c92ad
ET		 2773static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2774{
92915f71 2775 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2776 u32 eics = 0;
92915f71
GR		 2777 int i;
2778
e66c92ad
ET		 2779 /* If we're down or resetting, just bail */
2780 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2781 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2782 return;
92915f71 2783
e08400b7
ET		 2784 /* Force detection of hung controller */
2785 if (netif_carrier_ok(adapter->netdev)) {
2786 for (i = 0; i < adapter->num_tx_queues; i++)
2787 set_check_for_tx_hang(adapter->tx_ring[i]);
2788 }
2789
dec0d8e4 2790 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 2791 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2792 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 2793
6b43c446 2794 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2795 eics |= 1 << i;
92915f71
GR		 2796 }
2797
e66c92ad 2798 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 2799 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 2800}
92915f71 2801
e66c92ad
ET		 2802/**
2803 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 2804 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2805 **/
2806static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2807{
2808 struct ixgbe_hw *hw = &adapter->hw;
2809 u32 link_speed = adapter->link_speed;
2810 bool link_up = adapter->link_up;
2811 s32 err;
2812
2813 spin_lock_bh(&adapter->mbx_lock);
2814
2815 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2816
2817 spin_unlock_bh(&adapter->mbx_lock);
2818
2819 /* if check for link returns error we will need to reset */
2820 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
9ac5c5cc 2821 adapter->flags |= IXGBEVF_FLAG_RESET_REQUESTED;
e66c92ad
ET		 2822 link_up = false;
2823 }
2824
2825 adapter->link_up = link_up;
2826 adapter->link_speed = link_speed;
92915f71
GR		 2827}
2828
e66c92ad
ET		 2829/**
2830 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
2831 * print link up message
dec0d8e4 2832 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2833 **/
2834static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 2835{
e66c92ad 2836 struct net_device *netdev = adapter->netdev;
92915f71 2837
e66c92ad
ET		 2838 /* only continue if link was previously down */
2839 if (netif_carrier_ok(netdev))
92915f71
GR		 2840 return;
2841
e66c92ad
ET		 2842 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2843 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2844 "10 Gbps" :
2845 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2846 "1 Gbps" :
2847 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2848 "100 Mbps" :
2849 "unknown speed");
92915f71 2850
e66c92ad
ET		 2851 netif_carrier_on(netdev);
2852}
2853
2854/**
2855 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
2856 * print link down message
dec0d8e4 2857 * @adapter: pointer to the adapter structure
e66c92ad
ET		 2858 **/
2859static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2860{
2861 struct net_device *netdev = adapter->netdev;
2862
2863 adapter->link_speed = 0;
2864
2865 /* only continue if link was up previously */
2866 if (!netif_carrier_ok(netdev))
2867 return;
2868
2869 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2870
2871 netif_carrier_off(netdev);
92915f71
GR		 2872}
2873
2874/**
9ac5c5cc
ET		 2875 * ixgbevf_watchdog_subtask - worker thread to bring link up
2876 * @work: pointer to work_struct containing our data
2877 **/
2878static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
2879{
2880 /* if interface is down do nothing */
2881 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2882 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2883 return;
2884
2885 ixgbevf_watchdog_update_link(adapter);
2886
2887 if (adapter->link_up)
2888 ixgbevf_watchdog_link_is_up(adapter);
2889 else
2890 ixgbevf_watchdog_link_is_down(adapter);
2891
2892 ixgbevf_update_stats(adapter);
2893}
2894
2895/**
2896 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 2897 * @work: pointer to work_struct containing our data
2898 **/
9ac5c5cc 2899static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 2900{
2901 struct ixgbevf_adapter *adapter = container_of(work,
2902 struct ixgbevf_adapter,
9ac5c5cc 2903 service_task);
92915f71 2904 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2905
26597802
MR		 2906 if (IXGBE_REMOVED(hw->hw_addr)) {
2907 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2908 rtnl_lock();
2909 ixgbevf_down(adapter);
2910 rtnl_unlock();
2911 }
2912 return;
2913 }
e66c92ad 2914
220fe050 2915 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 2916 ixgbevf_reset_subtask(adapter);
2917 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 2918 ixgbevf_check_hang_subtask(adapter);
2919
9ac5c5cc 2920 ixgbevf_service_event_complete(adapter);
92915f71
GR		 2921}
2922
2923/**
2924 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 2925 * @tx_ring: Tx descriptor ring for a specific queue
2926 *
2927 * Free all transmit software resources
2928 **/
05d063aa 2929void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2930{
05d063aa 2931 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 2932
2933 vfree(tx_ring->tx_buffer_info);
2934 tx_ring->tx_buffer_info = NULL;
2935
de02decb
DS		 2936 /* if not set, then don't free */
2937 if (!tx_ring->desc)
2938 return;
2939
05d063aa 2940 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2941 tx_ring->dma);
92915f71
GR		 2942
2943 tx_ring->desc = NULL;
2944}
2945
2946/**
2947 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2948 * @adapter: board private structure
2949 *
2950 * Free all transmit software resources
2951 **/
2952static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2953{
2954 int i;
2955
2956 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2957 if (adapter->tx_ring[i]->desc)
05d063aa 2958 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2959}
2960
2961/**
2962 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 2963 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 2964 *
2965 * Return 0 on success, negative on failure
2966 **/
05d063aa 2967int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2968{
92915f71
GR		 2969 int size;
2970
2971 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2972 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2973 if (!tx_ring->tx_buffer_info)
2974 goto err;
92915f71
GR		 2975
2976 /* round up to nearest 4K */
2977 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2978 tx_ring->size = ALIGN(tx_ring->size, 4096);
2979
05d063aa 2980 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2981 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2982 if (!tx_ring->desc)
2983 goto err;
2984
92915f71
GR		 2985 return 0;
2986
2987err:
2988 vfree(tx_ring->tx_buffer_info);
2989 tx_ring->tx_buffer_info = NULL;
dec0d8e4 2990 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 2991 return -ENOMEM;
2992}
2993
2994/**
2995 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2996 * @adapter: board private structure
2997 *
2998 * If this function returns with an error, then it's possible one or
2999 * more of the rings is populated (while the rest are not). It is the
3000 * callers duty to clean those orphaned rings.
3001 *
3002 * Return 0 on success, negative on failure
3003 **/
3004static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3005{
3006 int i, err = 0;
3007
3008 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3009 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3010 if (!err)
3011 continue;
dec0d8e4 3012 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
92915f71
GR		 3013 break;
3014 }
3015
3016 return err;
3017}
3018
3019/**
3020 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
dec0d8e4 3021 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3022 *
3023 * Returns 0 on success, negative on failure
3024 **/
05d063aa 3025int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3026{
92915f71
GR		 3027 int size;
3028
3029 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 3030 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 3031 if (!rx_ring->rx_buffer_info)
05d063aa 3032 goto err;
92915f71
GR		 3033
3034 /* Round up to nearest 4K */
3035 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3036 rx_ring->size = ALIGN(rx_ring->size, 4096);
3037
05d063aa 3038 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3039 &rx_ring->dma, GFP_KERNEL);
92915f71 3040
05d063aa
ET		 3041 if (!rx_ring->desc)
3042 goto err;
92915f71 3043
92915f71 3044 return 0;
05d063aa
ET		 3045err:
3046 vfree(rx_ring->rx_buffer_info);
3047 rx_ring->rx_buffer_info = NULL;
3048 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3049 return -ENOMEM;
3050}
3051
3052/**
3053 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3054 * @adapter: board private structure
3055 *
3056 * If this function returns with an error, then it's possible one or
3057 * more of the rings is populated (while the rest are not). It is the
3058 * callers duty to clean those orphaned rings.
3059 *
3060 * Return 0 on success, negative on failure
3061 **/
3062static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3063{
3064 int i, err = 0;
3065
3066 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 3067 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3068 if (!err)
3069 continue;
dec0d8e4 3070 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
92915f71
GR		 3071 break;
3072 }
3073 return err;
3074}
3075
3076/**
3077 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3078 * @rx_ring: ring to clean the resources from
3079 *
3080 * Free all receive software resources
3081 **/
05d063aa 3082void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3083{
05d063aa 3084 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR		 3085
3086 vfree(rx_ring->rx_buffer_info);
3087 rx_ring->rx_buffer_info = NULL;
3088
05d063aa 3089 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3090 rx_ring->dma);
92915f71
GR		 3091
3092 rx_ring->desc = NULL;
3093}
3094
3095/**
3096 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3097 * @adapter: board private structure
3098 *
3099 * Free all receive software resources
3100 **/
3101static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3102{
3103 int i;
3104
3105 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3106 if (adapter->rx_ring[i]->desc)
05d063aa 3107 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3108}
3109
3110/**
3111 * ixgbevf_open - Called when a network interface is made active
3112 * @netdev: network interface device structure
3113 *
3114 * Returns 0 on success, negative value on failure
3115 *
3116 * The open entry point is called when a network interface is made
3117 * active by the system (IFF_UP). At this point all resources needed
3118 * for transmit and receive operations are allocated, the interrupt
3119 * handler is registered with the OS, the watchdog timer is started,
3120 * and the stack is notified that the interface is ready.
3121 **/
3122static int ixgbevf_open(struct net_device *netdev)
3123{
3124 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3125 struct ixgbe_hw *hw = &adapter->hw;
3126 int err;
3127
a1f6c6b1 3128 /* A previous failure to open the device because of a lack of
3129 * available MSIX vector resources may have reset the number
3130 * of msix vectors variable to zero. The only way to recover
3131 * is to unload/reload the driver and hope that the system has
3132 * been able to recover some MSIX vector resources.
3133 */
3134 if (!adapter->num_msix_vectors)
3135 return -ENOMEM;
3136
92915f71
GR		 3137 if (hw->adapter_stopped) {
3138 ixgbevf_reset(adapter);
3139 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3140 * the VF can't start.
3141 */
92915f71
GR		 3142 if (hw->adapter_stopped) {
3143 err = IXGBE_ERR_MBX;
dec0d8e4 3144 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3145 goto err_setup_reset;
3146 }
3147 }
3148
d9bdb57f
ET		 3149 /* disallow open during test */
3150 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3151 return -EBUSY;
3152
3153 netif_carrier_off(netdev);
3154
92915f71
GR		 3155 /* allocate transmit descriptors */
3156 err = ixgbevf_setup_all_tx_resources(adapter);
3157 if (err)
3158 goto err_setup_tx;
3159
3160 /* allocate receive descriptors */
3161 err = ixgbevf_setup_all_rx_resources(adapter);
3162 if (err)
3163 goto err_setup_rx;
3164
3165 ixgbevf_configure(adapter);
3166
dec0d8e4 3167 /* Map the Tx/Rx rings to the vectors we were allotted.
92915f71
GR		 3168 * if request_irq will be called in this function map_rings
3169 * must be called *before* up_complete
3170 */
3171 ixgbevf_map_rings_to_vectors(adapter);
3172
92915f71
GR		 3173 err = ixgbevf_request_irq(adapter);
3174 if (err)
3175 goto err_req_irq;
3176
d9bdb57f 3177 ixgbevf_up_complete(adapter);
92915f71
GR		 3178
3179 return 0;
3180
3181err_req_irq:
3182 ixgbevf_down(adapter);
92915f71
GR		 3183err_setup_rx:
3184 ixgbevf_free_all_rx_resources(adapter);
3185err_setup_tx:
3186 ixgbevf_free_all_tx_resources(adapter);
3187 ixgbevf_reset(adapter);
3188
3189err_setup_reset:
3190
3191 return err;
3192}
3193
3194/**
3195 * ixgbevf_close - Disables a network interface
3196 * @netdev: network interface device structure
3197 *
3198 * Returns 0, this is not allowed to fail
3199 *
3200 * The close entry point is called when an interface is de-activated
3201 * by the OS. The hardware is still under the drivers control, but
3202 * needs to be disabled. A global MAC reset is issued to stop the
3203 * hardware, and all transmit and receive resources are freed.
3204 **/
3205static int ixgbevf_close(struct net_device *netdev)
3206{
3207 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3208
3209 ixgbevf_down(adapter);
3210 ixgbevf_free_irq(adapter);
3211
3212 ixgbevf_free_all_tx_resources(adapter);
3213 ixgbevf_free_all_rx_resources(adapter);
3214
3215 return 0;
3216}
3217
220fe050
DS		 3218static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3219{
3220 struct net_device *dev = adapter->netdev;
3221
3222 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
3223 return;
3224
3225 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
3226
3227 /* if interface is down do nothing */
3228 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3229 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3230 return;
3231
3232 /* Hardware has to reinitialize queues and interrupts to
3233 * match packet buffer alignment. Unfortunately, the
3234 * hardware is not flexible enough to do this dynamically.
3235 */
3236 if (netif_running(dev))
3237 ixgbevf_close(dev);
3238
3239 ixgbevf_clear_interrupt_scheme(adapter);
3240 ixgbevf_init_interrupt_scheme(adapter);
3241
3242 if (netif_running(dev))
3243 ixgbevf_open(dev);
3244}
3245
70a10e25
AD		 3246static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3247 u32 vlan_macip_lens, u32 type_tucmd,
3248 u32 mss_l4len_idx)
92915f71
GR		 3249{
3250 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3251 u16 i = tx_ring->next_to_use;
92915f71 3252
70a10e25 3253 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3254
70a10e25
AD		 3255 i++;
3256 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3257
70a10e25
AD		 3258 /* set bits to identify this as an advanced context descriptor */
3259 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3260
70a10e25
AD		 3261 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3262 context_desc->seqnum_seed = 0;
3263 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3264 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3265}
3266
3267static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET		 3268 struct ixgbevf_tx_buffer *first,
3269 u8 *hdr_len)
70a10e25 3270{
7ad1a093 3271 struct sk_buff *skb = first->skb;
70a10e25
AD		 3272 u32 vlan_macip_lens, type_tucmd;
3273 u32 mss_l4len_idx, l4len;
8f12c034 3274 int err;
70a10e25 3275
01a545cf
ET		 3276 if (skb->ip_summed != CHECKSUM_PARTIAL)
3277 return 0;
3278
70a10e25
AD		 3279 if (!skb_is_gso(skb))
3280 return 0;
92915f71 3281
8f12c034
FR		 3282 err = skb_cow_head(skb, 0);
3283 if (err < 0)
3284 return err;
92915f71 3285
70a10e25
AD		 3286 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3287 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3288
10e4fb33 3289 if (first->protocol == htons(ETH_P_IP)) {
70a10e25 3290 struct iphdr *iph = ip_hdr(skb);
dec0d8e4 3291
70a10e25
AD		 3292 iph->tot_len = 0;
3293 iph->check = 0;
3294 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3295 iph->daddr, 0,
3296 IPPROTO_TCP,
3297 0);
3298 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7ad1a093
ET		 3299 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3300 IXGBE_TX_FLAGS_CSUM |
3301 IXGBE_TX_FLAGS_IPV4;
70a10e25
AD		 3302 } else if (skb_is_gso_v6(skb)) {
3303 ipv6_hdr(skb)->payload_len = 0;
3304 tcp_hdr(skb)->check =
3305 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3306 &ipv6_hdr(skb)->daddr,
3307 0, IPPROTO_TCP, 0);
7ad1a093
ET		 3308 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3309 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3310 }
3311
3312 /* compute header lengths */
3313 l4len = tcp_hdrlen(skb);
3314 *hdr_len += l4len;
3315 *hdr_len = skb_transport_offset(skb) + l4len;
3316
dec0d8e4 3317 /* update GSO size and bytecount with header size */
7ad1a093
ET		 3318 first->gso_segs = skb_shinfo(skb)->gso_segs;
3319 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3320
70a10e25
AD		 3321 /* mss_l4len_id: use 1 as index for TSO */
3322 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
3323 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3324 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
3325
3326 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3327 vlan_macip_lens = skb_network_header_len(skb);
3328 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3329 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3330
3331 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3332 type_tucmd, mss_l4len_idx);
3333
3334 return 1;
92915f71
GR		 3335}
3336
7ad1a093
ET		 3337static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3338 struct ixgbevf_tx_buffer *first)
92915f71 3339{
7ad1a093 3340 struct sk_buff *skb = first->skb;
70a10e25
AD		 3341 u32 vlan_macip_lens = 0;
3342 u32 mss_l4len_idx = 0;
3343 u32 type_tucmd = 0;
92915f71 3344
70a10e25
AD		 3345 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3346 u8 l4_hdr = 0;
dec0d8e4 3347
10e4fb33 3348 switch (first->protocol) {
0933ce4a 3349 case htons(ETH_P_IP):
70a10e25
AD		 3350 vlan_macip_lens |= skb_network_header_len(skb);
3351 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3352 l4_hdr = ip_hdr(skb)->protocol;
3353 break;
0933ce4a 3354 case htons(ETH_P_IPV6):
70a10e25
AD		 3355 vlan_macip_lens |= skb_network_header_len(skb);
3356 l4_hdr = ipv6_hdr(skb)->nexthdr;
3357 break;
3358 default:
3359 if (unlikely(net_ratelimit())) {
3360 dev_warn(tx_ring->dev,
dec0d8e4
JK		 3361 "partial checksum but proto=%x!\n",
3362 first->protocol);
70a10e25
AD		 3363 }
3364 break;
3365 }
92915f71 3366
70a10e25
AD		 3367 switch (l4_hdr) {
3368 case IPPROTO_TCP:
3369 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3370 mss_l4len_idx = tcp_hdrlen(skb) <<
3371 IXGBE_ADVTXD_L4LEN_SHIFT;
3372 break;
3373 case IPPROTO_SCTP:
3374 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3375 mss_l4len_idx = sizeof(struct sctphdr) <<
3376 IXGBE_ADVTXD_L4LEN_SHIFT;
3377 break;
3378 case IPPROTO_UDP:
3379 mss_l4len_idx = sizeof(struct udphdr) <<
3380 IXGBE_ADVTXD_L4LEN_SHIFT;
3381 break;
3382 default:
3383 if (unlikely(net_ratelimit())) {
3384 dev_warn(tx_ring->dev,
dec0d8e4
JK		 3385 "partial checksum but l4 proto=%x!\n",
3386 l4_hdr);
70a10e25
AD		 3387 }
3388 break;
3389 }
7ad1a093
ET		 3390
3391 /* update TX checksum flag */
3392 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
92915f71
GR		 3393 }
3394
70a10e25
AD		 3395 /* vlan_macip_lens: MACLEN, VLAN tag */
3396 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3397 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3398
3399 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3400 type_tucmd, mss_l4len_idx);
92915f71
GR		 3401}
3402
29d37fa1 3403static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3404{
29d37fa1
ET		 3405 /* set type for advanced descriptor with frame checksum insertion */
3406 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3407 IXGBE_ADVTXD_DCMD_IFCS |
3408 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3409
dec0d8e4 3410 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3411 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3412 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3413
29d37fa1
ET		 3414 /* set segmentation enable bits for TSO/FSO */
3415 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3416 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3417
29d37fa1
ET		 3418 return cmd_type;
3419}
92915f71 3420
29d37fa1
ET		 3421static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3422 u32 tx_flags, unsigned int paylen)
3423{
3424 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3425
29d37fa1
ET		 3426 /* enable L4 checksum for TSO and TX checksum offload */
3427 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3428 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3429
29d37fa1
ET		 3430 /* enble IPv4 checksum for TSO */
3431 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3432 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3433
29d37fa1
ET		 3434 /* use index 1 context for TSO/FSO/FCOE */
3435 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3436 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3437
29d37fa1
ET		 3438 /* Check Context must be set if Tx switch is enabled, which it
3439 * always is for case where virtual functions are running
3440 */
3441 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3442
29d37fa1
ET		 3443 tx_desc->read.olinfo_status = olinfo_status;
3444}
92915f71 3445
29d37fa1
ET		 3446static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3447 struct ixgbevf_tx_buffer *first,
3448 const u8 hdr_len)
3449{
3450 dma_addr_t dma;
3451 struct sk_buff *skb = first->skb;
3452 struct ixgbevf_tx_buffer *tx_buffer;
3453 union ixgbe_adv_tx_desc *tx_desc;
3454 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3455 unsigned int data_len = skb->data_len;
3456 unsigned int size = skb_headlen(skb);
3457 unsigned int paylen = skb->len - hdr_len;
3458 u32 tx_flags = first->tx_flags;
3459 __le32 cmd_type;
3460 u16 i = tx_ring->next_to_use;
9bdfefd2 3461
29d37fa1 3462 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3463
29d37fa1
ET		 3464 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3465 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3466
29d37fa1
ET		 3467 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3468 if (dma_mapping_error(tx_ring->dev, dma))
3469 goto dma_error;
92915f71 3470
29d37fa1
ET		 3471 /* record length, and DMA address */
3472 dma_unmap_len_set(first, len, size);
3473 dma_unmap_addr_set(first, dma, dma);
92915f71 3474
29d37fa1 3475 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3476
29d37fa1
ET		 3477 for (;;) {
3478 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3479 tx_desc->read.cmd_type_len =
3480 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3481
29d37fa1
ET		 3482 i++;
3483 tx_desc++;
3484 if (i == tx_ring->count) {
3485 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3486 i = 0;
3487 }
92915f71 3488
29d37fa1
ET		 3489 dma += IXGBE_MAX_DATA_PER_TXD;
3490 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3491
29d37fa1
ET		 3492 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3493 tx_desc->read.olinfo_status = 0;
3494 }
92915f71 3495
29d37fa1
ET		 3496 if (likely(!data_len))
3497 break;
92915f71 3498
29d37fa1 3499 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3500
29d37fa1
ET		 3501 i++;
3502 tx_desc++;
3503 if (i == tx_ring->count) {
3504 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3505 i = 0;
3506 }
92915f71 3507
29d37fa1
ET		 3508 size = skb_frag_size(frag);
3509 data_len -= size;
92915f71 3510
29d37fa1
ET		 3511 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3512 DMA_TO_DEVICE);
3513 if (dma_mapping_error(tx_ring->dev, dma))
3514 goto dma_error;
70a10e25 3515
29d37fa1
ET		 3516 tx_buffer = &tx_ring->tx_buffer_info[i];
3517 dma_unmap_len_set(tx_buffer, len, size);
3518 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3519
29d37fa1
ET		 3520 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3521 tx_desc->read.olinfo_status = 0;
3522
3523 frag++;
70a10e25 3524 }
92915f71 3525
29d37fa1
ET		 3526 /* write last descriptor with RS and EOP bits */
3527 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3528 tx_desc->read.cmd_type_len = cmd_type;
3529
3530 /* set the timestamp */
3531 first->time_stamp = jiffies;
3532
3533 /* Force memory writes to complete before letting h/w know there
3534 * are new descriptors to fetch. (Only applicable for weak-ordered
3535 * memory model archs, such as IA-64).
3536 *
3537 * We also need this memory barrier (wmb) to make certain all of the
3538 * status bits have been updated before next_to_watch is written.
70a10e25 3539 */
29d37fa1 3540 wmb();
92915f71 3541
29d37fa1
ET		 3542 /* set next_to_watch value indicating a packet is present */
3543 first->next_to_watch = tx_desc;
92915f71 3544
29d37fa1
ET		 3545 i++;
3546 if (i == tx_ring->count)
3547 i = 0;
9bdfefd2 3548
29d37fa1 3549 tx_ring->next_to_use = i;
92915f71 3550
29d37fa1 3551 /* notify HW of packet */
06380db6 3552 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 3553
3554 return;
3555dma_error:
3556 dev_err(tx_ring->dev, "TX DMA map failed\n");
3557
3558 /* clear dma mappings for failed tx_buffer_info map */
3559 for (;;) {
3560 tx_buffer = &tx_ring->tx_buffer_info[i];
3561 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3562 if (tx_buffer == first)
3563 break;
3564 if (i == 0)
3565 i = tx_ring->count;
3566 i--;
3567 }
92915f71 3568
92915f71 3569 tx_ring->next_to_use = i;
92915f71
GR		 3570}
3571
fb40195c 3572static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3573{
fb40195c 3574 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 3575 /* Herbert's original patch had:
3576 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 3577 * but since that doesn't exist yet, just open code it.
3578 */
92915f71
GR		 3579 smp_mb();
3580
3581 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 3582 * made room available.
3583 */
f880d07b 3584 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 3585 return -EBUSY;
3586
3587 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3588 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 3589 ++tx_ring->tx_stats.restart_queue;
3590
92915f71
GR		 3591 return 0;
3592}
3593
fb40195c 3594static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3595{
f880d07b 3596 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3597 return 0;
fb40195c 3598 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 3599}
3600
3601static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3602{
3603 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3604 struct ixgbevf_tx_buffer *first;
92915f71 3605 struct ixgbevf_ring *tx_ring;
7ad1a093
ET		 3606 int tso;
3607 u32 tx_flags = 0;
3595990a
AD		 3608 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3609#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3610 unsigned short f;
3611#endif
7ad1a093 3612 u8 hdr_len = 0;
f9d08f16 3613 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3614
46acc460 3615 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 3616 dev_kfree_skb_any(skb);
f9d08f16
GR		 3617 return NETDEV_TX_OK;
3618 }
92915f71 3619
7ad1a093 3620 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3621
dec0d8e4 3622 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 3623 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3624 * + 2 desc gap to keep tail from touching head,
3625 * + 1 desc for context descriptor,
3626 * otherwise try next time
3627 */
3628#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3629 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3630 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3631#else
3632 count += skb_shinfo(skb)->nr_frags;
3633#endif
fb40195c 3634 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3635 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 3636 return NETDEV_TX_BUSY;
3637 }
3638
7ad1a093
ET		 3639 /* record the location of the first descriptor for this packet */
3640 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3641 first->skb = skb;
3642 first->bytecount = skb->len;
3643 first->gso_segs = 1;
3644
df8a39de
JP		 3645 if (skb_vlan_tag_present(skb)) {
3646 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 3647 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3648 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3649 }
3650
7ad1a093
ET		 3651 /* record initial flags and protocol */
3652 first->tx_flags = tx_flags;
3653 first->protocol = vlan_get_protocol(skb);
92915f71 3654
7ad1a093
ET		 3655 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3656 if (tso < 0)
3657 goto out_drop;
b5d217f3 3658 else if (!tso)
7ad1a093 3659 ixgbevf_tx_csum(tx_ring, first);
92915f71 3660
29d37fa1 3661 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3662
fb40195c 3663 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3664
7ad1a093
ET		 3665 return NETDEV_TX_OK;
3666
3667out_drop:
3668 dev_kfree_skb_any(first->skb);
3669 first->skb = NULL;
3670
92915f71
GR		 3671 return NETDEV_TX_OK;
3672}
3673
92915f71
GR		 3674/**
3675 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3676 * @netdev: network interface device structure
3677 * @p: pointer to an address structure
3678 *
3679 * Returns 0 on success, negative on failure
3680 **/
3681static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3682{
3683 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3684 struct ixgbe_hw *hw = &adapter->hw;
3685 struct sockaddr *addr = p;
3686
3687 if (!is_valid_ether_addr(addr->sa_data))
3688 return -EADDRNOTAVAIL;
3689
91a76baa
ET		 3690 ether_addr_copy(netdev->dev_addr, addr->sa_data);
3691 ether_addr_copy(hw->mac.addr, addr->sa_data);
92915f71 3692
55fdd45b 3693 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3694
92fe0bf7 3695 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
92915f71 3696
55fdd45b 3697 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3698
92915f71
GR		 3699 return 0;
3700}
3701
3702/**
3703 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3704 * @netdev: network interface device structure
3705 * @new_mtu: new value for maximum frame size
3706 *
3707 * Returns 0 on success, negative on failure
3708 **/
3709static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3710{
3711 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3712 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3713 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3714 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3715
56e94095
AD		 3716 switch (adapter->hw.api_version) {
3717 case ixgbe_mbox_api_11:
94cf66f8 3718 case ixgbe_mbox_api_12:
69bfbec4 3719 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD		 3720 break;
3721 default:
47068b0d 3722 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
56e94095
AD		 3723 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3724 break;
3725 }
92915f71
GR		 3726
3727 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3728 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3729 return -EINVAL;
3730
bad17234 3731 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71
GR		 3732 netdev->mtu, new_mtu);
3733 /* must set new MTU before calling down or up */
3734 netdev->mtu = new_mtu;
3735
bad17234
ET		 3736 /* notify the PF of our intent to use this size of frame */
3737 ixgbevf_rlpml_set_vf(hw, max_frame);
92915f71
GR		 3738
3739 return 0;
3740}
3741
688ff32d
ET		 3742#ifdef CONFIG_NET_POLL_CONTROLLER
3743/* Polling 'interrupt' - used by things like netconsole to send skbs
3744 * without having to re-enable interrupts. It's not called while
3745 * the interrupt routine is executing.
3746 */
3747static void ixgbevf_netpoll(struct net_device *netdev)
3748{
3749 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3750 int i;
3751
3752 /* if interface is down do nothing */
3753 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3754 return;
3755 for (i = 0; i < adapter->num_rx_queues; i++)
3756 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3757}
3758#endif /* CONFIG_NET_POLL_CONTROLLER */
3759
0ac1e8ce 3760static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3761{
3762 struct net_device *netdev = pci_get_drvdata(pdev);
3763 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3764#ifdef CONFIG_PM
3765 int retval = 0;
3766#endif
92915f71
GR		 3767
3768 netif_device_detach(netdev);
3769
3770 if (netif_running(netdev)) {
0ac1e8ce 3771 rtnl_lock();
92915f71
GR		 3772 ixgbevf_down(adapter);
3773 ixgbevf_free_irq(adapter);
3774 ixgbevf_free_all_tx_resources(adapter);
3775 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3776 rtnl_unlock();
92915f71
GR		 3777 }
3778
0ac1e8ce 3779 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3780
0ac1e8ce
AD		 3781#ifdef CONFIG_PM
3782 retval = pci_save_state(pdev);
3783 if (retval)
3784 return retval;
92915f71 3785
0ac1e8ce 3786#endif
bc0c7151
MR		 3787 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3788 pci_disable_device(pdev);
0ac1e8ce
AD		 3789
3790 return 0;
3791}
3792
3793#ifdef CONFIG_PM
3794static int ixgbevf_resume(struct pci_dev *pdev)
3795{
27ae2967
WY		 3796 struct net_device *netdev = pci_get_drvdata(pdev);
3797 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3798 u32 err;
3799
0ac1e8ce 3800 pci_restore_state(pdev);
dec0d8e4 3801 /* pci_restore_state clears dev->state_saved so call
0ac1e8ce
AD		 3802 * pci_save_state to restore it.
3803 */
3804 pci_save_state(pdev);
3805
3806 err = pci_enable_device_mem(pdev);
3807 if (err) {
3808 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3809 return err;
3810 }
4e857c58 3811 smp_mb__before_atomic();
bc0c7151 3812 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 3813 pci_set_master(pdev);
3814
798e381a
DS		 3815 ixgbevf_reset(adapter);
3816
0ac1e8ce
AD		 3817 rtnl_lock();
3818 err = ixgbevf_init_interrupt_scheme(adapter);
3819 rtnl_unlock();
3820 if (err) {
3821 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3822 return err;
3823 }
3824
0ac1e8ce
AD		 3825 if (netif_running(netdev)) {
3826 err = ixgbevf_open(netdev);
3827 if (err)
3828 return err;
3829 }
3830
3831 netif_device_attach(netdev);
3832
3833 return err;
3834}
3835
3836#endif /* CONFIG_PM */
3837static void ixgbevf_shutdown(struct pci_dev *pdev)
3838{
3839 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3840}
3841
4197aa7b
ED		 3842static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3843 struct rtnl_link_stats64 *stats)
3844{
3845 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3846 unsigned int start;
3847 u64 bytes, packets;
3848 const struct ixgbevf_ring *ring;
3849 int i;
3850
3851 ixgbevf_update_stats(adapter);
3852
3853 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3854
3855 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3856 ring = adapter->rx_ring[i];
4197aa7b 3857 do {
57a7744e 3858 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3859 bytes = ring->stats.bytes;
3860 packets = ring->stats.packets;
57a7744e 3861 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3862 stats->rx_bytes += bytes;
3863 stats->rx_packets += packets;
3864 }
3865
3866 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3867 ring = adapter->tx_ring[i];
4197aa7b 3868 do {
57a7744e 3869 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3870 bytes = ring->stats.bytes;
3871 packets = ring->stats.packets;
57a7744e 3872 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3873 stats->tx_bytes += bytes;
3874 stats->tx_packets += packets;
3875 }
3876
3877 return stats;
3878}
3879
0ac1e8ce 3880static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3881 .ndo_open = ixgbevf_open,
3882 .ndo_stop = ixgbevf_close,
3883 .ndo_start_xmit = ixgbevf_xmit_frame,
3884 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3885 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3886 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3887 .ndo_set_mac_address = ixgbevf_set_mac,
3888 .ndo_change_mtu = ixgbevf_change_mtu,
3889 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3890 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3891 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
c777cdfa
JK		 3892#ifdef CONFIG_NET_RX_BUSY_POLL
3893 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3894#endif
688ff32d
ET		 3895#ifdef CONFIG_NET_POLL_CONTROLLER
3896 .ndo_poll_controller = ixgbevf_netpoll,
3897#endif
0f90300f 3898 .ndo_features_check = passthru_features_check,
92915f71 3899};
92915f71
GR		 3900
3901static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3902{
0ac1e8ce 3903 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3904 ixgbevf_set_ethtool_ops(dev);
3905 dev->watchdog_timeo = 5 * HZ;
3906}
3907
3908/**
3909 * ixgbevf_probe - Device Initialization Routine
3910 * @pdev: PCI device information struct
3911 * @ent: entry in ixgbevf_pci_tbl
3912 *
3913 * Returns 0 on success, negative on failure
3914 *
3915 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3916 * The OS initialization, configuring of the adapter private structure,
3917 * and a hardware reset occur.
3918 **/
1dd06ae8 3919static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 3920{
3921 struct net_device *netdev;
3922 struct ixgbevf_adapter *adapter = NULL;
3923 struct ixgbe_hw *hw = NULL;
3924 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 3925 int err, pci_using_dac;
0333464f 3926 bool disable_dev = false;
92915f71
GR		 3927
3928 err = pci_enable_device(pdev);
3929 if (err)
3930 return err;
3931
53567aa4 3932 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3933 pci_using_dac = 1;
3934 } else {
53567aa4 3935 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3936 if (err) {
dec0d8e4 3937 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
53567aa4 3938 goto err_dma;
92915f71
GR		 3939 }
3940 pci_using_dac = 0;
3941 }
3942
3943 err = pci_request_regions(pdev, ixgbevf_driver_name);
3944 if (err) {
3945 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3946 goto err_pci_reg;
3947 }
3948
3949 pci_set_master(pdev);
3950
92915f71
GR		 3951 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3952 MAX_TX_QUEUES);
92915f71
GR		 3953 if (!netdev) {
3954 err = -ENOMEM;
3955 goto err_alloc_etherdev;
3956 }
3957
3958 SET_NETDEV_DEV(netdev, &pdev->dev);
3959
92915f71
GR		 3960 adapter = netdev_priv(netdev);
3961
3962 adapter->netdev = netdev;
3963 adapter->pdev = pdev;
3964 hw = &adapter->hw;
3965 hw->back = adapter;
b3f4d599 3966 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 3967
dec0d8e4 3968 /* call save state here in standalone driver because it relies on
92915f71
GR		 3969 * adapter struct to exist, and needs to call netdev_priv
3970 */
3971 pci_save_state(pdev);
3972
3973 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3974 pci_resource_len(pdev, 0));
dbf8b0d8 3975 adapter->io_addr = hw->hw_addr;
92915f71
GR		 3976 if (!hw->hw_addr) {
3977 err = -EIO;
3978 goto err_ioremap;
3979 }
3980
3981 ixgbevf_assign_netdev_ops(netdev);
3982
dec0d8e4 3983 /* Setup HW API */
92915f71
GR		 3984 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3985 hw->mac.type = ii->mac;
3986
3987 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 3988 sizeof(struct ixgbe_mbx_operations));
92915f71 3989
92915f71
GR		 3990 /* setup the private structure */
3991 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 3992 if (err)
3993 goto err_sw_init;
3994
3995 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 3996 if (!is_valid_ether_addr(netdev->dev_addr)) {
3997 pr_err("invalid MAC address\n");
3998 err = -EIO;
3999 goto err_sw_init;
4000 }
92915f71 4001
471a76de 4002 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 4003 NETIF_F_IP_CSUM |
4004 NETIF_F_IPV6_CSUM |
4005 NETIF_F_TSO |
4006 NETIF_F_TSO6 |
4007 NETIF_F_RXCSUM;
471a76de
MM		 4008
4009 netdev->features = netdev->hw_features |
f646968f
PM		 4010 NETIF_F_HW_VLAN_CTAG_TX |
4011 NETIF_F_HW_VLAN_CTAG_RX |
4012 NETIF_F_HW_VLAN_CTAG_FILTER;
92915f71 4013
39f35a37
ET		 4014 netdev->vlan_features |= NETIF_F_TSO |
4015 NETIF_F_TSO6 |
4016 NETIF_F_IP_CSUM |
4017 NETIF_F_IPV6_CSUM |
4018 NETIF_F_SG;
92915f71
GR		 4019
4020 if (pci_using_dac)
4021 netdev->features |= NETIF_F_HIGHDMA;
4022
01789349
JP		 4023 netdev->priv_flags |= IFF_UNICAST_FLT;
4024
ea699569
MR		 4025 if (IXGBE_REMOVED(hw->hw_addr)) {
4026 err = -EIO;
4027 goto err_sw_init;
4028 }
9ac5c5cc
ET		 4029
4030 setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
4031 (unsigned long)adapter);
4032
4033 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4034 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4035 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4036
4037 err = ixgbevf_init_interrupt_scheme(adapter);
4038 if (err)
4039 goto err_sw_init;
4040
92915f71
GR		 4041 strcpy(netdev->name, "eth%d");
4042
4043 err = register_netdev(netdev);
4044 if (err)
4045 goto err_register;
4046
0333464f 4047 pci_set_drvdata(pdev, netdev);
5d426ad1
GR		 4048 netif_carrier_off(netdev);
4049
33bd9f60
GR		 4050 ixgbevf_init_last_counter_stats(adapter);
4051
47068b0d
ET		 4052 /* print the VF info */
4053 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4054 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4055
47068b0d
ET		 4056 switch (hw->mac.type) {
4057 case ixgbe_mac_X550_vf:
4058 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4059 break;
4060 case ixgbe_mac_X540_vf:
4061 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4062 break;
4063 case ixgbe_mac_82599_vf:
4064 default:
4065 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4066 break;
4067 }
92915f71 4068
92915f71
GR		 4069 return 0;
4070
4071err_register:
0ac1e8ce 4072 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4073err_sw_init:
4074 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4075 iounmap(adapter->io_addr);
92915f71 4076err_ioremap:
0333464f 4077 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4078 free_netdev(netdev);
4079err_alloc_etherdev:
4080 pci_release_regions(pdev);
4081err_pci_reg:
4082err_dma:
0333464f 4083 if (!adapter || disable_dev)
bc0c7151 4084 pci_disable_device(pdev);
92915f71
GR		 4085 return err;
4086}
4087
4088/**
4089 * ixgbevf_remove - Device Removal Routine
4090 * @pdev: PCI device information struct
4091 *
4092 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4093 * that it should release a PCI device. The could be caused by a
4094 * Hot-Plug event, or because the driver is going to be removed from
4095 * memory.
4096 **/
9f9a12f8 4097static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4098{
4099 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4100 struct ixgbevf_adapter *adapter;
4101 bool disable_dev;
4102
4103 if (!netdev)
4104 return;
4105
4106 adapter = netdev_priv(netdev);
92915f71 4107
2e7cfbdd 4108 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4109 cancel_work_sync(&adapter->service_task);
92915f71 4110
fd13a9ab 4111 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4112 unregister_netdev(netdev);
92915f71 4113
0ac1e8ce 4114 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4115 ixgbevf_reset_interrupt_capability(adapter);
4116
dbf8b0d8 4117 iounmap(adapter->io_addr);
92915f71
GR		 4118 pci_release_regions(pdev);
4119
4120 hw_dbg(&adapter->hw, "Remove complete\n");
4121
0333464f 4122 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4123 free_netdev(netdev);
4124
0333464f 4125 if (disable_dev)
bc0c7151 4126 pci_disable_device(pdev);
92915f71
GR		 4127}
4128
9f19f31d
AD		 4129/**
4130 * ixgbevf_io_error_detected - called when PCI error is detected
4131 * @pdev: Pointer to PCI device
4132 * @state: The current pci connection state
4133 *
4134 * This function is called after a PCI bus error affecting
4135 * this device has been detected.
dec0d8e4 4136 **/
9f19f31d
AD		 4137static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4138 pci_channel_state_t state)
4139{
4140 struct net_device *netdev = pci_get_drvdata(pdev);
4141 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4142
9ac5c5cc 4143 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4144 return PCI_ERS_RESULT_DISCONNECT;
4145
bc0c7151 4146 rtnl_lock();
9f19f31d
AD		 4147 netif_device_detach(netdev);
4148
bc0c7151
MR		 4149 if (state == pci_channel_io_perm_failure) {
4150 rtnl_unlock();
9f19f31d 4151 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4152 }
9f19f31d
AD		 4153
4154 if (netif_running(netdev))
4155 ixgbevf_down(adapter);
4156
bc0c7151
MR		 4157 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4158 pci_disable_device(pdev);
4159 rtnl_unlock();
9f19f31d
AD		 4160
4161 /* Request a slot slot reset. */
4162 return PCI_ERS_RESULT_NEED_RESET;
4163}
4164
4165/**
4166 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4167 * @pdev: Pointer to PCI device
4168 *
4169 * Restart the card from scratch, as if from a cold-boot. Implementation
4170 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4171 **/
9f19f31d
AD		 4172static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4173{
4174 struct net_device *netdev = pci_get_drvdata(pdev);
4175 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4176
4177 if (pci_enable_device_mem(pdev)) {
4178 dev_err(&pdev->dev,
4179 "Cannot re-enable PCI device after reset.\n");
4180 return PCI_ERS_RESULT_DISCONNECT;
4181 }
4182
4e857c58 4183 smp_mb__before_atomic();
bc0c7151 4184 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4185 pci_set_master(pdev);
4186
4187 ixgbevf_reset(adapter);
4188
4189 return PCI_ERS_RESULT_RECOVERED;
4190}
4191
4192/**
4193 * ixgbevf_io_resume - called when traffic can start flowing again.
4194 * @pdev: Pointer to PCI device
4195 *
4196 * This callback is called when the error recovery driver tells us that
4197 * its OK to resume normal operation. Implementation resembles the
4198 * second-half of the ixgbevf_resume routine.
dec0d8e4 4199 **/
9f19f31d
AD		 4200static void ixgbevf_io_resume(struct pci_dev *pdev)
4201{
4202 struct net_device *netdev = pci_get_drvdata(pdev);
4203 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4204
4205 if (netif_running(netdev))
4206 ixgbevf_up(adapter);
4207
4208 netif_device_attach(netdev);
4209}
4210
4211/* PCI Error Recovery (ERS) */
3646f0e5 4212static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4213 .error_detected = ixgbevf_io_error_detected,
4214 .slot_reset = ixgbevf_io_slot_reset,
4215 .resume = ixgbevf_io_resume,
4216};
4217
92915f71 4218static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4219 .name = ixgbevf_driver_name,
4220 .id_table = ixgbevf_pci_tbl,
4221 .probe = ixgbevf_probe,
4222 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4223#ifdef CONFIG_PM
4224 /* Power Management Hooks */
dec0d8e4
JK		 4225 .suspend = ixgbevf_suspend,
4226 .resume = ixgbevf_resume,
0ac1e8ce 4227#endif
dec0d8e4
JK		 4228 .shutdown = ixgbevf_shutdown,
4229 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4230};
4231
4232/**
65d676c8 4233 * ixgbevf_init_module - Driver Registration Routine
92915f71 4234 *
65d676c8 4235 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4236 * loaded. All it does is register with the PCI subsystem.
4237 **/
4238static int __init ixgbevf_init_module(void)
4239{
dbd9636e
JK		 4240 pr_info("%s - version %s\n", ixgbevf_driver_string,
4241 ixgbevf_driver_version);
92915f71 4242
dbd9636e 4243 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4244 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4245 if (!ixgbevf_wq) {
4246 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4247 return -ENOMEM;
4248 }
92915f71 4249
50985b5f 4250 return pci_register_driver(&ixgbevf_driver);
92915f71
GR		 4251}
4252
4253module_init(ixgbevf_init_module);
4254
4255/**
65d676c8 4256 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4257 *
65d676c8 4258 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4259 * from memory.
4260 **/
4261static void __exit ixgbevf_exit_module(void)
4262{
4263 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4264 if (ixgbevf_wq) {
4265 destroy_workqueue(ixgbevf_wq);
4266 ixgbevf_wq = NULL;
4267 }
92915f71
GR		 4268}
4269
4270#ifdef DEBUG
4271/**
65d676c8 4272 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 4273 * used by hardware layer to print debugging information
4274 **/
4275char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4276{
4277 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4278
92915f71
GR		 4279 return adapter->netdev->name;
4280}
4281
4282#endif
4283module_exit(ixgbevf_exit_module);
4284
4285/* ixgbevf_main.c */
Linux kernel - Deliverables
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