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3047f90b GR |
1 | /******************************************************************************* |
2 | ||
3 | Intel 82599 Virtual Function driver | |
dec0d8e4 | 4 | Copyright(c) 1999 - 2015 Intel Corporation. |
3047f90b GR |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
dec0d8e4 | 16 | this program; if not, see <http://www.gnu.org/licenses/>. |
3047f90b GR |
17 | |
18 | The full GNU General Public License is included in this distribution in | |
19 | the file called "COPYING". | |
20 | ||
21 | Contact Information: | |
22 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | ||
25 | *******************************************************************************/ | |
26 | ||
27 | #include "vf.h" | |
b5417bf8 | 28 | #include "ixgbevf.h" |
3047f90b | 29 | |
c6d45171 KS |
30 | /* On Hyper-V, to reset, we need to read from this offset |
31 | * from the PCI config space. This is the mechanism used on | |
32 | * Hyper-V to support PF/VF communication. | |
33 | */ | |
34 | #define IXGBE_HV_RESET_OFFSET 0x201 | |
35 | ||
6a11e52b TN |
36 | static inline s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, |
37 | u32 *retmsg, u16 size) | |
38 | { | |
39 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
40 | s32 retval = mbx->ops.write_posted(hw, msg, size); | |
41 | ||
42 | if (retval) | |
43 | return retval; | |
44 | ||
45 | return mbx->ops.read_posted(hw, retmsg, size); | |
46 | } | |
47 | ||
3047f90b GR |
48 | /** |
49 | * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx | |
50 | * @hw: pointer to hardware structure | |
51 | * | |
52 | * Starts the hardware by filling the bus info structure and media type, clears | |
53 | * all on chip counters, initializes receive address registers, multicast | |
54 | * table, VLAN filter table, calls routine to set up link and flow control | |
55 | * settings, and leaves transmit and receive units disabled and uninitialized | |
56 | **/ | |
57 | static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw) | |
58 | { | |
59 | /* Clear adapter stopped flag */ | |
60 | hw->adapter_stopped = false; | |
61 | ||
62 | return 0; | |
63 | } | |
64 | ||
65 | /** | |
66 | * ixgbevf_init_hw_vf - virtual function hardware initialization | |
67 | * @hw: pointer to hardware structure | |
68 | * | |
69 | * Initialize the hardware by resetting the hardware and then starting | |
70 | * the hardware | |
71 | **/ | |
72 | static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw) | |
73 | { | |
74 | s32 status = hw->mac.ops.start_hw(hw); | |
75 | ||
76 | hw->mac.ops.get_mac_addr(hw, hw->mac.addr); | |
77 | ||
78 | return status; | |
79 | } | |
80 | ||
81 | /** | |
82 | * ixgbevf_reset_hw_vf - Performs hardware reset | |
83 | * @hw: pointer to hardware structure | |
84 | * | |
dbedd44e | 85 | * Resets the hardware by resetting the transmit and receive units, masks and |
3047f90b GR |
86 | * clears all interrupts. |
87 | **/ | |
88 | static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw) | |
89 | { | |
90 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
91 | u32 timeout = IXGBE_VF_INIT_TIMEOUT; | |
92 | s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; | |
93 | u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; | |
94 | u8 *addr = (u8 *)(&msgbuf[1]); | |
95 | ||
96 | /* Call adapter stop to disable tx/rx and clear interrupts */ | |
97 | hw->mac.ops.stop_adapter(hw); | |
98 | ||
31186785 AD |
99 | /* reset the api version */ |
100 | hw->api_version = ixgbe_mbox_api_10; | |
101 | ||
3047f90b GR |
102 | IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); |
103 | IXGBE_WRITE_FLUSH(hw); | |
104 | ||
105 | /* we cannot reset while the RSTI / RSTD bits are asserted */ | |
106 | while (!mbx->ops.check_for_rst(hw) && timeout) { | |
107 | timeout--; | |
108 | udelay(5); | |
109 | } | |
110 | ||
111 | if (!timeout) | |
112 | return IXGBE_ERR_RESET_FAILED; | |
113 | ||
114 | /* mailbox timeout can now become active */ | |
115 | mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; | |
116 | ||
117 | msgbuf[0] = IXGBE_VF_RESET; | |
118 | mbx->ops.write_posted(hw, msgbuf, 1); | |
119 | ||
012dc19a | 120 | mdelay(10); |
3047f90b | 121 | |
dec0d8e4 JK |
122 | /* set our "perm_addr" based on info provided by PF |
123 | * also set up the mc_filter_type which is piggy backed | |
124 | * on the mac address in word 3 | |
125 | */ | |
3047f90b GR |
126 | ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN); |
127 | if (ret_val) | |
128 | return ret_val; | |
129 | ||
e1941a74 GR |
130 | /* New versions of the PF may NACK the reset return message |
131 | * to indicate that no MAC address has yet been assigned for | |
132 | * the VF. | |
133 | */ | |
134 | if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && | |
135 | msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) | |
3047f90b GR |
136 | return IXGBE_ERR_INVALID_MAC_ADDR; |
137 | ||
465fc643 ET |
138 | if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) |
139 | ether_addr_copy(hw->mac.perm_addr, addr); | |
140 | ||
3047f90b GR |
141 | hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; |
142 | ||
143 | return 0; | |
144 | } | |
145 | ||
c6d45171 KS |
146 | /** |
147 | * Hyper-V variant; the VF/PF communication is through the PCI | |
148 | * config space. | |
149 | */ | |
150 | static s32 ixgbevf_hv_reset_hw_vf(struct ixgbe_hw *hw) | |
151 | { | |
152 | #if IS_ENABLED(CONFIG_PCI_MMCONFIG) | |
153 | struct ixgbevf_adapter *adapter = hw->back; | |
154 | int i; | |
155 | ||
156 | for (i = 0; i < 6; i++) | |
157 | pci_read_config_byte(adapter->pdev, | |
158 | (i + IXGBE_HV_RESET_OFFSET), | |
159 | &hw->mac.perm_addr[i]); | |
160 | return 0; | |
161 | #else | |
162 | pr_err("PCI_MMCONFIG needs to be enabled for Hyper-V\n"); | |
163 | return -EOPNOTSUPP; | |
164 | #endif | |
165 | } | |
166 | ||
3047f90b GR |
167 | /** |
168 | * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units | |
169 | * @hw: pointer to hardware structure | |
170 | * | |
171 | * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, | |
172 | * disables transmit and receive units. The adapter_stopped flag is used by | |
173 | * the shared code and drivers to determine if the adapter is in a stopped | |
174 | * state and should not touch the hardware. | |
175 | **/ | |
176 | static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw) | |
177 | { | |
178 | u32 number_of_queues; | |
179 | u32 reg_val; | |
180 | u16 i; | |
181 | ||
dec0d8e4 | 182 | /* Set the adapter_stopped flag so other driver functions stop touching |
3047f90b GR |
183 | * the hardware |
184 | */ | |
185 | hw->adapter_stopped = true; | |
186 | ||
187 | /* Disable the receive unit by stopped each queue */ | |
188 | number_of_queues = hw->mac.max_rx_queues; | |
189 | for (i = 0; i < number_of_queues; i++) { | |
190 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); | |
191 | if (reg_val & IXGBE_RXDCTL_ENABLE) { | |
192 | reg_val &= ~IXGBE_RXDCTL_ENABLE; | |
193 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); | |
194 | } | |
195 | } | |
196 | ||
197 | IXGBE_WRITE_FLUSH(hw); | |
198 | ||
199 | /* Clear interrupt mask to stop from interrupts being generated */ | |
200 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); | |
201 | ||
202 | /* Clear any pending interrupts */ | |
203 | IXGBE_READ_REG(hw, IXGBE_VTEICR); | |
204 | ||
205 | /* Disable the transmit unit. Each queue must be disabled. */ | |
206 | number_of_queues = hw->mac.max_tx_queues; | |
207 | for (i = 0; i < number_of_queues; i++) { | |
208 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); | |
209 | if (reg_val & IXGBE_TXDCTL_ENABLE) { | |
210 | reg_val &= ~IXGBE_TXDCTL_ENABLE; | |
211 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); | |
212 | } | |
213 | } | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
218 | /** | |
219 | * ixgbevf_mta_vector - Determines bit-vector in multicast table to set | |
220 | * @hw: pointer to hardware structure | |
221 | * @mc_addr: the multicast address | |
222 | * | |
223 | * Extracts the 12 bits, from a multicast address, to determine which | |
224 | * bit-vector to set in the multicast table. The hardware uses 12 bits, from | |
dec0d8e4 | 225 | * incoming Rx multicast addresses, to determine the bit-vector to check in |
3047f90b GR |
226 | * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set |
227 | * by the MO field of the MCSTCTRL. The MO field is set during initialization | |
228 | * to mc_filter_type. | |
229 | **/ | |
230 | static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) | |
231 | { | |
232 | u32 vector = 0; | |
233 | ||
234 | switch (hw->mac.mc_filter_type) { | |
235 | case 0: /* use bits [47:36] of the address */ | |
236 | vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); | |
237 | break; | |
238 | case 1: /* use bits [46:35] of the address */ | |
239 | vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); | |
240 | break; | |
241 | case 2: /* use bits [45:34] of the address */ | |
242 | vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); | |
243 | break; | |
244 | case 3: /* use bits [43:32] of the address */ | |
245 | vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); | |
246 | break; | |
247 | default: /* Invalid mc_filter_type */ | |
248 | break; | |
249 | } | |
250 | ||
251 | /* vector can only be 12-bits or boundary will be exceeded */ | |
252 | vector &= 0xFFF; | |
253 | return vector; | |
254 | } | |
255 | ||
256 | /** | |
257 | * ixgbevf_get_mac_addr_vf - Read device MAC address | |
258 | * @hw: pointer to the HW structure | |
259 | * @mac_addr: pointer to storage for retrieved MAC address | |
260 | **/ | |
261 | static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) | |
262 | { | |
0d8bb414 | 263 | ether_addr_copy(mac_addr, hw->mac.perm_addr); |
3047f90b GR |
264 | |
265 | return 0; | |
266 | } | |
267 | ||
46ec20ff GR |
268 | static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) |
269 | { | |
fc355e07 | 270 | u32 msgbuf[3], msgbuf_chk; |
46ec20ff GR |
271 | u8 *msg_addr = (u8 *)(&msgbuf[1]); |
272 | s32 ret_val; | |
273 | ||
274 | memset(msgbuf, 0, sizeof(msgbuf)); | |
dec0d8e4 | 275 | /* If index is one then this is the start of a new list and needs |
46ec20ff GR |
276 | * indication to the PF so it can do it's own list management. |
277 | * If it is zero then that tells the PF to just clear all of | |
278 | * this VF's macvlans and there is no new list. | |
279 | */ | |
280 | msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; | |
281 | msgbuf[0] |= IXGBE_VF_SET_MACVLAN; | |
fc355e07 ET |
282 | msgbuf_chk = msgbuf[0]; |
283 | ||
46ec20ff | 284 | if (addr) |
0d8bb414 | 285 | ether_addr_copy(msg_addr, addr); |
46ec20ff | 286 | |
c6426971 ET |
287 | ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
288 | sizeof(msgbuf) / sizeof(u32)); | |
fc355e07 ET |
289 | if (!ret_val) { |
290 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
46ec20ff | 291 | |
fc355e07 ET |
292 | if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) |
293 | return -ENOMEM; | |
294 | } | |
46ec20ff GR |
295 | |
296 | return ret_val; | |
297 | } | |
298 | ||
c6d45171 KS |
299 | static s32 ixgbevf_hv_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) |
300 | { | |
301 | return -EOPNOTSUPP; | |
302 | } | |
303 | ||
94cf66f8 VZ |
304 | /** |
305 | * ixgbevf_get_reta_locked - get the RSS redirection table (RETA) contents. | |
306 | * @adapter: pointer to the port handle | |
307 | * @reta: buffer to fill with RETA contents. | |
308 | * @num_rx_queues: Number of Rx queues configured for this port | |
309 | * | |
310 | * The "reta" buffer should be big enough to contain 32 registers. | |
311 | * | |
312 | * Returns: 0 on success. | |
313 | * if API doesn't support this operation - (-EOPNOTSUPP). | |
314 | */ | |
315 | int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues) | |
316 | { | |
317 | int err, i, j; | |
318 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; | |
319 | u32 *hw_reta = &msgbuf[1]; | |
320 | u32 mask = 0; | |
321 | ||
322 | /* We have to use a mailbox for 82599 and x540 devices only. | |
323 | * For these devices RETA has 128 entries. | |
324 | * Also these VFs support up to 4 RSS queues. Therefore PF will compress | |
325 | * 16 RETA entries in each DWORD giving 2 bits to each entry. | |
326 | */ | |
327 | int dwords = IXGBEVF_82599_RETA_SIZE / 16; | |
328 | ||
329 | /* We support the RSS querying for 82599 and x540 devices only. | |
330 | * Thus return an error if API doesn't support RETA querying or querying | |
331 | * is not supported for this device type. | |
332 | */ | |
333 | if (hw->api_version != ixgbe_mbox_api_12 || | |
334 | hw->mac.type >= ixgbe_mac_X550_vf) | |
335 | return -EOPNOTSUPP; | |
336 | ||
337 | msgbuf[0] = IXGBE_VF_GET_RETA; | |
338 | ||
339 | err = hw->mbx.ops.write_posted(hw, msgbuf, 1); | |
340 | ||
341 | if (err) | |
342 | return err; | |
343 | ||
344 | err = hw->mbx.ops.read_posted(hw, msgbuf, dwords + 1); | |
345 | ||
346 | if (err) | |
347 | return err; | |
348 | ||
349 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
350 | ||
351 | /* If the operation has been refused by a PF return -EPERM */ | |
352 | if (msgbuf[0] == (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_NACK)) | |
353 | return -EPERM; | |
354 | ||
355 | /* If we didn't get an ACK there must have been | |
356 | * some sort of mailbox error so we should treat it | |
357 | * as such. | |
358 | */ | |
359 | if (msgbuf[0] != (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_ACK)) | |
360 | return IXGBE_ERR_MBX; | |
361 | ||
362 | /* ixgbevf doesn't support more than 2 queues at the moment */ | |
363 | if (num_rx_queues > 1) | |
364 | mask = 0x1; | |
365 | ||
366 | for (i = 0; i < dwords; i++) | |
367 | for (j = 0; j < 16; j++) | |
368 | reta[i * 16 + j] = (hw_reta[i] >> (2 * j)) & mask; | |
369 | ||
370 | return 0; | |
371 | } | |
372 | ||
ad1431e2 VZ |
373 | /** |
374 | * ixgbevf_get_rss_key_locked - get the RSS Random Key | |
375 | * @hw: pointer to the HW structure | |
376 | * @rss_key: buffer to fill with RSS Hash Key contents. | |
377 | * | |
378 | * The "rss_key" buffer should be big enough to contain 10 registers. | |
379 | * | |
380 | * Returns: 0 on success. | |
381 | * if API doesn't support this operation - (-EOPNOTSUPP). | |
382 | */ | |
383 | int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key) | |
384 | { | |
385 | int err; | |
386 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; | |
387 | ||
388 | /* We currently support the RSS Random Key retrieval for 82599 and x540 | |
389 | * devices only. | |
390 | * | |
391 | * Thus return an error if API doesn't support RSS Random Key retrieval | |
392 | * or if the operation is not supported for this device type. | |
393 | */ | |
394 | if (hw->api_version != ixgbe_mbox_api_12 || | |
395 | hw->mac.type >= ixgbe_mac_X550_vf) | |
396 | return -EOPNOTSUPP; | |
397 | ||
398 | msgbuf[0] = IXGBE_VF_GET_RSS_KEY; | |
399 | err = hw->mbx.ops.write_posted(hw, msgbuf, 1); | |
400 | ||
401 | if (err) | |
402 | return err; | |
403 | ||
404 | err = hw->mbx.ops.read_posted(hw, msgbuf, 11); | |
405 | ||
406 | if (err) | |
407 | return err; | |
408 | ||
409 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
410 | ||
411 | /* If the operation has been refused by a PF return -EPERM */ | |
412 | if (msgbuf[0] == (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_NACK)) | |
413 | return -EPERM; | |
414 | ||
415 | /* If we didn't get an ACK there must have been | |
416 | * some sort of mailbox error so we should treat it | |
417 | * as such. | |
418 | */ | |
419 | if (msgbuf[0] != (IXGBE_VF_GET_RSS_KEY | IXGBE_VT_MSGTYPE_ACK)) | |
420 | return IXGBE_ERR_MBX; | |
421 | ||
422 | memcpy(rss_key, msgbuf + 1, IXGBEVF_RSS_HASH_KEY_SIZE); | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
3047f90b GR |
427 | /** |
428 | * ixgbevf_set_rar_vf - set device MAC address | |
429 | * @hw: pointer to hardware structure | |
430 | * @index: Receive address register to write | |
431 | * @addr: Address to put into receive address register | |
432 | * @vmdq: Unused in this implementation | |
433 | **/ | |
434 | static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, | |
435 | u32 vmdq) | |
436 | { | |
3047f90b GR |
437 | u32 msgbuf[3]; |
438 | u8 *msg_addr = (u8 *)(&msgbuf[1]); | |
439 | s32 ret_val; | |
440 | ||
441 | memset(msgbuf, 0, sizeof(msgbuf)); | |
442 | msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; | |
0d8bb414 | 443 | ether_addr_copy(msg_addr, addr); |
3047f90b | 444 | |
c6426971 ET |
445 | ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
446 | sizeof(msgbuf) / sizeof(u32)); | |
3047f90b GR |
447 | |
448 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
449 | ||
450 | /* if nacked the address was rejected, use "perm_addr" */ | |
451 | if (!ret_val && | |
32ca6868 | 452 | (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { |
3047f90b | 453 | ixgbevf_get_mac_addr_vf(hw, hw->mac.addr); |
32ca6868 ET |
454 | return IXGBE_ERR_MBX; |
455 | } | |
3047f90b GR |
456 | |
457 | return ret_val; | |
458 | } | |
459 | ||
c6d45171 KS |
460 | /** |
461 | * ixgbevf_hv_set_rar_vf - set device MAC address Hyper-V variant | |
462 | * @hw: pointer to hardware structure | |
463 | * @index: Receive address register to write | |
464 | * @addr: Address to put into receive address register | |
465 | * @vmdq: Unused in this implementation | |
466 | * | |
467 | * We don't really allow setting the device MAC address. However, | |
468 | * if the address being set is the permanent MAC address we will | |
469 | * permit that. | |
470 | **/ | |
471 | static s32 ixgbevf_hv_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, | |
472 | u32 vmdq) | |
473 | { | |
474 | if (ether_addr_equal(addr, hw->mac.perm_addr)) | |
475 | return 0; | |
476 | ||
477 | return -EOPNOTSUPP; | |
478 | } | |
479 | ||
3047f90b GR |
480 | /** |
481 | * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses | |
482 | * @hw: pointer to the HW structure | |
5c58c47a | 483 | * @netdev: pointer to net device structure |
3047f90b GR |
484 | * |
485 | * Updates the Multicast Table Array. | |
486 | **/ | |
5c58c47a JP |
487 | static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw, |
488 | struct net_device *netdev) | |
3047f90b | 489 | { |
22bedad3 | 490 | struct netdev_hw_addr *ha; |
3047f90b GR |
491 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; |
492 | u16 *vector_list = (u16 *)&msgbuf[1]; | |
3047f90b | 493 | u32 cnt, i; |
3047f90b GR |
494 | |
495 | /* Each entry in the list uses 1 16 bit word. We have 30 | |
496 | * 16 bit words available in our HW msg buffer (minus 1 for the | |
497 | * msg type). That's 30 hash values if we pack 'em right. If | |
498 | * there are more than 30 MC addresses to add then punt the | |
499 | * extras for now and then add code to handle more than 30 later. | |
500 | * It would be unusual for a server to request that many multi-cast | |
501 | * addresses except for in large enterprise network environments. | |
502 | */ | |
503 | ||
5c58c47a JP |
504 | cnt = netdev_mc_count(netdev); |
505 | if (cnt > 30) | |
506 | cnt = 30; | |
3047f90b GR |
507 | msgbuf[0] = IXGBE_VF_SET_MULTICAST; |
508 | msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; | |
509 | ||
5c58c47a | 510 | i = 0; |
22bedad3 | 511 | netdev_for_each_mc_addr(ha, netdev) { |
5c58c47a JP |
512 | if (i == cnt) |
513 | break; | |
46acc460 | 514 | if (is_link_local_ether_addr(ha->addr)) |
b3343a2a JF |
515 | continue; |
516 | ||
22bedad3 | 517 | vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr); |
3047f90b GR |
518 | } |
519 | ||
6a11e52b | 520 | ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, IXGBE_VFMAILBOX_SIZE); |
3047f90b GR |
521 | |
522 | return 0; | |
523 | } | |
524 | ||
c6d45171 KS |
525 | /** |
526 | * Hyper-V variant - just a stub. | |
527 | */ | |
528 | static s32 ixgbevf_hv_update_mc_addr_list_vf(struct ixgbe_hw *hw, | |
529 | struct net_device *netdev) | |
530 | { | |
531 | return -EOPNOTSUPP; | |
532 | } | |
533 | ||
8443c1a4 HS |
534 | /** |
535 | * ixgbevf_update_xcast_mode - Update Multicast mode | |
536 | * @hw: pointer to the HW structure | |
8443c1a4 HS |
537 | * @xcast_mode: new multicast mode |
538 | * | |
539 | * Updates the Multicast Mode of VF. | |
540 | **/ | |
8b44a8a0 | 541 | static s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) |
8443c1a4 | 542 | { |
8443c1a4 HS |
543 | u32 msgbuf[2]; |
544 | s32 err; | |
545 | ||
546 | switch (hw->api_version) { | |
547 | case ixgbe_mbox_api_12: | |
548 | break; | |
549 | default: | |
550 | return -EOPNOTSUPP; | |
551 | } | |
552 | ||
553 | msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; | |
554 | msgbuf[1] = xcast_mode; | |
555 | ||
c6426971 ET |
556 | err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
557 | sizeof(msgbuf) / sizeof(u32)); | |
8443c1a4 HS |
558 | if (err) |
559 | return err; | |
560 | ||
561 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
562 | if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) | |
563 | return -EPERM; | |
564 | ||
565 | return 0; | |
566 | } | |
567 | ||
c6d45171 KS |
568 | /** |
569 | * Hyper-V variant - just a stub. | |
570 | */ | |
8b44a8a0 | 571 | static s32 ixgbevf_hv_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) |
c6d45171 KS |
572 | { |
573 | return -EOPNOTSUPP; | |
574 | } | |
575 | ||
3047f90b | 576 | /** |
dec0d8e4 | 577 | * ixgbevf_set_vfta_vf - Set/Unset VLAN filter table address |
3047f90b GR |
578 | * @hw: pointer to the HW structure |
579 | * @vlan: 12 bit VLAN ID | |
580 | * @vind: unused by VF drivers | |
581 | * @vlan_on: if true then set bit, else clear bit | |
582 | **/ | |
583 | static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, | |
584 | bool vlan_on) | |
585 | { | |
3047f90b | 586 | u32 msgbuf[2]; |
2ddc7fe1 | 587 | s32 err; |
3047f90b GR |
588 | |
589 | msgbuf[0] = IXGBE_VF_SET_VLAN; | |
590 | msgbuf[1] = vlan; | |
591 | /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ | |
592 | msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; | |
593 | ||
c6426971 ET |
594 | err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
595 | sizeof(msgbuf) / sizeof(u32)); | |
2ddc7fe1 AD |
596 | if (err) |
597 | goto mbx_err; | |
598 | ||
599 | /* remove extra bits from the message */ | |
600 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
601 | msgbuf[0] &= ~(0xFF << IXGBE_VT_MSGINFO_SHIFT); | |
602 | ||
603 | if (msgbuf[0] != (IXGBE_VF_SET_VLAN | IXGBE_VT_MSGTYPE_ACK)) | |
604 | err = IXGBE_ERR_INVALID_ARGUMENT; | |
605 | ||
606 | mbx_err: | |
607 | return err; | |
3047f90b GR |
608 | } |
609 | ||
c6d45171 KS |
610 | /** |
611 | * Hyper-V variant - just a stub. | |
612 | */ | |
613 | static s32 ixgbevf_hv_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, | |
614 | bool vlan_on) | |
615 | { | |
616 | return -EOPNOTSUPP; | |
617 | } | |
618 | ||
3047f90b GR |
619 | /** |
620 | * ixgbevf_setup_mac_link_vf - Setup MAC link settings | |
621 | * @hw: pointer to hardware structure | |
622 | * @speed: Unused in this implementation | |
623 | * @autoneg: Unused in this implementation | |
624 | * @autoneg_wait_to_complete: Unused in this implementation | |
625 | * | |
626 | * Do nothing and return success. VF drivers are not allowed to change | |
627 | * global settings. Maintained for driver compatibility. | |
628 | **/ | |
629 | static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw, | |
630 | ixgbe_link_speed speed, bool autoneg, | |
631 | bool autoneg_wait_to_complete) | |
632 | { | |
633 | return 0; | |
634 | } | |
635 | ||
636 | /** | |
637 | * ixgbevf_check_mac_link_vf - Get link/speed status | |
638 | * @hw: pointer to hardware structure | |
639 | * @speed: pointer to link speed | |
640 | * @link_up: true is link is up, false otherwise | |
641 | * @autoneg_wait_to_complete: true when waiting for completion is needed | |
642 | * | |
643 | * Reads the links register to determine if link is up and the current speed | |
644 | **/ | |
645 | static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw, | |
646 | ixgbe_link_speed *speed, | |
647 | bool *link_up, | |
648 | bool autoneg_wait_to_complete) | |
649 | { | |
4b2cd27f AD |
650 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
651 | struct ixgbe_mac_info *mac = &hw->mac; | |
652 | s32 ret_val = 0; | |
3047f90b | 653 | u32 links_reg; |
4b2cd27f | 654 | u32 in_msg = 0; |
3047f90b | 655 | |
4b2cd27f AD |
656 | /* If we were hit with a reset drop the link */ |
657 | if (!mbx->ops.check_for_rst(hw) || !mbx->timeout) | |
658 | mac->get_link_status = true; | |
3047f90b | 659 | |
4b2cd27f AD |
660 | if (!mac->get_link_status) |
661 | goto out; | |
3047f90b | 662 | |
4b2cd27f AD |
663 | /* if link status is down no point in checking to see if pf is up */ |
664 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
665 | if (!(links_reg & IXGBE_LINKS_UP)) | |
666 | goto out; | |
3047f90b | 667 | |
b8a2ca19 ET |
668 | /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs |
669 | * before the link status is correct | |
670 | */ | |
671 | if (mac->type == ixgbe_mac_82599_vf) { | |
672 | int i; | |
673 | ||
674 | for (i = 0; i < 5; i++) { | |
675 | udelay(100); | |
676 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
677 | ||
678 | if (!(links_reg & IXGBE_LINKS_UP)) | |
679 | goto out; | |
680 | } | |
681 | } | |
682 | ||
31a1b375 GR |
683 | switch (links_reg & IXGBE_LINKS_SPEED_82599) { |
684 | case IXGBE_LINKS_SPEED_10G_82599: | |
3047f90b | 685 | *speed = IXGBE_LINK_SPEED_10GB_FULL; |
31a1b375 GR |
686 | break; |
687 | case IXGBE_LINKS_SPEED_1G_82599: | |
3047f90b | 688 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
31a1b375 GR |
689 | break; |
690 | case IXGBE_LINKS_SPEED_100_82599: | |
691 | *speed = IXGBE_LINK_SPEED_100_FULL; | |
692 | break; | |
693 | } | |
3047f90b | 694 | |
4b2cd27f | 695 | /* if the read failed it could just be a mailbox collision, best wait |
dec0d8e4 JK |
696 | * until we are called again and don't report an error |
697 | */ | |
4b2cd27f AD |
698 | if (mbx->ops.read(hw, &in_msg, 1)) |
699 | goto out; | |
700 | ||
701 | if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { | |
702 | /* msg is not CTS and is NACK we must have lost CTS status */ | |
703 | if (in_msg & IXGBE_VT_MSGTYPE_NACK) | |
704 | ret_val = -1; | |
705 | goto out; | |
706 | } | |
707 | ||
708 | /* the pf is talking, if we timed out in the past we reinit */ | |
709 | if (!mbx->timeout) { | |
710 | ret_val = -1; | |
711 | goto out; | |
712 | } | |
713 | ||
714 | /* if we passed all the tests above then the link is up and we no | |
dec0d8e4 JK |
715 | * longer need to check for link |
716 | */ | |
4b2cd27f AD |
717 | mac->get_link_status = false; |
718 | ||
719 | out: | |
720 | *link_up = !mac->get_link_status; | |
721 | return ret_val; | |
3047f90b GR |
722 | } |
723 | ||
c6d45171 KS |
724 | /** |
725 | * Hyper-V variant; there is no mailbox communication. | |
726 | */ | |
727 | static s32 ixgbevf_hv_check_mac_link_vf(struct ixgbe_hw *hw, | |
728 | ixgbe_link_speed *speed, | |
729 | bool *link_up, | |
730 | bool autoneg_wait_to_complete) | |
731 | { | |
732 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
733 | struct ixgbe_mac_info *mac = &hw->mac; | |
734 | u32 links_reg; | |
735 | ||
736 | /* If we were hit with a reset drop the link */ | |
737 | if (!mbx->ops.check_for_rst(hw) || !mbx->timeout) | |
738 | mac->get_link_status = true; | |
739 | ||
740 | if (!mac->get_link_status) | |
741 | goto out; | |
742 | ||
743 | /* if link status is down no point in checking to see if pf is up */ | |
744 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
745 | if (!(links_reg & IXGBE_LINKS_UP)) | |
746 | goto out; | |
747 | ||
748 | /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs | |
749 | * before the link status is correct | |
750 | */ | |
751 | if (mac->type == ixgbe_mac_82599_vf) { | |
752 | int i; | |
753 | ||
754 | for (i = 0; i < 5; i++) { | |
755 | udelay(100); | |
756 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
757 | ||
758 | if (!(links_reg & IXGBE_LINKS_UP)) | |
759 | goto out; | |
760 | } | |
761 | } | |
762 | ||
763 | switch (links_reg & IXGBE_LINKS_SPEED_82599) { | |
764 | case IXGBE_LINKS_SPEED_10G_82599: | |
765 | *speed = IXGBE_LINK_SPEED_10GB_FULL; | |
766 | break; | |
767 | case IXGBE_LINKS_SPEED_1G_82599: | |
768 | *speed = IXGBE_LINK_SPEED_1GB_FULL; | |
769 | break; | |
770 | case IXGBE_LINKS_SPEED_100_82599: | |
771 | *speed = IXGBE_LINK_SPEED_100_FULL; | |
772 | break; | |
773 | } | |
774 | ||
775 | /* if we passed all the tests above then the link is up and we no | |
776 | * longer need to check for link | |
777 | */ | |
778 | mac->get_link_status = false; | |
779 | ||
780 | out: | |
781 | *link_up = !mac->get_link_status; | |
782 | return 0; | |
783 | } | |
784 | ||
dd1fe113 | 785 | /** |
2f8214fe | 786 | * ixgbevf_set_rlpml_vf - Set the maximum receive packet length |
dd1fe113 AD |
787 | * @hw: pointer to the HW structure |
788 | * @max_size: value to assign to max frame size | |
789 | **/ | |
6a11e52b | 790 | static s32 ixgbevf_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size) |
dd1fe113 AD |
791 | { |
792 | u32 msgbuf[2]; | |
6a11e52b | 793 | s32 ret_val; |
dd1fe113 AD |
794 | |
795 | msgbuf[0] = IXGBE_VF_SET_LPE; | |
796 | msgbuf[1] = max_size; | |
6a11e52b | 797 | |
c6426971 ET |
798 | ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, |
799 | sizeof(msgbuf) / sizeof(u32)); | |
6a11e52b TN |
800 | if (ret_val) |
801 | return ret_val; | |
802 | if ((msgbuf[0] & IXGBE_VF_SET_LPE) && | |
803 | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) | |
804 | return IXGBE_ERR_MBX; | |
805 | ||
806 | return 0; | |
dd1fe113 AD |
807 | } |
808 | ||
c6d45171 | 809 | /** |
2f8214fe | 810 | * ixgbevf_hv_set_rlpml_vf - Set the maximum receive packet length |
c6d45171 KS |
811 | * @hw: pointer to the HW structure |
812 | * @max_size: value to assign to max frame size | |
813 | * Hyper-V variant. | |
814 | **/ | |
6a11e52b | 815 | static s32 ixgbevf_hv_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size) |
c6d45171 KS |
816 | { |
817 | u32 reg; | |
818 | ||
819 | /* If we are on Hyper-V, we implement this functionality | |
820 | * differently. | |
821 | */ | |
822 | reg = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(0)); | |
823 | /* CRC == 4 */ | |
824 | reg |= ((max_size + 4) | IXGBE_RXDCTL_RLPML_EN); | |
825 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(0), reg); | |
6a11e52b TN |
826 | |
827 | return 0; | |
c6d45171 KS |
828 | } |
829 | ||
31186785 | 830 | /** |
7921f4dc | 831 | * ixgbevf_negotiate_api_version_vf - Negotiate supported API version |
31186785 AD |
832 | * @hw: pointer to the HW structure |
833 | * @api: integer containing requested API version | |
834 | **/ | |
7921f4dc | 835 | static int ixgbevf_negotiate_api_version_vf(struct ixgbe_hw *hw, int api) |
31186785 AD |
836 | { |
837 | int err; | |
838 | u32 msg[3]; | |
839 | ||
840 | /* Negotiate the mailbox API version */ | |
841 | msg[0] = IXGBE_VF_API_NEGOTIATE; | |
842 | msg[1] = api; | |
843 | msg[2] = 0; | |
31186785 | 844 | |
c6426971 ET |
845 | err = ixgbevf_write_msg_read_ack(hw, msg, msg, |
846 | sizeof(msg) / sizeof(u32)); | |
31186785 AD |
847 | if (!err) { |
848 | msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
849 | ||
850 | /* Store value and return 0 on success */ | |
851 | if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { | |
852 | hw->api_version = api; | |
853 | return 0; | |
854 | } | |
855 | ||
856 | err = IXGBE_ERR_INVALID_ARGUMENT; | |
857 | } | |
858 | ||
859 | return err; | |
860 | } | |
861 | ||
c6d45171 | 862 | /** |
2f8214fe | 863 | * ixgbevf_hv_negotiate_api_version_vf - Negotiate supported API version |
c6d45171 KS |
864 | * @hw: pointer to the HW structure |
865 | * @api: integer containing requested API version | |
866 | * Hyper-V version - only ixgbe_mbox_api_10 supported. | |
867 | **/ | |
2f8214fe | 868 | static int ixgbevf_hv_negotiate_api_version_vf(struct ixgbe_hw *hw, int api) |
c6d45171 KS |
869 | { |
870 | /* Hyper-V only supports api version ixgbe_mbox_api_10 */ | |
871 | if (api != ixgbe_mbox_api_10) | |
872 | return IXGBE_ERR_INVALID_ARGUMENT; | |
873 | ||
874 | return 0; | |
875 | } | |
876 | ||
56e94095 AD |
877 | int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, |
878 | unsigned int *default_tc) | |
879 | { | |
880 | int err; | |
881 | u32 msg[5]; | |
882 | ||
883 | /* do nothing if API doesn't support ixgbevf_get_queues */ | |
884 | switch (hw->api_version) { | |
885 | case ixgbe_mbox_api_11: | |
94cf66f8 | 886 | case ixgbe_mbox_api_12: |
56e94095 AD |
887 | break; |
888 | default: | |
889 | return 0; | |
890 | } | |
891 | ||
892 | /* Fetch queue configuration from the PF */ | |
893 | msg[0] = IXGBE_VF_GET_QUEUE; | |
894 | msg[1] = msg[2] = msg[3] = msg[4] = 0; | |
56e94095 | 895 | |
c6426971 ET |
896 | err = ixgbevf_write_msg_read_ack(hw, msg, msg, |
897 | sizeof(msg) / sizeof(u32)); | |
56e94095 AD |
898 | if (!err) { |
899 | msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
900 | ||
dec0d8e4 | 901 | /* if we we didn't get an ACK there must have been |
56e94095 AD |
902 | * some sort of mailbox error so we should treat it |
903 | * as such | |
904 | */ | |
905 | if (msg[0] != (IXGBE_VF_GET_QUEUE | IXGBE_VT_MSGTYPE_ACK)) | |
906 | return IXGBE_ERR_MBX; | |
907 | ||
908 | /* record and validate values from message */ | |
909 | hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; | |
910 | if (hw->mac.max_tx_queues == 0 || | |
911 | hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) | |
912 | hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; | |
913 | ||
914 | hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; | |
915 | if (hw->mac.max_rx_queues == 0 || | |
916 | hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) | |
917 | hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; | |
918 | ||
919 | *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; | |
920 | /* in case of unknown state assume we cannot tag frames */ | |
921 | if (*num_tcs > hw->mac.max_rx_queues) | |
922 | *num_tcs = 1; | |
923 | ||
924 | *default_tc = msg[IXGBE_VF_DEF_QUEUE]; | |
925 | /* default to queue 0 on out-of-bounds queue number */ | |
926 | if (*default_tc >= hw->mac.max_tx_queues) | |
927 | *default_tc = 0; | |
928 | } | |
929 | ||
930 | return err; | |
931 | } | |
932 | ||
3d8fe98f | 933 | static const struct ixgbe_mac_operations ixgbevf_mac_ops = { |
dec0d8e4 JK |
934 | .init_hw = ixgbevf_init_hw_vf, |
935 | .reset_hw = ixgbevf_reset_hw_vf, | |
936 | .start_hw = ixgbevf_start_hw_vf, | |
937 | .get_mac_addr = ixgbevf_get_mac_addr_vf, | |
938 | .stop_adapter = ixgbevf_stop_hw_vf, | |
939 | .setup_link = ixgbevf_setup_mac_link_vf, | |
940 | .check_link = ixgbevf_check_mac_link_vf, | |
7921f4dc | 941 | .negotiate_api_version = ixgbevf_negotiate_api_version_vf, |
dec0d8e4 JK |
942 | .set_rar = ixgbevf_set_rar_vf, |
943 | .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf, | |
8443c1a4 | 944 | .update_xcast_mode = ixgbevf_update_xcast_mode, |
dec0d8e4 JK |
945 | .set_uc_addr = ixgbevf_set_uc_addr_vf, |
946 | .set_vfta = ixgbevf_set_vfta_vf, | |
2f8214fe | 947 | .set_rlpml = ixgbevf_set_rlpml_vf, |
3047f90b GR |
948 | }; |
949 | ||
c6d45171 KS |
950 | static const struct ixgbe_mac_operations ixgbevf_hv_mac_ops = { |
951 | .init_hw = ixgbevf_init_hw_vf, | |
952 | .reset_hw = ixgbevf_hv_reset_hw_vf, | |
953 | .start_hw = ixgbevf_start_hw_vf, | |
954 | .get_mac_addr = ixgbevf_get_mac_addr_vf, | |
955 | .stop_adapter = ixgbevf_stop_hw_vf, | |
956 | .setup_link = ixgbevf_setup_mac_link_vf, | |
957 | .check_link = ixgbevf_hv_check_mac_link_vf, | |
2f8214fe | 958 | .negotiate_api_version = ixgbevf_hv_negotiate_api_version_vf, |
c6d45171 KS |
959 | .set_rar = ixgbevf_hv_set_rar_vf, |
960 | .update_mc_addr_list = ixgbevf_hv_update_mc_addr_list_vf, | |
961 | .update_xcast_mode = ixgbevf_hv_update_xcast_mode, | |
962 | .set_uc_addr = ixgbevf_hv_set_uc_addr_vf, | |
963 | .set_vfta = ixgbevf_hv_set_vfta_vf, | |
2f8214fe | 964 | .set_rlpml = ixgbevf_hv_set_rlpml_vf, |
c6d45171 KS |
965 | }; |
966 | ||
3d8fe98f | 967 | const struct ixgbevf_info ixgbevf_82599_vf_info = { |
3047f90b GR |
968 | .mac = ixgbe_mac_82599_vf, |
969 | .mac_ops = &ixgbevf_mac_ops, | |
970 | }; | |
971 | ||
c6d45171 KS |
972 | const struct ixgbevf_info ixgbevf_82599_vf_hv_info = { |
973 | .mac = ixgbe_mac_82599_vf, | |
974 | .mac_ops = &ixgbevf_hv_mac_ops, | |
975 | }; | |
976 | ||
3d8fe98f | 977 | const struct ixgbevf_info ixgbevf_X540_vf_info = { |
2316aa2a GR |
978 | .mac = ixgbe_mac_X540_vf, |
979 | .mac_ops = &ixgbevf_mac_ops, | |
980 | }; | |
47068b0d | 981 | |
c6d45171 KS |
982 | const struct ixgbevf_info ixgbevf_X540_vf_hv_info = { |
983 | .mac = ixgbe_mac_X540_vf, | |
984 | .mac_ops = &ixgbevf_hv_mac_ops, | |
985 | }; | |
986 | ||
47068b0d ET |
987 | const struct ixgbevf_info ixgbevf_X550_vf_info = { |
988 | .mac = ixgbe_mac_X550_vf, | |
989 | .mac_ops = &ixgbevf_mac_ops, | |
990 | }; | |
991 | ||
c6d45171 KS |
992 | const struct ixgbevf_info ixgbevf_X550_vf_hv_info = { |
993 | .mac = ixgbe_mac_X550_vf, | |
994 | .mac_ops = &ixgbevf_hv_mac_ops, | |
995 | }; | |
996 | ||
47068b0d ET |
997 | const struct ixgbevf_info ixgbevf_X550EM_x_vf_info = { |
998 | .mac = ixgbe_mac_X550EM_x_vf, | |
999 | .mac_ops = &ixgbevf_mac_ops, | |
1000 | }; | |
c6d45171 KS |
1001 | |
1002 | const struct ixgbevf_info ixgbevf_X550EM_x_vf_hv_info = { | |
1003 | .mac = ixgbe_mac_X550EM_x_vf, | |
1004 | .mac_ops = &ixgbevf_hv_mac_ops, | |
1005 | }; | |
1d94f987 DS |
1006 | |
1007 | const struct ixgbevf_info ixgbevf_x550em_a_vf_info = { | |
1008 | .mac = ixgbe_mac_x550em_a_vf, | |
1009 | .mac_ops = &ixgbevf_mac_ops, | |
1010 | }; |