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3047f90b GR |
1 | /******************************************************************************* |
2 | ||
3 | Intel 82599 Virtual Function driver | |
5c47a2b6 | 4 | Copyright(c) 1999 - 2012 Intel Corporation. |
3047f90b GR |
5 | |
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | ||
26 | *******************************************************************************/ | |
27 | ||
28 | #include "vf.h" | |
b5417bf8 | 29 | #include "ixgbevf.h" |
3047f90b GR |
30 | |
31 | /** | |
32 | * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx | |
33 | * @hw: pointer to hardware structure | |
34 | * | |
35 | * Starts the hardware by filling the bus info structure and media type, clears | |
36 | * all on chip counters, initializes receive address registers, multicast | |
37 | * table, VLAN filter table, calls routine to set up link and flow control | |
38 | * settings, and leaves transmit and receive units disabled and uninitialized | |
39 | **/ | |
40 | static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw) | |
41 | { | |
42 | /* Clear adapter stopped flag */ | |
43 | hw->adapter_stopped = false; | |
44 | ||
45 | return 0; | |
46 | } | |
47 | ||
48 | /** | |
49 | * ixgbevf_init_hw_vf - virtual function hardware initialization | |
50 | * @hw: pointer to hardware structure | |
51 | * | |
52 | * Initialize the hardware by resetting the hardware and then starting | |
53 | * the hardware | |
54 | **/ | |
55 | static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw) | |
56 | { | |
57 | s32 status = hw->mac.ops.start_hw(hw); | |
58 | ||
59 | hw->mac.ops.get_mac_addr(hw, hw->mac.addr); | |
60 | ||
61 | return status; | |
62 | } | |
63 | ||
64 | /** | |
65 | * ixgbevf_reset_hw_vf - Performs hardware reset | |
66 | * @hw: pointer to hardware structure | |
67 | * | |
68 | * Resets the hardware by reseting the transmit and receive units, masks and | |
69 | * clears all interrupts. | |
70 | **/ | |
71 | static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw) | |
72 | { | |
73 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
74 | u32 timeout = IXGBE_VF_INIT_TIMEOUT; | |
75 | s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; | |
76 | u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; | |
77 | u8 *addr = (u8 *)(&msgbuf[1]); | |
78 | ||
79 | /* Call adapter stop to disable tx/rx and clear interrupts */ | |
80 | hw->mac.ops.stop_adapter(hw); | |
81 | ||
31186785 AD |
82 | /* reset the api version */ |
83 | hw->api_version = ixgbe_mbox_api_10; | |
84 | ||
3047f90b GR |
85 | IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); |
86 | IXGBE_WRITE_FLUSH(hw); | |
87 | ||
88 | /* we cannot reset while the RSTI / RSTD bits are asserted */ | |
89 | while (!mbx->ops.check_for_rst(hw) && timeout) { | |
90 | timeout--; | |
91 | udelay(5); | |
92 | } | |
93 | ||
94 | if (!timeout) | |
95 | return IXGBE_ERR_RESET_FAILED; | |
96 | ||
97 | /* mailbox timeout can now become active */ | |
98 | mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; | |
99 | ||
100 | msgbuf[0] = IXGBE_VF_RESET; | |
101 | mbx->ops.write_posted(hw, msgbuf, 1); | |
102 | ||
012dc19a | 103 | mdelay(10); |
3047f90b GR |
104 | |
105 | /* set our "perm_addr" based on info provided by PF */ | |
106 | /* also set up the mc_filter_type which is piggy backed | |
107 | * on the mac address in word 3 */ | |
108 | ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN); | |
109 | if (ret_val) | |
110 | return ret_val; | |
111 | ||
e1941a74 GR |
112 | /* New versions of the PF may NACK the reset return message |
113 | * to indicate that no MAC address has yet been assigned for | |
114 | * the VF. | |
115 | */ | |
116 | if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && | |
117 | msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) | |
3047f90b GR |
118 | return IXGBE_ERR_INVALID_MAC_ADDR; |
119 | ||
ea99d832 | 120 | memcpy(hw->mac.perm_addr, addr, ETH_ALEN); |
3047f90b GR |
121 | hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; |
122 | ||
123 | return 0; | |
124 | } | |
125 | ||
126 | /** | |
127 | * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units | |
128 | * @hw: pointer to hardware structure | |
129 | * | |
130 | * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, | |
131 | * disables transmit and receive units. The adapter_stopped flag is used by | |
132 | * the shared code and drivers to determine if the adapter is in a stopped | |
133 | * state and should not touch the hardware. | |
134 | **/ | |
135 | static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw) | |
136 | { | |
137 | u32 number_of_queues; | |
138 | u32 reg_val; | |
139 | u16 i; | |
140 | ||
141 | /* | |
142 | * Set the adapter_stopped flag so other driver functions stop touching | |
143 | * the hardware | |
144 | */ | |
145 | hw->adapter_stopped = true; | |
146 | ||
147 | /* Disable the receive unit by stopped each queue */ | |
148 | number_of_queues = hw->mac.max_rx_queues; | |
149 | for (i = 0; i < number_of_queues; i++) { | |
150 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); | |
151 | if (reg_val & IXGBE_RXDCTL_ENABLE) { | |
152 | reg_val &= ~IXGBE_RXDCTL_ENABLE; | |
153 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); | |
154 | } | |
155 | } | |
156 | ||
157 | IXGBE_WRITE_FLUSH(hw); | |
158 | ||
159 | /* Clear interrupt mask to stop from interrupts being generated */ | |
160 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); | |
161 | ||
162 | /* Clear any pending interrupts */ | |
163 | IXGBE_READ_REG(hw, IXGBE_VTEICR); | |
164 | ||
165 | /* Disable the transmit unit. Each queue must be disabled. */ | |
166 | number_of_queues = hw->mac.max_tx_queues; | |
167 | for (i = 0; i < number_of_queues; i++) { | |
168 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); | |
169 | if (reg_val & IXGBE_TXDCTL_ENABLE) { | |
170 | reg_val &= ~IXGBE_TXDCTL_ENABLE; | |
171 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); | |
172 | } | |
173 | } | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | /** | |
179 | * ixgbevf_mta_vector - Determines bit-vector in multicast table to set | |
180 | * @hw: pointer to hardware structure | |
181 | * @mc_addr: the multicast address | |
182 | * | |
183 | * Extracts the 12 bits, from a multicast address, to determine which | |
184 | * bit-vector to set in the multicast table. The hardware uses 12 bits, from | |
185 | * incoming rx multicast addresses, to determine the bit-vector to check in | |
186 | * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set | |
187 | * by the MO field of the MCSTCTRL. The MO field is set during initialization | |
188 | * to mc_filter_type. | |
189 | **/ | |
190 | static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) | |
191 | { | |
192 | u32 vector = 0; | |
193 | ||
194 | switch (hw->mac.mc_filter_type) { | |
195 | case 0: /* use bits [47:36] of the address */ | |
196 | vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); | |
197 | break; | |
198 | case 1: /* use bits [46:35] of the address */ | |
199 | vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); | |
200 | break; | |
201 | case 2: /* use bits [45:34] of the address */ | |
202 | vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); | |
203 | break; | |
204 | case 3: /* use bits [43:32] of the address */ | |
205 | vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); | |
206 | break; | |
207 | default: /* Invalid mc_filter_type */ | |
208 | break; | |
209 | } | |
210 | ||
211 | /* vector can only be 12-bits or boundary will be exceeded */ | |
212 | vector &= 0xFFF; | |
213 | return vector; | |
214 | } | |
215 | ||
216 | /** | |
217 | * ixgbevf_get_mac_addr_vf - Read device MAC address | |
218 | * @hw: pointer to the HW structure | |
219 | * @mac_addr: pointer to storage for retrieved MAC address | |
220 | **/ | |
221 | static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) | |
222 | { | |
ea99d832 | 223 | memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN); |
3047f90b GR |
224 | |
225 | return 0; | |
226 | } | |
227 | ||
46ec20ff GR |
228 | static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) |
229 | { | |
230 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
231 | u32 msgbuf[3]; | |
232 | u8 *msg_addr = (u8 *)(&msgbuf[1]); | |
233 | s32 ret_val; | |
234 | ||
235 | memset(msgbuf, 0, sizeof(msgbuf)); | |
236 | /* | |
237 | * If index is one then this is the start of a new list and needs | |
238 | * indication to the PF so it can do it's own list management. | |
239 | * If it is zero then that tells the PF to just clear all of | |
240 | * this VF's macvlans and there is no new list. | |
241 | */ | |
242 | msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; | |
243 | msgbuf[0] |= IXGBE_VF_SET_MACVLAN; | |
244 | if (addr) | |
d458cdf7 | 245 | memcpy(msg_addr, addr, ETH_ALEN); |
46ec20ff GR |
246 | ret_val = mbx->ops.write_posted(hw, msgbuf, 3); |
247 | ||
248 | if (!ret_val) | |
249 | ret_val = mbx->ops.read_posted(hw, msgbuf, 3); | |
250 | ||
251 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
252 | ||
253 | if (!ret_val) | |
254 | if (msgbuf[0] == | |
255 | (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK)) | |
256 | ret_val = -ENOMEM; | |
257 | ||
258 | return ret_val; | |
259 | } | |
260 | ||
3047f90b GR |
261 | /** |
262 | * ixgbevf_set_rar_vf - set device MAC address | |
263 | * @hw: pointer to hardware structure | |
264 | * @index: Receive address register to write | |
265 | * @addr: Address to put into receive address register | |
266 | * @vmdq: Unused in this implementation | |
267 | **/ | |
268 | static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, | |
269 | u32 vmdq) | |
270 | { | |
271 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
272 | u32 msgbuf[3]; | |
273 | u8 *msg_addr = (u8 *)(&msgbuf[1]); | |
274 | s32 ret_val; | |
275 | ||
276 | memset(msgbuf, 0, sizeof(msgbuf)); | |
277 | msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; | |
d458cdf7 | 278 | memcpy(msg_addr, addr, ETH_ALEN); |
3047f90b GR |
279 | ret_val = mbx->ops.write_posted(hw, msgbuf, 3); |
280 | ||
281 | if (!ret_val) | |
282 | ret_val = mbx->ops.read_posted(hw, msgbuf, 3); | |
283 | ||
284 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
285 | ||
286 | /* if nacked the address was rejected, use "perm_addr" */ | |
287 | if (!ret_val && | |
288 | (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) | |
289 | ixgbevf_get_mac_addr_vf(hw, hw->mac.addr); | |
290 | ||
291 | return ret_val; | |
292 | } | |
293 | ||
3a2c4033 GR |
294 | static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, |
295 | u32 *msg, u16 size) | |
296 | { | |
297 | struct ixgbe_mbx_info *mbx = &hw->mbx; | |
298 | u32 retmsg[IXGBE_VFMAILBOX_SIZE]; | |
299 | s32 retval = mbx->ops.write_posted(hw, msg, size); | |
300 | ||
301 | if (!retval) | |
302 | mbx->ops.read_posted(hw, retmsg, size); | |
303 | } | |
304 | ||
3047f90b GR |
305 | /** |
306 | * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses | |
307 | * @hw: pointer to the HW structure | |
5c58c47a | 308 | * @netdev: pointer to net device structure |
3047f90b GR |
309 | * |
310 | * Updates the Multicast Table Array. | |
311 | **/ | |
5c58c47a JP |
312 | static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw, |
313 | struct net_device *netdev) | |
3047f90b | 314 | { |
22bedad3 | 315 | struct netdev_hw_addr *ha; |
3047f90b GR |
316 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; |
317 | u16 *vector_list = (u16 *)&msgbuf[1]; | |
3047f90b | 318 | u32 cnt, i; |
3047f90b GR |
319 | |
320 | /* Each entry in the list uses 1 16 bit word. We have 30 | |
321 | * 16 bit words available in our HW msg buffer (minus 1 for the | |
322 | * msg type). That's 30 hash values if we pack 'em right. If | |
323 | * there are more than 30 MC addresses to add then punt the | |
324 | * extras for now and then add code to handle more than 30 later. | |
325 | * It would be unusual for a server to request that many multi-cast | |
326 | * addresses except for in large enterprise network environments. | |
327 | */ | |
328 | ||
5c58c47a JP |
329 | cnt = netdev_mc_count(netdev); |
330 | if (cnt > 30) | |
331 | cnt = 30; | |
3047f90b GR |
332 | msgbuf[0] = IXGBE_VF_SET_MULTICAST; |
333 | msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; | |
334 | ||
5c58c47a | 335 | i = 0; |
22bedad3 | 336 | netdev_for_each_mc_addr(ha, netdev) { |
5c58c47a JP |
337 | if (i == cnt) |
338 | break; | |
46acc460 | 339 | if (is_link_local_ether_addr(ha->addr)) |
b3343a2a JF |
340 | continue; |
341 | ||
22bedad3 | 342 | vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr); |
3047f90b GR |
343 | } |
344 | ||
3a2c4033 | 345 | ixgbevf_write_msg_read_ack(hw, msgbuf, IXGBE_VFMAILBOX_SIZE); |
3047f90b GR |
346 | |
347 | return 0; | |
348 | } | |
349 | ||
350 | /** | |
351 | * ixgbevf_set_vfta_vf - Set/Unset vlan filter table address | |
352 | * @hw: pointer to the HW structure | |
353 | * @vlan: 12 bit VLAN ID | |
354 | * @vind: unused by VF drivers | |
355 | * @vlan_on: if true then set bit, else clear bit | |
356 | **/ | |
357 | static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, | |
358 | bool vlan_on) | |
359 | { | |
2ddc7fe1 | 360 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
3047f90b | 361 | u32 msgbuf[2]; |
2ddc7fe1 | 362 | s32 err; |
3047f90b GR |
363 | |
364 | msgbuf[0] = IXGBE_VF_SET_VLAN; | |
365 | msgbuf[1] = vlan; | |
366 | /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ | |
367 | msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; | |
368 | ||
2ddc7fe1 AD |
369 | err = mbx->ops.write_posted(hw, msgbuf, 2); |
370 | if (err) | |
371 | goto mbx_err; | |
3a2c4033 | 372 | |
2ddc7fe1 AD |
373 | err = mbx->ops.read_posted(hw, msgbuf, 2); |
374 | if (err) | |
375 | goto mbx_err; | |
376 | ||
377 | /* remove extra bits from the message */ | |
378 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
379 | msgbuf[0] &= ~(0xFF << IXGBE_VT_MSGINFO_SHIFT); | |
380 | ||
381 | if (msgbuf[0] != (IXGBE_VF_SET_VLAN | IXGBE_VT_MSGTYPE_ACK)) | |
382 | err = IXGBE_ERR_INVALID_ARGUMENT; | |
383 | ||
384 | mbx_err: | |
385 | return err; | |
3047f90b GR |
386 | } |
387 | ||
388 | /** | |
389 | * ixgbevf_setup_mac_link_vf - Setup MAC link settings | |
390 | * @hw: pointer to hardware structure | |
391 | * @speed: Unused in this implementation | |
392 | * @autoneg: Unused in this implementation | |
393 | * @autoneg_wait_to_complete: Unused in this implementation | |
394 | * | |
395 | * Do nothing and return success. VF drivers are not allowed to change | |
396 | * global settings. Maintained for driver compatibility. | |
397 | **/ | |
398 | static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw, | |
399 | ixgbe_link_speed speed, bool autoneg, | |
400 | bool autoneg_wait_to_complete) | |
401 | { | |
402 | return 0; | |
403 | } | |
404 | ||
405 | /** | |
406 | * ixgbevf_check_mac_link_vf - Get link/speed status | |
407 | * @hw: pointer to hardware structure | |
408 | * @speed: pointer to link speed | |
409 | * @link_up: true is link is up, false otherwise | |
410 | * @autoneg_wait_to_complete: true when waiting for completion is needed | |
411 | * | |
412 | * Reads the links register to determine if link is up and the current speed | |
413 | **/ | |
414 | static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw, | |
415 | ixgbe_link_speed *speed, | |
416 | bool *link_up, | |
417 | bool autoneg_wait_to_complete) | |
418 | { | |
4b2cd27f AD |
419 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
420 | struct ixgbe_mac_info *mac = &hw->mac; | |
421 | s32 ret_val = 0; | |
3047f90b | 422 | u32 links_reg; |
4b2cd27f | 423 | u32 in_msg = 0; |
3047f90b | 424 | |
4b2cd27f AD |
425 | /* If we were hit with a reset drop the link */ |
426 | if (!mbx->ops.check_for_rst(hw) || !mbx->timeout) | |
427 | mac->get_link_status = true; | |
3047f90b | 428 | |
4b2cd27f AD |
429 | if (!mac->get_link_status) |
430 | goto out; | |
3047f90b | 431 | |
4b2cd27f AD |
432 | /* if link status is down no point in checking to see if pf is up */ |
433 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
434 | if (!(links_reg & IXGBE_LINKS_UP)) | |
435 | goto out; | |
3047f90b | 436 | |
b8a2ca19 ET |
437 | /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs |
438 | * before the link status is correct | |
439 | */ | |
440 | if (mac->type == ixgbe_mac_82599_vf) { | |
441 | int i; | |
442 | ||
443 | for (i = 0; i < 5; i++) { | |
444 | udelay(100); | |
445 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); | |
446 | ||
447 | if (!(links_reg & IXGBE_LINKS_UP)) | |
448 | goto out; | |
449 | } | |
450 | } | |
451 | ||
31a1b375 GR |
452 | switch (links_reg & IXGBE_LINKS_SPEED_82599) { |
453 | case IXGBE_LINKS_SPEED_10G_82599: | |
3047f90b | 454 | *speed = IXGBE_LINK_SPEED_10GB_FULL; |
31a1b375 GR |
455 | break; |
456 | case IXGBE_LINKS_SPEED_1G_82599: | |
3047f90b | 457 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
31a1b375 GR |
458 | break; |
459 | case IXGBE_LINKS_SPEED_100_82599: | |
460 | *speed = IXGBE_LINK_SPEED_100_FULL; | |
461 | break; | |
462 | } | |
3047f90b | 463 | |
4b2cd27f AD |
464 | /* if the read failed it could just be a mailbox collision, best wait |
465 | * until we are called again and don't report an error */ | |
466 | if (mbx->ops.read(hw, &in_msg, 1)) | |
467 | goto out; | |
468 | ||
469 | if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { | |
470 | /* msg is not CTS and is NACK we must have lost CTS status */ | |
471 | if (in_msg & IXGBE_VT_MSGTYPE_NACK) | |
472 | ret_val = -1; | |
473 | goto out; | |
474 | } | |
475 | ||
476 | /* the pf is talking, if we timed out in the past we reinit */ | |
477 | if (!mbx->timeout) { | |
478 | ret_val = -1; | |
479 | goto out; | |
480 | } | |
481 | ||
482 | /* if we passed all the tests above then the link is up and we no | |
483 | * longer need to check for link */ | |
484 | mac->get_link_status = false; | |
485 | ||
486 | out: | |
487 | *link_up = !mac->get_link_status; | |
488 | return ret_val; | |
3047f90b GR |
489 | } |
490 | ||
dd1fe113 AD |
491 | /** |
492 | * ixgbevf_rlpml_set_vf - Set the maximum receive packet length | |
493 | * @hw: pointer to the HW structure | |
494 | * @max_size: value to assign to max frame size | |
495 | **/ | |
496 | void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) | |
497 | { | |
498 | u32 msgbuf[2]; | |
499 | ||
500 | msgbuf[0] = IXGBE_VF_SET_LPE; | |
501 | msgbuf[1] = max_size; | |
502 | ixgbevf_write_msg_read_ack(hw, msgbuf, 2); | |
503 | } | |
504 | ||
31186785 AD |
505 | /** |
506 | * ixgbevf_negotiate_api_version - Negotiate supported API version | |
507 | * @hw: pointer to the HW structure | |
508 | * @api: integer containing requested API version | |
509 | **/ | |
510 | int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) | |
511 | { | |
512 | int err; | |
513 | u32 msg[3]; | |
514 | ||
515 | /* Negotiate the mailbox API version */ | |
516 | msg[0] = IXGBE_VF_API_NEGOTIATE; | |
517 | msg[1] = api; | |
518 | msg[2] = 0; | |
519 | err = hw->mbx.ops.write_posted(hw, msg, 3); | |
520 | ||
521 | if (!err) | |
522 | err = hw->mbx.ops.read_posted(hw, msg, 3); | |
523 | ||
524 | if (!err) { | |
525 | msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
526 | ||
527 | /* Store value and return 0 on success */ | |
528 | if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { | |
529 | hw->api_version = api; | |
530 | return 0; | |
531 | } | |
532 | ||
533 | err = IXGBE_ERR_INVALID_ARGUMENT; | |
534 | } | |
535 | ||
536 | return err; | |
537 | } | |
538 | ||
56e94095 AD |
539 | int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, |
540 | unsigned int *default_tc) | |
541 | { | |
542 | int err; | |
543 | u32 msg[5]; | |
544 | ||
545 | /* do nothing if API doesn't support ixgbevf_get_queues */ | |
546 | switch (hw->api_version) { | |
547 | case ixgbe_mbox_api_11: | |
548 | break; | |
549 | default: | |
550 | return 0; | |
551 | } | |
552 | ||
553 | /* Fetch queue configuration from the PF */ | |
554 | msg[0] = IXGBE_VF_GET_QUEUE; | |
555 | msg[1] = msg[2] = msg[3] = msg[4] = 0; | |
556 | err = hw->mbx.ops.write_posted(hw, msg, 5); | |
557 | ||
558 | if (!err) | |
559 | err = hw->mbx.ops.read_posted(hw, msg, 5); | |
560 | ||
561 | if (!err) { | |
562 | msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; | |
563 | ||
564 | /* | |
565 | * if we we didn't get an ACK there must have been | |
566 | * some sort of mailbox error so we should treat it | |
567 | * as such | |
568 | */ | |
569 | if (msg[0] != (IXGBE_VF_GET_QUEUE | IXGBE_VT_MSGTYPE_ACK)) | |
570 | return IXGBE_ERR_MBX; | |
571 | ||
572 | /* record and validate values from message */ | |
573 | hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; | |
574 | if (hw->mac.max_tx_queues == 0 || | |
575 | hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) | |
576 | hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; | |
577 | ||
578 | hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; | |
579 | if (hw->mac.max_rx_queues == 0 || | |
580 | hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) | |
581 | hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; | |
582 | ||
583 | *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; | |
584 | /* in case of unknown state assume we cannot tag frames */ | |
585 | if (*num_tcs > hw->mac.max_rx_queues) | |
586 | *num_tcs = 1; | |
587 | ||
588 | *default_tc = msg[IXGBE_VF_DEF_QUEUE]; | |
589 | /* default to queue 0 on out-of-bounds queue number */ | |
590 | if (*default_tc >= hw->mac.max_tx_queues) | |
591 | *default_tc = 0; | |
592 | } | |
593 | ||
594 | return err; | |
595 | } | |
596 | ||
3d8fe98f | 597 | static const struct ixgbe_mac_operations ixgbevf_mac_ops = { |
3047f90b GR |
598 | .init_hw = ixgbevf_init_hw_vf, |
599 | .reset_hw = ixgbevf_reset_hw_vf, | |
600 | .start_hw = ixgbevf_start_hw_vf, | |
601 | .get_mac_addr = ixgbevf_get_mac_addr_vf, | |
602 | .stop_adapter = ixgbevf_stop_hw_vf, | |
603 | .setup_link = ixgbevf_setup_mac_link_vf, | |
604 | .check_link = ixgbevf_check_mac_link_vf, | |
605 | .set_rar = ixgbevf_set_rar_vf, | |
606 | .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf, | |
46ec20ff | 607 | .set_uc_addr = ixgbevf_set_uc_addr_vf, |
3047f90b GR |
608 | .set_vfta = ixgbevf_set_vfta_vf, |
609 | }; | |
610 | ||
3d8fe98f | 611 | const struct ixgbevf_info ixgbevf_82599_vf_info = { |
3047f90b GR |
612 | .mac = ixgbe_mac_82599_vf, |
613 | .mac_ops = &ixgbevf_mac_ops, | |
614 | }; | |
615 | ||
3d8fe98f | 616 | const struct ixgbevf_info ixgbevf_X540_vf_info = { |
2316aa2a GR |
617 | .mac = ixgbe_mac_X540_vf, |
618 | .mac_ops = &ixgbevf_mac_ops, | |
619 | }; | |
47068b0d ET |
620 | |
621 | const struct ixgbevf_info ixgbevf_X550_vf_info = { | |
622 | .mac = ixgbe_mac_X550_vf, | |
623 | .mac_ops = &ixgbevf_mac_ops, | |
624 | }; | |
625 | ||
626 | const struct ixgbevf_info ixgbevf_X550EM_x_vf_info = { | |
627 | .mac = ixgbe_mac_X550EM_x_vf, | |
628 | .mac_ops = &ixgbevf_mac_ops, | |
629 | }; |