Commit | Line | Data |
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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/kernel.h> | |
35 | #include <linux/ethtool.h> | |
36 | #include <linux/netdevice.h> | |
af22d9de | 37 | #include <linux/mlx4/driver.h> |
f90a3673 HHZ |
38 | #include <linux/in.h> |
39 | #include <net/ip.h> | |
c27a02cd YP |
40 | |
41 | #include "mlx4_en.h" | |
42 | #include "en_port.h" | |
43 | ||
82067281 | 44 | #define EN_ETHTOOL_QP_ATTACH (1ull << 63) |
82067281 HHZ |
45 | #define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff) |
46 | #define EN_ETHTOOL_WORD_MASK cpu_to_be32(0xffffffff) | |
c27a02cd | 47 | |
79c54b6b AV |
48 | static int mlx4_en_moderation_update(struct mlx4_en_priv *priv) |
49 | { | |
50 | int i; | |
51 | int err = 0; | |
52 | ||
53 | for (i = 0; i < priv->tx_ring_num; i++) { | |
41d942d5 EE |
54 | priv->tx_cq[i]->moder_cnt = priv->tx_frames; |
55 | priv->tx_cq[i]->moder_time = priv->tx_usecs; | |
38463e2c | 56 | if (priv->port_up) { |
41d942d5 | 57 | err = mlx4_en_set_cq_moder(priv, priv->tx_cq[i]); |
38463e2c EE |
58 | if (err) |
59 | return err; | |
60 | } | |
79c54b6b AV |
61 | } |
62 | ||
63 | if (priv->adaptive_rx_coal) | |
64 | return 0; | |
65 | ||
66 | for (i = 0; i < priv->rx_ring_num; i++) { | |
41d942d5 EE |
67 | priv->rx_cq[i]->moder_cnt = priv->rx_frames; |
68 | priv->rx_cq[i]->moder_time = priv->rx_usecs; | |
79c54b6b | 69 | priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; |
38463e2c | 70 | if (priv->port_up) { |
41d942d5 | 71 | err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]); |
38463e2c EE |
72 | if (err) |
73 | return err; | |
74 | } | |
79c54b6b AV |
75 | } |
76 | ||
77 | return err; | |
78 | } | |
79 | ||
c27a02cd YP |
80 | static void |
81 | mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo) | |
82 | { | |
83 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
84 | struct mlx4_en_dev *mdev = priv->mdev; | |
85 | ||
612a94d6 RJ |
86 | strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver)); |
87 | strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")", | |
88 | sizeof(drvinfo->version)); | |
89 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), | |
90 | "%d.%d.%d", | |
c27a02cd YP |
91 | (u16) (mdev->dev->caps.fw_ver >> 32), |
92 | (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff), | |
93 | (u16) (mdev->dev->caps.fw_ver & 0xffff)); | |
612a94d6 RJ |
94 | strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev), |
95 | sizeof(drvinfo->bus_info)); | |
c27a02cd YP |
96 | drvinfo->n_stats = 0; |
97 | drvinfo->regdump_len = 0; | |
98 | drvinfo->eedump_len = 0; | |
99 | } | |
100 | ||
0fef9d03 AV |
101 | static const char mlx4_en_priv_flags[][ETH_GSTRING_LEN] = { |
102 | "blueflame", | |
103 | }; | |
104 | ||
c27a02cd YP |
105 | static const char main_strings[][ETH_GSTRING_LEN] = { |
106 | "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors", | |
107 | "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions", | |
108 | "rx_length_errors", "rx_over_errors", "rx_crc_errors", | |
109 | "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors", | |
110 | "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors", | |
111 | "tx_heartbeat_errors", "tx_window_errors", | |
112 | ||
113 | /* port statistics */ | |
fa37a958 | 114 | "tso_packets", |
9fab426d | 115 | "xmit_more", |
c27a02cd YP |
116 | "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed", |
117 | "rx_csum_good", "rx_csum_none", "tx_chksum_offload", | |
118 | ||
119 | /* packet statistics */ | |
120 | "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3", | |
121 | "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0", | |
122 | "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5", | |
123 | "tx_prio_6", "tx_prio_7", | |
124 | }; | |
d61702f1 | 125 | #define NUM_MAIN_STATS 21 |
c27a02cd YP |
126 | #define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS) |
127 | ||
e7c1c2c4 | 128 | static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= { |
fd9071ec | 129 | "Interrupt Test", |
e7c1c2c4 YP |
130 | "Link Test", |
131 | "Speed Test", | |
132 | "Register Test", | |
133 | "Loopback Test", | |
134 | }; | |
135 | ||
c27a02cd YP |
136 | static u32 mlx4_en_get_msglevel(struct net_device *dev) |
137 | { | |
138 | return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable; | |
139 | } | |
140 | ||
141 | static void mlx4_en_set_msglevel(struct net_device *dev, u32 val) | |
142 | { | |
143 | ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val; | |
144 | } | |
145 | ||
146 | static void mlx4_en_get_wol(struct net_device *netdev, | |
147 | struct ethtool_wolinfo *wol) | |
148 | { | |
14c07b13 YP |
149 | struct mlx4_en_priv *priv = netdev_priv(netdev); |
150 | int err = 0; | |
151 | u64 config = 0; | |
559a9f1d | 152 | u64 mask; |
14c07b13 | 153 | |
559a9f1d OD |
154 | if ((priv->port < 1) || (priv->port > 2)) { |
155 | en_err(priv, "Failed to get WoL information\n"); | |
156 | return; | |
157 | } | |
158 | ||
159 | mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 : | |
160 | MLX4_DEV_CAP_FLAG_WOL_PORT2; | |
161 | ||
162 | if (!(priv->mdev->dev->caps.flags & mask)) { | |
14c07b13 YP |
163 | wol->supported = 0; |
164 | wol->wolopts = 0; | |
165 | return; | |
166 | } | |
167 | ||
168 | err = mlx4_wol_read(priv->mdev->dev, &config, priv->port); | |
169 | if (err) { | |
170 | en_err(priv, "Failed to get WoL information\n"); | |
171 | return; | |
172 | } | |
173 | ||
174 | if (config & MLX4_EN_WOL_MAGIC) | |
175 | wol->supported = WAKE_MAGIC; | |
176 | else | |
177 | wol->supported = 0; | |
178 | ||
179 | if (config & MLX4_EN_WOL_ENABLED) | |
180 | wol->wolopts = WAKE_MAGIC; | |
181 | else | |
182 | wol->wolopts = 0; | |
183 | } | |
184 | ||
185 | static int mlx4_en_set_wol(struct net_device *netdev, | |
186 | struct ethtool_wolinfo *wol) | |
187 | { | |
188 | struct mlx4_en_priv *priv = netdev_priv(netdev); | |
189 | u64 config = 0; | |
190 | int err = 0; | |
559a9f1d OD |
191 | u64 mask; |
192 | ||
193 | if ((priv->port < 1) || (priv->port > 2)) | |
194 | return -EOPNOTSUPP; | |
195 | ||
196 | mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 : | |
197 | MLX4_DEV_CAP_FLAG_WOL_PORT2; | |
14c07b13 | 198 | |
559a9f1d | 199 | if (!(priv->mdev->dev->caps.flags & mask)) |
14c07b13 YP |
200 | return -EOPNOTSUPP; |
201 | ||
202 | if (wol->supported & ~WAKE_MAGIC) | |
203 | return -EINVAL; | |
204 | ||
205 | err = mlx4_wol_read(priv->mdev->dev, &config, priv->port); | |
206 | if (err) { | |
207 | en_err(priv, "Failed to get WoL info, unable to modify\n"); | |
208 | return err; | |
209 | } | |
210 | ||
211 | if (wol->wolopts & WAKE_MAGIC) { | |
212 | config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED | | |
213 | MLX4_EN_WOL_MAGIC; | |
214 | } else { | |
215 | config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC); | |
216 | config |= MLX4_EN_WOL_DO_MODIFY; | |
217 | } | |
218 | ||
219 | err = mlx4_wol_write(priv->mdev->dev, config, priv->port); | |
220 | if (err) | |
221 | en_err(priv, "Failed to set WoL information\n"); | |
222 | ||
223 | return err; | |
c27a02cd YP |
224 | } |
225 | ||
226 | static int mlx4_en_get_sset_count(struct net_device *dev, int sset) | |
227 | { | |
228 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
93ece0c1 | 229 | int bit_count = hweight64(priv->stats_bitmap); |
c27a02cd | 230 | |
e7c1c2c4 YP |
231 | switch (sset) { |
232 | case ETH_SS_STATS: | |
93ece0c1 | 233 | return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) + |
8501841a | 234 | (priv->tx_ring_num * 2) + |
e0d1095a | 235 | #ifdef CONFIG_NET_RX_BUSY_POLL |
8501841a AV |
236 | (priv->rx_ring_num * 5); |
237 | #else | |
238 | (priv->rx_ring_num * 2); | |
239 | #endif | |
e7c1c2c4 | 240 | case ETH_SS_TEST: |
ccf86321 OG |
241 | return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags |
242 | & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2; | |
0fef9d03 AV |
243 | case ETH_SS_PRIV_FLAGS: |
244 | return ARRAY_SIZE(mlx4_en_priv_flags); | |
e7c1c2c4 | 245 | default: |
c27a02cd | 246 | return -EOPNOTSUPP; |
e7c1c2c4 | 247 | } |
c27a02cd YP |
248 | } |
249 | ||
250 | static void mlx4_en_get_ethtool_stats(struct net_device *dev, | |
251 | struct ethtool_stats *stats, uint64_t *data) | |
252 | { | |
253 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
254 | int index = 0; | |
93ece0c1 | 255 | int i, j = 0; |
c27a02cd YP |
256 | |
257 | spin_lock_bh(&priv->stats_lock); | |
258 | ||
93ece0c1 EE |
259 | if (!(priv->stats_bitmap)) { |
260 | for (i = 0; i < NUM_MAIN_STATS; i++) | |
261 | data[index++] = | |
262 | ((unsigned long *) &priv->stats)[i]; | |
263 | for (i = 0; i < NUM_PORT_STATS; i++) | |
264 | data[index++] = | |
265 | ((unsigned long *) &priv->port_stats)[i]; | |
266 | for (i = 0; i < NUM_PKT_STATS; i++) | |
267 | data[index++] = | |
268 | ((unsigned long *) &priv->pkstats)[i]; | |
269 | } else { | |
270 | for (i = 0; i < NUM_MAIN_STATS; i++) { | |
271 | if ((priv->stats_bitmap >> j) & 1) | |
272 | data[index++] = | |
273 | ((unsigned long *) &priv->stats)[i]; | |
274 | j++; | |
275 | } | |
276 | for (i = 0; i < NUM_PORT_STATS; i++) { | |
277 | if ((priv->stats_bitmap >> j) & 1) | |
278 | data[index++] = | |
279 | ((unsigned long *) &priv->port_stats)[i]; | |
280 | j++; | |
281 | } | |
282 | } | |
c27a02cd | 283 | for (i = 0; i < priv->tx_ring_num; i++) { |
41d942d5 EE |
284 | data[index++] = priv->tx_ring[i]->packets; |
285 | data[index++] = priv->tx_ring[i]->bytes; | |
c27a02cd YP |
286 | } |
287 | for (i = 0; i < priv->rx_ring_num; i++) { | |
41d942d5 EE |
288 | data[index++] = priv->rx_ring[i]->packets; |
289 | data[index++] = priv->rx_ring[i]->bytes; | |
e0d1095a | 290 | #ifdef CONFIG_NET_RX_BUSY_POLL |
41d942d5 EE |
291 | data[index++] = priv->rx_ring[i]->yields; |
292 | data[index++] = priv->rx_ring[i]->misses; | |
293 | data[index++] = priv->rx_ring[i]->cleaned; | |
8501841a | 294 | #endif |
c27a02cd | 295 | } |
c27a02cd YP |
296 | spin_unlock_bh(&priv->stats_lock); |
297 | ||
298 | } | |
299 | ||
e7c1c2c4 YP |
300 | static void mlx4_en_self_test(struct net_device *dev, |
301 | struct ethtool_test *etest, u64 *buf) | |
302 | { | |
303 | mlx4_en_ex_selftest(dev, &etest->flags, buf); | |
304 | } | |
305 | ||
c27a02cd YP |
306 | static void mlx4_en_get_strings(struct net_device *dev, |
307 | uint32_t stringset, uint8_t *data) | |
308 | { | |
309 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
310 | int index = 0; | |
311 | int i; | |
312 | ||
e7c1c2c4 YP |
313 | switch (stringset) { |
314 | case ETH_SS_TEST: | |
315 | for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++) | |
316 | strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]); | |
ccf86321 | 317 | if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) |
e7c1c2c4 YP |
318 | for (; i < MLX4_EN_NUM_SELF_TEST; i++) |
319 | strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]); | |
320 | break; | |
321 | ||
322 | case ETH_SS_STATS: | |
323 | /* Add main counters */ | |
93ece0c1 EE |
324 | if (!priv->stats_bitmap) { |
325 | for (i = 0; i < NUM_MAIN_STATS; i++) | |
326 | strcpy(data + (index++) * ETH_GSTRING_LEN, | |
327 | main_strings[i]); | |
328 | for (i = 0; i < NUM_PORT_STATS; i++) | |
329 | strcpy(data + (index++) * ETH_GSTRING_LEN, | |
330 | main_strings[i + | |
331 | NUM_MAIN_STATS]); | |
332 | for (i = 0; i < NUM_PKT_STATS; i++) | |
333 | strcpy(data + (index++) * ETH_GSTRING_LEN, | |
334 | main_strings[i + | |
335 | NUM_MAIN_STATS + | |
336 | NUM_PORT_STATS]); | |
337 | } else | |
338 | for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) { | |
339 | if ((priv->stats_bitmap >> i) & 1) { | |
340 | strcpy(data + | |
341 | (index++) * ETH_GSTRING_LEN, | |
342 | main_strings[i]); | |
343 | } | |
344 | if (!(priv->stats_bitmap >> i)) | |
345 | break; | |
346 | } | |
e7c1c2c4 YP |
347 | for (i = 0; i < priv->tx_ring_num; i++) { |
348 | sprintf(data + (index++) * ETH_GSTRING_LEN, | |
349 | "tx%d_packets", i); | |
350 | sprintf(data + (index++) * ETH_GSTRING_LEN, | |
351 | "tx%d_bytes", i); | |
352 | } | |
353 | for (i = 0; i < priv->rx_ring_num; i++) { | |
354 | sprintf(data + (index++) * ETH_GSTRING_LEN, | |
355 | "rx%d_packets", i); | |
356 | sprintf(data + (index++) * ETH_GSTRING_LEN, | |
357 | "rx%d_bytes", i); | |
e0d1095a | 358 | #ifdef CONFIG_NET_RX_BUSY_POLL |
8501841a AV |
359 | sprintf(data + (index++) * ETH_GSTRING_LEN, |
360 | "rx%d_napi_yield", i); | |
361 | sprintf(data + (index++) * ETH_GSTRING_LEN, | |
362 | "rx%d_misses", i); | |
363 | sprintf(data + (index++) * ETH_GSTRING_LEN, | |
364 | "rx%d_cleaned", i); | |
365 | #endif | |
e7c1c2c4 | 366 | } |
e7c1c2c4 | 367 | break; |
0fef9d03 AV |
368 | case ETH_SS_PRIV_FLAGS: |
369 | for (i = 0; i < ARRAY_SIZE(mlx4_en_priv_flags); i++) | |
370 | strcpy(data + i * ETH_GSTRING_LEN, | |
371 | mlx4_en_priv_flags[i]); | |
372 | break; | |
373 | ||
e7c1c2c4 | 374 | } |
c27a02cd YP |
375 | } |
376 | ||
377 | static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
378 | { | |
7699517d YP |
379 | struct mlx4_en_priv *priv = netdev_priv(dev); |
380 | int trans_type; | |
381 | ||
c27a02cd YP |
382 | cmd->autoneg = AUTONEG_DISABLE; |
383 | cmd->supported = SUPPORTED_10000baseT_Full; | |
7699517d YP |
384 | cmd->advertising = ADVERTISED_10000baseT_Full; |
385 | ||
386 | if (mlx4_en_QUERY_PORT(priv->mdev, priv->port)) | |
387 | return -ENOMEM; | |
388 | ||
389 | trans_type = priv->port_state.transciver; | |
c27a02cd | 390 | if (netif_carrier_ok(dev)) { |
70739497 | 391 | ethtool_cmd_speed_set(cmd, priv->port_state.link_speed); |
c27a02cd YP |
392 | cmd->duplex = DUPLEX_FULL; |
393 | } else { | |
537fae01 JP |
394 | ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN); |
395 | cmd->duplex = DUPLEX_UNKNOWN; | |
c27a02cd | 396 | } |
7699517d YP |
397 | |
398 | if (trans_type > 0 && trans_type <= 0xC) { | |
399 | cmd->port = PORT_FIBRE; | |
400 | cmd->transceiver = XCVR_EXTERNAL; | |
401 | cmd->supported |= SUPPORTED_FIBRE; | |
402 | cmd->advertising |= ADVERTISED_FIBRE; | |
403 | } else if (trans_type == 0x80 || trans_type == 0) { | |
404 | cmd->port = PORT_TP; | |
405 | cmd->transceiver = XCVR_INTERNAL; | |
406 | cmd->supported |= SUPPORTED_TP; | |
407 | cmd->advertising |= ADVERTISED_TP; | |
408 | } else { | |
409 | cmd->port = -1; | |
410 | cmd->transceiver = -1; | |
411 | } | |
c27a02cd YP |
412 | return 0; |
413 | } | |
414 | ||
415 | static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
416 | { | |
417 | if ((cmd->autoneg == AUTONEG_ENABLE) || | |
25db0338 DD |
418 | (ethtool_cmd_speed(cmd) != SPEED_10000) || |
419 | (cmd->duplex != DUPLEX_FULL)) | |
c27a02cd YP |
420 | return -EINVAL; |
421 | ||
422 | /* Nothing to change */ | |
423 | return 0; | |
424 | } | |
425 | ||
426 | static int mlx4_en_get_coalesce(struct net_device *dev, | |
427 | struct ethtool_coalesce *coal) | |
428 | { | |
429 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
430 | ||
a19a848a YP |
431 | coal->tx_coalesce_usecs = priv->tx_usecs; |
432 | coal->tx_max_coalesced_frames = priv->tx_frames; | |
fbc6daf1 AV |
433 | coal->tx_max_coalesced_frames_irq = priv->tx_work_limit; |
434 | ||
c27a02cd YP |
435 | coal->rx_coalesce_usecs = priv->rx_usecs; |
436 | coal->rx_max_coalesced_frames = priv->rx_frames; | |
437 | ||
438 | coal->pkt_rate_low = priv->pkt_rate_low; | |
439 | coal->rx_coalesce_usecs_low = priv->rx_usecs_low; | |
440 | coal->pkt_rate_high = priv->pkt_rate_high; | |
441 | coal->rx_coalesce_usecs_high = priv->rx_usecs_high; | |
442 | coal->rate_sample_interval = priv->sample_interval; | |
443 | coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal; | |
fbc6daf1 | 444 | |
c27a02cd YP |
445 | return 0; |
446 | } | |
447 | ||
448 | static int mlx4_en_set_coalesce(struct net_device *dev, | |
449 | struct ethtool_coalesce *coal) | |
450 | { | |
451 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
c27a02cd | 452 | |
fbc6daf1 AV |
453 | if (!coal->tx_max_coalesced_frames_irq) |
454 | return -EINVAL; | |
455 | ||
c27a02cd YP |
456 | priv->rx_frames = (coal->rx_max_coalesced_frames == |
457 | MLX4_EN_AUTO_CONF) ? | |
3db36fb2 | 458 | MLX4_EN_RX_COAL_TARGET : |
c27a02cd YP |
459 | coal->rx_max_coalesced_frames; |
460 | priv->rx_usecs = (coal->rx_coalesce_usecs == | |
461 | MLX4_EN_AUTO_CONF) ? | |
462 | MLX4_EN_RX_COAL_TIME : | |
463 | coal->rx_coalesce_usecs; | |
464 | ||
a19a848a YP |
465 | /* Setting TX coalescing parameters */ |
466 | if (coal->tx_coalesce_usecs != priv->tx_usecs || | |
467 | coal->tx_max_coalesced_frames != priv->tx_frames) { | |
468 | priv->tx_usecs = coal->tx_coalesce_usecs; | |
469 | priv->tx_frames = coal->tx_max_coalesced_frames; | |
a19a848a YP |
470 | } |
471 | ||
c27a02cd YP |
472 | /* Set adaptive coalescing params */ |
473 | priv->pkt_rate_low = coal->pkt_rate_low; | |
474 | priv->rx_usecs_low = coal->rx_coalesce_usecs_low; | |
475 | priv->pkt_rate_high = coal->pkt_rate_high; | |
476 | priv->rx_usecs_high = coal->rx_coalesce_usecs_high; | |
477 | priv->sample_interval = coal->rate_sample_interval; | |
478 | priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce; | |
fbc6daf1 | 479 | priv->tx_work_limit = coal->tx_max_coalesced_frames_irq; |
c27a02cd | 480 | |
79c54b6b | 481 | return mlx4_en_moderation_update(priv); |
c27a02cd YP |
482 | } |
483 | ||
484 | static int mlx4_en_set_pauseparam(struct net_device *dev, | |
485 | struct ethtool_pauseparam *pause) | |
486 | { | |
487 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
488 | struct mlx4_en_dev *mdev = priv->mdev; | |
489 | int err; | |
490 | ||
278d436a IV |
491 | if (pause->autoneg) |
492 | return -EINVAL; | |
493 | ||
d53b93f2 YP |
494 | priv->prof->tx_pause = pause->tx_pause != 0; |
495 | priv->prof->rx_pause = pause->rx_pause != 0; | |
c27a02cd YP |
496 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, |
497 | priv->rx_skb_size + ETH_FCS_LEN, | |
d53b93f2 YP |
498 | priv->prof->tx_pause, |
499 | priv->prof->tx_ppp, | |
500 | priv->prof->rx_pause, | |
501 | priv->prof->rx_ppp); | |
c27a02cd | 502 | if (err) |
453a6082 | 503 | en_err(priv, "Failed setting pause params\n"); |
c27a02cd YP |
504 | |
505 | return err; | |
506 | } | |
507 | ||
508 | static void mlx4_en_get_pauseparam(struct net_device *dev, | |
509 | struct ethtool_pauseparam *pause) | |
510 | { | |
511 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
c27a02cd | 512 | |
d53b93f2 YP |
513 | pause->tx_pause = priv->prof->tx_pause; |
514 | pause->rx_pause = priv->prof->rx_pause; | |
c27a02cd YP |
515 | } |
516 | ||
18cc42a3 YP |
517 | static int mlx4_en_set_ringparam(struct net_device *dev, |
518 | struct ethtool_ringparam *param) | |
519 | { | |
520 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
521 | struct mlx4_en_dev *mdev = priv->mdev; | |
522 | u32 rx_size, tx_size; | |
523 | int port_up = 0; | |
524 | int err = 0; | |
525 | ||
526 | if (param->rx_jumbo_pending || param->rx_mini_pending) | |
527 | return -EINVAL; | |
528 | ||
529 | rx_size = roundup_pow_of_two(param->rx_pending); | |
530 | rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE); | |
bd531e36 | 531 | rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE); |
18cc42a3 YP |
532 | tx_size = roundup_pow_of_two(param->tx_pending); |
533 | tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE); | |
bd531e36 | 534 | tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE); |
18cc42a3 | 535 | |
41d942d5 EE |
536 | if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size : |
537 | priv->rx_ring[0]->size) && | |
538 | tx_size == priv->tx_ring[0]->size) | |
18cc42a3 YP |
539 | return 0; |
540 | ||
541 | mutex_lock(&mdev->state_lock); | |
542 | if (priv->port_up) { | |
543 | port_up = 1; | |
3484aac1 | 544 | mlx4_en_stop_port(dev, 1); |
18cc42a3 YP |
545 | } |
546 | ||
fe0af03c | 547 | mlx4_en_free_resources(priv); |
18cc42a3 YP |
548 | |
549 | priv->prof->tx_ring_size = tx_size; | |
550 | priv->prof->rx_ring_size = rx_size; | |
551 | ||
552 | err = mlx4_en_alloc_resources(priv); | |
553 | if (err) { | |
453a6082 | 554 | en_err(priv, "Failed reallocating port resources\n"); |
18cc42a3 YP |
555 | goto out; |
556 | } | |
557 | if (port_up) { | |
558 | err = mlx4_en_start_port(dev); | |
559 | if (err) | |
453a6082 | 560 | en_err(priv, "Failed starting port\n"); |
18cc42a3 YP |
561 | } |
562 | ||
79c54b6b | 563 | err = mlx4_en_moderation_update(priv); |
6b4d8d9f | 564 | |
18cc42a3 YP |
565 | out: |
566 | mutex_unlock(&mdev->state_lock); | |
567 | return err; | |
568 | } | |
569 | ||
c27a02cd YP |
570 | static void mlx4_en_get_ringparam(struct net_device *dev, |
571 | struct ethtool_ringparam *param) | |
572 | { | |
573 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
c27a02cd YP |
574 | |
575 | memset(param, 0, sizeof(*param)); | |
bd531e36 YP |
576 | param->rx_max_pending = MLX4_EN_MAX_RX_SIZE; |
577 | param->tx_max_pending = MLX4_EN_MAX_TX_SIZE; | |
bc081cec | 578 | param->rx_pending = priv->port_up ? |
41d942d5 EE |
579 | priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size; |
580 | param->tx_pending = priv->tx_ring[0]->size; | |
c27a02cd YP |
581 | } |
582 | ||
93d3e367 YP |
583 | static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev) |
584 | { | |
585 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
586 | ||
587 | return priv->rx_ring_num; | |
588 | } | |
589 | ||
fe62d001 | 590 | static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key) |
93d3e367 YP |
591 | { |
592 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
593 | struct mlx4_en_rss_map *rss_map = &priv->rss_map; | |
594 | int rss_rings; | |
595 | size_t n = priv->rx_ring_num; | |
596 | int err = 0; | |
597 | ||
598 | rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num; | |
599 | ||
600 | while (n--) { | |
601 | ring_index[n] = rss_map->qps[n % rss_rings].qpn - | |
602 | rss_map->base_qpn; | |
603 | } | |
604 | ||
605 | return err; | |
606 | } | |
607 | ||
fe62d001 BH |
608 | static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index, |
609 | const u8 *key) | |
93d3e367 YP |
610 | { |
611 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
612 | struct mlx4_en_dev *mdev = priv->mdev; | |
613 | int port_up = 0; | |
614 | int err = 0; | |
615 | int i; | |
616 | int rss_rings = 0; | |
617 | ||
618 | /* Calculate RSS table size and make sure flows are spread evenly | |
619 | * between rings | |
620 | */ | |
621 | for (i = 0; i < priv->rx_ring_num; i++) { | |
622 | if (i > 0 && !ring_index[i] && !rss_rings) | |
623 | rss_rings = i; | |
624 | ||
625 | if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num))) | |
626 | return -EINVAL; | |
627 | } | |
628 | ||
629 | if (!rss_rings) | |
630 | rss_rings = priv->rx_ring_num; | |
631 | ||
632 | /* RSS table size must be an order of 2 */ | |
633 | if (!is_power_of_2(rss_rings)) | |
634 | return -EINVAL; | |
635 | ||
636 | mutex_lock(&mdev->state_lock); | |
637 | if (priv->port_up) { | |
638 | port_up = 1; | |
3484aac1 | 639 | mlx4_en_stop_port(dev, 1); |
93d3e367 YP |
640 | } |
641 | ||
642 | priv->prof->rss_rings = rss_rings; | |
643 | ||
644 | if (port_up) { | |
645 | err = mlx4_en_start_port(dev); | |
646 | if (err) | |
647 | en_err(priv, "Failed starting port\n"); | |
648 | } | |
649 | ||
650 | mutex_unlock(&mdev->state_lock); | |
651 | return err; | |
652 | } | |
653 | ||
82067281 HHZ |
654 | #define all_zeros_or_all_ones(field) \ |
655 | ((field) == 0 || (field) == (__force typeof(field))-1) | |
656 | ||
657 | static int mlx4_en_validate_flow(struct net_device *dev, | |
658 | struct ethtool_rxnfc *cmd) | |
659 | { | |
660 | struct ethtool_usrip4_spec *l3_mask; | |
661 | struct ethtool_tcpip4_spec *l4_mask; | |
662 | struct ethhdr *eth_mask; | |
82067281 HHZ |
663 | |
664 | if (cmd->fs.location >= MAX_NUM_OF_FS_RULES) | |
665 | return -EINVAL; | |
666 | ||
520dfe3a YB |
667 | if (cmd->fs.flow_type & FLOW_MAC_EXT) { |
668 | /* dest mac mask must be ff:ff:ff:ff:ff:ff */ | |
669 | if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest)) | |
670 | return -EINVAL; | |
671 | } | |
672 | ||
673 | switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) { | |
82067281 HHZ |
674 | case TCP_V4_FLOW: |
675 | case UDP_V4_FLOW: | |
676 | if (cmd->fs.m_u.tcp_ip4_spec.tos) | |
677 | return -EINVAL; | |
678 | l4_mask = &cmd->fs.m_u.tcp_ip4_spec; | |
679 | /* don't allow mask which isn't all 0 or 1 */ | |
680 | if (!all_zeros_or_all_ones(l4_mask->ip4src) || | |
681 | !all_zeros_or_all_ones(l4_mask->ip4dst) || | |
682 | !all_zeros_or_all_ones(l4_mask->psrc) || | |
683 | !all_zeros_or_all_ones(l4_mask->pdst)) | |
684 | return -EINVAL; | |
685 | break; | |
686 | case IP_USER_FLOW: | |
687 | l3_mask = &cmd->fs.m_u.usr_ip4_spec; | |
688 | if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto || | |
689 | cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 || | |
690 | (!l3_mask->ip4src && !l3_mask->ip4dst) || | |
691 | !all_zeros_or_all_ones(l3_mask->ip4src) || | |
692 | !all_zeros_or_all_ones(l3_mask->ip4dst)) | |
693 | return -EINVAL; | |
694 | break; | |
695 | case ETHER_FLOW: | |
696 | eth_mask = &cmd->fs.m_u.ether_spec; | |
697 | /* source mac mask must not be set */ | |
c402b947 | 698 | if (!is_zero_ether_addr(eth_mask->h_source)) |
82067281 HHZ |
699 | return -EINVAL; |
700 | ||
701 | /* dest mac mask must be ff:ff:ff:ff:ff:ff */ | |
c402b947 | 702 | if (!is_broadcast_ether_addr(eth_mask->h_dest)) |
82067281 HHZ |
703 | return -EINVAL; |
704 | ||
705 | if (!all_zeros_or_all_ones(eth_mask->h_proto)) | |
706 | return -EINVAL; | |
707 | break; | |
708 | default: | |
709 | return -EINVAL; | |
710 | } | |
711 | ||
712 | if ((cmd->fs.flow_type & FLOW_EXT)) { | |
713 | if (cmd->fs.m_ext.vlan_etype || | |
8258bd27 HHZ |
714 | !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) == |
715 | 0 || | |
716 | (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) == | |
717 | cpu_to_be16(VLAN_VID_MASK))) | |
82067281 | 718 | return -EINVAL; |
8258bd27 | 719 | |
69d7126b HHZ |
720 | if (cmd->fs.m_ext.vlan_tci) { |
721 | if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID) | |
722 | return -EINVAL; | |
8258bd27 | 723 | |
69d7126b | 724 | } |
82067281 HHZ |
725 | } |
726 | ||
727 | return 0; | |
728 | } | |
729 | ||
f90a3673 HHZ |
730 | static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd, |
731 | struct list_head *rule_list_h, | |
732 | struct mlx4_spec_list *spec_l2, | |
733 | unsigned char *mac) | |
734 | { | |
735 | int err = 0; | |
736 | __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16); | |
737 | ||
738 | spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH; | |
739 | memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN); | |
740 | memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN); | |
741 | ||
8258bd27 HHZ |
742 | if ((cmd->fs.flow_type & FLOW_EXT) && |
743 | (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) { | |
f90a3673 | 744 | spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci; |
8258bd27 | 745 | spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK); |
f90a3673 HHZ |
746 | } |
747 | ||
748 | list_add_tail(&spec_l2->list, rule_list_h); | |
749 | ||
750 | return err; | |
751 | } | |
752 | ||
753 | static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv, | |
754 | struct ethtool_rxnfc *cmd, | |
755 | struct list_head *rule_list_h, | |
756 | struct mlx4_spec_list *spec_l2, | |
757 | __be32 ipv4_dst) | |
758 | { | |
f9d96862 | 759 | #ifdef CONFIG_INET |
f90a3673 HHZ |
760 | unsigned char mac[ETH_ALEN]; |
761 | ||
762 | if (!ipv4_is_multicast(ipv4_dst)) { | |
6bbb6d99 | 763 | if (cmd->fs.flow_type & FLOW_MAC_EXT) |
f90a3673 | 764 | memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN); |
6bbb6d99 YB |
765 | else |
766 | memcpy(&mac, priv->dev->dev_addr, ETH_ALEN); | |
f90a3673 HHZ |
767 | } else { |
768 | ip_eth_mc_map(ipv4_dst, mac); | |
769 | } | |
770 | ||
771 | return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]); | |
f9d96862 HHZ |
772 | #else |
773 | return -EINVAL; | |
774 | #endif | |
f90a3673 HHZ |
775 | } |
776 | ||
82067281 | 777 | static int add_ip_rule(struct mlx4_en_priv *priv, |
f90a3673 HHZ |
778 | struct ethtool_rxnfc *cmd, |
779 | struct list_head *list_h) | |
82067281 | 780 | { |
377d9739 | 781 | int err; |
f90a3673 HHZ |
782 | struct mlx4_spec_list *spec_l2 = NULL; |
783 | struct mlx4_spec_list *spec_l3 = NULL; | |
82067281 HHZ |
784 | struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec; |
785 | ||
f90a3673 HHZ |
786 | spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL); |
787 | spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL); | |
788 | if (!spec_l2 || !spec_l3) { | |
377d9739 HHZ |
789 | err = -ENOMEM; |
790 | goto free_spec; | |
82067281 HHZ |
791 | } |
792 | ||
377d9739 HHZ |
793 | err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2, |
794 | cmd->fs.h_u. | |
795 | usr_ip4_spec.ip4dst); | |
796 | if (err) | |
797 | goto free_spec; | |
82067281 HHZ |
798 | spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4; |
799 | spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src; | |
800 | if (l3_mask->ip4src) | |
801 | spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK; | |
802 | spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst; | |
803 | if (l3_mask->ip4dst) | |
804 | spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK; | |
805 | list_add_tail(&spec_l3->list, list_h); | |
806 | ||
807 | return 0; | |
377d9739 HHZ |
808 | |
809 | free_spec: | |
810 | kfree(spec_l2); | |
811 | kfree(spec_l3); | |
812 | return err; | |
82067281 HHZ |
813 | } |
814 | ||
815 | static int add_tcp_udp_rule(struct mlx4_en_priv *priv, | |
816 | struct ethtool_rxnfc *cmd, | |
817 | struct list_head *list_h, int proto) | |
818 | { | |
377d9739 | 819 | int err; |
f90a3673 HHZ |
820 | struct mlx4_spec_list *spec_l2 = NULL; |
821 | struct mlx4_spec_list *spec_l3 = NULL; | |
822 | struct mlx4_spec_list *spec_l4 = NULL; | |
82067281 HHZ |
823 | struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec; |
824 | ||
f90a3673 HHZ |
825 | spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL); |
826 | spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL); | |
827 | spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL); | |
828 | if (!spec_l2 || !spec_l3 || !spec_l4) { | |
377d9739 HHZ |
829 | err = -ENOMEM; |
830 | goto free_spec; | |
82067281 HHZ |
831 | } |
832 | ||
833 | spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4; | |
834 | ||
835 | if (proto == TCP_V4_FLOW) { | |
377d9739 HHZ |
836 | err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, |
837 | spec_l2, | |
838 | cmd->fs.h_u. | |
839 | tcp_ip4_spec.ip4dst); | |
840 | if (err) | |
841 | goto free_spec; | |
82067281 HHZ |
842 | spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP; |
843 | spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src; | |
844 | spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst; | |
845 | spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc; | |
846 | spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst; | |
847 | } else { | |
377d9739 HHZ |
848 | err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, |
849 | spec_l2, | |
850 | cmd->fs.h_u. | |
851 | udp_ip4_spec.ip4dst); | |
852 | if (err) | |
853 | goto free_spec; | |
82067281 HHZ |
854 | spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP; |
855 | spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src; | |
856 | spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst; | |
857 | spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc; | |
858 | spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst; | |
859 | } | |
860 | ||
861 | if (l4_mask->ip4src) | |
862 | spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK; | |
863 | if (l4_mask->ip4dst) | |
864 | spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK; | |
865 | ||
866 | if (l4_mask->psrc) | |
867 | spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK; | |
868 | if (l4_mask->pdst) | |
869 | spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK; | |
870 | ||
871 | list_add_tail(&spec_l3->list, list_h); | |
872 | list_add_tail(&spec_l4->list, list_h); | |
873 | ||
874 | return 0; | |
377d9739 HHZ |
875 | |
876 | free_spec: | |
877 | kfree(spec_l2); | |
878 | kfree(spec_l3); | |
879 | kfree(spec_l4); | |
880 | return err; | |
82067281 HHZ |
881 | } |
882 | ||
883 | static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev, | |
884 | struct ethtool_rxnfc *cmd, | |
885 | struct list_head *rule_list_h) | |
886 | { | |
887 | int err; | |
82067281 | 888 | struct ethhdr *eth_spec; |
82067281 | 889 | struct mlx4_spec_list *spec_l2; |
f90a3673 | 890 | struct mlx4_en_priv *priv = netdev_priv(dev); |
82067281 HHZ |
891 | |
892 | err = mlx4_en_validate_flow(dev, cmd); | |
893 | if (err) | |
894 | return err; | |
895 | ||
520dfe3a | 896 | switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) { |
82067281 | 897 | case ETHER_FLOW: |
f90a3673 HHZ |
898 | spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL); |
899 | if (!spec_l2) | |
900 | return -ENOMEM; | |
901 | ||
82067281 | 902 | eth_spec = &cmd->fs.h_u.ether_spec; |
f90a3673 HHZ |
903 | mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, |
904 | ð_spec->h_dest[0]); | |
82067281 HHZ |
905 | spec_l2->eth.ether_type = eth_spec->h_proto; |
906 | if (eth_spec->h_proto) | |
907 | spec_l2->eth.ether_type_enable = 1; | |
908 | break; | |
909 | case IP_USER_FLOW: | |
910 | err = add_ip_rule(priv, cmd, rule_list_h); | |
911 | break; | |
912 | case TCP_V4_FLOW: | |
913 | err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW); | |
914 | break; | |
915 | case UDP_V4_FLOW: | |
916 | err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW); | |
917 | break; | |
918 | } | |
919 | ||
920 | return err; | |
921 | } | |
922 | ||
923 | static int mlx4_en_flow_replace(struct net_device *dev, | |
924 | struct ethtool_rxnfc *cmd) | |
925 | { | |
926 | int err; | |
927 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
928 | struct ethtool_flow_id *loc_rule; | |
929 | struct mlx4_spec_list *spec, *tmp_spec; | |
930 | u32 qpn; | |
931 | u64 reg_id; | |
932 | ||
933 | struct mlx4_net_trans_rule rule = { | |
934 | .queue_mode = MLX4_NET_TRANS_Q_FIFO, | |
935 | .exclusive = 0, | |
936 | .allow_loopback = 1, | |
f9162539 | 937 | .promisc_mode = MLX4_FS_REGULAR, |
82067281 HHZ |
938 | }; |
939 | ||
940 | rule.port = priv->port; | |
941 | rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location; | |
942 | INIT_LIST_HEAD(&rule.list); | |
943 | ||
944 | /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */ | |
945 | if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC) | |
cabdc8ee | 946 | qpn = priv->drop_qp.qpn; |
82067281 HHZ |
947 | else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) { |
948 | qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1); | |
949 | } else { | |
950 | if (cmd->fs.ring_cookie >= priv->rx_ring_num) { | |
1a91de28 | 951 | en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n", |
82067281 HHZ |
952 | cmd->fs.ring_cookie); |
953 | return -EINVAL; | |
954 | } | |
955 | qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn; | |
956 | if (!qpn) { | |
1a91de28 | 957 | en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n", |
82067281 HHZ |
958 | cmd->fs.ring_cookie); |
959 | return -EINVAL; | |
960 | } | |
961 | } | |
962 | rule.qpn = qpn; | |
963 | err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list); | |
964 | if (err) | |
965 | goto out_free_list; | |
966 | ||
967 | loc_rule = &priv->ethtool_rules[cmd->fs.location]; | |
968 | if (loc_rule->id) { | |
969 | err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id); | |
970 | if (err) { | |
971 | en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n", | |
972 | cmd->fs.location, loc_rule->id); | |
973 | goto out_free_list; | |
974 | } | |
975 | loc_rule->id = 0; | |
976 | memset(&loc_rule->flow_spec, 0, | |
977 | sizeof(struct ethtool_rx_flow_spec)); | |
0d256c0e | 978 | list_del(&loc_rule->list); |
82067281 HHZ |
979 | } |
980 | err = mlx4_flow_attach(priv->mdev->dev, &rule, ®_id); | |
981 | if (err) { | |
1a91de28 | 982 | en_err(priv, "Fail to attach network rule at location %d\n", |
82067281 HHZ |
983 | cmd->fs.location); |
984 | goto out_free_list; | |
985 | } | |
986 | loc_rule->id = reg_id; | |
987 | memcpy(&loc_rule->flow_spec, &cmd->fs, | |
988 | sizeof(struct ethtool_rx_flow_spec)); | |
0d256c0e | 989 | list_add_tail(&loc_rule->list, &priv->ethtool_list); |
82067281 HHZ |
990 | |
991 | out_free_list: | |
992 | list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) { | |
993 | list_del(&spec->list); | |
994 | kfree(spec); | |
995 | } | |
996 | return err; | |
997 | } | |
998 | ||
999 | static int mlx4_en_flow_detach(struct net_device *dev, | |
1000 | struct ethtool_rxnfc *cmd) | |
1001 | { | |
1002 | int err = 0; | |
1003 | struct ethtool_flow_id *rule; | |
1004 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1005 | ||
1006 | if (cmd->fs.location >= MAX_NUM_OF_FS_RULES) | |
1007 | return -EINVAL; | |
1008 | ||
1009 | rule = &priv->ethtool_rules[cmd->fs.location]; | |
1010 | if (!rule->id) { | |
1011 | err = -ENOENT; | |
1012 | goto out; | |
1013 | } | |
1014 | ||
1015 | err = mlx4_flow_detach(priv->mdev->dev, rule->id); | |
1016 | if (err) { | |
1017 | en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n", | |
1018 | cmd->fs.location, rule->id); | |
1019 | goto out; | |
1020 | } | |
1021 | rule->id = 0; | |
1022 | memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec)); | |
0d256c0e | 1023 | list_del(&rule->list); |
82067281 HHZ |
1024 | out: |
1025 | return err; | |
1026 | ||
1027 | } | |
1028 | ||
1029 | static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd, | |
1030 | int loc) | |
1031 | { | |
1032 | int err = 0; | |
1033 | struct ethtool_flow_id *rule; | |
1034 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1035 | ||
1036 | if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES) | |
1037 | return -EINVAL; | |
1038 | ||
1039 | rule = &priv->ethtool_rules[loc]; | |
1040 | if (rule->id) | |
1041 | memcpy(&cmd->fs, &rule->flow_spec, | |
1042 | sizeof(struct ethtool_rx_flow_spec)); | |
1043 | else | |
1044 | err = -ENOENT; | |
1045 | ||
1046 | return err; | |
1047 | } | |
1048 | ||
1049 | static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv) | |
1050 | { | |
1051 | ||
1052 | int i, res = 0; | |
1053 | for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) { | |
1054 | if (priv->ethtool_rules[i].id) | |
1055 | res++; | |
1056 | } | |
1057 | return res; | |
1058 | ||
1059 | } | |
1060 | ||
93d3e367 YP |
1061 | static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, |
1062 | u32 *rule_locs) | |
1063 | { | |
1064 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
82067281 | 1065 | struct mlx4_en_dev *mdev = priv->mdev; |
93d3e367 | 1066 | int err = 0; |
82067281 HHZ |
1067 | int i = 0, priority = 0; |
1068 | ||
1069 | if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT || | |
1070 | cmd->cmd == ETHTOOL_GRXCLSRULE || | |
1071 | cmd->cmd == ETHTOOL_GRXCLSRLALL) && | |
280fce1e HHZ |
1072 | (mdev->dev->caps.steering_mode != |
1073 | MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)) | |
82067281 | 1074 | return -EINVAL; |
93d3e367 YP |
1075 | |
1076 | switch (cmd->cmd) { | |
1077 | case ETHTOOL_GRXRINGS: | |
1078 | cmd->data = priv->rx_ring_num; | |
1079 | break; | |
82067281 HHZ |
1080 | case ETHTOOL_GRXCLSRLCNT: |
1081 | cmd->rule_cnt = mlx4_en_get_num_flows(priv); | |
1082 | break; | |
1083 | case ETHTOOL_GRXCLSRULE: | |
1084 | err = mlx4_en_get_flow(dev, cmd, cmd->fs.location); | |
1085 | break; | |
1086 | case ETHTOOL_GRXCLSRLALL: | |
1087 | while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) { | |
1088 | err = mlx4_en_get_flow(dev, cmd, i); | |
1089 | if (!err) | |
1090 | rule_locs[priority++] = i; | |
1091 | i++; | |
1092 | } | |
1093 | err = 0; | |
1094 | break; | |
93d3e367 YP |
1095 | default: |
1096 | err = -EOPNOTSUPP; | |
1097 | break; | |
1098 | } | |
1099 | ||
1100 | return err; | |
1101 | } | |
1102 | ||
82067281 HHZ |
1103 | static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) |
1104 | { | |
1105 | int err = 0; | |
1106 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1107 | struct mlx4_en_dev *mdev = priv->mdev; | |
1108 | ||
280fce1e HHZ |
1109 | if (mdev->dev->caps.steering_mode != |
1110 | MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up) | |
82067281 HHZ |
1111 | return -EINVAL; |
1112 | ||
1113 | switch (cmd->cmd) { | |
1114 | case ETHTOOL_SRXCLSRLINS: | |
1115 | err = mlx4_en_flow_replace(dev, cmd); | |
1116 | break; | |
1117 | case ETHTOOL_SRXCLSRLDEL: | |
1118 | err = mlx4_en_flow_detach(dev, cmd); | |
1119 | break; | |
1120 | default: | |
1121 | en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd); | |
1122 | return -EINVAL; | |
1123 | } | |
1124 | ||
1125 | return err; | |
1126 | } | |
1127 | ||
d317966b AV |
1128 | static void mlx4_en_get_channels(struct net_device *dev, |
1129 | struct ethtool_channels *channel) | |
1130 | { | |
1131 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1132 | ||
1133 | memset(channel, 0, sizeof(*channel)); | |
1134 | ||
1135 | channel->max_rx = MAX_RX_RINGS; | |
1136 | channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP; | |
1137 | ||
1138 | channel->rx_count = priv->rx_ring_num; | |
1139 | channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP; | |
1140 | } | |
1141 | ||
1142 | static int mlx4_en_set_channels(struct net_device *dev, | |
1143 | struct ethtool_channels *channel) | |
1144 | { | |
1145 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1146 | struct mlx4_en_dev *mdev = priv->mdev; | |
da26a625 | 1147 | int port_up = 0; |
d317966b AV |
1148 | int err = 0; |
1149 | ||
1150 | if (channel->other_count || channel->combined_count || | |
1151 | channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP || | |
1152 | channel->rx_count > MAX_RX_RINGS || | |
1153 | !channel->tx_count || !channel->rx_count) | |
1154 | return -EINVAL; | |
1155 | ||
1156 | mutex_lock(&mdev->state_lock); | |
1157 | if (priv->port_up) { | |
1158 | port_up = 1; | |
3484aac1 | 1159 | mlx4_en_stop_port(dev, 1); |
d317966b AV |
1160 | } |
1161 | ||
1162 | mlx4_en_free_resources(priv); | |
1163 | ||
1164 | priv->num_tx_rings_p_up = channel->tx_count; | |
1165 | priv->tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP; | |
1166 | priv->rx_ring_num = channel->rx_count; | |
1167 | ||
1168 | err = mlx4_en_alloc_resources(priv); | |
1169 | if (err) { | |
1170 | en_err(priv, "Failed reallocating port resources\n"); | |
1171 | goto out; | |
1172 | } | |
1173 | ||
1174 | netif_set_real_num_tx_queues(dev, priv->tx_ring_num); | |
1175 | netif_set_real_num_rx_queues(dev, priv->rx_ring_num); | |
1176 | ||
f5b6345b IS |
1177 | if (dev->num_tc) |
1178 | mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP); | |
d317966b AV |
1179 | |
1180 | en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num); | |
1181 | en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num); | |
1182 | ||
1183 | if (port_up) { | |
1184 | err = mlx4_en_start_port(dev); | |
1185 | if (err) | |
1186 | en_err(priv, "Failed starting port\n"); | |
1187 | } | |
1188 | ||
1189 | err = mlx4_en_moderation_update(priv); | |
1190 | ||
1191 | out: | |
1192 | mutex_unlock(&mdev->state_lock); | |
1193 | return err; | |
1194 | } | |
1195 | ||
ec693d47 AV |
1196 | static int mlx4_en_get_ts_info(struct net_device *dev, |
1197 | struct ethtool_ts_info *info) | |
1198 | { | |
1199 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1200 | struct mlx4_en_dev *mdev = priv->mdev; | |
1201 | int ret; | |
1202 | ||
1203 | ret = ethtool_op_get_ts_info(dev, info); | |
1204 | if (ret) | |
1205 | return ret; | |
1206 | ||
1207 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { | |
1208 | info->so_timestamping |= | |
1209 | SOF_TIMESTAMPING_TX_HARDWARE | | |
1210 | SOF_TIMESTAMPING_RX_HARDWARE | | |
1211 | SOF_TIMESTAMPING_RAW_HARDWARE; | |
1212 | ||
1213 | info->tx_types = | |
1214 | (1 << HWTSTAMP_TX_OFF) | | |
1215 | (1 << HWTSTAMP_TX_ON); | |
1216 | ||
1217 | info->rx_filters = | |
1218 | (1 << HWTSTAMP_FILTER_NONE) | | |
1219 | (1 << HWTSTAMP_FILTER_ALL); | |
ad7d4eae SB |
1220 | |
1221 | if (mdev->ptp_clock) | |
1222 | info->phc_index = ptp_clock_index(mdev->ptp_clock); | |
ec693d47 AV |
1223 | } |
1224 | ||
1225 | return ret; | |
1226 | } | |
1227 | ||
3f6148e7 | 1228 | static int mlx4_en_set_priv_flags(struct net_device *dev, u32 flags) |
0fef9d03 AV |
1229 | { |
1230 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1231 | bool bf_enabled_new = !!(flags & MLX4_EN_PRIV_FLAGS_BLUEFLAME); | |
1232 | bool bf_enabled_old = !!(priv->pflags & MLX4_EN_PRIV_FLAGS_BLUEFLAME); | |
1233 | int i; | |
1234 | ||
1235 | if (bf_enabled_new == bf_enabled_old) | |
1236 | return 0; /* Nothing to do */ | |
1237 | ||
1238 | if (bf_enabled_new) { | |
1239 | bool bf_supported = true; | |
1240 | ||
1241 | for (i = 0; i < priv->tx_ring_num; i++) | |
1242 | bf_supported &= priv->tx_ring[i]->bf_alloced; | |
1243 | ||
1244 | if (!bf_supported) { | |
1245 | en_err(priv, "BlueFlame is not supported\n"); | |
1246 | return -EINVAL; | |
1247 | } | |
1248 | ||
1249 | priv->pflags |= MLX4_EN_PRIV_FLAGS_BLUEFLAME; | |
1250 | } else { | |
1251 | priv->pflags &= ~MLX4_EN_PRIV_FLAGS_BLUEFLAME; | |
1252 | } | |
1253 | ||
1254 | for (i = 0; i < priv->tx_ring_num; i++) | |
1255 | priv->tx_ring[i]->bf_enabled = bf_enabled_new; | |
1256 | ||
1257 | en_info(priv, "BlueFlame %s\n", | |
1258 | bf_enabled_new ? "Enabled" : "Disabled"); | |
1259 | ||
1260 | return 0; | |
1261 | } | |
1262 | ||
3f6148e7 | 1263 | static u32 mlx4_en_get_priv_flags(struct net_device *dev) |
0fef9d03 AV |
1264 | { |
1265 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1266 | ||
1267 | return priv->pflags; | |
1268 | } | |
1269 | ||
1556b874 ED |
1270 | static int mlx4_en_get_tunable(struct net_device *dev, |
1271 | const struct ethtool_tunable *tuna, | |
1272 | void *data) | |
1273 | { | |
1274 | const struct mlx4_en_priv *priv = netdev_priv(dev); | |
1275 | int ret = 0; | |
1276 | ||
1277 | switch (tuna->id) { | |
1278 | case ETHTOOL_TX_COPYBREAK: | |
1279 | *(u32 *)data = priv->prof->inline_thold; | |
1280 | break; | |
1281 | default: | |
1282 | ret = -EINVAL; | |
1283 | break; | |
1284 | } | |
1285 | ||
1286 | return ret; | |
1287 | } | |
1288 | ||
1289 | static int mlx4_en_set_tunable(struct net_device *dev, | |
1290 | const struct ethtool_tunable *tuna, | |
1291 | const void *data) | |
1292 | { | |
1293 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1294 | int val, ret = 0; | |
1295 | ||
1296 | switch (tuna->id) { | |
1297 | case ETHTOOL_TX_COPYBREAK: | |
1298 | val = *(u32 *)data; | |
1299 | if (val < MIN_PKT_LEN || val > MAX_INLINE) | |
1300 | ret = -EINVAL; | |
1301 | else | |
1302 | priv->prof->inline_thold = val; | |
1303 | break; | |
1304 | default: | |
1305 | ret = -EINVAL; | |
1306 | break; | |
1307 | } | |
1308 | ||
1309 | return ret; | |
1310 | } | |
1311 | ||
0fef9d03 | 1312 | |
c27a02cd YP |
1313 | const struct ethtool_ops mlx4_en_ethtool_ops = { |
1314 | .get_drvinfo = mlx4_en_get_drvinfo, | |
1315 | .get_settings = mlx4_en_get_settings, | |
1316 | .set_settings = mlx4_en_set_settings, | |
c27a02cd | 1317 | .get_link = ethtool_op_get_link, |
c27a02cd YP |
1318 | .get_strings = mlx4_en_get_strings, |
1319 | .get_sset_count = mlx4_en_get_sset_count, | |
1320 | .get_ethtool_stats = mlx4_en_get_ethtool_stats, | |
e7c1c2c4 | 1321 | .self_test = mlx4_en_self_test, |
c27a02cd | 1322 | .get_wol = mlx4_en_get_wol, |
14c07b13 | 1323 | .set_wol = mlx4_en_set_wol, |
c27a02cd YP |
1324 | .get_msglevel = mlx4_en_get_msglevel, |
1325 | .set_msglevel = mlx4_en_set_msglevel, | |
1326 | .get_coalesce = mlx4_en_get_coalesce, | |
1327 | .set_coalesce = mlx4_en_set_coalesce, | |
1328 | .get_pauseparam = mlx4_en_get_pauseparam, | |
1329 | .set_pauseparam = mlx4_en_set_pauseparam, | |
1330 | .get_ringparam = mlx4_en_get_ringparam, | |
18cc42a3 | 1331 | .set_ringparam = mlx4_en_set_ringparam, |
93d3e367 | 1332 | .get_rxnfc = mlx4_en_get_rxnfc, |
82067281 | 1333 | .set_rxnfc = mlx4_en_set_rxnfc, |
93d3e367 | 1334 | .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size, |
fe62d001 BH |
1335 | .get_rxfh = mlx4_en_get_rxfh, |
1336 | .set_rxfh = mlx4_en_set_rxfh, | |
d317966b AV |
1337 | .get_channels = mlx4_en_get_channels, |
1338 | .set_channels = mlx4_en_set_channels, | |
ec693d47 | 1339 | .get_ts_info = mlx4_en_get_ts_info, |
0fef9d03 AV |
1340 | .set_priv_flags = mlx4_en_set_priv_flags, |
1341 | .get_priv_flags = mlx4_en_get_priv_flags, | |
1556b874 ED |
1342 | .get_tunable = mlx4_en_get_tunable, |
1343 | .set_tunable = mlx4_en_set_tunable, | |
c27a02cd YP |
1344 | }; |
1345 | ||
1346 | ||
1347 | ||
1348 | ||
1349 |