net/mlx4: Implement promiscuous mode with device managed flow-steering
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_ethtool.c
CommitLineData
c27a02cd
YP
1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/ethtool.h>
36#include <linux/netdevice.h>
37
38#include "mlx4_en.h"
39#include "en_port.h"
40
c27a02cd 41
c27a02cd
YP
42static void
43mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
44{
45 struct mlx4_en_priv *priv = netdev_priv(dev);
46 struct mlx4_en_dev *mdev = priv->mdev;
47
612a94d6
RJ
48 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
49 strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
50 sizeof(drvinfo->version));
51 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
52 "%d.%d.%d",
c27a02cd
YP
53 (u16) (mdev->dev->caps.fw_ver >> 32),
54 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
55 (u16) (mdev->dev->caps.fw_ver & 0xffff));
612a94d6
RJ
56 strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev),
57 sizeof(drvinfo->bus_info));
c27a02cd
YP
58 drvinfo->n_stats = 0;
59 drvinfo->regdump_len = 0;
60 drvinfo->eedump_len = 0;
61}
62
c27a02cd
YP
63static const char main_strings[][ETH_GSTRING_LEN] = {
64 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
65 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
66 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
67 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
68 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
69 "tx_heartbeat_errors", "tx_window_errors",
70
71 /* port statistics */
fa37a958 72 "tso_packets",
c27a02cd
YP
73 "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
74 "rx_csum_good", "rx_csum_none", "tx_chksum_offload",
75
76 /* packet statistics */
77 "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
78 "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
79 "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
80 "tx_prio_6", "tx_prio_7",
81};
d61702f1 82#define NUM_MAIN_STATS 21
c27a02cd
YP
83#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)
84
e7c1c2c4 85static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
fd9071ec 86 "Interrupt Test",
e7c1c2c4
YP
87 "Link Test",
88 "Speed Test",
89 "Register Test",
90 "Loopback Test",
91};
92
c27a02cd
YP
93static u32 mlx4_en_get_msglevel(struct net_device *dev)
94{
95 return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
96}
97
98static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
99{
100 ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
101}
102
103static void mlx4_en_get_wol(struct net_device *netdev,
104 struct ethtool_wolinfo *wol)
105{
14c07b13
YP
106 struct mlx4_en_priv *priv = netdev_priv(netdev);
107 int err = 0;
108 u64 config = 0;
559a9f1d 109 u64 mask;
14c07b13 110
559a9f1d
OD
111 if ((priv->port < 1) || (priv->port > 2)) {
112 en_err(priv, "Failed to get WoL information\n");
113 return;
114 }
115
116 mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
117 MLX4_DEV_CAP_FLAG_WOL_PORT2;
118
119 if (!(priv->mdev->dev->caps.flags & mask)) {
14c07b13
YP
120 wol->supported = 0;
121 wol->wolopts = 0;
122 return;
123 }
124
125 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
126 if (err) {
127 en_err(priv, "Failed to get WoL information\n");
128 return;
129 }
130
131 if (config & MLX4_EN_WOL_MAGIC)
132 wol->supported = WAKE_MAGIC;
133 else
134 wol->supported = 0;
135
136 if (config & MLX4_EN_WOL_ENABLED)
137 wol->wolopts = WAKE_MAGIC;
138 else
139 wol->wolopts = 0;
140}
141
142static int mlx4_en_set_wol(struct net_device *netdev,
143 struct ethtool_wolinfo *wol)
144{
145 struct mlx4_en_priv *priv = netdev_priv(netdev);
146 u64 config = 0;
147 int err = 0;
559a9f1d
OD
148 u64 mask;
149
150 if ((priv->port < 1) || (priv->port > 2))
151 return -EOPNOTSUPP;
152
153 mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
154 MLX4_DEV_CAP_FLAG_WOL_PORT2;
14c07b13 155
559a9f1d 156 if (!(priv->mdev->dev->caps.flags & mask))
14c07b13
YP
157 return -EOPNOTSUPP;
158
159 if (wol->supported & ~WAKE_MAGIC)
160 return -EINVAL;
161
162 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
163 if (err) {
164 en_err(priv, "Failed to get WoL info, unable to modify\n");
165 return err;
166 }
167
168 if (wol->wolopts & WAKE_MAGIC) {
169 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
170 MLX4_EN_WOL_MAGIC;
171 } else {
172 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
173 config |= MLX4_EN_WOL_DO_MODIFY;
174 }
175
176 err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
177 if (err)
178 en_err(priv, "Failed to set WoL information\n");
179
180 return err;
c27a02cd
YP
181}
182
183static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
184{
185 struct mlx4_en_priv *priv = netdev_priv(dev);
93ece0c1 186 int bit_count = hweight64(priv->stats_bitmap);
c27a02cd 187
e7c1c2c4
YP
188 switch (sset) {
189 case ETH_SS_STATS:
93ece0c1 190 return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) +
e7c1c2c4
YP
191 (priv->tx_ring_num + priv->rx_ring_num) * 2;
192 case ETH_SS_TEST:
ccf86321
OG
193 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
194 & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
e7c1c2c4 195 default:
c27a02cd 196 return -EOPNOTSUPP;
e7c1c2c4 197 }
c27a02cd
YP
198}
199
200static void mlx4_en_get_ethtool_stats(struct net_device *dev,
201 struct ethtool_stats *stats, uint64_t *data)
202{
203 struct mlx4_en_priv *priv = netdev_priv(dev);
204 int index = 0;
93ece0c1 205 int i, j = 0;
c27a02cd
YP
206
207 spin_lock_bh(&priv->stats_lock);
208
93ece0c1
EE
209 if (!(priv->stats_bitmap)) {
210 for (i = 0; i < NUM_MAIN_STATS; i++)
211 data[index++] =
212 ((unsigned long *) &priv->stats)[i];
213 for (i = 0; i < NUM_PORT_STATS; i++)
214 data[index++] =
215 ((unsigned long *) &priv->port_stats)[i];
216 for (i = 0; i < NUM_PKT_STATS; i++)
217 data[index++] =
218 ((unsigned long *) &priv->pkstats)[i];
219 } else {
220 for (i = 0; i < NUM_MAIN_STATS; i++) {
221 if ((priv->stats_bitmap >> j) & 1)
222 data[index++] =
223 ((unsigned long *) &priv->stats)[i];
224 j++;
225 }
226 for (i = 0; i < NUM_PORT_STATS; i++) {
227 if ((priv->stats_bitmap >> j) & 1)
228 data[index++] =
229 ((unsigned long *) &priv->port_stats)[i];
230 j++;
231 }
232 }
c27a02cd
YP
233 for (i = 0; i < priv->tx_ring_num; i++) {
234 data[index++] = priv->tx_ring[i].packets;
235 data[index++] = priv->tx_ring[i].bytes;
236 }
237 for (i = 0; i < priv->rx_ring_num; i++) {
238 data[index++] = priv->rx_ring[i].packets;
239 data[index++] = priv->rx_ring[i].bytes;
240 }
c27a02cd
YP
241 spin_unlock_bh(&priv->stats_lock);
242
243}
244
e7c1c2c4
YP
245static void mlx4_en_self_test(struct net_device *dev,
246 struct ethtool_test *etest, u64 *buf)
247{
248 mlx4_en_ex_selftest(dev, &etest->flags, buf);
249}
250
c27a02cd
YP
251static void mlx4_en_get_strings(struct net_device *dev,
252 uint32_t stringset, uint8_t *data)
253{
254 struct mlx4_en_priv *priv = netdev_priv(dev);
255 int index = 0;
256 int i;
257
e7c1c2c4
YP
258 switch (stringset) {
259 case ETH_SS_TEST:
260 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
261 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
ccf86321 262 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
e7c1c2c4
YP
263 for (; i < MLX4_EN_NUM_SELF_TEST; i++)
264 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
265 break;
266
267 case ETH_SS_STATS:
268 /* Add main counters */
93ece0c1
EE
269 if (!priv->stats_bitmap) {
270 for (i = 0; i < NUM_MAIN_STATS; i++)
271 strcpy(data + (index++) * ETH_GSTRING_LEN,
272 main_strings[i]);
273 for (i = 0; i < NUM_PORT_STATS; i++)
274 strcpy(data + (index++) * ETH_GSTRING_LEN,
275 main_strings[i +
276 NUM_MAIN_STATS]);
277 for (i = 0; i < NUM_PKT_STATS; i++)
278 strcpy(data + (index++) * ETH_GSTRING_LEN,
279 main_strings[i +
280 NUM_MAIN_STATS +
281 NUM_PORT_STATS]);
282 } else
283 for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) {
284 if ((priv->stats_bitmap >> i) & 1) {
285 strcpy(data +
286 (index++) * ETH_GSTRING_LEN,
287 main_strings[i]);
288 }
289 if (!(priv->stats_bitmap >> i))
290 break;
291 }
e7c1c2c4
YP
292 for (i = 0; i < priv->tx_ring_num; i++) {
293 sprintf(data + (index++) * ETH_GSTRING_LEN,
294 "tx%d_packets", i);
295 sprintf(data + (index++) * ETH_GSTRING_LEN,
296 "tx%d_bytes", i);
297 }
298 for (i = 0; i < priv->rx_ring_num; i++) {
299 sprintf(data + (index++) * ETH_GSTRING_LEN,
300 "rx%d_packets", i);
301 sprintf(data + (index++) * ETH_GSTRING_LEN,
302 "rx%d_bytes", i);
303 }
e7c1c2c4
YP
304 break;
305 }
c27a02cd
YP
306}
307
308static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
309{
7699517d
YP
310 struct mlx4_en_priv *priv = netdev_priv(dev);
311 int trans_type;
312
c27a02cd
YP
313 cmd->autoneg = AUTONEG_DISABLE;
314 cmd->supported = SUPPORTED_10000baseT_Full;
7699517d
YP
315 cmd->advertising = ADVERTISED_10000baseT_Full;
316
317 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
318 return -ENOMEM;
319
320 trans_type = priv->port_state.transciver;
c27a02cd 321 if (netif_carrier_ok(dev)) {
70739497 322 ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
c27a02cd
YP
323 cmd->duplex = DUPLEX_FULL;
324 } else {
70739497 325 ethtool_cmd_speed_set(cmd, -1);
c27a02cd
YP
326 cmd->duplex = -1;
327 }
7699517d
YP
328
329 if (trans_type > 0 && trans_type <= 0xC) {
330 cmd->port = PORT_FIBRE;
331 cmd->transceiver = XCVR_EXTERNAL;
332 cmd->supported |= SUPPORTED_FIBRE;
333 cmd->advertising |= ADVERTISED_FIBRE;
334 } else if (trans_type == 0x80 || trans_type == 0) {
335 cmd->port = PORT_TP;
336 cmd->transceiver = XCVR_INTERNAL;
337 cmd->supported |= SUPPORTED_TP;
338 cmd->advertising |= ADVERTISED_TP;
339 } else {
340 cmd->port = -1;
341 cmd->transceiver = -1;
342 }
c27a02cd
YP
343 return 0;
344}
345
346static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
347{
348 if ((cmd->autoneg == AUTONEG_ENABLE) ||
25db0338
DD
349 (ethtool_cmd_speed(cmd) != SPEED_10000) ||
350 (cmd->duplex != DUPLEX_FULL))
c27a02cd
YP
351 return -EINVAL;
352
353 /* Nothing to change */
354 return 0;
355}
356
357static int mlx4_en_get_coalesce(struct net_device *dev,
358 struct ethtool_coalesce *coal)
359{
360 struct mlx4_en_priv *priv = netdev_priv(dev);
361
a19a848a
YP
362 coal->tx_coalesce_usecs = priv->tx_usecs;
363 coal->tx_max_coalesced_frames = priv->tx_frames;
c27a02cd
YP
364 coal->rx_coalesce_usecs = priv->rx_usecs;
365 coal->rx_max_coalesced_frames = priv->rx_frames;
366
367 coal->pkt_rate_low = priv->pkt_rate_low;
368 coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
369 coal->pkt_rate_high = priv->pkt_rate_high;
370 coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
371 coal->rate_sample_interval = priv->sample_interval;
372 coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
373 return 0;
374}
375
376static int mlx4_en_set_coalesce(struct net_device *dev,
377 struct ethtool_coalesce *coal)
378{
379 struct mlx4_en_priv *priv = netdev_priv(dev);
380 int err, i;
381
382 priv->rx_frames = (coal->rx_max_coalesced_frames ==
383 MLX4_EN_AUTO_CONF) ?
3db36fb2 384 MLX4_EN_RX_COAL_TARGET :
c27a02cd
YP
385 coal->rx_max_coalesced_frames;
386 priv->rx_usecs = (coal->rx_coalesce_usecs ==
387 MLX4_EN_AUTO_CONF) ?
388 MLX4_EN_RX_COAL_TIME :
389 coal->rx_coalesce_usecs;
390
a19a848a
YP
391 /* Setting TX coalescing parameters */
392 if (coal->tx_coalesce_usecs != priv->tx_usecs ||
393 coal->tx_max_coalesced_frames != priv->tx_frames) {
394 priv->tx_usecs = coal->tx_coalesce_usecs;
395 priv->tx_frames = coal->tx_max_coalesced_frames;
396 for (i = 0; i < priv->tx_ring_num; i++) {
397 priv->tx_cq[i].moder_cnt = priv->tx_frames;
398 priv->tx_cq[i].moder_time = priv->tx_usecs;
399 if (mlx4_en_set_cq_moder(priv, &priv->tx_cq[i])) {
400 en_warn(priv, "Failed changing moderation "
401 "for TX cq %d\n", i);
402 }
403 }
404 }
405
c27a02cd
YP
406 /* Set adaptive coalescing params */
407 priv->pkt_rate_low = coal->pkt_rate_low;
408 priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
409 priv->pkt_rate_high = coal->pkt_rate_high;
410 priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
411 priv->sample_interval = coal->rate_sample_interval;
412 priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
c27a02cd
YP
413 if (priv->adaptive_rx_coal)
414 return 0;
415
416 for (i = 0; i < priv->rx_ring_num; i++) {
417 priv->rx_cq[i].moder_cnt = priv->rx_frames;
418 priv->rx_cq[i].moder_time = priv->rx_usecs;
6b4d8d9f 419 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
c27a02cd
YP
420 err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
421 if (err)
422 return err;
423 }
424 return 0;
425}
426
427static int mlx4_en_set_pauseparam(struct net_device *dev,
428 struct ethtool_pauseparam *pause)
429{
430 struct mlx4_en_priv *priv = netdev_priv(dev);
431 struct mlx4_en_dev *mdev = priv->mdev;
432 int err;
433
d53b93f2
YP
434 priv->prof->tx_pause = pause->tx_pause != 0;
435 priv->prof->rx_pause = pause->rx_pause != 0;
c27a02cd
YP
436 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
437 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP
438 priv->prof->tx_pause,
439 priv->prof->tx_ppp,
440 priv->prof->rx_pause,
441 priv->prof->rx_ppp);
c27a02cd 442 if (err)
453a6082 443 en_err(priv, "Failed setting pause params\n");
c27a02cd
YP
444
445 return err;
446}
447
448static void mlx4_en_get_pauseparam(struct net_device *dev,
449 struct ethtool_pauseparam *pause)
450{
451 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 452
d53b93f2
YP
453 pause->tx_pause = priv->prof->tx_pause;
454 pause->rx_pause = priv->prof->rx_pause;
c27a02cd
YP
455}
456
18cc42a3
YP
457static int mlx4_en_set_ringparam(struct net_device *dev,
458 struct ethtool_ringparam *param)
459{
460 struct mlx4_en_priv *priv = netdev_priv(dev);
461 struct mlx4_en_dev *mdev = priv->mdev;
462 u32 rx_size, tx_size;
463 int port_up = 0;
464 int err = 0;
6b4d8d9f 465 int i;
18cc42a3
YP
466
467 if (param->rx_jumbo_pending || param->rx_mini_pending)
468 return -EINVAL;
469
470 rx_size = roundup_pow_of_two(param->rx_pending);
471 rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
bd531e36 472 rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
18cc42a3
YP
473 tx_size = roundup_pow_of_two(param->tx_pending);
474 tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
bd531e36 475 tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
18cc42a3 476
bc081cec
YP
477 if (rx_size == (priv->port_up ? priv->rx_ring[0].actual_size :
478 priv->rx_ring[0].size) &&
479 tx_size == priv->tx_ring[0].size)
18cc42a3
YP
480 return 0;
481
482 mutex_lock(&mdev->state_lock);
483 if (priv->port_up) {
484 port_up = 1;
485 mlx4_en_stop_port(dev);
486 }
487
fe0af03c 488 mlx4_en_free_resources(priv);
18cc42a3
YP
489
490 priv->prof->tx_ring_size = tx_size;
491 priv->prof->rx_ring_size = rx_size;
492
493 err = mlx4_en_alloc_resources(priv);
494 if (err) {
453a6082 495 en_err(priv, "Failed reallocating port resources\n");
18cc42a3
YP
496 goto out;
497 }
498 if (port_up) {
499 err = mlx4_en_start_port(dev);
500 if (err)
453a6082 501 en_err(priv, "Failed starting port\n");
18cc42a3
YP
502 }
503
6b4d8d9f
AG
504 for (i = 0; i < priv->rx_ring_num; i++) {
505 priv->rx_cq[i].moder_cnt = priv->rx_frames;
506 priv->rx_cq[i].moder_time = priv->rx_usecs;
507 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
508 err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
509 if (err)
510 goto out;
511 }
512
18cc42a3
YP
513out:
514 mutex_unlock(&mdev->state_lock);
515 return err;
516}
517
c27a02cd
YP
518static void mlx4_en_get_ringparam(struct net_device *dev,
519 struct ethtool_ringparam *param)
520{
521 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd
YP
522
523 memset(param, 0, sizeof(*param));
bd531e36
YP
524 param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
525 param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
bc081cec
YP
526 param->rx_pending = priv->port_up ?
527 priv->rx_ring[0].actual_size : priv->rx_ring[0].size;
528 param->tx_pending = priv->tx_ring[0].size;
c27a02cd
YP
529}
530
93d3e367
YP
531static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
532{
533 struct mlx4_en_priv *priv = netdev_priv(dev);
534
535 return priv->rx_ring_num;
536}
537
538static int mlx4_en_get_rxfh_indir(struct net_device *dev, u32 *ring_index)
539{
540 struct mlx4_en_priv *priv = netdev_priv(dev);
541 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
542 int rss_rings;
543 size_t n = priv->rx_ring_num;
544 int err = 0;
545
546 rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
547
548 while (n--) {
549 ring_index[n] = rss_map->qps[n % rss_rings].qpn -
550 rss_map->base_qpn;
551 }
552
553 return err;
554}
555
556static int mlx4_en_set_rxfh_indir(struct net_device *dev,
557 const u32 *ring_index)
558{
559 struct mlx4_en_priv *priv = netdev_priv(dev);
560 struct mlx4_en_dev *mdev = priv->mdev;
561 int port_up = 0;
562 int err = 0;
563 int i;
564 int rss_rings = 0;
565
566 /* Calculate RSS table size and make sure flows are spread evenly
567 * between rings
568 */
569 for (i = 0; i < priv->rx_ring_num; i++) {
570 if (i > 0 && !ring_index[i] && !rss_rings)
571 rss_rings = i;
572
573 if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
574 return -EINVAL;
575 }
576
577 if (!rss_rings)
578 rss_rings = priv->rx_ring_num;
579
580 /* RSS table size must be an order of 2 */
581 if (!is_power_of_2(rss_rings))
582 return -EINVAL;
583
584 mutex_lock(&mdev->state_lock);
585 if (priv->port_up) {
586 port_up = 1;
587 mlx4_en_stop_port(dev);
588 }
589
590 priv->prof->rss_rings = rss_rings;
591
592 if (port_up) {
593 err = mlx4_en_start_port(dev);
594 if (err)
595 en_err(priv, "Failed starting port\n");
596 }
597
598 mutex_unlock(&mdev->state_lock);
599 return err;
600}
601
602static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
603 u32 *rule_locs)
604{
605 struct mlx4_en_priv *priv = netdev_priv(dev);
606 int err = 0;
607
608 switch (cmd->cmd) {
609 case ETHTOOL_GRXRINGS:
610 cmd->data = priv->rx_ring_num;
611 break;
612 default:
613 err = -EOPNOTSUPP;
614 break;
615 }
616
617 return err;
618}
619
c27a02cd
YP
620const struct ethtool_ops mlx4_en_ethtool_ops = {
621 .get_drvinfo = mlx4_en_get_drvinfo,
622 .get_settings = mlx4_en_get_settings,
623 .set_settings = mlx4_en_set_settings,
c27a02cd 624 .get_link = ethtool_op_get_link,
c27a02cd
YP
625 .get_strings = mlx4_en_get_strings,
626 .get_sset_count = mlx4_en_get_sset_count,
627 .get_ethtool_stats = mlx4_en_get_ethtool_stats,
e7c1c2c4 628 .self_test = mlx4_en_self_test,
c27a02cd 629 .get_wol = mlx4_en_get_wol,
14c07b13 630 .set_wol = mlx4_en_set_wol,
c27a02cd
YP
631 .get_msglevel = mlx4_en_get_msglevel,
632 .set_msglevel = mlx4_en_set_msglevel,
633 .get_coalesce = mlx4_en_get_coalesce,
634 .set_coalesce = mlx4_en_set_coalesce,
635 .get_pauseparam = mlx4_en_get_pauseparam,
636 .set_pauseparam = mlx4_en_set_pauseparam,
637 .get_ringparam = mlx4_en_get_ringparam,
18cc42a3 638 .set_ringparam = mlx4_en_set_ringparam,
93d3e367
YP
639 .get_rxnfc = mlx4_en_get_rxnfc,
640 .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
641 .get_rxfh_indir = mlx4_en_get_rxfh_indir,
642 .set_rxfh_indir = mlx4_en_set_rxfh_indir,
c27a02cd
YP
643};
644
645
646
647
648
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