[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_ethtool.c

/*
 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#include <linux/kernel.h>
#include <linux/ethtool.h>
#include <linux/netdevice.h>

#include "mlx4_en.h"
#include "en_port.h"


static void
mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	struct mlx4_en_dev *mdev = priv->mdev;

	strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
	strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
		sizeof(drvinfo->version));
	snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
		"%d.%d.%d",
		(u16) (mdev->dev->caps.fw_ver >> 32),
		(u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
		(u16) (mdev->dev->caps.fw_ver & 0xffff));
	strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev),
		sizeof(drvinfo->bus_info));
	drvinfo->n_stats = 0;
	drvinfo->regdump_len = 0;
	drvinfo->eedump_len = 0;
}

static const char main_strings[][ETH_GSTRING_LEN] = {
	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
	"tx_heartbeat_errors", "tx_window_errors",

	/* port statistics */
	"tso_packets",
	"queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
	"rx_csum_good", "rx_csum_none", "tx_chksum_offload",

	/* packet statistics */
	"broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
	"rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
	"tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
	"tx_prio_6", "tx_prio_7",
};
#define NUM_MAIN_STATS	21
#define NUM_ALL_STATS	(NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)

static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
	"Interupt Test",
	"Link Test",
	"Speed Test",
	"Register Test",
	"Loopback Test",
};

static u32 mlx4_en_get_msglevel(struct net_device *dev)
{
	return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
}

static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
{
	((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
}

static void mlx4_en_get_wol(struct net_device *netdev,
			    struct ethtool_wolinfo *wol)
{
	struct mlx4_en_priv *priv = netdev_priv(netdev);
	int err = 0;
	u64 config = 0;
	u64 mask;

	if ((priv->port < 1) || (priv->port > 2)) {
		en_err(priv, "Failed to get WoL information\n");
		return;
	}

	mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
		MLX4_DEV_CAP_FLAG_WOL_PORT2;

	if (!(priv->mdev->dev->caps.flags & mask)) {
		wol->supported = 0;
		wol->wolopts = 0;
		return;
	}

	err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
	if (err) {
		en_err(priv, "Failed to get WoL information\n");
		return;
	}

	if (config & MLX4_EN_WOL_MAGIC)
		wol->supported = WAKE_MAGIC;
	else
		wol->supported = 0;

	if (config & MLX4_EN_WOL_ENABLED)
		wol->wolopts = WAKE_MAGIC;
	else
		wol->wolopts = 0;
}

static int mlx4_en_set_wol(struct net_device *netdev,
			    struct ethtool_wolinfo *wol)
{
	struct mlx4_en_priv *priv = netdev_priv(netdev);
	u64 config = 0;
	int err = 0;
	u64 mask;

	if ((priv->port < 1) || (priv->port > 2))
		return -EOPNOTSUPP;

	mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
		MLX4_DEV_CAP_FLAG_WOL_PORT2;

	if (!(priv->mdev->dev->caps.flags & mask))
		return -EOPNOTSUPP;

	if (wol->supported & ~WAKE_MAGIC)
		return -EINVAL;

	err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
	if (err) {
		en_err(priv, "Failed to get WoL info, unable to modify\n");
		return err;
	}

	if (wol->wolopts & WAKE_MAGIC) {
		config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
				MLX4_EN_WOL_MAGIC;
	} else {
		config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
		config |= MLX4_EN_WOL_DO_MODIFY;
	}

	err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
	if (err)
		en_err(priv, "Failed to set WoL information\n");

	return err;
}

static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	int bit_count = hweight64(priv->stats_bitmap);

	switch (sset) {
	case ETH_SS_STATS:
		return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) +
			(priv->tx_ring_num + priv->rx_ring_num) * 2;
	case ETH_SS_TEST:
		return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
					& MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
	default:
		return -EOPNOTSUPP;
	}
}

static void mlx4_en_get_ethtool_stats(struct net_device *dev,
		struct ethtool_stats *stats, uint64_t *data)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	int index = 0;
	int i, j = 0;

	spin_lock_bh(&priv->stats_lock);

	if (!(priv->stats_bitmap)) {
		for (i = 0; i < NUM_MAIN_STATS; i++)
			data[index++] =
				((unsigned long *) &priv->stats)[i];
		for (i = 0; i < NUM_PORT_STATS; i++)
			data[index++] =
				((unsigned long *) &priv->port_stats)[i];
		for (i = 0; i < NUM_PKT_STATS; i++)
			data[index++] =
				((unsigned long *) &priv->pkstats)[i];
	} else {
		for (i = 0; i < NUM_MAIN_STATS; i++) {
			if ((priv->stats_bitmap >> j) & 1)
				data[index++] =
				((unsigned long *) &priv->stats)[i];
			j++;
		}
		for (i = 0; i < NUM_PORT_STATS; i++) {
			if ((priv->stats_bitmap >> j) & 1)
				data[index++] =
				((unsigned long *) &priv->port_stats)[i];
			j++;
		}
	}
	for (i = 0; i < priv->tx_ring_num; i++) {
		data[index++] = priv->tx_ring[i].packets;
		data[index++] = priv->tx_ring[i].bytes;
	}
	for (i = 0; i < priv->rx_ring_num; i++) {
		data[index++] = priv->rx_ring[i].packets;
		data[index++] = priv->rx_ring[i].bytes;
	}
	spin_unlock_bh(&priv->stats_lock);

}

static void mlx4_en_self_test(struct net_device *dev,
			      struct ethtool_test *etest, u64 *buf)
{
	mlx4_en_ex_selftest(dev, &etest->flags, buf);
}

static void mlx4_en_get_strings(struct net_device *dev,
				uint32_t stringset, uint8_t *data)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	int index = 0;
	int i;

	switch (stringset) {
	case ETH_SS_TEST:
		for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
			strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
		if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
			for (; i < MLX4_EN_NUM_SELF_TEST; i++)
				strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
		break;

	case ETH_SS_STATS:
		/* Add main counters */
		if (!priv->stats_bitmap) {
			for (i = 0; i < NUM_MAIN_STATS; i++)
				strcpy(data + (index++) * ETH_GSTRING_LEN,
					main_strings[i]);
			for (i = 0; i < NUM_PORT_STATS; i++)
				strcpy(data + (index++) * ETH_GSTRING_LEN,
					main_strings[i +
					NUM_MAIN_STATS]);
			for (i = 0; i < NUM_PKT_STATS; i++)
				strcpy(data + (index++) * ETH_GSTRING_LEN,
					main_strings[i +
					NUM_MAIN_STATS +
					NUM_PORT_STATS]);
		} else
			for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) {
				if ((priv->stats_bitmap >> i) & 1) {
					strcpy(data +
					       (index++) * ETH_GSTRING_LEN,
					       main_strings[i]);
				}
				if (!(priv->stats_bitmap >> i))
					break;
			}
		for (i = 0; i < priv->tx_ring_num; i++) {
			sprintf(data + (index++) * ETH_GSTRING_LEN,
				"tx%d_packets", i);
			sprintf(data + (index++) * ETH_GSTRING_LEN,
				"tx%d_bytes", i);
		}
		for (i = 0; i < priv->rx_ring_num; i++) {
			sprintf(data + (index++) * ETH_GSTRING_LEN,
				"rx%d_packets", i);
			sprintf(data + (index++) * ETH_GSTRING_LEN,
				"rx%d_bytes", i);
		}
		break;
	}
}

static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	int trans_type;

	cmd->autoneg = AUTONEG_DISABLE;
	cmd->supported = SUPPORTED_10000baseT_Full;
	cmd->advertising = ADVERTISED_10000baseT_Full;

	if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
		return -ENOMEM;

	trans_type = priv->port_state.transciver;
	if (netif_carrier_ok(dev)) {
		ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
		cmd->duplex = DUPLEX_FULL;
	} else {
		ethtool_cmd_speed_set(cmd, -1);
		cmd->duplex = -1;
	}

	if (trans_type > 0 && trans_type <= 0xC) {
		cmd->port = PORT_FIBRE;
		cmd->transceiver = XCVR_EXTERNAL;
		cmd->supported |= SUPPORTED_FIBRE;
		cmd->advertising |= ADVERTISED_FIBRE;
	} else if (trans_type == 0x80 || trans_type == 0) {
		cmd->port = PORT_TP;
		cmd->transceiver = XCVR_INTERNAL;
		cmd->supported |= SUPPORTED_TP;
		cmd->advertising |= ADVERTISED_TP;
	} else  {
		cmd->port = -1;
		cmd->transceiver = -1;
	}
	return 0;
}

static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
	if ((cmd->autoneg == AUTONEG_ENABLE) ||
	    (ethtool_cmd_speed(cmd) != SPEED_10000) ||
	    (cmd->duplex != DUPLEX_FULL))
		return -EINVAL;

	/* Nothing to change */
	return 0;
}

static int mlx4_en_get_coalesce(struct net_device *dev,
			      struct ethtool_coalesce *coal)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);

	coal->tx_coalesce_usecs = 0;
	coal->tx_max_coalesced_frames = 0;
	coal->rx_coalesce_usecs = priv->rx_usecs;
	coal->rx_max_coalesced_frames = priv->rx_frames;

	coal->pkt_rate_low = priv->pkt_rate_low;
	coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
	coal->pkt_rate_high = priv->pkt_rate_high;
	coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
	coal->rate_sample_interval = priv->sample_interval;
	coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
	return 0;
}

static int mlx4_en_set_coalesce(struct net_device *dev,
			      struct ethtool_coalesce *coal)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	int err, i;

	priv->rx_frames = (coal->rx_max_coalesced_frames ==
			   MLX4_EN_AUTO_CONF) ?
				MLX4_EN_RX_COAL_TARGET :
				coal->rx_max_coalesced_frames;
	priv->rx_usecs = (coal->rx_coalesce_usecs ==
			  MLX4_EN_AUTO_CONF) ?
				MLX4_EN_RX_COAL_TIME :
				coal->rx_coalesce_usecs;

	/* Set adaptive coalescing params */
	priv->pkt_rate_low = coal->pkt_rate_low;
	priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
	priv->pkt_rate_high = coal->pkt_rate_high;
	priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
	priv->sample_interval = coal->rate_sample_interval;
	priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
	if (priv->adaptive_rx_coal)
		return 0;

	for (i = 0; i < priv->rx_ring_num; i++) {
		priv->rx_cq[i].moder_cnt = priv->rx_frames;
		priv->rx_cq[i].moder_time = priv->rx_usecs;
		priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
		err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
		if (err)
			return err;
	}
	return 0;
}

static int mlx4_en_set_pauseparam(struct net_device *dev,
				struct ethtool_pauseparam *pause)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	struct mlx4_en_dev *mdev = priv->mdev;
	int err;

	priv->prof->tx_pause = pause->tx_pause != 0;
	priv->prof->rx_pause = pause->rx_pause != 0;
	err = mlx4_SET_PORT_general(mdev->dev, priv->port,
				    priv->rx_skb_size + ETH_FCS_LEN,
				    priv->prof->tx_pause,
				    priv->prof->tx_ppp,
				    priv->prof->rx_pause,
				    priv->prof->rx_ppp);
	if (err)
		en_err(priv, "Failed setting pause params\n");

	return err;
}

static void mlx4_en_get_pauseparam(struct net_device *dev,
				 struct ethtool_pauseparam *pause)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);

	pause->tx_pause = priv->prof->tx_pause;
	pause->rx_pause = priv->prof->rx_pause;
}

static int mlx4_en_set_ringparam(struct net_device *dev,
				 struct ethtool_ringparam *param)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	struct mlx4_en_dev *mdev = priv->mdev;
	u32 rx_size, tx_size;
	int port_up = 0;
	int err = 0;
	int i;

	if (param->rx_jumbo_pending || param->rx_mini_pending)
		return -EINVAL;

	rx_size = roundup_pow_of_two(param->rx_pending);
	rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
	rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
	tx_size = roundup_pow_of_two(param->tx_pending);
	tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
	tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);

	if (rx_size == (priv->port_up ? priv->rx_ring[0].actual_size :
					priv->rx_ring[0].size) &&
	    tx_size == priv->tx_ring[0].size)
		return 0;

	mutex_lock(&mdev->state_lock);
	if (priv->port_up) {
		port_up = 1;
		mlx4_en_stop_port(dev);
	}

	mlx4_en_free_resources(priv);

	priv->prof->tx_ring_size = tx_size;
	priv->prof->rx_ring_size = rx_size;

	err = mlx4_en_alloc_resources(priv);
	if (err) {
		en_err(priv, "Failed reallocating port resources\n");
		goto out;
	}
	if (port_up) {
		err = mlx4_en_start_port(dev);
		if (err)
			en_err(priv, "Failed starting port\n");
	}

	for (i = 0; i < priv->rx_ring_num; i++) {
		priv->rx_cq[i].moder_cnt = priv->rx_frames;
		priv->rx_cq[i].moder_time = priv->rx_usecs;
		priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
		err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
		if (err)
			goto out;
	}

out:
	mutex_unlock(&mdev->state_lock);
	return err;
}

static void mlx4_en_get_ringparam(struct net_device *dev,
				  struct ethtool_ringparam *param)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);

	memset(param, 0, sizeof(*param));
	param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
	param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
	param->rx_pending = priv->port_up ?
		priv->rx_ring[0].actual_size : priv->rx_ring[0].size;
	param->tx_pending = priv->tx_ring[0].size;
}

static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);

	return priv->rx_ring_num;
}

static int mlx4_en_get_rxfh_indir(struct net_device *dev, u32 *ring_index)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	struct mlx4_en_rss_map *rss_map = &priv->rss_map;
	int rss_rings;
	size_t n = priv->rx_ring_num;
	int err = 0;

	rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;

	while (n--) {
		ring_index[n] = rss_map->qps[n % rss_rings].qpn -
			rss_map->base_qpn;
	}

	return err;
}

static int mlx4_en_set_rxfh_indir(struct net_device *dev,
		const u32 *ring_index)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	struct mlx4_en_dev *mdev = priv->mdev;
	int port_up = 0;
	int err = 0;
	int i;
	int rss_rings = 0;

	/* Calculate RSS table size and make sure flows are spread evenly
	 * between rings
	 */
	for (i = 0; i < priv->rx_ring_num; i++) {
		if (i > 0 && !ring_index[i] && !rss_rings)
			rss_rings = i;

		if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
			return -EINVAL;
	}

	if (!rss_rings)
		rss_rings = priv->rx_ring_num;

	/* RSS table size must be an order of 2 */
	if (!is_power_of_2(rss_rings))
		return -EINVAL;

	mutex_lock(&mdev->state_lock);
	if (priv->port_up) {
		port_up = 1;
		mlx4_en_stop_port(dev);
	}

	priv->prof->rss_rings = rss_rings;

	if (port_up) {
		err = mlx4_en_start_port(dev);
		if (err)
			en_err(priv, "Failed starting port\n");
	}

	mutex_unlock(&mdev->state_lock);
	return err;
}

static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
			     u32 *rule_locs)
{
	struct mlx4_en_priv *priv = netdev_priv(dev);
	int err = 0;

	switch (cmd->cmd) {
	case ETHTOOL_GRXRINGS:
		cmd->data = priv->rx_ring_num;
		break;
	default:
		err = -EOPNOTSUPP;
		break;
	}

	return err;
}

const struct ethtool_ops mlx4_en_ethtool_ops = {
	.get_drvinfo = mlx4_en_get_drvinfo,
	.get_settings = mlx4_en_get_settings,
	.set_settings = mlx4_en_set_settings,
	.get_link = ethtool_op_get_link,
	.get_strings = mlx4_en_get_strings,
	.get_sset_count = mlx4_en_get_sset_count,
	.get_ethtool_stats = mlx4_en_get_ethtool_stats,
	.self_test = mlx4_en_self_test,
	.get_wol = mlx4_en_get_wol,
	.set_wol = mlx4_en_set_wol,
	.get_msglevel = mlx4_en_get_msglevel,
	.set_msglevel = mlx4_en_set_msglevel,
	.get_coalesce = mlx4_en_get_coalesce,
	.set_coalesce = mlx4_en_set_coalesce,
	.get_pauseparam = mlx4_en_get_pauseparam,
	.set_pauseparam = mlx4_en_set_pauseparam,
	.get_ringparam = mlx4_en_get_ringparam,
	.set_ringparam = mlx4_en_set_ringparam,
	.get_rxnfc = mlx4_en_get_rxnfc,
	.get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
	.get_rxfh_indir = mlx4_en_get_rxfh_indir,
	.set_rxfh_indir = mlx4_en_set_rxfh_indir,
};
Commit	Line	Data
c27a02cd YP	1	/*
	2	* Copyright (c) 2007 Mellanox Technologies. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*
	32	*/
	33
	34	#include <linux/kernel.h>
	35	#include <linux/ethtool.h>
	36	#include <linux/netdevice.h>
	37
	38	#include "mlx4_en.h"
	39	#include "en_port.h"
	40
c27a02cd	41
c27a02cd YP	42	static void
	43	mlx4_en_get_drvinfo(struct net_device dev, struct ethtool_drvinfo drvinfo)
	44	{
	45	struct mlx4_en_priv *priv = netdev_priv(dev);
	46	struct mlx4_en_dev *mdev = priv->mdev;
	47
612a94d6 RJ	48	strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
	49	strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
	50	sizeof(drvinfo->version));
	51	snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
	52	"%d.%d.%d",
c27a02cd YP	53	(u16) (mdev->dev->caps.fw_ver >> 32),
	54	(u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
	55	(u16) (mdev->dev->caps.fw_ver & 0xffff));
612a94d6 RJ	56	strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev),
612a94d6 RJ	57	sizeof(drvinfo->bus_info));
c27a02cd YP	58	drvinfo->n_stats = 0;
	59	drvinfo->regdump_len = 0;
	60	drvinfo->eedump_len = 0;
	61	}
	62
c27a02cd YP	63	static const char main_strings[][ETH_GSTRING_LEN] = {
	64	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
	65	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
	66	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
	67	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
	68	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
	69	"tx_heartbeat_errors", "tx_window_errors",
	70
	71	/* port statistics */
fa37a958	72	"tso_packets",
c27a02cd YP	73	"queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
	74	"rx_csum_good", "rx_csum_none", "tx_chksum_offload",
	75
	76	/* packet statistics */
	77	"broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
	78	"rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
	79	"tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
	80	"tx_prio_6", "tx_prio_7",
	81	};
d61702f1	82	#define NUM_MAIN_STATS 21
c27a02cd YP	83	#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)
c27a02cd YP	84
e7c1c2c4 YP	85	static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
	86	"Interupt Test",
	87	"Link Test",
	88	"Speed Test",
	89	"Register Test",
	90	"Loopback Test",
	91	};
	92
c27a02cd YP	93	static u32 mlx4_en_get_msglevel(struct net_device *dev)
	94	{
	95	return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
	96	}
	97
	98	static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
	99	{
	100	((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
	101	}
	102
	103	static void mlx4_en_get_wol(struct net_device *netdev,
	104	struct ethtool_wolinfo *wol)
	105	{
14c07b13 YP	106	struct mlx4_en_priv *priv = netdev_priv(netdev);
	107	int err = 0;
	108	u64 config = 0;
559a9f1d	109	u64 mask;
14c07b13	110
559a9f1d OD	111	if ((priv->port < 1) \|\| (priv->port > 2)) {
	112	en_err(priv, "Failed to get WoL information\n");
	113	return;
	114	}
	115
	116	mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
	117	MLX4_DEV_CAP_FLAG_WOL_PORT2;
	118
	119	if (!(priv->mdev->dev->caps.flags & mask)) {
14c07b13 YP	120	wol->supported = 0;
	121	wol->wolopts = 0;
	122	return;
	123	}
	124
	125	err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
	126	if (err) {
	127	en_err(priv, "Failed to get WoL information\n");
	128	return;
	129	}
	130
	131	if (config & MLX4_EN_WOL_MAGIC)
	132	wol->supported = WAKE_MAGIC;
	133	else
	134	wol->supported = 0;
	135
	136	if (config & MLX4_EN_WOL_ENABLED)
	137	wol->wolopts = WAKE_MAGIC;
	138	else
	139	wol->wolopts = 0;
	140	}
	141
	142	static int mlx4_en_set_wol(struct net_device *netdev,
	143	struct ethtool_wolinfo *wol)
	144	{
	145	struct mlx4_en_priv *priv = netdev_priv(netdev);
	146	u64 config = 0;
	147	int err = 0;
559a9f1d OD	148	u64 mask;
	149
	150	if ((priv->port < 1) \|\| (priv->port > 2))
	151	return -EOPNOTSUPP;
	152
	153	mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
	154	MLX4_DEV_CAP_FLAG_WOL_PORT2;
14c07b13	155
559a9f1d	156	if (!(priv->mdev->dev->caps.flags & mask))
14c07b13 YP	157	return -EOPNOTSUPP;
	158
	159	if (wol->supported & ~WAKE_MAGIC)
	160	return -EINVAL;
	161
	162	err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
	163	if (err) {
	164	en_err(priv, "Failed to get WoL info, unable to modify\n");
	165	return err;
	166	}
	167
	168	if (wol->wolopts & WAKE_MAGIC) {
	169	config \|= MLX4_EN_WOL_DO_MODIFY \| MLX4_EN_WOL_ENABLED \|
	170	MLX4_EN_WOL_MAGIC;
	171	} else {
	172	config &= ~(MLX4_EN_WOL_ENABLED \| MLX4_EN_WOL_MAGIC);
	173	config \|= MLX4_EN_WOL_DO_MODIFY;
	174	}
	175
	176	err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
	177	if (err)
	178	en_err(priv, "Failed to set WoL information\n");
	179
	180	return err;
c27a02cd YP	181	}
	182
	183	static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
	184	{
	185	struct mlx4_en_priv *priv = netdev_priv(dev);
93ece0c1	186	int bit_count = hweight64(priv->stats_bitmap);
c27a02cd	187
e7c1c2c4 YP	188	switch (sset) {
e7c1c2c4 YP	189	case ETH_SS_STATS:
93ece0c1	190	return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) +
e7c1c2c4 YP	191	(priv->tx_ring_num + priv->rx_ring_num) * 2;
e7c1c2c4 YP	192	case ETH_SS_TEST:
ccf86321 OG	193	return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
ccf86321 OG	194	& MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
e7c1c2c4	195	default:
c27a02cd	196	return -EOPNOTSUPP;
e7c1c2c4	197	}
c27a02cd YP	198	}
	199
	200	static void mlx4_en_get_ethtool_stats(struct net_device *dev,
	201	struct ethtool_stats stats, uint64_t data)
	202	{
	203	struct mlx4_en_priv *priv = netdev_priv(dev);
	204	int index = 0;
93ece0c1	205	int i, j = 0;
c27a02cd YP	206
	207	spin_lock_bh(&priv->stats_lock);
	208
93ece0c1 EE	209	if (!(priv->stats_bitmap)) {
	210	for (i = 0; i < NUM_MAIN_STATS; i++)
	211	data[index++] =
	212	((unsigned long *) &priv->stats)[i];
	213	for (i = 0; i < NUM_PORT_STATS; i++)
	214	data[index++] =
	215	((unsigned long *) &priv->port_stats)[i];
	216	for (i = 0; i < NUM_PKT_STATS; i++)
	217	data[index++] =
	218	((unsigned long *) &priv->pkstats)[i];
	219	} else {
	220	for (i = 0; i < NUM_MAIN_STATS; i++) {
	221	if ((priv->stats_bitmap >> j) & 1)
	222	data[index++] =
	223	((unsigned long *) &priv->stats)[i];
	224	j++;
	225	}
	226	for (i = 0; i < NUM_PORT_STATS; i++) {
	227	if ((priv->stats_bitmap >> j) & 1)
	228	data[index++] =
	229	((unsigned long *) &priv->port_stats)[i];
	230	j++;
	231	}
	232	}
c27a02cd YP	233	for (i = 0; i < priv->tx_ring_num; i++) {
	234	data[index++] = priv->tx_ring[i].packets;
	235	data[index++] = priv->tx_ring[i].bytes;
	236	}
	237	for (i = 0; i < priv->rx_ring_num; i++) {
	238	data[index++] = priv->rx_ring[i].packets;
	239	data[index++] = priv->rx_ring[i].bytes;
	240	}
c27a02cd YP	241	spin_unlock_bh(&priv->stats_lock);
	242
	243	}
	244
e7c1c2c4 YP	245	static void mlx4_en_self_test(struct net_device *dev,
	246	struct ethtool_test etest, u64 buf)
	247	{
	248	mlx4_en_ex_selftest(dev, &etest->flags, buf);
	249	}
	250
c27a02cd YP	251	static void mlx4_en_get_strings(struct net_device *dev,
	252	uint32_t stringset, uint8_t *data)
	253	{
	254	struct mlx4_en_priv *priv = netdev_priv(dev);
	255	int index = 0;
	256	int i;
	257
e7c1c2c4 YP	258	switch (stringset) {
	259	case ETH_SS_TEST:
	260	for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
	261	strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
ccf86321	262	if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
e7c1c2c4 YP	263	for (; i < MLX4_EN_NUM_SELF_TEST; i++)
	264	strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
	265	break;
	266
	267	case ETH_SS_STATS:
	268	/* Add main counters */
93ece0c1 EE	269	if (!priv->stats_bitmap) {
	270	for (i = 0; i < NUM_MAIN_STATS; i++)
	271	strcpy(data + (index++) * ETH_GSTRING_LEN,
	272	main_strings[i]);
	273	for (i = 0; i < NUM_PORT_STATS; i++)
	274	strcpy(data + (index++) * ETH_GSTRING_LEN,
	275	main_strings[i +
	276	NUM_MAIN_STATS]);
	277	for (i = 0; i < NUM_PKT_STATS; i++)
	278	strcpy(data + (index++) * ETH_GSTRING_LEN,
	279	main_strings[i +
	280	NUM_MAIN_STATS +
	281	NUM_PORT_STATS]);
	282	} else
	283	for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) {
	284	if ((priv->stats_bitmap >> i) & 1) {
	285	strcpy(data +
	286	(index++) * ETH_GSTRING_LEN,
	287	main_strings[i]);
	288	}
	289	if (!(priv->stats_bitmap >> i))
	290	break;
	291	}
e7c1c2c4 YP	292	for (i = 0; i < priv->tx_ring_num; i++) {
	293	sprintf(data + (index++) * ETH_GSTRING_LEN,
	294	"tx%d_packets", i);
	295	sprintf(data + (index++) * ETH_GSTRING_LEN,
	296	"tx%d_bytes", i);
	297	}
	298	for (i = 0; i < priv->rx_ring_num; i++) {
	299	sprintf(data + (index++) * ETH_GSTRING_LEN,
	300	"rx%d_packets", i);
	301	sprintf(data + (index++) * ETH_GSTRING_LEN,
	302	"rx%d_bytes", i);
	303	}
e7c1c2c4 YP	304	break;
e7c1c2c4 YP	305	}
c27a02cd YP	306	}
	307
	308	static int mlx4_en_get_settings(struct net_device dev, struct ethtool_cmd cmd)
	309	{
7699517d YP	310	struct mlx4_en_priv *priv = netdev_priv(dev);
	311	int trans_type;
	312
c27a02cd YP	313	cmd->autoneg = AUTONEG_DISABLE;
c27a02cd YP	314	cmd->supported = SUPPORTED_10000baseT_Full;
7699517d YP	315	cmd->advertising = ADVERTISED_10000baseT_Full;
	316
	317	if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
	318	return -ENOMEM;
	319
	320	trans_type = priv->port_state.transciver;
c27a02cd	321	if (netif_carrier_ok(dev)) {
70739497	322	ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
c27a02cd YP	323	cmd->duplex = DUPLEX_FULL;
c27a02cd YP	324	} else {
70739497	325	ethtool_cmd_speed_set(cmd, -1);
c27a02cd YP	326	cmd->duplex = -1;
c27a02cd YP	327	}
7699517d YP	328
	329	if (trans_type > 0 && trans_type <= 0xC) {
	330	cmd->port = PORT_FIBRE;
	331	cmd->transceiver = XCVR_EXTERNAL;
	332	cmd->supported \|= SUPPORTED_FIBRE;
	333	cmd->advertising \|= ADVERTISED_FIBRE;
	334	} else if (trans_type == 0x80 \|\| trans_type == 0) {
	335	cmd->port = PORT_TP;
	336	cmd->transceiver = XCVR_INTERNAL;
	337	cmd->supported \|= SUPPORTED_TP;
	338	cmd->advertising \|= ADVERTISED_TP;
	339	} else {
	340	cmd->port = -1;
	341	cmd->transceiver = -1;
	342	}
c27a02cd YP	343	return 0;
	344	}
	345
	346	static int mlx4_en_set_settings(struct net_device dev, struct ethtool_cmd cmd)
	347	{
	348	if ((cmd->autoneg == AUTONEG_ENABLE) \|\|
25db0338 DD	349	(ethtool_cmd_speed(cmd) != SPEED_10000) \|\|
25db0338 DD	350	(cmd->duplex != DUPLEX_FULL))
c27a02cd YP	351	return -EINVAL;
	352
	353	/* Nothing to change */
	354	return 0;
	355	}
	356
	357	static int mlx4_en_get_coalesce(struct net_device *dev,
	358	struct ethtool_coalesce *coal)
	359	{
	360	struct mlx4_en_priv *priv = netdev_priv(dev);
	361
	362	coal->tx_coalesce_usecs = 0;
	363	coal->tx_max_coalesced_frames = 0;
	364	coal->rx_coalesce_usecs = priv->rx_usecs;
	365	coal->rx_max_coalesced_frames = priv->rx_frames;
	366
	367	coal->pkt_rate_low = priv->pkt_rate_low;
	368	coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
	369	coal->pkt_rate_high = priv->pkt_rate_high;
	370	coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
	371	coal->rate_sample_interval = priv->sample_interval;
	372	coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
	373	return 0;
	374	}
	375
	376	static int mlx4_en_set_coalesce(struct net_device *dev,
	377	struct ethtool_coalesce *coal)
	378	{
	379	struct mlx4_en_priv *priv = netdev_priv(dev);
	380	int err, i;
	381
	382	priv->rx_frames = (coal->rx_max_coalesced_frames ==
	383	MLX4_EN_AUTO_CONF) ?
3db36fb2	384	MLX4_EN_RX_COAL_TARGET :
c27a02cd YP	385	coal->rx_max_coalesced_frames;
	386	priv->rx_usecs = (coal->rx_coalesce_usecs ==
	387	MLX4_EN_AUTO_CONF) ?
	388	MLX4_EN_RX_COAL_TIME :
	389	coal->rx_coalesce_usecs;
	390
	391	/* Set adaptive coalescing params */
	392	priv->pkt_rate_low = coal->pkt_rate_low;
	393	priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
	394	priv->pkt_rate_high = coal->pkt_rate_high;
	395	priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
	396	priv->sample_interval = coal->rate_sample_interval;
	397	priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
c27a02cd YP	398	if (priv->adaptive_rx_coal)
	399	return 0;
	400
	401	for (i = 0; i < priv->rx_ring_num; i++) {
	402	priv->rx_cq[i].moder_cnt = priv->rx_frames;
	403	priv->rx_cq[i].moder_time = priv->rx_usecs;
6b4d8d9f	404	priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
c27a02cd YP	405	err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
	406	if (err)
	407	return err;
	408	}
	409	return 0;
	410	}
	411
	412	static int mlx4_en_set_pauseparam(struct net_device *dev,
	413	struct ethtool_pauseparam *pause)
	414	{
	415	struct mlx4_en_priv *priv = netdev_priv(dev);
	416	struct mlx4_en_dev *mdev = priv->mdev;
	417	int err;
	418
d53b93f2 YP	419	priv->prof->tx_pause = pause->tx_pause != 0;
d53b93f2 YP	420	priv->prof->rx_pause = pause->rx_pause != 0;
c27a02cd YP	421	err = mlx4_SET_PORT_general(mdev->dev, priv->port,
c27a02cd YP	422	priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2 YP	423	priv->prof->tx_pause,
	424	priv->prof->tx_ppp,
	425	priv->prof->rx_pause,
	426	priv->prof->rx_ppp);
c27a02cd	427	if (err)
453a6082	428	en_err(priv, "Failed setting pause params\n");
c27a02cd YP	429
	430	return err;
	431	}
	432
	433	static void mlx4_en_get_pauseparam(struct net_device *dev,
	434	struct ethtool_pauseparam *pause)
	435	{
	436	struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd	437
d53b93f2 YP	438	pause->tx_pause = priv->prof->tx_pause;
d53b93f2 YP	439	pause->rx_pause = priv->prof->rx_pause;
c27a02cd YP	440	}
c27a02cd YP	441
18cc42a3 YP	442	static int mlx4_en_set_ringparam(struct net_device *dev,
	443	struct ethtool_ringparam *param)
	444	{
	445	struct mlx4_en_priv *priv = netdev_priv(dev);
	446	struct mlx4_en_dev *mdev = priv->mdev;
	447	u32 rx_size, tx_size;
	448	int port_up = 0;
	449	int err = 0;
6b4d8d9f	450	int i;
18cc42a3 YP	451
	452	if (param->rx_jumbo_pending \|\| param->rx_mini_pending)
	453	return -EINVAL;
	454
	455	rx_size = roundup_pow_of_two(param->rx_pending);
	456	rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
bd531e36	457	rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
18cc42a3 YP	458	tx_size = roundup_pow_of_two(param->tx_pending);
18cc42a3 YP	459	tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
bd531e36	460	tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
18cc42a3	461
bc081cec YP	462	if (rx_size == (priv->port_up ? priv->rx_ring[0].actual_size :
	463	priv->rx_ring[0].size) &&
	464	tx_size == priv->tx_ring[0].size)
18cc42a3 YP	465	return 0;
	466
	467	mutex_lock(&mdev->state_lock);
	468	if (priv->port_up) {
	469	port_up = 1;
	470	mlx4_en_stop_port(dev);
	471	}
	472
fe0af03c	473	mlx4_en_free_resources(priv);
18cc42a3 YP	474
	475	priv->prof->tx_ring_size = tx_size;
	476	priv->prof->rx_ring_size = rx_size;
	477
	478	err = mlx4_en_alloc_resources(priv);
	479	if (err) {
453a6082	480	en_err(priv, "Failed reallocating port resources\n");
18cc42a3 YP	481	goto out;
	482	}
	483	if (port_up) {
	484	err = mlx4_en_start_port(dev);
	485	if (err)
453a6082	486	en_err(priv, "Failed starting port\n");
18cc42a3 YP	487	}
18cc42a3 YP	488
6b4d8d9f AG	489	for (i = 0; i < priv->rx_ring_num; i++) {
	490	priv->rx_cq[i].moder_cnt = priv->rx_frames;
	491	priv->rx_cq[i].moder_time = priv->rx_usecs;
	492	priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
	493	err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
	494	if (err)
	495	goto out;
	496	}
	497
18cc42a3 YP	498	out:
	499	mutex_unlock(&mdev->state_lock);
	500	return err;
	501	}
	502
c27a02cd YP	503	static void mlx4_en_get_ringparam(struct net_device *dev,
	504	struct ethtool_ringparam *param)
	505	{
	506	struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd YP	507
c27a02cd YP	508	memset(param, 0, sizeof(*param));
bd531e36 YP	509	param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
bd531e36 YP	510	param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
bc081cec YP	511	param->rx_pending = priv->port_up ?
	512	priv->rx_ring[0].actual_size : priv->rx_ring[0].size;
	513	param->tx_pending = priv->tx_ring[0].size;
c27a02cd YP	514	}
c27a02cd YP	515
93d3e367 YP	516	static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
	517	{
	518	struct mlx4_en_priv *priv = netdev_priv(dev);
	519
	520	return priv->rx_ring_num;
	521	}
	522
	523	static int mlx4_en_get_rxfh_indir(struct net_device dev, u32 ring_index)
	524	{
	525	struct mlx4_en_priv *priv = netdev_priv(dev);
	526	struct mlx4_en_rss_map *rss_map = &priv->rss_map;
	527	int rss_rings;
	528	size_t n = priv->rx_ring_num;
	529	int err = 0;
	530
	531	rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
	532
	533	while (n--) {
	534	ring_index[n] = rss_map->qps[n % rss_rings].qpn -
	535	rss_map->base_qpn;
	536	}
	537
	538	return err;
	539	}
	540
	541	static int mlx4_en_set_rxfh_indir(struct net_device *dev,
	542	const u32 *ring_index)
	543	{
	544	struct mlx4_en_priv *priv = netdev_priv(dev);
	545	struct mlx4_en_dev *mdev = priv->mdev;
	546	int port_up = 0;
	547	int err = 0;
	548	int i;
	549	int rss_rings = 0;
	550
	551	/* Calculate RSS table size and make sure flows are spread evenly
	552	* between rings
	553	*/
	554	for (i = 0; i < priv->rx_ring_num; i++) {
	555	if (i > 0 && !ring_index[i] && !rss_rings)
	556	rss_rings = i;
	557
	558	if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
	559	return -EINVAL;
	560	}
	561
	562	if (!rss_rings)
	563	rss_rings = priv->rx_ring_num;
	564
	565	/* RSS table size must be an order of 2 */
	566	if (!is_power_of_2(rss_rings))
	567	return -EINVAL;
	568
	569	mutex_lock(&mdev->state_lock);
	570	if (priv->port_up) {
	571	port_up = 1;
	572	mlx4_en_stop_port(dev);
	573	}
	574
	575	priv->prof->rss_rings = rss_rings;
	576
	577	if (port_up) {
	578	err = mlx4_en_start_port(dev);
	579	if (err)
580	en_err(priv, "Failed starting port\n");
581	}
582
583	mutex_unlock(&mdev->state_lock);
584	return err;
585	}
586
587	static int mlx4_en_get_rxnfc(struct net_device dev, struct ethtool_rxnfc cmd,
588	u32 *rule_locs)
589	{
590	struct mlx4_en_priv *priv = netdev_priv(dev);
591	int err = 0;
592
593	switch (cmd->cmd) {
594	case ETHTOOL_GRXRINGS:
595	cmd->data = priv->rx_ring_num;
596	break;
597	default:
598	err = -EOPNOTSUPP;
599	break;
600	}
601
602	return err;
603	}
604
c27a02cd YP	605	const struct ethtool_ops mlx4_en_ethtool_ops = {
	606	.get_drvinfo = mlx4_en_get_drvinfo,
	607	.get_settings = mlx4_en_get_settings,
	608	.set_settings = mlx4_en_set_settings,
c27a02cd	609	.get_link = ethtool_op_get_link,
c27a02cd YP	610	.get_strings = mlx4_en_get_strings,
	611	.get_sset_count = mlx4_en_get_sset_count,
	612	.get_ethtool_stats = mlx4_en_get_ethtool_stats,
e7c1c2c4	613	.self_test = mlx4_en_self_test,
c27a02cd	614	.get_wol = mlx4_en_get_wol,
14c07b13	615	.set_wol = mlx4_en_set_wol,
c27a02cd YP	616	.get_msglevel = mlx4_en_get_msglevel,
	617	.set_msglevel = mlx4_en_set_msglevel,
	618	.get_coalesce = mlx4_en_get_coalesce,
	619	.set_coalesce = mlx4_en_set_coalesce,
	620	.get_pauseparam = mlx4_en_get_pauseparam,
	621	.set_pauseparam = mlx4_en_set_pauseparam,
	622	.get_ringparam = mlx4_en_get_ringparam,
18cc42a3	623	.set_ringparam = mlx4_en_set_ringparam,
93d3e367 YP	624	.get_rxnfc = mlx4_en_get_rxnfc,
	625	.get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
	626	.get_rxfh_indir = mlx4_en_get_rxfh_indir,
	627	.set_rxfh_indir = mlx4_en_set_rxfh_indir,
c27a02cd YP	628	};
	629
	630
	631
	632
	633