Commit | Line | Data |
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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/cpumask.h> | |
35 | #include <linux/module.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/netdevice.h> | |
5a0e3ad6 | 38 | #include <linux/slab.h> |
c27a02cd YP |
39 | |
40 | #include <linux/mlx4/driver.h> | |
41 | #include <linux/mlx4/device.h> | |
42 | #include <linux/mlx4/cmd.h> | |
43 | ||
44 | #include "mlx4_en.h" | |
45 | ||
46 | MODULE_AUTHOR("Liran Liss, Yevgeny Petrilin"); | |
47 | MODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver"); | |
48 | MODULE_LICENSE("Dual BSD/GPL"); | |
49 | MODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")"); | |
50 | ||
51 | static const char mlx4_en_version[] = | |
52 | DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" | |
53 | DRV_VERSION " (" DRV_RELDATE ")\n"; | |
54 | ||
a2b28737 YP |
55 | #define MLX4_EN_PARM_INT(X, def_val, desc) \ |
56 | static unsigned int X = def_val;\ | |
57 | module_param(X , uint, 0444); \ | |
58 | MODULE_PARM_DESC(X, desc); | |
59 | ||
60 | ||
61 | /* | |
62 | * Device scope module parameters | |
63 | */ | |
64 | ||
0533943c YP |
65 | /* Enable RSS UDP traffic */ |
66 | MLX4_EN_PARM_INT(udp_rss, 1, | |
d82603c6 | 67 | "Enable RSS for incoming UDP traffic or disabled (0)"); |
a2b28737 | 68 | |
a2b28737 YP |
69 | /* Priority pausing */ |
70 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." | |
71 | " Per priority bit mask"); | |
72 | MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." | |
73 | " Per priority bit mask"); | |
74 | ||
b97b33a3 EE |
75 | MLX4_EN_PARM_INT(inline_thold, MAX_INLINE, |
76 | "Threshold for using inline data (range: 17-104, default: 104)"); | |
77 | ||
78 | #define MAX_PFC_TX 0xff | |
79 | #define MAX_PFC_RX 0xff | |
80 | ||
0c87b29c JP |
81 | void en_print(const char *level, const struct mlx4_en_priv *priv, |
82 | const char *format, ...) | |
0a645e80 JP |
83 | { |
84 | va_list args; | |
85 | struct va_format vaf; | |
0a645e80 JP |
86 | |
87 | va_start(args, format); | |
88 | ||
89 | vaf.fmt = format; | |
90 | vaf.va = &args; | |
91 | if (priv->registered) | |
0c87b29c JP |
92 | printk("%s%s: %s: %pV", |
93 | level, DRV_NAME, priv->dev->name, &vaf); | |
0a645e80 | 94 | else |
0c87b29c JP |
95 | printk("%s%s: %s: Port %d: %pV", |
96 | level, DRV_NAME, dev_name(&priv->mdev->pdev->dev), | |
97 | priv->port, &vaf); | |
0a645e80 | 98 | va_end(args); |
0a645e80 JP |
99 | } |
100 | ||
79aeaccd YB |
101 | void mlx4_en_update_loopback_state(struct net_device *dev, |
102 | netdev_features_t features) | |
103 | { | |
104 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
105 | ||
106 | priv->flags &= ~(MLX4_EN_FLAG_RX_FILTER_NEEDED| | |
107 | MLX4_EN_FLAG_ENABLE_HW_LOOPBACK); | |
108 | ||
109 | /* Drop the packet if SRIOV is not enabled | |
110 | * and not performing the selftest or flb disabled | |
111 | */ | |
112 | if (mlx4_is_mfunc(priv->mdev->dev) && | |
113 | !(features & NETIF_F_LOOPBACK) && !priv->validate_loopback) | |
114 | priv->flags |= MLX4_EN_FLAG_RX_FILTER_NEEDED; | |
115 | ||
116 | /* Set dmac in Tx WQE if we are in SRIOV mode or if loopback selftest | |
117 | * is requested | |
118 | */ | |
119 | if (mlx4_is_mfunc(priv->mdev->dev) || priv->validate_loopback) | |
120 | priv->flags |= MLX4_EN_FLAG_ENABLE_HW_LOOPBACK; | |
121 | } | |
122 | ||
a2b28737 YP |
123 | static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) |
124 | { | |
125 | struct mlx4_en_profile *params = &mdev->profile; | |
126 | int i; | |
127 | ||
0533943c | 128 | params->udp_rss = udp_rss; |
ea1c1af1 AV |
129 | params->num_tx_rings_p_up = mlx4_low_memory_profile() ? |
130 | MLX4_EN_MIN_TX_RING_P_UP : | |
131 | min_t(int, num_online_cpus(), MLX4_EN_MAX_TX_RING_P_UP); | |
132 | ||
ccf86321 OG |
133 | if (params->udp_rss && !(mdev->dev->caps.flags |
134 | & MLX4_DEV_CAP_FLAG_UDP_RSS)) { | |
1a91de28 | 135 | mlx4_warn(mdev, "UDP RSS is not supported on this device\n"); |
0533943c YP |
136 | params->udp_rss = 0; |
137 | } | |
a2b28737 YP |
138 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { |
139 | params->prof[i].rx_pause = 1; | |
140 | params->prof[i].rx_ppp = pfcrx; | |
141 | params->prof[i].tx_pause = 1; | |
142 | params->prof[i].tx_ppp = pfctx; | |
143 | params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE; | |
144 | params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE; | |
bc6a4744 AV |
145 | params->prof[i].tx_ring_num = params->num_tx_rings_p_up * |
146 | MLX4_EN_NUM_UP; | |
93d3e367 | 147 | params->prof[i].rss_rings = 0; |
b97b33a3 | 148 | params->prof[i].inline_thold = inline_thold; |
a2b28737 YP |
149 | } |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
33c87f0a EC |
154 | static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) |
155 | { | |
156 | struct mlx4_en_dev *endev = ctx; | |
157 | ||
158 | return endev->pndev[port]; | |
159 | } | |
160 | ||
c27a02cd | 161 | static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, |
00f5ce99 | 162 | enum mlx4_dev_event event, unsigned long port) |
c27a02cd YP |
163 | { |
164 | struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; | |
165 | struct mlx4_en_priv *priv; | |
166 | ||
c27a02cd YP |
167 | switch (event) { |
168 | case MLX4_DEV_EVENT_PORT_UP: | |
169 | case MLX4_DEV_EVENT_PORT_DOWN: | |
13bf58b7 JM |
170 | if (!mdev->pndev[port]) |
171 | return; | |
172 | priv = netdev_priv(mdev->pndev[port]); | |
c27a02cd YP |
173 | /* To prevent races, we poll the link state in a separate |
174 | task rather than changing it here */ | |
175 | priv->link_state = event; | |
176 | queue_work(mdev->workqueue, &priv->linkstate_task); | |
177 | break; | |
178 | ||
179 | case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: | |
180 | mlx4_err(mdev, "Internal error detected, restarting device\n"); | |
181 | break; | |
182 | ||
e4b59a1c EE |
183 | case MLX4_DEV_EVENT_SLAVE_INIT: |
184 | case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: | |
185 | break; | |
c27a02cd | 186 | default: |
13bf58b7 JM |
187 | if (port < 1 || port > dev->caps.num_ports || |
188 | !mdev->pndev[port]) | |
189 | return; | |
00f5ce99 JM |
190 | mlx4_warn(mdev, "Unhandled event %d for port %d\n", event, |
191 | (int) port); | |
c27a02cd YP |
192 | } |
193 | } | |
194 | ||
195 | static void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr) | |
196 | { | |
197 | struct mlx4_en_dev *mdev = endev_ptr; | |
198 | int i; | |
199 | ||
200 | mutex_lock(&mdev->state_lock); | |
201 | mdev->device_up = false; | |
202 | mutex_unlock(&mdev->state_lock); | |
203 | ||
204 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
205 | if (mdev->pndev[i]) | |
206 | mlx4_en_destroy_netdev(mdev->pndev[i]); | |
207 | ||
ad7d4eae SB |
208 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) |
209 | mlx4_en_remove_timestamp(mdev); | |
210 | ||
c27a02cd YP |
211 | flush_workqueue(mdev->workqueue); |
212 | destroy_workqueue(mdev->workqueue); | |
61083720 | 213 | (void) mlx4_mr_free(dev, &mdev->mr); |
7398af40 | 214 | iounmap(mdev->uar_map); |
c27a02cd YP |
215 | mlx4_uar_free(dev, &mdev->priv_uar); |
216 | mlx4_pd_free(dev, mdev->priv_pdn); | |
217 | kfree(mdev); | |
218 | } | |
219 | ||
220 | static void *mlx4_en_add(struct mlx4_dev *dev) | |
221 | { | |
c27a02cd YP |
222 | struct mlx4_en_dev *mdev; |
223 | int i; | |
c27a02cd | 224 | |
0a645e80 | 225 | printk_once(KERN_INFO "%s", mlx4_en_version); |
c27a02cd | 226 | |
b2adaca9 | 227 | mdev = kzalloc(sizeof(*mdev), GFP_KERNEL); |
c2a3d4b4 | 228 | if (!mdev) |
c27a02cd | 229 | goto err_free_res; |
c27a02cd YP |
230 | |
231 | if (mlx4_pd_alloc(dev, &mdev->priv_pdn)) | |
232 | goto err_free_dev; | |
233 | ||
234 | if (mlx4_uar_alloc(dev, &mdev->priv_uar)) | |
235 | goto err_pd; | |
236 | ||
4979d18f RD |
237 | mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, |
238 | PAGE_SIZE); | |
c27a02cd YP |
239 | if (!mdev->uar_map) |
240 | goto err_uar; | |
241 | spin_lock_init(&mdev->uar_lock); | |
242 | ||
243 | mdev->dev = dev; | |
244 | mdev->dma_device = &(dev->pdev->dev); | |
245 | mdev->pdev = dev->pdev; | |
246 | mdev->device_up = false; | |
247 | ||
248 | mdev->LSO_support = !!(dev->caps.flags & (1 << 15)); | |
249 | if (!mdev->LSO_support) | |
1a91de28 | 250 | mlx4_warn(mdev, "LSO not supported, please upgrade to later FW version to enable LSO\n"); |
c27a02cd YP |
251 | |
252 | if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull, | |
253 | MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ, | |
254 | 0, 0, &mdev->mr)) { | |
255 | mlx4_err(mdev, "Failed allocating memory region\n"); | |
7398af40 | 256 | goto err_map; |
c27a02cd YP |
257 | } |
258 | if (mlx4_mr_enable(mdev->dev, &mdev->mr)) { | |
259 | mlx4_err(mdev, "Failed enabling memory region\n"); | |
260 | goto err_mr; | |
261 | } | |
262 | ||
263 | /* Build device profile according to supplied module parameters */ | |
c2a3d4b4 | 264 | if (mlx4_en_get_profile(mdev)) { |
1a91de28 | 265 | mlx4_err(mdev, "Bad module parameters, aborting\n"); |
c27a02cd YP |
266 | goto err_mr; |
267 | } | |
268 | ||
25985edc | 269 | /* Configure which ports to start according to module parameters */ |
c27a02cd YP |
270 | mdev->port_cnt = 0; |
271 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
272 | mdev->port_cnt++; | |
273 | ||
1ec4864b AV |
274 | /* Initialize time stamp mechanism */ |
275 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) | |
276 | mlx4_en_init_timestamp(mdev); | |
277 | ||
02512482 IS |
278 | /* Set default number of RX rings*/ |
279 | mlx4_en_set_num_rx_rings(mdev); | |
c27a02cd YP |
280 | |
281 | /* Create our own workqueue for reset/multicast tasks | |
282 | * Note: we cannot use the shared workqueue because of deadlocks caused | |
283 | * by the rtnl lock */ | |
284 | mdev->workqueue = create_singlethread_workqueue("mlx4_en"); | |
c2a3d4b4 | 285 | if (!mdev->workqueue) |
1a44cc37 | 286 | goto err_mr; |
c27a02cd YP |
287 | |
288 | /* At this stage all non-port specific tasks are complete: | |
289 | * mark the card state as up */ | |
290 | mutex_init(&mdev->state_lock); | |
291 | mdev->device_up = true; | |
292 | ||
293 | /* Setup ports */ | |
294 | ||
295 | /* Create a netdev for each port */ | |
296 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { | |
297 | mlx4_info(mdev, "Activating port:%d\n", i); | |
3c2fa83f | 298 | if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) |
c27a02cd | 299 | mdev->pndev[i] = NULL; |
c27a02cd | 300 | } |
ec693d47 | 301 | |
c27a02cd YP |
302 | return mdev; |
303 | ||
c27a02cd | 304 | err_mr: |
61083720 | 305 | (void) mlx4_mr_free(dev, &mdev->mr); |
7398af40 | 306 | err_map: |
8850494a | 307 | if (mdev->uar_map) |
7398af40 | 308 | iounmap(mdev->uar_map); |
c27a02cd YP |
309 | err_uar: |
310 | mlx4_uar_free(dev, &mdev->priv_uar); | |
311 | err_pd: | |
312 | mlx4_pd_free(dev, mdev->priv_pdn); | |
313 | err_free_dev: | |
314 | kfree(mdev); | |
315 | err_free_res: | |
316 | return NULL; | |
317 | } | |
318 | ||
319 | static struct mlx4_interface mlx4_en_interface = { | |
33c87f0a EC |
320 | .add = mlx4_en_add, |
321 | .remove = mlx4_en_remove, | |
322 | .event = mlx4_en_event, | |
323 | .get_dev = mlx4_en_get_netdev, | |
0345584e | 324 | .protocol = MLX4_PROT_ETH, |
c27a02cd YP |
325 | }; |
326 | ||
d0ceebd7 | 327 | static void mlx4_en_verify_params(void) |
b97b33a3 EE |
328 | { |
329 | if (pfctx > MAX_PFC_TX) { | |
330 | pr_warn("mlx4_en: WARNING: illegal module parameter pfctx 0x%x - should be in range 0-0x%x, will be changed to default (0)\n", | |
331 | pfctx, MAX_PFC_TX); | |
332 | pfctx = 0; | |
333 | } | |
334 | ||
335 | if (pfcrx > MAX_PFC_RX) { | |
336 | pr_warn("mlx4_en: WARNING: illegal module parameter pfcrx 0x%x - should be in range 0-0x%x, will be changed to default (0)\n", | |
337 | pfcrx, MAX_PFC_RX); | |
338 | pfcrx = 0; | |
339 | } | |
340 | ||
341 | if (inline_thold < MIN_PKT_LEN || inline_thold > MAX_INLINE) { | |
342 | pr_warn("mlx4_en: WARNING: illegal module parameter inline_thold %d - should be in range %d-%d, will be changed to default (%d)\n", | |
343 | inline_thold, MIN_PKT_LEN, MAX_INLINE, MAX_INLINE); | |
344 | inline_thold = MAX_INLINE; | |
345 | } | |
346 | } | |
347 | ||
c27a02cd YP |
348 | static int __init mlx4_en_init(void) |
349 | { | |
b97b33a3 EE |
350 | mlx4_en_verify_params(); |
351 | ||
c27a02cd YP |
352 | return mlx4_register_interface(&mlx4_en_interface); |
353 | } | |
354 | ||
355 | static void __exit mlx4_en_cleanup(void) | |
356 | { | |
357 | mlx4_unregister_interface(&mlx4_en_interface); | |
358 | } | |
359 | ||
360 | module_init(mlx4_en_init); | |
361 | module_exit(mlx4_en_cleanup); | |
362 |