Commit | Line | Data |
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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/cpumask.h> | |
35 | #include <linux/module.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/netdevice.h> | |
5a0e3ad6 | 38 | #include <linux/slab.h> |
c27a02cd YP |
39 | |
40 | #include <linux/mlx4/driver.h> | |
41 | #include <linux/mlx4/device.h> | |
42 | #include <linux/mlx4/cmd.h> | |
43 | ||
44 | #include "mlx4_en.h" | |
45 | ||
46 | MODULE_AUTHOR("Liran Liss, Yevgeny Petrilin"); | |
47 | MODULE_DESCRIPTION("Mellanox ConnectX HCA Ethernet driver"); | |
48 | MODULE_LICENSE("Dual BSD/GPL"); | |
49 | MODULE_VERSION(DRV_VERSION " ("DRV_RELDATE")"); | |
50 | ||
51 | static const char mlx4_en_version[] = | |
52 | DRV_NAME ": Mellanox ConnectX HCA Ethernet driver v" | |
53 | DRV_VERSION " (" DRV_RELDATE ")\n"; | |
54 | ||
a2b28737 YP |
55 | #define MLX4_EN_PARM_INT(X, def_val, desc) \ |
56 | static unsigned int X = def_val;\ | |
57 | module_param(X , uint, 0444); \ | |
58 | MODULE_PARM_DESC(X, desc); | |
59 | ||
60 | ||
61 | /* | |
62 | * Device scope module parameters | |
63 | */ | |
64 | ||
0533943c YP |
65 | /* Enable RSS UDP traffic */ |
66 | MLX4_EN_PARM_INT(udp_rss, 1, | |
d82603c6 | 67 | "Enable RSS for incoming UDP traffic or disabled (0)"); |
a2b28737 | 68 | |
a2b28737 YP |
69 | /* Priority pausing */ |
70 | MLX4_EN_PARM_INT(pfctx, 0, "Priority based Flow Control policy on TX[7:0]." | |
71 | " Per priority bit mask"); | |
72 | MLX4_EN_PARM_INT(pfcrx, 0, "Priority based Flow Control policy on RX[7:0]." | |
73 | " Per priority bit mask"); | |
74 | ||
b97b33a3 EE |
75 | MLX4_EN_PARM_INT(inline_thold, MAX_INLINE, |
76 | "Threshold for using inline data (range: 17-104, default: 104)"); | |
77 | ||
78 | #define MAX_PFC_TX 0xff | |
79 | #define MAX_PFC_RX 0xff | |
80 | ||
0a645e80 JP |
81 | int en_print(const char *level, const struct mlx4_en_priv *priv, |
82 | const char *format, ...) | |
83 | { | |
84 | va_list args; | |
85 | struct va_format vaf; | |
86 | int i; | |
87 | ||
88 | va_start(args, format); | |
89 | ||
90 | vaf.fmt = format; | |
91 | vaf.va = &args; | |
92 | if (priv->registered) | |
93 | i = printk("%s%s: %s: %pV", | |
94 | level, DRV_NAME, priv->dev->name, &vaf); | |
95 | else | |
96 | i = printk("%s%s: %s: Port %d: %pV", | |
97 | level, DRV_NAME, dev_name(&priv->mdev->pdev->dev), | |
98 | priv->port, &vaf); | |
99 | va_end(args); | |
100 | ||
101 | return i; | |
102 | } | |
103 | ||
79aeaccd YB |
104 | void mlx4_en_update_loopback_state(struct net_device *dev, |
105 | netdev_features_t features) | |
106 | { | |
107 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
108 | ||
109 | priv->flags &= ~(MLX4_EN_FLAG_RX_FILTER_NEEDED| | |
110 | MLX4_EN_FLAG_ENABLE_HW_LOOPBACK); | |
111 | ||
112 | /* Drop the packet if SRIOV is not enabled | |
113 | * and not performing the selftest or flb disabled | |
114 | */ | |
115 | if (mlx4_is_mfunc(priv->mdev->dev) && | |
116 | !(features & NETIF_F_LOOPBACK) && !priv->validate_loopback) | |
117 | priv->flags |= MLX4_EN_FLAG_RX_FILTER_NEEDED; | |
118 | ||
119 | /* Set dmac in Tx WQE if we are in SRIOV mode or if loopback selftest | |
120 | * is requested | |
121 | */ | |
122 | if (mlx4_is_mfunc(priv->mdev->dev) || priv->validate_loopback) | |
123 | priv->flags |= MLX4_EN_FLAG_ENABLE_HW_LOOPBACK; | |
124 | } | |
125 | ||
a2b28737 YP |
126 | static int mlx4_en_get_profile(struct mlx4_en_dev *mdev) |
127 | { | |
128 | struct mlx4_en_profile *params = &mdev->profile; | |
129 | int i; | |
130 | ||
0533943c | 131 | params->udp_rss = udp_rss; |
bc6a4744 AV |
132 | params->num_tx_rings_p_up = min_t(int, num_online_cpus(), |
133 | MLX4_EN_MAX_TX_RING_P_UP); | |
ccf86321 OG |
134 | if (params->udp_rss && !(mdev->dev->caps.flags |
135 | & MLX4_DEV_CAP_FLAG_UDP_RSS)) { | |
1a91de28 | 136 | mlx4_warn(mdev, "UDP RSS is not supported on this device\n"); |
0533943c YP |
137 | params->udp_rss = 0; |
138 | } | |
a2b28737 YP |
139 | for (i = 1; i <= MLX4_MAX_PORTS; i++) { |
140 | params->prof[i].rx_pause = 1; | |
141 | params->prof[i].rx_ppp = pfcrx; | |
142 | params->prof[i].tx_pause = 1; | |
143 | params->prof[i].tx_ppp = pfctx; | |
144 | params->prof[i].tx_ring_size = MLX4_EN_DEF_TX_RING_SIZE; | |
145 | params->prof[i].rx_ring_size = MLX4_EN_DEF_RX_RING_SIZE; | |
bc6a4744 AV |
146 | params->prof[i].tx_ring_num = params->num_tx_rings_p_up * |
147 | MLX4_EN_NUM_UP; | |
93d3e367 | 148 | params->prof[i].rss_rings = 0; |
b97b33a3 | 149 | params->prof[i].inline_thold = inline_thold; |
a2b28737 YP |
150 | } |
151 | ||
152 | return 0; | |
153 | } | |
154 | ||
33c87f0a EC |
155 | static void *mlx4_en_get_netdev(struct mlx4_dev *dev, void *ctx, u8 port) |
156 | { | |
157 | struct mlx4_en_dev *endev = ctx; | |
158 | ||
159 | return endev->pndev[port]; | |
160 | } | |
161 | ||
c27a02cd | 162 | static void mlx4_en_event(struct mlx4_dev *dev, void *endev_ptr, |
00f5ce99 | 163 | enum mlx4_dev_event event, unsigned long port) |
c27a02cd YP |
164 | { |
165 | struct mlx4_en_dev *mdev = (struct mlx4_en_dev *) endev_ptr; | |
166 | struct mlx4_en_priv *priv; | |
167 | ||
c27a02cd YP |
168 | switch (event) { |
169 | case MLX4_DEV_EVENT_PORT_UP: | |
170 | case MLX4_DEV_EVENT_PORT_DOWN: | |
13bf58b7 JM |
171 | if (!mdev->pndev[port]) |
172 | return; | |
173 | priv = netdev_priv(mdev->pndev[port]); | |
c27a02cd YP |
174 | /* To prevent races, we poll the link state in a separate |
175 | task rather than changing it here */ | |
176 | priv->link_state = event; | |
177 | queue_work(mdev->workqueue, &priv->linkstate_task); | |
178 | break; | |
179 | ||
180 | case MLX4_DEV_EVENT_CATASTROPHIC_ERROR: | |
181 | mlx4_err(mdev, "Internal error detected, restarting device\n"); | |
182 | break; | |
183 | ||
e4b59a1c EE |
184 | case MLX4_DEV_EVENT_SLAVE_INIT: |
185 | case MLX4_DEV_EVENT_SLAVE_SHUTDOWN: | |
186 | break; | |
c27a02cd | 187 | default: |
13bf58b7 JM |
188 | if (port < 1 || port > dev->caps.num_ports || |
189 | !mdev->pndev[port]) | |
190 | return; | |
00f5ce99 JM |
191 | mlx4_warn(mdev, "Unhandled event %d for port %d\n", event, |
192 | (int) port); | |
c27a02cd YP |
193 | } |
194 | } | |
195 | ||
196 | static void mlx4_en_remove(struct mlx4_dev *dev, void *endev_ptr) | |
197 | { | |
198 | struct mlx4_en_dev *mdev = endev_ptr; | |
199 | int i; | |
200 | ||
201 | mutex_lock(&mdev->state_lock); | |
202 | mdev->device_up = false; | |
203 | mutex_unlock(&mdev->state_lock); | |
204 | ||
205 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
206 | if (mdev->pndev[i]) | |
207 | mlx4_en_destroy_netdev(mdev->pndev[i]); | |
208 | ||
ad7d4eae SB |
209 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) |
210 | mlx4_en_remove_timestamp(mdev); | |
211 | ||
c27a02cd YP |
212 | flush_workqueue(mdev->workqueue); |
213 | destroy_workqueue(mdev->workqueue); | |
61083720 | 214 | (void) mlx4_mr_free(dev, &mdev->mr); |
7398af40 | 215 | iounmap(mdev->uar_map); |
c27a02cd YP |
216 | mlx4_uar_free(dev, &mdev->priv_uar); |
217 | mlx4_pd_free(dev, mdev->priv_pdn); | |
218 | kfree(mdev); | |
219 | } | |
220 | ||
221 | static void *mlx4_en_add(struct mlx4_dev *dev) | |
222 | { | |
c27a02cd YP |
223 | struct mlx4_en_dev *mdev; |
224 | int i; | |
225 | int err; | |
226 | ||
0a645e80 | 227 | printk_once(KERN_INFO "%s", mlx4_en_version); |
c27a02cd | 228 | |
b2adaca9 | 229 | mdev = kzalloc(sizeof(*mdev), GFP_KERNEL); |
c27a02cd | 230 | if (!mdev) { |
c27a02cd YP |
231 | err = -ENOMEM; |
232 | goto err_free_res; | |
233 | } | |
234 | ||
235 | if (mlx4_pd_alloc(dev, &mdev->priv_pdn)) | |
236 | goto err_free_dev; | |
237 | ||
238 | if (mlx4_uar_alloc(dev, &mdev->priv_uar)) | |
239 | goto err_pd; | |
240 | ||
4979d18f RD |
241 | mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT, |
242 | PAGE_SIZE); | |
c27a02cd YP |
243 | if (!mdev->uar_map) |
244 | goto err_uar; | |
245 | spin_lock_init(&mdev->uar_lock); | |
246 | ||
247 | mdev->dev = dev; | |
248 | mdev->dma_device = &(dev->pdev->dev); | |
249 | mdev->pdev = dev->pdev; | |
250 | mdev->device_up = false; | |
251 | ||
252 | mdev->LSO_support = !!(dev->caps.flags & (1 << 15)); | |
253 | if (!mdev->LSO_support) | |
1a91de28 | 254 | mlx4_warn(mdev, "LSO not supported, please upgrade to later FW version to enable LSO\n"); |
c27a02cd YP |
255 | |
256 | if (mlx4_mr_alloc(mdev->dev, mdev->priv_pdn, 0, ~0ull, | |
257 | MLX4_PERM_LOCAL_WRITE | MLX4_PERM_LOCAL_READ, | |
258 | 0, 0, &mdev->mr)) { | |
259 | mlx4_err(mdev, "Failed allocating memory region\n"); | |
7398af40 | 260 | goto err_map; |
c27a02cd YP |
261 | } |
262 | if (mlx4_mr_enable(mdev->dev, &mdev->mr)) { | |
263 | mlx4_err(mdev, "Failed enabling memory region\n"); | |
264 | goto err_mr; | |
265 | } | |
266 | ||
267 | /* Build device profile according to supplied module parameters */ | |
268 | err = mlx4_en_get_profile(mdev); | |
269 | if (err) { | |
1a91de28 | 270 | mlx4_err(mdev, "Bad module parameters, aborting\n"); |
c27a02cd YP |
271 | goto err_mr; |
272 | } | |
273 | ||
25985edc | 274 | /* Configure which ports to start according to module parameters */ |
c27a02cd YP |
275 | mdev->port_cnt = 0; |
276 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
277 | mdev->port_cnt++; | |
278 | ||
1ec4864b AV |
279 | /* Initialize time stamp mechanism */ |
280 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) | |
281 | mlx4_en_init_timestamp(mdev); | |
282 | ||
02512482 IS |
283 | /* Set default number of RX rings*/ |
284 | mlx4_en_set_num_rx_rings(mdev); | |
c27a02cd YP |
285 | |
286 | /* Create our own workqueue for reset/multicast tasks | |
287 | * Note: we cannot use the shared workqueue because of deadlocks caused | |
288 | * by the rtnl lock */ | |
289 | mdev->workqueue = create_singlethread_workqueue("mlx4_en"); | |
290 | if (!mdev->workqueue) { | |
291 | err = -ENOMEM; | |
1a44cc37 | 292 | goto err_mr; |
c27a02cd YP |
293 | } |
294 | ||
295 | /* At this stage all non-port specific tasks are complete: | |
296 | * mark the card state as up */ | |
297 | mutex_init(&mdev->state_lock); | |
298 | mdev->device_up = true; | |
299 | ||
300 | /* Setup ports */ | |
301 | ||
302 | /* Create a netdev for each port */ | |
303 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) { | |
304 | mlx4_info(mdev, "Activating port:%d\n", i); | |
3c2fa83f | 305 | if (mlx4_en_init_netdev(mdev, i, &mdev->profile.prof[i])) |
c27a02cd | 306 | mdev->pndev[i] = NULL; |
c27a02cd | 307 | } |
ec693d47 | 308 | |
c27a02cd YP |
309 | return mdev; |
310 | ||
c27a02cd | 311 | err_mr: |
61083720 | 312 | (void) mlx4_mr_free(dev, &mdev->mr); |
7398af40 | 313 | err_map: |
8850494a | 314 | if (mdev->uar_map) |
7398af40 | 315 | iounmap(mdev->uar_map); |
c27a02cd YP |
316 | err_uar: |
317 | mlx4_uar_free(dev, &mdev->priv_uar); | |
318 | err_pd: | |
319 | mlx4_pd_free(dev, mdev->priv_pdn); | |
320 | err_free_dev: | |
321 | kfree(mdev); | |
322 | err_free_res: | |
323 | return NULL; | |
324 | } | |
325 | ||
326 | static struct mlx4_interface mlx4_en_interface = { | |
33c87f0a EC |
327 | .add = mlx4_en_add, |
328 | .remove = mlx4_en_remove, | |
329 | .event = mlx4_en_event, | |
330 | .get_dev = mlx4_en_get_netdev, | |
0345584e | 331 | .protocol = MLX4_PROT_ETH, |
c27a02cd YP |
332 | }; |
333 | ||
d0ceebd7 | 334 | static void mlx4_en_verify_params(void) |
b97b33a3 EE |
335 | { |
336 | if (pfctx > MAX_PFC_TX) { | |
337 | pr_warn("mlx4_en: WARNING: illegal module parameter pfctx 0x%x - should be in range 0-0x%x, will be changed to default (0)\n", | |
338 | pfctx, MAX_PFC_TX); | |
339 | pfctx = 0; | |
340 | } | |
341 | ||
342 | if (pfcrx > MAX_PFC_RX) { | |
343 | pr_warn("mlx4_en: WARNING: illegal module parameter pfcrx 0x%x - should be in range 0-0x%x, will be changed to default (0)\n", | |
344 | pfcrx, MAX_PFC_RX); | |
345 | pfcrx = 0; | |
346 | } | |
347 | ||
348 | if (inline_thold < MIN_PKT_LEN || inline_thold > MAX_INLINE) { | |
349 | pr_warn("mlx4_en: WARNING: illegal module parameter inline_thold %d - should be in range %d-%d, will be changed to default (%d)\n", | |
350 | inline_thold, MIN_PKT_LEN, MAX_INLINE, MAX_INLINE); | |
351 | inline_thold = MAX_INLINE; | |
352 | } | |
353 | } | |
354 | ||
c27a02cd YP |
355 | static int __init mlx4_en_init(void) |
356 | { | |
b97b33a3 EE |
357 | mlx4_en_verify_params(); |
358 | ||
c27a02cd YP |
359 | return mlx4_register_interface(&mlx4_en_interface); |
360 | } | |
361 | ||
362 | static void __exit mlx4_en_cleanup(void) | |
363 | { | |
364 | mlx4_unregister_interface(&mlx4_en_interface); | |
365 | } | |
366 | ||
367 | module_init(mlx4_en_init); | |
368 | module_exit(mlx4_en_cleanup); | |
369 |