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tcp: fix SYN-data space mis-accounting
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_netdev.c
CommitLineData
c27a02cd
YP		 1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
1eb8c695
AV		 39#include <linux/hash.h>
40#include <net/ip.h>
c27a02cd
YP		 41
42#include <linux/mlx4/driver.h>
43#include <linux/mlx4/device.h>
44#include <linux/mlx4/cmd.h>
45#include <linux/mlx4/cq.h>
46
47#include "mlx4_en.h"
48#include "en_port.h"
49
d317966b 50int mlx4_en_setup_tc(struct net_device *dev, u8 up)
897d7846 51{
bc6a4744
AV		 52 struct mlx4_en_priv *priv = netdev_priv(dev);
53 int i;
d317966b 54 unsigned int offset = 0;
bc6a4744
AV		 55
56 if (up && up != MLX4_EN_NUM_UP)
897d7846
AV		 57 return -EINVAL;
58
bc6a4744
AV		 59 netdev_set_num_tc(dev, up);
60
61 /* Partition Tx queues evenly amongst UP's */
bc6a4744 62 for (i = 0; i < up; i++) {
d317966b
AV		 63 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
64 offset += priv->num_tx_rings_p_up;
bc6a4744
AV		 65 }
66
897d7846
AV		 67 return 0;
68}
69
1eb8c695
AV		 70#ifdef CONFIG_RFS_ACCEL
71
72struct mlx4_en_filter {
73 struct list_head next;
74 struct work_struct work;
75
76 __be32 src_ip;
77 __be32 dst_ip;
78 __be16 src_port;
79 __be16 dst_port;
80
81 int rxq_index;
82 struct mlx4_en_priv *priv;
83 u32 flow_id; /* RFS infrastructure id */
84 int id; /* mlx4_en driver id */
85 u64 reg_id; /* Flow steering API id */
86 u8 activated; /* Used to prevent expiry before filter
87 * is attached
88 */
89 struct hlist_node filter_chain;
90};
91
92static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
93
94static void mlx4_en_filter_work(struct work_struct *work)
95{
96 struct mlx4_en_filter *filter = container_of(work,
97 struct mlx4_en_filter,
98 work);
99 struct mlx4_en_priv *priv = filter->priv;
100 struct mlx4_spec_list spec_tcp = {
101 .id = MLX4_NET_TRANS_RULE_ID_TCP,
102 {
103 .tcp_udp = {
104 .dst_port = filter->dst_port,
105 .dst_port_msk = (__force __be16)-1,
106 .src_port = filter->src_port,
107 .src_port_msk = (__force __be16)-1,
108 },
109 },
110 };
111 struct mlx4_spec_list spec_ip = {
112 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
113 {
114 .ipv4 = {
115 .dst_ip = filter->dst_ip,
116 .dst_ip_msk = (__force __be32)-1,
117 .src_ip = filter->src_ip,
118 .src_ip_msk = (__force __be32)-1,
119 },
120 },
121 };
122 struct mlx4_spec_list spec_eth = {
123 .id = MLX4_NET_TRANS_RULE_ID_ETH,
124 };
125 struct mlx4_net_trans_rule rule = {
126 .list = LIST_HEAD_INIT(rule.list),
127 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
128 .exclusive = 1,
129 .allow_loopback = 1,
130 .promisc_mode = MLX4_FS_PROMISC_NONE,
131 .port = priv->port,
132 .priority = MLX4_DOMAIN_RFS,
133 };
134 int rc;
1eb8c695
AV		 135 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
136
137 list_add_tail(&spec_eth.list, &rule.list);
138 list_add_tail(&spec_ip.list, &rule.list);
139 list_add_tail(&spec_tcp.list, &rule.list);
140
1eb8c695 141 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
6bbb6d99 142 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
1eb8c695
AV		 143 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
144
145 filter->activated = 0;
146
147 if (filter->reg_id) {
148 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
149 if (rc && rc != -ENOENT)
150 en_err(priv, "Error detaching flow. rc = %d\n", rc);
151 }
152
153 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
154 if (rc)
155 en_err(priv, "Error attaching flow. err = %d\n", rc);
156
157 mlx4_en_filter_rfs_expire(priv);
158
159 filter->activated = 1;
160}
161
162static inline struct hlist_head *
163filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
164 __be16 src_port, __be16 dst_port)
165{
166 unsigned long l;
167 int bucket_idx;
168
169 l = (__force unsigned long)src_port |
170 ((__force unsigned long)dst_port << 2);
171 l ^= (__force unsigned long)(src_ip ^ dst_ip);
172
173 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
174
175 return &priv->filter_hash[bucket_idx];
176}
177
178static struct mlx4_en_filter *
179mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
180 __be32 dst_ip, __be16 src_port, __be16 dst_port,
181 u32 flow_id)
182{
183 struct mlx4_en_filter *filter = NULL;
184
185 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
186 if (!filter)
187 return NULL;
188
189 filter->priv = priv;
190 filter->rxq_index = rxq_index;
191 INIT_WORK(&filter->work, mlx4_en_filter_work);
192
193 filter->src_ip = src_ip;
194 filter->dst_ip = dst_ip;
195 filter->src_port = src_port;
196 filter->dst_port = dst_port;
197
198 filter->flow_id = flow_id;
199
ee64c0ee 200 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
1eb8c695
AV		 201
202 list_add_tail(&filter->next, &priv->filters);
203 hlist_add_head(&filter->filter_chain,
204 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
205 dst_port));
206
207 return filter;
208}
209
210static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
211{
212 struct mlx4_en_priv *priv = filter->priv;
213 int rc;
214
215 list_del(&filter->next);
216
217 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
218 if (rc && rc != -ENOENT)
219 en_err(priv, "Error detaching flow. rc = %d\n", rc);
220
221 kfree(filter);
222}
223
224static inline struct mlx4_en_filter *
225mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
226 __be16 src_port, __be16 dst_port)
227{
228 struct hlist_node *elem;
229 struct mlx4_en_filter *filter;
230 struct mlx4_en_filter *ret = NULL;
231
232 hlist_for_each_entry(filter, elem,
233 filter_hash_bucket(priv, src_ip, dst_ip,
234 src_port, dst_port),
235 filter_chain) {
236 if (filter->src_ip == src_ip &&
237 filter->dst_ip == dst_ip &&
238 filter->src_port == src_port &&
239 filter->dst_port == dst_port) {
240 ret = filter;
241 break;
242 }
243 }
244
245 return ret;
246}
247
248static int
249mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
250 u16 rxq_index, u32 flow_id)
251{
252 struct mlx4_en_priv *priv = netdev_priv(net_dev);
253 struct mlx4_en_filter *filter;
254 const struct iphdr *ip;
255 const __be16 *ports;
256 __be32 src_ip;
257 __be32 dst_ip;
258 __be16 src_port;
259 __be16 dst_port;
260 int nhoff = skb_network_offset(skb);
261 int ret = 0;
262
263 if (skb->protocol != htons(ETH_P_IP))
264 return -EPROTONOSUPPORT;
265
266 ip = (const struct iphdr *)(skb->data + nhoff);
267 if (ip_is_fragment(ip))
268 return -EPROTONOSUPPORT;
269
270 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
271
272 src_ip = ip->saddr;
273 dst_ip = ip->daddr;
274 src_port = ports[0];
275 dst_port = ports[1];
276
277 if (ip->protocol != IPPROTO_TCP)
278 return -EPROTONOSUPPORT;
279
280 spin_lock_bh(&priv->filters_lock);
281 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
282 if (filter) {
283 if (filter->rxq_index == rxq_index)
284 goto out;
285
286 filter->rxq_index = rxq_index;
287 } else {
288 filter = mlx4_en_filter_alloc(priv, rxq_index,
289 src_ip, dst_ip,
290 src_port, dst_port, flow_id);
291 if (!filter) {
292 ret = -ENOMEM;
293 goto err;
294 }
295 }
296
297 queue_work(priv->mdev->workqueue, &filter->work);
298
299out:
300 ret = filter->id;
301err:
302 spin_unlock_bh(&priv->filters_lock);
303
304 return ret;
305}
306
307void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
308 struct mlx4_en_rx_ring *rx_ring)
309{
310 struct mlx4_en_filter *filter, *tmp;
311 LIST_HEAD(del_list);
312
313 spin_lock_bh(&priv->filters_lock);
314 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
315 list_move(&filter->next, &del_list);
316 hlist_del(&filter->filter_chain);
317 }
318 spin_unlock_bh(&priv->filters_lock);
319
320 list_for_each_entry_safe(filter, tmp, &del_list, next) {
321 cancel_work_sync(&filter->work);
322 mlx4_en_filter_free(filter);
323 }
324}
325
326static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
327{
328 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
329 LIST_HEAD(del_list);
330 int i = 0;
331
332 spin_lock_bh(&priv->filters_lock);
333 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
334 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
335 break;
336
337 if (filter->activated &&
338 !work_pending(&filter->work) &&
339 rps_may_expire_flow(priv->dev,
340 filter->rxq_index, filter->flow_id,
341 filter->id)) {
342 list_move(&filter->next, &del_list);
343 hlist_del(&filter->filter_chain);
344 } else
345 last_filter = filter;
346
347 i++;
348 }
349
350 if (last_filter && (&last_filter->next != priv->filters.next))
351 list_move(&priv->filters, &last_filter->next);
352
353 spin_unlock_bh(&priv->filters_lock);
354
355 list_for_each_entry_safe(filter, tmp, &del_list, next)
356 mlx4_en_filter_free(filter);
357}
358#endif
359
8e586137 360static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP		 361{
362 struct mlx4_en_priv *priv = netdev_priv(dev);
363 struct mlx4_en_dev *mdev = priv->mdev;
364 int err;
4c3eb3ca 365 int idx;
c27a02cd 366
f1b553fb 367 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
c27a02cd 368
f1b553fb 369 set_bit(vid, priv->active_vlans);
c27a02cd
YP		 370
371 /* Add VID to port VLAN filter */
372 mutex_lock(&mdev->state_lock);
373 if (mdev->device_up && priv->port_up) {
f1b553fb 374 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 375 if (err)
453a6082 376 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd 377 }
4c3eb3ca
EC		 378 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
379 en_err(priv, "failed adding vlan %d\n", vid);
c27a02cd 380 mutex_unlock(&mdev->state_lock);
4c3eb3ca 381
8e586137 382 return 0;
c27a02cd
YP		 383}
384
8e586137 385static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP		 386{
387 struct mlx4_en_priv *priv = netdev_priv(dev);
388 struct mlx4_en_dev *mdev = priv->mdev;
389 int err;
4c3eb3ca 390 int idx;
c27a02cd 391
f1b553fb 392 en_dbg(HW, priv, "Killing VID:%d\n", vid);
c27a02cd 393
f1b553fb 394 clear_bit(vid, priv->active_vlans);
c27a02cd
YP		 395
396 /* Remove VID from port VLAN filter */
397 mutex_lock(&mdev->state_lock);
4c3eb3ca
EC		 398 if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
399 mlx4_unregister_vlan(mdev->dev, priv->port, idx);
400 else
401 en_err(priv, "could not find vid %d in cache\n", vid);
402
c27a02cd 403 if (mdev->device_up && priv->port_up) {
f1b553fb 404 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 405 if (err)
453a6082 406 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP		 407 }
408 mutex_unlock(&mdev->state_lock);
8e586137
JP		 409
410 return 0;
c27a02cd
YP		 411}
412
6bbb6d99
YB		 413static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
414{
415 unsigned int i;
416 for (i = ETH_ALEN - 1; i; --i) {
417 dst_mac[i] = src_mac & 0xff;
418 src_mac >>= 8;
419 }
420 memset(&dst_mac[ETH_ALEN], 0, 2);
421}
422
16a10ffd
YB		 423static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
424 unsigned char *mac, int *qpn, u64 *reg_id)
425{
426 struct mlx4_en_dev *mdev = priv->mdev;
427 struct mlx4_dev *dev = mdev->dev;
428 int err;
429
430 switch (dev->caps.steering_mode) {
431 case MLX4_STEERING_MODE_B0: {
432 struct mlx4_qp qp;
433 u8 gid[16] = {0};
434
435 qp.qpn = *qpn;
436 memcpy(&gid[10], mac, ETH_ALEN);
437 gid[5] = priv->port;
438
439 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
440 break;
441 }
442 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
443 struct mlx4_spec_list spec_eth = { {NULL} };
444 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
445
446 struct mlx4_net_trans_rule rule = {
447 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
448 .exclusive = 0,
449 .allow_loopback = 1,
450 .promisc_mode = MLX4_FS_PROMISC_NONE,
451 .priority = MLX4_DOMAIN_NIC,
452 };
453
454 rule.port = priv->port;
455 rule.qpn = *qpn;
456 INIT_LIST_HEAD(&rule.list);
457
458 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
459 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
460 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
461 list_add_tail(&spec_eth.list, &rule.list);
462
463 err = mlx4_flow_attach(dev, &rule, reg_id);
464 break;
465 }
466 default:
467 return -EINVAL;
468 }
469 if (err)
470 en_warn(priv, "Failed Attaching Unicast\n");
471
472 return err;
473}
474
475static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
476 unsigned char *mac, int qpn, u64 reg_id)
477{
478 struct mlx4_en_dev *mdev = priv->mdev;
479 struct mlx4_dev *dev = mdev->dev;
480
481 switch (dev->caps.steering_mode) {
482 case MLX4_STEERING_MODE_B0: {
483 struct mlx4_qp qp;
484 u8 gid[16] = {0};
485
486 qp.qpn = qpn;
487 memcpy(&gid[10], mac, ETH_ALEN);
488 gid[5] = priv->port;
489
490 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
491 break;
492 }
493 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
494 mlx4_flow_detach(dev, reg_id);
495 break;
496 }
497 default:
498 en_err(priv, "Invalid steering mode.\n");
499 }
500}
501
502static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
503{
504 struct mlx4_en_dev *mdev = priv->mdev;
505 struct mlx4_dev *dev = mdev->dev;
506 struct mlx4_mac_entry *entry;
507 int index = 0;
508 int err = 0;
509 u64 reg_id;
510 int *qpn = &priv->base_qpn;
511 u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
512
513 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
514 priv->dev->dev_addr);
515 index = mlx4_register_mac(dev, priv->port, mac);
516 if (index < 0) {
517 err = index;
518 en_err(priv, "Failed adding MAC: %pM\n",
519 priv->dev->dev_addr);
520 return err;
521 }
522
523 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
524 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
525 *qpn = base_qpn + index;
526 return 0;
527 }
528
529 err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
530 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
531 if (err) {
532 en_err(priv, "Failed to reserve qp for mac registration\n");
533 goto qp_err;
534 }
535
536 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
537 if (err)
538 goto steer_err;
539
540 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
541 if (!entry) {
542 err = -ENOMEM;
543 goto alloc_err;
544 }
545 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
546 entry->reg_id = reg_id;
547
c07cb4b0
YB		 548 hlist_add_head_rcu(&entry->hlist,
549 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
16a10ffd 550
c07cb4b0 551 return 0;
16a10ffd
YB		 552
553alloc_err:
554 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
555
556steer_err:
557 mlx4_qp_release_range(dev, *qpn, 1);
558
559qp_err:
560 mlx4_unregister_mac(dev, priv->port, mac);
561 return err;
562}
563
564static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
565{
566 struct mlx4_en_dev *mdev = priv->mdev;
567 struct mlx4_dev *dev = mdev->dev;
16a10ffd
YB		 568 int qpn = priv->base_qpn;
569 u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
570
571 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
572 priv->dev->dev_addr);
573 mlx4_unregister_mac(dev, priv->port, mac);
574
575 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
c07cb4b0
YB		 576 struct mlx4_mac_entry *entry;
577 struct hlist_node *n, *tmp;
578 struct hlist_head *bucket;
579 unsigned int mac_hash;
580
581 mac_hash = priv->dev->dev_addr[MLX4_EN_MAC_HASH_IDX];
582 bucket = &priv->mac_hash[mac_hash];
583 hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) {
584 if (ether_addr_equal_64bits(entry->mac,
585 priv->dev->dev_addr)) {
586 en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n",
587 priv->port, priv->dev->dev_addr, qpn);
588 mlx4_en_uc_steer_release(priv, entry->mac,
589 qpn, entry->reg_id);
590 mlx4_qp_release_range(dev, qpn, 1);
591
592 hlist_del_rcu(&entry->hlist);
593 kfree_rcu(entry, rcu);
594 break;
595 }
16a10ffd
YB		 596 }
597 }
598}
599
600static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
90bbb74a 601 unsigned char *new_mac, unsigned char *prev_mac)
16a10ffd
YB		 602{
603 struct mlx4_en_dev *mdev = priv->mdev;
604 struct mlx4_dev *dev = mdev->dev;
16a10ffd
YB		 605 int err = 0;
606 u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
607
608 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
c07cb4b0
YB		 609 struct hlist_head *bucket;
610 unsigned int mac_hash;
611 struct mlx4_mac_entry *entry;
612 struct hlist_node *n, *tmp;
613 u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
614
615 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
616 hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) {
617 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
618 mlx4_en_uc_steer_release(priv, entry->mac,
619 qpn, entry->reg_id);
620 mlx4_unregister_mac(dev, priv->port,
621 prev_mac_u64);
622 hlist_del_rcu(&entry->hlist);
623 synchronize_rcu();
624 memcpy(entry->mac, new_mac, ETH_ALEN);
625 entry->reg_id = 0;
626 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
627 hlist_add_head_rcu(&entry->hlist,
628 &priv->mac_hash[mac_hash]);
629 mlx4_register_mac(dev, priv->port, new_mac_u64);
630 err = mlx4_en_uc_steer_add(priv, new_mac,
631 &qpn,
632 &entry->reg_id);
633 return err;
634 }
635 }
636 return -EINVAL;
16a10ffd
YB		 637 }
638
639 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
640}
641
e7c1c2c4 642u64 mlx4_en_mac_to_u64(u8 *addr)
c27a02cd
YP		 643{
644 u64 mac = 0;
645 int i;
646
647 for (i = 0; i < ETH_ALEN; i++) {
648 mac <<= 8;
649 mac |= addr[i];
650 }
651 return mac;
652}
653
654static int mlx4_en_set_mac(struct net_device *dev, void *addr)
655{
656 struct mlx4_en_priv *priv = netdev_priv(dev);
657 struct mlx4_en_dev *mdev = priv->mdev;
658 struct sockaddr *saddr = addr;
659
660 if (!is_valid_ether_addr(saddr->sa_data))
661 return -EADDRNOTAVAIL;
662
663 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
c27a02cd
YP		 664 queue_work(mdev->workqueue, &priv->mac_task);
665 return 0;
666}
667
668static void mlx4_en_do_set_mac(struct work_struct *work)
669{
670 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
671 mac_task);
672 struct mlx4_en_dev *mdev = priv->mdev;
673 int err = 0;
674
675 mutex_lock(&mdev->state_lock);
676 if (priv->port_up) {
677 /* Remove old MAC and insert the new one */
16a10ffd 678 err = mlx4_en_replace_mac(priv, priv->base_qpn,
90bbb74a 679 priv->dev->dev_addr, priv->prev_mac);
c27a02cd 680 if (err)
453a6082 681 en_err(priv, "Failed changing HW MAC address\n");
6bbb6d99
YB		 682 memcpy(priv->prev_mac, priv->dev->dev_addr,
683 sizeof(priv->prev_mac));
c27a02cd 684 } else
48e551ff 685 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
c27a02cd
YP		 686
687 mutex_unlock(&mdev->state_lock);
688}
689
690static void mlx4_en_clear_list(struct net_device *dev)
691{
692 struct mlx4_en_priv *priv = netdev_priv(dev);
6d199937 693 struct mlx4_en_mc_list *tmp, *mc_to_del;
c27a02cd 694
6d199937
YP		 695 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
696 list_del(&mc_to_del->list);
697 kfree(mc_to_del);
698 }
c27a02cd
YP		 699}
700
701static void mlx4_en_cache_mclist(struct net_device *dev)
702{
703 struct mlx4_en_priv *priv = netdev_priv(dev);
22bedad3 704 struct netdev_hw_addr *ha;
6d199937 705 struct mlx4_en_mc_list *tmp;
ff6e2163 706
0e03567a 707 mlx4_en_clear_list(dev);
6d199937
YP		 708 netdev_for_each_mc_addr(ha, dev) {
709 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
710 if (!tmp) {
6d199937
YP		 711 mlx4_en_clear_list(dev);
712 return;
713 }
714 memcpy(tmp->addr, ha->addr, ETH_ALEN);
715 list_add_tail(&tmp->list, &priv->mc_list);
716 }
c27a02cd
YP		 717}
718
6d199937
YP		 719static void update_mclist_flags(struct mlx4_en_priv *priv,
720 struct list_head *dst,
721 struct list_head *src)
722{
723 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
724 bool found;
725
726 /* Find all the entries that should be removed from dst,
727 * These are the entries that are not found in src
728 */
729 list_for_each_entry(dst_tmp, dst, list) {
730 found = false;
731 list_for_each_entry(src_tmp, src, list) {
732 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
733 found = true;
734 break;
735 }
736 }
737 if (!found)
738 dst_tmp->action = MCLIST_REM;
739 }
740
741 /* Add entries that exist in src but not in dst
742 * mark them as need to add
743 */
744 list_for_each_entry(src_tmp, src, list) {
745 found = false;
746 list_for_each_entry(dst_tmp, dst, list) {
747 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
748 dst_tmp->action = MCLIST_NONE;
749 found = true;
750 break;
751 }
752 }
753 if (!found) {
14f8dc49
JP		 754 new_mc = kmemdup(src_tmp,
755 sizeof(struct mlx4_en_mc_list),
6d199937 756 GFP_KERNEL);
14f8dc49 757 if (!new_mc)
6d199937 758 return;
14f8dc49 759
6d199937
YP		 760 new_mc->action = MCLIST_ADD;
761 list_add_tail(&new_mc->list, dst);
762 }
763 }
764}
c27a02cd 765
0eb74fdd 766static void mlx4_en_set_rx_mode(struct net_device *dev)
c27a02cd
YP		 767{
768 struct mlx4_en_priv *priv = netdev_priv(dev);
769
770 if (!priv->port_up)
771 return;
772
0eb74fdd 773 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
c27a02cd
YP		 774}
775
0eb74fdd
YB		 776static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
777 struct mlx4_en_dev *mdev)
c27a02cd 778{
c96d97f4 779 int err = 0;
c27a02cd 780
0eb74fdd 781 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
c27a02cd 782 if (netif_msg_rx_status(priv))
0eb74fdd
YB		 783 en_warn(priv, "Entering promiscuous mode\n");
784 priv->flags |= MLX4_EN_FLAG_PROMISC;
c27a02cd 785
0eb74fdd 786 /* Enable promiscouos mode */
c96d97f4 787 switch (mdev->dev->caps.steering_mode) {
592e49dd 788 case MLX4_STEERING_MODE_DEVICE_MANAGED:
0eb74fdd
YB		 789 err = mlx4_flow_steer_promisc_add(mdev->dev,
790 priv->port,
791 priv->base_qpn,
792 MLX4_FS_PROMISC_UPLINK);
592e49dd 793 if (err)
0eb74fdd
YB		 794 en_err(priv, "Failed enabling promiscuous mode\n");
795 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
592e49dd
HHZ		 796 break;
797
c96d97f4 798 case MLX4_STEERING_MODE_B0:
0eb74fdd
YB		 799 err = mlx4_unicast_promisc_add(mdev->dev,
800 priv->base_qpn,
801 priv->port);
c96d97f4 802 if (err)
0eb74fdd
YB		 803 en_err(priv, "Failed enabling unicast promiscuous mode\n");
804
805 /* Add the default qp number as multicast
806 * promisc
807 */
808 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
809 err = mlx4_multicast_promisc_add(mdev->dev,
810 priv->base_qpn,
811 priv->port);
c96d97f4 812 if (err)
0eb74fdd
YB		 813 en_err(priv, "Failed enabling multicast promiscuous mode\n");
814 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
c96d97f4
HHZ		 815 }
816 break;
c27a02cd 817
c96d97f4
HHZ		 818 case MLX4_STEERING_MODE_A0:
819 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
820 priv->port,
0eb74fdd
YB		 821 priv->base_qpn,
822 1);
1679200f 823 if (err)
0eb74fdd 824 en_err(priv, "Failed enabling promiscuous mode\n");
c96d97f4 825 break;
1679200f
YP		 826 }
827
0eb74fdd
YB		 828 /* Disable port multicast filter (unconditionally) */
829 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
830 0, MLX4_MCAST_DISABLE);
831 if (err)
832 en_err(priv, "Failed disabling multicast filter\n");
833
834 /* Disable port VLAN filter */
f1b553fb 835 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 836 if (err)
0eb74fdd
YB		 837 en_err(priv, "Failed disabling VLAN filter\n");
838 }
839}
840
841static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
842 struct mlx4_en_dev *mdev)
843{
844 int err = 0;
845
846 if (netif_msg_rx_status(priv))
847 en_warn(priv, "Leaving promiscuous mode\n");
848 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
849
850 /* Disable promiscouos mode */
851 switch (mdev->dev->caps.steering_mode) {
852 case MLX4_STEERING_MODE_DEVICE_MANAGED:
853 err = mlx4_flow_steer_promisc_remove(mdev->dev,
854 priv->port,
855 MLX4_FS_PROMISC_UPLINK);
856 if (err)
857 en_err(priv, "Failed disabling promiscuous mode\n");
858 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
859 break;
860
861 case MLX4_STEERING_MODE_B0:
862 err = mlx4_unicast_promisc_remove(mdev->dev,
863 priv->base_qpn,
864 priv->port);
865 if (err)
866 en_err(priv, "Failed disabling unicast promiscuous mode\n");
867 /* Disable Multicast promisc */
868 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
869 err = mlx4_multicast_promisc_remove(mdev->dev,
870 priv->base_qpn,
871 priv->port);
872 if (err)
873 en_err(priv, "Failed disabling multicast promiscuous mode\n");
874 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
875 }
876 break;
877
878 case MLX4_STEERING_MODE_A0:
879 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
880 priv->port,
881 priv->base_qpn, 0);
882 if (err)
883 en_err(priv, "Failed disabling promiscuous mode\n");
884 break;
c27a02cd
YP		 885 }
886
0eb74fdd
YB		 887 /* Enable port VLAN filter */
888 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
889 if (err)
890 en_err(priv, "Failed enabling VLAN filter\n");
891}
892
893static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
894 struct net_device *dev,
895 struct mlx4_en_dev *mdev)
896{
897 struct mlx4_en_mc_list *mclist, *tmp;
898 u64 mcast_addr = 0;
899 u8 mc_list[16] = {0};
900 int err = 0;
901
c27a02cd
YP		 902 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
903 if (dev->flags & IFF_ALLMULTI) {
904 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
905 0, MLX4_MCAST_DISABLE);
906 if (err)
453a6082 907 en_err(priv, "Failed disabling multicast filter\n");
1679200f
YP		 908
909 /* Add the default qp number as multicast promisc */
910 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
c96d97f4 911 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 912 case MLX4_STEERING_MODE_DEVICE_MANAGED:
913 err = mlx4_flow_steer_promisc_add(mdev->dev,
914 priv->port,
915 priv->base_qpn,
916 MLX4_FS_PROMISC_ALL_MULTI);
917 break;
918
c96d97f4
HHZ		 919 case MLX4_STEERING_MODE_B0:
920 err = mlx4_multicast_promisc_add(mdev->dev,
921 priv->base_qpn,
922 priv->port);
923 break;
924
925 case MLX4_STEERING_MODE_A0:
926 break;
927 }
1679200f
YP		 928 if (err)
929 en_err(priv, "Failed entering multicast promisc mode\n");
930 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
931 }
c27a02cd 932 } else {
1679200f
YP		 933 /* Disable Multicast promisc */
934 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
c96d97f4 935 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 936 case MLX4_STEERING_MODE_DEVICE_MANAGED:
937 err = mlx4_flow_steer_promisc_remove(mdev->dev,
938 priv->port,
939 MLX4_FS_PROMISC_ALL_MULTI);
940 break;
941
c96d97f4
HHZ		 942 case MLX4_STEERING_MODE_B0:
943 err = mlx4_multicast_promisc_remove(mdev->dev,
944 priv->base_qpn,
945 priv->port);
946 break;
947
948 case MLX4_STEERING_MODE_A0:
949 break;
950 }
1679200f 951 if (err)
25985edc 952 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1679200f
YP		 953 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
954 }
ff6e2163 955
c27a02cd
YP		 956 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
957 0, MLX4_MCAST_DISABLE);
958 if (err)
453a6082 959 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd
YP		 960
961 /* Flush mcast filter and init it with broadcast address */
962 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
963 1, MLX4_MCAST_CONFIG);
964
965 /* Update multicast list - we cache all addresses so they won't
966 * change while HW is updated holding the command semaphor */
dbd501a8 967 netif_addr_lock_bh(dev);
c27a02cd 968 mlx4_en_cache_mclist(dev);
dbd501a8 969 netif_addr_unlock_bh(dev);
6d199937
YP		 970 list_for_each_entry(mclist, &priv->mc_list, list) {
971 mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
c27a02cd
YP		 972 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
973 mcast_addr, 0, MLX4_MCAST_CONFIG);
974 }
975 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
976 0, MLX4_MCAST_ENABLE);
977 if (err)
453a6082 978 en_err(priv, "Failed enabling multicast filter\n");
6d199937
YP		 979
980 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
981 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
982 if (mclist->action == MCLIST_REM) {
983 /* detach this address and delete from list */
984 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
985 mc_list[5] = priv->port;
986 err = mlx4_multicast_detach(mdev->dev,
987 &priv->rss_map.indir_qp,
988 mc_list,
0ff1fb65
HHZ		 989 MLX4_PROT_ETH,
990 mclist->reg_id);
6d199937
YP		 991 if (err)
992 en_err(priv, "Fail to detach multicast address\n");
993
994 /* remove from list */
995 list_del(&mclist->list);
996 kfree(mclist);
9c64508a 997 } else if (mclist->action == MCLIST_ADD) {
6d199937
YP		 998 /* attach the address */
999 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
0ff1fb65 1000 /* needed for B0 steering support */
6d199937
YP		 1001 mc_list[5] = priv->port;
1002 err = mlx4_multicast_attach(mdev->dev,
1003 &priv->rss_map.indir_qp,
0ff1fb65
HHZ		 1004 mc_list,
1005 priv->port, 0,
1006 MLX4_PROT_ETH,
1007 &mclist->reg_id);
6d199937
YP		 1008 if (err)
1009 en_err(priv, "Fail to attach multicast address\n");
1010
1011 }
1012 }
c27a02cd 1013 }
0eb74fdd
YB		 1014}
1015
cc5387f7
YB		 1016static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1017 struct net_device *dev,
1018 struct mlx4_en_dev *mdev)
1019{
1020 struct netdev_hw_addr *ha;
1021 struct mlx4_mac_entry *entry;
1022 struct hlist_node *n, *tmp;
1023 bool found;
1024 u64 mac;
1025 int err = 0;
1026 struct hlist_head *bucket;
1027 unsigned int i;
1028 int removed = 0;
1029 u32 prev_flags;
1030
1031 /* Note that we do not need to protect our mac_hash traversal with rcu,
1032 * since all modification code is protected by mdev->state_lock
1033 */
1034
1035 /* find what to remove */
1036 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1037 bucket = &priv->mac_hash[i];
1038 hlist_for_each_entry_safe(entry, n, tmp, bucket, hlist) {
1039 found = false;
1040 netdev_for_each_uc_addr(ha, dev) {
1041 if (ether_addr_equal_64bits(entry->mac,
1042 ha->addr)) {
1043 found = true;
1044 break;
1045 }
1046 }
1047
1048 /* MAC address of the port is not in uc list */
1049 if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
1050 found = true;
1051
1052 if (!found) {
1053 mac = mlx4_en_mac_to_u64(entry->mac);
1054 mlx4_en_uc_steer_release(priv, entry->mac,
1055 priv->base_qpn,
1056 entry->reg_id);
1057 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1058
1059 hlist_del_rcu(&entry->hlist);
1060 kfree_rcu(entry, rcu);
1061 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1062 entry->mac, priv->port);
1063 ++removed;
1064 }
1065 }
1066 }
1067
1068 /* if we didn't remove anything, there is no use in trying to add
1069 * again once we are in a forced promisc mode state
1070 */
1071 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1072 return;
1073
1074 prev_flags = priv->flags;
1075 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1076
1077 /* find what to add */
1078 netdev_for_each_uc_addr(ha, dev) {
1079 found = false;
1080 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1081 hlist_for_each_entry(entry, n, bucket, hlist) {
1082 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1083 found = true;
1084 break;
1085 }
1086 }
1087
1088 if (!found) {
1089 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1090 if (!entry) {
1091 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1092 ha->addr, priv->port);
1093 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1094 break;
1095 }
1096 mac = mlx4_en_mac_to_u64(ha->addr);
1097 memcpy(entry->mac, ha->addr, ETH_ALEN);
1098 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1099 if (err < 0) {
1100 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1101 ha->addr, priv->port, err);
1102 kfree(entry);
1103 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1104 break;
1105 }
1106 err = mlx4_en_uc_steer_add(priv, ha->addr,
1107 &priv->base_qpn,
1108 &entry->reg_id);
1109 if (err) {
1110 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1111 ha->addr, priv->port, err);
1112 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1113 kfree(entry);
1114 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1115 break;
1116 } else {
1117 unsigned int mac_hash;
1118 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1119 ha->addr, priv->port);
1120 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1121 bucket = &priv->mac_hash[mac_hash];
1122 hlist_add_head_rcu(&entry->hlist, bucket);
1123 }
1124 }
1125 }
1126
1127 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1128 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1129 priv->port);
1130 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1131 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1132 priv->port);
1133 }
1134}
1135
0eb74fdd
YB		 1136static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1137{
1138 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1139 rx_mode_task);
1140 struct mlx4_en_dev *mdev = priv->mdev;
1141 struct net_device *dev = priv->dev;
1142
1143 mutex_lock(&mdev->state_lock);
1144 if (!mdev->device_up) {
1145 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1146 goto out;
1147 }
1148 if (!priv->port_up) {
1149 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1150 goto out;
1151 }
1152
1153 if (!netif_carrier_ok(dev)) {
1154 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1155 if (priv->port_state.link_state) {
1156 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1157 netif_carrier_on(dev);
1158 en_dbg(LINK, priv, "Link Up\n");
1159 }
1160 }
1161 }
1162
cc5387f7
YB		 1163 if (dev->priv_flags & IFF_UNICAST_FLT)
1164 mlx4_en_do_uc_filter(priv, dev, mdev);
1165
0eb74fdd 1166 /* Promsicuous mode: disable all filters */
cc5387f7
YB		 1167 if ((dev->flags & IFF_PROMISC) ||
1168 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
0eb74fdd
YB		 1169 mlx4_en_set_promisc_mode(priv, mdev);
1170 goto out;
1171 }
1172
1173 /* Not in promiscuous mode */
1174 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1175 mlx4_en_clear_promisc_mode(priv, mdev);
1176
1177 mlx4_en_do_multicast(priv, dev, mdev);
c27a02cd
YP		 1178out:
1179 mutex_unlock(&mdev->state_lock);
1180}
1181
1182#ifdef CONFIG_NET_POLL_CONTROLLER
1183static void mlx4_en_netpoll(struct net_device *dev)
1184{
1185 struct mlx4_en_priv *priv = netdev_priv(dev);
1186 struct mlx4_en_cq *cq;
1187 unsigned long flags;
1188 int i;
1189
1190 for (i = 0; i < priv->rx_ring_num; i++) {
1191 cq = &priv->rx_cq[i];
1192 spin_lock_irqsave(&cq->lock, flags);
1193 napi_synchronize(&cq->napi);
1194 mlx4_en_process_rx_cq(dev, cq, 0);
1195 spin_unlock_irqrestore(&cq->lock, flags);
1196 }
1197}
1198#endif
1199
1200static void mlx4_en_tx_timeout(struct net_device *dev)
1201{
1202 struct mlx4_en_priv *priv = netdev_priv(dev);
1203 struct mlx4_en_dev *mdev = priv->mdev;
1204
1205 if (netif_msg_timer(priv))
453a6082 1206 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
c27a02cd 1207
1e338db5 1208 priv->port_stats.tx_timeout++;
453a6082 1209 en_dbg(DRV, priv, "Scheduling watchdog\n");
1e338db5 1210 queue_work(mdev->workqueue, &priv->watchdog_task);
c27a02cd
YP		 1211}
1212
1213
1214static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
1215{
1216 struct mlx4_en_priv *priv = netdev_priv(dev);
1217
1218 spin_lock_bh(&priv->stats_lock);
1219 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
1220 spin_unlock_bh(&priv->stats_lock);
1221
1222 return &priv->ret_stats;
1223}
1224
1225static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1226{
c27a02cd
YP		 1227 struct mlx4_en_cq *cq;
1228 int i;
1229
1230 /* If we haven't received a specific coalescing setting
98a1708d 1231 * (module param), we set the moderation parameters as follows:
c27a02cd 1232 * - moder_cnt is set to the number of mtu sized packets to
ecfd2ce1 1233 * satisfy our coalescing target.
c27a02cd
YP		 1234 * - moder_time is set to a fixed value.
1235 */
3db36fb2 1236 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
60b9f9e5 1237 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
a19a848a
YP		 1238 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1239 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
48e551ff
YB		 1240 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1241 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
c27a02cd
YP		 1242
1243 /* Setup cq moderation params */
1244 for (i = 0; i < priv->rx_ring_num; i++) {
1245 cq = &priv->rx_cq[i];
1246 cq->moder_cnt = priv->rx_frames;
1247 cq->moder_time = priv->rx_usecs;
6b4d8d9f
AG		 1248 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1249 priv->last_moder_packets[i] = 0;
1250 priv->last_moder_bytes[i] = 0;
c27a02cd
YP		 1251 }
1252
1253 for (i = 0; i < priv->tx_ring_num; i++) {
1254 cq = &priv->tx_cq[i];
a19a848a
YP		 1255 cq->moder_cnt = priv->tx_frames;
1256 cq->moder_time = priv->tx_usecs;
c27a02cd
YP		 1257 }
1258
1259 /* Reset auto-moderation params */
1260 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1261 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1262 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1263 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1264 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
60b9f9e5 1265 priv->adaptive_rx_coal = 1;
c27a02cd 1266 priv->last_moder_jiffies = 0;
c27a02cd 1267 priv->last_moder_tx_packets = 0;
c27a02cd
YP		 1268}
1269
1270static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1271{
1272 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
c27a02cd
YP		 1273 struct mlx4_en_cq *cq;
1274 unsigned long packets;
1275 unsigned long rate;
1276 unsigned long avg_pkt_size;
1277 unsigned long rx_packets;
1278 unsigned long rx_bytes;
c27a02cd
YP		 1279 unsigned long rx_pkt_diff;
1280 int moder_time;
6b4d8d9f 1281 int ring, err;
c27a02cd
YP		 1282
1283 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1284 return;
1285
6b4d8d9f
AG		 1286 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1287 spin_lock_bh(&priv->stats_lock);
1288 rx_packets = priv->rx_ring[ring].packets;
1289 rx_bytes = priv->rx_ring[ring].bytes;
1290 spin_unlock_bh(&priv->stats_lock);
1291
1292 rx_pkt_diff = ((unsigned long) (rx_packets -
1293 priv->last_moder_packets[ring]));
1294 packets = rx_pkt_diff;
1295 rate = packets * HZ / period;
1296 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1297 priv->last_moder_bytes[ring])) / packets : 0;
1298
1299 /* Apply auto-moderation only when packet rate
1300 * exceeds a rate that it matters */
1301 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1302 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
c27a02cd
YP		 1303 if (rate < priv->pkt_rate_low)
1304 moder_time = priv->rx_usecs_low;
1305 else if (rate > priv->pkt_rate_high)
1306 moder_time = priv->rx_usecs_high;
1307 else
1308 moder_time = (rate - priv->pkt_rate_low) *
1309 (priv->rx_usecs_high - priv->rx_usecs_low) /
1310 (priv->pkt_rate_high - priv->pkt_rate_low) +
1311 priv->rx_usecs_low;
6b4d8d9f
AG		 1312 } else {
1313 moder_time = priv->rx_usecs_low;
c27a02cd 1314 }
c27a02cd 1315
6b4d8d9f
AG		 1316 if (moder_time != priv->last_moder_time[ring]) {
1317 priv->last_moder_time[ring] = moder_time;
1318 cq = &priv->rx_cq[ring];
c27a02cd
YP		 1319 cq->moder_time = moder_time;
1320 err = mlx4_en_set_cq_moder(priv, cq);
6b4d8d9f 1321 if (err)
48e551ff
YB		 1322 en_err(priv, "Failed modifying moderation for cq:%d\n",
1323 ring);
c27a02cd 1324 }
6b4d8d9f
AG		 1325 priv->last_moder_packets[ring] = rx_packets;
1326 priv->last_moder_bytes[ring] = rx_bytes;
c27a02cd
YP		 1327 }
1328
c27a02cd
YP		 1329 priv->last_moder_jiffies = jiffies;
1330}
1331
1332static void mlx4_en_do_get_stats(struct work_struct *work)
1333{
bf6aede7 1334 struct delayed_work *delay = to_delayed_work(work);
c27a02cd
YP		 1335 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1336 stats_task);
1337 struct mlx4_en_dev *mdev = priv->mdev;
1338 int err;
1339
c27a02cd
YP		 1340 mutex_lock(&mdev->state_lock);
1341 if (mdev->device_up) {
2d51837f
EE		 1342 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1343 if (err)
1344 en_dbg(HW, priv, "Could not update stats\n");
1345
c27a02cd
YP		 1346 if (priv->port_up)
1347 mlx4_en_auto_moderation(priv);
1348
1349 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1350 }
d7e1a487
YP		 1351 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1352 queue_work(mdev->workqueue, &priv->mac_task);
1353 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1354 }
c27a02cd
YP		 1355 mutex_unlock(&mdev->state_lock);
1356}
1357
1358static void mlx4_en_linkstate(struct work_struct *work)
1359{
1360 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1361 linkstate_task);
1362 struct mlx4_en_dev *mdev = priv->mdev;
1363 int linkstate = priv->link_state;
1364
1365 mutex_lock(&mdev->state_lock);
1366 /* If observable port state changed set carrier state and
1367 * report to system log */
1368 if (priv->last_link_state != linkstate) {
1369 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
e5cc44b2 1370 en_info(priv, "Link Down\n");
c27a02cd
YP		 1371 netif_carrier_off(priv->dev);
1372 } else {
e5cc44b2 1373 en_info(priv, "Link Up\n");
c27a02cd
YP		 1374 netif_carrier_on(priv->dev);
1375 }
1376 }
1377 priv->last_link_state = linkstate;
1378 mutex_unlock(&mdev->state_lock);
1379}
1380
1381
18cc42a3 1382int mlx4_en_start_port(struct net_device *dev)
c27a02cd
YP		 1383{
1384 struct mlx4_en_priv *priv = netdev_priv(dev);
1385 struct mlx4_en_dev *mdev = priv->mdev;
1386 struct mlx4_en_cq *cq;
1387 struct mlx4_en_tx_ring *tx_ring;
c27a02cd
YP		 1388 int rx_index = 0;
1389 int tx_index = 0;
c27a02cd
YP		 1390 int err = 0;
1391 int i;
1392 int j;
1679200f 1393 u8 mc_list[16] = {0};
c27a02cd
YP		 1394
1395 if (priv->port_up) {
453a6082 1396 en_dbg(DRV, priv, "start port called while port already up\n");
c27a02cd
YP		 1397 return 0;
1398 }
1399
6d199937
YP		 1400 INIT_LIST_HEAD(&priv->mc_list);
1401 INIT_LIST_HEAD(&priv->curr_list);
0d256c0e
HHZ		 1402 INIT_LIST_HEAD(&priv->ethtool_list);
1403 memset(&priv->ethtool_rules[0], 0,
1404 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
6d199937 1405
c27a02cd
YP		 1406 /* Calculate Rx buf size */
1407 dev->mtu = min(dev->mtu, priv->max_mtu);
1408 mlx4_en_calc_rx_buf(dev);
453a6082 1409 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
38aab07c 1410
c27a02cd 1411 /* Configure rx cq's and rings */
38aab07c
YP		 1412 err = mlx4_en_activate_rx_rings(priv);
1413 if (err) {
453a6082 1414 en_err(priv, "Failed to activate RX rings\n");
38aab07c
YP		 1415 return err;
1416 }
c27a02cd
YP		 1417 for (i = 0; i < priv->rx_ring_num; i++) {
1418 cq = &priv->rx_cq[i];
c27a02cd 1419
76532d0c 1420 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1421 if (err) {
453a6082 1422 en_err(priv, "Failed activating Rx CQ\n");
a4233304 1423 goto cq_err;
c27a02cd
YP		 1424 }
1425 for (j = 0; j < cq->size; j++)
1426 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1427 err = mlx4_en_set_cq_moder(priv, cq);
1428 if (err) {
453a6082 1429 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1430 mlx4_en_deactivate_cq(priv, cq);
1431 goto cq_err;
1432 }
1433 mlx4_en_arm_cq(priv, cq);
38aab07c 1434 priv->rx_ring[i].cqn = cq->mcq.cqn;
c27a02cd
YP		 1435 ++rx_index;
1436 }
1437
ffe455ad
EE		 1438 /* Set qp number */
1439 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
16a10ffd 1440 err = mlx4_en_get_qp(priv);
1679200f 1441 if (err) {
ffe455ad 1442 en_err(priv, "Failed getting eth qp\n");
1679200f
YP		 1443 goto cq_err;
1444 }
1445 mdev->mac_removed[priv->port] = 0;
1446
c27a02cd
YP		 1447 err = mlx4_en_config_rss_steer(priv);
1448 if (err) {
453a6082 1449 en_err(priv, "Failed configuring rss steering\n");
1679200f 1450 goto mac_err;
c27a02cd
YP		 1451 }
1452
cabdc8ee
HHZ		 1453 err = mlx4_en_create_drop_qp(priv);
1454 if (err)
1455 goto rss_err;
1456
c27a02cd
YP		 1457 /* Configure tx cq's and rings */
1458 for (i = 0; i < priv->tx_ring_num; i++) {
1459 /* Configure cq */
1460 cq = &priv->tx_cq[i];
76532d0c 1461 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1462 if (err) {
453a6082 1463 en_err(priv, "Failed allocating Tx CQ\n");
c27a02cd
YP		 1464 goto tx_err;
1465 }
1466 err = mlx4_en_set_cq_moder(priv, cq);
1467 if (err) {
453a6082 1468 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1469 mlx4_en_deactivate_cq(priv, cq);
1470 goto tx_err;
1471 }
453a6082 1472 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
c27a02cd
YP		 1473 cq->buf->wqe_index = cpu_to_be16(0xffff);
1474
1475 /* Configure ring */
1476 tx_ring = &priv->tx_ring[i];
0e98b523 1477 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
d317966b 1478 i / priv->num_tx_rings_p_up);
c27a02cd 1479 if (err) {
453a6082 1480 en_err(priv, "Failed allocating Tx ring\n");
c27a02cd
YP		 1481 mlx4_en_deactivate_cq(priv, cq);
1482 goto tx_err;
1483 }
5b263f53 1484 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
e22979d9
YP		 1485
1486 /* Arm CQ for TX completions */
1487 mlx4_en_arm_cq(priv, cq);
1488
c27a02cd
YP		 1489 /* Set initial ownership of all Tx TXBBs to SW (1) */
1490 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1491 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
1492 ++tx_index;
1493 }
1494
1495 /* Configure port */
1496 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1497 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP		 1498 priv->prof->tx_pause,
1499 priv->prof->tx_ppp,
1500 priv->prof->rx_pause,
1501 priv->prof->rx_ppp);
c27a02cd 1502 if (err) {
48e551ff
YB		 1503 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1504 priv->port, err);
c27a02cd
YP		 1505 goto tx_err;
1506 }
1507 /* Set default qp number */
1508 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1509 if (err) {
453a6082 1510 en_err(priv, "Failed setting default qp numbers\n");
c27a02cd
YP		 1511 goto tx_err;
1512 }
c27a02cd
YP		 1513
1514 /* Init port */
453a6082 1515 en_dbg(HW, priv, "Initializing port\n");
c27a02cd
YP		 1516 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1517 if (err) {
453a6082 1518 en_err(priv, "Failed Initializing port\n");
1679200f 1519 goto tx_err;
c27a02cd
YP		 1520 }
1521
1679200f
YP		 1522 /* Attach rx QP to bradcast address */
1523 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1524 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1525 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65
HHZ		 1526 priv->port, 0, MLX4_PROT_ETH,
1527 &priv->broadcast_id))
1679200f
YP		 1528 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1529
b5845f98
HX		 1530 /* Must redo promiscuous mode setup. */
1531 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1532
c27a02cd 1533 /* Schedule multicast task to populate multicast list */
0eb74fdd 1534 queue_work(mdev->workqueue, &priv->rx_mode_task);
c27a02cd 1535
93ece0c1
EE		 1536 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
1537
c27a02cd 1538 priv->port_up = true;
a11faac7 1539 netif_tx_start_all_queues(dev);
3484aac1
AV		 1540 netif_device_attach(dev);
1541
c27a02cd
YP		 1542 return 0;
1543
c27a02cd
YP		 1544tx_err:
1545 while (tx_index--) {
1546 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
1547 mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
1548 }
cabdc8ee
HHZ		 1549 mlx4_en_destroy_drop_qp(priv);
1550rss_err:
c27a02cd 1551 mlx4_en_release_rss_steer(priv);
1679200f 1552mac_err:
16a10ffd 1553 mlx4_en_put_qp(priv);
c27a02cd
YP		 1554cq_err:
1555 while (rx_index--)
1556 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
38aab07c
YP		 1557 for (i = 0; i < priv->rx_ring_num; i++)
1558 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
c27a02cd
YP		 1559
1560 return err; /* need to close devices */
1561}
1562
1563
3484aac1 1564void mlx4_en_stop_port(struct net_device *dev, int detach)
c27a02cd
YP		 1565{
1566 struct mlx4_en_priv *priv = netdev_priv(dev);
1567 struct mlx4_en_dev *mdev = priv->mdev;
6d199937 1568 struct mlx4_en_mc_list *mclist, *tmp;
0d256c0e 1569 struct ethtool_flow_id *flow, *tmp_flow;
c27a02cd 1570 int i;
1679200f 1571 u8 mc_list[16] = {0};
c27a02cd
YP		 1572
1573 if (!priv->port_up) {
453a6082 1574 en_dbg(DRV, priv, "stop port called while port already down\n");
c27a02cd
YP		 1575 return;
1576 }
c27a02cd
YP		 1577
1578 /* Synchronize with tx routine */
1579 netif_tx_lock_bh(dev);
3484aac1
AV		 1580 if (detach)
1581 netif_device_detach(dev);
3c05f5ef 1582 netif_tx_stop_all_queues(dev);
c27a02cd
YP		 1583 netif_tx_unlock_bh(dev);
1584
3484aac1
AV		 1585 netif_tx_disable(dev);
1586
7c287380 1587 /* Set port as not active */
3c05f5ef 1588 priv->port_up = false;
c27a02cd 1589
db0e7cba
AY		 1590 /* Promsicuous mode */
1591 if (mdev->dev->caps.steering_mode ==
1592 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1593 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1594 MLX4_EN_FLAG_MC_PROMISC);
1595 mlx4_flow_steer_promisc_remove(mdev->dev,
1596 priv->port,
1597 MLX4_FS_PROMISC_UPLINK);
1598 mlx4_flow_steer_promisc_remove(mdev->dev,
1599 priv->port,
1600 MLX4_FS_PROMISC_ALL_MULTI);
1601 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1602 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1603
1604 /* Disable promiscouos mode */
1605 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1606 priv->port);
1607
1608 /* Disable Multicast promisc */
1609 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1610 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1611 priv->port);
1612 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1613 }
1614 }
1615
1679200f
YP		 1616 /* Detach All multicasts */
1617 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1618 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1619 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65 1620 MLX4_PROT_ETH, priv->broadcast_id);
6d199937
YP		 1621 list_for_each_entry(mclist, &priv->curr_list, list) {
1622 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1679200f
YP		 1623 mc_list[5] = priv->port;
1624 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
0ff1fb65 1625 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1679200f
YP		 1626 }
1627 mlx4_en_clear_list(dev);
6d199937
YP		 1628 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1629 list_del(&mclist->list);
1630 kfree(mclist);
1631 }
1632
1679200f
YP		 1633 /* Flush multicast filter */
1634 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1635
cabdc8ee
HHZ		 1636 mlx4_en_destroy_drop_qp(priv);
1637
c27a02cd
YP		 1638 /* Free TX Rings */
1639 for (i = 0; i < priv->tx_ring_num; i++) {
1640 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
1641 mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
1642 }
1643 msleep(10);
1644
1645 for (i = 0; i < priv->tx_ring_num; i++)
1646 mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
1647
1648 /* Free RSS qps */
1649 mlx4_en_release_rss_steer(priv);
1650
ffe455ad 1651 /* Unregister Mac address for the port */
16a10ffd 1652 mlx4_en_put_qp(priv);
955154fa
MB		 1653 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
1654 mdev->mac_removed[priv->port] = 1;
ffe455ad 1655
0d256c0e
HHZ		 1656 /* Remove flow steering rules for the port*/
1657 if (mdev->dev->caps.steering_mode ==
1658 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1659 ASSERT_RTNL();
1660 list_for_each_entry_safe(flow, tmp_flow,
1661 &priv->ethtool_list, list) {
1662 mlx4_flow_detach(mdev->dev, flow->id);
1663 list_del(&flow->list);
1664 }
1665 }
1666
c27a02cd
YP		 1667 /* Free RX Rings */
1668 for (i = 0; i < priv->rx_ring_num; i++) {
1669 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
1670 while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
1671 msleep(1);
1672 mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
1673 }
7c287380
YP		 1674
1675 /* close port*/
1676 mlx4_CLOSE_PORT(mdev->dev, priv->port);
c27a02cd
YP		 1677}
1678
1679static void mlx4_en_restart(struct work_struct *work)
1680{
1681 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1682 watchdog_task);
1683 struct mlx4_en_dev *mdev = priv->mdev;
1684 struct net_device *dev = priv->dev;
1685
453a6082 1686 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1e338db5
YP		 1687
1688 mutex_lock(&mdev->state_lock);
1689 if (priv->port_up) {
3484aac1 1690 mlx4_en_stop_port(dev, 1);
1e338db5 1691 if (mlx4_en_start_port(dev))
453a6082 1692 en_err(priv, "Failed restarting port %d\n", priv->port);
1e338db5
YP		 1693 }
1694 mutex_unlock(&mdev->state_lock);
c27a02cd
YP		 1695}
1696
b477ba62 1697static void mlx4_en_clear_stats(struct net_device *dev)
c27a02cd
YP		 1698{
1699 struct mlx4_en_priv *priv = netdev_priv(dev);
1700 struct mlx4_en_dev *mdev = priv->mdev;
1701 int i;
c27a02cd 1702
c27a02cd 1703 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
453a6082 1704 en_dbg(HW, priv, "Failed dumping statistics\n");
c27a02cd
YP		 1705
1706 memset(&priv->stats, 0, sizeof(priv->stats));
1707 memset(&priv->pstats, 0, sizeof(priv->pstats));
b477ba62
EE		 1708 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1709 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
c27a02cd
YP		 1710
1711 for (i = 0; i < priv->tx_ring_num; i++) {
1712 priv->tx_ring[i].bytes = 0;
1713 priv->tx_ring[i].packets = 0;
b477ba62 1714 priv->tx_ring[i].tx_csum = 0;
c27a02cd
YP		 1715 }
1716 for (i = 0; i < priv->rx_ring_num; i++) {
1717 priv->rx_ring[i].bytes = 0;
1718 priv->rx_ring[i].packets = 0;
b477ba62
EE		 1719 priv->rx_ring[i].csum_ok = 0;
1720 priv->rx_ring[i].csum_none = 0;
c27a02cd 1721 }
b477ba62
EE		 1722}
1723
1724static int mlx4_en_open(struct net_device *dev)
1725{
1726 struct mlx4_en_priv *priv = netdev_priv(dev);
1727 struct mlx4_en_dev *mdev = priv->mdev;
1728 int err = 0;
1729
1730 mutex_lock(&mdev->state_lock);
1731
1732 if (!mdev->device_up) {
1733 en_err(priv, "Cannot open - device down/disabled\n");
1734 err = -EBUSY;
1735 goto out;
1736 }
1737
1738 /* Reset HW statistics and SW counters */
1739 mlx4_en_clear_stats(dev);
c27a02cd 1740
c27a02cd
YP		 1741 err = mlx4_en_start_port(dev);
1742 if (err)
453a6082 1743 en_err(priv, "Failed starting port:%d\n", priv->port);
c27a02cd
YP		 1744
1745out:
1746 mutex_unlock(&mdev->state_lock);
1747 return err;
1748}
1749
1750
1751static int mlx4_en_close(struct net_device *dev)
1752{
1753 struct mlx4_en_priv *priv = netdev_priv(dev);
1754 struct mlx4_en_dev *mdev = priv->mdev;
1755
453a6082 1756 en_dbg(IFDOWN, priv, "Close port called\n");
c27a02cd
YP		 1757
1758 mutex_lock(&mdev->state_lock);
1759
3484aac1 1760 mlx4_en_stop_port(dev, 0);
c27a02cd
YP		 1761 netif_carrier_off(dev);
1762
1763 mutex_unlock(&mdev->state_lock);
1764 return 0;
1765}
1766
fe0af03c 1767void mlx4_en_free_resources(struct mlx4_en_priv *priv)
c27a02cd
YP		 1768{
1769 int i;
1770
1eb8c695
AV		 1771#ifdef CONFIG_RFS_ACCEL
1772 free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
1773 priv->dev->rx_cpu_rmap = NULL;
1774#endif
1775
c27a02cd
YP		 1776 for (i = 0; i < priv->tx_ring_num; i++) {
1777 if (priv->tx_ring[i].tx_info)
1778 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
1779 if (priv->tx_cq[i].buf)
fe0af03c 1780 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
c27a02cd
YP		 1781 }
1782
1783 for (i = 0; i < priv->rx_ring_num; i++) {
1784 if (priv->rx_ring[i].rx_info)
68355f71
TLSC		 1785 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
1786 priv->prof->rx_ring_size, priv->stride);
c27a02cd 1787 if (priv->rx_cq[i].buf)
fe0af03c 1788 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
c27a02cd 1789 }
044ca2a5
YP		 1790
1791 if (priv->base_tx_qpn) {
1792 mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
1793 priv->base_tx_qpn = 0;
1794 }
c27a02cd
YP		 1795}
1796
18cc42a3 1797int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
c27a02cd 1798{
c27a02cd
YP		 1799 struct mlx4_en_port_profile *prof = priv->prof;
1800 int i;
044ca2a5 1801 int err;
87a5c389 1802
044ca2a5 1803 err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
87a5c389
YP		 1804 if (err) {
1805 en_err(priv, "failed reserving range for TX rings\n");
1806 return err;
1807 }
c27a02cd
YP		 1808
1809 /* Create tx Rings */
1810 for (i = 0; i < priv->tx_ring_num; i++) {
1811 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
1812 prof->tx_ring_size, i, TX))
1813 goto err;
1814
044ca2a5 1815 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
c27a02cd
YP		 1816 prof->tx_ring_size, TXBB_SIZE))
1817 goto err;
1818 }
1819
1820 /* Create rx Rings */
1821 for (i = 0; i < priv->rx_ring_num; i++) {
1822 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
1823 prof->rx_ring_size, i, RX))
1824 goto err;
1825
1826 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
1827 prof->rx_ring_size, priv->stride))
1828 goto err;
1829 }
1830
1eb8c695
AV		 1831#ifdef CONFIG_RFS_ACCEL
1832 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->rx_ring_num);
1833 if (!priv->dev->rx_cpu_rmap)
1834 goto err;
1eb8c695
AV		 1835#endif
1836
c27a02cd
YP		 1837 return 0;
1838
1839err:
453a6082 1840 en_err(priv, "Failed to allocate NIC resources\n");
c27a02cd
YP		 1841 return -ENOMEM;
1842}
1843
1844
1845void mlx4_en_destroy_netdev(struct net_device *dev)
1846{
1847 struct mlx4_en_priv *priv = netdev_priv(dev);
1848 struct mlx4_en_dev *mdev = priv->mdev;
1849
453a6082 1850 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
c27a02cd
YP		 1851
1852 /* Unregister device - this will close the port if it was up */
1853 if (priv->registered)
1854 unregister_netdev(dev);
1855
1856 if (priv->allocated)
1857 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
1858
1859 cancel_delayed_work(&priv->stats_task);
c27a02cd
YP		 1860 /* flush any pending task for this netdev */
1861 flush_workqueue(mdev->workqueue);
1862
1863 /* Detach the netdev so tasks would not attempt to access it */
1864 mutex_lock(&mdev->state_lock);
1865 mdev->pndev[priv->port] = NULL;
1866 mutex_unlock(&mdev->state_lock);
1867
fe0af03c 1868 mlx4_en_free_resources(priv);
564c274c 1869
bc6a4744
AV		 1870 kfree(priv->tx_ring);
1871 kfree(priv->tx_cq);
1872
c27a02cd
YP		 1873 free_netdev(dev);
1874}
1875
1876static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
1877{
1878 struct mlx4_en_priv *priv = netdev_priv(dev);
1879 struct mlx4_en_dev *mdev = priv->mdev;
1880 int err = 0;
1881
453a6082 1882 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
c27a02cd
YP		 1883 dev->mtu, new_mtu);
1884
1885 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
453a6082 1886 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
c27a02cd
YP		 1887 return -EPERM;
1888 }
1889 dev->mtu = new_mtu;
1890
1891 if (netif_running(dev)) {
1892 mutex_lock(&mdev->state_lock);
1893 if (!mdev->device_up) {
1894 /* NIC is probably restarting - let watchdog task reset
1895 * the port */
453a6082 1896 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
c27a02cd 1897 } else {
3484aac1 1898 mlx4_en_stop_port(dev, 1);
c27a02cd
YP		 1899 err = mlx4_en_start_port(dev);
1900 if (err) {
453a6082 1901 en_err(priv, "Failed restarting port:%d\n",
c27a02cd
YP		 1902 priv->port);
1903 queue_work(mdev->workqueue, &priv->watchdog_task);
1904 }
1905 }
1906 mutex_unlock(&mdev->state_lock);
1907 }
1908 return 0;
1909}
1910
60d6fe99
AV		 1911static int mlx4_en_set_features(struct net_device *netdev,
1912 netdev_features_t features)
1913{
1914 struct mlx4_en_priv *priv = netdev_priv(netdev);
1915
1916 if (features & NETIF_F_LOOPBACK)
1917 priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
1918 else
1919 priv->ctrl_flags &=
1920 cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
1921
79aeaccd
YB		 1922 mlx4_en_update_loopback_state(netdev, features);
1923
60d6fe99
AV		 1924 return 0;
1925
1926}
1927
0ccddcd1
YB		 1928static int mlx4_en_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
1929 struct net_device *dev,
1930 const unsigned char *addr, u16 flags)
1931{
1932 struct mlx4_en_priv *priv = netdev_priv(dev);
1933 struct mlx4_dev *mdev = priv->mdev->dev;
1934 int err;
1935
1936 if (!mlx4_is_mfunc(mdev))
1937 return -EOPNOTSUPP;
1938
1939 /* Hardware does not support aging addresses, allow only
1940 * permanent addresses if ndm_state is given
1941 */
1942 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
1943 en_info(priv, "Add FDB only supports static addresses\n");
1944 return -EINVAL;
1945 }
1946
1947 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
1948 err = dev_uc_add_excl(dev, addr);
1949 else if (is_multicast_ether_addr(addr))
1950 err = dev_mc_add_excl(dev, addr);
1951 else
1952 err = -EINVAL;
1953
1954 /* Only return duplicate errors if NLM_F_EXCL is set */
1955 if (err == -EEXIST && !(flags & NLM_F_EXCL))
1956 err = 0;
1957
1958 return err;
1959}
1960
1961static int mlx4_en_fdb_del(struct ndmsg *ndm,
1690be63 1962 struct nlattr *tb[],
0ccddcd1
YB		 1963 struct net_device *dev,
1964 const unsigned char *addr)
1965{
1966 struct mlx4_en_priv *priv = netdev_priv(dev);
1967 struct mlx4_dev *mdev = priv->mdev->dev;
1968 int err;
1969
1970 if (!mlx4_is_mfunc(mdev))
1971 return -EOPNOTSUPP;
1972
1973 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
1974 en_info(priv, "Del FDB only supports static addresses\n");
1975 return -EINVAL;
1976 }
1977
1978 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
1979 err = dev_uc_del(dev, addr);
1980 else if (is_multicast_ether_addr(addr))
1981 err = dev_mc_del(dev, addr);
1982 else
1983 err = -EINVAL;
1984
1985 return err;
1986}
1987
1988static int mlx4_en_fdb_dump(struct sk_buff *skb,
1989 struct netlink_callback *cb,
1990 struct net_device *dev, int idx)
1991{
1992 struct mlx4_en_priv *priv = netdev_priv(dev);
1993 struct mlx4_dev *mdev = priv->mdev->dev;
1994
1995 if (mlx4_is_mfunc(mdev))
1996 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
1997
1998 return idx;
1999}
2000
3addc568
SH		 2001static const struct net_device_ops mlx4_netdev_ops = {
2002 .ndo_open = mlx4_en_open,
2003 .ndo_stop = mlx4_en_close,
2004 .ndo_start_xmit = mlx4_en_xmit,
f813cad8 2005 .ndo_select_queue = mlx4_en_select_queue,
3addc568 2006 .ndo_get_stats = mlx4_en_get_stats,
0eb74fdd 2007 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
3addc568 2008 .ndo_set_mac_address = mlx4_en_set_mac,
52255bbe 2009 .ndo_validate_addr = eth_validate_addr,
3addc568
SH		 2010 .ndo_change_mtu = mlx4_en_change_mtu,
2011 .ndo_tx_timeout = mlx4_en_tx_timeout,
3addc568
SH		 2012 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2013 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2014#ifdef CONFIG_NET_POLL_CONTROLLER
2015 .ndo_poll_controller = mlx4_en_netpoll,
2016#endif
60d6fe99 2017 .ndo_set_features = mlx4_en_set_features,
897d7846 2018 .ndo_setup_tc = mlx4_en_setup_tc,
1eb8c695
AV		 2019#ifdef CONFIG_RFS_ACCEL
2020 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2021#endif
0ccddcd1
YB		 2022 .ndo_fdb_add = mlx4_en_fdb_add,
2023 .ndo_fdb_del = mlx4_en_fdb_del,
2024 .ndo_fdb_dump = mlx4_en_fdb_dump,
3addc568
SH		 2025};
2026
c27a02cd
YP		 2027int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2028 struct mlx4_en_port_profile *prof)
2029{
2030 struct net_device *dev;
2031 struct mlx4_en_priv *priv;
c07cb4b0 2032 int i;
c27a02cd
YP		 2033 int err;
2034
f1593d22 2035 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
d317966b 2036 MAX_TX_RINGS, MAX_RX_RINGS);
41de8d4c 2037 if (dev == NULL)
c27a02cd 2038 return -ENOMEM;
c27a02cd 2039
d317966b
AV		 2040 netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
2041 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
2042
c27a02cd 2043 SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
741a00be 2044 dev->dev_id = port - 1;
c27a02cd
YP		 2045
2046 /*
2047 * Initialize driver private data
2048 */
2049
2050 priv = netdev_priv(dev);
2051 memset(priv, 0, sizeof(struct mlx4_en_priv));
2052 priv->dev = dev;
2053 priv->mdev = mdev;
ebf8c9aa 2054 priv->ddev = &mdev->pdev->dev;
c27a02cd
YP		 2055 priv->prof = prof;
2056 priv->port = port;
2057 priv->port_up = false;
c27a02cd 2058 priv->flags = prof->flags;
60d6fe99
AV		 2059 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
2060 MLX4_WQE_CTRL_SOLICITED);
d317966b 2061 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
c27a02cd 2062 priv->tx_ring_num = prof->tx_ring_num;
d317966b
AV		 2063
2064 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
2065 GFP_KERNEL);
bc6a4744
AV		 2066 if (!priv->tx_ring) {
2067 err = -ENOMEM;
2068 goto out;
2069 }
d317966b
AV		 2070 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_RX_RINGS,
2071 GFP_KERNEL);
bc6a4744
AV		 2072 if (!priv->tx_cq) {
2073 err = -ENOMEM;
2074 goto out;
2075 }
c27a02cd 2076 priv->rx_ring_num = prof->rx_ring_num;
08ff3235 2077 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
c27a02cd
YP		 2078 priv->mac_index = -1;
2079 priv->msg_enable = MLX4_EN_MSG_LEVEL;
2080 spin_lock_init(&priv->stats_lock);
0eb74fdd 2081 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
c27a02cd 2082 INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
c27a02cd
YP		 2083 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
2084 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
2085 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
564c274c
AV		 2086#ifdef CONFIG_MLX4_EN_DCB
2087 if (!mlx4_is_slave(priv->mdev->dev))
2088 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
2089#endif
c27a02cd 2090
c07cb4b0
YB		 2091 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
2092 INIT_HLIST_HEAD(&priv->mac_hash[i]);
16a10ffd 2093
c27a02cd
YP		 2094 /* Query for default mac and max mtu */
2095 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
6bbb6d99
YB		 2096
2097 /* Set default MAC */
2098 dev->addr_len = ETH_ALEN;
2099 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
2100 if (!is_valid_ether_addr(dev->dev_addr)) {
2101 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
2102 priv->port, dev->dev_addr);
c27a02cd
YP		 2103 err = -EINVAL;
2104 goto out;
2105 }
2106
6bbb6d99
YB		 2107 memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
2108
c27a02cd
YP		 2109 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2110 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2111 err = mlx4_en_alloc_resources(priv);
2112 if (err)
2113 goto out;
2114
78fb2de7
AV		 2115#ifdef CONFIG_RFS_ACCEL
2116 INIT_LIST_HEAD(&priv->filters);
2117 spin_lock_init(&priv->filters_lock);
2118#endif
2119
c27a02cd
YP		 2120 /* Allocate page for receive rings */
2121 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
2122 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
2123 if (err) {
453a6082 2124 en_err(priv, "Failed to allocate page for rx qps\n");
c27a02cd
YP		 2125 goto out;
2126 }
2127 priv->allocated = 1;
2128
c27a02cd
YP		 2129 /*
2130 * Initialize netdev entry points
2131 */
3addc568 2132 dev->netdev_ops = &mlx4_netdev_ops;
c27a02cd 2133 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1eb63a28
BH		 2134 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
2135 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3addc568 2136
c27a02cd
YP		 2137 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
2138
c27a02cd
YP		 2139 /*
2140 * Set driver features
2141 */
c8c64cff
MM		 2142 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2143 if (mdev->LSO_support)
2144 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
2145
2146 dev->vlan_features = dev->hw_features;
2147
ad86107f 2148 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
c8c64cff
MM		 2149 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
2150 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
2151 NETIF_F_HW_VLAN_FILTER;
60d6fe99 2152 dev->hw_features |= NETIF_F_LOOPBACK;
c27a02cd 2153
1eb8c695
AV		 2154 if (mdev->dev->caps.steering_mode ==
2155 MLX4_STEERING_MODE_DEVICE_MANAGED)
2156 dev->hw_features |= NETIF_F_NTUPLE;
2157
cc5387f7
YB		 2158 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
2159 dev->priv_flags |= IFF_UNICAST_FLT;
2160
c27a02cd
YP		 2161 mdev->pndev[port] = dev;
2162
2163 netif_carrier_off(dev);
2164 err = register_netdev(dev);
2165 if (err) {
453a6082 2166 en_err(priv, "Netdev registration failed for port %d\n", port);
c27a02cd
YP		 2167 goto out;
2168 }
4234144f 2169 priv->registered = 1;
453a6082
YP		 2170
2171 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
2172 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
2173
79aeaccd
YB		 2174 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
2175
90822265 2176 /* Configure port */
5c8e9046 2177 mlx4_en_calc_rx_buf(dev);
90822265 2178 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
5c8e9046
YP		 2179 priv->rx_skb_size + ETH_FCS_LEN,
2180 prof->tx_pause, prof->tx_ppp,
2181 prof->rx_pause, prof->rx_ppp);
90822265
YP		 2182 if (err) {
2183 en_err(priv, "Failed setting port general configurations "
2184 "for port %d, with error %d\n", priv->port, err);
2185 goto out;
2186 }
2187
2188 /* Init port */
2189 en_warn(priv, "Initializing port\n");
2190 err = mlx4_INIT_PORT(mdev->dev, priv->port);
2191 if (err) {
2192 en_err(priv, "Failed Initializing port\n");
2193 goto out;
2194 }
39f17b44 2195 mlx4_en_set_default_moderation(priv);
c27a02cd
YP		 2196 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
2197 return 0;
2198
2199out:
2200 mlx4_en_destroy_netdev(dev);
2201 return err;
2202}
2203
Linux kernel - Deliverables
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