Commit | Line | Data |
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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/tcp.h> | |
36 | #include <linux/if_vlan.h> | |
37 | #include <linux/delay.h> | |
5a0e3ad6 | 38 | #include <linux/slab.h> |
1eb8c695 AV |
39 | #include <linux/hash.h> |
40 | #include <net/ip.h> | |
9e77a2b8 | 41 | #include <net/ll_poll.h> |
c27a02cd YP |
42 | |
43 | #include <linux/mlx4/driver.h> | |
44 | #include <linux/mlx4/device.h> | |
45 | #include <linux/mlx4/cmd.h> | |
46 | #include <linux/mlx4/cq.h> | |
47 | ||
48 | #include "mlx4_en.h" | |
49 | #include "en_port.h" | |
50 | ||
d317966b | 51 | int mlx4_en_setup_tc(struct net_device *dev, u8 up) |
897d7846 | 52 | { |
bc6a4744 AV |
53 | struct mlx4_en_priv *priv = netdev_priv(dev); |
54 | int i; | |
d317966b | 55 | unsigned int offset = 0; |
bc6a4744 AV |
56 | |
57 | if (up && up != MLX4_EN_NUM_UP) | |
897d7846 AV |
58 | return -EINVAL; |
59 | ||
bc6a4744 AV |
60 | netdev_set_num_tc(dev, up); |
61 | ||
62 | /* Partition Tx queues evenly amongst UP's */ | |
bc6a4744 | 63 | for (i = 0; i < up; i++) { |
d317966b AV |
64 | netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset); |
65 | offset += priv->num_tx_rings_p_up; | |
bc6a4744 AV |
66 | } |
67 | ||
897d7846 AV |
68 | return 0; |
69 | } | |
70 | ||
9e77a2b8 AV |
71 | #ifdef CONFIG_NET_LL_RX_POLL |
72 | /* must be called with local_bh_disable()d */ | |
73 | static int mlx4_en_low_latency_recv(struct napi_struct *napi) | |
74 | { | |
75 | struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi); | |
76 | struct net_device *dev = cq->dev; | |
77 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
78 | struct mlx4_en_rx_ring *rx_ring = &priv->rx_ring[cq->ring]; | |
79 | int done; | |
80 | ||
81 | if (!priv->port_up) | |
82 | return LL_FLUSH_FAILED; | |
83 | ||
84 | if (!mlx4_en_cq_lock_poll(cq)) | |
85 | return LL_FLUSH_BUSY; | |
86 | ||
87 | done = mlx4_en_process_rx_cq(dev, cq, 4); | |
8501841a AV |
88 | if (likely(done)) |
89 | rx_ring->cleaned += done; | |
90 | else | |
91 | rx_ring->misses++; | |
9e77a2b8 AV |
92 | |
93 | mlx4_en_cq_unlock_poll(cq); | |
94 | ||
95 | return done; | |
96 | } | |
97 | #endif /* CONFIG_NET_LL_RX_POLL */ | |
98 | ||
1eb8c695 AV |
99 | #ifdef CONFIG_RFS_ACCEL |
100 | ||
101 | struct mlx4_en_filter { | |
102 | struct list_head next; | |
103 | struct work_struct work; | |
104 | ||
105 | __be32 src_ip; | |
106 | __be32 dst_ip; | |
107 | __be16 src_port; | |
108 | __be16 dst_port; | |
109 | ||
110 | int rxq_index; | |
111 | struct mlx4_en_priv *priv; | |
112 | u32 flow_id; /* RFS infrastructure id */ | |
113 | int id; /* mlx4_en driver id */ | |
114 | u64 reg_id; /* Flow steering API id */ | |
115 | u8 activated; /* Used to prevent expiry before filter | |
116 | * is attached | |
117 | */ | |
118 | struct hlist_node filter_chain; | |
119 | }; | |
120 | ||
121 | static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv); | |
122 | ||
123 | static void mlx4_en_filter_work(struct work_struct *work) | |
124 | { | |
125 | struct mlx4_en_filter *filter = container_of(work, | |
126 | struct mlx4_en_filter, | |
127 | work); | |
128 | struct mlx4_en_priv *priv = filter->priv; | |
129 | struct mlx4_spec_list spec_tcp = { | |
130 | .id = MLX4_NET_TRANS_RULE_ID_TCP, | |
131 | { | |
132 | .tcp_udp = { | |
133 | .dst_port = filter->dst_port, | |
134 | .dst_port_msk = (__force __be16)-1, | |
135 | .src_port = filter->src_port, | |
136 | .src_port_msk = (__force __be16)-1, | |
137 | }, | |
138 | }, | |
139 | }; | |
140 | struct mlx4_spec_list spec_ip = { | |
141 | .id = MLX4_NET_TRANS_RULE_ID_IPV4, | |
142 | { | |
143 | .ipv4 = { | |
144 | .dst_ip = filter->dst_ip, | |
145 | .dst_ip_msk = (__force __be32)-1, | |
146 | .src_ip = filter->src_ip, | |
147 | .src_ip_msk = (__force __be32)-1, | |
148 | }, | |
149 | }, | |
150 | }; | |
151 | struct mlx4_spec_list spec_eth = { | |
152 | .id = MLX4_NET_TRANS_RULE_ID_ETH, | |
153 | }; | |
154 | struct mlx4_net_trans_rule rule = { | |
155 | .list = LIST_HEAD_INIT(rule.list), | |
156 | .queue_mode = MLX4_NET_TRANS_Q_LIFO, | |
157 | .exclusive = 1, | |
158 | .allow_loopback = 1, | |
f9162539 | 159 | .promisc_mode = MLX4_FS_REGULAR, |
1eb8c695 AV |
160 | .port = priv->port, |
161 | .priority = MLX4_DOMAIN_RFS, | |
162 | }; | |
163 | int rc; | |
1eb8c695 AV |
164 | __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); |
165 | ||
166 | list_add_tail(&spec_eth.list, &rule.list); | |
167 | list_add_tail(&spec_ip.list, &rule.list); | |
168 | list_add_tail(&spec_tcp.list, &rule.list); | |
169 | ||
1eb8c695 | 170 | rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn; |
6bbb6d99 | 171 | memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN); |
1eb8c695 AV |
172 | memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); |
173 | ||
174 | filter->activated = 0; | |
175 | ||
176 | if (filter->reg_id) { | |
177 | rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); | |
178 | if (rc && rc != -ENOENT) | |
179 | en_err(priv, "Error detaching flow. rc = %d\n", rc); | |
180 | } | |
181 | ||
182 | rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id); | |
183 | if (rc) | |
184 | en_err(priv, "Error attaching flow. err = %d\n", rc); | |
185 | ||
186 | mlx4_en_filter_rfs_expire(priv); | |
187 | ||
188 | filter->activated = 1; | |
189 | } | |
190 | ||
191 | static inline struct hlist_head * | |
192 | filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, | |
193 | __be16 src_port, __be16 dst_port) | |
194 | { | |
195 | unsigned long l; | |
196 | int bucket_idx; | |
197 | ||
198 | l = (__force unsigned long)src_port | | |
199 | ((__force unsigned long)dst_port << 2); | |
200 | l ^= (__force unsigned long)(src_ip ^ dst_ip); | |
201 | ||
202 | bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT); | |
203 | ||
204 | return &priv->filter_hash[bucket_idx]; | |
205 | } | |
206 | ||
207 | static struct mlx4_en_filter * | |
208 | mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip, | |
209 | __be32 dst_ip, __be16 src_port, __be16 dst_port, | |
210 | u32 flow_id) | |
211 | { | |
212 | struct mlx4_en_filter *filter = NULL; | |
213 | ||
214 | filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC); | |
215 | if (!filter) | |
216 | return NULL; | |
217 | ||
218 | filter->priv = priv; | |
219 | filter->rxq_index = rxq_index; | |
220 | INIT_WORK(&filter->work, mlx4_en_filter_work); | |
221 | ||
222 | filter->src_ip = src_ip; | |
223 | filter->dst_ip = dst_ip; | |
224 | filter->src_port = src_port; | |
225 | filter->dst_port = dst_port; | |
226 | ||
227 | filter->flow_id = flow_id; | |
228 | ||
ee64c0ee | 229 | filter->id = priv->last_filter_id++ % RPS_NO_FILTER; |
1eb8c695 AV |
230 | |
231 | list_add_tail(&filter->next, &priv->filters); | |
232 | hlist_add_head(&filter->filter_chain, | |
233 | filter_hash_bucket(priv, src_ip, dst_ip, src_port, | |
234 | dst_port)); | |
235 | ||
236 | return filter; | |
237 | } | |
238 | ||
239 | static void mlx4_en_filter_free(struct mlx4_en_filter *filter) | |
240 | { | |
241 | struct mlx4_en_priv *priv = filter->priv; | |
242 | int rc; | |
243 | ||
244 | list_del(&filter->next); | |
245 | ||
246 | rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id); | |
247 | if (rc && rc != -ENOENT) | |
248 | en_err(priv, "Error detaching flow. rc = %d\n", rc); | |
249 | ||
250 | kfree(filter); | |
251 | } | |
252 | ||
253 | static inline struct mlx4_en_filter * | |
254 | mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip, | |
255 | __be16 src_port, __be16 dst_port) | |
256 | { | |
1eb8c695 AV |
257 | struct mlx4_en_filter *filter; |
258 | struct mlx4_en_filter *ret = NULL; | |
259 | ||
b67bfe0d | 260 | hlist_for_each_entry(filter, |
1eb8c695 AV |
261 | filter_hash_bucket(priv, src_ip, dst_ip, |
262 | src_port, dst_port), | |
263 | filter_chain) { | |
264 | if (filter->src_ip == src_ip && | |
265 | filter->dst_ip == dst_ip && | |
266 | filter->src_port == src_port && | |
267 | filter->dst_port == dst_port) { | |
268 | ret = filter; | |
269 | break; | |
270 | } | |
271 | } | |
272 | ||
273 | return ret; | |
274 | } | |
275 | ||
276 | static int | |
277 | mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb, | |
278 | u16 rxq_index, u32 flow_id) | |
279 | { | |
280 | struct mlx4_en_priv *priv = netdev_priv(net_dev); | |
281 | struct mlx4_en_filter *filter; | |
282 | const struct iphdr *ip; | |
283 | const __be16 *ports; | |
284 | __be32 src_ip; | |
285 | __be32 dst_ip; | |
286 | __be16 src_port; | |
287 | __be16 dst_port; | |
288 | int nhoff = skb_network_offset(skb); | |
289 | int ret = 0; | |
290 | ||
291 | if (skb->protocol != htons(ETH_P_IP)) | |
292 | return -EPROTONOSUPPORT; | |
293 | ||
294 | ip = (const struct iphdr *)(skb->data + nhoff); | |
295 | if (ip_is_fragment(ip)) | |
296 | return -EPROTONOSUPPORT; | |
297 | ||
298 | ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl); | |
299 | ||
300 | src_ip = ip->saddr; | |
301 | dst_ip = ip->daddr; | |
302 | src_port = ports[0]; | |
303 | dst_port = ports[1]; | |
304 | ||
305 | if (ip->protocol != IPPROTO_TCP) | |
306 | return -EPROTONOSUPPORT; | |
307 | ||
308 | spin_lock_bh(&priv->filters_lock); | |
309 | filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port); | |
310 | if (filter) { | |
311 | if (filter->rxq_index == rxq_index) | |
312 | goto out; | |
313 | ||
314 | filter->rxq_index = rxq_index; | |
315 | } else { | |
316 | filter = mlx4_en_filter_alloc(priv, rxq_index, | |
317 | src_ip, dst_ip, | |
318 | src_port, dst_port, flow_id); | |
319 | if (!filter) { | |
320 | ret = -ENOMEM; | |
321 | goto err; | |
322 | } | |
323 | } | |
324 | ||
325 | queue_work(priv->mdev->workqueue, &filter->work); | |
326 | ||
327 | out: | |
328 | ret = filter->id; | |
329 | err: | |
330 | spin_unlock_bh(&priv->filters_lock); | |
331 | ||
332 | return ret; | |
333 | } | |
334 | ||
335 | void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv, | |
336 | struct mlx4_en_rx_ring *rx_ring) | |
337 | { | |
338 | struct mlx4_en_filter *filter, *tmp; | |
339 | LIST_HEAD(del_list); | |
340 | ||
341 | spin_lock_bh(&priv->filters_lock); | |
342 | list_for_each_entry_safe(filter, tmp, &priv->filters, next) { | |
343 | list_move(&filter->next, &del_list); | |
344 | hlist_del(&filter->filter_chain); | |
345 | } | |
346 | spin_unlock_bh(&priv->filters_lock); | |
347 | ||
348 | list_for_each_entry_safe(filter, tmp, &del_list, next) { | |
349 | cancel_work_sync(&filter->work); | |
350 | mlx4_en_filter_free(filter); | |
351 | } | |
352 | } | |
353 | ||
354 | static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv) | |
355 | { | |
356 | struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL; | |
357 | LIST_HEAD(del_list); | |
358 | int i = 0; | |
359 | ||
360 | spin_lock_bh(&priv->filters_lock); | |
361 | list_for_each_entry_safe(filter, tmp, &priv->filters, next) { | |
362 | if (i > MLX4_EN_FILTER_EXPIRY_QUOTA) | |
363 | break; | |
364 | ||
365 | if (filter->activated && | |
366 | !work_pending(&filter->work) && | |
367 | rps_may_expire_flow(priv->dev, | |
368 | filter->rxq_index, filter->flow_id, | |
369 | filter->id)) { | |
370 | list_move(&filter->next, &del_list); | |
371 | hlist_del(&filter->filter_chain); | |
372 | } else | |
373 | last_filter = filter; | |
374 | ||
375 | i++; | |
376 | } | |
377 | ||
378 | if (last_filter && (&last_filter->next != priv->filters.next)) | |
379 | list_move(&priv->filters, &last_filter->next); | |
380 | ||
381 | spin_unlock_bh(&priv->filters_lock); | |
382 | ||
383 | list_for_each_entry_safe(filter, tmp, &del_list, next) | |
384 | mlx4_en_filter_free(filter); | |
385 | } | |
386 | #endif | |
387 | ||
80d5c368 PM |
388 | static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, |
389 | __be16 proto, u16 vid) | |
c27a02cd YP |
390 | { |
391 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
392 | struct mlx4_en_dev *mdev = priv->mdev; | |
393 | int err; | |
4c3eb3ca | 394 | int idx; |
c27a02cd | 395 | |
f1b553fb | 396 | en_dbg(HW, priv, "adding VLAN:%d\n", vid); |
c27a02cd | 397 | |
f1b553fb | 398 | set_bit(vid, priv->active_vlans); |
c27a02cd YP |
399 | |
400 | /* Add VID to port VLAN filter */ | |
401 | mutex_lock(&mdev->state_lock); | |
402 | if (mdev->device_up && priv->port_up) { | |
f1b553fb | 403 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 404 | if (err) |
453a6082 | 405 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd | 406 | } |
4c3eb3ca | 407 | if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) |
9e19b545 | 408 | en_dbg(HW, priv, "failed adding vlan %d\n", vid); |
c27a02cd | 409 | mutex_unlock(&mdev->state_lock); |
4c3eb3ca | 410 | |
8e586137 | 411 | return 0; |
c27a02cd YP |
412 | } |
413 | ||
80d5c368 PM |
414 | static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, |
415 | __be16 proto, u16 vid) | |
c27a02cd YP |
416 | { |
417 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
418 | struct mlx4_en_dev *mdev = priv->mdev; | |
419 | int err; | |
4c3eb3ca | 420 | int idx; |
c27a02cd | 421 | |
f1b553fb | 422 | en_dbg(HW, priv, "Killing VID:%d\n", vid); |
c27a02cd | 423 | |
f1b553fb | 424 | clear_bit(vid, priv->active_vlans); |
c27a02cd YP |
425 | |
426 | /* Remove VID from port VLAN filter */ | |
427 | mutex_lock(&mdev->state_lock); | |
4c3eb3ca EC |
428 | if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx)) |
429 | mlx4_unregister_vlan(mdev->dev, priv->port, idx); | |
430 | else | |
9e19b545 | 431 | en_dbg(HW, priv, "could not find vid %d in cache\n", vid); |
4c3eb3ca | 432 | |
c27a02cd | 433 | if (mdev->device_up && priv->port_up) { |
f1b553fb | 434 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 435 | if (err) |
453a6082 | 436 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd YP |
437 | } |
438 | mutex_unlock(&mdev->state_lock); | |
8e586137 JP |
439 | |
440 | return 0; | |
c27a02cd YP |
441 | } |
442 | ||
6bbb6d99 YB |
443 | static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac) |
444 | { | |
bab6a9ea YB |
445 | int i; |
446 | for (i = ETH_ALEN - 1; i >= 0; --i) { | |
6bbb6d99 YB |
447 | dst_mac[i] = src_mac & 0xff; |
448 | src_mac >>= 8; | |
449 | } | |
450 | memset(&dst_mac[ETH_ALEN], 0, 2); | |
451 | } | |
452 | ||
16a10ffd YB |
453 | static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv, |
454 | unsigned char *mac, int *qpn, u64 *reg_id) | |
455 | { | |
456 | struct mlx4_en_dev *mdev = priv->mdev; | |
457 | struct mlx4_dev *dev = mdev->dev; | |
458 | int err; | |
459 | ||
460 | switch (dev->caps.steering_mode) { | |
461 | case MLX4_STEERING_MODE_B0: { | |
462 | struct mlx4_qp qp; | |
463 | u8 gid[16] = {0}; | |
464 | ||
465 | qp.qpn = *qpn; | |
466 | memcpy(&gid[10], mac, ETH_ALEN); | |
467 | gid[5] = priv->port; | |
468 | ||
469 | err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH); | |
470 | break; | |
471 | } | |
472 | case MLX4_STEERING_MODE_DEVICE_MANAGED: { | |
473 | struct mlx4_spec_list spec_eth = { {NULL} }; | |
474 | __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); | |
475 | ||
476 | struct mlx4_net_trans_rule rule = { | |
477 | .queue_mode = MLX4_NET_TRANS_Q_FIFO, | |
478 | .exclusive = 0, | |
479 | .allow_loopback = 1, | |
f9162539 | 480 | .promisc_mode = MLX4_FS_REGULAR, |
16a10ffd YB |
481 | .priority = MLX4_DOMAIN_NIC, |
482 | }; | |
483 | ||
484 | rule.port = priv->port; | |
485 | rule.qpn = *qpn; | |
486 | INIT_LIST_HEAD(&rule.list); | |
487 | ||
488 | spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH; | |
489 | memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN); | |
490 | memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN); | |
491 | list_add_tail(&spec_eth.list, &rule.list); | |
492 | ||
493 | err = mlx4_flow_attach(dev, &rule, reg_id); | |
494 | break; | |
495 | } | |
496 | default: | |
497 | return -EINVAL; | |
498 | } | |
499 | if (err) | |
500 | en_warn(priv, "Failed Attaching Unicast\n"); | |
501 | ||
502 | return err; | |
503 | } | |
504 | ||
505 | static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv, | |
506 | unsigned char *mac, int qpn, u64 reg_id) | |
507 | { | |
508 | struct mlx4_en_dev *mdev = priv->mdev; | |
509 | struct mlx4_dev *dev = mdev->dev; | |
510 | ||
511 | switch (dev->caps.steering_mode) { | |
512 | case MLX4_STEERING_MODE_B0: { | |
513 | struct mlx4_qp qp; | |
514 | u8 gid[16] = {0}; | |
515 | ||
516 | qp.qpn = qpn; | |
517 | memcpy(&gid[10], mac, ETH_ALEN); | |
518 | gid[5] = priv->port; | |
519 | ||
520 | mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH); | |
521 | break; | |
522 | } | |
523 | case MLX4_STEERING_MODE_DEVICE_MANAGED: { | |
524 | mlx4_flow_detach(dev, reg_id); | |
525 | break; | |
526 | } | |
527 | default: | |
528 | en_err(priv, "Invalid steering mode.\n"); | |
529 | } | |
530 | } | |
531 | ||
532 | static int mlx4_en_get_qp(struct mlx4_en_priv *priv) | |
533 | { | |
534 | struct mlx4_en_dev *mdev = priv->mdev; | |
535 | struct mlx4_dev *dev = mdev->dev; | |
536 | struct mlx4_mac_entry *entry; | |
537 | int index = 0; | |
538 | int err = 0; | |
539 | u64 reg_id; | |
540 | int *qpn = &priv->base_qpn; | |
541 | u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr); | |
542 | ||
543 | en_dbg(DRV, priv, "Registering MAC: %pM for adding\n", | |
544 | priv->dev->dev_addr); | |
545 | index = mlx4_register_mac(dev, priv->port, mac); | |
546 | if (index < 0) { | |
547 | err = index; | |
548 | en_err(priv, "Failed adding MAC: %pM\n", | |
549 | priv->dev->dev_addr); | |
550 | return err; | |
551 | } | |
552 | ||
553 | if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { | |
554 | int base_qpn = mlx4_get_base_qpn(dev, priv->port); | |
555 | *qpn = base_qpn + index; | |
556 | return 0; | |
557 | } | |
558 | ||
559 | err = mlx4_qp_reserve_range(dev, 1, 1, qpn); | |
560 | en_dbg(DRV, priv, "Reserved qp %d\n", *qpn); | |
561 | if (err) { | |
562 | en_err(priv, "Failed to reserve qp for mac registration\n"); | |
563 | goto qp_err; | |
564 | } | |
565 | ||
566 | err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id); | |
567 | if (err) | |
568 | goto steer_err; | |
569 | ||
570 | entry = kmalloc(sizeof(*entry), GFP_KERNEL); | |
571 | if (!entry) { | |
572 | err = -ENOMEM; | |
573 | goto alloc_err; | |
574 | } | |
575 | memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac)); | |
576 | entry->reg_id = reg_id; | |
577 | ||
c07cb4b0 YB |
578 | hlist_add_head_rcu(&entry->hlist, |
579 | &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]); | |
16a10ffd | 580 | |
c07cb4b0 | 581 | return 0; |
16a10ffd YB |
582 | |
583 | alloc_err: | |
584 | mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id); | |
585 | ||
586 | steer_err: | |
587 | mlx4_qp_release_range(dev, *qpn, 1); | |
588 | ||
589 | qp_err: | |
590 | mlx4_unregister_mac(dev, priv->port, mac); | |
591 | return err; | |
592 | } | |
593 | ||
594 | static void mlx4_en_put_qp(struct mlx4_en_priv *priv) | |
595 | { | |
596 | struct mlx4_en_dev *mdev = priv->mdev; | |
597 | struct mlx4_dev *dev = mdev->dev; | |
16a10ffd | 598 | int qpn = priv->base_qpn; |
83a5a6ce | 599 | u64 mac; |
16a10ffd | 600 | |
83a5a6ce YB |
601 | if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) { |
602 | mac = mlx4_en_mac_to_u64(priv->dev->dev_addr); | |
603 | en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", | |
604 | priv->dev->dev_addr); | |
605 | mlx4_unregister_mac(dev, priv->port, mac); | |
606 | } else { | |
c07cb4b0 | 607 | struct mlx4_mac_entry *entry; |
b67bfe0d | 608 | struct hlist_node *tmp; |
c07cb4b0 | 609 | struct hlist_head *bucket; |
83a5a6ce | 610 | unsigned int i; |
c07cb4b0 | 611 | |
83a5a6ce YB |
612 | for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { |
613 | bucket = &priv->mac_hash[i]; | |
614 | hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { | |
615 | mac = mlx4_en_mac_to_u64(entry->mac); | |
616 | en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n", | |
617 | entry->mac); | |
c07cb4b0 YB |
618 | mlx4_en_uc_steer_release(priv, entry->mac, |
619 | qpn, entry->reg_id); | |
c07cb4b0 | 620 | |
83a5a6ce | 621 | mlx4_unregister_mac(dev, priv->port, mac); |
c07cb4b0 YB |
622 | hlist_del_rcu(&entry->hlist); |
623 | kfree_rcu(entry, rcu); | |
c07cb4b0 | 624 | } |
16a10ffd | 625 | } |
83a5a6ce YB |
626 | |
627 | en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n", | |
628 | priv->port, qpn); | |
629 | mlx4_qp_release_range(dev, qpn, 1); | |
630 | priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; | |
16a10ffd YB |
631 | } |
632 | } | |
633 | ||
634 | static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn, | |
90bbb74a | 635 | unsigned char *new_mac, unsigned char *prev_mac) |
16a10ffd YB |
636 | { |
637 | struct mlx4_en_dev *mdev = priv->mdev; | |
638 | struct mlx4_dev *dev = mdev->dev; | |
16a10ffd YB |
639 | int err = 0; |
640 | u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac); | |
641 | ||
642 | if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) { | |
c07cb4b0 YB |
643 | struct hlist_head *bucket; |
644 | unsigned int mac_hash; | |
645 | struct mlx4_mac_entry *entry; | |
b67bfe0d | 646 | struct hlist_node *tmp; |
c07cb4b0 YB |
647 | u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac); |
648 | ||
649 | bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]]; | |
b67bfe0d | 650 | hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { |
c07cb4b0 YB |
651 | if (ether_addr_equal_64bits(entry->mac, prev_mac)) { |
652 | mlx4_en_uc_steer_release(priv, entry->mac, | |
653 | qpn, entry->reg_id); | |
654 | mlx4_unregister_mac(dev, priv->port, | |
655 | prev_mac_u64); | |
656 | hlist_del_rcu(&entry->hlist); | |
657 | synchronize_rcu(); | |
658 | memcpy(entry->mac, new_mac, ETH_ALEN); | |
659 | entry->reg_id = 0; | |
660 | mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX]; | |
661 | hlist_add_head_rcu(&entry->hlist, | |
662 | &priv->mac_hash[mac_hash]); | |
663 | mlx4_register_mac(dev, priv->port, new_mac_u64); | |
664 | err = mlx4_en_uc_steer_add(priv, new_mac, | |
665 | &qpn, | |
666 | &entry->reg_id); | |
667 | return err; | |
668 | } | |
669 | } | |
670 | return -EINVAL; | |
16a10ffd YB |
671 | } |
672 | ||
673 | return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64); | |
674 | } | |
675 | ||
e7c1c2c4 | 676 | u64 mlx4_en_mac_to_u64(u8 *addr) |
c27a02cd YP |
677 | { |
678 | u64 mac = 0; | |
679 | int i; | |
680 | ||
681 | for (i = 0; i < ETH_ALEN; i++) { | |
682 | mac <<= 8; | |
683 | mac |= addr[i]; | |
684 | } | |
685 | return mac; | |
686 | } | |
687 | ||
bfa8ab47 | 688 | static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv) |
c27a02cd | 689 | { |
c27a02cd YP |
690 | int err = 0; |
691 | ||
c27a02cd YP |
692 | if (priv->port_up) { |
693 | /* Remove old MAC and insert the new one */ | |
16a10ffd | 694 | err = mlx4_en_replace_mac(priv, priv->base_qpn, |
90bbb74a | 695 | priv->dev->dev_addr, priv->prev_mac); |
c27a02cd | 696 | if (err) |
453a6082 | 697 | en_err(priv, "Failed changing HW MAC address\n"); |
6bbb6d99 YB |
698 | memcpy(priv->prev_mac, priv->dev->dev_addr, |
699 | sizeof(priv->prev_mac)); | |
c27a02cd | 700 | } else |
48e551ff | 701 | en_dbg(HW, priv, "Port is down while registering mac, exiting...\n"); |
c27a02cd | 702 | |
bfa8ab47 YB |
703 | return err; |
704 | } | |
705 | ||
706 | static int mlx4_en_set_mac(struct net_device *dev, void *addr) | |
707 | { | |
708 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
709 | struct mlx4_en_dev *mdev = priv->mdev; | |
710 | struct sockaddr *saddr = addr; | |
711 | int err; | |
712 | ||
713 | if (!is_valid_ether_addr(saddr->sa_data)) | |
714 | return -EADDRNOTAVAIL; | |
715 | ||
716 | memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); | |
717 | ||
718 | mutex_lock(&mdev->state_lock); | |
719 | err = mlx4_en_do_set_mac(priv); | |
c27a02cd | 720 | mutex_unlock(&mdev->state_lock); |
bfa8ab47 YB |
721 | |
722 | return err; | |
c27a02cd YP |
723 | } |
724 | ||
725 | static void mlx4_en_clear_list(struct net_device *dev) | |
726 | { | |
727 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
6d199937 | 728 | struct mlx4_en_mc_list *tmp, *mc_to_del; |
c27a02cd | 729 | |
6d199937 YP |
730 | list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) { |
731 | list_del(&mc_to_del->list); | |
732 | kfree(mc_to_del); | |
733 | } | |
c27a02cd YP |
734 | } |
735 | ||
736 | static void mlx4_en_cache_mclist(struct net_device *dev) | |
737 | { | |
738 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
22bedad3 | 739 | struct netdev_hw_addr *ha; |
6d199937 | 740 | struct mlx4_en_mc_list *tmp; |
ff6e2163 | 741 | |
0e03567a | 742 | mlx4_en_clear_list(dev); |
6d199937 YP |
743 | netdev_for_each_mc_addr(ha, dev) { |
744 | tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC); | |
745 | if (!tmp) { | |
6d199937 YP |
746 | mlx4_en_clear_list(dev); |
747 | return; | |
748 | } | |
749 | memcpy(tmp->addr, ha->addr, ETH_ALEN); | |
750 | list_add_tail(&tmp->list, &priv->mc_list); | |
751 | } | |
c27a02cd YP |
752 | } |
753 | ||
6d199937 YP |
754 | static void update_mclist_flags(struct mlx4_en_priv *priv, |
755 | struct list_head *dst, | |
756 | struct list_head *src) | |
757 | { | |
758 | struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc; | |
759 | bool found; | |
760 | ||
761 | /* Find all the entries that should be removed from dst, | |
762 | * These are the entries that are not found in src | |
763 | */ | |
764 | list_for_each_entry(dst_tmp, dst, list) { | |
765 | found = false; | |
766 | list_for_each_entry(src_tmp, src, list) { | |
767 | if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) { | |
768 | found = true; | |
769 | break; | |
770 | } | |
771 | } | |
772 | if (!found) | |
773 | dst_tmp->action = MCLIST_REM; | |
774 | } | |
775 | ||
776 | /* Add entries that exist in src but not in dst | |
777 | * mark them as need to add | |
778 | */ | |
779 | list_for_each_entry(src_tmp, src, list) { | |
780 | found = false; | |
781 | list_for_each_entry(dst_tmp, dst, list) { | |
782 | if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) { | |
783 | dst_tmp->action = MCLIST_NONE; | |
784 | found = true; | |
785 | break; | |
786 | } | |
787 | } | |
788 | if (!found) { | |
14f8dc49 JP |
789 | new_mc = kmemdup(src_tmp, |
790 | sizeof(struct mlx4_en_mc_list), | |
6d199937 | 791 | GFP_KERNEL); |
14f8dc49 | 792 | if (!new_mc) |
6d199937 | 793 | return; |
14f8dc49 | 794 | |
6d199937 YP |
795 | new_mc->action = MCLIST_ADD; |
796 | list_add_tail(&new_mc->list, dst); | |
797 | } | |
798 | } | |
799 | } | |
c27a02cd | 800 | |
0eb74fdd | 801 | static void mlx4_en_set_rx_mode(struct net_device *dev) |
c27a02cd YP |
802 | { |
803 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
804 | ||
805 | if (!priv->port_up) | |
806 | return; | |
807 | ||
0eb74fdd | 808 | queue_work(priv->mdev->workqueue, &priv->rx_mode_task); |
c27a02cd YP |
809 | } |
810 | ||
0eb74fdd YB |
811 | static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv, |
812 | struct mlx4_en_dev *mdev) | |
c27a02cd | 813 | { |
c96d97f4 | 814 | int err = 0; |
c27a02cd | 815 | |
0eb74fdd | 816 | if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { |
c27a02cd | 817 | if (netif_msg_rx_status(priv)) |
0eb74fdd YB |
818 | en_warn(priv, "Entering promiscuous mode\n"); |
819 | priv->flags |= MLX4_EN_FLAG_PROMISC; | |
c27a02cd | 820 | |
0eb74fdd | 821 | /* Enable promiscouos mode */ |
c96d97f4 | 822 | switch (mdev->dev->caps.steering_mode) { |
592e49dd | 823 | case MLX4_STEERING_MODE_DEVICE_MANAGED: |
0eb74fdd YB |
824 | err = mlx4_flow_steer_promisc_add(mdev->dev, |
825 | priv->port, | |
826 | priv->base_qpn, | |
f9162539 | 827 | MLX4_FS_ALL_DEFAULT); |
592e49dd | 828 | if (err) |
0eb74fdd YB |
829 | en_err(priv, "Failed enabling promiscuous mode\n"); |
830 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
592e49dd HHZ |
831 | break; |
832 | ||
c96d97f4 | 833 | case MLX4_STEERING_MODE_B0: |
0eb74fdd YB |
834 | err = mlx4_unicast_promisc_add(mdev->dev, |
835 | priv->base_qpn, | |
836 | priv->port); | |
c96d97f4 | 837 | if (err) |
0eb74fdd YB |
838 | en_err(priv, "Failed enabling unicast promiscuous mode\n"); |
839 | ||
840 | /* Add the default qp number as multicast | |
841 | * promisc | |
842 | */ | |
843 | if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { | |
844 | err = mlx4_multicast_promisc_add(mdev->dev, | |
845 | priv->base_qpn, | |
846 | priv->port); | |
c96d97f4 | 847 | if (err) |
0eb74fdd YB |
848 | en_err(priv, "Failed enabling multicast promiscuous mode\n"); |
849 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
c96d97f4 HHZ |
850 | } |
851 | break; | |
c27a02cd | 852 | |
c96d97f4 HHZ |
853 | case MLX4_STEERING_MODE_A0: |
854 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, | |
855 | priv->port, | |
0eb74fdd YB |
856 | priv->base_qpn, |
857 | 1); | |
1679200f | 858 | if (err) |
0eb74fdd | 859 | en_err(priv, "Failed enabling promiscuous mode\n"); |
c96d97f4 | 860 | break; |
1679200f YP |
861 | } |
862 | ||
0eb74fdd YB |
863 | /* Disable port multicast filter (unconditionally) */ |
864 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
865 | 0, MLX4_MCAST_DISABLE); | |
866 | if (err) | |
867 | en_err(priv, "Failed disabling multicast filter\n"); | |
868 | ||
869 | /* Disable port VLAN filter */ | |
f1b553fb | 870 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 871 | if (err) |
0eb74fdd YB |
872 | en_err(priv, "Failed disabling VLAN filter\n"); |
873 | } | |
874 | } | |
875 | ||
876 | static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv, | |
877 | struct mlx4_en_dev *mdev) | |
878 | { | |
879 | int err = 0; | |
880 | ||
881 | if (netif_msg_rx_status(priv)) | |
882 | en_warn(priv, "Leaving promiscuous mode\n"); | |
883 | priv->flags &= ~MLX4_EN_FLAG_PROMISC; | |
884 | ||
885 | /* Disable promiscouos mode */ | |
886 | switch (mdev->dev->caps.steering_mode) { | |
887 | case MLX4_STEERING_MODE_DEVICE_MANAGED: | |
888 | err = mlx4_flow_steer_promisc_remove(mdev->dev, | |
889 | priv->port, | |
f9162539 | 890 | MLX4_FS_ALL_DEFAULT); |
0eb74fdd YB |
891 | if (err) |
892 | en_err(priv, "Failed disabling promiscuous mode\n"); | |
893 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; | |
894 | break; | |
895 | ||
896 | case MLX4_STEERING_MODE_B0: | |
897 | err = mlx4_unicast_promisc_remove(mdev->dev, | |
898 | priv->base_qpn, | |
899 | priv->port); | |
900 | if (err) | |
901 | en_err(priv, "Failed disabling unicast promiscuous mode\n"); | |
902 | /* Disable Multicast promisc */ | |
903 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
904 | err = mlx4_multicast_promisc_remove(mdev->dev, | |
905 | priv->base_qpn, | |
906 | priv->port); | |
907 | if (err) | |
908 | en_err(priv, "Failed disabling multicast promiscuous mode\n"); | |
909 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; | |
910 | } | |
911 | break; | |
912 | ||
913 | case MLX4_STEERING_MODE_A0: | |
914 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, | |
915 | priv->port, | |
916 | priv->base_qpn, 0); | |
917 | if (err) | |
918 | en_err(priv, "Failed disabling promiscuous mode\n"); | |
919 | break; | |
c27a02cd YP |
920 | } |
921 | ||
0eb74fdd YB |
922 | /* Enable port VLAN filter */ |
923 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); | |
924 | if (err) | |
925 | en_err(priv, "Failed enabling VLAN filter\n"); | |
926 | } | |
927 | ||
928 | static void mlx4_en_do_multicast(struct mlx4_en_priv *priv, | |
929 | struct net_device *dev, | |
930 | struct mlx4_en_dev *mdev) | |
931 | { | |
932 | struct mlx4_en_mc_list *mclist, *tmp; | |
933 | u64 mcast_addr = 0; | |
934 | u8 mc_list[16] = {0}; | |
935 | int err = 0; | |
936 | ||
c27a02cd YP |
937 | /* Enable/disable the multicast filter according to IFF_ALLMULTI */ |
938 | if (dev->flags & IFF_ALLMULTI) { | |
939 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
940 | 0, MLX4_MCAST_DISABLE); | |
941 | if (err) | |
453a6082 | 942 | en_err(priv, "Failed disabling multicast filter\n"); |
1679200f YP |
943 | |
944 | /* Add the default qp number as multicast promisc */ | |
945 | if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { | |
c96d97f4 | 946 | switch (mdev->dev->caps.steering_mode) { |
592e49dd HHZ |
947 | case MLX4_STEERING_MODE_DEVICE_MANAGED: |
948 | err = mlx4_flow_steer_promisc_add(mdev->dev, | |
949 | priv->port, | |
950 | priv->base_qpn, | |
f9162539 | 951 | MLX4_FS_MC_DEFAULT); |
592e49dd HHZ |
952 | break; |
953 | ||
c96d97f4 HHZ |
954 | case MLX4_STEERING_MODE_B0: |
955 | err = mlx4_multicast_promisc_add(mdev->dev, | |
956 | priv->base_qpn, | |
957 | priv->port); | |
958 | break; | |
959 | ||
960 | case MLX4_STEERING_MODE_A0: | |
961 | break; | |
962 | } | |
1679200f YP |
963 | if (err) |
964 | en_err(priv, "Failed entering multicast promisc mode\n"); | |
965 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
966 | } | |
c27a02cd | 967 | } else { |
1679200f YP |
968 | /* Disable Multicast promisc */ |
969 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
c96d97f4 | 970 | switch (mdev->dev->caps.steering_mode) { |
592e49dd HHZ |
971 | case MLX4_STEERING_MODE_DEVICE_MANAGED: |
972 | err = mlx4_flow_steer_promisc_remove(mdev->dev, | |
973 | priv->port, | |
f9162539 | 974 | MLX4_FS_MC_DEFAULT); |
592e49dd HHZ |
975 | break; |
976 | ||
c96d97f4 HHZ |
977 | case MLX4_STEERING_MODE_B0: |
978 | err = mlx4_multicast_promisc_remove(mdev->dev, | |
979 | priv->base_qpn, | |
980 | priv->port); | |
981 | break; | |
982 | ||
983 | case MLX4_STEERING_MODE_A0: | |
984 | break; | |
985 | } | |
1679200f | 986 | if (err) |
25985edc | 987 | en_err(priv, "Failed disabling multicast promiscuous mode\n"); |
1679200f YP |
988 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; |
989 | } | |
ff6e2163 | 990 | |
c27a02cd YP |
991 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, |
992 | 0, MLX4_MCAST_DISABLE); | |
993 | if (err) | |
453a6082 | 994 | en_err(priv, "Failed disabling multicast filter\n"); |
c27a02cd YP |
995 | |
996 | /* Flush mcast filter and init it with broadcast address */ | |
997 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, | |
998 | 1, MLX4_MCAST_CONFIG); | |
999 | ||
1000 | /* Update multicast list - we cache all addresses so they won't | |
1001 | * change while HW is updated holding the command semaphor */ | |
dbd501a8 | 1002 | netif_addr_lock_bh(dev); |
c27a02cd | 1003 | mlx4_en_cache_mclist(dev); |
dbd501a8 | 1004 | netif_addr_unlock_bh(dev); |
6d199937 YP |
1005 | list_for_each_entry(mclist, &priv->mc_list, list) { |
1006 | mcast_addr = mlx4_en_mac_to_u64(mclist->addr); | |
c27a02cd YP |
1007 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, |
1008 | mcast_addr, 0, MLX4_MCAST_CONFIG); | |
1009 | } | |
1010 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
1011 | 0, MLX4_MCAST_ENABLE); | |
1012 | if (err) | |
453a6082 | 1013 | en_err(priv, "Failed enabling multicast filter\n"); |
6d199937 YP |
1014 | |
1015 | update_mclist_flags(priv, &priv->curr_list, &priv->mc_list); | |
1016 | list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { | |
1017 | if (mclist->action == MCLIST_REM) { | |
1018 | /* detach this address and delete from list */ | |
1019 | memcpy(&mc_list[10], mclist->addr, ETH_ALEN); | |
1020 | mc_list[5] = priv->port; | |
1021 | err = mlx4_multicast_detach(mdev->dev, | |
1022 | &priv->rss_map.indir_qp, | |
1023 | mc_list, | |
0ff1fb65 HHZ |
1024 | MLX4_PROT_ETH, |
1025 | mclist->reg_id); | |
6d199937 YP |
1026 | if (err) |
1027 | en_err(priv, "Fail to detach multicast address\n"); | |
1028 | ||
1029 | /* remove from list */ | |
1030 | list_del(&mclist->list); | |
1031 | kfree(mclist); | |
9c64508a | 1032 | } else if (mclist->action == MCLIST_ADD) { |
6d199937 YP |
1033 | /* attach the address */ |
1034 | memcpy(&mc_list[10], mclist->addr, ETH_ALEN); | |
0ff1fb65 | 1035 | /* needed for B0 steering support */ |
6d199937 YP |
1036 | mc_list[5] = priv->port; |
1037 | err = mlx4_multicast_attach(mdev->dev, | |
1038 | &priv->rss_map.indir_qp, | |
0ff1fb65 HHZ |
1039 | mc_list, |
1040 | priv->port, 0, | |
1041 | MLX4_PROT_ETH, | |
1042 | &mclist->reg_id); | |
6d199937 YP |
1043 | if (err) |
1044 | en_err(priv, "Fail to attach multicast address\n"); | |
1045 | ||
1046 | } | |
1047 | } | |
c27a02cd | 1048 | } |
0eb74fdd YB |
1049 | } |
1050 | ||
cc5387f7 YB |
1051 | static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv, |
1052 | struct net_device *dev, | |
1053 | struct mlx4_en_dev *mdev) | |
1054 | { | |
1055 | struct netdev_hw_addr *ha; | |
1056 | struct mlx4_mac_entry *entry; | |
b67bfe0d | 1057 | struct hlist_node *tmp; |
cc5387f7 YB |
1058 | bool found; |
1059 | u64 mac; | |
1060 | int err = 0; | |
1061 | struct hlist_head *bucket; | |
1062 | unsigned int i; | |
1063 | int removed = 0; | |
1064 | u32 prev_flags; | |
1065 | ||
1066 | /* Note that we do not need to protect our mac_hash traversal with rcu, | |
1067 | * since all modification code is protected by mdev->state_lock | |
1068 | */ | |
1069 | ||
1070 | /* find what to remove */ | |
1071 | for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) { | |
1072 | bucket = &priv->mac_hash[i]; | |
b67bfe0d | 1073 | hlist_for_each_entry_safe(entry, tmp, bucket, hlist) { |
cc5387f7 YB |
1074 | found = false; |
1075 | netdev_for_each_uc_addr(ha, dev) { | |
1076 | if (ether_addr_equal_64bits(entry->mac, | |
1077 | ha->addr)) { | |
1078 | found = true; | |
1079 | break; | |
1080 | } | |
1081 | } | |
1082 | ||
1083 | /* MAC address of the port is not in uc list */ | |
1084 | if (ether_addr_equal_64bits(entry->mac, dev->dev_addr)) | |
1085 | found = true; | |
1086 | ||
1087 | if (!found) { | |
1088 | mac = mlx4_en_mac_to_u64(entry->mac); | |
1089 | mlx4_en_uc_steer_release(priv, entry->mac, | |
1090 | priv->base_qpn, | |
1091 | entry->reg_id); | |
1092 | mlx4_unregister_mac(mdev->dev, priv->port, mac); | |
1093 | ||
1094 | hlist_del_rcu(&entry->hlist); | |
1095 | kfree_rcu(entry, rcu); | |
1096 | en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n", | |
1097 | entry->mac, priv->port); | |
1098 | ++removed; | |
1099 | } | |
1100 | } | |
1101 | } | |
1102 | ||
1103 | /* if we didn't remove anything, there is no use in trying to add | |
1104 | * again once we are in a forced promisc mode state | |
1105 | */ | |
1106 | if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed) | |
1107 | return; | |
1108 | ||
1109 | prev_flags = priv->flags; | |
1110 | priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC; | |
1111 | ||
1112 | /* find what to add */ | |
1113 | netdev_for_each_uc_addr(ha, dev) { | |
1114 | found = false; | |
1115 | bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; | |
b67bfe0d | 1116 | hlist_for_each_entry(entry, bucket, hlist) { |
cc5387f7 YB |
1117 | if (ether_addr_equal_64bits(entry->mac, ha->addr)) { |
1118 | found = true; | |
1119 | break; | |
1120 | } | |
1121 | } | |
1122 | ||
1123 | if (!found) { | |
1124 | entry = kmalloc(sizeof(*entry), GFP_KERNEL); | |
1125 | if (!entry) { | |
1126 | en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n", | |
1127 | ha->addr, priv->port); | |
1128 | priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; | |
1129 | break; | |
1130 | } | |
1131 | mac = mlx4_en_mac_to_u64(ha->addr); | |
1132 | memcpy(entry->mac, ha->addr, ETH_ALEN); | |
1133 | err = mlx4_register_mac(mdev->dev, priv->port, mac); | |
1134 | if (err < 0) { | |
1135 | en_err(priv, "Failed registering MAC %pM on port %d: %d\n", | |
1136 | ha->addr, priv->port, err); | |
1137 | kfree(entry); | |
1138 | priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; | |
1139 | break; | |
1140 | } | |
1141 | err = mlx4_en_uc_steer_add(priv, ha->addr, | |
1142 | &priv->base_qpn, | |
1143 | &entry->reg_id); | |
1144 | if (err) { | |
1145 | en_err(priv, "Failed adding MAC %pM on port %d: %d\n", | |
1146 | ha->addr, priv->port, err); | |
1147 | mlx4_unregister_mac(mdev->dev, priv->port, mac); | |
1148 | kfree(entry); | |
1149 | priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC; | |
1150 | break; | |
1151 | } else { | |
1152 | unsigned int mac_hash; | |
1153 | en_dbg(DRV, priv, "Added MAC %pM on port:%d\n", | |
1154 | ha->addr, priv->port); | |
1155 | mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX]; | |
1156 | bucket = &priv->mac_hash[mac_hash]; | |
1157 | hlist_add_head_rcu(&entry->hlist, bucket); | |
1158 | } | |
1159 | } | |
1160 | } | |
1161 | ||
1162 | if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) { | |
1163 | en_warn(priv, "Forcing promiscuous mode on port:%d\n", | |
1164 | priv->port); | |
1165 | } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) { | |
1166 | en_warn(priv, "Stop forcing promiscuous mode on port:%d\n", | |
1167 | priv->port); | |
1168 | } | |
1169 | } | |
1170 | ||
0eb74fdd YB |
1171 | static void mlx4_en_do_set_rx_mode(struct work_struct *work) |
1172 | { | |
1173 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
1174 | rx_mode_task); | |
1175 | struct mlx4_en_dev *mdev = priv->mdev; | |
1176 | struct net_device *dev = priv->dev; | |
1177 | ||
1178 | mutex_lock(&mdev->state_lock); | |
1179 | if (!mdev->device_up) { | |
1180 | en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n"); | |
1181 | goto out; | |
1182 | } | |
1183 | if (!priv->port_up) { | |
1184 | en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n"); | |
1185 | goto out; | |
1186 | } | |
1187 | ||
1188 | if (!netif_carrier_ok(dev)) { | |
1189 | if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { | |
1190 | if (priv->port_state.link_state) { | |
1191 | priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; | |
1192 | netif_carrier_on(dev); | |
1193 | en_dbg(LINK, priv, "Link Up\n"); | |
1194 | } | |
1195 | } | |
1196 | } | |
1197 | ||
cc5387f7 YB |
1198 | if (dev->priv_flags & IFF_UNICAST_FLT) |
1199 | mlx4_en_do_uc_filter(priv, dev, mdev); | |
1200 | ||
0eb74fdd | 1201 | /* Promsicuous mode: disable all filters */ |
cc5387f7 YB |
1202 | if ((dev->flags & IFF_PROMISC) || |
1203 | (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) { | |
0eb74fdd YB |
1204 | mlx4_en_set_promisc_mode(priv, mdev); |
1205 | goto out; | |
1206 | } | |
1207 | ||
1208 | /* Not in promiscuous mode */ | |
1209 | if (priv->flags & MLX4_EN_FLAG_PROMISC) | |
1210 | mlx4_en_clear_promisc_mode(priv, mdev); | |
1211 | ||
1212 | mlx4_en_do_multicast(priv, dev, mdev); | |
c27a02cd YP |
1213 | out: |
1214 | mutex_unlock(&mdev->state_lock); | |
1215 | } | |
1216 | ||
1217 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1218 | static void mlx4_en_netpoll(struct net_device *dev) | |
1219 | { | |
1220 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1221 | struct mlx4_en_cq *cq; | |
1222 | unsigned long flags; | |
1223 | int i; | |
1224 | ||
1225 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1226 | cq = &priv->rx_cq[i]; | |
1227 | spin_lock_irqsave(&cq->lock, flags); | |
1228 | napi_synchronize(&cq->napi); | |
1229 | mlx4_en_process_rx_cq(dev, cq, 0); | |
1230 | spin_unlock_irqrestore(&cq->lock, flags); | |
1231 | } | |
1232 | } | |
1233 | #endif | |
1234 | ||
1235 | static void mlx4_en_tx_timeout(struct net_device *dev) | |
1236 | { | |
1237 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1238 | struct mlx4_en_dev *mdev = priv->mdev; | |
1239 | ||
1240 | if (netif_msg_timer(priv)) | |
453a6082 | 1241 | en_warn(priv, "Tx timeout called on port:%d\n", priv->port); |
c27a02cd | 1242 | |
1e338db5 | 1243 | priv->port_stats.tx_timeout++; |
453a6082 | 1244 | en_dbg(DRV, priv, "Scheduling watchdog\n"); |
1e338db5 | 1245 | queue_work(mdev->workqueue, &priv->watchdog_task); |
c27a02cd YP |
1246 | } |
1247 | ||
1248 | ||
1249 | static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev) | |
1250 | { | |
1251 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1252 | ||
1253 | spin_lock_bh(&priv->stats_lock); | |
1254 | memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats)); | |
1255 | spin_unlock_bh(&priv->stats_lock); | |
1256 | ||
1257 | return &priv->ret_stats; | |
1258 | } | |
1259 | ||
1260 | static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) | |
1261 | { | |
c27a02cd YP |
1262 | struct mlx4_en_cq *cq; |
1263 | int i; | |
1264 | ||
1265 | /* If we haven't received a specific coalescing setting | |
98a1708d | 1266 | * (module param), we set the moderation parameters as follows: |
c27a02cd | 1267 | * - moder_cnt is set to the number of mtu sized packets to |
ecfd2ce1 | 1268 | * satisfy our coalescing target. |
c27a02cd YP |
1269 | * - moder_time is set to a fixed value. |
1270 | */ | |
3db36fb2 | 1271 | priv->rx_frames = MLX4_EN_RX_COAL_TARGET; |
60b9f9e5 | 1272 | priv->rx_usecs = MLX4_EN_RX_COAL_TIME; |
a19a848a YP |
1273 | priv->tx_frames = MLX4_EN_TX_COAL_PKTS; |
1274 | priv->tx_usecs = MLX4_EN_TX_COAL_TIME; | |
48e551ff YB |
1275 | en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n", |
1276 | priv->dev->mtu, priv->rx_frames, priv->rx_usecs); | |
c27a02cd YP |
1277 | |
1278 | /* Setup cq moderation params */ | |
1279 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1280 | cq = &priv->rx_cq[i]; | |
1281 | cq->moder_cnt = priv->rx_frames; | |
1282 | cq->moder_time = priv->rx_usecs; | |
6b4d8d9f AG |
1283 | priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; |
1284 | priv->last_moder_packets[i] = 0; | |
1285 | priv->last_moder_bytes[i] = 0; | |
c27a02cd YP |
1286 | } |
1287 | ||
1288 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1289 | cq = &priv->tx_cq[i]; | |
a19a848a YP |
1290 | cq->moder_cnt = priv->tx_frames; |
1291 | cq->moder_time = priv->tx_usecs; | |
c27a02cd YP |
1292 | } |
1293 | ||
1294 | /* Reset auto-moderation params */ | |
1295 | priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; | |
1296 | priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; | |
1297 | priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; | |
1298 | priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; | |
1299 | priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; | |
60b9f9e5 | 1300 | priv->adaptive_rx_coal = 1; |
c27a02cd | 1301 | priv->last_moder_jiffies = 0; |
c27a02cd | 1302 | priv->last_moder_tx_packets = 0; |
c27a02cd YP |
1303 | } |
1304 | ||
1305 | static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) | |
1306 | { | |
1307 | unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); | |
c27a02cd YP |
1308 | struct mlx4_en_cq *cq; |
1309 | unsigned long packets; | |
1310 | unsigned long rate; | |
1311 | unsigned long avg_pkt_size; | |
1312 | unsigned long rx_packets; | |
1313 | unsigned long rx_bytes; | |
c27a02cd YP |
1314 | unsigned long rx_pkt_diff; |
1315 | int moder_time; | |
6b4d8d9f | 1316 | int ring, err; |
c27a02cd YP |
1317 | |
1318 | if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) | |
1319 | return; | |
1320 | ||
6b4d8d9f AG |
1321 | for (ring = 0; ring < priv->rx_ring_num; ring++) { |
1322 | spin_lock_bh(&priv->stats_lock); | |
1323 | rx_packets = priv->rx_ring[ring].packets; | |
1324 | rx_bytes = priv->rx_ring[ring].bytes; | |
1325 | spin_unlock_bh(&priv->stats_lock); | |
1326 | ||
1327 | rx_pkt_diff = ((unsigned long) (rx_packets - | |
1328 | priv->last_moder_packets[ring])); | |
1329 | packets = rx_pkt_diff; | |
1330 | rate = packets * HZ / period; | |
1331 | avg_pkt_size = packets ? ((unsigned long) (rx_bytes - | |
1332 | priv->last_moder_bytes[ring])) / packets : 0; | |
1333 | ||
1334 | /* Apply auto-moderation only when packet rate | |
1335 | * exceeds a rate that it matters */ | |
1336 | if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && | |
1337 | avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { | |
c27a02cd YP |
1338 | if (rate < priv->pkt_rate_low) |
1339 | moder_time = priv->rx_usecs_low; | |
1340 | else if (rate > priv->pkt_rate_high) | |
1341 | moder_time = priv->rx_usecs_high; | |
1342 | else | |
1343 | moder_time = (rate - priv->pkt_rate_low) * | |
1344 | (priv->rx_usecs_high - priv->rx_usecs_low) / | |
1345 | (priv->pkt_rate_high - priv->pkt_rate_low) + | |
1346 | priv->rx_usecs_low; | |
6b4d8d9f AG |
1347 | } else { |
1348 | moder_time = priv->rx_usecs_low; | |
c27a02cd | 1349 | } |
c27a02cd | 1350 | |
6b4d8d9f AG |
1351 | if (moder_time != priv->last_moder_time[ring]) { |
1352 | priv->last_moder_time[ring] = moder_time; | |
1353 | cq = &priv->rx_cq[ring]; | |
c27a02cd | 1354 | cq->moder_time = moder_time; |
a1c6693a | 1355 | cq->moder_cnt = priv->rx_frames; |
c27a02cd | 1356 | err = mlx4_en_set_cq_moder(priv, cq); |
6b4d8d9f | 1357 | if (err) |
48e551ff YB |
1358 | en_err(priv, "Failed modifying moderation for cq:%d\n", |
1359 | ring); | |
c27a02cd | 1360 | } |
6b4d8d9f AG |
1361 | priv->last_moder_packets[ring] = rx_packets; |
1362 | priv->last_moder_bytes[ring] = rx_bytes; | |
c27a02cd YP |
1363 | } |
1364 | ||
c27a02cd YP |
1365 | priv->last_moder_jiffies = jiffies; |
1366 | } | |
1367 | ||
1368 | static void mlx4_en_do_get_stats(struct work_struct *work) | |
1369 | { | |
bf6aede7 | 1370 | struct delayed_work *delay = to_delayed_work(work); |
c27a02cd YP |
1371 | struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, |
1372 | stats_task); | |
1373 | struct mlx4_en_dev *mdev = priv->mdev; | |
1374 | int err; | |
1375 | ||
c27a02cd YP |
1376 | mutex_lock(&mdev->state_lock); |
1377 | if (mdev->device_up) { | |
6123db2e JM |
1378 | if (priv->port_up) { |
1379 | err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); | |
1380 | if (err) | |
1381 | en_dbg(HW, priv, "Could not update stats\n"); | |
2d51837f | 1382 | |
c27a02cd | 1383 | mlx4_en_auto_moderation(priv); |
6123db2e | 1384 | } |
c27a02cd YP |
1385 | |
1386 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); | |
1387 | } | |
d7e1a487 | 1388 | if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { |
bfa8ab47 | 1389 | mlx4_en_do_set_mac(priv); |
d7e1a487 YP |
1390 | mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; |
1391 | } | |
c27a02cd YP |
1392 | mutex_unlock(&mdev->state_lock); |
1393 | } | |
1394 | ||
b6c39bfc AV |
1395 | /* mlx4_en_service_task - Run service task for tasks that needed to be done |
1396 | * periodically | |
1397 | */ | |
1398 | static void mlx4_en_service_task(struct work_struct *work) | |
1399 | { | |
1400 | struct delayed_work *delay = to_delayed_work(work); | |
1401 | struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, | |
1402 | service_task); | |
1403 | struct mlx4_en_dev *mdev = priv->mdev; | |
1404 | ||
1405 | mutex_lock(&mdev->state_lock); | |
1406 | if (mdev->device_up) { | |
dc8142ea AV |
1407 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) |
1408 | mlx4_en_ptp_overflow_check(mdev); | |
b6c39bfc AV |
1409 | |
1410 | queue_delayed_work(mdev->workqueue, &priv->service_task, | |
1411 | SERVICE_TASK_DELAY); | |
1412 | } | |
1413 | mutex_unlock(&mdev->state_lock); | |
1414 | } | |
1415 | ||
c27a02cd YP |
1416 | static void mlx4_en_linkstate(struct work_struct *work) |
1417 | { | |
1418 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
1419 | linkstate_task); | |
1420 | struct mlx4_en_dev *mdev = priv->mdev; | |
1421 | int linkstate = priv->link_state; | |
1422 | ||
1423 | mutex_lock(&mdev->state_lock); | |
1424 | /* If observable port state changed set carrier state and | |
1425 | * report to system log */ | |
1426 | if (priv->last_link_state != linkstate) { | |
1427 | if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { | |
e5cc44b2 | 1428 | en_info(priv, "Link Down\n"); |
c27a02cd YP |
1429 | netif_carrier_off(priv->dev); |
1430 | } else { | |
e5cc44b2 | 1431 | en_info(priv, "Link Up\n"); |
c27a02cd YP |
1432 | netif_carrier_on(priv->dev); |
1433 | } | |
1434 | } | |
1435 | priv->last_link_state = linkstate; | |
1436 | mutex_unlock(&mdev->state_lock); | |
1437 | } | |
1438 | ||
1439 | ||
18cc42a3 | 1440 | int mlx4_en_start_port(struct net_device *dev) |
c27a02cd YP |
1441 | { |
1442 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1443 | struct mlx4_en_dev *mdev = priv->mdev; | |
1444 | struct mlx4_en_cq *cq; | |
1445 | struct mlx4_en_tx_ring *tx_ring; | |
c27a02cd YP |
1446 | int rx_index = 0; |
1447 | int tx_index = 0; | |
c27a02cd YP |
1448 | int err = 0; |
1449 | int i; | |
1450 | int j; | |
1679200f | 1451 | u8 mc_list[16] = {0}; |
c27a02cd YP |
1452 | |
1453 | if (priv->port_up) { | |
453a6082 | 1454 | en_dbg(DRV, priv, "start port called while port already up\n"); |
c27a02cd YP |
1455 | return 0; |
1456 | } | |
1457 | ||
6d199937 YP |
1458 | INIT_LIST_HEAD(&priv->mc_list); |
1459 | INIT_LIST_HEAD(&priv->curr_list); | |
0d256c0e HHZ |
1460 | INIT_LIST_HEAD(&priv->ethtool_list); |
1461 | memset(&priv->ethtool_rules[0], 0, | |
1462 | sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES); | |
6d199937 | 1463 | |
c27a02cd YP |
1464 | /* Calculate Rx buf size */ |
1465 | dev->mtu = min(dev->mtu, priv->max_mtu); | |
1466 | mlx4_en_calc_rx_buf(dev); | |
453a6082 | 1467 | en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); |
38aab07c | 1468 | |
c27a02cd | 1469 | /* Configure rx cq's and rings */ |
38aab07c YP |
1470 | err = mlx4_en_activate_rx_rings(priv); |
1471 | if (err) { | |
453a6082 | 1472 | en_err(priv, "Failed to activate RX rings\n"); |
38aab07c YP |
1473 | return err; |
1474 | } | |
c27a02cd YP |
1475 | for (i = 0; i < priv->rx_ring_num; i++) { |
1476 | cq = &priv->rx_cq[i]; | |
c27a02cd | 1477 | |
9e77a2b8 AV |
1478 | mlx4_en_cq_init_lock(cq); |
1479 | ||
76532d0c | 1480 | err = mlx4_en_activate_cq(priv, cq, i); |
c27a02cd | 1481 | if (err) { |
453a6082 | 1482 | en_err(priv, "Failed activating Rx CQ\n"); |
a4233304 | 1483 | goto cq_err; |
c27a02cd YP |
1484 | } |
1485 | for (j = 0; j < cq->size; j++) | |
1486 | cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; | |
1487 | err = mlx4_en_set_cq_moder(priv, cq); | |
1488 | if (err) { | |
453a6082 | 1489 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
1490 | mlx4_en_deactivate_cq(priv, cq); |
1491 | goto cq_err; | |
1492 | } | |
1493 | mlx4_en_arm_cq(priv, cq); | |
38aab07c | 1494 | priv->rx_ring[i].cqn = cq->mcq.cqn; |
c27a02cd YP |
1495 | ++rx_index; |
1496 | } | |
1497 | ||
ffe455ad EE |
1498 | /* Set qp number */ |
1499 | en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); | |
16a10ffd | 1500 | err = mlx4_en_get_qp(priv); |
1679200f | 1501 | if (err) { |
ffe455ad | 1502 | en_err(priv, "Failed getting eth qp\n"); |
1679200f YP |
1503 | goto cq_err; |
1504 | } | |
1505 | mdev->mac_removed[priv->port] = 0; | |
1506 | ||
c27a02cd YP |
1507 | err = mlx4_en_config_rss_steer(priv); |
1508 | if (err) { | |
453a6082 | 1509 | en_err(priv, "Failed configuring rss steering\n"); |
1679200f | 1510 | goto mac_err; |
c27a02cd YP |
1511 | } |
1512 | ||
cabdc8ee HHZ |
1513 | err = mlx4_en_create_drop_qp(priv); |
1514 | if (err) | |
1515 | goto rss_err; | |
1516 | ||
c27a02cd YP |
1517 | /* Configure tx cq's and rings */ |
1518 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1519 | /* Configure cq */ | |
1520 | cq = &priv->tx_cq[i]; | |
76532d0c | 1521 | err = mlx4_en_activate_cq(priv, cq, i); |
c27a02cd | 1522 | if (err) { |
453a6082 | 1523 | en_err(priv, "Failed allocating Tx CQ\n"); |
c27a02cd YP |
1524 | goto tx_err; |
1525 | } | |
1526 | err = mlx4_en_set_cq_moder(priv, cq); | |
1527 | if (err) { | |
453a6082 | 1528 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
1529 | mlx4_en_deactivate_cq(priv, cq); |
1530 | goto tx_err; | |
1531 | } | |
453a6082 | 1532 | en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i); |
c27a02cd YP |
1533 | cq->buf->wqe_index = cpu_to_be16(0xffff); |
1534 | ||
1535 | /* Configure ring */ | |
1536 | tx_ring = &priv->tx_ring[i]; | |
0e98b523 | 1537 | err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn, |
d317966b | 1538 | i / priv->num_tx_rings_p_up); |
c27a02cd | 1539 | if (err) { |
453a6082 | 1540 | en_err(priv, "Failed allocating Tx ring\n"); |
c27a02cd YP |
1541 | mlx4_en_deactivate_cq(priv, cq); |
1542 | goto tx_err; | |
1543 | } | |
5b263f53 | 1544 | tx_ring->tx_queue = netdev_get_tx_queue(dev, i); |
e22979d9 YP |
1545 | |
1546 | /* Arm CQ for TX completions */ | |
1547 | mlx4_en_arm_cq(priv, cq); | |
1548 | ||
c27a02cd YP |
1549 | /* Set initial ownership of all Tx TXBBs to SW (1) */ |
1550 | for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) | |
1551 | *((u32 *) (tx_ring->buf + j)) = 0xffffffff; | |
1552 | ++tx_index; | |
1553 | } | |
1554 | ||
1555 | /* Configure port */ | |
1556 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, | |
1557 | priv->rx_skb_size + ETH_FCS_LEN, | |
d53b93f2 YP |
1558 | priv->prof->tx_pause, |
1559 | priv->prof->tx_ppp, | |
1560 | priv->prof->rx_pause, | |
1561 | priv->prof->rx_ppp); | |
c27a02cd | 1562 | if (err) { |
48e551ff YB |
1563 | en_err(priv, "Failed setting port general configurations for port %d, with error %d\n", |
1564 | priv->port, err); | |
c27a02cd YP |
1565 | goto tx_err; |
1566 | } | |
1567 | /* Set default qp number */ | |
1568 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); | |
1569 | if (err) { | |
453a6082 | 1570 | en_err(priv, "Failed setting default qp numbers\n"); |
c27a02cd YP |
1571 | goto tx_err; |
1572 | } | |
c27a02cd YP |
1573 | |
1574 | /* Init port */ | |
453a6082 | 1575 | en_dbg(HW, priv, "Initializing port\n"); |
c27a02cd YP |
1576 | err = mlx4_INIT_PORT(mdev->dev, priv->port); |
1577 | if (err) { | |
453a6082 | 1578 | en_err(priv, "Failed Initializing port\n"); |
1679200f | 1579 | goto tx_err; |
c27a02cd YP |
1580 | } |
1581 | ||
1679200f YP |
1582 | /* Attach rx QP to bradcast address */ |
1583 | memset(&mc_list[10], 0xff, ETH_ALEN); | |
0ff1fb65 | 1584 | mc_list[5] = priv->port; /* needed for B0 steering support */ |
1679200f | 1585 | if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, |
0ff1fb65 HHZ |
1586 | priv->port, 0, MLX4_PROT_ETH, |
1587 | &priv->broadcast_id)) | |
1679200f YP |
1588 | mlx4_warn(mdev, "Failed Attaching Broadcast\n"); |
1589 | ||
b5845f98 HX |
1590 | /* Must redo promiscuous mode setup. */ |
1591 | priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); | |
1592 | ||
c27a02cd | 1593 | /* Schedule multicast task to populate multicast list */ |
0eb74fdd | 1594 | queue_work(mdev->workqueue, &priv->rx_mode_task); |
c27a02cd | 1595 | |
93ece0c1 EE |
1596 | mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap); |
1597 | ||
c27a02cd | 1598 | priv->port_up = true; |
a11faac7 | 1599 | netif_tx_start_all_queues(dev); |
3484aac1 AV |
1600 | netif_device_attach(dev); |
1601 | ||
c27a02cd YP |
1602 | return 0; |
1603 | ||
c27a02cd YP |
1604 | tx_err: |
1605 | while (tx_index--) { | |
1606 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]); | |
1607 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]); | |
1608 | } | |
cabdc8ee HHZ |
1609 | mlx4_en_destroy_drop_qp(priv); |
1610 | rss_err: | |
c27a02cd | 1611 | mlx4_en_release_rss_steer(priv); |
1679200f | 1612 | mac_err: |
16a10ffd | 1613 | mlx4_en_put_qp(priv); |
c27a02cd YP |
1614 | cq_err: |
1615 | while (rx_index--) | |
1616 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]); | |
38aab07c YP |
1617 | for (i = 0; i < priv->rx_ring_num; i++) |
1618 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
c27a02cd YP |
1619 | |
1620 | return err; /* need to close devices */ | |
1621 | } | |
1622 | ||
1623 | ||
3484aac1 | 1624 | void mlx4_en_stop_port(struct net_device *dev, int detach) |
c27a02cd YP |
1625 | { |
1626 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1627 | struct mlx4_en_dev *mdev = priv->mdev; | |
6d199937 | 1628 | struct mlx4_en_mc_list *mclist, *tmp; |
0d256c0e | 1629 | struct ethtool_flow_id *flow, *tmp_flow; |
c27a02cd | 1630 | int i; |
1679200f | 1631 | u8 mc_list[16] = {0}; |
c27a02cd YP |
1632 | |
1633 | if (!priv->port_up) { | |
453a6082 | 1634 | en_dbg(DRV, priv, "stop port called while port already down\n"); |
c27a02cd YP |
1635 | return; |
1636 | } | |
c27a02cd YP |
1637 | |
1638 | /* Synchronize with tx routine */ | |
1639 | netif_tx_lock_bh(dev); | |
3484aac1 AV |
1640 | if (detach) |
1641 | netif_device_detach(dev); | |
3c05f5ef | 1642 | netif_tx_stop_all_queues(dev); |
c27a02cd YP |
1643 | netif_tx_unlock_bh(dev); |
1644 | ||
3484aac1 AV |
1645 | netif_tx_disable(dev); |
1646 | ||
7c287380 | 1647 | /* Set port as not active */ |
3c05f5ef | 1648 | priv->port_up = false; |
c27a02cd | 1649 | |
db0e7cba AY |
1650 | /* Promsicuous mode */ |
1651 | if (mdev->dev->caps.steering_mode == | |
1652 | MLX4_STEERING_MODE_DEVICE_MANAGED) { | |
1653 | priv->flags &= ~(MLX4_EN_FLAG_PROMISC | | |
1654 | MLX4_EN_FLAG_MC_PROMISC); | |
1655 | mlx4_flow_steer_promisc_remove(mdev->dev, | |
1656 | priv->port, | |
f9162539 | 1657 | MLX4_FS_ALL_DEFAULT); |
db0e7cba AY |
1658 | mlx4_flow_steer_promisc_remove(mdev->dev, |
1659 | priv->port, | |
f9162539 | 1660 | MLX4_FS_MC_DEFAULT); |
db0e7cba AY |
1661 | } else if (priv->flags & MLX4_EN_FLAG_PROMISC) { |
1662 | priv->flags &= ~MLX4_EN_FLAG_PROMISC; | |
1663 | ||
1664 | /* Disable promiscouos mode */ | |
1665 | mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, | |
1666 | priv->port); | |
1667 | ||
1668 | /* Disable Multicast promisc */ | |
1669 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
1670 | mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, | |
1671 | priv->port); | |
1672 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; | |
1673 | } | |
1674 | } | |
1675 | ||
1679200f YP |
1676 | /* Detach All multicasts */ |
1677 | memset(&mc_list[10], 0xff, ETH_ALEN); | |
0ff1fb65 | 1678 | mc_list[5] = priv->port; /* needed for B0 steering support */ |
1679200f | 1679 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, |
0ff1fb65 | 1680 | MLX4_PROT_ETH, priv->broadcast_id); |
6d199937 YP |
1681 | list_for_each_entry(mclist, &priv->curr_list, list) { |
1682 | memcpy(&mc_list[10], mclist->addr, ETH_ALEN); | |
1679200f YP |
1683 | mc_list[5] = priv->port; |
1684 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, | |
0ff1fb65 | 1685 | mc_list, MLX4_PROT_ETH, mclist->reg_id); |
1679200f YP |
1686 | } |
1687 | mlx4_en_clear_list(dev); | |
6d199937 YP |
1688 | list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) { |
1689 | list_del(&mclist->list); | |
1690 | kfree(mclist); | |
1691 | } | |
1692 | ||
1679200f YP |
1693 | /* Flush multicast filter */ |
1694 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); | |
1695 | ||
6efb5fac HHZ |
1696 | /* Remove flow steering rules for the port*/ |
1697 | if (mdev->dev->caps.steering_mode == | |
1698 | MLX4_STEERING_MODE_DEVICE_MANAGED) { | |
1699 | ASSERT_RTNL(); | |
1700 | list_for_each_entry_safe(flow, tmp_flow, | |
1701 | &priv->ethtool_list, list) { | |
1702 | mlx4_flow_detach(mdev->dev, flow->id); | |
1703 | list_del(&flow->list); | |
1704 | } | |
1705 | } | |
1706 | ||
cabdc8ee HHZ |
1707 | mlx4_en_destroy_drop_qp(priv); |
1708 | ||
c27a02cd YP |
1709 | /* Free TX Rings */ |
1710 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1711 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]); | |
1712 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]); | |
1713 | } | |
1714 | msleep(10); | |
1715 | ||
1716 | for (i = 0; i < priv->tx_ring_num; i++) | |
1717 | mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]); | |
1718 | ||
1719 | /* Free RSS qps */ | |
1720 | mlx4_en_release_rss_steer(priv); | |
1721 | ||
ffe455ad | 1722 | /* Unregister Mac address for the port */ |
16a10ffd | 1723 | mlx4_en_put_qp(priv); |
955154fa MB |
1724 | if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN)) |
1725 | mdev->mac_removed[priv->port] = 1; | |
ffe455ad | 1726 | |
c27a02cd YP |
1727 | /* Free RX Rings */ |
1728 | for (i = 0; i < priv->rx_ring_num; i++) { | |
9e77a2b8 AV |
1729 | struct mlx4_en_cq *cq = &priv->rx_cq[i]; |
1730 | ||
1731 | local_bh_disable(); | |
1732 | while (!mlx4_en_cq_lock_napi(cq)) { | |
1733 | pr_info("CQ %d locked\n", i); | |
1734 | mdelay(1); | |
1735 | } | |
1736 | local_bh_enable(); | |
1737 | ||
c27a02cd | 1738 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); |
9e77a2b8 | 1739 | while (test_bit(NAPI_STATE_SCHED, &cq->napi.state)) |
c27a02cd | 1740 | msleep(1); |
9e77a2b8 | 1741 | mlx4_en_deactivate_cq(priv, cq); |
c27a02cd | 1742 | } |
7c287380 YP |
1743 | |
1744 | /* close port*/ | |
1745 | mlx4_CLOSE_PORT(mdev->dev, priv->port); | |
c27a02cd YP |
1746 | } |
1747 | ||
1748 | static void mlx4_en_restart(struct work_struct *work) | |
1749 | { | |
1750 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
1751 | watchdog_task); | |
1752 | struct mlx4_en_dev *mdev = priv->mdev; | |
1753 | struct net_device *dev = priv->dev; | |
1754 | ||
453a6082 | 1755 | en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); |
1e338db5 YP |
1756 | |
1757 | mutex_lock(&mdev->state_lock); | |
1758 | if (priv->port_up) { | |
3484aac1 | 1759 | mlx4_en_stop_port(dev, 1); |
1e338db5 | 1760 | if (mlx4_en_start_port(dev)) |
453a6082 | 1761 | en_err(priv, "Failed restarting port %d\n", priv->port); |
1e338db5 YP |
1762 | } |
1763 | mutex_unlock(&mdev->state_lock); | |
c27a02cd YP |
1764 | } |
1765 | ||
b477ba62 | 1766 | static void mlx4_en_clear_stats(struct net_device *dev) |
c27a02cd YP |
1767 | { |
1768 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1769 | struct mlx4_en_dev *mdev = priv->mdev; | |
1770 | int i; | |
c27a02cd | 1771 | |
c27a02cd | 1772 | if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) |
453a6082 | 1773 | en_dbg(HW, priv, "Failed dumping statistics\n"); |
c27a02cd YP |
1774 | |
1775 | memset(&priv->stats, 0, sizeof(priv->stats)); | |
1776 | memset(&priv->pstats, 0, sizeof(priv->pstats)); | |
b477ba62 EE |
1777 | memset(&priv->pkstats, 0, sizeof(priv->pkstats)); |
1778 | memset(&priv->port_stats, 0, sizeof(priv->port_stats)); | |
c27a02cd YP |
1779 | |
1780 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1781 | priv->tx_ring[i].bytes = 0; | |
1782 | priv->tx_ring[i].packets = 0; | |
b477ba62 | 1783 | priv->tx_ring[i].tx_csum = 0; |
c27a02cd YP |
1784 | } |
1785 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1786 | priv->rx_ring[i].bytes = 0; | |
1787 | priv->rx_ring[i].packets = 0; | |
b477ba62 EE |
1788 | priv->rx_ring[i].csum_ok = 0; |
1789 | priv->rx_ring[i].csum_none = 0; | |
c27a02cd | 1790 | } |
b477ba62 EE |
1791 | } |
1792 | ||
1793 | static int mlx4_en_open(struct net_device *dev) | |
1794 | { | |
1795 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1796 | struct mlx4_en_dev *mdev = priv->mdev; | |
1797 | int err = 0; | |
1798 | ||
1799 | mutex_lock(&mdev->state_lock); | |
1800 | ||
1801 | if (!mdev->device_up) { | |
1802 | en_err(priv, "Cannot open - device down/disabled\n"); | |
1803 | err = -EBUSY; | |
1804 | goto out; | |
1805 | } | |
1806 | ||
1807 | /* Reset HW statistics and SW counters */ | |
1808 | mlx4_en_clear_stats(dev); | |
c27a02cd | 1809 | |
c27a02cd YP |
1810 | err = mlx4_en_start_port(dev); |
1811 | if (err) | |
453a6082 | 1812 | en_err(priv, "Failed starting port:%d\n", priv->port); |
c27a02cd YP |
1813 | |
1814 | out: | |
1815 | mutex_unlock(&mdev->state_lock); | |
1816 | return err; | |
1817 | } | |
1818 | ||
1819 | ||
1820 | static int mlx4_en_close(struct net_device *dev) | |
1821 | { | |
1822 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1823 | struct mlx4_en_dev *mdev = priv->mdev; | |
1824 | ||
453a6082 | 1825 | en_dbg(IFDOWN, priv, "Close port called\n"); |
c27a02cd YP |
1826 | |
1827 | mutex_lock(&mdev->state_lock); | |
1828 | ||
3484aac1 | 1829 | mlx4_en_stop_port(dev, 0); |
c27a02cd YP |
1830 | netif_carrier_off(dev); |
1831 | ||
1832 | mutex_unlock(&mdev->state_lock); | |
1833 | return 0; | |
1834 | } | |
1835 | ||
fe0af03c | 1836 | void mlx4_en_free_resources(struct mlx4_en_priv *priv) |
c27a02cd YP |
1837 | { |
1838 | int i; | |
1839 | ||
1eb8c695 AV |
1840 | #ifdef CONFIG_RFS_ACCEL |
1841 | free_irq_cpu_rmap(priv->dev->rx_cpu_rmap); | |
1842 | priv->dev->rx_cpu_rmap = NULL; | |
1843 | #endif | |
1844 | ||
c27a02cd YP |
1845 | for (i = 0; i < priv->tx_ring_num; i++) { |
1846 | if (priv->tx_ring[i].tx_info) | |
1847 | mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); | |
1848 | if (priv->tx_cq[i].buf) | |
fe0af03c | 1849 | mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); |
c27a02cd YP |
1850 | } |
1851 | ||
1852 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1853 | if (priv->rx_ring[i].rx_info) | |
68355f71 TLSC |
1854 | mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], |
1855 | priv->prof->rx_ring_size, priv->stride); | |
c27a02cd | 1856 | if (priv->rx_cq[i].buf) |
fe0af03c | 1857 | mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); |
c27a02cd | 1858 | } |
044ca2a5 YP |
1859 | |
1860 | if (priv->base_tx_qpn) { | |
1861 | mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num); | |
1862 | priv->base_tx_qpn = 0; | |
1863 | } | |
c27a02cd YP |
1864 | } |
1865 | ||
18cc42a3 | 1866 | int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) |
c27a02cd | 1867 | { |
c27a02cd YP |
1868 | struct mlx4_en_port_profile *prof = priv->prof; |
1869 | int i; | |
044ca2a5 | 1870 | int err; |
87a5c389 | 1871 | |
044ca2a5 | 1872 | err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn); |
87a5c389 YP |
1873 | if (err) { |
1874 | en_err(priv, "failed reserving range for TX rings\n"); | |
1875 | return err; | |
1876 | } | |
c27a02cd YP |
1877 | |
1878 | /* Create tx Rings */ | |
1879 | for (i = 0; i < priv->tx_ring_num; i++) { | |
1880 | if (mlx4_en_create_cq(priv, &priv->tx_cq[i], | |
1881 | prof->tx_ring_size, i, TX)) | |
1882 | goto err; | |
1883 | ||
044ca2a5 | 1884 | if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i, |
c27a02cd YP |
1885 | prof->tx_ring_size, TXBB_SIZE)) |
1886 | goto err; | |
1887 | } | |
1888 | ||
1889 | /* Create rx Rings */ | |
1890 | for (i = 0; i < priv->rx_ring_num; i++) { | |
1891 | if (mlx4_en_create_cq(priv, &priv->rx_cq[i], | |
1892 | prof->rx_ring_size, i, RX)) | |
1893 | goto err; | |
1894 | ||
1895 | if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], | |
1896 | prof->rx_ring_size, priv->stride)) | |
1897 | goto err; | |
1898 | } | |
1899 | ||
1eb8c695 | 1900 | #ifdef CONFIG_RFS_ACCEL |
a229e488 AV |
1901 | if (priv->mdev->dev->caps.comp_pool) { |
1902 | priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool); | |
1903 | if (!priv->dev->rx_cpu_rmap) | |
1904 | goto err; | |
1905 | } | |
1eb8c695 AV |
1906 | #endif |
1907 | ||
c27a02cd YP |
1908 | return 0; |
1909 | ||
1910 | err: | |
453a6082 | 1911 | en_err(priv, "Failed to allocate NIC resources\n"); |
c27a02cd YP |
1912 | return -ENOMEM; |
1913 | } | |
1914 | ||
1915 | ||
1916 | void mlx4_en_destroy_netdev(struct net_device *dev) | |
1917 | { | |
1918 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1919 | struct mlx4_en_dev *mdev = priv->mdev; | |
1920 | ||
453a6082 | 1921 | en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); |
c27a02cd YP |
1922 | |
1923 | /* Unregister device - this will close the port if it was up */ | |
1924 | if (priv->registered) | |
1925 | unregister_netdev(dev); | |
1926 | ||
1927 | if (priv->allocated) | |
1928 | mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); | |
1929 | ||
1930 | cancel_delayed_work(&priv->stats_task); | |
b6c39bfc | 1931 | cancel_delayed_work(&priv->service_task); |
c27a02cd YP |
1932 | /* flush any pending task for this netdev */ |
1933 | flush_workqueue(mdev->workqueue); | |
1934 | ||
1935 | /* Detach the netdev so tasks would not attempt to access it */ | |
1936 | mutex_lock(&mdev->state_lock); | |
1937 | mdev->pndev[priv->port] = NULL; | |
1938 | mutex_unlock(&mdev->state_lock); | |
1939 | ||
fe0af03c | 1940 | mlx4_en_free_resources(priv); |
564c274c | 1941 | |
bc6a4744 AV |
1942 | kfree(priv->tx_ring); |
1943 | kfree(priv->tx_cq); | |
1944 | ||
c27a02cd YP |
1945 | free_netdev(dev); |
1946 | } | |
1947 | ||
1948 | static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) | |
1949 | { | |
1950 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1951 | struct mlx4_en_dev *mdev = priv->mdev; | |
1952 | int err = 0; | |
1953 | ||
453a6082 | 1954 | en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", |
c27a02cd YP |
1955 | dev->mtu, new_mtu); |
1956 | ||
1957 | if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { | |
453a6082 | 1958 | en_err(priv, "Bad MTU size:%d.\n", new_mtu); |
c27a02cd YP |
1959 | return -EPERM; |
1960 | } | |
1961 | dev->mtu = new_mtu; | |
1962 | ||
1963 | if (netif_running(dev)) { | |
1964 | mutex_lock(&mdev->state_lock); | |
1965 | if (!mdev->device_up) { | |
1966 | /* NIC is probably restarting - let watchdog task reset | |
1967 | * the port */ | |
453a6082 | 1968 | en_dbg(DRV, priv, "Change MTU called with card down!?\n"); |
c27a02cd | 1969 | } else { |
3484aac1 | 1970 | mlx4_en_stop_port(dev, 1); |
c27a02cd YP |
1971 | err = mlx4_en_start_port(dev); |
1972 | if (err) { | |
453a6082 | 1973 | en_err(priv, "Failed restarting port:%d\n", |
c27a02cd YP |
1974 | priv->port); |
1975 | queue_work(mdev->workqueue, &priv->watchdog_task); | |
1976 | } | |
1977 | } | |
1978 | mutex_unlock(&mdev->state_lock); | |
1979 | } | |
1980 | return 0; | |
1981 | } | |
1982 | ||
ec693d47 AV |
1983 | static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) |
1984 | { | |
1985 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1986 | struct mlx4_en_dev *mdev = priv->mdev; | |
1987 | struct hwtstamp_config config; | |
1988 | ||
1989 | if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) | |
1990 | return -EFAULT; | |
1991 | ||
1992 | /* reserved for future extensions */ | |
1993 | if (config.flags) | |
1994 | return -EINVAL; | |
1995 | ||
1996 | /* device doesn't support time stamping */ | |
1997 | if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)) | |
1998 | return -EINVAL; | |
1999 | ||
2000 | /* TX HW timestamp */ | |
2001 | switch (config.tx_type) { | |
2002 | case HWTSTAMP_TX_OFF: | |
2003 | case HWTSTAMP_TX_ON: | |
2004 | break; | |
2005 | default: | |
2006 | return -ERANGE; | |
2007 | } | |
2008 | ||
2009 | /* RX HW timestamp */ | |
2010 | switch (config.rx_filter) { | |
2011 | case HWTSTAMP_FILTER_NONE: | |
2012 | break; | |
2013 | case HWTSTAMP_FILTER_ALL: | |
2014 | case HWTSTAMP_FILTER_SOME: | |
2015 | case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: | |
2016 | case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: | |
2017 | case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: | |
2018 | case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: | |
2019 | case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: | |
2020 | case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: | |
2021 | case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: | |
2022 | case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: | |
2023 | case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: | |
2024 | case HWTSTAMP_FILTER_PTP_V2_EVENT: | |
2025 | case HWTSTAMP_FILTER_PTP_V2_SYNC: | |
2026 | case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: | |
2027 | config.rx_filter = HWTSTAMP_FILTER_ALL; | |
2028 | break; | |
2029 | default: | |
2030 | return -ERANGE; | |
2031 | } | |
2032 | ||
2033 | if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) { | |
2034 | config.tx_type = HWTSTAMP_TX_OFF; | |
2035 | config.rx_filter = HWTSTAMP_FILTER_NONE; | |
2036 | } | |
2037 | ||
2038 | return copy_to_user(ifr->ifr_data, &config, | |
2039 | sizeof(config)) ? -EFAULT : 0; | |
2040 | } | |
2041 | ||
2042 | static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |
2043 | { | |
2044 | switch (cmd) { | |
2045 | case SIOCSHWTSTAMP: | |
2046 | return mlx4_en_hwtstamp_ioctl(dev, ifr); | |
2047 | default: | |
2048 | return -EOPNOTSUPP; | |
2049 | } | |
2050 | } | |
2051 | ||
60d6fe99 AV |
2052 | static int mlx4_en_set_features(struct net_device *netdev, |
2053 | netdev_features_t features) | |
2054 | { | |
2055 | struct mlx4_en_priv *priv = netdev_priv(netdev); | |
2056 | ||
2057 | if (features & NETIF_F_LOOPBACK) | |
2058 | priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK); | |
2059 | else | |
2060 | priv->ctrl_flags &= | |
2061 | cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK); | |
2062 | ||
79aeaccd YB |
2063 | mlx4_en_update_loopback_state(netdev, features); |
2064 | ||
60d6fe99 AV |
2065 | return 0; |
2066 | ||
2067 | } | |
2068 | ||
8f7ba3ca RE |
2069 | static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac) |
2070 | { | |
2071 | struct mlx4_en_priv *en_priv = netdev_priv(dev); | |
2072 | struct mlx4_en_dev *mdev = en_priv->mdev; | |
2073 | u64 mac_u64 = mlx4_en_mac_to_u64(mac); | |
2074 | ||
2075 | if (!is_valid_ether_addr(mac)) | |
2076 | return -EINVAL; | |
2077 | ||
2078 | return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64); | |
2079 | } | |
2080 | ||
3f7fb021 RE |
2081 | static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos) |
2082 | { | |
2083 | struct mlx4_en_priv *en_priv = netdev_priv(dev); | |
2084 | struct mlx4_en_dev *mdev = en_priv->mdev; | |
2085 | ||
2086 | return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos); | |
2087 | } | |
2088 | ||
e6b6a231 RE |
2089 | static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting) |
2090 | { | |
2091 | struct mlx4_en_priv *en_priv = netdev_priv(dev); | |
2092 | struct mlx4_en_dev *mdev = en_priv->mdev; | |
2093 | ||
2094 | return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting); | |
2095 | } | |
2096 | ||
2cccb9e4 RE |
2097 | static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf) |
2098 | { | |
2099 | struct mlx4_en_priv *en_priv = netdev_priv(dev); | |
2100 | struct mlx4_en_dev *mdev = en_priv->mdev; | |
2101 | ||
2102 | return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf); | |
2103 | } | |
8f7ba3ca | 2104 | |
948e306d RE |
2105 | static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state) |
2106 | { | |
2107 | struct mlx4_en_priv *en_priv = netdev_priv(dev); | |
2108 | struct mlx4_en_dev *mdev = en_priv->mdev; | |
2109 | ||
2110 | return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state); | |
2111 | } | |
3addc568 SH |
2112 | static const struct net_device_ops mlx4_netdev_ops = { |
2113 | .ndo_open = mlx4_en_open, | |
2114 | .ndo_stop = mlx4_en_close, | |
2115 | .ndo_start_xmit = mlx4_en_xmit, | |
f813cad8 | 2116 | .ndo_select_queue = mlx4_en_select_queue, |
3addc568 | 2117 | .ndo_get_stats = mlx4_en_get_stats, |
0eb74fdd | 2118 | .ndo_set_rx_mode = mlx4_en_set_rx_mode, |
3addc568 | 2119 | .ndo_set_mac_address = mlx4_en_set_mac, |
52255bbe | 2120 | .ndo_validate_addr = eth_validate_addr, |
3addc568 | 2121 | .ndo_change_mtu = mlx4_en_change_mtu, |
ec693d47 | 2122 | .ndo_do_ioctl = mlx4_en_ioctl, |
3addc568 | 2123 | .ndo_tx_timeout = mlx4_en_tx_timeout, |
3addc568 SH |
2124 | .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, |
2125 | .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, | |
2126 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
2127 | .ndo_poll_controller = mlx4_en_netpoll, | |
2128 | #endif | |
60d6fe99 | 2129 | .ndo_set_features = mlx4_en_set_features, |
897d7846 | 2130 | .ndo_setup_tc = mlx4_en_setup_tc, |
1eb8c695 AV |
2131 | #ifdef CONFIG_RFS_ACCEL |
2132 | .ndo_rx_flow_steer = mlx4_en_filter_rfs, | |
2133 | #endif | |
9e77a2b8 AV |
2134 | #ifdef CONFIG_NET_LL_RX_POLL |
2135 | .ndo_ll_poll = mlx4_en_low_latency_recv, | |
2136 | #endif | |
3addc568 SH |
2137 | }; |
2138 | ||
8f7ba3ca RE |
2139 | static const struct net_device_ops mlx4_netdev_ops_master = { |
2140 | .ndo_open = mlx4_en_open, | |
2141 | .ndo_stop = mlx4_en_close, | |
2142 | .ndo_start_xmit = mlx4_en_xmit, | |
2143 | .ndo_select_queue = mlx4_en_select_queue, | |
2144 | .ndo_get_stats = mlx4_en_get_stats, | |
2145 | .ndo_set_rx_mode = mlx4_en_set_rx_mode, | |
2146 | .ndo_set_mac_address = mlx4_en_set_mac, | |
2147 | .ndo_validate_addr = eth_validate_addr, | |
2148 | .ndo_change_mtu = mlx4_en_change_mtu, | |
2149 | .ndo_tx_timeout = mlx4_en_tx_timeout, | |
2150 | .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, | |
2151 | .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, | |
2152 | .ndo_set_vf_mac = mlx4_en_set_vf_mac, | |
3f7fb021 | 2153 | .ndo_set_vf_vlan = mlx4_en_set_vf_vlan, |
e6b6a231 | 2154 | .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk, |
948e306d | 2155 | .ndo_set_vf_link_state = mlx4_en_set_vf_link_state, |
2cccb9e4 | 2156 | .ndo_get_vf_config = mlx4_en_get_vf_config, |
8f7ba3ca RE |
2157 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2158 | .ndo_poll_controller = mlx4_en_netpoll, | |
2159 | #endif | |
2160 | .ndo_set_features = mlx4_en_set_features, | |
2161 | .ndo_setup_tc = mlx4_en_setup_tc, | |
2162 | #ifdef CONFIG_RFS_ACCEL | |
2163 | .ndo_rx_flow_steer = mlx4_en_filter_rfs, | |
2164 | #endif | |
2165 | }; | |
2166 | ||
c27a02cd YP |
2167 | int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, |
2168 | struct mlx4_en_port_profile *prof) | |
2169 | { | |
2170 | struct net_device *dev; | |
2171 | struct mlx4_en_priv *priv; | |
c07cb4b0 | 2172 | int i; |
c27a02cd | 2173 | int err; |
ef96f7d4 | 2174 | u64 mac_u64; |
c27a02cd | 2175 | |
f1593d22 | 2176 | dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), |
d317966b | 2177 | MAX_TX_RINGS, MAX_RX_RINGS); |
41de8d4c | 2178 | if (dev == NULL) |
c27a02cd | 2179 | return -ENOMEM; |
c27a02cd | 2180 | |
d317966b AV |
2181 | netif_set_real_num_tx_queues(dev, prof->tx_ring_num); |
2182 | netif_set_real_num_rx_queues(dev, prof->rx_ring_num); | |
2183 | ||
c27a02cd | 2184 | SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); |
741a00be | 2185 | dev->dev_id = port - 1; |
c27a02cd YP |
2186 | |
2187 | /* | |
2188 | * Initialize driver private data | |
2189 | */ | |
2190 | ||
2191 | priv = netdev_priv(dev); | |
2192 | memset(priv, 0, sizeof(struct mlx4_en_priv)); | |
2193 | priv->dev = dev; | |
2194 | priv->mdev = mdev; | |
ebf8c9aa | 2195 | priv->ddev = &mdev->pdev->dev; |
c27a02cd YP |
2196 | priv->prof = prof; |
2197 | priv->port = port; | |
2198 | priv->port_up = false; | |
c27a02cd | 2199 | priv->flags = prof->flags; |
60d6fe99 AV |
2200 | priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | |
2201 | MLX4_WQE_CTRL_SOLICITED); | |
d317966b | 2202 | priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up; |
c27a02cd | 2203 | priv->tx_ring_num = prof->tx_ring_num; |
d317966b AV |
2204 | |
2205 | priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS, | |
2206 | GFP_KERNEL); | |
bc6a4744 AV |
2207 | if (!priv->tx_ring) { |
2208 | err = -ENOMEM; | |
2209 | goto out; | |
2210 | } | |
427a9625 | 2211 | priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS, |
d317966b | 2212 | GFP_KERNEL); |
bc6a4744 AV |
2213 | if (!priv->tx_cq) { |
2214 | err = -ENOMEM; | |
2215 | goto out; | |
2216 | } | |
c27a02cd | 2217 | priv->rx_ring_num = prof->rx_ring_num; |
08ff3235 | 2218 | priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0; |
c27a02cd YP |
2219 | priv->mac_index = -1; |
2220 | priv->msg_enable = MLX4_EN_MSG_LEVEL; | |
2221 | spin_lock_init(&priv->stats_lock); | |
0eb74fdd | 2222 | INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode); |
c27a02cd YP |
2223 | INIT_WORK(&priv->watchdog_task, mlx4_en_restart); |
2224 | INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); | |
2225 | INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); | |
b6c39bfc | 2226 | INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task); |
564c274c | 2227 | #ifdef CONFIG_MLX4_EN_DCB |
540b3a39 OG |
2228 | if (!mlx4_is_slave(priv->mdev->dev)) { |
2229 | if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { | |
2230 | dev->dcbnl_ops = &mlx4_en_dcbnl_ops; | |
2231 | } else { | |
2232 | en_info(priv, "enabling only PFC DCB ops\n"); | |
2233 | dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops; | |
2234 | } | |
2235 | } | |
564c274c | 2236 | #endif |
c27a02cd | 2237 | |
c07cb4b0 YB |
2238 | for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) |
2239 | INIT_HLIST_HEAD(&priv->mac_hash[i]); | |
16a10ffd | 2240 | |
c27a02cd YP |
2241 | /* Query for default mac and max mtu */ |
2242 | priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; | |
6bbb6d99 YB |
2243 | |
2244 | /* Set default MAC */ | |
2245 | dev->addr_len = ETH_ALEN; | |
2246 | mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]); | |
2247 | if (!is_valid_ether_addr(dev->dev_addr)) { | |
ef96f7d4 OG |
2248 | if (mlx4_is_slave(priv->mdev->dev)) { |
2249 | eth_hw_addr_random(dev); | |
2250 | en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr); | |
2251 | mac_u64 = mlx4_en_mac_to_u64(dev->dev_addr); | |
2252 | mdev->dev->caps.def_mac[priv->port] = mac_u64; | |
2253 | } else { | |
2254 | en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n", | |
2255 | priv->port, dev->dev_addr); | |
2256 | err = -EINVAL; | |
2257 | goto out; | |
2258 | } | |
c27a02cd YP |
2259 | } |
2260 | ||
6bbb6d99 YB |
2261 | memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac)); |
2262 | ||
c27a02cd YP |
2263 | priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + |
2264 | DS_SIZE * MLX4_EN_MAX_RX_FRAGS); | |
2265 | err = mlx4_en_alloc_resources(priv); | |
2266 | if (err) | |
2267 | goto out; | |
2268 | ||
78fb2de7 AV |
2269 | #ifdef CONFIG_RFS_ACCEL |
2270 | INIT_LIST_HEAD(&priv->filters); | |
2271 | spin_lock_init(&priv->filters_lock); | |
2272 | #endif | |
2273 | ||
ec693d47 AV |
2274 | /* Initialize time stamping config */ |
2275 | priv->hwtstamp_config.flags = 0; | |
2276 | priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF; | |
2277 | priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; | |
2278 | ||
c27a02cd YP |
2279 | /* Allocate page for receive rings */ |
2280 | err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, | |
2281 | MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); | |
2282 | if (err) { | |
453a6082 | 2283 | en_err(priv, "Failed to allocate page for rx qps\n"); |
c27a02cd YP |
2284 | goto out; |
2285 | } | |
2286 | priv->allocated = 1; | |
2287 | ||
c27a02cd YP |
2288 | /* |
2289 | * Initialize netdev entry points | |
2290 | */ | |
8f7ba3ca RE |
2291 | if (mlx4_is_master(priv->mdev->dev)) |
2292 | dev->netdev_ops = &mlx4_netdev_ops_master; | |
2293 | else | |
2294 | dev->netdev_ops = &mlx4_netdev_ops; | |
c27a02cd | 2295 | dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; |
1eb63a28 BH |
2296 | netif_set_real_num_tx_queues(dev, priv->tx_ring_num); |
2297 | netif_set_real_num_rx_queues(dev, priv->rx_ring_num); | |
3addc568 | 2298 | |
c27a02cd YP |
2299 | SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); |
2300 | ||
c27a02cd YP |
2301 | /* |
2302 | * Set driver features | |
2303 | */ | |
c8c64cff MM |
2304 | dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
2305 | if (mdev->LSO_support) | |
2306 | dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; | |
2307 | ||
2308 | dev->vlan_features = dev->hw_features; | |
2309 | ||
ad86107f | 2310 | dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; |
c8c64cff | 2311 | dev->features = dev->hw_features | NETIF_F_HIGHDMA | |
f646968f PM |
2312 | NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX | |
2313 | NETIF_F_HW_VLAN_CTAG_FILTER; | |
60d6fe99 | 2314 | dev->hw_features |= NETIF_F_LOOPBACK; |
c27a02cd | 2315 | |
1eb8c695 AV |
2316 | if (mdev->dev->caps.steering_mode == |
2317 | MLX4_STEERING_MODE_DEVICE_MANAGED) | |
2318 | dev->hw_features |= NETIF_F_NTUPLE; | |
2319 | ||
cc5387f7 YB |
2320 | if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0) |
2321 | dev->priv_flags |= IFF_UNICAST_FLT; | |
2322 | ||
c27a02cd YP |
2323 | mdev->pndev[port] = dev; |
2324 | ||
2325 | netif_carrier_off(dev); | |
4801ae70 EE |
2326 | mlx4_en_set_default_moderation(priv); |
2327 | ||
c27a02cd YP |
2328 | err = register_netdev(dev); |
2329 | if (err) { | |
453a6082 | 2330 | en_err(priv, "Netdev registration failed for port %d\n", port); |
c27a02cd YP |
2331 | goto out; |
2332 | } | |
4234144f | 2333 | priv->registered = 1; |
453a6082 YP |
2334 | |
2335 | en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num); | |
2336 | en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); | |
2337 | ||
79aeaccd YB |
2338 | mlx4_en_update_loopback_state(priv->dev, priv->dev->features); |
2339 | ||
90822265 | 2340 | /* Configure port */ |
5c8e9046 | 2341 | mlx4_en_calc_rx_buf(dev); |
90822265 | 2342 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, |
5c8e9046 YP |
2343 | priv->rx_skb_size + ETH_FCS_LEN, |
2344 | prof->tx_pause, prof->tx_ppp, | |
2345 | prof->rx_pause, prof->rx_ppp); | |
90822265 YP |
2346 | if (err) { |
2347 | en_err(priv, "Failed setting port general configurations " | |
2348 | "for port %d, with error %d\n", priv->port, err); | |
2349 | goto out; | |
2350 | } | |
2351 | ||
2352 | /* Init port */ | |
2353 | en_warn(priv, "Initializing port\n"); | |
2354 | err = mlx4_INIT_PORT(mdev->dev, priv->port); | |
2355 | if (err) { | |
2356 | en_err(priv, "Failed Initializing port\n"); | |
2357 | goto out; | |
2358 | } | |
c27a02cd | 2359 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); |
dc8142ea AV |
2360 | |
2361 | if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) | |
2362 | queue_delayed_work(mdev->workqueue, &priv->service_task, | |
2363 | SERVICE_TASK_DELAY); | |
2364 | ||
c27a02cd YP |
2365 | return 0; |
2366 | ||
2367 | out: | |
2368 | mlx4_en_destroy_netdev(dev); | |
2369 | return err; | |
2370 | } | |
2371 |