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c27a02cd YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/tcp.h> | |
36 | #include <linux/if_vlan.h> | |
37 | #include <linux/delay.h> | |
5a0e3ad6 | 38 | #include <linux/slab.h> |
c27a02cd YP |
39 | |
40 | #include <linux/mlx4/driver.h> | |
41 | #include <linux/mlx4/device.h> | |
42 | #include <linux/mlx4/cmd.h> | |
43 | #include <linux/mlx4/cq.h> | |
44 | ||
45 | #include "mlx4_en.h" | |
46 | #include "en_port.h" | |
47 | ||
897d7846 AV |
48 | static int mlx4_en_setup_tc(struct net_device *dev, u8 up) |
49 | { | |
bc6a4744 AV |
50 | struct mlx4_en_priv *priv = netdev_priv(dev); |
51 | int i; | |
52 | unsigned int q, offset = 0; | |
53 | ||
54 | if (up && up != MLX4_EN_NUM_UP) | |
897d7846 AV |
55 | return -EINVAL; |
56 | ||
bc6a4744 AV |
57 | netdev_set_num_tc(dev, up); |
58 | ||
59 | /* Partition Tx queues evenly amongst UP's */ | |
60 | q = priv->tx_ring_num / up; | |
61 | for (i = 0; i < up; i++) { | |
62 | netdev_set_tc_queue(dev, i, q, offset); | |
63 | offset += q; | |
64 | } | |
65 | ||
897d7846 AV |
66 | return 0; |
67 | } | |
68 | ||
8e586137 | 69 | static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid) |
c27a02cd YP |
70 | { |
71 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
72 | struct mlx4_en_dev *mdev = priv->mdev; | |
73 | int err; | |
4c3eb3ca | 74 | int idx; |
c27a02cd | 75 | |
f1b553fb | 76 | en_dbg(HW, priv, "adding VLAN:%d\n", vid); |
c27a02cd | 77 | |
f1b553fb | 78 | set_bit(vid, priv->active_vlans); |
c27a02cd YP |
79 | |
80 | /* Add VID to port VLAN filter */ | |
81 | mutex_lock(&mdev->state_lock); | |
82 | if (mdev->device_up && priv->port_up) { | |
f1b553fb | 83 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 84 | if (err) |
453a6082 | 85 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd | 86 | } |
4c3eb3ca EC |
87 | if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx)) |
88 | en_err(priv, "failed adding vlan %d\n", vid); | |
c27a02cd | 89 | mutex_unlock(&mdev->state_lock); |
4c3eb3ca | 90 | |
8e586137 | 91 | return 0; |
c27a02cd YP |
92 | } |
93 | ||
8e586137 | 94 | static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) |
c27a02cd YP |
95 | { |
96 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
97 | struct mlx4_en_dev *mdev = priv->mdev; | |
98 | int err; | |
4c3eb3ca | 99 | int idx; |
c27a02cd | 100 | |
f1b553fb | 101 | en_dbg(HW, priv, "Killing VID:%d\n", vid); |
c27a02cd | 102 | |
f1b553fb | 103 | clear_bit(vid, priv->active_vlans); |
c27a02cd YP |
104 | |
105 | /* Remove VID from port VLAN filter */ | |
106 | mutex_lock(&mdev->state_lock); | |
4c3eb3ca EC |
107 | if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx)) |
108 | mlx4_unregister_vlan(mdev->dev, priv->port, idx); | |
109 | else | |
110 | en_err(priv, "could not find vid %d in cache\n", vid); | |
111 | ||
c27a02cd | 112 | if (mdev->device_up && priv->port_up) { |
f1b553fb | 113 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 114 | if (err) |
453a6082 | 115 | en_err(priv, "Failed configuring VLAN filter\n"); |
c27a02cd YP |
116 | } |
117 | mutex_unlock(&mdev->state_lock); | |
8e586137 JP |
118 | |
119 | return 0; | |
c27a02cd YP |
120 | } |
121 | ||
e7c1c2c4 | 122 | u64 mlx4_en_mac_to_u64(u8 *addr) |
c27a02cd YP |
123 | { |
124 | u64 mac = 0; | |
125 | int i; | |
126 | ||
127 | for (i = 0; i < ETH_ALEN; i++) { | |
128 | mac <<= 8; | |
129 | mac |= addr[i]; | |
130 | } | |
131 | return mac; | |
132 | } | |
133 | ||
134 | static int mlx4_en_set_mac(struct net_device *dev, void *addr) | |
135 | { | |
136 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
137 | struct mlx4_en_dev *mdev = priv->mdev; | |
138 | struct sockaddr *saddr = addr; | |
139 | ||
140 | if (!is_valid_ether_addr(saddr->sa_data)) | |
141 | return -EADDRNOTAVAIL; | |
142 | ||
143 | memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN); | |
144 | priv->mac = mlx4_en_mac_to_u64(dev->dev_addr); | |
145 | queue_work(mdev->workqueue, &priv->mac_task); | |
146 | return 0; | |
147 | } | |
148 | ||
149 | static void mlx4_en_do_set_mac(struct work_struct *work) | |
150 | { | |
151 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
152 | mac_task); | |
153 | struct mlx4_en_dev *mdev = priv->mdev; | |
154 | int err = 0; | |
155 | ||
156 | mutex_lock(&mdev->state_lock); | |
157 | if (priv->port_up) { | |
158 | /* Remove old MAC and insert the new one */ | |
1679200f | 159 | err = mlx4_replace_mac(mdev->dev, priv->port, |
ffe455ad | 160 | priv->base_qpn, priv->mac); |
c27a02cd | 161 | if (err) |
453a6082 | 162 | en_err(priv, "Failed changing HW MAC address\n"); |
c27a02cd | 163 | } else |
453a6082 YP |
164 | en_dbg(HW, priv, "Port is down while " |
165 | "registering mac, exiting...\n"); | |
c27a02cd YP |
166 | |
167 | mutex_unlock(&mdev->state_lock); | |
168 | } | |
169 | ||
170 | static void mlx4_en_clear_list(struct net_device *dev) | |
171 | { | |
172 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
c27a02cd | 173 | |
ff6e2163 | 174 | kfree(priv->mc_addrs); |
0e03567a | 175 | priv->mc_addrs = NULL; |
ff6e2163 | 176 | priv->mc_addrs_cnt = 0; |
c27a02cd YP |
177 | } |
178 | ||
179 | static void mlx4_en_cache_mclist(struct net_device *dev) | |
180 | { | |
181 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
22bedad3 | 182 | struct netdev_hw_addr *ha; |
ff6e2163 JP |
183 | char *mc_addrs; |
184 | int mc_addrs_cnt = netdev_mc_count(dev); | |
185 | int i; | |
186 | ||
187 | mc_addrs = kmalloc(mc_addrs_cnt * ETH_ALEN, GFP_ATOMIC); | |
188 | if (!mc_addrs) { | |
189 | en_err(priv, "failed to allocate multicast list\n"); | |
190 | return; | |
c27a02cd | 191 | } |
ff6e2163 | 192 | i = 0; |
22bedad3 JP |
193 | netdev_for_each_mc_addr(ha, dev) |
194 | memcpy(mc_addrs + i++ * ETH_ALEN, ha->addr, ETH_ALEN); | |
0e03567a | 195 | mlx4_en_clear_list(dev); |
ff6e2163 JP |
196 | priv->mc_addrs = mc_addrs; |
197 | priv->mc_addrs_cnt = mc_addrs_cnt; | |
c27a02cd YP |
198 | } |
199 | ||
200 | ||
201 | static void mlx4_en_set_multicast(struct net_device *dev) | |
202 | { | |
203 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
204 | ||
205 | if (!priv->port_up) | |
206 | return; | |
207 | ||
208 | queue_work(priv->mdev->workqueue, &priv->mcast_task); | |
209 | } | |
210 | ||
211 | static void mlx4_en_do_set_multicast(struct work_struct *work) | |
212 | { | |
213 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
214 | mcast_task); | |
215 | struct mlx4_en_dev *mdev = priv->mdev; | |
216 | struct net_device *dev = priv->dev; | |
c27a02cd | 217 | u64 mcast_addr = 0; |
1679200f | 218 | u8 mc_list[16] = {0}; |
c27a02cd YP |
219 | int err; |
220 | ||
221 | mutex_lock(&mdev->state_lock); | |
222 | if (!mdev->device_up) { | |
453a6082 YP |
223 | en_dbg(HW, priv, "Card is not up, " |
224 | "ignoring multicast change.\n"); | |
c27a02cd YP |
225 | goto out; |
226 | } | |
227 | if (!priv->port_up) { | |
453a6082 YP |
228 | en_dbg(HW, priv, "Port is down, " |
229 | "ignoring multicast change.\n"); | |
c27a02cd YP |
230 | goto out; |
231 | } | |
232 | ||
ffe455ad EE |
233 | if (!netif_carrier_ok(dev)) { |
234 | if (!mlx4_en_QUERY_PORT(mdev, priv->port)) { | |
235 | if (priv->port_state.link_state) { | |
236 | priv->last_link_state = MLX4_DEV_EVENT_PORT_UP; | |
237 | netif_carrier_on(dev); | |
238 | en_dbg(LINK, priv, "Link Up\n"); | |
239 | } | |
240 | } | |
241 | } | |
242 | ||
c27a02cd YP |
243 | /* |
244 | * Promsicuous mode: disable all filters | |
245 | */ | |
246 | ||
247 | if (dev->flags & IFF_PROMISC) { | |
248 | if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) { | |
249 | if (netif_msg_rx_status(priv)) | |
453a6082 | 250 | en_warn(priv, "Entering promiscuous mode\n"); |
c27a02cd YP |
251 | priv->flags |= MLX4_EN_FLAG_PROMISC; |
252 | ||
253 | /* Enable promiscouos mode */ | |
ccf86321 OG |
254 | if (!(mdev->dev->caps.flags & |
255 | MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) | |
1679200f YP |
256 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, |
257 | priv->base_qpn, 1); | |
258 | else | |
259 | err = mlx4_unicast_promisc_add(mdev->dev, priv->base_qpn, | |
260 | priv->port); | |
c27a02cd | 261 | if (err) |
453a6082 | 262 | en_err(priv, "Failed enabling " |
25985edc | 263 | "promiscuous mode\n"); |
c27a02cd YP |
264 | |
265 | /* Disable port multicast filter (unconditionally) */ | |
266 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
267 | 0, MLX4_MCAST_DISABLE); | |
268 | if (err) | |
453a6082 YP |
269 | en_err(priv, "Failed disabling " |
270 | "multicast filter\n"); | |
c27a02cd | 271 | |
1679200f YP |
272 | /* Add the default qp number as multicast promisc */ |
273 | if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { | |
274 | err = mlx4_multicast_promisc_add(mdev->dev, priv->base_qpn, | |
275 | priv->port); | |
276 | if (err) | |
277 | en_err(priv, "Failed entering multicast promisc mode\n"); | |
278 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
279 | } | |
280 | ||
f1b553fb JP |
281 | /* Disable port VLAN filter */ |
282 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); | |
283 | if (err) | |
284 | en_err(priv, "Failed disabling VLAN filter\n"); | |
c27a02cd YP |
285 | } |
286 | goto out; | |
287 | } | |
288 | ||
289 | /* | |
25985edc | 290 | * Not in promiscuous mode |
c27a02cd YP |
291 | */ |
292 | ||
293 | if (priv->flags & MLX4_EN_FLAG_PROMISC) { | |
294 | if (netif_msg_rx_status(priv)) | |
453a6082 | 295 | en_warn(priv, "Leaving promiscuous mode\n"); |
c27a02cd YP |
296 | priv->flags &= ~MLX4_EN_FLAG_PROMISC; |
297 | ||
298 | /* Disable promiscouos mode */ | |
ccf86321 | 299 | if (!(mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER)) |
1679200f YP |
300 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, |
301 | priv->base_qpn, 0); | |
302 | else | |
303 | err = mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn, | |
304 | priv->port); | |
c27a02cd | 305 | if (err) |
25985edc | 306 | en_err(priv, "Failed disabling promiscuous mode\n"); |
c27a02cd | 307 | |
1679200f YP |
308 | /* Disable Multicast promisc */ |
309 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
310 | err = mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, | |
311 | priv->port); | |
312 | if (err) | |
25985edc | 313 | en_err(priv, "Failed disabling multicast promiscuous mode\n"); |
1679200f YP |
314 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; |
315 | } | |
316 | ||
c27a02cd | 317 | /* Enable port VLAN filter */ |
f1b553fb | 318 | err = mlx4_SET_VLAN_FLTR(mdev->dev, priv); |
c27a02cd | 319 | if (err) |
453a6082 | 320 | en_err(priv, "Failed enabling VLAN filter\n"); |
c27a02cd YP |
321 | } |
322 | ||
323 | /* Enable/disable the multicast filter according to IFF_ALLMULTI */ | |
324 | if (dev->flags & IFF_ALLMULTI) { | |
325 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
326 | 0, MLX4_MCAST_DISABLE); | |
327 | if (err) | |
453a6082 | 328 | en_err(priv, "Failed disabling multicast filter\n"); |
1679200f YP |
329 | |
330 | /* Add the default qp number as multicast promisc */ | |
331 | if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) { | |
332 | err = mlx4_multicast_promisc_add(mdev->dev, priv->base_qpn, | |
333 | priv->port); | |
334 | if (err) | |
335 | en_err(priv, "Failed entering multicast promisc mode\n"); | |
336 | priv->flags |= MLX4_EN_FLAG_MC_PROMISC; | |
337 | } | |
c27a02cd | 338 | } else { |
ff6e2163 | 339 | int i; |
1679200f YP |
340 | /* Disable Multicast promisc */ |
341 | if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) { | |
342 | err = mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn, | |
343 | priv->port); | |
344 | if (err) | |
25985edc | 345 | en_err(priv, "Failed disabling multicast promiscuous mode\n"); |
1679200f YP |
346 | priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC; |
347 | } | |
ff6e2163 | 348 | |
c27a02cd YP |
349 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, |
350 | 0, MLX4_MCAST_DISABLE); | |
351 | if (err) | |
453a6082 | 352 | en_err(priv, "Failed disabling multicast filter\n"); |
c27a02cd | 353 | |
1679200f YP |
354 | /* Detach our qp from all the multicast addresses */ |
355 | for (i = 0; i < priv->mc_addrs_cnt; i++) { | |
356 | memcpy(&mc_list[10], priv->mc_addrs + i * ETH_ALEN, ETH_ALEN); | |
357 | mc_list[5] = priv->port; | |
358 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, | |
359 | mc_list, MLX4_PROT_ETH); | |
360 | } | |
c27a02cd YP |
361 | /* Flush mcast filter and init it with broadcast address */ |
362 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST, | |
363 | 1, MLX4_MCAST_CONFIG); | |
364 | ||
365 | /* Update multicast list - we cache all addresses so they won't | |
366 | * change while HW is updated holding the command semaphor */ | |
367 | netif_tx_lock_bh(dev); | |
368 | mlx4_en_cache_mclist(dev); | |
369 | netif_tx_unlock_bh(dev); | |
ff6e2163 JP |
370 | for (i = 0; i < priv->mc_addrs_cnt; i++) { |
371 | mcast_addr = | |
372 | mlx4_en_mac_to_u64(priv->mc_addrs + i * ETH_ALEN); | |
1679200f YP |
373 | memcpy(&mc_list[10], priv->mc_addrs + i * ETH_ALEN, ETH_ALEN); |
374 | mc_list[5] = priv->port; | |
375 | mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, | |
376 | mc_list, 0, MLX4_PROT_ETH); | |
c27a02cd YP |
377 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, |
378 | mcast_addr, 0, MLX4_MCAST_CONFIG); | |
379 | } | |
380 | err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, | |
381 | 0, MLX4_MCAST_ENABLE); | |
382 | if (err) | |
453a6082 | 383 | en_err(priv, "Failed enabling multicast filter\n"); |
c27a02cd YP |
384 | } |
385 | out: | |
386 | mutex_unlock(&mdev->state_lock); | |
387 | } | |
388 | ||
389 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
390 | static void mlx4_en_netpoll(struct net_device *dev) | |
391 | { | |
392 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
393 | struct mlx4_en_cq *cq; | |
394 | unsigned long flags; | |
395 | int i; | |
396 | ||
397 | for (i = 0; i < priv->rx_ring_num; i++) { | |
398 | cq = &priv->rx_cq[i]; | |
399 | spin_lock_irqsave(&cq->lock, flags); | |
400 | napi_synchronize(&cq->napi); | |
401 | mlx4_en_process_rx_cq(dev, cq, 0); | |
402 | spin_unlock_irqrestore(&cq->lock, flags); | |
403 | } | |
404 | } | |
405 | #endif | |
406 | ||
407 | static void mlx4_en_tx_timeout(struct net_device *dev) | |
408 | { | |
409 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
410 | struct mlx4_en_dev *mdev = priv->mdev; | |
411 | ||
412 | if (netif_msg_timer(priv)) | |
453a6082 | 413 | en_warn(priv, "Tx timeout called on port:%d\n", priv->port); |
c27a02cd | 414 | |
1e338db5 | 415 | priv->port_stats.tx_timeout++; |
453a6082 | 416 | en_dbg(DRV, priv, "Scheduling watchdog\n"); |
1e338db5 | 417 | queue_work(mdev->workqueue, &priv->watchdog_task); |
c27a02cd YP |
418 | } |
419 | ||
420 | ||
421 | static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev) | |
422 | { | |
423 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
424 | ||
425 | spin_lock_bh(&priv->stats_lock); | |
426 | memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats)); | |
427 | spin_unlock_bh(&priv->stats_lock); | |
428 | ||
429 | return &priv->ret_stats; | |
430 | } | |
431 | ||
432 | static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv) | |
433 | { | |
c27a02cd YP |
434 | struct mlx4_en_cq *cq; |
435 | int i; | |
436 | ||
437 | /* If we haven't received a specific coalescing setting | |
98a1708d | 438 | * (module param), we set the moderation parameters as follows: |
c27a02cd YP |
439 | * - moder_cnt is set to the number of mtu sized packets to |
440 | * satisfy our coelsing target. | |
441 | * - moder_time is set to a fixed value. | |
442 | */ | |
3db36fb2 | 443 | priv->rx_frames = MLX4_EN_RX_COAL_TARGET; |
60b9f9e5 | 444 | priv->rx_usecs = MLX4_EN_RX_COAL_TIME; |
a19a848a YP |
445 | priv->tx_frames = MLX4_EN_TX_COAL_PKTS; |
446 | priv->tx_usecs = MLX4_EN_TX_COAL_TIME; | |
453a6082 YP |
447 | en_dbg(INTR, priv, "Default coalesing params for mtu:%d - " |
448 | "rx_frames:%d rx_usecs:%d\n", | |
c27a02cd YP |
449 | priv->dev->mtu, priv->rx_frames, priv->rx_usecs); |
450 | ||
451 | /* Setup cq moderation params */ | |
452 | for (i = 0; i < priv->rx_ring_num; i++) { | |
453 | cq = &priv->rx_cq[i]; | |
454 | cq->moder_cnt = priv->rx_frames; | |
455 | cq->moder_time = priv->rx_usecs; | |
6b4d8d9f AG |
456 | priv->last_moder_time[i] = MLX4_EN_AUTO_CONF; |
457 | priv->last_moder_packets[i] = 0; | |
458 | priv->last_moder_bytes[i] = 0; | |
c27a02cd YP |
459 | } |
460 | ||
461 | for (i = 0; i < priv->tx_ring_num; i++) { | |
462 | cq = &priv->tx_cq[i]; | |
a19a848a YP |
463 | cq->moder_cnt = priv->tx_frames; |
464 | cq->moder_time = priv->tx_usecs; | |
c27a02cd YP |
465 | } |
466 | ||
467 | /* Reset auto-moderation params */ | |
468 | priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW; | |
469 | priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW; | |
470 | priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH; | |
471 | priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH; | |
472 | priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL; | |
60b9f9e5 | 473 | priv->adaptive_rx_coal = 1; |
c27a02cd | 474 | priv->last_moder_jiffies = 0; |
c27a02cd | 475 | priv->last_moder_tx_packets = 0; |
c27a02cd YP |
476 | } |
477 | ||
478 | static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv) | |
479 | { | |
480 | unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies); | |
c27a02cd YP |
481 | struct mlx4_en_cq *cq; |
482 | unsigned long packets; | |
483 | unsigned long rate; | |
484 | unsigned long avg_pkt_size; | |
485 | unsigned long rx_packets; | |
486 | unsigned long rx_bytes; | |
c27a02cd YP |
487 | unsigned long rx_pkt_diff; |
488 | int moder_time; | |
6b4d8d9f | 489 | int ring, err; |
c27a02cd YP |
490 | |
491 | if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ) | |
492 | return; | |
493 | ||
6b4d8d9f AG |
494 | for (ring = 0; ring < priv->rx_ring_num; ring++) { |
495 | spin_lock_bh(&priv->stats_lock); | |
496 | rx_packets = priv->rx_ring[ring].packets; | |
497 | rx_bytes = priv->rx_ring[ring].bytes; | |
498 | spin_unlock_bh(&priv->stats_lock); | |
499 | ||
500 | rx_pkt_diff = ((unsigned long) (rx_packets - | |
501 | priv->last_moder_packets[ring])); | |
502 | packets = rx_pkt_diff; | |
503 | rate = packets * HZ / period; | |
504 | avg_pkt_size = packets ? ((unsigned long) (rx_bytes - | |
505 | priv->last_moder_bytes[ring])) / packets : 0; | |
506 | ||
507 | /* Apply auto-moderation only when packet rate | |
508 | * exceeds a rate that it matters */ | |
509 | if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) && | |
510 | avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) { | |
c27a02cd YP |
511 | if (rate < priv->pkt_rate_low) |
512 | moder_time = priv->rx_usecs_low; | |
513 | else if (rate > priv->pkt_rate_high) | |
514 | moder_time = priv->rx_usecs_high; | |
515 | else | |
516 | moder_time = (rate - priv->pkt_rate_low) * | |
517 | (priv->rx_usecs_high - priv->rx_usecs_low) / | |
518 | (priv->pkt_rate_high - priv->pkt_rate_low) + | |
519 | priv->rx_usecs_low; | |
6b4d8d9f AG |
520 | } else { |
521 | moder_time = priv->rx_usecs_low; | |
c27a02cd | 522 | } |
c27a02cd | 523 | |
6b4d8d9f AG |
524 | if (moder_time != priv->last_moder_time[ring]) { |
525 | priv->last_moder_time[ring] = moder_time; | |
526 | cq = &priv->rx_cq[ring]; | |
c27a02cd YP |
527 | cq->moder_time = moder_time; |
528 | err = mlx4_en_set_cq_moder(priv, cq); | |
6b4d8d9f AG |
529 | if (err) |
530 | en_err(priv, "Failed modifying moderation " | |
531 | "for cq:%d\n", ring); | |
c27a02cd | 532 | } |
6b4d8d9f AG |
533 | priv->last_moder_packets[ring] = rx_packets; |
534 | priv->last_moder_bytes[ring] = rx_bytes; | |
c27a02cd YP |
535 | } |
536 | ||
c27a02cd YP |
537 | priv->last_moder_jiffies = jiffies; |
538 | } | |
539 | ||
540 | static void mlx4_en_do_get_stats(struct work_struct *work) | |
541 | { | |
bf6aede7 | 542 | struct delayed_work *delay = to_delayed_work(work); |
c27a02cd YP |
543 | struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv, |
544 | stats_task); | |
545 | struct mlx4_en_dev *mdev = priv->mdev; | |
546 | int err; | |
547 | ||
548 | err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0); | |
549 | if (err) | |
2381a55c | 550 | en_dbg(HW, priv, "Could not update stats\n"); |
c27a02cd YP |
551 | |
552 | mutex_lock(&mdev->state_lock); | |
553 | if (mdev->device_up) { | |
554 | if (priv->port_up) | |
555 | mlx4_en_auto_moderation(priv); | |
556 | ||
557 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); | |
558 | } | |
d7e1a487 YP |
559 | if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) { |
560 | queue_work(mdev->workqueue, &priv->mac_task); | |
561 | mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0; | |
562 | } | |
c27a02cd YP |
563 | mutex_unlock(&mdev->state_lock); |
564 | } | |
565 | ||
566 | static void mlx4_en_linkstate(struct work_struct *work) | |
567 | { | |
568 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
569 | linkstate_task); | |
570 | struct mlx4_en_dev *mdev = priv->mdev; | |
571 | int linkstate = priv->link_state; | |
572 | ||
573 | mutex_lock(&mdev->state_lock); | |
574 | /* If observable port state changed set carrier state and | |
575 | * report to system log */ | |
576 | if (priv->last_link_state != linkstate) { | |
577 | if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) { | |
e5cc44b2 | 578 | en_info(priv, "Link Down\n"); |
c27a02cd YP |
579 | netif_carrier_off(priv->dev); |
580 | } else { | |
e5cc44b2 | 581 | en_info(priv, "Link Up\n"); |
c27a02cd YP |
582 | netif_carrier_on(priv->dev); |
583 | } | |
584 | } | |
585 | priv->last_link_state = linkstate; | |
586 | mutex_unlock(&mdev->state_lock); | |
587 | } | |
588 | ||
589 | ||
18cc42a3 | 590 | int mlx4_en_start_port(struct net_device *dev) |
c27a02cd YP |
591 | { |
592 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
593 | struct mlx4_en_dev *mdev = priv->mdev; | |
594 | struct mlx4_en_cq *cq; | |
595 | struct mlx4_en_tx_ring *tx_ring; | |
c27a02cd YP |
596 | int rx_index = 0; |
597 | int tx_index = 0; | |
c27a02cd YP |
598 | int err = 0; |
599 | int i; | |
600 | int j; | |
1679200f | 601 | u8 mc_list[16] = {0}; |
c27a02cd YP |
602 | |
603 | if (priv->port_up) { | |
453a6082 | 604 | en_dbg(DRV, priv, "start port called while port already up\n"); |
c27a02cd YP |
605 | return 0; |
606 | } | |
607 | ||
608 | /* Calculate Rx buf size */ | |
609 | dev->mtu = min(dev->mtu, priv->max_mtu); | |
610 | mlx4_en_calc_rx_buf(dev); | |
453a6082 | 611 | en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size); |
38aab07c | 612 | |
c27a02cd | 613 | /* Configure rx cq's and rings */ |
38aab07c YP |
614 | err = mlx4_en_activate_rx_rings(priv); |
615 | if (err) { | |
453a6082 | 616 | en_err(priv, "Failed to activate RX rings\n"); |
38aab07c YP |
617 | return err; |
618 | } | |
c27a02cd YP |
619 | for (i = 0; i < priv->rx_ring_num; i++) { |
620 | cq = &priv->rx_cq[i]; | |
c27a02cd | 621 | |
76532d0c | 622 | err = mlx4_en_activate_cq(priv, cq, i); |
c27a02cd | 623 | if (err) { |
453a6082 | 624 | en_err(priv, "Failed activating Rx CQ\n"); |
a4233304 | 625 | goto cq_err; |
c27a02cd YP |
626 | } |
627 | for (j = 0; j < cq->size; j++) | |
628 | cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK; | |
629 | err = mlx4_en_set_cq_moder(priv, cq); | |
630 | if (err) { | |
453a6082 | 631 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
632 | mlx4_en_deactivate_cq(priv, cq); |
633 | goto cq_err; | |
634 | } | |
635 | mlx4_en_arm_cq(priv, cq); | |
38aab07c | 636 | priv->rx_ring[i].cqn = cq->mcq.cqn; |
c27a02cd YP |
637 | ++rx_index; |
638 | } | |
639 | ||
ffe455ad EE |
640 | /* Set qp number */ |
641 | en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port); | |
642 | err = mlx4_get_eth_qp(mdev->dev, priv->port, | |
643 | priv->mac, &priv->base_qpn); | |
1679200f | 644 | if (err) { |
ffe455ad | 645 | en_err(priv, "Failed getting eth qp\n"); |
1679200f YP |
646 | goto cq_err; |
647 | } | |
648 | mdev->mac_removed[priv->port] = 0; | |
649 | ||
c27a02cd YP |
650 | err = mlx4_en_config_rss_steer(priv); |
651 | if (err) { | |
453a6082 | 652 | en_err(priv, "Failed configuring rss steering\n"); |
1679200f | 653 | goto mac_err; |
c27a02cd YP |
654 | } |
655 | ||
656 | /* Configure tx cq's and rings */ | |
657 | for (i = 0; i < priv->tx_ring_num; i++) { | |
658 | /* Configure cq */ | |
659 | cq = &priv->tx_cq[i]; | |
76532d0c | 660 | err = mlx4_en_activate_cq(priv, cq, i); |
c27a02cd | 661 | if (err) { |
453a6082 | 662 | en_err(priv, "Failed allocating Tx CQ\n"); |
c27a02cd YP |
663 | goto tx_err; |
664 | } | |
665 | err = mlx4_en_set_cq_moder(priv, cq); | |
666 | if (err) { | |
453a6082 | 667 | en_err(priv, "Failed setting cq moderation parameters"); |
c27a02cd YP |
668 | mlx4_en_deactivate_cq(priv, cq); |
669 | goto tx_err; | |
670 | } | |
453a6082 | 671 | en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i); |
c27a02cd YP |
672 | cq->buf->wqe_index = cpu_to_be16(0xffff); |
673 | ||
674 | /* Configure ring */ | |
675 | tx_ring = &priv->tx_ring[i]; | |
0e98b523 | 676 | err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn, |
bc6a4744 | 677 | i / priv->mdev->profile.num_tx_rings_p_up); |
c27a02cd | 678 | if (err) { |
453a6082 | 679 | en_err(priv, "Failed allocating Tx ring\n"); |
c27a02cd YP |
680 | mlx4_en_deactivate_cq(priv, cq); |
681 | goto tx_err; | |
682 | } | |
5b263f53 | 683 | tx_ring->tx_queue = netdev_get_tx_queue(dev, i); |
e22979d9 YP |
684 | |
685 | /* Arm CQ for TX completions */ | |
686 | mlx4_en_arm_cq(priv, cq); | |
687 | ||
c27a02cd YP |
688 | /* Set initial ownership of all Tx TXBBs to SW (1) */ |
689 | for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE) | |
690 | *((u32 *) (tx_ring->buf + j)) = 0xffffffff; | |
691 | ++tx_index; | |
692 | } | |
693 | ||
694 | /* Configure port */ | |
695 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, | |
696 | priv->rx_skb_size + ETH_FCS_LEN, | |
d53b93f2 YP |
697 | priv->prof->tx_pause, |
698 | priv->prof->tx_ppp, | |
699 | priv->prof->rx_pause, | |
700 | priv->prof->rx_ppp); | |
c27a02cd | 701 | if (err) { |
453a6082 YP |
702 | en_err(priv, "Failed setting port general configurations " |
703 | "for port %d, with error %d\n", priv->port, err); | |
c27a02cd YP |
704 | goto tx_err; |
705 | } | |
706 | /* Set default qp number */ | |
707 | err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0); | |
708 | if (err) { | |
453a6082 | 709 | en_err(priv, "Failed setting default qp numbers\n"); |
c27a02cd YP |
710 | goto tx_err; |
711 | } | |
c27a02cd YP |
712 | |
713 | /* Init port */ | |
453a6082 | 714 | en_dbg(HW, priv, "Initializing port\n"); |
c27a02cd YP |
715 | err = mlx4_INIT_PORT(mdev->dev, priv->port); |
716 | if (err) { | |
453a6082 | 717 | en_err(priv, "Failed Initializing port\n"); |
1679200f | 718 | goto tx_err; |
c27a02cd YP |
719 | } |
720 | ||
1679200f YP |
721 | /* Attach rx QP to bradcast address */ |
722 | memset(&mc_list[10], 0xff, ETH_ALEN); | |
723 | mc_list[5] = priv->port; | |
724 | if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list, | |
725 | 0, MLX4_PROT_ETH)) | |
726 | mlx4_warn(mdev, "Failed Attaching Broadcast\n"); | |
727 | ||
b5845f98 HX |
728 | /* Must redo promiscuous mode setup. */ |
729 | priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC); | |
730 | ||
c27a02cd YP |
731 | /* Schedule multicast task to populate multicast list */ |
732 | queue_work(mdev->workqueue, &priv->mcast_task); | |
733 | ||
93ece0c1 EE |
734 | mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap); |
735 | ||
c27a02cd | 736 | priv->port_up = true; |
a11faac7 | 737 | netif_tx_start_all_queues(dev); |
c27a02cd YP |
738 | return 0; |
739 | ||
c27a02cd YP |
740 | tx_err: |
741 | while (tx_index--) { | |
742 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]); | |
743 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]); | |
744 | } | |
745 | ||
746 | mlx4_en_release_rss_steer(priv); | |
1679200f | 747 | mac_err: |
ffe455ad | 748 | mlx4_put_eth_qp(mdev->dev, priv->port, priv->mac, priv->base_qpn); |
c27a02cd YP |
749 | cq_err: |
750 | while (rx_index--) | |
751 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]); | |
38aab07c YP |
752 | for (i = 0; i < priv->rx_ring_num; i++) |
753 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
c27a02cd YP |
754 | |
755 | return err; /* need to close devices */ | |
756 | } | |
757 | ||
758 | ||
18cc42a3 | 759 | void mlx4_en_stop_port(struct net_device *dev) |
c27a02cd YP |
760 | { |
761 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
762 | struct mlx4_en_dev *mdev = priv->mdev; | |
763 | int i; | |
1679200f | 764 | u8 mc_list[16] = {0}; |
c27a02cd YP |
765 | |
766 | if (!priv->port_up) { | |
453a6082 | 767 | en_dbg(DRV, priv, "stop port called while port already down\n"); |
c27a02cd YP |
768 | return; |
769 | } | |
c27a02cd YP |
770 | |
771 | /* Synchronize with tx routine */ | |
772 | netif_tx_lock_bh(dev); | |
3c05f5ef | 773 | netif_tx_stop_all_queues(dev); |
c27a02cd YP |
774 | netif_tx_unlock_bh(dev); |
775 | ||
7c287380 | 776 | /* Set port as not active */ |
3c05f5ef | 777 | priv->port_up = false; |
c27a02cd | 778 | |
1679200f YP |
779 | /* Detach All multicasts */ |
780 | memset(&mc_list[10], 0xff, ETH_ALEN); | |
781 | mc_list[5] = priv->port; | |
782 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list, | |
783 | MLX4_PROT_ETH); | |
784 | for (i = 0; i < priv->mc_addrs_cnt; i++) { | |
785 | memcpy(&mc_list[10], priv->mc_addrs + i * ETH_ALEN, ETH_ALEN); | |
786 | mc_list[5] = priv->port; | |
787 | mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, | |
788 | mc_list, MLX4_PROT_ETH); | |
789 | } | |
790 | mlx4_en_clear_list(dev); | |
791 | /* Flush multicast filter */ | |
792 | mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG); | |
793 | ||
c27a02cd YP |
794 | /* Free TX Rings */ |
795 | for (i = 0; i < priv->tx_ring_num; i++) { | |
796 | mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]); | |
797 | mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]); | |
798 | } | |
799 | msleep(10); | |
800 | ||
801 | for (i = 0; i < priv->tx_ring_num; i++) | |
802 | mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]); | |
803 | ||
804 | /* Free RSS qps */ | |
805 | mlx4_en_release_rss_steer(priv); | |
806 | ||
ffe455ad EE |
807 | /* Unregister Mac address for the port */ |
808 | mlx4_put_eth_qp(mdev->dev, priv->port, priv->mac, priv->base_qpn); | |
809 | mdev->mac_removed[priv->port] = 1; | |
810 | ||
c27a02cd YP |
811 | /* Free RX Rings */ |
812 | for (i = 0; i < priv->rx_ring_num; i++) { | |
813 | mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]); | |
814 | while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state)) | |
815 | msleep(1); | |
816 | mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]); | |
817 | } | |
7c287380 YP |
818 | |
819 | /* close port*/ | |
820 | mlx4_CLOSE_PORT(mdev->dev, priv->port); | |
c27a02cd YP |
821 | } |
822 | ||
823 | static void mlx4_en_restart(struct work_struct *work) | |
824 | { | |
825 | struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv, | |
826 | watchdog_task); | |
827 | struct mlx4_en_dev *mdev = priv->mdev; | |
828 | struct net_device *dev = priv->dev; | |
5b263f53 | 829 | int i; |
c27a02cd | 830 | |
453a6082 | 831 | en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port); |
1e338db5 YP |
832 | |
833 | mutex_lock(&mdev->state_lock); | |
834 | if (priv->port_up) { | |
835 | mlx4_en_stop_port(dev); | |
5b263f53 YP |
836 | for (i = 0; i < priv->tx_ring_num; i++) |
837 | netdev_tx_reset_queue(priv->tx_ring[i].tx_queue); | |
1e338db5 | 838 | if (mlx4_en_start_port(dev)) |
453a6082 | 839 | en_err(priv, "Failed restarting port %d\n", priv->port); |
1e338db5 YP |
840 | } |
841 | mutex_unlock(&mdev->state_lock); | |
c27a02cd YP |
842 | } |
843 | ||
b477ba62 | 844 | static void mlx4_en_clear_stats(struct net_device *dev) |
c27a02cd YP |
845 | { |
846 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
847 | struct mlx4_en_dev *mdev = priv->mdev; | |
848 | int i; | |
c27a02cd | 849 | |
c27a02cd | 850 | if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1)) |
453a6082 | 851 | en_dbg(HW, priv, "Failed dumping statistics\n"); |
c27a02cd YP |
852 | |
853 | memset(&priv->stats, 0, sizeof(priv->stats)); | |
854 | memset(&priv->pstats, 0, sizeof(priv->pstats)); | |
b477ba62 EE |
855 | memset(&priv->pkstats, 0, sizeof(priv->pkstats)); |
856 | memset(&priv->port_stats, 0, sizeof(priv->port_stats)); | |
c27a02cd YP |
857 | |
858 | for (i = 0; i < priv->tx_ring_num; i++) { | |
859 | priv->tx_ring[i].bytes = 0; | |
860 | priv->tx_ring[i].packets = 0; | |
b477ba62 | 861 | priv->tx_ring[i].tx_csum = 0; |
c27a02cd YP |
862 | } |
863 | for (i = 0; i < priv->rx_ring_num; i++) { | |
864 | priv->rx_ring[i].bytes = 0; | |
865 | priv->rx_ring[i].packets = 0; | |
b477ba62 EE |
866 | priv->rx_ring[i].csum_ok = 0; |
867 | priv->rx_ring[i].csum_none = 0; | |
c27a02cd | 868 | } |
b477ba62 EE |
869 | } |
870 | ||
871 | static int mlx4_en_open(struct net_device *dev) | |
872 | { | |
873 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
874 | struct mlx4_en_dev *mdev = priv->mdev; | |
875 | int err = 0; | |
876 | ||
877 | mutex_lock(&mdev->state_lock); | |
878 | ||
879 | if (!mdev->device_up) { | |
880 | en_err(priv, "Cannot open - device down/disabled\n"); | |
881 | err = -EBUSY; | |
882 | goto out; | |
883 | } | |
884 | ||
885 | /* Reset HW statistics and SW counters */ | |
886 | mlx4_en_clear_stats(dev); | |
c27a02cd | 887 | |
c27a02cd YP |
888 | err = mlx4_en_start_port(dev); |
889 | if (err) | |
453a6082 | 890 | en_err(priv, "Failed starting port:%d\n", priv->port); |
c27a02cd YP |
891 | |
892 | out: | |
893 | mutex_unlock(&mdev->state_lock); | |
894 | return err; | |
895 | } | |
896 | ||
897 | ||
898 | static int mlx4_en_close(struct net_device *dev) | |
899 | { | |
900 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
901 | struct mlx4_en_dev *mdev = priv->mdev; | |
902 | ||
453a6082 | 903 | en_dbg(IFDOWN, priv, "Close port called\n"); |
c27a02cd YP |
904 | |
905 | mutex_lock(&mdev->state_lock); | |
906 | ||
907 | mlx4_en_stop_port(dev); | |
908 | netif_carrier_off(dev); | |
909 | ||
910 | mutex_unlock(&mdev->state_lock); | |
911 | return 0; | |
912 | } | |
913 | ||
fe0af03c | 914 | void mlx4_en_free_resources(struct mlx4_en_priv *priv) |
c27a02cd YP |
915 | { |
916 | int i; | |
917 | ||
918 | for (i = 0; i < priv->tx_ring_num; i++) { | |
919 | if (priv->tx_ring[i].tx_info) | |
920 | mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]); | |
921 | if (priv->tx_cq[i].buf) | |
fe0af03c | 922 | mlx4_en_destroy_cq(priv, &priv->tx_cq[i]); |
c27a02cd YP |
923 | } |
924 | ||
925 | for (i = 0; i < priv->rx_ring_num; i++) { | |
926 | if (priv->rx_ring[i].rx_info) | |
68355f71 TLSC |
927 | mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i], |
928 | priv->prof->rx_ring_size, priv->stride); | |
c27a02cd | 929 | if (priv->rx_cq[i].buf) |
fe0af03c | 930 | mlx4_en_destroy_cq(priv, &priv->rx_cq[i]); |
c27a02cd | 931 | } |
044ca2a5 YP |
932 | |
933 | if (priv->base_tx_qpn) { | |
934 | mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num); | |
935 | priv->base_tx_qpn = 0; | |
936 | } | |
c27a02cd YP |
937 | } |
938 | ||
18cc42a3 | 939 | int mlx4_en_alloc_resources(struct mlx4_en_priv *priv) |
c27a02cd | 940 | { |
c27a02cd YP |
941 | struct mlx4_en_port_profile *prof = priv->prof; |
942 | int i; | |
044ca2a5 | 943 | int err; |
87a5c389 | 944 | |
044ca2a5 | 945 | err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn); |
87a5c389 YP |
946 | if (err) { |
947 | en_err(priv, "failed reserving range for TX rings\n"); | |
948 | return err; | |
949 | } | |
c27a02cd YP |
950 | |
951 | /* Create tx Rings */ | |
952 | for (i = 0; i < priv->tx_ring_num; i++) { | |
953 | if (mlx4_en_create_cq(priv, &priv->tx_cq[i], | |
954 | prof->tx_ring_size, i, TX)) | |
955 | goto err; | |
956 | ||
044ca2a5 | 957 | if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i, |
c27a02cd YP |
958 | prof->tx_ring_size, TXBB_SIZE)) |
959 | goto err; | |
960 | } | |
961 | ||
962 | /* Create rx Rings */ | |
963 | for (i = 0; i < priv->rx_ring_num; i++) { | |
964 | if (mlx4_en_create_cq(priv, &priv->rx_cq[i], | |
965 | prof->rx_ring_size, i, RX)) | |
966 | goto err; | |
967 | ||
968 | if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i], | |
969 | prof->rx_ring_size, priv->stride)) | |
970 | goto err; | |
971 | } | |
972 | ||
973 | return 0; | |
974 | ||
975 | err: | |
453a6082 | 976 | en_err(priv, "Failed to allocate NIC resources\n"); |
c27a02cd YP |
977 | return -ENOMEM; |
978 | } | |
979 | ||
980 | ||
981 | void mlx4_en_destroy_netdev(struct net_device *dev) | |
982 | { | |
983 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
984 | struct mlx4_en_dev *mdev = priv->mdev; | |
985 | ||
453a6082 | 986 | en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port); |
c27a02cd YP |
987 | |
988 | /* Unregister device - this will close the port if it was up */ | |
989 | if (priv->registered) | |
990 | unregister_netdev(dev); | |
991 | ||
992 | if (priv->allocated) | |
993 | mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE); | |
994 | ||
995 | cancel_delayed_work(&priv->stats_task); | |
c27a02cd YP |
996 | /* flush any pending task for this netdev */ |
997 | flush_workqueue(mdev->workqueue); | |
998 | ||
999 | /* Detach the netdev so tasks would not attempt to access it */ | |
1000 | mutex_lock(&mdev->state_lock); | |
1001 | mdev->pndev[priv->port] = NULL; | |
1002 | mutex_unlock(&mdev->state_lock); | |
1003 | ||
fe0af03c | 1004 | mlx4_en_free_resources(priv); |
564c274c | 1005 | |
bc6a4744 AV |
1006 | kfree(priv->tx_ring); |
1007 | kfree(priv->tx_cq); | |
1008 | ||
c27a02cd YP |
1009 | free_netdev(dev); |
1010 | } | |
1011 | ||
1012 | static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu) | |
1013 | { | |
1014 | struct mlx4_en_priv *priv = netdev_priv(dev); | |
1015 | struct mlx4_en_dev *mdev = priv->mdev; | |
1016 | int err = 0; | |
1017 | ||
453a6082 | 1018 | en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n", |
c27a02cd YP |
1019 | dev->mtu, new_mtu); |
1020 | ||
1021 | if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) { | |
453a6082 | 1022 | en_err(priv, "Bad MTU size:%d.\n", new_mtu); |
c27a02cd YP |
1023 | return -EPERM; |
1024 | } | |
1025 | dev->mtu = new_mtu; | |
1026 | ||
1027 | if (netif_running(dev)) { | |
1028 | mutex_lock(&mdev->state_lock); | |
1029 | if (!mdev->device_up) { | |
1030 | /* NIC is probably restarting - let watchdog task reset | |
1031 | * the port */ | |
453a6082 | 1032 | en_dbg(DRV, priv, "Change MTU called with card down!?\n"); |
c27a02cd YP |
1033 | } else { |
1034 | mlx4_en_stop_port(dev); | |
c27a02cd YP |
1035 | err = mlx4_en_start_port(dev); |
1036 | if (err) { | |
453a6082 | 1037 | en_err(priv, "Failed restarting port:%d\n", |
c27a02cd YP |
1038 | priv->port); |
1039 | queue_work(mdev->workqueue, &priv->watchdog_task); | |
1040 | } | |
1041 | } | |
1042 | mutex_unlock(&mdev->state_lock); | |
1043 | } | |
1044 | return 0; | |
1045 | } | |
1046 | ||
60d6fe99 AV |
1047 | static int mlx4_en_set_features(struct net_device *netdev, |
1048 | netdev_features_t features) | |
1049 | { | |
1050 | struct mlx4_en_priv *priv = netdev_priv(netdev); | |
1051 | ||
1052 | if (features & NETIF_F_LOOPBACK) | |
1053 | priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK); | |
1054 | else | |
1055 | priv->ctrl_flags &= | |
1056 | cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK); | |
1057 | ||
1058 | return 0; | |
1059 | ||
1060 | } | |
1061 | ||
3addc568 SH |
1062 | static const struct net_device_ops mlx4_netdev_ops = { |
1063 | .ndo_open = mlx4_en_open, | |
1064 | .ndo_stop = mlx4_en_close, | |
1065 | .ndo_start_xmit = mlx4_en_xmit, | |
f813cad8 | 1066 | .ndo_select_queue = mlx4_en_select_queue, |
3addc568 | 1067 | .ndo_get_stats = mlx4_en_get_stats, |
afc4b13d | 1068 | .ndo_set_rx_mode = mlx4_en_set_multicast, |
3addc568 | 1069 | .ndo_set_mac_address = mlx4_en_set_mac, |
52255bbe | 1070 | .ndo_validate_addr = eth_validate_addr, |
3addc568 SH |
1071 | .ndo_change_mtu = mlx4_en_change_mtu, |
1072 | .ndo_tx_timeout = mlx4_en_tx_timeout, | |
3addc568 SH |
1073 | .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid, |
1074 | .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid, | |
1075 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1076 | .ndo_poll_controller = mlx4_en_netpoll, | |
1077 | #endif | |
60d6fe99 | 1078 | .ndo_set_features = mlx4_en_set_features, |
897d7846 | 1079 | .ndo_setup_tc = mlx4_en_setup_tc, |
3addc568 SH |
1080 | }; |
1081 | ||
c27a02cd YP |
1082 | int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port, |
1083 | struct mlx4_en_port_profile *prof) | |
1084 | { | |
1085 | struct net_device *dev; | |
1086 | struct mlx4_en_priv *priv; | |
1087 | int i; | |
1088 | int err; | |
1089 | ||
f1593d22 TH |
1090 | dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv), |
1091 | prof->tx_ring_num, prof->rx_ring_num); | |
41de8d4c | 1092 | if (dev == NULL) |
c27a02cd | 1093 | return -ENOMEM; |
c27a02cd YP |
1094 | |
1095 | SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev); | |
741a00be | 1096 | dev->dev_id = port - 1; |
c27a02cd YP |
1097 | |
1098 | /* | |
1099 | * Initialize driver private data | |
1100 | */ | |
1101 | ||
1102 | priv = netdev_priv(dev); | |
1103 | memset(priv, 0, sizeof(struct mlx4_en_priv)); | |
1104 | priv->dev = dev; | |
1105 | priv->mdev = mdev; | |
ebf8c9aa | 1106 | priv->ddev = &mdev->pdev->dev; |
c27a02cd YP |
1107 | priv->prof = prof; |
1108 | priv->port = port; | |
1109 | priv->port_up = false; | |
c27a02cd | 1110 | priv->flags = prof->flags; |
60d6fe99 AV |
1111 | priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE | |
1112 | MLX4_WQE_CTRL_SOLICITED); | |
c27a02cd | 1113 | priv->tx_ring_num = prof->tx_ring_num; |
bc6a4744 AV |
1114 | priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * |
1115 | priv->tx_ring_num, GFP_KERNEL); | |
1116 | if (!priv->tx_ring) { | |
1117 | err = -ENOMEM; | |
1118 | goto out; | |
1119 | } | |
1120 | priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * priv->tx_ring_num, | |
1121 | GFP_KERNEL); | |
1122 | if (!priv->tx_cq) { | |
1123 | err = -ENOMEM; | |
1124 | goto out; | |
1125 | } | |
c27a02cd | 1126 | priv->rx_ring_num = prof->rx_ring_num; |
c27a02cd YP |
1127 | priv->mac_index = -1; |
1128 | priv->msg_enable = MLX4_EN_MSG_LEVEL; | |
1129 | spin_lock_init(&priv->stats_lock); | |
1130 | INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast); | |
1131 | INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac); | |
c27a02cd YP |
1132 | INIT_WORK(&priv->watchdog_task, mlx4_en_restart); |
1133 | INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate); | |
1134 | INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats); | |
564c274c AV |
1135 | #ifdef CONFIG_MLX4_EN_DCB |
1136 | if (!mlx4_is_slave(priv->mdev->dev)) | |
1137 | dev->dcbnl_ops = &mlx4_en_dcbnl_ops; | |
1138 | #endif | |
c27a02cd YP |
1139 | |
1140 | /* Query for default mac and max mtu */ | |
1141 | priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port]; | |
1142 | priv->mac = mdev->dev->caps.def_mac[priv->port]; | |
1143 | if (ILLEGAL_MAC(priv->mac)) { | |
453a6082 | 1144 | en_err(priv, "Port: %d, invalid mac burned: 0x%llx, quiting\n", |
c27a02cd YP |
1145 | priv->port, priv->mac); |
1146 | err = -EINVAL; | |
1147 | goto out; | |
1148 | } | |
1149 | ||
1150 | priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) + | |
1151 | DS_SIZE * MLX4_EN_MAX_RX_FRAGS); | |
1152 | err = mlx4_en_alloc_resources(priv); | |
1153 | if (err) | |
1154 | goto out; | |
1155 | ||
c27a02cd YP |
1156 | /* Allocate page for receive rings */ |
1157 | err = mlx4_alloc_hwq_res(mdev->dev, &priv->res, | |
1158 | MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE); | |
1159 | if (err) { | |
453a6082 | 1160 | en_err(priv, "Failed to allocate page for rx qps\n"); |
c27a02cd YP |
1161 | goto out; |
1162 | } | |
1163 | priv->allocated = 1; | |
1164 | ||
c27a02cd YP |
1165 | /* |
1166 | * Initialize netdev entry points | |
1167 | */ | |
3addc568 | 1168 | dev->netdev_ops = &mlx4_netdev_ops; |
c27a02cd | 1169 | dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT; |
1eb63a28 BH |
1170 | netif_set_real_num_tx_queues(dev, priv->tx_ring_num); |
1171 | netif_set_real_num_rx_queues(dev, priv->rx_ring_num); | |
3addc568 | 1172 | |
c27a02cd YP |
1173 | SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops); |
1174 | ||
1175 | /* Set defualt MAC */ | |
1176 | dev->addr_len = ETH_ALEN; | |
8bf2e58f YP |
1177 | for (i = 0; i < ETH_ALEN; i++) { |
1178 | dev->dev_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i)); | |
1179 | dev->perm_addr[ETH_ALEN - 1 - i] = (u8) (priv->mac >> (8 * i)); | |
1180 | } | |
c27a02cd YP |
1181 | |
1182 | /* | |
1183 | * Set driver features | |
1184 | */ | |
c8c64cff MM |
1185 | dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
1186 | if (mdev->LSO_support) | |
1187 | dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6; | |
1188 | ||
1189 | dev->vlan_features = dev->hw_features; | |
1190 | ||
ad86107f | 1191 | dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH; |
c8c64cff MM |
1192 | dev->features = dev->hw_features | NETIF_F_HIGHDMA | |
1193 | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX | | |
1194 | NETIF_F_HW_VLAN_FILTER; | |
60d6fe99 | 1195 | dev->hw_features |= NETIF_F_LOOPBACK; |
c27a02cd YP |
1196 | |
1197 | mdev->pndev[port] = dev; | |
1198 | ||
1199 | netif_carrier_off(dev); | |
1200 | err = register_netdev(dev); | |
1201 | if (err) { | |
453a6082 | 1202 | en_err(priv, "Netdev registration failed for port %d\n", port); |
c27a02cd YP |
1203 | goto out; |
1204 | } | |
4234144f | 1205 | priv->registered = 1; |
453a6082 YP |
1206 | |
1207 | en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num); | |
1208 | en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num); | |
1209 | ||
90822265 | 1210 | /* Configure port */ |
5c8e9046 | 1211 | mlx4_en_calc_rx_buf(dev); |
90822265 | 1212 | err = mlx4_SET_PORT_general(mdev->dev, priv->port, |
5c8e9046 YP |
1213 | priv->rx_skb_size + ETH_FCS_LEN, |
1214 | prof->tx_pause, prof->tx_ppp, | |
1215 | prof->rx_pause, prof->rx_ppp); | |
90822265 YP |
1216 | if (err) { |
1217 | en_err(priv, "Failed setting port general configurations " | |
1218 | "for port %d, with error %d\n", priv->port, err); | |
1219 | goto out; | |
1220 | } | |
1221 | ||
1222 | /* Init port */ | |
1223 | en_warn(priv, "Initializing port\n"); | |
1224 | err = mlx4_INIT_PORT(mdev->dev, priv->port); | |
1225 | if (err) { | |
1226 | en_err(priv, "Failed Initializing port\n"); | |
1227 | goto out; | |
1228 | } | |
39f17b44 | 1229 | mlx4_en_set_default_moderation(priv); |
c27a02cd YP |
1230 | queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY); |
1231 | return 0; | |
1232 | ||
1233 | out: | |
1234 | mlx4_en_destroy_netdev(dev); | |
1235 | return err; | |
1236 | } | |
1237 |