[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_port.c

/*
 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */


#include <linux/if_vlan.h>

#include <linux/mlx4/device.h>
#include <linux/mlx4/cmd.h>

#include "en_port.h"
#include "mlx4_en.h"


int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
{
	struct mlx4_cmd_mailbox *mailbox;
	struct mlx4_set_vlan_fltr_mbox *filter;
	int i;
	int j;
	int index = 0;
	u32 entry;
	int err = 0;

	mailbox = mlx4_alloc_cmd_mailbox(dev);
	if (IS_ERR(mailbox))
		return PTR_ERR(mailbox);

	filter = mailbox->buf;
	for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
		entry = 0;
		for (j = 0; j < 32; j++)
			if (test_bit(index++, priv->active_vlans))
				entry |= 1 << j;
		filter->entry[i] = cpu_to_be32(entry);
	}
	err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR,
		       MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
	mlx4_free_cmd_mailbox(dev, mailbox);
	return err;
}

int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
{
	struct mlx4_en_query_port_context *qport_context;
	struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
	struct mlx4_en_port_state *state = &priv->port_state;
	struct mlx4_cmd_mailbox *mailbox;
	int err;

	mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
	if (IS_ERR(mailbox))
		return PTR_ERR(mailbox);
	err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
			   MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
			   MLX4_CMD_WRAPPED);
	if (err)
		goto out;
	qport_context = mailbox->buf;

	/* This command is always accessed from Ethtool context
	 * already synchronized, no need in locking */
	state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
	switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
	case MLX4_EN_100M_SPEED:
		state->link_speed = SPEED_100;
		break;
	case MLX4_EN_1G_SPEED:
		state->link_speed = SPEED_1000;
		break;
	case MLX4_EN_10G_SPEED_XAUI:
	case MLX4_EN_10G_SPEED_XFI:
		state->link_speed = SPEED_10000;
		break;
	case MLX4_EN_20G_SPEED:
		state->link_speed = SPEED_20000;
		break;
	case MLX4_EN_40G_SPEED:
		state->link_speed = SPEED_40000;
		break;
	case MLX4_EN_56G_SPEED:
		state->link_speed = SPEED_56000;
		break;
	default:
		state->link_speed = -1;
		break;
	}

	state->transceiver = qport_context->transceiver;

	state->flags = 0; /* Reset and recalculate the port flags */
	state->flags |= (qport_context->link_up & MLX4_EN_ANC_MASK) ?
		MLX4_EN_PORT_ANC : 0;
	state->flags |= (qport_context->autoneg & MLX4_EN_AUTONEG_MASK) ?
		MLX4_EN_PORT_ANE : 0;

out:
	mlx4_free_cmd_mailbox(mdev->dev, mailbox);
	return err;
}

int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
{
	struct mlx4_en_stat_out_mbox *mlx4_en_stats;
	struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
	struct net_device_stats *stats = &priv->stats;
	struct mlx4_cmd_mailbox *mailbox;
	u64 in_mod = reset << 8 | port;
	int err;
	int i;

	mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
	if (IS_ERR(mailbox))
		return PTR_ERR(mailbox);
	err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
			   MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
			   MLX4_CMD_WRAPPED);
	if (err)
		goto out;

	mlx4_en_stats = mailbox->buf;

	spin_lock_bh(&priv->stats_lock);

	stats->rx_packets = 0;
	stats->rx_bytes = 0;
	priv->port_stats.rx_chksum_good = 0;
	priv->port_stats.rx_chksum_none = 0;
	priv->port_stats.rx_chksum_complete = 0;
	for (i = 0; i < priv->rx_ring_num; i++) {
		stats->rx_packets += priv->rx_ring[i]->packets;
		stats->rx_bytes += priv->rx_ring[i]->bytes;
		priv->port_stats.rx_chksum_good += priv->rx_ring[i]->csum_ok;
		priv->port_stats.rx_chksum_none += priv->rx_ring[i]->csum_none;
		priv->port_stats.rx_chksum_complete += priv->rx_ring[i]->csum_complete;
	}
	stats->tx_packets = 0;
	stats->tx_bytes = 0;
	priv->port_stats.tx_chksum_offload = 0;
	priv->port_stats.queue_stopped = 0;
	priv->port_stats.wake_queue = 0;
	priv->port_stats.tso_packets = 0;
	priv->port_stats.xmit_more = 0;

	for (i = 0; i < priv->tx_ring_num; i++) {
		const struct mlx4_en_tx_ring *ring = priv->tx_ring[i];

		stats->tx_packets += ring->packets;
		stats->tx_bytes += ring->bytes;
		priv->port_stats.tx_chksum_offload += ring->tx_csum;
		priv->port_stats.queue_stopped     += ring->queue_stopped;
		priv->port_stats.wake_queue        += ring->wake_queue;
		priv->port_stats.tso_packets       += ring->tso_packets;
		priv->port_stats.xmit_more         += ring->xmit_more;
	}

	stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) +
			   be32_to_cpu(mlx4_en_stats->RdropLength) +
			   be32_to_cpu(mlx4_en_stats->RJBBR) +
			   be32_to_cpu(mlx4_en_stats->RCRC) +
			   be32_to_cpu(mlx4_en_stats->RRUNT);
	stats->tx_errors = be32_to_cpu(mlx4_en_stats->TDROP);
	stats->multicast = be64_to_cpu(mlx4_en_stats->MCAST_prio_0) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_1) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_2) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_3) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_4) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_5) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_6) +
			   be64_to_cpu(mlx4_en_stats->MCAST_prio_7) +
			   be64_to_cpu(mlx4_en_stats->MCAST_novlan);
	stats->collisions = 0;
	stats->rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength);
	stats->rx_over_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
	stats->rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC);
	stats->rx_frame_errors = 0;
	stats->rx_fifo_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
	stats->rx_missed_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
	stats->tx_aborted_errors = 0;
	stats->tx_carrier_errors = 0;
	stats->tx_fifo_errors = 0;
	stats->tx_heartbeat_errors = 0;
	stats->tx_window_errors = 0;

	priv->pkstats.broadcast =
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_0) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_1) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_2) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_3) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_4) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_5) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_6) +
				be64_to_cpu(mlx4_en_stats->RBCAST_prio_7) +
				be64_to_cpu(mlx4_en_stats->RBCAST_novlan);
	priv->pkstats.rx_prio[0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0);
	priv->pkstats.rx_prio[1] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1);
	priv->pkstats.rx_prio[2] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2);
	priv->pkstats.rx_prio[3] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3);
	priv->pkstats.rx_prio[4] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4);
	priv->pkstats.rx_prio[5] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5);
	priv->pkstats.rx_prio[6] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6);
	priv->pkstats.rx_prio[7] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7);
	priv->pkstats.tx_prio[0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0);
	priv->pkstats.tx_prio[1] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1);
	priv->pkstats.tx_prio[2] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2);
	priv->pkstats.tx_prio[3] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3);
	priv->pkstats.tx_prio[4] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4);
	priv->pkstats.tx_prio[5] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5);
	priv->pkstats.tx_prio[6] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6);
	priv->pkstats.tx_prio[7] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7);
	spin_unlock_bh(&priv->stats_lock);

out:
	mlx4_free_cmd_mailbox(mdev->dev, mailbox);
	return err;
}
Commit	Line	Data
c27a02cd YP	1	/*
	2	* Copyright (c) 2007 Mellanox Technologies. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*
	32	*/
	33
	34
	35	#include <linux/if_vlan.h>
	36
	37	#include <linux/mlx4/device.h>
	38	#include <linux/mlx4/cmd.h>
	39
	40	#include "en_port.h"
	41	#include "mlx4_en.h"
	42
	43
f1b553fb	44	int mlx4_SET_VLAN_FLTR(struct mlx4_dev dev, struct mlx4_en_priv priv)
c27a02cd YP	45	{
	46	struct mlx4_cmd_mailbox *mailbox;
	47	struct mlx4_set_vlan_fltr_mbox *filter;
	48	int i;
	49	int j;
	50	int index = 0;
	51	u32 entry;
	52	int err = 0;
	53
	54	mailbox = mlx4_alloc_cmd_mailbox(dev);
	55	if (IS_ERR(mailbox))
	56	return PTR_ERR(mailbox);
	57
	58	filter = mailbox->buf;
f1b553fb JP	59	for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
	60	entry = 0;
	61	for (j = 0; j < 32; j++)
	62	if (test_bit(index++, priv->active_vlans))
	63	entry \|= 1 << j;
	64	filter->entry[i] = cpu_to_be32(entry);
c27a02cd	65	}
f1b553fb	66	err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR,
f9baff50	67	MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
c27a02cd YP	68	mlx4_free_cmd_mailbox(dev, mailbox);
	69	return err;
	70	}
	71
e7c1c2c4 YP	72	int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
	73	{
	74	struct mlx4_en_query_port_context *qport_context;
	75	struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
	76	struct mlx4_en_port_state *state = &priv->port_state;
	77	struct mlx4_cmd_mailbox *mailbox;
	78	int err;
	79
	80	mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
	81	if (IS_ERR(mailbox))
	82	return PTR_ERR(mailbox);
e7c1c2c4	83	err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
f9baff50 JM	84	MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
f9baff50 JM	85	MLX4_CMD_WRAPPED);
e7c1c2c4 YP	86	if (err)
	87	goto out;
	88	qport_context = mailbox->buf;
	89
	90	/* This command is always accessed from Ethtool context
	91	* already synchronized, no need in locking */
	92	state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
f0ec7177	93	switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
dcf972a3 SM	94	case MLX4_EN_100M_SPEED:
	95	state->link_speed = SPEED_100;
	96	break;
f0ec7177	97	case MLX4_EN_1G_SPEED:
dcf972a3	98	state->link_speed = SPEED_1000;
f0ec7177 AG	99	break;
	100	case MLX4_EN_10G_SPEED_XAUI:
	101	case MLX4_EN_10G_SPEED_XFI:
dcf972a3 SM	102	state->link_speed = SPEED_10000;
	103	break;
	104	case MLX4_EN_20G_SPEED:
	105	state->link_speed = SPEED_20000;
f0ec7177 AG	106	break;
f0ec7177 AG	107	case MLX4_EN_40G_SPEED:
dcf972a3 SM	108	state->link_speed = SPEED_40000;
	109	break;
	110	case MLX4_EN_56G_SPEED:
	111	state->link_speed = SPEED_56000;
f0ec7177 AG	112	break;
	113	default:
	114	state->link_speed = -1;
	115	break;
	116	}
2c762679 SM	117
	118	state->transceiver = qport_context->transceiver;
	119
	120	state->flags = 0; /* Reset and recalculate the port flags */
	121	state->flags \|= (qport_context->link_up & MLX4_EN_ANC_MASK) ?
	122	MLX4_EN_PORT_ANC : 0;
	123	state->flags \|= (qport_context->autoneg & MLX4_EN_AUTONEG_MASK) ?
	124	MLX4_EN_PORT_ANE : 0;
e7c1c2c4 YP	125
	126	out:
	127	mlx4_free_cmd_mailbox(mdev->dev, mailbox);
	128	return err;
	129	}
c27a02cd YP	130
	131	int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
	132	{
	133	struct mlx4_en_stat_out_mbox *mlx4_en_stats;
	134	struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
	135	struct net_device_stats *stats = &priv->stats;
	136	struct mlx4_cmd_mailbox *mailbox;
	137	u64 in_mod = reset << 8 \| port;
	138	int err;
b1b243af	139	int i;
c27a02cd YP	140
	141	mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
	142	if (IS_ERR(mailbox))
	143	return PTR_ERR(mailbox);
c27a02cd	144	err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
f9baff50 JM	145	MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
f9baff50 JM	146	MLX4_CMD_WRAPPED);
c27a02cd YP	147	if (err)
	148	goto out;
	149
	150	mlx4_en_stats = mailbox->buf;
	151
	152	spin_lock_bh(&priv->stats_lock);
	153
b1b243af YP	154	stats->rx_packets = 0;
b1b243af YP	155	stats->rx_bytes = 0;
ad04378c YP	156	priv->port_stats.rx_chksum_good = 0;
ad04378c YP	157	priv->port_stats.rx_chksum_none = 0;
f8c6455b	158	priv->port_stats.rx_chksum_complete = 0;
b1b243af	159	for (i = 0; i < priv->rx_ring_num; i++) {
41d942d5 EE	160	stats->rx_packets += priv->rx_ring[i]->packets;
	161	stats->rx_bytes += priv->rx_ring[i]->bytes;
	162	priv->port_stats.rx_chksum_good += priv->rx_ring[i]->csum_ok;
	163	priv->port_stats.rx_chksum_none += priv->rx_ring[i]->csum_none;
f8c6455b	164	priv->port_stats.rx_chksum_complete += priv->rx_ring[i]->csum_complete;
b1b243af YP	165	}
	166	stats->tx_packets = 0;
	167	stats->tx_bytes = 0;
ad04378c	168	priv->port_stats.tx_chksum_offload = 0;
15bffdff EE	169	priv->port_stats.queue_stopped = 0;
15bffdff EE	170	priv->port_stats.wake_queue = 0;
9fab426d ED	171	priv->port_stats.tso_packets = 0;
9fab426d ED	172	priv->port_stats.xmit_more = 0;
15bffdff	173
b6055006	174	for (i = 0; i < priv->tx_ring_num; i++) {
9fab426d ED	175	const struct mlx4_en_tx_ring *ring = priv->tx_ring[i];
	176
	177	stats->tx_packets += ring->packets;
	178	stats->tx_bytes += ring->bytes;
	179	priv->port_stats.tx_chksum_offload += ring->tx_csum;
	180	priv->port_stats.queue_stopped += ring->queue_stopped;
	181	priv->port_stats.wake_queue += ring->wake_queue;
	182	priv->port_stats.tso_packets += ring->tso_packets;
	183	priv->port_stats.xmit_more += ring->xmit_more;
b1b243af	184	}
c27a02cd YP	185
	186	stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) +
	187	be32_to_cpu(mlx4_en_stats->RdropLength) +
	188	be32_to_cpu(mlx4_en_stats->RJBBR) +
	189	be32_to_cpu(mlx4_en_stats->RCRC) +
	190	be32_to_cpu(mlx4_en_stats->RRUNT);
	191	stats->tx_errors = be32_to_cpu(mlx4_en_stats->TDROP);
	192	stats->multicast = be64_to_cpu(mlx4_en_stats->MCAST_prio_0) +
	193	be64_to_cpu(mlx4_en_stats->MCAST_prio_1) +
	194	be64_to_cpu(mlx4_en_stats->MCAST_prio_2) +
	195	be64_to_cpu(mlx4_en_stats->MCAST_prio_3) +
	196	be64_to_cpu(mlx4_en_stats->MCAST_prio_4) +
	197	be64_to_cpu(mlx4_en_stats->MCAST_prio_5) +
	198	be64_to_cpu(mlx4_en_stats->MCAST_prio_6) +
	199	be64_to_cpu(mlx4_en_stats->MCAST_prio_7) +
	200	be64_to_cpu(mlx4_en_stats->MCAST_novlan);
	201	stats->collisions = 0;
	202	stats->rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength);
	203	stats->rx_over_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
	204	stats->rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC);
	205	stats->rx_frame_errors = 0;
	206	stats->rx_fifo_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
	207	stats->rx_missed_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
	208	stats->tx_aborted_errors = 0;
	209	stats->tx_carrier_errors = 0;
	210	stats->tx_fifo_errors = 0;
	211	stats->tx_heartbeat_errors = 0;
	212	stats->tx_window_errors = 0;
	213
	214	priv->pkstats.broadcast =
	215	be64_to_cpu(mlx4_en_stats->RBCAST_prio_0) +
	216	be64_to_cpu(mlx4_en_stats->RBCAST_prio_1) +
	217	be64_to_cpu(mlx4_en_stats->RBCAST_prio_2) +
	218	be64_to_cpu(mlx4_en_stats->RBCAST_prio_3) +
	219	be64_to_cpu(mlx4_en_stats->RBCAST_prio_4) +
	220	be64_to_cpu(mlx4_en_stats->RBCAST_prio_5) +
	221	be64_to_cpu(mlx4_en_stats->RBCAST_prio_6) +
	222	be64_to_cpu(mlx4_en_stats->RBCAST_prio_7) +
	223	be64_to_cpu(mlx4_en_stats->RBCAST_novlan);
	224	priv->pkstats.rx_prio[0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0);
	225	priv->pkstats.rx_prio[1] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1);
	226	priv->pkstats.rx_prio[2] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2);
	227	priv->pkstats.rx_prio[3] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3);
	228	priv->pkstats.rx_prio[4] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4);
	229	priv->pkstats.rx_prio[5] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5);
	230	priv->pkstats.rx_prio[6] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6);
	231	priv->pkstats.rx_prio[7] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7);
	232	priv->pkstats.tx_prio[0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0);
	233	priv->pkstats.tx_prio[1] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1);
	234	priv->pkstats.tx_prio[2] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2);
	235	priv->pkstats.tx_prio[3] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3);
	236	priv->pkstats.tx_prio[4] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4);
	237	priv->pkstats.tx_prio[5] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5);
	238	priv->pkstats.tx_prio[6] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6);
	239	priv->pkstats.tx_prio[7] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7);
	240	spin_unlock_bh(&priv->stats_lock);
	241
	242	out:
	243	mlx4_free_cmd_mailbox(mdev->dev, mailbox);
	244	return err;
	245	}
	246