[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / icm.c

/*
 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
 * Copyright (c) 2006, 2007 Cisco Systems, Inc.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/errno.h>
#include <linux/mm.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>

#include <linux/mlx4/cmd.h>

#include "mlx4.h"
#include "icm.h"
#include "fw.h"

/*
 * We allocate in as big chunks as we can, up to a maximum of 256 KB
 * per chunk.
 */
enum {
	MLX4_ICM_ALLOC_SIZE	= 1 << 18,
	MLX4_TABLE_CHUNK_SIZE	= 1 << 18
};

static void mlx4_free_icm_pages(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
{
	int i;

	if (chunk->nsg > 0)
		pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
			     PCI_DMA_BIDIRECTIONAL);

	for (i = 0; i < chunk->npages; ++i)
		__free_pages(sg_page(&chunk->mem[i]),
			     get_order(chunk->mem[i].length));
}

static void mlx4_free_icm_coherent(struct mlx4_dev *dev, struct mlx4_icm_chunk *chunk)
{
	int i;

	for (i = 0; i < chunk->npages; ++i)
		dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
				  lowmem_page_address(sg_page(&chunk->mem[i])),
				  sg_dma_address(&chunk->mem[i]));
}

void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent)
{
	struct mlx4_icm_chunk *chunk, *tmp;

	if (!icm)
		return;

	list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
		if (coherent)
			mlx4_free_icm_coherent(dev, chunk);
		else
			mlx4_free_icm_pages(dev, chunk);

		kfree(chunk);
	}

	kfree(icm);
}

static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask)
{
	struct page *page;

	page = alloc_pages(gfp_mask, order);
	if (!page)
		return -ENOMEM;

	sg_set_page(mem, page, PAGE_SIZE << order, 0);
	return 0;
}

static int mlx4_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
				    int order, gfp_t gfp_mask)
{
	void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order,
				       &sg_dma_address(mem), gfp_mask);
	if (!buf)
		return -ENOMEM;

	sg_set_buf(mem, buf, PAGE_SIZE << order);
	BUG_ON(mem->offset);
	sg_dma_len(mem) = PAGE_SIZE << order;
	return 0;
}

struct mlx4_icm *mlx4_alloc_icm(struct mlx4_dev *dev, int npages,
				gfp_t gfp_mask, int coherent)
{
	struct mlx4_icm *icm;
	struct mlx4_icm_chunk *chunk = NULL;
	int cur_order;
	int ret;

	/* We use sg_set_buf for coherent allocs, which assumes low memory */
	BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));

	icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
	if (!icm)
		return NULL;

	icm->refcount = 0;
	INIT_LIST_HEAD(&icm->chunk_list);

	cur_order = get_order(MLX4_ICM_ALLOC_SIZE);

	while (npages > 0) {
		if (!chunk) {
			chunk = kmalloc(sizeof *chunk,
					gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
			if (!chunk)
				goto fail;

			sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN);
			chunk->npages = 0;
			chunk->nsg    = 0;
			list_add_tail(&chunk->list, &icm->chunk_list);
		}

		while (1 << cur_order > npages)
			--cur_order;

		if (coherent)
			ret = mlx4_alloc_icm_coherent(&dev->pdev->dev,
						      &chunk->mem[chunk->npages],
						      cur_order, gfp_mask);
		else
			ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages],
						   cur_order, gfp_mask);

		if (ret) {
			if (--cur_order < 0)
				goto fail;
			else
				continue;
		}

		++chunk->npages;

		if (coherent)
			++chunk->nsg;
		else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
			chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
						chunk->npages,
						PCI_DMA_BIDIRECTIONAL);

			if (chunk->nsg <= 0)
				goto fail;
		}

		if (chunk->npages == MLX4_ICM_CHUNK_LEN)
			chunk = NULL;

		npages -= 1 << cur_order;
	}

	if (!coherent && chunk) {
		chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
					chunk->npages,
					PCI_DMA_BIDIRECTIONAL);

		if (chunk->nsg <= 0)
			goto fail;
	}

	return icm;

fail:
	mlx4_free_icm(dev, icm, coherent);
	return NULL;
}

static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt)
{
	return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
}

static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
{
	return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
			MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
}

int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm)
{
	return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
}

int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
{
	return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX,
			MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
}

int mlx4_table_get(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
{
	u32 i = (obj & (table->num_obj - 1)) /
			(MLX4_TABLE_CHUNK_SIZE / table->obj_size);
	int ret = 0;

	mutex_lock(&table->mutex);

	if (table->icm[i]) {
		++table->icm[i]->refcount;
		goto out;
	}

	table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
				       (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
				       __GFP_NOWARN, table->coherent);
	if (!table->icm[i]) {
		ret = -ENOMEM;
		goto out;
	}

	if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
			 (u64) i * MLX4_TABLE_CHUNK_SIZE)) {
		mlx4_free_icm(dev, table->icm[i], table->coherent);
		table->icm[i] = NULL;
		ret = -ENOMEM;
		goto out;
	}

	++table->icm[i]->refcount;

out:
	mutex_unlock(&table->mutex);
	return ret;
}

void mlx4_table_put(struct mlx4_dev *dev, struct mlx4_icm_table *table, u32 obj)
{
	u32 i;
	u64 offset;

	i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);

	mutex_lock(&table->mutex);

	if (--table->icm[i]->refcount == 0) {
		offset = (u64) i * MLX4_TABLE_CHUNK_SIZE;
		mlx4_UNMAP_ICM(dev, table->virt + offset,
			       MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
		mlx4_free_icm(dev, table->icm[i], table->coherent);
		table->icm[i] = NULL;
	}

	mutex_unlock(&table->mutex);
}

void *mlx4_table_find(struct mlx4_icm_table *table, u32 obj,
			dma_addr_t *dma_handle)
{
	int offset, dma_offset, i;
	u64 idx;
	struct mlx4_icm_chunk *chunk;
	struct mlx4_icm *icm;
	struct page *page = NULL;

	if (!table->lowmem)
		return NULL;

	mutex_lock(&table->mutex);

	idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size;
	icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
	dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;

	if (!icm)
		goto out;

	list_for_each_entry(chunk, &icm->chunk_list, list) {
		for (i = 0; i < chunk->npages; ++i) {
			if (dma_handle && dma_offset >= 0) {
				if (sg_dma_len(&chunk->mem[i]) > dma_offset)
					*dma_handle = sg_dma_address(&chunk->mem[i]) +
						dma_offset;
				dma_offset -= sg_dma_len(&chunk->mem[i]);
			}
			/*
			 * DMA mapping can merge pages but not split them,
			 * so if we found the page, dma_handle has already
			 * been assigned to.
			 */
			if (chunk->mem[i].length > offset) {
				page = sg_page(&chunk->mem[i]);
				goto out;
			}
			offset -= chunk->mem[i].length;
		}
	}

out:
	mutex_unlock(&table->mutex);
	return page ? lowmem_page_address(page) + offset : NULL;
}

int mlx4_table_get_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
			 u32 start, u32 end)
{
	int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
	int err;
	u32 i;

	for (i = start; i <= end; i += inc) {
		err = mlx4_table_get(dev, table, i);
		if (err)
			goto fail;
	}

	return 0;

fail:
	while (i > start) {
		i -= inc;
		mlx4_table_put(dev, table, i);
	}

	return err;
}

void mlx4_table_put_range(struct mlx4_dev *dev, struct mlx4_icm_table *table,
			  u32 start, u32 end)
{
	u32 i;

	for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
		mlx4_table_put(dev, table, i);
}

int mlx4_init_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table,
			u64 virt, int obj_size,	u32 nobj, int reserved,
			int use_lowmem, int use_coherent)
{
	int obj_per_chunk;
	int num_icm;
	unsigned chunk_size;
	int i;
	u64 size;

	obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
	num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;

	table->icm      = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
	if (!table->icm)
		return -ENOMEM;
	table->virt     = virt;
	table->num_icm  = num_icm;
	table->num_obj  = nobj;
	table->obj_size = obj_size;
	table->lowmem   = use_lowmem;
	table->coherent = use_coherent;
	mutex_init(&table->mutex);

	size = (u64) nobj * obj_size;
	for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
		chunk_size = MLX4_TABLE_CHUNK_SIZE;
		if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size)
			chunk_size = PAGE_ALIGN(size -
					i * MLX4_TABLE_CHUNK_SIZE);

		table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
					       (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
					       __GFP_NOWARN, use_coherent);
		if (!table->icm[i])
			goto err;
		if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
			mlx4_free_icm(dev, table->icm[i], use_coherent);
			table->icm[i] = NULL;
			goto err;
		}

		/*
		 * Add a reference to this ICM chunk so that it never
		 * gets freed (since it contains reserved firmware objects).
		 */
		++table->icm[i]->refcount;
	}

	return 0;

err:
	for (i = 0; i < num_icm; ++i)
		if (table->icm[i]) {
			mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
				       MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
			mlx4_free_icm(dev, table->icm[i], use_coherent);
		}

	kfree(table->icm);

	return -ENOMEM;
}

void mlx4_cleanup_icm_table(struct mlx4_dev *dev, struct mlx4_icm_table *table)
{
	int i;

	for (i = 0; i < table->num_icm; ++i)
		if (table->icm[i]) {
			mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
				       MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
			mlx4_free_icm(dev, table->icm[i], table->coherent);
		}

	kfree(table->icm);
}
Commit	Line	Data
225c7b1f	1	/*
51a379d0	2	* Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f RD	3	* Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
225c7b1f	34	#include <linux/errno.h>
9cbe05c7	35	#include <linux/mm.h>
5b0bf5e2	36	#include <linux/scatterlist.h>
5a0e3ad6	37	#include <linux/slab.h>
225c7b1f RD	38
	39	#include <linux/mlx4/cmd.h>
	40
	41	#include "mlx4.h"
	42	#include "icm.h"
	43	#include "fw.h"
	44
	45	/*
	46	* We allocate in as big chunks as we can, up to a maximum of 256 KB
	47	* per chunk.
	48	*/
	49	enum {
	50	MLX4_ICM_ALLOC_SIZE = 1 << 18,
	51	MLX4_TABLE_CHUNK_SIZE = 1 << 18
	52	};
	53
5b0bf5e2	54	static void mlx4_free_icm_pages(struct mlx4_dev dev, struct mlx4_icm_chunk chunk)
225c7b1f	55	{
225c7b1f RD	56	int i;
225c7b1f RD	57
5b0bf5e2 JM	58	if (chunk->nsg > 0)
	59	pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
	60	PCI_DMA_BIDIRECTIONAL);
	61
	62	for (i = 0; i < chunk->npages; ++i)
45711f1a	63	__free_pages(sg_page(&chunk->mem[i]),
5b0bf5e2 JM	64	get_order(chunk->mem[i].length));
5b0bf5e2 JM	65	}
225c7b1f	66
5b0bf5e2 JM	67	static void mlx4_free_icm_coherent(struct mlx4_dev dev, struct mlx4_icm_chunk chunk)
	68	{
	69	int i;
	70
	71	for (i = 0; i < chunk->npages; ++i)
	72	dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
45711f1a	73	lowmem_page_address(sg_page(&chunk->mem[i])),
5b0bf5e2 JM	74	sg_dma_address(&chunk->mem[i]));
	75	}
	76
	77	void mlx4_free_icm(struct mlx4_dev dev, struct mlx4_icm icm, int coherent)
	78	{
	79	struct mlx4_icm_chunk chunk, tmp;
	80
	81	if (!icm)
	82	return;
	83
	84	list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
	85	if (coherent)
	86	mlx4_free_icm_coherent(dev, chunk);
	87	else
	88	mlx4_free_icm_pages(dev, chunk);
225c7b1f RD	89
	90	kfree(chunk);
	91	}
	92
	93	kfree(icm);
	94	}
	95
5b0bf5e2 JM	96	static int mlx4_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask)
5b0bf5e2 JM	97	{
45711f1a JA	98	struct page *page;
	99
	100	page = alloc_pages(gfp_mask, order);
	101	if (!page)
5b0bf5e2 JM	102	return -ENOMEM;
5b0bf5e2 JM	103
642f1490	104	sg_set_page(mem, page, PAGE_SIZE << order, 0);
5b0bf5e2 JM	105	return 0;
	106	}
	107
	108	static int mlx4_alloc_icm_coherent(struct device dev, struct scatterlist mem,
	109	int order, gfp_t gfp_mask)
	110	{
	111	void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order,
	112	&sg_dma_address(mem), gfp_mask);
	113	if (!buf)
	114	return -ENOMEM;
	115
	116	sg_set_buf(mem, buf, PAGE_SIZE << order);
	117	BUG_ON(mem->offset);
	118	sg_dma_len(mem) = PAGE_SIZE << order;
	119	return 0;
	120	}
	121
225c7b1f	122	struct mlx4_icm mlx4_alloc_icm(struct mlx4_dev dev, int npages,
5b0bf5e2	123	gfp_t gfp_mask, int coherent)
225c7b1f RD	124	{
	125	struct mlx4_icm *icm;
	126	struct mlx4_icm_chunk *chunk = NULL;
	127	int cur_order;
5b0bf5e2 JM	128	int ret;
	129
	130	/* We use sg_set_buf for coherent allocs, which assumes low memory */
	131	BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
225c7b1f RD	132
	133	icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM \| __GFP_NOWARN));
	134	if (!icm)
5b0bf5e2	135	return NULL;
225c7b1f RD	136
	137	icm->refcount = 0;
	138	INIT_LIST_HEAD(&icm->chunk_list);
	139
	140	cur_order = get_order(MLX4_ICM_ALLOC_SIZE);
	141
	142	while (npages > 0) {
	143	if (!chunk) {
	144	chunk = kmalloc(sizeof *chunk,
	145	gfp_mask & ~(__GFP_HIGHMEM \| __GFP_NOWARN));
	146	if (!chunk)
	147	goto fail;
	148
45711f1a	149	sg_init_table(chunk->mem, MLX4_ICM_CHUNK_LEN);
225c7b1f RD	150	chunk->npages = 0;
	151	chunk->nsg = 0;
	152	list_add_tail(&chunk->list, &icm->chunk_list);
	153	}
	154
	155	while (1 << cur_order > npages)
	156	--cur_order;
	157
5b0bf5e2 JM	158	if (coherent)
	159	ret = mlx4_alloc_icm_coherent(&dev->pdev->dev,
	160	&chunk->mem[chunk->npages],
	161	cur_order, gfp_mask);
	162	else
	163	ret = mlx4_alloc_icm_pages(&chunk->mem[chunk->npages],
	164	cur_order, gfp_mask);
	165
c050def0 RD	166	if (ret) {
	167	if (--cur_order < 0)
	168	goto fail;
	169	else
	170	continue;
	171	}
225c7b1f	172
c050def0	173	++chunk->npages;
225c7b1f	174
c050def0 RD	175	if (coherent)
	176	++chunk->nsg;
	177	else if (chunk->npages == MLX4_ICM_CHUNK_LEN) {
	178	chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
	179	chunk->npages,
	180	PCI_DMA_BIDIRECTIONAL);
225c7b1f	181
c050def0	182	if (chunk->nsg <= 0)
225c7b1f RD	183	goto fail;
225c7b1f RD	184	}
c050def0 RD	185
	186	if (chunk->npages == MLX4_ICM_CHUNK_LEN)
	187	chunk = NULL;
	188
	189	npages -= 1 << cur_order;
225c7b1f RD	190	}
225c7b1f RD	191
5b0bf5e2	192	if (!coherent && chunk) {
225c7b1f RD	193	chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
	194	chunk->npages,
	195	PCI_DMA_BIDIRECTIONAL);
	196
	197	if (chunk->nsg <= 0)
	198	goto fail;
	199	}
	200
	201	return icm;
	202
	203	fail:
5b0bf5e2	204	mlx4_free_icm(dev, icm, coherent);
225c7b1f RD	205	return NULL;
	206	}
	207
	208	static int mlx4_MAP_ICM(struct mlx4_dev dev, struct mlx4_icm icm, u64 virt)
	209	{
	210	return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt);
	211	}
	212
9740d786	213	static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count)
225c7b1f RD	214	{
225c7b1f RD	215	return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM,
f9baff50	216	MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
225c7b1f RD	217	}
225c7b1f RD	218
225c7b1f RD	219	int mlx4_MAP_ICM_AUX(struct mlx4_dev dev, struct mlx4_icm icm)
	220	{
	221	return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1);
	222	}
	223
	224	int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev)
	225	{
f9baff50 JM	226	return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_UNMAP_ICM_AUX,
f9baff50 JM	227	MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
225c7b1f RD	228	}
225c7b1f RD	229
dd03e734	230	int mlx4_table_get(struct mlx4_dev dev, struct mlx4_icm_table table, u32 obj)
225c7b1f	231	{
dd03e734 YH	232	u32 i = (obj & (table->num_obj - 1)) /
dd03e734 YH	233	(MLX4_TABLE_CHUNK_SIZE / table->obj_size);
225c7b1f RD	234	int ret = 0;
	235
	236	mutex_lock(&table->mutex);
	237
	238	if (table->icm[i]) {
	239	++table->icm[i]->refcount;
	240	goto out;
	241	}
	242
	243	table->icm[i] = mlx4_alloc_icm(dev, MLX4_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
	244	(table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) \|
5b0bf5e2	245	__GFP_NOWARN, table->coherent);
225c7b1f RD	246	if (!table->icm[i]) {
	247	ret = -ENOMEM;
	248	goto out;
	249	}
	250
	251	if (mlx4_MAP_ICM(dev, table->icm[i], table->virt +
	252	(u64) i * MLX4_TABLE_CHUNK_SIZE)) {
5b0bf5e2	253	mlx4_free_icm(dev, table->icm[i], table->coherent);
225c7b1f RD	254	table->icm[i] = NULL;
	255	ret = -ENOMEM;
	256	goto out;
	257	}
	258
	259	++table->icm[i]->refcount;
	260
	261	out:
	262	mutex_unlock(&table->mutex);
	263	return ret;
	264	}
	265
dd03e734	266	void mlx4_table_put(struct mlx4_dev dev, struct mlx4_icm_table table, u32 obj)
225c7b1f	267	{
dd03e734 YH	268	u32 i;
dd03e734 YH	269	u64 offset;
225c7b1f RD	270
	271	i = (obj & (table->num_obj - 1)) / (MLX4_TABLE_CHUNK_SIZE / table->obj_size);
	272
	273	mutex_lock(&table->mutex);
	274
	275	if (--table->icm[i]->refcount == 0) {
dd03e734 YH	276	offset = (u64) i * MLX4_TABLE_CHUNK_SIZE;
dd03e734 YH	277	mlx4_UNMAP_ICM(dev, table->virt + offset,
225c7b1f	278	MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
5b0bf5e2	279	mlx4_free_icm(dev, table->icm[i], table->coherent);
225c7b1f RD	280	table->icm[i] = NULL;
	281	}
	282
	283	mutex_unlock(&table->mutex);
	284	}
	285
dd03e734 YH	286	void mlx4_table_find(struct mlx4_icm_table table, u32 obj,
dd03e734 YH	287	dma_addr_t *dma_handle)
225c7b1f	288	{
dd03e734 YH	289	int offset, dma_offset, i;
dd03e734 YH	290	u64 idx;
225c7b1f RD	291	struct mlx4_icm_chunk *chunk;
	292	struct mlx4_icm *icm;
	293	struct page *page = NULL;
	294
	295	if (!table->lowmem)
	296	return NULL;
	297
	298	mutex_lock(&table->mutex);
	299
dd03e734	300	idx = (u64) (obj & (table->num_obj - 1)) * table->obj_size;
d7bb58fb JM	301	icm = table->icm[idx / MLX4_TABLE_CHUNK_SIZE];
d7bb58fb JM	302	dma_offset = offset = idx % MLX4_TABLE_CHUNK_SIZE;
225c7b1f RD	303
	304	if (!icm)
	305	goto out;
	306
	307	list_for_each_entry(chunk, &icm->chunk_list, list) {
	308	for (i = 0; i < chunk->npages; ++i) {
d7bb58fb JM	309	if (dma_handle && dma_offset >= 0) {
	310	if (sg_dma_len(&chunk->mem[i]) > dma_offset)
	311	*dma_handle = sg_dma_address(&chunk->mem[i]) +
	312	dma_offset;
	313	dma_offset -= sg_dma_len(&chunk->mem[i]);
	314	}
	315	/*
	316	* DMA mapping can merge pages but not split them,
	317	* so if we found the page, dma_handle has already
	318	* been assigned to.
	319	*/
225c7b1f	320	if (chunk->mem[i].length > offset) {
45711f1a	321	page = sg_page(&chunk->mem[i]);
225c7b1f RD	322	goto out;
	323	}
	324	offset -= chunk->mem[i].length;
	325	}
	326	}
	327
	328	out:
	329	mutex_unlock(&table->mutex);
	330	return page ? lowmem_page_address(page) + offset : NULL;
	331	}
	332
	333	int mlx4_table_get_range(struct mlx4_dev dev, struct mlx4_icm_table table,
dd03e734	334	u32 start, u32 end)
225c7b1f RD	335	{
225c7b1f RD	336	int inc = MLX4_TABLE_CHUNK_SIZE / table->obj_size;
dd03e734 YH	337	int err;
dd03e734 YH	338	u32 i;
225c7b1f RD	339
	340	for (i = start; i <= end; i += inc) {
	341	err = mlx4_table_get(dev, table, i);
	342	if (err)
	343	goto fail;
	344	}
	345
	346	return 0;
	347
	348	fail:
	349	while (i > start) {
	350	i -= inc;
	351	mlx4_table_put(dev, table, i);
	352	}
	353
	354	return err;
	355	}
	356
	357	void mlx4_table_put_range(struct mlx4_dev dev, struct mlx4_icm_table table,
dd03e734	358	u32 start, u32 end)
225c7b1f	359	{
dd03e734	360	u32 i;
225c7b1f RD	361
	362	for (i = start; i <= end; i += MLX4_TABLE_CHUNK_SIZE / table->obj_size)
	363	mlx4_table_put(dev, table, i);
	364	}
	365
	366	int mlx4_init_icm_table(struct mlx4_dev dev, struct mlx4_icm_table table,
3de819e6	367	u64 virt, int obj_size, u32 nobj, int reserved,
5b0bf5e2	368	int use_lowmem, int use_coherent)
225c7b1f RD	369	{
	370	int obj_per_chunk;
	371	int num_icm;
	372	unsigned chunk_size;
	373	int i;
3de819e6	374	u64 size;
225c7b1f RD	375
	376	obj_per_chunk = MLX4_TABLE_CHUNK_SIZE / obj_size;
	377	num_icm = (nobj + obj_per_chunk - 1) / obj_per_chunk;
	378
	379	table->icm = kcalloc(num_icm, sizeof *table->icm, GFP_KERNEL);
	380	if (!table->icm)
	381	return -ENOMEM;
	382	table->virt = virt;
	383	table->num_icm = num_icm;
	384	table->num_obj = nobj;
	385	table->obj_size = obj_size;
	386	table->lowmem = use_lowmem;
5b0bf5e2	387	table->coherent = use_coherent;
225c7b1f RD	388	mutex_init(&table->mutex);
225c7b1f RD	389
3de819e6	390	size = (u64) nobj * obj_size;
225c7b1f RD	391	for (i = 0; i * MLX4_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
225c7b1f RD	392	chunk_size = MLX4_TABLE_CHUNK_SIZE;
3de819e6 YH	393	if ((i + 1) * MLX4_TABLE_CHUNK_SIZE > size)
	394	chunk_size = PAGE_ALIGN(size -
	395	i * MLX4_TABLE_CHUNK_SIZE);
225c7b1f RD	396
	397	table->icm[i] = mlx4_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
	398	(use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) \|
5b0bf5e2	399	__GFP_NOWARN, use_coherent);
225c7b1f RD	400	if (!table->icm[i])
	401	goto err;
	402	if (mlx4_MAP_ICM(dev, table->icm[i], virt + i * MLX4_TABLE_CHUNK_SIZE)) {
5b0bf5e2	403	mlx4_free_icm(dev, table->icm[i], use_coherent);
225c7b1f RD	404	table->icm[i] = NULL;
	405	goto err;
	406	}
	407
	408	/*
	409	* Add a reference to this ICM chunk so that it never
	410	* gets freed (since it contains reserved firmware objects).
	411	*/
	412	++table->icm[i]->refcount;
	413	}
	414
	415	return 0;
	416
	417	err:
	418	for (i = 0; i < num_icm; ++i)
	419	if (table->icm[i]) {
	420	mlx4_UNMAP_ICM(dev, virt + i * MLX4_TABLE_CHUNK_SIZE,
	421	MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
5b0bf5e2	422	mlx4_free_icm(dev, table->icm[i], use_coherent);
225c7b1f RD	423	}
225c7b1f RD	424
240a9207 DB	425	kfree(table->icm);
240a9207 DB	426
225c7b1f RD	427	return -ENOMEM;
	428	}
	429
	430	void mlx4_cleanup_icm_table(struct mlx4_dev dev, struct mlx4_icm_table table)
	431	{
	432	int i;
	433
	434	for (i = 0; i < table->num_icm; ++i)
	435	if (table->icm[i]) {
	436	mlx4_UNMAP_ICM(dev, table->virt + i * MLX4_TABLE_CHUNK_SIZE,
	437	MLX4_TABLE_CHUNK_SIZE / MLX4_ICM_PAGE_SIZE);
5b0bf5e2	438	mlx4_free_icm(dev, table->icm[i], table->coherent);
225c7b1f RD	439	}
	440
	441	kfree(table->icm);
	442	}