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225c7b1f RD |
1 | /* |
2 | * Copyright (c) 2004 Topspin Communications. All rights reserved. | |
51a379d0 | 3 | * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. |
225c7b1f RD |
4 | * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. |
5 | * | |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | */ | |
34 | ||
225c7b1f | 35 | #include <linux/errno.h> |
ee40fa06 | 36 | #include <linux/export.h> |
5a0e3ad6 | 37 | #include <linux/slab.h> |
225c7b1f RD |
38 | |
39 | #include <linux/mlx4/cmd.h> | |
40 | ||
41 | #include "mlx4.h" | |
42 | #include "icm.h" | |
43 | ||
44 | /* | |
45 | * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. | |
46 | */ | |
47 | struct mlx4_mpt_entry { | |
48 | __be32 flags; | |
49 | __be32 qpn; | |
50 | __be32 key; | |
95d04f07 | 51 | __be32 pd_flags; |
225c7b1f RD |
52 | __be64 start; |
53 | __be64 length; | |
54 | __be32 lkey; | |
55 | __be32 win_cnt; | |
56 | u8 reserved1[3]; | |
57 | u8 mtt_rep; | |
58 | __be64 mtt_seg; | |
59 | __be32 mtt_sz; | |
60 | __be32 entity_size; | |
61 | __be32 first_byte_offset; | |
ba2d3587 | 62 | } __packed; |
225c7b1f RD |
63 | |
64 | #define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) | |
95d04f07 | 65 | #define MLX4_MPT_FLAG_FREE (0x3UL << 28) |
225c7b1f RD |
66 | #define MLX4_MPT_FLAG_MIO (1 << 17) |
67 | #define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15) | |
68 | #define MLX4_MPT_FLAG_PHYSICAL (1 << 9) | |
69 | #define MLX4_MPT_FLAG_REGION (1 << 8) | |
70 | ||
c9257433 VS |
71 | #define MLX4_MPT_PD_FLAG_FAST_REG (1 << 27) |
72 | #define MLX4_MPT_PD_FLAG_RAE (1 << 28) | |
95d04f07 RD |
73 | #define MLX4_MPT_PD_FLAG_EN_INV (3 << 24) |
74 | ||
8ad11fb6 JM |
75 | #define MLX4_MPT_STATUS_SW 0xF0 |
76 | #define MLX4_MPT_STATUS_HW 0x00 | |
77 | ||
225c7b1f RD |
78 | static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order) |
79 | { | |
80 | int o; | |
81 | int m; | |
82 | u32 seg; | |
83 | ||
84 | spin_lock(&buddy->lock); | |
85 | ||
e4044cfc RD |
86 | for (o = order; o <= buddy->max_order; ++o) |
87 | if (buddy->num_free[o]) { | |
88 | m = 1 << (buddy->max_order - o); | |
89 | seg = find_first_bit(buddy->bits[o], m); | |
90 | if (seg < m) | |
91 | goto found; | |
92 | } | |
225c7b1f RD |
93 | |
94 | spin_unlock(&buddy->lock); | |
95 | return -1; | |
96 | ||
97 | found: | |
98 | clear_bit(seg, buddy->bits[o]); | |
e4044cfc | 99 | --buddy->num_free[o]; |
225c7b1f RD |
100 | |
101 | while (o > order) { | |
102 | --o; | |
103 | seg <<= 1; | |
104 | set_bit(seg ^ 1, buddy->bits[o]); | |
e4044cfc | 105 | ++buddy->num_free[o]; |
225c7b1f RD |
106 | } |
107 | ||
108 | spin_unlock(&buddy->lock); | |
109 | ||
110 | seg <<= order; | |
111 | ||
112 | return seg; | |
113 | } | |
114 | ||
115 | static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order) | |
116 | { | |
117 | seg >>= order; | |
118 | ||
119 | spin_lock(&buddy->lock); | |
120 | ||
121 | while (test_bit(seg ^ 1, buddy->bits[order])) { | |
122 | clear_bit(seg ^ 1, buddy->bits[order]); | |
e4044cfc | 123 | --buddy->num_free[order]; |
225c7b1f RD |
124 | seg >>= 1; |
125 | ++order; | |
126 | } | |
127 | ||
128 | set_bit(seg, buddy->bits[order]); | |
e4044cfc | 129 | ++buddy->num_free[order]; |
225c7b1f RD |
130 | |
131 | spin_unlock(&buddy->lock); | |
132 | } | |
133 | ||
e8f9b2ed | 134 | static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order) |
225c7b1f RD |
135 | { |
136 | int i, s; | |
137 | ||
138 | buddy->max_order = max_order; | |
139 | spin_lock_init(&buddy->lock); | |
140 | ||
141 | buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), | |
142 | GFP_KERNEL); | |
a8312755 | 143 | buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free, |
e4044cfc RD |
144 | GFP_KERNEL); |
145 | if (!buddy->bits || !buddy->num_free) | |
225c7b1f RD |
146 | goto err_out; |
147 | ||
148 | for (i = 0; i <= buddy->max_order; ++i) { | |
149 | s = BITS_TO_LONGS(1 << (buddy->max_order - i)); | |
150 | buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL); | |
151 | if (!buddy->bits[i]) | |
152 | goto err_out_free; | |
153 | bitmap_zero(buddy->bits[i], 1 << (buddy->max_order - i)); | |
154 | } | |
155 | ||
156 | set_bit(0, buddy->bits[buddy->max_order]); | |
e4044cfc | 157 | buddy->num_free[buddy->max_order] = 1; |
225c7b1f RD |
158 | |
159 | return 0; | |
160 | ||
161 | err_out_free: | |
162 | for (i = 0; i <= buddy->max_order; ++i) | |
163 | kfree(buddy->bits[i]); | |
164 | ||
e4044cfc | 165 | err_out: |
225c7b1f | 166 | kfree(buddy->bits); |
e4044cfc | 167 | kfree(buddy->num_free); |
225c7b1f | 168 | |
225c7b1f RD |
169 | return -ENOMEM; |
170 | } | |
171 | ||
172 | static void mlx4_buddy_cleanup(struct mlx4_buddy *buddy) | |
173 | { | |
174 | int i; | |
175 | ||
176 | for (i = 0; i <= buddy->max_order; ++i) | |
177 | kfree(buddy->bits[i]); | |
178 | ||
179 | kfree(buddy->bits); | |
e4044cfc | 180 | kfree(buddy->num_free); |
225c7b1f RD |
181 | } |
182 | ||
183 | static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) | |
184 | { | |
185 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
186 | u32 seg; | |
187 | ||
188 | seg = mlx4_buddy_alloc(&mr_table->mtt_buddy, order); | |
189 | if (seg == -1) | |
190 | return -1; | |
191 | ||
192 | if (mlx4_table_get_range(dev, &mr_table->mtt_table, seg, | |
193 | seg + (1 << order) - 1)) { | |
194 | mlx4_buddy_free(&mr_table->mtt_buddy, seg, order); | |
195 | return -1; | |
196 | } | |
197 | ||
198 | return seg; | |
199 | } | |
200 | ||
201 | int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, | |
202 | struct mlx4_mtt *mtt) | |
203 | { | |
204 | int i; | |
205 | ||
206 | if (!npages) { | |
207 | mtt->order = -1; | |
208 | mtt->page_shift = MLX4_ICM_PAGE_SHIFT; | |
209 | return 0; | |
210 | } else | |
211 | mtt->page_shift = page_shift; | |
212 | ||
ab6bf42e | 213 | for (mtt->order = 0, i = dev->caps.mtts_per_seg; i < npages; i <<= 1) |
225c7b1f RD |
214 | ++mtt->order; |
215 | ||
216 | mtt->first_seg = mlx4_alloc_mtt_range(dev, mtt->order); | |
217 | if (mtt->first_seg == -1) | |
218 | return -ENOMEM; | |
219 | ||
220 | return 0; | |
221 | } | |
222 | EXPORT_SYMBOL_GPL(mlx4_mtt_init); | |
223 | ||
224 | void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt) | |
225 | { | |
226 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
227 | ||
228 | if (mtt->order < 0) | |
229 | return; | |
230 | ||
231 | mlx4_buddy_free(&mr_table->mtt_buddy, mtt->first_seg, mtt->order); | |
232 | mlx4_table_put_range(dev, &mr_table->mtt_table, mtt->first_seg, | |
233 | mtt->first_seg + (1 << mtt->order) - 1); | |
234 | } | |
235 | EXPORT_SYMBOL_GPL(mlx4_mtt_cleanup); | |
236 | ||
237 | u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt) | |
238 | { | |
239 | return (u64) mtt->first_seg * dev->caps.mtt_entry_sz; | |
240 | } | |
241 | EXPORT_SYMBOL_GPL(mlx4_mtt_addr); | |
242 | ||
243 | static u32 hw_index_to_key(u32 ind) | |
244 | { | |
245 | return (ind >> 24) | (ind << 8); | |
246 | } | |
247 | ||
248 | static u32 key_to_hw_index(u32 key) | |
249 | { | |
250 | return (key << 24) | (key >> 8); | |
251 | } | |
252 | ||
253 | static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |
254 | int mpt_index) | |
255 | { | |
256 | return mlx4_cmd(dev, mailbox->dma, mpt_index, 0, MLX4_CMD_SW2HW_MPT, | |
257 | MLX4_CMD_TIME_CLASS_B); | |
258 | } | |
259 | ||
260 | static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |
261 | int mpt_index) | |
262 | { | |
263 | return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, | |
264 | !mailbox, MLX4_CMD_HW2SW_MPT, MLX4_CMD_TIME_CLASS_B); | |
265 | } | |
266 | ||
267 | int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, | |
268 | int npages, int page_shift, struct mlx4_mr *mr) | |
269 | { | |
270 | struct mlx4_priv *priv = mlx4_priv(dev); | |
271 | u32 index; | |
272 | int err; | |
273 | ||
274 | index = mlx4_bitmap_alloc(&priv->mr_table.mpt_bitmap); | |
0172e2e1 JM |
275 | if (index == -1) |
276 | return -ENOMEM; | |
225c7b1f RD |
277 | |
278 | mr->iova = iova; | |
279 | mr->size = size; | |
280 | mr->pd = pd; | |
281 | mr->access = access; | |
282 | mr->enabled = 0; | |
283 | mr->key = hw_index_to_key(index); | |
284 | ||
285 | err = mlx4_mtt_init(dev, npages, page_shift, &mr->mtt); | |
286 | if (err) | |
0172e2e1 | 287 | mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, index); |
225c7b1f | 288 | |
225c7b1f RD |
289 | return err; |
290 | } | |
291 | EXPORT_SYMBOL_GPL(mlx4_mr_alloc); | |
292 | ||
293 | void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr) | |
294 | { | |
295 | struct mlx4_priv *priv = mlx4_priv(dev); | |
296 | int err; | |
297 | ||
298 | if (mr->enabled) { | |
299 | err = mlx4_HW2SW_MPT(dev, NULL, | |
300 | key_to_hw_index(mr->key) & | |
301 | (dev->caps.num_mpts - 1)); | |
302 | if (err) | |
303 | mlx4_warn(dev, "HW2SW_MPT failed (%d)\n", err); | |
304 | } | |
305 | ||
306 | mlx4_mtt_cleanup(dev, &mr->mtt); | |
307 | mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, key_to_hw_index(mr->key)); | |
308 | } | |
309 | EXPORT_SYMBOL_GPL(mlx4_mr_free); | |
310 | ||
311 | int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr) | |
312 | { | |
313 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
314 | struct mlx4_cmd_mailbox *mailbox; | |
315 | struct mlx4_mpt_entry *mpt_entry; | |
316 | int err; | |
317 | ||
318 | err = mlx4_table_get(dev, &mr_table->dmpt_table, key_to_hw_index(mr->key)); | |
319 | if (err) | |
320 | return err; | |
321 | ||
322 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
323 | if (IS_ERR(mailbox)) { | |
324 | err = PTR_ERR(mailbox); | |
325 | goto err_table; | |
326 | } | |
327 | mpt_entry = mailbox->buf; | |
328 | ||
329 | memset(mpt_entry, 0, sizeof *mpt_entry); | |
330 | ||
95d04f07 | 331 | mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO | |
225c7b1f RD |
332 | MLX4_MPT_FLAG_REGION | |
333 | mr->access); | |
225c7b1f RD |
334 | |
335 | mpt_entry->key = cpu_to_be32(key_to_hw_index(mr->key)); | |
95d04f07 | 336 | mpt_entry->pd_flags = cpu_to_be32(mr->pd | MLX4_MPT_PD_FLAG_EN_INV); |
225c7b1f RD |
337 | mpt_entry->start = cpu_to_be64(mr->iova); |
338 | mpt_entry->length = cpu_to_be64(mr->size); | |
339 | mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift); | |
95d04f07 | 340 | |
b2d9308a JM |
341 | if (mr->mtt.order < 0) { |
342 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL); | |
343 | mpt_entry->mtt_seg = 0; | |
95d04f07 | 344 | } else { |
b2d9308a | 345 | mpt_entry->mtt_seg = cpu_to_be64(mlx4_mtt_addr(dev, &mr->mtt)); |
95d04f07 RD |
346 | } |
347 | ||
348 | if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) { | |
349 | /* fast register MR in free state */ | |
350 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE); | |
c9257433 VS |
351 | mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG | |
352 | MLX4_MPT_PD_FLAG_RAE); | |
353 | mpt_entry->mtt_sz = cpu_to_be32((1 << mr->mtt.order) * | |
ab6bf42e | 354 | dev->caps.mtts_per_seg); |
95d04f07 RD |
355 | } else { |
356 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS); | |
357 | } | |
225c7b1f RD |
358 | |
359 | err = mlx4_SW2HW_MPT(dev, mailbox, | |
360 | key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1)); | |
361 | if (err) { | |
362 | mlx4_warn(dev, "SW2HW_MPT failed (%d)\n", err); | |
363 | goto err_cmd; | |
364 | } | |
365 | ||
366 | mr->enabled = 1; | |
367 | ||
368 | mlx4_free_cmd_mailbox(dev, mailbox); | |
369 | ||
370 | return 0; | |
371 | ||
372 | err_cmd: | |
373 | mlx4_free_cmd_mailbox(dev, mailbox); | |
374 | ||
375 | err_table: | |
376 | mlx4_table_put(dev, &mr_table->dmpt_table, key_to_hw_index(mr->key)); | |
377 | return err; | |
378 | } | |
379 | EXPORT_SYMBOL_GPL(mlx4_mr_enable); | |
380 | ||
d7bb58fb JM |
381 | static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
382 | int start_index, int npages, u64 *page_list) | |
225c7b1f | 383 | { |
d7bb58fb JM |
384 | struct mlx4_priv *priv = mlx4_priv(dev); |
385 | __be64 *mtts; | |
386 | dma_addr_t dma_handle; | |
387 | int i; | |
388 | int s = start_index * sizeof (u64); | |
389 | ||
390 | /* All MTTs must fit in the same page */ | |
391 | if (start_index / (PAGE_SIZE / sizeof (u64)) != | |
392 | (start_index + npages - 1) / (PAGE_SIZE / sizeof (u64))) | |
393 | return -EINVAL; | |
394 | ||
ab6bf42e | 395 | if (start_index & (dev->caps.mtts_per_seg - 1)) |
d7bb58fb JM |
396 | return -EINVAL; |
397 | ||
398 | mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->first_seg + | |
399 | s / dev->caps.mtt_entry_sz, &dma_handle); | |
400 | if (!mtts) | |
401 | return -ENOMEM; | |
402 | ||
e727f5cd RD |
403 | dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle, |
404 | npages * sizeof (u64), DMA_TO_DEVICE); | |
405 | ||
d7bb58fb JM |
406 | for (i = 0; i < npages; ++i) |
407 | mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); | |
408 | ||
e727f5cd RD |
409 | dma_sync_single_for_device(&dev->pdev->dev, dma_handle, |
410 | npages * sizeof (u64), DMA_TO_DEVICE); | |
d7bb58fb JM |
411 | |
412 | return 0; | |
225c7b1f RD |
413 | } |
414 | ||
415 | int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | |
416 | int start_index, int npages, u64 *page_list) | |
417 | { | |
d7bb58fb JM |
418 | int chunk; |
419 | int err; | |
225c7b1f RD |
420 | |
421 | if (mtt->order < 0) | |
422 | return -EINVAL; | |
423 | ||
225c7b1f | 424 | while (npages > 0) { |
d7bb58fb JM |
425 | chunk = min_t(int, PAGE_SIZE / sizeof(u64), npages); |
426 | err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list); | |
225c7b1f | 427 | if (err) |
d7bb58fb | 428 | return err; |
225c7b1f | 429 | |
d7bb58fb JM |
430 | npages -= chunk; |
431 | start_index += chunk; | |
432 | page_list += chunk; | |
225c7b1f RD |
433 | } |
434 | ||
d7bb58fb | 435 | return 0; |
225c7b1f RD |
436 | } |
437 | EXPORT_SYMBOL_GPL(mlx4_write_mtt); | |
438 | ||
439 | int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | |
440 | struct mlx4_buf *buf) | |
441 | { | |
442 | u64 *page_list; | |
443 | int err; | |
444 | int i; | |
445 | ||
446 | page_list = kmalloc(buf->npages * sizeof *page_list, GFP_KERNEL); | |
447 | if (!page_list) | |
448 | return -ENOMEM; | |
449 | ||
450 | for (i = 0; i < buf->npages; ++i) | |
451 | if (buf->nbufs == 1) | |
b57aacfa | 452 | page_list[i] = buf->direct.map + (i << buf->page_shift); |
225c7b1f | 453 | else |
b57aacfa | 454 | page_list[i] = buf->page_list[i].map; |
225c7b1f RD |
455 | |
456 | err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list); | |
457 | ||
458 | kfree(page_list); | |
459 | return err; | |
460 | } | |
461 | EXPORT_SYMBOL_GPL(mlx4_buf_write_mtt); | |
462 | ||
3d73c288 | 463 | int mlx4_init_mr_table(struct mlx4_dev *dev) |
225c7b1f RD |
464 | { |
465 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
466 | int err; | |
467 | ||
468 | err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts, | |
93fc9e1b | 469 | ~0, dev->caps.reserved_mrws, 0); |
225c7b1f RD |
470 | if (err) |
471 | return err; | |
472 | ||
473 | err = mlx4_buddy_init(&mr_table->mtt_buddy, | |
474 | ilog2(dev->caps.num_mtt_segs)); | |
475 | if (err) | |
476 | goto err_buddy; | |
477 | ||
478 | if (dev->caps.reserved_mtts) { | |
cf78237d | 479 | if (mlx4_alloc_mtt_range(dev, fls(dev->caps.reserved_mtts - 1)) == -1) { |
225c7b1f RD |
480 | mlx4_warn(dev, "MTT table of order %d is too small.\n", |
481 | mr_table->mtt_buddy.max_order); | |
482 | err = -ENOMEM; | |
483 | goto err_reserve_mtts; | |
484 | } | |
485 | } | |
486 | ||
487 | return 0; | |
488 | ||
489 | err_reserve_mtts: | |
490 | mlx4_buddy_cleanup(&mr_table->mtt_buddy); | |
491 | ||
492 | err_buddy: | |
493 | mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); | |
494 | ||
495 | return err; | |
496 | } | |
497 | ||
498 | void mlx4_cleanup_mr_table(struct mlx4_dev *dev) | |
499 | { | |
500 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
501 | ||
502 | mlx4_buddy_cleanup(&mr_table->mtt_buddy); | |
503 | mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); | |
504 | } | |
8ad11fb6 JM |
505 | |
506 | static inline int mlx4_check_fmr(struct mlx4_fmr *fmr, u64 *page_list, | |
507 | int npages, u64 iova) | |
508 | { | |
509 | int i, page_mask; | |
510 | ||
511 | if (npages > fmr->max_pages) | |
512 | return -EINVAL; | |
513 | ||
514 | page_mask = (1 << fmr->page_shift) - 1; | |
515 | ||
516 | /* We are getting page lists, so va must be page aligned. */ | |
517 | if (iova & page_mask) | |
518 | return -EINVAL; | |
519 | ||
520 | /* Trust the user not to pass misaligned data in page_list */ | |
521 | if (0) | |
522 | for (i = 0; i < npages; ++i) { | |
523 | if (page_list[i] & ~page_mask) | |
524 | return -EINVAL; | |
525 | } | |
526 | ||
527 | if (fmr->maps >= fmr->max_maps) | |
528 | return -EINVAL; | |
529 | ||
530 | return 0; | |
531 | } | |
532 | ||
533 | int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, | |
534 | int npages, u64 iova, u32 *lkey, u32 *rkey) | |
535 | { | |
536 | u32 key; | |
537 | int i, err; | |
538 | ||
539 | err = mlx4_check_fmr(fmr, page_list, npages, iova); | |
540 | if (err) | |
541 | return err; | |
542 | ||
543 | ++fmr->maps; | |
544 | ||
545 | key = key_to_hw_index(fmr->mr.key); | |
546 | key += dev->caps.num_mpts; | |
547 | *lkey = *rkey = fmr->mr.key = hw_index_to_key(key); | |
548 | ||
549 | *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW; | |
550 | ||
551 | /* Make sure MPT status is visible before writing MTT entries */ | |
552 | wmb(); | |
553 | ||
e727f5cd RD |
554 | dma_sync_single_for_cpu(&dev->pdev->dev, fmr->dma_handle, |
555 | npages * sizeof(u64), DMA_TO_DEVICE); | |
556 | ||
8ad11fb6 JM |
557 | for (i = 0; i < npages; ++i) |
558 | fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); | |
559 | ||
e727f5cd RD |
560 | dma_sync_single_for_device(&dev->pdev->dev, fmr->dma_handle, |
561 | npages * sizeof(u64), DMA_TO_DEVICE); | |
8ad11fb6 JM |
562 | |
563 | fmr->mpt->key = cpu_to_be32(key); | |
564 | fmr->mpt->lkey = cpu_to_be32(key); | |
565 | fmr->mpt->length = cpu_to_be64(npages * (1ull << fmr->page_shift)); | |
566 | fmr->mpt->start = cpu_to_be64(iova); | |
567 | ||
568 | /* Make MTT entries are visible before setting MPT status */ | |
569 | wmb(); | |
570 | ||
571 | *(u8 *) fmr->mpt = MLX4_MPT_STATUS_HW; | |
572 | ||
573 | /* Make sure MPT status is visible before consumer can use FMR */ | |
574 | wmb(); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | EXPORT_SYMBOL_GPL(mlx4_map_phys_fmr); | |
579 | ||
580 | int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages, | |
581 | int max_maps, u8 page_shift, struct mlx4_fmr *fmr) | |
582 | { | |
583 | struct mlx4_priv *priv = mlx4_priv(dev); | |
584 | u64 mtt_seg; | |
585 | int err = -ENOMEM; | |
586 | ||
c5057ddc | 587 | if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32) |
8ad11fb6 JM |
588 | return -EINVAL; |
589 | ||
590 | /* All MTTs must fit in the same page */ | |
591 | if (max_pages * sizeof *fmr->mtts > PAGE_SIZE) | |
592 | return -EINVAL; | |
593 | ||
594 | fmr->page_shift = page_shift; | |
595 | fmr->max_pages = max_pages; | |
596 | fmr->max_maps = max_maps; | |
597 | fmr->maps = 0; | |
598 | ||
599 | err = mlx4_mr_alloc(dev, pd, 0, 0, access, max_pages, | |
600 | page_shift, &fmr->mr); | |
601 | if (err) | |
602 | return err; | |
603 | ||
604 | mtt_seg = fmr->mr.mtt.first_seg * dev->caps.mtt_entry_sz; | |
605 | ||
606 | fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table, | |
607 | fmr->mr.mtt.first_seg, | |
608 | &fmr->dma_handle); | |
609 | if (!fmr->mtts) { | |
610 | err = -ENOMEM; | |
611 | goto err_free; | |
612 | } | |
613 | ||
8ad11fb6 JM |
614 | return 0; |
615 | ||
616 | err_free: | |
617 | mlx4_mr_free(dev, &fmr->mr); | |
618 | return err; | |
619 | } | |
620 | EXPORT_SYMBOL_GPL(mlx4_fmr_alloc); | |
621 | ||
622 | int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr) | |
623 | { | |
11e75a74 JM |
624 | struct mlx4_priv *priv = mlx4_priv(dev); |
625 | int err; | |
626 | ||
627 | err = mlx4_mr_enable(dev, &fmr->mr); | |
628 | if (err) | |
629 | return err; | |
630 | ||
631 | fmr->mpt = mlx4_table_find(&priv->mr_table.dmpt_table, | |
632 | key_to_hw_index(fmr->mr.key), NULL); | |
633 | if (!fmr->mpt) | |
634 | return -ENOMEM; | |
635 | ||
636 | return 0; | |
8ad11fb6 JM |
637 | } |
638 | EXPORT_SYMBOL_GPL(mlx4_fmr_enable); | |
639 | ||
640 | void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr, | |
641 | u32 *lkey, u32 *rkey) | |
642 | { | |
8ad11fb6 JM |
643 | if (!fmr->maps) |
644 | return; | |
645 | ||
8ad11fb6 JM |
646 | fmr->maps = 0; |
647 | ||
648 | *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW; | |
649 | } | |
650 | EXPORT_SYMBOL_GPL(mlx4_fmr_unmap); | |
651 | ||
652 | int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr) | |
653 | { | |
654 | if (fmr->maps) | |
655 | return -EBUSY; | |
656 | ||
657 | fmr->mr.enabled = 0; | |
658 | mlx4_mr_free(dev, &fmr->mr); | |
659 | ||
660 | return 0; | |
661 | } | |
662 | EXPORT_SYMBOL_GPL(mlx4_fmr_free); | |
663 | ||
664 | int mlx4_SYNC_TPT(struct mlx4_dev *dev) | |
665 | { | |
666 | return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT, 1000); | |
667 | } | |
668 | EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT); |