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225c7b1f RD |
1 | /* |
2 | * Copyright (c) 2004 Topspin Communications. All rights reserved. | |
51a379d0 | 3 | * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. |
225c7b1f RD |
4 | * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. |
5 | * | |
6 | * This software is available to you under a choice of one of two | |
7 | * licenses. You may choose to be licensed under the terms of the GNU | |
8 | * General Public License (GPL) Version 2, available from the file | |
9 | * COPYING in the main directory of this source tree, or the | |
10 | * OpenIB.org BSD license below: | |
11 | * | |
12 | * Redistribution and use in source and binary forms, with or | |
13 | * without modification, are permitted provided that the following | |
14 | * conditions are met: | |
15 | * | |
16 | * - Redistributions of source code must retain the above | |
17 | * copyright notice, this list of conditions and the following | |
18 | * disclaimer. | |
19 | * | |
20 | * - Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials | |
23 | * provided with the distribution. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
32 | * SOFTWARE. | |
33 | */ | |
34 | ||
ea51b377 | 35 | #include <linux/init.h> |
225c7b1f | 36 | #include <linux/errno.h> |
ee40fa06 | 37 | #include <linux/export.h> |
5a0e3ad6 | 38 | #include <linux/slab.h> |
ea51b377 | 39 | #include <linux/kernel.h> |
225c7b1f RD |
40 | |
41 | #include <linux/mlx4/cmd.h> | |
42 | ||
43 | #include "mlx4.h" | |
44 | #include "icm.h" | |
45 | ||
46 | /* | |
47 | * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits. | |
48 | */ | |
49 | struct mlx4_mpt_entry { | |
50 | __be32 flags; | |
51 | __be32 qpn; | |
52 | __be32 key; | |
95d04f07 | 53 | __be32 pd_flags; |
225c7b1f RD |
54 | __be64 start; |
55 | __be64 length; | |
56 | __be32 lkey; | |
57 | __be32 win_cnt; | |
58 | u8 reserved1[3]; | |
59 | u8 mtt_rep; | |
60 | __be64 mtt_seg; | |
61 | __be32 mtt_sz; | |
62 | __be32 entity_size; | |
63 | __be32 first_byte_offset; | |
ba2d3587 | 64 | } __packed; |
225c7b1f RD |
65 | |
66 | #define MLX4_MPT_FLAG_SW_OWNS (0xfUL << 28) | |
95d04f07 | 67 | #define MLX4_MPT_FLAG_FREE (0x3UL << 28) |
225c7b1f RD |
68 | #define MLX4_MPT_FLAG_MIO (1 << 17) |
69 | #define MLX4_MPT_FLAG_BIND_ENABLE (1 << 15) | |
70 | #define MLX4_MPT_FLAG_PHYSICAL (1 << 9) | |
71 | #define MLX4_MPT_FLAG_REGION (1 << 8) | |
72 | ||
c9257433 VS |
73 | #define MLX4_MPT_PD_FLAG_FAST_REG (1 << 27) |
74 | #define MLX4_MPT_PD_FLAG_RAE (1 << 28) | |
95d04f07 RD |
75 | #define MLX4_MPT_PD_FLAG_EN_INV (3 << 24) |
76 | ||
8ad11fb6 JM |
77 | #define MLX4_MPT_STATUS_SW 0xF0 |
78 | #define MLX4_MPT_STATUS_HW 0x00 | |
79 | ||
225c7b1f RD |
80 | static u32 mlx4_buddy_alloc(struct mlx4_buddy *buddy, int order) |
81 | { | |
82 | int o; | |
83 | int m; | |
84 | u32 seg; | |
85 | ||
86 | spin_lock(&buddy->lock); | |
87 | ||
e4044cfc RD |
88 | for (o = order; o <= buddy->max_order; ++o) |
89 | if (buddy->num_free[o]) { | |
90 | m = 1 << (buddy->max_order - o); | |
91 | seg = find_first_bit(buddy->bits[o], m); | |
92 | if (seg < m) | |
93 | goto found; | |
94 | } | |
225c7b1f RD |
95 | |
96 | spin_unlock(&buddy->lock); | |
97 | return -1; | |
98 | ||
99 | found: | |
100 | clear_bit(seg, buddy->bits[o]); | |
e4044cfc | 101 | --buddy->num_free[o]; |
225c7b1f RD |
102 | |
103 | while (o > order) { | |
104 | --o; | |
105 | seg <<= 1; | |
106 | set_bit(seg ^ 1, buddy->bits[o]); | |
e4044cfc | 107 | ++buddy->num_free[o]; |
225c7b1f RD |
108 | } |
109 | ||
110 | spin_unlock(&buddy->lock); | |
111 | ||
112 | seg <<= order; | |
113 | ||
114 | return seg; | |
115 | } | |
116 | ||
117 | static void mlx4_buddy_free(struct mlx4_buddy *buddy, u32 seg, int order) | |
118 | { | |
119 | seg >>= order; | |
120 | ||
121 | spin_lock(&buddy->lock); | |
122 | ||
123 | while (test_bit(seg ^ 1, buddy->bits[order])) { | |
124 | clear_bit(seg ^ 1, buddy->bits[order]); | |
e4044cfc | 125 | --buddy->num_free[order]; |
225c7b1f RD |
126 | seg >>= 1; |
127 | ++order; | |
128 | } | |
129 | ||
130 | set_bit(seg, buddy->bits[order]); | |
e4044cfc | 131 | ++buddy->num_free[order]; |
225c7b1f RD |
132 | |
133 | spin_unlock(&buddy->lock); | |
134 | } | |
135 | ||
e8f9b2ed | 136 | static int mlx4_buddy_init(struct mlx4_buddy *buddy, int max_order) |
225c7b1f RD |
137 | { |
138 | int i, s; | |
139 | ||
140 | buddy->max_order = max_order; | |
141 | spin_lock_init(&buddy->lock); | |
142 | ||
143 | buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *), | |
144 | GFP_KERNEL); | |
a8312755 | 145 | buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free, |
e4044cfc RD |
146 | GFP_KERNEL); |
147 | if (!buddy->bits || !buddy->num_free) | |
225c7b1f RD |
148 | goto err_out; |
149 | ||
150 | for (i = 0; i <= buddy->max_order; ++i) { | |
151 | s = BITS_TO_LONGS(1 << (buddy->max_order - i)); | |
152 | buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL); | |
153 | if (!buddy->bits[i]) | |
154 | goto err_out_free; | |
155 | bitmap_zero(buddy->bits[i], 1 << (buddy->max_order - i)); | |
156 | } | |
157 | ||
158 | set_bit(0, buddy->bits[buddy->max_order]); | |
e4044cfc | 159 | buddy->num_free[buddy->max_order] = 1; |
225c7b1f RD |
160 | |
161 | return 0; | |
162 | ||
163 | err_out_free: | |
164 | for (i = 0; i <= buddy->max_order; ++i) | |
165 | kfree(buddy->bits[i]); | |
166 | ||
e4044cfc | 167 | err_out: |
225c7b1f | 168 | kfree(buddy->bits); |
e4044cfc | 169 | kfree(buddy->num_free); |
225c7b1f | 170 | |
225c7b1f RD |
171 | return -ENOMEM; |
172 | } | |
173 | ||
174 | static void mlx4_buddy_cleanup(struct mlx4_buddy *buddy) | |
175 | { | |
176 | int i; | |
177 | ||
178 | for (i = 0; i <= buddy->max_order; ++i) | |
179 | kfree(buddy->bits[i]); | |
180 | ||
181 | kfree(buddy->bits); | |
e4044cfc | 182 | kfree(buddy->num_free); |
225c7b1f RD |
183 | } |
184 | ||
ea51b377 | 185 | static u32 __mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) |
225c7b1f RD |
186 | { |
187 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
188 | u32 seg; | |
189 | ||
190 | seg = mlx4_buddy_alloc(&mr_table->mtt_buddy, order); | |
191 | if (seg == -1) | |
192 | return -1; | |
193 | ||
194 | if (mlx4_table_get_range(dev, &mr_table->mtt_table, seg, | |
195 | seg + (1 << order) - 1)) { | |
196 | mlx4_buddy_free(&mr_table->mtt_buddy, seg, order); | |
197 | return -1; | |
198 | } | |
199 | ||
200 | return seg; | |
201 | } | |
202 | ||
ea51b377 JM |
203 | static u32 mlx4_alloc_mtt_range(struct mlx4_dev *dev, int order) |
204 | { | |
205 | u64 in_param; | |
206 | u64 out_param; | |
207 | int err; | |
208 | ||
209 | if (mlx4_is_mfunc(dev)) { | |
210 | set_param_l(&in_param, order); | |
211 | err = mlx4_cmd_imm(dev, in_param, &out_param, RES_MTT, | |
212 | RES_OP_RESERVE_AND_MAP, | |
213 | MLX4_CMD_ALLOC_RES, | |
214 | MLX4_CMD_TIME_CLASS_A, | |
215 | MLX4_CMD_WRAPPED); | |
216 | if (err) | |
217 | return -1; | |
218 | return get_param_l(&out_param); | |
219 | } | |
220 | return __mlx4_alloc_mtt_range(dev, order); | |
221 | } | |
222 | ||
225c7b1f RD |
223 | int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, |
224 | struct mlx4_mtt *mtt) | |
225 | { | |
226 | int i; | |
227 | ||
228 | if (!npages) { | |
229 | mtt->order = -1; | |
230 | mtt->page_shift = MLX4_ICM_PAGE_SHIFT; | |
231 | return 0; | |
232 | } else | |
233 | mtt->page_shift = page_shift; | |
234 | ||
ab6bf42e | 235 | for (mtt->order = 0, i = dev->caps.mtts_per_seg; i < npages; i <<= 1) |
225c7b1f RD |
236 | ++mtt->order; |
237 | ||
238 | mtt->first_seg = mlx4_alloc_mtt_range(dev, mtt->order); | |
239 | if (mtt->first_seg == -1) | |
240 | return -ENOMEM; | |
241 | ||
242 | return 0; | |
243 | } | |
244 | EXPORT_SYMBOL_GPL(mlx4_mtt_init); | |
245 | ||
ea51b377 JM |
246 | static void __mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, |
247 | int order) | |
225c7b1f RD |
248 | { |
249 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
250 | ||
ea51b377 JM |
251 | mlx4_buddy_free(&mr_table->mtt_buddy, first_seg, order); |
252 | mlx4_table_put_range(dev, &mr_table->mtt_table, first_seg, | |
253 | first_seg + (1 << order) - 1); | |
254 | } | |
255 | ||
256 | static void mlx4_free_mtt_range(struct mlx4_dev *dev, u32 first_seg, int order) | |
257 | { | |
258 | u64 in_param; | |
259 | int err; | |
260 | ||
261 | if (mlx4_is_mfunc(dev)) { | |
262 | set_param_l(&in_param, first_seg); | |
263 | set_param_h(&in_param, order); | |
264 | err = mlx4_cmd(dev, in_param, RES_MTT, RES_OP_RESERVE_AND_MAP, | |
265 | MLX4_CMD_FREE_RES, | |
266 | MLX4_CMD_TIME_CLASS_A, | |
267 | MLX4_CMD_WRAPPED); | |
268 | if (err) | |
269 | mlx4_warn(dev, "Failed to free mtt range at:%d" | |
270 | " order:%d\n", first_seg, order); | |
271 | return; | |
272 | } | |
273 | __mlx4_free_mtt_range(dev, first_seg, order); | |
274 | } | |
275 | ||
276 | void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt) | |
277 | { | |
225c7b1f RD |
278 | if (mtt->order < 0) |
279 | return; | |
280 | ||
ea51b377 | 281 | mlx4_free_mtt_range(dev, mtt->first_seg, mtt->order); |
225c7b1f RD |
282 | } |
283 | EXPORT_SYMBOL_GPL(mlx4_mtt_cleanup); | |
284 | ||
285 | u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt) | |
286 | { | |
287 | return (u64) mtt->first_seg * dev->caps.mtt_entry_sz; | |
288 | } | |
289 | EXPORT_SYMBOL_GPL(mlx4_mtt_addr); | |
290 | ||
291 | static u32 hw_index_to_key(u32 ind) | |
292 | { | |
293 | return (ind >> 24) | (ind << 8); | |
294 | } | |
295 | ||
296 | static u32 key_to_hw_index(u32 key) | |
297 | { | |
298 | return (key << 24) | (key >> 8); | |
299 | } | |
300 | ||
301 | static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |
302 | int mpt_index) | |
303 | { | |
ea51b377 JM |
304 | return mlx4_cmd(dev, mailbox->dma | dev->caps.function , mpt_index, |
305 | 0, MLX4_CMD_SW2HW_MPT, MLX4_CMD_TIME_CLASS_B, | |
306 | MLX4_CMD_WRAPPED); | |
225c7b1f RD |
307 | } |
308 | ||
309 | static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |
310 | int mpt_index) | |
311 | { | |
312 | return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, | |
f9baff50 JM |
313 | !mailbox, MLX4_CMD_HW2SW_MPT, |
314 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); | |
225c7b1f RD |
315 | } |
316 | ||
ea51b377 JM |
317 | static int mlx4_mr_reserve_range(struct mlx4_dev *dev, int cnt, int align, |
318 | u32 *base_mridx) | |
225c7b1f RD |
319 | { |
320 | struct mlx4_priv *priv = mlx4_priv(dev); | |
ea51b377 | 321 | u32 mridx; |
225c7b1f | 322 | |
ea51b377 JM |
323 | mridx = mlx4_bitmap_alloc_range(&priv->mr_table.mpt_bitmap, cnt, align); |
324 | if (mridx == -1) | |
0172e2e1 | 325 | return -ENOMEM; |
225c7b1f | 326 | |
ea51b377 JM |
327 | *base_mridx = mridx; |
328 | return 0; | |
329 | ||
330 | } | |
331 | EXPORT_SYMBOL_GPL(mlx4_mr_reserve_range); | |
332 | ||
333 | static void mlx4_mr_release_range(struct mlx4_dev *dev, u32 base_mridx, int cnt) | |
334 | { | |
335 | struct mlx4_priv *priv = mlx4_priv(dev); | |
336 | mlx4_bitmap_free_range(&priv->mr_table.mpt_bitmap, base_mridx, cnt); | |
337 | } | |
338 | EXPORT_SYMBOL_GPL(mlx4_mr_release_range); | |
339 | ||
340 | static int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd, | |
341 | u64 iova, u64 size, u32 access, int npages, | |
342 | int page_shift, struct mlx4_mr *mr) | |
343 | { | |
225c7b1f RD |
344 | mr->iova = iova; |
345 | mr->size = size; | |
346 | mr->pd = pd; | |
347 | mr->access = access; | |
ea51b377 JM |
348 | mr->enabled = MLX4_MR_DISABLED; |
349 | mr->key = hw_index_to_key(mridx); | |
350 | ||
351 | return mlx4_mtt_init(dev, npages, page_shift, &mr->mtt); | |
352 | } | |
353 | EXPORT_SYMBOL_GPL(mlx4_mr_alloc_reserved); | |
354 | ||
355 | static int mlx4_WRITE_MTT(struct mlx4_dev *dev, | |
356 | struct mlx4_cmd_mailbox *mailbox, | |
357 | int num_entries) | |
358 | { | |
359 | return mlx4_cmd(dev, mailbox->dma, num_entries, 0, MLX4_CMD_WRITE_MTT, | |
360 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
361 | } | |
362 | ||
363 | static int __mlx4_mr_reserve(struct mlx4_dev *dev) | |
364 | { | |
365 | struct mlx4_priv *priv = mlx4_priv(dev); | |
366 | ||
367 | return mlx4_bitmap_alloc(&priv->mr_table.mpt_bitmap); | |
368 | } | |
225c7b1f | 369 | |
ea51b377 JM |
370 | static int mlx4_mr_reserve(struct mlx4_dev *dev) |
371 | { | |
372 | u64 out_param; | |
373 | ||
374 | if (mlx4_is_mfunc(dev)) { | |
375 | if (mlx4_cmd_imm(dev, 0, &out_param, RES_MPT, RES_OP_RESERVE, | |
376 | MLX4_CMD_ALLOC_RES, | |
377 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED)) | |
378 | return -1; | |
379 | return get_param_l(&out_param); | |
380 | } | |
381 | return __mlx4_mr_reserve(dev); | |
382 | } | |
383 | ||
384 | static void __mlx4_mr_release(struct mlx4_dev *dev, u32 index) | |
385 | { | |
386 | struct mlx4_priv *priv = mlx4_priv(dev); | |
387 | ||
388 | mlx4_bitmap_free(&priv->mr_table.mpt_bitmap, index); | |
389 | } | |
390 | ||
391 | static void mlx4_mr_release(struct mlx4_dev *dev, u32 index) | |
392 | { | |
393 | u64 in_param; | |
394 | ||
395 | if (mlx4_is_mfunc(dev)) { | |
396 | set_param_l(&in_param, index); | |
397 | if (mlx4_cmd(dev, in_param, RES_MPT, RES_OP_RESERVE, | |
398 | MLX4_CMD_FREE_RES, | |
399 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED)) | |
400 | mlx4_warn(dev, "Failed to release mr index:%d\n", | |
401 | index); | |
402 | return; | |
403 | } | |
404 | __mlx4_mr_release(dev, index); | |
405 | } | |
406 | ||
407 | static int __mlx4_mr_alloc_icm(struct mlx4_dev *dev, u32 index) | |
408 | { | |
409 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
410 | ||
411 | return mlx4_table_get(dev, &mr_table->dmpt_table, index); | |
412 | } | |
413 | ||
414 | static int mlx4_mr_alloc_icm(struct mlx4_dev *dev, u32 index) | |
415 | { | |
416 | u64 param; | |
417 | ||
418 | if (mlx4_is_mfunc(dev)) { | |
419 | set_param_l(¶m, index); | |
420 | return mlx4_cmd_imm(dev, param, ¶m, RES_MPT, RES_OP_MAP_ICM, | |
421 | MLX4_CMD_ALLOC_RES, | |
422 | MLX4_CMD_TIME_CLASS_A, | |
423 | MLX4_CMD_WRAPPED); | |
424 | } | |
425 | return __mlx4_mr_alloc_icm(dev, index); | |
426 | } | |
427 | ||
428 | static void __mlx4_mr_free_icm(struct mlx4_dev *dev, u32 index) | |
429 | { | |
430 | struct mlx4_mr_table *mr_table = &mlx4_priv(dev)->mr_table; | |
431 | ||
432 | mlx4_table_put(dev, &mr_table->dmpt_table, index); | |
433 | } | |
434 | ||
435 | static void mlx4_mr_free_icm(struct mlx4_dev *dev, u32 index) | |
436 | { | |
437 | u64 in_param; | |
438 | ||
439 | if (mlx4_is_mfunc(dev)) { | |
440 | set_param_l(&in_param, index); | |
441 | if (mlx4_cmd(dev, in_param, RES_MPT, RES_OP_MAP_ICM, | |
442 | MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, | |
443 | MLX4_CMD_WRAPPED)) | |
444 | mlx4_warn(dev, "Failed to free icm of mr index:%d\n", | |
445 | index); | |
446 | return; | |
447 | } | |
448 | return __mlx4_mr_free_icm(dev, index); | |
449 | } | |
450 | ||
451 | int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, | |
452 | int npages, int page_shift, struct mlx4_mr *mr) | |
453 | { | |
454 | u32 index; | |
455 | int err; | |
456 | ||
457 | index = mlx4_mr_reserve(dev); | |
458 | if (index == -1) | |
459 | return -ENOMEM; | |
460 | ||
461 | err = mlx4_mr_alloc_reserved(dev, index, pd, iova, size, | |
462 | access, npages, page_shift, mr); | |
225c7b1f | 463 | if (err) |
ea51b377 | 464 | mlx4_mr_release(dev, index); |
225c7b1f | 465 | |
225c7b1f RD |
466 | return err; |
467 | } | |
468 | EXPORT_SYMBOL_GPL(mlx4_mr_alloc); | |
469 | ||
ea51b377 | 470 | static void mlx4_mr_free_reserved(struct mlx4_dev *dev, struct mlx4_mr *mr) |
225c7b1f | 471 | { |
225c7b1f RD |
472 | int err; |
473 | ||
ea51b377 | 474 | if (mr->enabled == MLX4_MR_EN_HW) { |
225c7b1f RD |
475 | err = mlx4_HW2SW_MPT(dev, NULL, |
476 | key_to_hw_index(mr->key) & | |
477 | (dev->caps.num_mpts - 1)); | |
478 | if (err) | |
ea51b377 | 479 | mlx4_warn(dev, "xxx HW2SW_MPT failed (%d)\n", err); |
225c7b1f | 480 | |
ea51b377 JM |
481 | mr->enabled = MLX4_MR_EN_SW; |
482 | } | |
225c7b1f | 483 | mlx4_mtt_cleanup(dev, &mr->mtt); |
ea51b377 JM |
484 | } |
485 | EXPORT_SYMBOL_GPL(mlx4_mr_free_reserved); | |
486 | ||
487 | void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr) | |
488 | { | |
489 | mlx4_mr_free_reserved(dev, mr); | |
490 | if (mr->enabled) | |
491 | mlx4_mr_free_icm(dev, key_to_hw_index(mr->key)); | |
492 | mlx4_mr_release(dev, key_to_hw_index(mr->key)); | |
225c7b1f RD |
493 | } |
494 | EXPORT_SYMBOL_GPL(mlx4_mr_free); | |
495 | ||
496 | int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr) | |
497 | { | |
225c7b1f RD |
498 | struct mlx4_cmd_mailbox *mailbox; |
499 | struct mlx4_mpt_entry *mpt_entry; | |
500 | int err; | |
501 | ||
ea51b377 | 502 | err = mlx4_mr_alloc_icm(dev, key_to_hw_index(mr->key)); |
225c7b1f RD |
503 | if (err) |
504 | return err; | |
505 | ||
506 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
507 | if (IS_ERR(mailbox)) { | |
508 | err = PTR_ERR(mailbox); | |
509 | goto err_table; | |
510 | } | |
511 | mpt_entry = mailbox->buf; | |
512 | ||
513 | memset(mpt_entry, 0, sizeof *mpt_entry); | |
514 | ||
95d04f07 | 515 | mpt_entry->flags = cpu_to_be32(MLX4_MPT_FLAG_MIO | |
225c7b1f RD |
516 | MLX4_MPT_FLAG_REGION | |
517 | mr->access); | |
225c7b1f RD |
518 | |
519 | mpt_entry->key = cpu_to_be32(key_to_hw_index(mr->key)); | |
95d04f07 | 520 | mpt_entry->pd_flags = cpu_to_be32(mr->pd | MLX4_MPT_PD_FLAG_EN_INV); |
225c7b1f RD |
521 | mpt_entry->start = cpu_to_be64(mr->iova); |
522 | mpt_entry->length = cpu_to_be64(mr->size); | |
523 | mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift); | |
95d04f07 | 524 | |
b2d9308a JM |
525 | if (mr->mtt.order < 0) { |
526 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL); | |
527 | mpt_entry->mtt_seg = 0; | |
95d04f07 | 528 | } else { |
b2d9308a | 529 | mpt_entry->mtt_seg = cpu_to_be64(mlx4_mtt_addr(dev, &mr->mtt)); |
95d04f07 RD |
530 | } |
531 | ||
532 | if (mr->mtt.order >= 0 && mr->mtt.page_shift == 0) { | |
533 | /* fast register MR in free state */ | |
534 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_FREE); | |
c9257433 VS |
535 | mpt_entry->pd_flags |= cpu_to_be32(MLX4_MPT_PD_FLAG_FAST_REG | |
536 | MLX4_MPT_PD_FLAG_RAE); | |
537 | mpt_entry->mtt_sz = cpu_to_be32((1 << mr->mtt.order) * | |
ab6bf42e | 538 | dev->caps.mtts_per_seg); |
95d04f07 RD |
539 | } else { |
540 | mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_SW_OWNS); | |
541 | } | |
225c7b1f RD |
542 | |
543 | err = mlx4_SW2HW_MPT(dev, mailbox, | |
544 | key_to_hw_index(mr->key) & (dev->caps.num_mpts - 1)); | |
545 | if (err) { | |
546 | mlx4_warn(dev, "SW2HW_MPT failed (%d)\n", err); | |
547 | goto err_cmd; | |
548 | } | |
ea51b377 | 549 | mr->enabled = MLX4_MR_EN_HW; |
225c7b1f RD |
550 | |
551 | mlx4_free_cmd_mailbox(dev, mailbox); | |
552 | ||
553 | return 0; | |
554 | ||
555 | err_cmd: | |
556 | mlx4_free_cmd_mailbox(dev, mailbox); | |
557 | ||
558 | err_table: | |
ea51b377 | 559 | mlx4_mr_free_icm(dev, key_to_hw_index(mr->key)); |
225c7b1f RD |
560 | return err; |
561 | } | |
562 | EXPORT_SYMBOL_GPL(mlx4_mr_enable); | |
563 | ||
d7bb58fb JM |
564 | static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
565 | int start_index, int npages, u64 *page_list) | |
225c7b1f | 566 | { |
d7bb58fb JM |
567 | struct mlx4_priv *priv = mlx4_priv(dev); |
568 | __be64 *mtts; | |
569 | dma_addr_t dma_handle; | |
570 | int i; | |
571 | int s = start_index * sizeof (u64); | |
572 | ||
573 | /* All MTTs must fit in the same page */ | |
574 | if (start_index / (PAGE_SIZE / sizeof (u64)) != | |
575 | (start_index + npages - 1) / (PAGE_SIZE / sizeof (u64))) | |
576 | return -EINVAL; | |
577 | ||
ab6bf42e | 578 | if (start_index & (dev->caps.mtts_per_seg - 1)) |
d7bb58fb JM |
579 | return -EINVAL; |
580 | ||
581 | mtts = mlx4_table_find(&priv->mr_table.mtt_table, mtt->first_seg + | |
582 | s / dev->caps.mtt_entry_sz, &dma_handle); | |
583 | if (!mtts) | |
584 | return -ENOMEM; | |
585 | ||
e727f5cd RD |
586 | dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle, |
587 | npages * sizeof (u64), DMA_TO_DEVICE); | |
588 | ||
d7bb58fb JM |
589 | for (i = 0; i < npages; ++i) |
590 | mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); | |
591 | ||
e727f5cd RD |
592 | dma_sync_single_for_device(&dev->pdev->dev, dma_handle, |
593 | npages * sizeof (u64), DMA_TO_DEVICE); | |
d7bb58fb JM |
594 | |
595 | return 0; | |
225c7b1f RD |
596 | } |
597 | ||
ea51b377 JM |
598 | static int __mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
599 | int start_index, int npages, u64 *page_list) | |
225c7b1f | 600 | { |
ea51b377 | 601 | int err = 0; |
d7bb58fb | 602 | int chunk; |
225c7b1f | 603 | |
225c7b1f | 604 | while (npages > 0) { |
d7bb58fb JM |
605 | chunk = min_t(int, PAGE_SIZE / sizeof(u64), npages); |
606 | err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list); | |
225c7b1f | 607 | if (err) |
d7bb58fb | 608 | return err; |
d7bb58fb JM |
609 | npages -= chunk; |
610 | start_index += chunk; | |
611 | page_list += chunk; | |
225c7b1f | 612 | } |
ea51b377 JM |
613 | return err; |
614 | } | |
225c7b1f | 615 | |
ea51b377 JM |
616 | int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
617 | int start_index, int npages, u64 *page_list) | |
618 | { | |
619 | struct mlx4_cmd_mailbox *mailbox = NULL; | |
620 | __be64 *inbox = NULL; | |
621 | int chunk; | |
622 | int err = 0; | |
623 | int i; | |
624 | ||
625 | if (mtt->order < 0) | |
626 | return -EINVAL; | |
627 | ||
628 | if (mlx4_is_mfunc(dev)) { | |
629 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
630 | if (IS_ERR(mailbox)) | |
631 | return PTR_ERR(mailbox); | |
632 | inbox = mailbox->buf; | |
633 | ||
634 | while (npages > 0) { | |
635 | int s = mtt->first_seg * dev->caps.mtts_per_seg + | |
636 | start_index; | |
637 | chunk = min_t(int, MLX4_MAILBOX_SIZE / sizeof(u64) - | |
638 | dev->caps.mtts_per_seg, npages); | |
639 | if (s / (PAGE_SIZE / sizeof(u64)) != | |
640 | (s + chunk - 1) / (PAGE_SIZE / sizeof(u64))) | |
641 | chunk = PAGE_SIZE / sizeof(u64) - | |
642 | (s % (PAGE_SIZE / sizeof(u64))); | |
643 | ||
644 | inbox[0] = cpu_to_be64(mtt->first_seg * | |
645 | dev->caps.mtts_per_seg + | |
646 | start_index); | |
647 | inbox[1] = 0; | |
648 | for (i = 0; i < chunk; ++i) | |
649 | inbox[i + 2] = cpu_to_be64(page_list[i] | | |
650 | MLX4_MTT_FLAG_PRESENT); | |
651 | err = mlx4_WRITE_MTT(dev, mailbox, chunk); | |
652 | if (err) { | |
653 | mlx4_free_cmd_mailbox(dev, mailbox); | |
654 | return err; | |
655 | } | |
656 | ||
657 | npages -= chunk; | |
658 | start_index += chunk; | |
659 | page_list += chunk; | |
660 | } | |
661 | mlx4_free_cmd_mailbox(dev, mailbox); | |
662 | return err; | |
663 | } | |
664 | ||
665 | return __mlx4_write_mtt(dev, mtt, start_index, npages, page_list); | |
225c7b1f RD |
666 | } |
667 | EXPORT_SYMBOL_GPL(mlx4_write_mtt); | |
668 | ||
669 | int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | |
670 | struct mlx4_buf *buf) | |
671 | { | |
672 | u64 *page_list; | |
673 | int err; | |
674 | int i; | |
675 | ||
676 | page_list = kmalloc(buf->npages * sizeof *page_list, GFP_KERNEL); | |
677 | if (!page_list) | |
678 | return -ENOMEM; | |
679 | ||
680 | for (i = 0; i < buf->npages; ++i) | |
681 | if (buf->nbufs == 1) | |
b57aacfa | 682 | page_list[i] = buf->direct.map + (i << buf->page_shift); |
225c7b1f | 683 | else |
b57aacfa | 684 | page_list[i] = buf->page_list[i].map; |
225c7b1f RD |
685 | |
686 | err = mlx4_write_mtt(dev, mtt, 0, buf->npages, page_list); | |
687 | ||
688 | kfree(page_list); | |
689 | return err; | |
690 | } | |
691 | EXPORT_SYMBOL_GPL(mlx4_buf_write_mtt); | |
692 | ||
3d73c288 | 693 | int mlx4_init_mr_table(struct mlx4_dev *dev) |
225c7b1f | 694 | { |
ea51b377 JM |
695 | struct mlx4_priv *priv = mlx4_priv(dev); |
696 | struct mlx4_mr_table *mr_table = &priv->mr_table; | |
225c7b1f RD |
697 | int err; |
698 | ||
ea51b377 JM |
699 | if (!is_power_of_2(dev->caps.num_mpts)) |
700 | return -EINVAL; | |
701 | ||
702 | /* Nothing to do for slaves - all MR handling is forwarded | |
703 | * to the master */ | |
704 | if (mlx4_is_slave(dev)) | |
705 | return 0; | |
706 | ||
225c7b1f | 707 | err = mlx4_bitmap_init(&mr_table->mpt_bitmap, dev->caps.num_mpts, |
93fc9e1b | 708 | ~0, dev->caps.reserved_mrws, 0); |
225c7b1f RD |
709 | if (err) |
710 | return err; | |
711 | ||
712 | err = mlx4_buddy_init(&mr_table->mtt_buddy, | |
713 | ilog2(dev->caps.num_mtt_segs)); | |
714 | if (err) | |
715 | goto err_buddy; | |
716 | ||
717 | if (dev->caps.reserved_mtts) { | |
ea51b377 JM |
718 | priv->reserved_mtts = |
719 | mlx4_alloc_mtt_range(dev, | |
720 | fls(dev->caps.reserved_mtts - 1)); | |
721 | if (priv->reserved_mtts < 0) { | |
225c7b1f RD |
722 | mlx4_warn(dev, "MTT table of order %d is too small.\n", |
723 | mr_table->mtt_buddy.max_order); | |
724 | err = -ENOMEM; | |
725 | goto err_reserve_mtts; | |
726 | } | |
727 | } | |
728 | ||
729 | return 0; | |
730 | ||
731 | err_reserve_mtts: | |
732 | mlx4_buddy_cleanup(&mr_table->mtt_buddy); | |
733 | ||
734 | err_buddy: | |
735 | mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); | |
736 | ||
737 | return err; | |
738 | } | |
739 | ||
740 | void mlx4_cleanup_mr_table(struct mlx4_dev *dev) | |
741 | { | |
ea51b377 JM |
742 | struct mlx4_priv *priv = mlx4_priv(dev); |
743 | struct mlx4_mr_table *mr_table = &priv->mr_table; | |
225c7b1f | 744 | |
ea51b377 JM |
745 | if (mlx4_is_slave(dev)) |
746 | return; | |
747 | if (priv->reserved_mtts >= 0) | |
748 | mlx4_free_mtt_range(dev, priv->reserved_mtts, | |
749 | fls(dev->caps.reserved_mtts - 1)); | |
225c7b1f RD |
750 | mlx4_buddy_cleanup(&mr_table->mtt_buddy); |
751 | mlx4_bitmap_cleanup(&mr_table->mpt_bitmap); | |
752 | } | |
8ad11fb6 JM |
753 | |
754 | static inline int mlx4_check_fmr(struct mlx4_fmr *fmr, u64 *page_list, | |
755 | int npages, u64 iova) | |
756 | { | |
757 | int i, page_mask; | |
758 | ||
759 | if (npages > fmr->max_pages) | |
760 | return -EINVAL; | |
761 | ||
762 | page_mask = (1 << fmr->page_shift) - 1; | |
763 | ||
764 | /* We are getting page lists, so va must be page aligned. */ | |
765 | if (iova & page_mask) | |
766 | return -EINVAL; | |
767 | ||
768 | /* Trust the user not to pass misaligned data in page_list */ | |
769 | if (0) | |
770 | for (i = 0; i < npages; ++i) { | |
771 | if (page_list[i] & ~page_mask) | |
772 | return -EINVAL; | |
773 | } | |
774 | ||
775 | if (fmr->maps >= fmr->max_maps) | |
776 | return -EINVAL; | |
777 | ||
778 | return 0; | |
779 | } | |
780 | ||
781 | int mlx4_map_phys_fmr(struct mlx4_dev *dev, struct mlx4_fmr *fmr, u64 *page_list, | |
782 | int npages, u64 iova, u32 *lkey, u32 *rkey) | |
783 | { | |
784 | u32 key; | |
785 | int i, err; | |
786 | ||
787 | err = mlx4_check_fmr(fmr, page_list, npages, iova); | |
788 | if (err) | |
789 | return err; | |
790 | ||
791 | ++fmr->maps; | |
792 | ||
793 | key = key_to_hw_index(fmr->mr.key); | |
794 | key += dev->caps.num_mpts; | |
795 | *lkey = *rkey = fmr->mr.key = hw_index_to_key(key); | |
796 | ||
797 | *(u8 *) fmr->mpt = MLX4_MPT_STATUS_SW; | |
798 | ||
799 | /* Make sure MPT status is visible before writing MTT entries */ | |
800 | wmb(); | |
801 | ||
e727f5cd RD |
802 | dma_sync_single_for_cpu(&dev->pdev->dev, fmr->dma_handle, |
803 | npages * sizeof(u64), DMA_TO_DEVICE); | |
804 | ||
8ad11fb6 JM |
805 | for (i = 0; i < npages; ++i) |
806 | fmr->mtts[i] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); | |
807 | ||
e727f5cd RD |
808 | dma_sync_single_for_device(&dev->pdev->dev, fmr->dma_handle, |
809 | npages * sizeof(u64), DMA_TO_DEVICE); | |
8ad11fb6 JM |
810 | |
811 | fmr->mpt->key = cpu_to_be32(key); | |
812 | fmr->mpt->lkey = cpu_to_be32(key); | |
813 | fmr->mpt->length = cpu_to_be64(npages * (1ull << fmr->page_shift)); | |
814 | fmr->mpt->start = cpu_to_be64(iova); | |
815 | ||
816 | /* Make MTT entries are visible before setting MPT status */ | |
817 | wmb(); | |
818 | ||
819 | *(u8 *) fmr->mpt = MLX4_MPT_STATUS_HW; | |
820 | ||
821 | /* Make sure MPT status is visible before consumer can use FMR */ | |
822 | wmb(); | |
823 | ||
824 | return 0; | |
825 | } | |
826 | EXPORT_SYMBOL_GPL(mlx4_map_phys_fmr); | |
827 | ||
828 | int mlx4_fmr_alloc(struct mlx4_dev *dev, u32 pd, u32 access, int max_pages, | |
829 | int max_maps, u8 page_shift, struct mlx4_fmr *fmr) | |
830 | { | |
831 | struct mlx4_priv *priv = mlx4_priv(dev); | |
832 | u64 mtt_seg; | |
833 | int err = -ENOMEM; | |
834 | ||
c5057ddc | 835 | if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32) |
8ad11fb6 JM |
836 | return -EINVAL; |
837 | ||
838 | /* All MTTs must fit in the same page */ | |
839 | if (max_pages * sizeof *fmr->mtts > PAGE_SIZE) | |
840 | return -EINVAL; | |
841 | ||
842 | fmr->page_shift = page_shift; | |
843 | fmr->max_pages = max_pages; | |
844 | fmr->max_maps = max_maps; | |
845 | fmr->maps = 0; | |
846 | ||
847 | err = mlx4_mr_alloc(dev, pd, 0, 0, access, max_pages, | |
848 | page_shift, &fmr->mr); | |
849 | if (err) | |
850 | return err; | |
851 | ||
852 | mtt_seg = fmr->mr.mtt.first_seg * dev->caps.mtt_entry_sz; | |
853 | ||
854 | fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table, | |
855 | fmr->mr.mtt.first_seg, | |
856 | &fmr->dma_handle); | |
857 | if (!fmr->mtts) { | |
858 | err = -ENOMEM; | |
859 | goto err_free; | |
860 | } | |
861 | ||
8ad11fb6 JM |
862 | return 0; |
863 | ||
864 | err_free: | |
865 | mlx4_mr_free(dev, &fmr->mr); | |
866 | return err; | |
867 | } | |
868 | EXPORT_SYMBOL_GPL(mlx4_fmr_alloc); | |
869 | ||
ea51b377 JM |
870 | static int mlx4_fmr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, |
871 | u32 pd, u32 access, int max_pages, | |
872 | int max_maps, u8 page_shift, struct mlx4_fmr *fmr) | |
873 | { | |
874 | struct mlx4_priv *priv = mlx4_priv(dev); | |
875 | int err = -ENOMEM; | |
876 | ||
877 | if (page_shift < (ffs(dev->caps.page_size_cap) - 1) || page_shift >= 32) | |
878 | return -EINVAL; | |
879 | ||
880 | /* All MTTs must fit in the same page */ | |
881 | if (max_pages * sizeof *fmr->mtts > PAGE_SIZE) | |
882 | return -EINVAL; | |
883 | ||
884 | fmr->page_shift = page_shift; | |
885 | fmr->max_pages = max_pages; | |
886 | fmr->max_maps = max_maps; | |
887 | fmr->maps = 0; | |
888 | ||
889 | err = mlx4_mr_alloc_reserved(dev, mridx, pd, 0, 0, access, max_pages, | |
890 | page_shift, &fmr->mr); | |
891 | if (err) | |
892 | return err; | |
893 | ||
894 | fmr->mtts = mlx4_table_find(&priv->mr_table.mtt_table, | |
895 | fmr->mr.mtt.first_seg, | |
896 | &fmr->dma_handle); | |
897 | if (!fmr->mtts) { | |
898 | err = -ENOMEM; | |
899 | goto err_free; | |
900 | } | |
901 | ||
902 | return 0; | |
903 | ||
904 | err_free: | |
905 | mlx4_mr_free_reserved(dev, &fmr->mr); | |
906 | return err; | |
907 | } | |
908 | EXPORT_SYMBOL_GPL(mlx4_fmr_alloc_reserved); | |
909 | ||
8ad11fb6 JM |
910 | int mlx4_fmr_enable(struct mlx4_dev *dev, struct mlx4_fmr *fmr) |
911 | { | |
11e75a74 JM |
912 | struct mlx4_priv *priv = mlx4_priv(dev); |
913 | int err; | |
914 | ||
915 | err = mlx4_mr_enable(dev, &fmr->mr); | |
916 | if (err) | |
917 | return err; | |
918 | ||
919 | fmr->mpt = mlx4_table_find(&priv->mr_table.dmpt_table, | |
920 | key_to_hw_index(fmr->mr.key), NULL); | |
921 | if (!fmr->mpt) | |
922 | return -ENOMEM; | |
923 | ||
924 | return 0; | |
8ad11fb6 JM |
925 | } |
926 | EXPORT_SYMBOL_GPL(mlx4_fmr_enable); | |
927 | ||
928 | void mlx4_fmr_unmap(struct mlx4_dev *dev, struct mlx4_fmr *fmr, | |
929 | u32 *lkey, u32 *rkey) | |
930 | { | |
ea51b377 JM |
931 | struct mlx4_cmd_mailbox *mailbox; |
932 | int err; | |
933 | ||
8ad11fb6 JM |
934 | if (!fmr->maps) |
935 | return; | |
936 | ||
8ad11fb6 JM |
937 | fmr->maps = 0; |
938 | ||
ea51b377 JM |
939 | mailbox = mlx4_alloc_cmd_mailbox(dev); |
940 | if (IS_ERR(mailbox)) { | |
941 | err = PTR_ERR(mailbox); | |
942 | printk(KERN_WARNING "mlx4_ib: mlx4_alloc_cmd_mailbox" | |
943 | " failed (%d)\n", err); | |
944 | return; | |
945 | } | |
946 | ||
947 | err = mlx4_HW2SW_MPT(dev, NULL, | |
948 | key_to_hw_index(fmr->mr.key) & | |
949 | (dev->caps.num_mpts - 1)); | |
950 | mlx4_free_cmd_mailbox(dev, mailbox); | |
951 | if (err) { | |
952 | printk(KERN_WARNING "mlx4_ib: mlx4_HW2SW_MPT failed (%d)\n", | |
953 | err); | |
954 | return; | |
955 | } | |
956 | fmr->mr.enabled = MLX4_MR_EN_SW; | |
8ad11fb6 JM |
957 | } |
958 | EXPORT_SYMBOL_GPL(mlx4_fmr_unmap); | |
959 | ||
960 | int mlx4_fmr_free(struct mlx4_dev *dev, struct mlx4_fmr *fmr) | |
961 | { | |
962 | if (fmr->maps) | |
963 | return -EBUSY; | |
964 | ||
8ad11fb6 | 965 | mlx4_mr_free(dev, &fmr->mr); |
ea51b377 | 966 | fmr->mr.enabled = MLX4_MR_DISABLED; |
8ad11fb6 JM |
967 | |
968 | return 0; | |
969 | } | |
970 | EXPORT_SYMBOL_GPL(mlx4_fmr_free); | |
971 | ||
ea51b377 JM |
972 | static int mlx4_fmr_free_reserved(struct mlx4_dev *dev, struct mlx4_fmr *fmr) |
973 | { | |
974 | if (fmr->maps) | |
975 | return -EBUSY; | |
976 | ||
977 | mlx4_mr_free_reserved(dev, &fmr->mr); | |
978 | fmr->mr.enabled = MLX4_MR_DISABLED; | |
979 | ||
980 | return 0; | |
981 | } | |
982 | EXPORT_SYMBOL_GPL(mlx4_fmr_free_reserved); | |
983 | ||
8ad11fb6 JM |
984 | int mlx4_SYNC_TPT(struct mlx4_dev *dev) |
985 | { | |
f9baff50 JM |
986 | return mlx4_cmd(dev, 0, 0, 0, MLX4_CMD_SYNC_TPT, 1000, |
987 | MLX4_CMD_WRAPPED); | |
8ad11fb6 JM |
988 | } |
989 | EXPORT_SYMBOL_GPL(mlx4_SYNC_TPT); |