[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / reset.c

/*
 * Copyright (c) 2006, 2007 Cisco Systems, Inc.  All rights reserved.
 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/jiffies.h>

#include "mlx4.h"

int mlx4_reset(struct mlx4_dev *dev)
{
	void __iomem *reset;
	u32 *hca_header = NULL;
	int pcie_cap;
	u16 devctl;
	u16 linkctl;
	u16 vendor;
	unsigned long end;
	u32 sem;
	int i;
	int err = 0;

#define MLX4_RESET_BASE		0xf0000
#define MLX4_RESET_SIZE		  0x400
#define MLX4_SEM_OFFSET		  0x3fc
#define MLX4_RESET_OFFSET	   0x10
#define MLX4_RESET_VALUE	swab32(1)

#define MLX4_SEM_TIMEOUT_JIFFIES	(10 * HZ)
#define MLX4_RESET_TIMEOUT_JIFFIES	(2 * HZ)

	/*
	 * Reset the chip.  This is somewhat ugly because we have to
	 * save off the PCI header before reset and then restore it
	 * after the chip reboots.  We skip config space offsets 22
	 * and 23 since those have a special meaning.
	 */

	/* Do we need to save off the full 4K PCI Express header?? */
	hca_header = kmalloc(256, GFP_KERNEL);
	if (!hca_header) {
		err = -ENOMEM;
		mlx4_err(dev, "Couldn't allocate memory to save HCA PCI header, aborting\n");
		goto out;
	}

	pcie_cap = pci_pcie_cap(dev->pdev);

	for (i = 0; i < 64; ++i) {
		if (i == 22 || i == 23)
			continue;
		if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) {
			err = -ENODEV;
			mlx4_err(dev, "Couldn't save HCA PCI header, aborting\n");
			goto out;
		}
	}

	reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE,
			MLX4_RESET_SIZE);
	if (!reset) {
		err = -ENOMEM;
		mlx4_err(dev, "Couldn't map HCA reset register, aborting\n");
		goto out;
	}

	/* grab HW semaphore to lock out flash updates */
	end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES;
	do {
		sem = readl(reset + MLX4_SEM_OFFSET);
		if (!sem)
			break;

		msleep(1);
	} while (time_before(jiffies, end));

	if (sem) {
		mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n");
		err = -EAGAIN;
		iounmap(reset);
		goto out;
	}

	/* actually hit reset */
	writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);
	iounmap(reset);

	/* Docs say to wait one second before accessing device */
	msleep(1000);

	end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES;
	do {
		if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) &&
		    vendor != 0xffff)
			break;

		msleep(1);
	} while (time_before(jiffies, end));

	if (vendor == 0xffff) {
		err = -ENODEV;
		mlx4_err(dev, "PCI device did not come back after reset, aborting\n");
		goto out;
	}

	/* Now restore the PCI headers */
	if (pcie_cap) {
		devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4];
		if (pcie_capability_write_word(dev->pdev, PCI_EXP_DEVCTL,
					       devctl)) {
			err = -ENODEV;
			mlx4_err(dev, "Couldn't restore HCA PCI Express Device Control register, aborting\n");
			goto out;
		}
		linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4];
		if (pcie_capability_write_word(dev->pdev, PCI_EXP_LNKCTL,
					       linkctl)) {
			err = -ENODEV;
			mlx4_err(dev, "Couldn't restore HCA PCI Express Link control register, aborting\n");
			goto out;
		}
	}

	for (i = 0; i < 16; ++i) {
		if (i * 4 == PCI_COMMAND)
			continue;

		if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) {
			err = -ENODEV;
			mlx4_err(dev, "Couldn't restore HCA reg %x, aborting\n",
				 i);
			goto out;
		}
	}

	if (pci_write_config_dword(dev->pdev, PCI_COMMAND,
				   hca_header[PCI_COMMAND / 4])) {
		err = -ENODEV;
		mlx4_err(dev, "Couldn't restore HCA COMMAND, aborting\n");
		goto out;
	}

out:
	kfree(hca_header);

	return err;
}
Commit	Line	Data
225c7b1f RD	1	/*
225c7b1f RD	2	* Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
51a379d0	3	* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
225c7b1f RD	4	*
	5	* This software is available to you under a choice of one of two
	6	* licenses. You may choose to be licensed under the terms of the GNU
	7	* General Public License (GPL) Version 2, available from the file
	8	* COPYING in the main directory of this source tree, or the
	9	* OpenIB.org BSD license below:
	10	*
	11	* Redistribution and use in source and binary forms, with or
	12	* without modification, are permitted provided that the following
	13	* conditions are met:
	14	*
	15	* - Redistributions of source code must retain the above
	16	* copyright notice, this list of conditions and the following
	17	* disclaimer.
	18	*
	19	* - Redistributions in binary form must reproduce the above
	20	* copyright notice, this list of conditions and the following
	21	* disclaimer in the documentation and/or other materials
	22	* provided with the distribution.
	23	*
	24	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	25	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	26	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	27	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	28	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	29	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	30	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	31	* SOFTWARE.
	32	*/
	33
225c7b1f RD	34	#include <linux/errno.h>
	35	#include <linux/pci.h>
	36	#include <linux/delay.h>
	37	#include <linux/slab.h>
9cbe05c7	38	#include <linux/jiffies.h>
225c7b1f RD	39
	40	#include "mlx4.h"
	41
	42	int mlx4_reset(struct mlx4_dev *dev)
	43	{
	44	void __iomem *reset;
	45	u32 *hca_header = NULL;
	46	int pcie_cap;
	47	u16 devctl;
	48	u16 linkctl;
	49	u16 vendor;
	50	unsigned long end;
	51	u32 sem;
	52	int i;
	53	int err = 0;
	54
	55	#define MLX4_RESET_BASE 0xf0000
	56	#define MLX4_RESET_SIZE 0x400
	57	#define MLX4_SEM_OFFSET 0x3fc
	58	#define MLX4_RESET_OFFSET 0x10
	59	#define MLX4_RESET_VALUE swab32(1)
	60
	61	#define MLX4_SEM_TIMEOUT_JIFFIES (10 * HZ)
	62	#define MLX4_RESET_TIMEOUT_JIFFIES (2 * HZ)
	63
	64	/*
	65	* Reset the chip. This is somewhat ugly because we have to
	66	* save off the PCI header before reset and then restore it
	67	* after the chip reboots. We skip config space offsets 22
	68	* and 23 since those have a special meaning.
	69	*/
	70
	71	/* Do we need to save off the full 4K PCI Express header?? */
	72	hca_header = kmalloc(256, GFP_KERNEL);
	73	if (!hca_header) {
	74	err = -ENOMEM;
1a91de28	75	mlx4_err(dev, "Couldn't allocate memory to save HCA PCI header, aborting\n");
225c7b1f RD	76	goto out;
	77	}
	78
a875a4c7	79	pcie_cap = pci_pcie_cap(dev->pdev);
225c7b1f RD	80
	81	for (i = 0; i < 64; ++i) {
	82	if (i == 22 \|\| i == 23)
	83	continue;
	84	if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) {
	85	err = -ENODEV;
1a91de28	86	mlx4_err(dev, "Couldn't save HCA PCI header, aborting\n");
225c7b1f RD	87	goto out;
	88	}
	89	}
	90
	91	reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE,
	92	MLX4_RESET_SIZE);
	93	if (!reset) {
	94	err = -ENOMEM;
1a91de28	95	mlx4_err(dev, "Couldn't map HCA reset register, aborting\n");
225c7b1f RD	96	goto out;
	97	}
	98
	99	/* grab HW semaphore to lock out flash updates */
	100	end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES;
	101	do {
	102	sem = readl(reset + MLX4_SEM_OFFSET);
	103	if (!sem)
	104	break;
	105
	106	msleep(1);
	107	} while (time_before(jiffies, end));
	108
	109	if (sem) {
	110	mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n");
	111	err = -EAGAIN;
	112	iounmap(reset);
	113	goto out;
	114	}
	115
	116	/* actually hit reset */
	117	writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);
	118	iounmap(reset);
	119
947b2a80 EC	120	/* Docs say to wait one second before accessing device */
	121	msleep(1000);
	122
225c7b1f RD	123	end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES;
	124	do {
	125	if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) &&
	126	vendor != 0xffff)
	127	break;
	128
	129	msleep(1);
	130	} while (time_before(jiffies, end));
	131
	132	if (vendor == 0xffff) {
	133	err = -ENODEV;
1a91de28	134	mlx4_err(dev, "PCI device did not come back after reset, aborting\n");
225c7b1f RD	135	goto out;
	136	}
	137
	138	/* Now restore the PCI headers */
	139	if (pcie_cap) {
	140	devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4];
fadd1daa JL	141	if (pcie_capability_write_word(dev->pdev, PCI_EXP_DEVCTL,
fadd1daa JL	142	devctl)) {
225c7b1f	143	err = -ENODEV;
1a91de28	144	mlx4_err(dev, "Couldn't restore HCA PCI Express Device Control register, aborting\n");
225c7b1f RD	145	goto out;
	146	}
	147	linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4];
fadd1daa JL	148	if (pcie_capability_write_word(dev->pdev, PCI_EXP_LNKCTL,
fadd1daa JL	149	linkctl)) {
225c7b1f	150	err = -ENODEV;
1a91de28	151	mlx4_err(dev, "Couldn't restore HCA PCI Express Link control register, aborting\n");
225c7b1f RD	152	goto out;
	153	}
	154	}
	155
	156	for (i = 0; i < 16; ++i) {
	157	if (i * 4 == PCI_COMMAND)
	158	continue;
	159
	160	if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) {
	161	err = -ENODEV;
1a91de28 JP	162	mlx4_err(dev, "Couldn't restore HCA reg %x, aborting\n",
1a91de28 JP	163	i);
225c7b1f RD	164	goto out;
	165	}
	166	}
	167
	168	if (pci_write_config_dword(dev->pdev, PCI_COMMAND,
	169	hca_header[PCI_COMMAND / 4])) {
	170	err = -ENODEV;
1a91de28	171	mlx4_err(dev, "Couldn't restore HCA COMMAND, aborting\n");
225c7b1f RD	172	goto out;
	173	}
	174
	175	out:
	176	kfree(hca_header);
	177
	178	return err;
	179	}