[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_dcbnl.c

/*
 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */
#include <linux/device.h>
#include <linux/netdevice.h>
#include "en.h"

#define MLX5E_MAX_PRIORITY 8

#define MLX5E_100MB (100000)
#define MLX5E_1GB   (1000000)

static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
				   struct ieee_ets *ets)
{
	struct mlx5e_priv *priv = netdev_priv(netdev);

	if (!MLX5_CAP_GEN(priv->mdev, ets))
		return -ENOTSUPP;

	memcpy(ets, &priv->params.ets, sizeof(*ets));
	return 0;
}

enum {
	MLX5E_VENDOR_TC_GROUP_NUM = 7,
	MLX5E_ETS_TC_GROUP_NUM    = 0,
};

static void mlx5e_build_tc_group(struct ieee_ets *ets, u8 *tc_group, int max_tc)
{
	bool any_tc_mapped_to_ets = false;
	int strict_group;
	int i;

	for (i = 0; i <= max_tc; i++)
		if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
			any_tc_mapped_to_ets = true;

	strict_group = any_tc_mapped_to_ets ? 1 : 0;

	for (i = 0; i <= max_tc; i++) {
		switch (ets->tc_tsa[i]) {
		case IEEE_8021QAZ_TSA_VENDOR:
			tc_group[i] = MLX5E_VENDOR_TC_GROUP_NUM;
			break;
		case IEEE_8021QAZ_TSA_STRICT:
			tc_group[i] = strict_group++;
			break;
		case IEEE_8021QAZ_TSA_ETS:
			tc_group[i] = MLX5E_ETS_TC_GROUP_NUM;
			break;
		}
	}
}

static void mlx5e_build_tc_tx_bw(struct ieee_ets *ets, u8 *tc_tx_bw,
				 u8 *tc_group, int max_tc)
{
	int i;

	for (i = 0; i <= max_tc; i++) {
		switch (ets->tc_tsa[i]) {
		case IEEE_8021QAZ_TSA_VENDOR:
			tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
			break;
		case IEEE_8021QAZ_TSA_STRICT:
			tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
			break;
		case IEEE_8021QAZ_TSA_ETS:
			tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX5E_MIN_BW_ALLOC;
			break;
		}
	}
}

int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv *priv, struct ieee_ets *ets)
{
	struct mlx5_core_dev *mdev = priv->mdev;
	u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS];
	u8 tc_group[IEEE_8021QAZ_MAX_TCS];
	int max_tc = mlx5_max_tc(mdev);
	int err;

	if (!MLX5_CAP_GEN(mdev, ets))
		return -ENOTSUPP;

	mlx5e_build_tc_group(ets, tc_group, max_tc);
	mlx5e_build_tc_tx_bw(ets, tc_tx_bw, tc_group, max_tc);

	err = mlx5_set_port_prio_tc(mdev, ets->prio_tc);
	if (err)
		return err;

	err = mlx5_set_port_tc_group(mdev, tc_group);
	if (err)
		return err;

	return mlx5_set_port_tc_bw_alloc(mdev, tc_tx_bw);
}

static int mlx5e_dbcnl_validate_ets(struct ieee_ets *ets)
{
	int bw_sum = 0;
	int i;

	/* Validate Priority */
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		if (ets->prio_tc[i] >= MLX5E_MAX_PRIORITY)
			return -EINVAL;
	}

	/* Validate Bandwidth Sum */
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
			bw_sum += ets->tc_tx_bw[i];
	}

	if (bw_sum != 0 && bw_sum != 100)
		return -EINVAL;
	return 0;
}

static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
				   struct ieee_ets *ets)
{
	struct mlx5e_priv *priv = netdev_priv(netdev);
	int err;

	err = mlx5e_dbcnl_validate_ets(ets);
	if (err)
		return err;

	err = mlx5e_dcbnl_ieee_setets_core(priv, ets);
	if (err)
		return err;

	memcpy(&priv->params.ets, ets, sizeof(*ets));
	priv->params.ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;

	return 0;
}

static int mlx5e_dcbnl_ieee_getpfc(struct net_device *dev,
				   struct ieee_pfc *pfc)
{
	struct mlx5e_priv *priv = netdev_priv(dev);
	struct mlx5_core_dev *mdev = priv->mdev;
	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
	int i;

	pfc->pfc_cap = mlx5_max_tc(mdev) + 1;
	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
		pfc->requests[i]    = PPORT_PER_PRIO_GET(pstats, i, tx_pause);
		pfc->indications[i] = PPORT_PER_PRIO_GET(pstats, i, rx_pause);
	}

	return mlx5_query_port_pfc(mdev, &pfc->pfc_en, NULL);
}

static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,
				   struct ieee_pfc *pfc)
{
	struct mlx5e_priv *priv = netdev_priv(dev);
	struct mlx5_core_dev *mdev = priv->mdev;
	u8 curr_pfc_en;
	int ret;

	mlx5_query_port_pfc(mdev, &curr_pfc_en, NULL);

	if (pfc->pfc_en == curr_pfc_en)
		return 0;

	ret = mlx5_set_port_pfc(mdev, pfc->pfc_en, pfc->pfc_en);
	mlx5_toggle_port_link(mdev);

	return ret;
}

static u8 mlx5e_dcbnl_getdcbx(struct net_device *dev)
{
	return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
}

static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode)
{
	if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
	    (mode & DCB_CAP_DCBX_VER_CEE) ||
	    !(mode & DCB_CAP_DCBX_VER_IEEE) ||
	    !(mode & DCB_CAP_DCBX_HOST))
		return 1;

	return 0;
}

static int mlx5e_dcbnl_ieee_getmaxrate(struct net_device *netdev,
				       struct ieee_maxrate *maxrate)
{
	struct mlx5e_priv *priv    = netdev_priv(netdev);
	struct mlx5_core_dev *mdev = priv->mdev;
	u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
	u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
	int err;
	int i;

	err = mlx5_query_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
	if (err)
		return err;

	memset(maxrate->tc_maxrate, 0, sizeof(maxrate->tc_maxrate));

	for (i = 0; i <= mlx5_max_tc(mdev); i++) {
		switch (max_bw_unit[i]) {
		case MLX5_100_MBPS_UNIT:
			maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_100MB;
			break;
		case MLX5_GBPS_UNIT:
			maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_1GB;
			break;
		case MLX5_BW_NO_LIMIT:
			break;
		default:
			WARN(true, "non-supported BW unit");
			break;
		}
	}

	return 0;
}

static int mlx5e_dcbnl_ieee_setmaxrate(struct net_device *netdev,
				       struct ieee_maxrate *maxrate)
{
	struct mlx5e_priv *priv    = netdev_priv(netdev);
	struct mlx5_core_dev *mdev = priv->mdev;
	u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
	u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
	__u64 upper_limit_mbps = roundup(255 * MLX5E_100MB, MLX5E_1GB);
	int i;

	memset(max_bw_value, 0, sizeof(max_bw_value));
	memset(max_bw_unit, 0, sizeof(max_bw_unit));

	for (i = 0; i <= mlx5_max_tc(mdev); i++) {
		if (!maxrate->tc_maxrate[i]) {
			max_bw_unit[i]  = MLX5_BW_NO_LIMIT;
			continue;
		}
		if (maxrate->tc_maxrate[i] < upper_limit_mbps) {
			max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
						  MLX5E_100MB);
			max_bw_value[i] = max_bw_value[i] ? max_bw_value[i] : 1;
			max_bw_unit[i]  = MLX5_100_MBPS_UNIT;
		} else {
			max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
						  MLX5E_1GB);
			max_bw_unit[i]  = MLX5_GBPS_UNIT;
		}
	}

	return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
}

const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = {
	.ieee_getets	= mlx5e_dcbnl_ieee_getets,
	.ieee_setets	= mlx5e_dcbnl_ieee_setets,
	.ieee_getmaxrate = mlx5e_dcbnl_ieee_getmaxrate,
	.ieee_setmaxrate = mlx5e_dcbnl_ieee_setmaxrate,
	.ieee_getpfc	= mlx5e_dcbnl_ieee_getpfc,
	.ieee_setpfc	= mlx5e_dcbnl_ieee_setpfc,
	.getdcbx	= mlx5e_dcbnl_getdcbx,
	.setdcbx	= mlx5e_dcbnl_setdcbx,
};
Commit	Line	Data
08fb1dac SM	1	/*
	2	* Copyright (c) 2016, Mellanox Technologies. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32	#include <linux/device.h>
	33	#include <linux/netdevice.h>
	34	#include "en.h"
	35
	36	#define MLX5E_MAX_PRIORITY 8
	37
d8880795 TT	38	#define MLX5E_100MB (100000)
	39	#define MLX5E_1GB (1000000)
	40
08fb1dac SM	41	static int mlx5e_dcbnl_ieee_getets(struct net_device *netdev,
	42	struct ieee_ets *ets)
	43	{
	44	struct mlx5e_priv *priv = netdev_priv(netdev);
	45
	46	if (!MLX5_CAP_GEN(priv->mdev, ets))
	47	return -ENOTSUPP;
	48
	49	memcpy(ets, &priv->params.ets, sizeof(*ets));
	50	return 0;
	51	}
	52
	53	enum {
	54	MLX5E_VENDOR_TC_GROUP_NUM = 7,
	55	MLX5E_ETS_TC_GROUP_NUM = 0,
	56	};
	57
	58	static void mlx5e_build_tc_group(struct ieee_ets ets, u8 tc_group, int max_tc)
	59	{
	60	bool any_tc_mapped_to_ets = false;
	61	int strict_group;
	62	int i;
	63
	64	for (i = 0; i <= max_tc; i++)
	65	if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
	66	any_tc_mapped_to_ets = true;
	67
	68	strict_group = any_tc_mapped_to_ets ? 1 : 0;
	69
	70	for (i = 0; i <= max_tc; i++) {
	71	switch (ets->tc_tsa[i]) {
	72	case IEEE_8021QAZ_TSA_VENDOR:
	73	tc_group[i] = MLX5E_VENDOR_TC_GROUP_NUM;
	74	break;
	75	case IEEE_8021QAZ_TSA_STRICT:
	76	tc_group[i] = strict_group++;
	77	break;
	78	case IEEE_8021QAZ_TSA_ETS:
	79	tc_group[i] = MLX5E_ETS_TC_GROUP_NUM;
	80	break;
	81	}
	82	}
	83	}
	84
	85	static void mlx5e_build_tc_tx_bw(struct ieee_ets ets, u8 tc_tx_bw,
	86	u8 *tc_group, int max_tc)
	87	{
	88	int i;
	89
	90	for (i = 0; i <= max_tc; i++) {
	91	switch (ets->tc_tsa[i]) {
	92	case IEEE_8021QAZ_TSA_VENDOR:
	93	tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
	94	break;
	95	case IEEE_8021QAZ_TSA_STRICT:
	96	tc_tx_bw[i] = MLX5E_MAX_BW_ALLOC;
	97	break;
	98	case IEEE_8021QAZ_TSA_ETS:
	99	tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX5E_MIN_BW_ALLOC;
	100	break;
	101	}
	102	}
	103	}
	104
105	int mlx5e_dcbnl_ieee_setets_core(struct mlx5e_priv priv, struct ieee_ets ets)
106	{
107	struct mlx5_core_dev *mdev = priv->mdev;
108	u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS];
109	u8 tc_group[IEEE_8021QAZ_MAX_TCS];
110	int max_tc = mlx5_max_tc(mdev);
111	int err;
112
113	if (!MLX5_CAP_GEN(mdev, ets))
114	return -ENOTSUPP;
115
116	mlx5e_build_tc_group(ets, tc_group, max_tc);
117	mlx5e_build_tc_tx_bw(ets, tc_tx_bw, tc_group, max_tc);
118
119	err = mlx5_set_port_prio_tc(mdev, ets->prio_tc);
120	if (err)
121	return err;
122
123	err = mlx5_set_port_tc_group(mdev, tc_group);
124	if (err)
125	return err;
126
127	return mlx5_set_port_tc_bw_alloc(mdev, tc_tx_bw);
128	}
129
130	static int mlx5e_dbcnl_validate_ets(struct ieee_ets *ets)
131	{
132	int bw_sum = 0;
133	int i;
134
135	/* Validate Priority */
136	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
137	if (ets->prio_tc[i] >= MLX5E_MAX_PRIORITY)
138	return -EINVAL;
139	}
140
141	/* Validate Bandwidth Sum */
142	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
143	if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS)
144	bw_sum += ets->tc_tx_bw[i];
145	}
146
147	if (bw_sum != 0 && bw_sum != 100)
148	return -EINVAL;
149	return 0;
150	}
151
152	static int mlx5e_dcbnl_ieee_setets(struct net_device *netdev,
153	struct ieee_ets *ets)
154	{
155	struct mlx5e_priv *priv = netdev_priv(netdev);
156	int err;
157
158	err = mlx5e_dbcnl_validate_ets(ets);
159	if (err)
160	return err;
161
162	err = mlx5e_dcbnl_ieee_setets_core(priv, ets);
163	if (err)
164	return err;
165
166	memcpy(&priv->params.ets, ets, sizeof(*ets));
167	priv->params.ets.ets_cap = mlx5_max_tc(priv->mdev) + 1;
168
169	return 0;
170	}
171
ef918433 AS	172	static int mlx5e_dcbnl_ieee_getpfc(struct net_device *dev,
	173	struct ieee_pfc *pfc)
	174	{
	175	struct mlx5e_priv *priv = netdev_priv(dev);
	176	struct mlx5_core_dev *mdev = priv->mdev;
cf678570 GP	177	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
cf678570 GP	178	int i;
ef918433 AS	179
ef918433 AS	180	pfc->pfc_cap = mlx5_max_tc(mdev) + 1;
cf678570 GP	181	for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
	182	pfc->requests[i] = PPORT_PER_PRIO_GET(pstats, i, tx_pause);
	183	pfc->indications[i] = PPORT_PER_PRIO_GET(pstats, i, rx_pause);
	184	}
ef918433 AS	185
	186	return mlx5_query_port_pfc(mdev, &pfc->pfc_en, NULL);
	187	}
	188
	189	static int mlx5e_dcbnl_ieee_setpfc(struct net_device *dev,
	190	struct ieee_pfc *pfc)
	191	{
	192	struct mlx5e_priv *priv = netdev_priv(dev);
	193	struct mlx5_core_dev *mdev = priv->mdev;
ef918433 AS	194	u8 curr_pfc_en;
	195	int ret;
	196
	197	mlx5_query_port_pfc(mdev, &curr_pfc_en, NULL);
	198
	199	if (pfc->pfc_en == curr_pfc_en)
	200	return 0;
	201
ef918433	202	ret = mlx5_set_port_pfc(mdev, pfc->pfc_en, pfc->pfc_en);
667daeda	203	mlx5_toggle_port_link(mdev);
ef918433 AS	204
	205	return ret;
	206	}
	207
08fb1dac SM	208	static u8 mlx5e_dcbnl_getdcbx(struct net_device *dev)
	209	{
	210	return DCB_CAP_DCBX_HOST \| DCB_CAP_DCBX_VER_IEEE;
	211	}
	212
	213	static u8 mlx5e_dcbnl_setdcbx(struct net_device *dev, u8 mode)
	214	{
	215	if ((mode & DCB_CAP_DCBX_LLD_MANAGED) \|\|
	216	(mode & DCB_CAP_DCBX_VER_CEE) \|\|
	217	!(mode & DCB_CAP_DCBX_VER_IEEE) \|\|
	218	!(mode & DCB_CAP_DCBX_HOST))
	219	return 1;
	220
	221	return 0;
	222	}
	223
d8880795 TT	224	static int mlx5e_dcbnl_ieee_getmaxrate(struct net_device *netdev,
	225	struct ieee_maxrate *maxrate)
	226	{
	227	struct mlx5e_priv *priv = netdev_priv(netdev);
	228	struct mlx5_core_dev *mdev = priv->mdev;
	229	u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
	230	u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
	231	int err;
	232	int i;
	233
	234	err = mlx5_query_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
	235	if (err)
	236	return err;
	237
	238	memset(maxrate->tc_maxrate, 0, sizeof(maxrate->tc_maxrate));
	239
	240	for (i = 0; i <= mlx5_max_tc(mdev); i++) {
	241	switch (max_bw_unit[i]) {
	242	case MLX5_100_MBPS_UNIT:
	243	maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_100MB;
	244	break;
	245	case MLX5_GBPS_UNIT:
	246	maxrate->tc_maxrate[i] = max_bw_value[i] * MLX5E_1GB;
	247	break;
	248	case MLX5_BW_NO_LIMIT:
	249	break;
	250	default:
	251	WARN(true, "non-supported BW unit");
	252	break;
	253	}
	254	}
	255
	256	return 0;
	257	}
	258
	259	static int mlx5e_dcbnl_ieee_setmaxrate(struct net_device *netdev,
	260	struct ieee_maxrate *maxrate)
	261	{
	262	struct mlx5e_priv *priv = netdev_priv(netdev);
	263	struct mlx5_core_dev *mdev = priv->mdev;
	264	u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
	265	u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
	266	__u64 upper_limit_mbps = roundup(255 * MLX5E_100MB, MLX5E_1GB);
	267	int i;
	268
	269	memset(max_bw_value, 0, sizeof(max_bw_value));
	270	memset(max_bw_unit, 0, sizeof(max_bw_unit));
	271
	272	for (i = 0; i <= mlx5_max_tc(mdev); i++) {
	273	if (!maxrate->tc_maxrate[i]) {
	274	max_bw_unit[i] = MLX5_BW_NO_LIMIT;
	275	continue;
	276	}
	277	if (maxrate->tc_maxrate[i] < upper_limit_mbps) {
	278	max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
	279	MLX5E_100MB);
	280	max_bw_value[i] = max_bw_value[i] ? max_bw_value[i] : 1;
	281	max_bw_unit[i] = MLX5_100_MBPS_UNIT;
	282	} else {
	283	max_bw_value[i] = div_u64(maxrate->tc_maxrate[i],
	284	MLX5E_1GB);
	285	max_bw_unit[i] = MLX5_GBPS_UNIT;
	286	}
	287	}
288
289	return mlx5_modify_port_ets_rate_limit(mdev, max_bw_value, max_bw_unit);
290	}
291
08fb1dac SM	292	const struct dcbnl_rtnl_ops mlx5e_dcbnl_ops = {
	293	.ieee_getets = mlx5e_dcbnl_ieee_getets,
	294	.ieee_setets = mlx5e_dcbnl_ieee_setets,
d8880795 TT	295	.ieee_getmaxrate = mlx5e_dcbnl_ieee_getmaxrate,
d8880795 TT	296	.ieee_setmaxrate = mlx5e_dcbnl_ieee_setmaxrate,
ef918433 AS	297	.ieee_getpfc = mlx5e_dcbnl_ieee_getpfc,
ef918433 AS	298	.ieee_setpfc = mlx5e_dcbnl_ieee_setpfc,
08fb1dac SM	299	.getdcbx = mlx5e_dcbnl_getdcbx,
	300	.setdcbx = mlx5e_dcbnl_setdcbx,
	301	};