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e586b3b0 AV |
1 | /* |
2 | * Copyright (c) 2015, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/ip.h> | |
34 | #include <linux/ipv6.h> | |
35 | #include <linux/tcp.h> | |
7ae92ae5 | 36 | #include <net/busy_poll.h> |
e586b3b0 AV |
37 | #include "en.h" |
38 | ||
39 | static inline int mlx5e_alloc_rx_wqe(struct mlx5e_rq *rq, | |
40 | struct mlx5e_rx_wqe *wqe, u16 ix) | |
41 | { | |
42 | struct sk_buff *skb; | |
43 | dma_addr_t dma_addr; | |
44 | ||
45 | skb = netdev_alloc_skb(rq->netdev, rq->wqe_sz); | |
46 | if (unlikely(!skb)) | |
47 | return -ENOMEM; | |
48 | ||
e586b3b0 AV |
49 | dma_addr = dma_map_single(rq->pdev, |
50 | /* hw start padding */ | |
fc11fbf9 SM |
51 | skb->data, |
52 | /* hw end padding */ | |
e586b3b0 AV |
53 | rq->wqe_sz, |
54 | DMA_FROM_DEVICE); | |
55 | ||
56 | if (unlikely(dma_mapping_error(rq->pdev, dma_addr))) | |
57 | goto err_free_skb; | |
58 | ||
fc11fbf9 SM |
59 | skb_reserve(skb, MLX5E_NET_IP_ALIGN); |
60 | ||
e586b3b0 AV |
61 | *((dma_addr_t *)skb->cb) = dma_addr; |
62 | wqe->data.addr = cpu_to_be64(dma_addr + MLX5E_NET_IP_ALIGN); | |
63 | ||
64 | rq->skb[ix] = skb; | |
65 | ||
66 | return 0; | |
67 | ||
68 | err_free_skb: | |
69 | dev_kfree_skb(skb); | |
70 | ||
71 | return -ENOMEM; | |
72 | } | |
73 | ||
74 | bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq) | |
75 | { | |
76 | struct mlx5_wq_ll *wq = &rq->wq; | |
77 | ||
78 | if (unlikely(!test_bit(MLX5E_RQ_STATE_POST_WQES_ENABLE, &rq->state))) | |
79 | return false; | |
80 | ||
81 | while (!mlx5_wq_ll_is_full(wq)) { | |
82 | struct mlx5e_rx_wqe *wqe = mlx5_wq_ll_get_wqe(wq, wq->head); | |
83 | ||
84 | if (unlikely(mlx5e_alloc_rx_wqe(rq, wqe, wq->head))) | |
85 | break; | |
86 | ||
87 | mlx5_wq_ll_push(wq, be16_to_cpu(wqe->next.next_wqe_index)); | |
88 | } | |
89 | ||
90 | /* ensure wqes are visible to device before updating doorbell record */ | |
91 | dma_wmb(); | |
92 | ||
93 | mlx5_wq_ll_update_db_record(wq); | |
94 | ||
95 | return !mlx5_wq_ll_is_full(wq); | |
96 | } | |
97 | ||
98 | static void mlx5e_lro_update_hdr(struct sk_buff *skb, struct mlx5_cqe64 *cqe) | |
99 | { | |
100 | struct ethhdr *eth = (struct ethhdr *)(skb->data); | |
101 | struct iphdr *ipv4 = (struct iphdr *)(skb->data + ETH_HLEN); | |
102 | struct ipv6hdr *ipv6 = (struct ipv6hdr *)(skb->data + ETH_HLEN); | |
103 | struct tcphdr *tcp; | |
104 | ||
105 | u8 l4_hdr_type = get_cqe_l4_hdr_type(cqe); | |
106 | int tcp_ack = ((CQE_L4_HDR_TYPE_TCP_ACK_NO_DATA == l4_hdr_type) || | |
107 | (CQE_L4_HDR_TYPE_TCP_ACK_AND_DATA == l4_hdr_type)); | |
108 | ||
109 | u16 tot_len = be32_to_cpu(cqe->byte_cnt) - ETH_HLEN; | |
110 | ||
111 | if (eth->h_proto == htons(ETH_P_IP)) { | |
112 | tcp = (struct tcphdr *)(skb->data + ETH_HLEN + | |
113 | sizeof(struct iphdr)); | |
114 | ipv6 = NULL; | |
d9a40271 | 115 | skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; |
e586b3b0 AV |
116 | } else { |
117 | tcp = (struct tcphdr *)(skb->data + ETH_HLEN + | |
118 | sizeof(struct ipv6hdr)); | |
119 | ipv4 = NULL; | |
d9a40271 | 120 | skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; |
e586b3b0 AV |
121 | } |
122 | ||
123 | if (get_cqe_lro_tcppsh(cqe)) | |
124 | tcp->psh = 1; | |
125 | ||
126 | if (tcp_ack) { | |
127 | tcp->ack = 1; | |
128 | tcp->ack_seq = cqe->lro_ack_seq_num; | |
129 | tcp->window = cqe->lro_tcp_win; | |
130 | } | |
131 | ||
132 | if (ipv4) { | |
133 | ipv4->ttl = cqe->lro_min_ttl; | |
134 | ipv4->tot_len = cpu_to_be16(tot_len); | |
135 | ipv4->check = 0; | |
136 | ipv4->check = ip_fast_csum((unsigned char *)ipv4, | |
137 | ipv4->ihl); | |
138 | } else { | |
139 | ipv6->hop_limit = cqe->lro_min_ttl; | |
140 | ipv6->payload_len = cpu_to_be16(tot_len - | |
141 | sizeof(struct ipv6hdr)); | |
142 | } | |
143 | } | |
144 | ||
145 | static inline void mlx5e_skb_set_hash(struct mlx5_cqe64 *cqe, | |
146 | struct sk_buff *skb) | |
147 | { | |
148 | u8 cht = cqe->rss_hash_type; | |
149 | int ht = (cht & CQE_RSS_HTYPE_L4) ? PKT_HASH_TYPE_L4 : | |
150 | (cht & CQE_RSS_HTYPE_IP) ? PKT_HASH_TYPE_L3 : | |
151 | PKT_HASH_TYPE_NONE; | |
152 | skb_set_hash(skb, be32_to_cpu(cqe->rss_hash_result), ht); | |
153 | } | |
154 | ||
bbceefce AS |
155 | static inline bool is_first_ethertype_ip(struct sk_buff *skb) |
156 | { | |
157 | __be16 ethertype = ((struct ethhdr *)skb->data)->h_proto; | |
158 | ||
159 | return (ethertype == htons(ETH_P_IP) || ethertype == htons(ETH_P_IPV6)); | |
160 | } | |
161 | ||
162 | static inline void mlx5e_handle_csum(struct net_device *netdev, | |
163 | struct mlx5_cqe64 *cqe, | |
164 | struct mlx5e_rq *rq, | |
165 | struct sk_buff *skb) | |
166 | { | |
167 | if (unlikely(!(netdev->features & NETIF_F_RXCSUM))) | |
168 | goto csum_none; | |
169 | ||
170 | if (likely(cqe->hds_ip_ext & CQE_L4_OK)) { | |
171 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
172 | } else if (is_first_ethertype_ip(skb)) { | |
173 | skb->ip_summed = CHECKSUM_COMPLETE; | |
ecf842f6 | 174 | skb->csum = csum_unfold((__force __sum16)cqe->check_sum); |
bbceefce AS |
175 | rq->stats.csum_sw++; |
176 | } else { | |
177 | goto csum_none; | |
178 | } | |
179 | ||
180 | return; | |
181 | ||
182 | csum_none: | |
183 | skb->ip_summed = CHECKSUM_NONE; | |
184 | rq->stats.csum_none++; | |
185 | } | |
186 | ||
e586b3b0 AV |
187 | static inline void mlx5e_build_rx_skb(struct mlx5_cqe64 *cqe, |
188 | struct mlx5e_rq *rq, | |
189 | struct sk_buff *skb) | |
190 | { | |
191 | struct net_device *netdev = rq->netdev; | |
192 | u32 cqe_bcnt = be32_to_cpu(cqe->byte_cnt); | |
193 | int lro_num_seg; | |
194 | ||
195 | skb_put(skb, cqe_bcnt); | |
196 | ||
197 | lro_num_seg = be32_to_cpu(cqe->srqn) >> 24; | |
198 | if (lro_num_seg > 1) { | |
199 | mlx5e_lro_update_hdr(skb, cqe); | |
d9a40271 | 200 | skb_shinfo(skb)->gso_size = DIV_ROUND_UP(cqe_bcnt, lro_num_seg); |
e586b3b0 AV |
201 | rq->stats.lro_packets++; |
202 | rq->stats.lro_bytes += cqe_bcnt; | |
203 | } | |
204 | ||
bbceefce | 205 | mlx5e_handle_csum(netdev, cqe, rq, skb); |
e586b3b0 AV |
206 | |
207 | skb->protocol = eth_type_trans(skb, netdev); | |
208 | ||
209 | skb_record_rx_queue(skb, rq->ix); | |
210 | ||
211 | if (likely(netdev->features & NETIF_F_RXHASH)) | |
212 | mlx5e_skb_set_hash(cqe, skb); | |
213 | ||
214 | if (cqe_has_vlan(cqe)) | |
215 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), | |
216 | be16_to_cpu(cqe->vlan_info)); | |
217 | } | |
218 | ||
44fb6fbb | 219 | int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget) |
e586b3b0 | 220 | { |
e3391054 | 221 | struct mlx5e_rq *rq = container_of(cq, struct mlx5e_rq, cq); |
44fb6fbb | 222 | int work_done; |
e586b3b0 AV |
223 | |
224 | /* avoid accessing cq (dma coherent memory) if not needed */ | |
225 | if (!test_and_clear_bit(MLX5E_CQ_HAS_CQES, &cq->flags)) | |
44fb6fbb | 226 | return 0; |
e586b3b0 | 227 | |
44fb6fbb | 228 | for (work_done = 0; work_done < budget; work_done++) { |
e586b3b0 AV |
229 | struct mlx5e_rx_wqe *wqe; |
230 | struct mlx5_cqe64 *cqe; | |
231 | struct sk_buff *skb; | |
232 | __be16 wqe_counter_be; | |
233 | u16 wqe_counter; | |
234 | ||
235 | cqe = mlx5e_get_cqe(cq); | |
236 | if (!cqe) | |
237 | break; | |
238 | ||
a1f5a1a8 AS |
239 | mlx5_cqwq_pop(&cq->wq); |
240 | ||
e586b3b0 AV |
241 | wqe_counter_be = cqe->wqe_counter; |
242 | wqe_counter = be16_to_cpu(wqe_counter_be); | |
243 | wqe = mlx5_wq_ll_get_wqe(&rq->wq, wqe_counter); | |
244 | skb = rq->skb[wqe_counter]; | |
99611ba1 | 245 | prefetch(skb->data); |
e586b3b0 AV |
246 | rq->skb[wqe_counter] = NULL; |
247 | ||
248 | dma_unmap_single(rq->pdev, | |
249 | *((dma_addr_t *)skb->cb), | |
fc11fbf9 | 250 | rq->wqe_sz, |
e586b3b0 AV |
251 | DMA_FROM_DEVICE); |
252 | ||
253 | if (unlikely((cqe->op_own >> 4) != MLX5_CQE_RESP_SEND)) { | |
254 | rq->stats.wqe_err++; | |
255 | dev_kfree_skb(skb); | |
256 | goto wq_ll_pop; | |
257 | } | |
258 | ||
259 | mlx5e_build_rx_skb(cqe, rq, skb); | |
260 | rq->stats.packets++; | |
261 | napi_gro_receive(cq->napi, skb); | |
262 | ||
263 | wq_ll_pop: | |
264 | mlx5_wq_ll_pop(&rq->wq, wqe_counter_be, | |
265 | &wqe->next.next_wqe_index); | |
266 | } | |
267 | ||
268 | mlx5_cqwq_update_db_record(&cq->wq); | |
269 | ||
270 | /* ensure cq space is freed before enabling more cqes */ | |
271 | wmb(); | |
272 | ||
44fb6fbb | 273 | if (work_done == budget) |
e586b3b0 | 274 | set_bit(MLX5E_CQ_HAS_CQES, &cq->flags); |
e586b3b0 | 275 | |
44fb6fbb | 276 | return work_done; |
e586b3b0 | 277 | } |