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afb736e9 AV |
1 | /* |
2 | * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/mlx5/driver.h> | |
34 | #include "mlx5_core.h" | |
35 | #include "transobj.h" | |
36 | ||
7db22ffb | 37 | int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn) |
afb736e9 AV |
38 | { |
39 | u32 out[MLX5_ST_SZ_DW(create_rq_out)]; | |
40 | int err; | |
41 | ||
42 | MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ); | |
43 | ||
44 | memset(out, 0, sizeof(out)); | |
45 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
46 | if (!err) | |
47 | *rqn = MLX5_GET(create_rq_out, out, rqn); | |
48 | ||
49 | return err; | |
50 | } | |
51 | ||
7db22ffb | 52 | int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in, int inlen) |
afb736e9 AV |
53 | { |
54 | u32 out[MLX5_ST_SZ_DW(modify_rq_out)]; | |
55 | ||
56 | MLX5_SET(modify_rq_in, in, rqn, rqn); | |
57 | MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ); | |
58 | ||
59 | memset(out, 0, sizeof(out)); | |
60 | return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
61 | } | |
62 | ||
7db22ffb | 63 | void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn) |
afb736e9 AV |
64 | { |
65 | u32 in[MLX5_ST_SZ_DW(destroy_rq_in)]; | |
66 | u32 out[MLX5_ST_SZ_DW(destroy_rq_out)]; | |
67 | ||
68 | memset(in, 0, sizeof(in)); | |
69 | ||
70 | MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ); | |
71 | MLX5_SET(destroy_rq_in, in, rqn, rqn); | |
72 | ||
73 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
74 | } | |
75 | ||
7db22ffb | 76 | int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn) |
afb736e9 AV |
77 | { |
78 | u32 out[MLX5_ST_SZ_DW(create_sq_out)]; | |
79 | int err; | |
80 | ||
81 | MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ); | |
82 | ||
83 | memset(out, 0, sizeof(out)); | |
84 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
85 | if (!err) | |
86 | *sqn = MLX5_GET(create_sq_out, out, sqn); | |
87 | ||
88 | return err; | |
89 | } | |
90 | ||
7db22ffb | 91 | int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in, int inlen) |
afb736e9 AV |
92 | { |
93 | u32 out[MLX5_ST_SZ_DW(modify_sq_out)]; | |
94 | ||
95 | MLX5_SET(modify_sq_in, in, sqn, sqn); | |
96 | MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ); | |
97 | ||
98 | memset(out, 0, sizeof(out)); | |
99 | return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
100 | } | |
101 | ||
7db22ffb | 102 | void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn) |
afb736e9 AV |
103 | { |
104 | u32 in[MLX5_ST_SZ_DW(destroy_sq_in)]; | |
105 | u32 out[MLX5_ST_SZ_DW(destroy_sq_out)]; | |
106 | ||
107 | memset(in, 0, sizeof(in)); | |
108 | ||
109 | MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ); | |
110 | MLX5_SET(destroy_sq_in, in, sqn, sqn); | |
111 | ||
112 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
113 | } | |
114 | ||
7db22ffb HA |
115 | int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen, |
116 | u32 *tirn) | |
afb736e9 AV |
117 | { |
118 | u32 out[MLX5_ST_SZ_DW(create_tir_out)]; | |
119 | int err; | |
120 | ||
121 | MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); | |
122 | ||
123 | memset(out, 0, sizeof(out)); | |
124 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
125 | if (!err) | |
126 | *tirn = MLX5_GET(create_tir_out, out, tirn); | |
127 | ||
128 | return err; | |
129 | } | |
130 | ||
7db22ffb | 131 | void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn) |
afb736e9 AV |
132 | { |
133 | u32 in[MLX5_ST_SZ_DW(destroy_tir_out)]; | |
134 | u32 out[MLX5_ST_SZ_DW(destroy_tir_out)]; | |
135 | ||
136 | memset(in, 0, sizeof(in)); | |
137 | ||
138 | MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR); | |
139 | MLX5_SET(destroy_tir_in, in, tirn, tirn); | |
140 | ||
141 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
142 | } | |
143 | ||
7db22ffb HA |
144 | int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen, |
145 | u32 *tisn) | |
afb736e9 AV |
146 | { |
147 | u32 out[MLX5_ST_SZ_DW(create_tis_out)]; | |
148 | int err; | |
149 | ||
150 | MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS); | |
151 | ||
152 | memset(out, 0, sizeof(out)); | |
153 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
154 | if (!err) | |
155 | *tisn = MLX5_GET(create_tis_out, out, tisn); | |
156 | ||
157 | return err; | |
158 | } | |
159 | ||
7db22ffb | 160 | void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn) |
afb736e9 AV |
161 | { |
162 | u32 in[MLX5_ST_SZ_DW(destroy_tis_out)]; | |
163 | u32 out[MLX5_ST_SZ_DW(destroy_tis_out)]; | |
164 | ||
165 | memset(in, 0, sizeof(in)); | |
166 | ||
167 | MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS); | |
168 | MLX5_SET(destroy_tis_in, in, tisn, tisn); | |
169 | ||
170 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
171 | } | |
01949d01 HA |
172 | |
173 | int mlx5_core_create_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen, | |
174 | u32 *rmpn) | |
175 | { | |
176 | u32 out[MLX5_ST_SZ_DW(create_rmp_out)]; | |
177 | int err; | |
178 | ||
179 | MLX5_SET(create_rmp_in, in, opcode, MLX5_CMD_OP_CREATE_RMP); | |
180 | ||
181 | memset(out, 0, sizeof(out)); | |
182 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
183 | if (!err) | |
184 | *rmpn = MLX5_GET(create_rmp_out, out, rmpn); | |
185 | ||
186 | return err; | |
187 | } | |
188 | ||
189 | int mlx5_core_modify_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen) | |
190 | { | |
191 | u32 out[MLX5_ST_SZ_DW(modify_rmp_out)]; | |
192 | ||
193 | MLX5_SET(modify_rmp_in, in, opcode, MLX5_CMD_OP_MODIFY_RMP); | |
194 | ||
195 | memset(out, 0, sizeof(out)); | |
196 | return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
197 | } | |
198 | ||
199 | int mlx5_core_destroy_rmp(struct mlx5_core_dev *dev, u32 rmpn) | |
200 | { | |
201 | u32 in[MLX5_ST_SZ_DW(destroy_rmp_in)]; | |
202 | u32 out[MLX5_ST_SZ_DW(destroy_rmp_out)]; | |
203 | ||
204 | memset(in, 0, sizeof(in)); | |
205 | ||
206 | MLX5_SET(destroy_rmp_in, in, opcode, MLX5_CMD_OP_DESTROY_RMP); | |
207 | MLX5_SET(destroy_rmp_in, in, rmpn, rmpn); | |
208 | ||
209 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, | |
210 | sizeof(out)); | |
211 | } | |
212 | ||
213 | int mlx5_core_query_rmp(struct mlx5_core_dev *dev, u32 rmpn, u32 *out) | |
214 | { | |
215 | u32 in[MLX5_ST_SZ_DW(query_rmp_in)]; | |
216 | int outlen = MLX5_ST_SZ_BYTES(query_rmp_out); | |
217 | ||
218 | memset(in, 0, sizeof(in)); | |
219 | MLX5_SET(query_rmp_in, in, opcode, MLX5_CMD_OP_QUERY_RMP); | |
220 | MLX5_SET(query_rmp_in, in, rmpn, rmpn); | |
221 | ||
222 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, outlen); | |
223 | } | |
224 | ||
225 | int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm) | |
226 | { | |
227 | void *in; | |
228 | void *rmpc; | |
229 | void *wq; | |
230 | void *bitmask; | |
231 | int err; | |
232 | ||
233 | in = mlx5_vzalloc(MLX5_ST_SZ_BYTES(modify_rmp_in)); | |
234 | if (!in) | |
235 | return -ENOMEM; | |
236 | ||
237 | rmpc = MLX5_ADDR_OF(modify_rmp_in, in, ctx); | |
238 | bitmask = MLX5_ADDR_OF(modify_rmp_in, in, bitmask); | |
239 | wq = MLX5_ADDR_OF(rmpc, rmpc, wq); | |
240 | ||
241 | MLX5_SET(modify_rmp_in, in, rmp_state, MLX5_RMPC_STATE_RDY); | |
242 | MLX5_SET(modify_rmp_in, in, rmpn, rmpn); | |
243 | MLX5_SET(wq, wq, lwm, lwm); | |
244 | MLX5_SET(rmp_bitmask, bitmask, lwm, 1); | |
245 | MLX5_SET(rmpc, rmpc, state, MLX5_RMPC_STATE_RDY); | |
246 | ||
247 | err = mlx5_core_modify_rmp(dev, in, MLX5_ST_SZ_BYTES(modify_rmp_in)); | |
248 | ||
249 | kvfree(in); | |
250 | ||
251 | return err; | |
252 | } | |
253 | ||
254 | int mlx5_core_create_xsrq(struct mlx5_core_dev *dev, u32 *in, int inlen, | |
255 | u32 *xsrqn) | |
256 | { | |
257 | u32 out[MLX5_ST_SZ_DW(create_xrc_srq_out)]; | |
258 | int err; | |
259 | ||
260 | MLX5_SET(create_xrc_srq_in, in, opcode, MLX5_CMD_OP_CREATE_XRC_SRQ); | |
261 | ||
262 | memset(out, 0, sizeof(out)); | |
263 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
264 | if (!err) | |
265 | *xsrqn = MLX5_GET(create_xrc_srq_out, out, xrc_srqn); | |
266 | ||
267 | return err; | |
268 | } | |
269 | ||
270 | int mlx5_core_destroy_xsrq(struct mlx5_core_dev *dev, u32 xsrqn) | |
271 | { | |
272 | u32 in[MLX5_ST_SZ_DW(destroy_xrc_srq_in)]; | |
273 | u32 out[MLX5_ST_SZ_DW(destroy_xrc_srq_out)]; | |
274 | ||
275 | memset(in, 0, sizeof(in)); | |
276 | memset(out, 0, sizeof(out)); | |
277 | ||
278 | MLX5_SET(destroy_xrc_srq_in, in, opcode, MLX5_CMD_OP_DESTROY_XRC_SRQ); | |
279 | MLX5_SET(destroy_xrc_srq_in, in, xrc_srqn, xsrqn); | |
280 | ||
281 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, | |
282 | sizeof(out)); | |
283 | } | |
284 | ||
285 | int mlx5_core_query_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u32 *out) | |
286 | { | |
287 | u32 in[MLX5_ST_SZ_DW(query_xrc_srq_in)]; | |
288 | void *srqc; | |
289 | void *xrc_srqc; | |
290 | int err; | |
291 | ||
292 | memset(in, 0, sizeof(in)); | |
293 | MLX5_SET(query_xrc_srq_in, in, opcode, MLX5_CMD_OP_QUERY_XRC_SRQ); | |
294 | MLX5_SET(query_xrc_srq_in, in, xrc_srqn, xsrqn); | |
295 | ||
296 | err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), | |
297 | out, | |
298 | MLX5_ST_SZ_BYTES(query_xrc_srq_out)); | |
299 | if (!err) { | |
300 | xrc_srqc = MLX5_ADDR_OF(query_xrc_srq_out, out, | |
301 | xrc_srq_context_entry); | |
302 | srqc = MLX5_ADDR_OF(query_srq_out, out, srq_context_entry); | |
303 | memcpy(srqc, xrc_srqc, MLX5_ST_SZ_BYTES(srqc)); | |
304 | } | |
305 | ||
306 | return err; | |
307 | } | |
308 | ||
309 | int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u16 lwm) | |
310 | { | |
311 | u32 in[MLX5_ST_SZ_DW(arm_xrc_srq_in)]; | |
312 | u32 out[MLX5_ST_SZ_DW(arm_xrc_srq_out)]; | |
313 | ||
314 | memset(in, 0, sizeof(in)); | |
315 | memset(out, 0, sizeof(out)); | |
316 | ||
317 | MLX5_SET(arm_xrc_srq_in, in, opcode, MLX5_CMD_OP_ARM_XRC_SRQ); | |
318 | MLX5_SET(arm_xrc_srq_in, in, xrc_srqn, xsrqn); | |
319 | MLX5_SET(arm_xrc_srq_in, in, lwm, lwm); | |
320 | MLX5_SET(arm_xrc_srq_in, in, op_mod, | |
321 | MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ); | |
322 | ||
323 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, | |
324 | sizeof(out)); | |
325 | } |