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afb736e9 AV |
1 | /* |
2 | * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/mlx5/driver.h> | |
34 | #include "mlx5_core.h" | |
35 | #include "transobj.h" | |
36 | ||
56508b50 AS |
37 | int mlx5_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn) |
38 | { | |
39 | u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)]; | |
40 | u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)]; | |
41 | int err; | |
42 | ||
43 | memset(in, 0, sizeof(in)); | |
44 | memset(out, 0, sizeof(out)); | |
45 | ||
46 | MLX5_SET(alloc_transport_domain_in, in, opcode, | |
47 | MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN); | |
48 | ||
49 | err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
50 | if (!err) | |
51 | *tdn = MLX5_GET(alloc_transport_domain_out, out, | |
52 | transport_domain); | |
53 | ||
54 | return err; | |
55 | } | |
56 | ||
57 | void mlx5_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn) | |
58 | { | |
59 | u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)]; | |
60 | u32 out[MLX5_ST_SZ_DW(dealloc_transport_domain_out)]; | |
61 | ||
62 | memset(in, 0, sizeof(in)); | |
63 | memset(out, 0, sizeof(out)); | |
64 | ||
65 | MLX5_SET(dealloc_transport_domain_in, in, opcode, | |
66 | MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN); | |
67 | MLX5_SET(dealloc_transport_domain_in, in, transport_domain, tdn); | |
68 | ||
69 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
70 | } | |
71 | ||
7db22ffb | 72 | int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn) |
afb736e9 AV |
73 | { |
74 | u32 out[MLX5_ST_SZ_DW(create_rq_out)]; | |
75 | int err; | |
76 | ||
77 | MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ); | |
78 | ||
79 | memset(out, 0, sizeof(out)); | |
80 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
81 | if (!err) | |
82 | *rqn = MLX5_GET(create_rq_out, out, rqn); | |
83 | ||
84 | return err; | |
85 | } | |
86 | ||
7db22ffb | 87 | int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in, int inlen) |
afb736e9 AV |
88 | { |
89 | u32 out[MLX5_ST_SZ_DW(modify_rq_out)]; | |
90 | ||
91 | MLX5_SET(modify_rq_in, in, rqn, rqn); | |
92 | MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ); | |
93 | ||
94 | memset(out, 0, sizeof(out)); | |
95 | return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
96 | } | |
97 | ||
7db22ffb | 98 | void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn) |
afb736e9 AV |
99 | { |
100 | u32 in[MLX5_ST_SZ_DW(destroy_rq_in)]; | |
101 | u32 out[MLX5_ST_SZ_DW(destroy_rq_out)]; | |
102 | ||
103 | memset(in, 0, sizeof(in)); | |
104 | ||
105 | MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ); | |
106 | MLX5_SET(destroy_rq_in, in, rqn, rqn); | |
107 | ||
108 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
109 | } | |
110 | ||
7db22ffb | 111 | int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn) |
afb736e9 AV |
112 | { |
113 | u32 out[MLX5_ST_SZ_DW(create_sq_out)]; | |
114 | int err; | |
115 | ||
116 | MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ); | |
117 | ||
118 | memset(out, 0, sizeof(out)); | |
119 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
120 | if (!err) | |
121 | *sqn = MLX5_GET(create_sq_out, out, sqn); | |
122 | ||
123 | return err; | |
124 | } | |
125 | ||
7db22ffb | 126 | int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in, int inlen) |
afb736e9 AV |
127 | { |
128 | u32 out[MLX5_ST_SZ_DW(modify_sq_out)]; | |
129 | ||
130 | MLX5_SET(modify_sq_in, in, sqn, sqn); | |
131 | MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ); | |
132 | ||
133 | memset(out, 0, sizeof(out)); | |
134 | return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
135 | } | |
136 | ||
7db22ffb | 137 | void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn) |
afb736e9 AV |
138 | { |
139 | u32 in[MLX5_ST_SZ_DW(destroy_sq_in)]; | |
140 | u32 out[MLX5_ST_SZ_DW(destroy_sq_out)]; | |
141 | ||
142 | memset(in, 0, sizeof(in)); | |
143 | ||
144 | MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ); | |
145 | MLX5_SET(destroy_sq_in, in, sqn, sqn); | |
146 | ||
147 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
148 | } | |
149 | ||
7db22ffb HA |
150 | int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen, |
151 | u32 *tirn) | |
afb736e9 AV |
152 | { |
153 | u32 out[MLX5_ST_SZ_DW(create_tir_out)]; | |
154 | int err; | |
155 | ||
156 | MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); | |
157 | ||
158 | memset(out, 0, sizeof(out)); | |
159 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
160 | if (!err) | |
161 | *tirn = MLX5_GET(create_tir_out, out, tirn); | |
162 | ||
163 | return err; | |
164 | } | |
165 | ||
7db22ffb | 166 | void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn) |
afb736e9 AV |
167 | { |
168 | u32 in[MLX5_ST_SZ_DW(destroy_tir_out)]; | |
169 | u32 out[MLX5_ST_SZ_DW(destroy_tir_out)]; | |
170 | ||
171 | memset(in, 0, sizeof(in)); | |
172 | ||
173 | MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR); | |
174 | MLX5_SET(destroy_tir_in, in, tirn, tirn); | |
175 | ||
176 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
177 | } | |
178 | ||
7db22ffb HA |
179 | int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen, |
180 | u32 *tisn) | |
afb736e9 AV |
181 | { |
182 | u32 out[MLX5_ST_SZ_DW(create_tis_out)]; | |
183 | int err; | |
184 | ||
185 | MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS); | |
186 | ||
187 | memset(out, 0, sizeof(out)); | |
188 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
189 | if (!err) | |
190 | *tisn = MLX5_GET(create_tis_out, out, tisn); | |
191 | ||
192 | return err; | |
193 | } | |
194 | ||
7db22ffb | 195 | void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn) |
afb736e9 AV |
196 | { |
197 | u32 in[MLX5_ST_SZ_DW(destroy_tis_out)]; | |
198 | u32 out[MLX5_ST_SZ_DW(destroy_tis_out)]; | |
199 | ||
200 | memset(in, 0, sizeof(in)); | |
201 | ||
202 | MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS); | |
203 | MLX5_SET(destroy_tis_in, in, tisn, tisn); | |
204 | ||
205 | mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out)); | |
206 | } | |
01949d01 HA |
207 | |
208 | int mlx5_core_create_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen, | |
209 | u32 *rmpn) | |
210 | { | |
211 | u32 out[MLX5_ST_SZ_DW(create_rmp_out)]; | |
212 | int err; | |
213 | ||
214 | MLX5_SET(create_rmp_in, in, opcode, MLX5_CMD_OP_CREATE_RMP); | |
215 | ||
216 | memset(out, 0, sizeof(out)); | |
217 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
218 | if (!err) | |
219 | *rmpn = MLX5_GET(create_rmp_out, out, rmpn); | |
220 | ||
221 | return err; | |
222 | } | |
223 | ||
224 | int mlx5_core_modify_rmp(struct mlx5_core_dev *dev, u32 *in, int inlen) | |
225 | { | |
226 | u32 out[MLX5_ST_SZ_DW(modify_rmp_out)]; | |
227 | ||
228 | MLX5_SET(modify_rmp_in, in, opcode, MLX5_CMD_OP_MODIFY_RMP); | |
229 | ||
230 | memset(out, 0, sizeof(out)); | |
231 | return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
232 | } | |
233 | ||
234 | int mlx5_core_destroy_rmp(struct mlx5_core_dev *dev, u32 rmpn) | |
235 | { | |
236 | u32 in[MLX5_ST_SZ_DW(destroy_rmp_in)]; | |
237 | u32 out[MLX5_ST_SZ_DW(destroy_rmp_out)]; | |
238 | ||
239 | memset(in, 0, sizeof(in)); | |
240 | ||
241 | MLX5_SET(destroy_rmp_in, in, opcode, MLX5_CMD_OP_DESTROY_RMP); | |
242 | MLX5_SET(destroy_rmp_in, in, rmpn, rmpn); | |
243 | ||
244 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, | |
245 | sizeof(out)); | |
246 | } | |
247 | ||
248 | int mlx5_core_query_rmp(struct mlx5_core_dev *dev, u32 rmpn, u32 *out) | |
249 | { | |
250 | u32 in[MLX5_ST_SZ_DW(query_rmp_in)]; | |
251 | int outlen = MLX5_ST_SZ_BYTES(query_rmp_out); | |
252 | ||
253 | memset(in, 0, sizeof(in)); | |
254 | MLX5_SET(query_rmp_in, in, opcode, MLX5_CMD_OP_QUERY_RMP); | |
255 | MLX5_SET(query_rmp_in, in, rmpn, rmpn); | |
256 | ||
257 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, outlen); | |
258 | } | |
259 | ||
260 | int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm) | |
261 | { | |
262 | void *in; | |
263 | void *rmpc; | |
264 | void *wq; | |
265 | void *bitmask; | |
266 | int err; | |
267 | ||
268 | in = mlx5_vzalloc(MLX5_ST_SZ_BYTES(modify_rmp_in)); | |
269 | if (!in) | |
270 | return -ENOMEM; | |
271 | ||
272 | rmpc = MLX5_ADDR_OF(modify_rmp_in, in, ctx); | |
273 | bitmask = MLX5_ADDR_OF(modify_rmp_in, in, bitmask); | |
274 | wq = MLX5_ADDR_OF(rmpc, rmpc, wq); | |
275 | ||
276 | MLX5_SET(modify_rmp_in, in, rmp_state, MLX5_RMPC_STATE_RDY); | |
277 | MLX5_SET(modify_rmp_in, in, rmpn, rmpn); | |
278 | MLX5_SET(wq, wq, lwm, lwm); | |
279 | MLX5_SET(rmp_bitmask, bitmask, lwm, 1); | |
280 | MLX5_SET(rmpc, rmpc, state, MLX5_RMPC_STATE_RDY); | |
281 | ||
282 | err = mlx5_core_modify_rmp(dev, in, MLX5_ST_SZ_BYTES(modify_rmp_in)); | |
283 | ||
284 | kvfree(in); | |
285 | ||
286 | return err; | |
287 | } | |
288 | ||
289 | int mlx5_core_create_xsrq(struct mlx5_core_dev *dev, u32 *in, int inlen, | |
290 | u32 *xsrqn) | |
291 | { | |
292 | u32 out[MLX5_ST_SZ_DW(create_xrc_srq_out)]; | |
293 | int err; | |
294 | ||
295 | MLX5_SET(create_xrc_srq_in, in, opcode, MLX5_CMD_OP_CREATE_XRC_SRQ); | |
296 | ||
297 | memset(out, 0, sizeof(out)); | |
298 | err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out)); | |
299 | if (!err) | |
300 | *xsrqn = MLX5_GET(create_xrc_srq_out, out, xrc_srqn); | |
301 | ||
302 | return err; | |
303 | } | |
304 | ||
305 | int mlx5_core_destroy_xsrq(struct mlx5_core_dev *dev, u32 xsrqn) | |
306 | { | |
307 | u32 in[MLX5_ST_SZ_DW(destroy_xrc_srq_in)]; | |
308 | u32 out[MLX5_ST_SZ_DW(destroy_xrc_srq_out)]; | |
309 | ||
310 | memset(in, 0, sizeof(in)); | |
311 | memset(out, 0, sizeof(out)); | |
312 | ||
313 | MLX5_SET(destroy_xrc_srq_in, in, opcode, MLX5_CMD_OP_DESTROY_XRC_SRQ); | |
314 | MLX5_SET(destroy_xrc_srq_in, in, xrc_srqn, xsrqn); | |
315 | ||
316 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, | |
317 | sizeof(out)); | |
318 | } | |
319 | ||
320 | int mlx5_core_query_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u32 *out) | |
321 | { | |
322 | u32 in[MLX5_ST_SZ_DW(query_xrc_srq_in)]; | |
323 | void *srqc; | |
324 | void *xrc_srqc; | |
325 | int err; | |
326 | ||
327 | memset(in, 0, sizeof(in)); | |
328 | MLX5_SET(query_xrc_srq_in, in, opcode, MLX5_CMD_OP_QUERY_XRC_SRQ); | |
329 | MLX5_SET(query_xrc_srq_in, in, xrc_srqn, xsrqn); | |
330 | ||
331 | err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), | |
332 | out, | |
333 | MLX5_ST_SZ_BYTES(query_xrc_srq_out)); | |
334 | if (!err) { | |
335 | xrc_srqc = MLX5_ADDR_OF(query_xrc_srq_out, out, | |
336 | xrc_srq_context_entry); | |
337 | srqc = MLX5_ADDR_OF(query_srq_out, out, srq_context_entry); | |
338 | memcpy(srqc, xrc_srqc, MLX5_ST_SZ_BYTES(srqc)); | |
339 | } | |
340 | ||
341 | return err; | |
342 | } | |
343 | ||
344 | int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u16 lwm) | |
345 | { | |
346 | u32 in[MLX5_ST_SZ_DW(arm_xrc_srq_in)]; | |
347 | u32 out[MLX5_ST_SZ_DW(arm_xrc_srq_out)]; | |
348 | ||
349 | memset(in, 0, sizeof(in)); | |
350 | memset(out, 0, sizeof(out)); | |
351 | ||
352 | MLX5_SET(arm_xrc_srq_in, in, opcode, MLX5_CMD_OP_ARM_XRC_SRQ); | |
353 | MLX5_SET(arm_xrc_srq_in, in, xrc_srqn, xsrqn); | |
354 | MLX5_SET(arm_xrc_srq_in, in, lwm, lwm); | |
355 | MLX5_SET(arm_xrc_srq_in, in, op_mod, | |
356 | MLX5_ARM_XRC_SRQ_IN_OP_MOD_XRC_SRQ); | |
357 | ||
358 | return mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, | |
359 | sizeof(out)); | |
360 | } |