net/mlx5_en: Add missing check for memory allocation failure
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / transobj.c
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1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/mlx5/driver.h>
34#include "mlx5_core.h"
35#include "transobj.h"
36
37int mlx5_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn)
38{
39 u32 out[MLX5_ST_SZ_DW(create_rq_out)];
40 int err;
41
42 MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ);
43
44 memset(out, 0, sizeof(out));
45 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
46 if (!err)
47 *rqn = MLX5_GET(create_rq_out, out, rqn);
48
49 return err;
50}
51
52int mlx5_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in, int inlen)
53{
54 u32 out[MLX5_ST_SZ_DW(modify_rq_out)];
55
56 MLX5_SET(modify_rq_in, in, rqn, rqn);
57 MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ);
58
59 memset(out, 0, sizeof(out));
60 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
61}
62
63void mlx5_destroy_rq(struct mlx5_core_dev *dev, u32 rqn)
64{
65 u32 in[MLX5_ST_SZ_DW(destroy_rq_in)];
66 u32 out[MLX5_ST_SZ_DW(destroy_rq_out)];
67
68 memset(in, 0, sizeof(in));
69
70 MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ);
71 MLX5_SET(destroy_rq_in, in, rqn, rqn);
72
73 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
74}
75
76int mlx5_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn)
77{
78 u32 out[MLX5_ST_SZ_DW(create_sq_out)];
79 int err;
80
81 MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ);
82
83 memset(out, 0, sizeof(out));
84 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
85 if (!err)
86 *sqn = MLX5_GET(create_sq_out, out, sqn);
87
88 return err;
89}
90
91int mlx5_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in, int inlen)
92{
93 u32 out[MLX5_ST_SZ_DW(modify_sq_out)];
94
95 MLX5_SET(modify_sq_in, in, sqn, sqn);
96 MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ);
97
98 memset(out, 0, sizeof(out));
99 return mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
100}
101
102void mlx5_destroy_sq(struct mlx5_core_dev *dev, u32 sqn)
103{
104 u32 in[MLX5_ST_SZ_DW(destroy_sq_in)];
105 u32 out[MLX5_ST_SZ_DW(destroy_sq_out)];
106
107 memset(in, 0, sizeof(in));
108
109 MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ);
110 MLX5_SET(destroy_sq_in, in, sqn, sqn);
111
112 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
113}
114
115int mlx5_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *tirn)
116{
117 u32 out[MLX5_ST_SZ_DW(create_tir_out)];
118 int err;
119
120 MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
121
122 memset(out, 0, sizeof(out));
123 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
124 if (!err)
125 *tirn = MLX5_GET(create_tir_out, out, tirn);
126
127 return err;
128}
129
130void mlx5_destroy_tir(struct mlx5_core_dev *dev, u32 tirn)
131{
132 u32 in[MLX5_ST_SZ_DW(destroy_tir_out)];
133 u32 out[MLX5_ST_SZ_DW(destroy_tir_out)];
134
135 memset(in, 0, sizeof(in));
136
137 MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR);
138 MLX5_SET(destroy_tir_in, in, tirn, tirn);
139
140 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
141}
142
143int mlx5_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *tisn)
144{
145 u32 out[MLX5_ST_SZ_DW(create_tis_out)];
146 int err;
147
148 MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS);
149
150 memset(out, 0, sizeof(out));
151 err = mlx5_cmd_exec_check_status(dev, in, inlen, out, sizeof(out));
152 if (!err)
153 *tisn = MLX5_GET(create_tis_out, out, tisn);
154
155 return err;
156}
157
158void mlx5_destroy_tis(struct mlx5_core_dev *dev, u32 tisn)
159{
160 u32 in[MLX5_ST_SZ_DW(destroy_tis_out)];
161 u32 out[MLX5_ST_SZ_DW(destroy_tis_out)];
162
163 memset(in, 0, sizeof(in));
164
165 MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS);
166 MLX5_SET(destroy_tis_in, in, tisn, tisn);
167
168 mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
169}
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