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qede: add support for selftests.
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
b18e170c 27#ifdef CONFIG_QEDE_VXLAN
e712d52b 28#include <net/vxlan.h>
b18e170c 29#endif
9a109dd0
MC		 30#ifdef CONFIG_QEDE_GENEVE
31#include <net/geneve.h>
32#endif
e712d52b
YM		 33#include <linux/ip.h>
34#include <net/ipv6.h>
35#include <net/tcp.h>
36#include <linux/if_ether.h>
37#include <linux/if_vlan.h>
38#include <linux/pkt_sched.h>
39#include <linux/ethtool.h>
40#include <linux/in.h>
41#include <linux/random.h>
42#include <net/ip6_checksum.h>
43#include <linux/bitops.h>
44
45#include "qede.h"
46
5abd7e92
YM		 47static char version[] =
48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 49
5abd7e92 50MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 51MODULE_LICENSE("GPL");
52MODULE_VERSION(DRV_MODULE_VERSION);
53
54static uint debug;
55module_param(debug, uint, 0);
56MODULE_PARM_DESC(debug, " Default debug msglevel");
57
58static const struct qed_eth_ops *qed_ops;
59
60#define CHIP_NUM_57980S_40 0x1634
0e7441d7 61#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 62#define CHIP_NUM_57980S_MF 0x1636
63#define CHIP_NUM_57980S_100 0x1644
64#define CHIP_NUM_57980S_50 0x1654
65#define CHIP_NUM_57980S_25 0x1656
66
67#ifndef PCI_DEVICE_ID_NX2_57980E
68#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
69#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
70#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
71#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
72#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
73#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
74#endif
75
76static const struct pci_device_id qede_pci_tbl[] = {
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
78 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
79 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
80 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
81 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
82 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
83 { 0 }
84};
85
86MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
87
88static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
89
90#define TX_TIMEOUT (5 * HZ)
91
92static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 93static int qede_alloc_rx_buffer(struct qede_dev *edev,
94 struct qede_rx_queue *rxq);
a2ec6172 95static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 96
97static struct pci_driver qede_pci_driver = {
98 .name = "qede",
99 .id_table = qede_pci_tbl,
100 .probe = qede_probe,
101 .remove = qede_remove,
102};
103
a2ec6172
SK		 104static struct qed_eth_cb_ops qede_ll_ops = {
105 {
106 .link_update = qede_link_update,
107 },
108};
109
2950219d
YM		 110static int qede_netdev_event(struct notifier_block *this, unsigned long event,
111 void *ptr)
112{
113 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
114 struct ethtool_drvinfo drvinfo;
115 struct qede_dev *edev;
116
117 /* Currently only support name change */
118 if (event != NETDEV_CHANGENAME)
119 goto done;
120
121 /* Check whether this is a qede device */
122 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
123 goto done;
124
125 memset(&drvinfo, 0, sizeof(drvinfo));
126 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
127 if (strcmp(drvinfo.driver, "qede"))
128 goto done;
129 edev = netdev_priv(ndev);
130
131 /* Notify qed of the name change */
132 if (!edev->ops || !edev->ops->common)
133 goto done;
134 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
135 "qede");
136
137done:
138 return NOTIFY_DONE;
139}
140
141static struct notifier_block qede_netdev_notifier = {
142 .notifier_call = qede_netdev_event,
143};
144
e712d52b
YM		 145static
146int __init qede_init(void)
147{
148 int ret;
e712d52b
YM		 149
150 pr_notice("qede_init: %s\n", version);
151
95114344 152 qed_ops = qed_get_eth_ops();
e712d52b
YM		 153 if (!qed_ops) {
154 pr_notice("Failed to get qed ethtool operations\n");
155 return -EINVAL;
156 }
157
2950219d
YM		 158 /* Must register notifier before pci ops, since we might miss
159 * interface rename after pci probe and netdev registeration.
160 */
161 ret = register_netdevice_notifier(&qede_netdev_notifier);
162 if (ret) {
163 pr_notice("Failed to register netdevice_notifier\n");
164 qed_put_eth_ops();
165 return -EINVAL;
166 }
167
e712d52b
YM		 168 ret = pci_register_driver(&qede_pci_driver);
169 if (ret) {
170 pr_notice("Failed to register driver\n");
2950219d 171 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 172 qed_put_eth_ops();
173 return -EINVAL;
174 }
175
176 return 0;
177}
178
179static void __exit qede_cleanup(void)
180{
181 pr_notice("qede_cleanup called\n");
182
2950219d 183 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 184 pci_unregister_driver(&qede_pci_driver);
185 qed_put_eth_ops();
186}
187
188module_init(qede_init);
189module_exit(qede_cleanup);
190
2950219d
YM		 191/* -------------------------------------------------------------------------
192 * START OF FAST-PATH
193 * -------------------------------------------------------------------------
194 */
195
196/* Unmap the data and free skb */
197static int qede_free_tx_pkt(struct qede_dev *edev,
198 struct qede_tx_queue *txq,
199 int *len)
200{
201 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
202 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
203 struct eth_tx_1st_bd *first_bd;
204 struct eth_tx_bd *tx_data_bd;
205 int bds_consumed = 0;
206 int nbds;
207 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
208 int i, split_bd_len = 0;
209
210 if (unlikely(!skb)) {
211 DP_ERR(edev,
212 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
213 idx, txq->sw_tx_cons, txq->sw_tx_prod);
214 return -1;
215 }
216
217 *len = skb->len;
218
219 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
220
221 bds_consumed++;
222
223 nbds = first_bd->data.nbds;
224
225 if (data_split) {
226 struct eth_tx_bd *split = (struct eth_tx_bd *)
227 qed_chain_consume(&txq->tx_pbl);
228 split_bd_len = BD_UNMAP_LEN(split);
229 bds_consumed++;
230 }
231 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
232 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
233
234 /* Unmap the data of the skb frags */
235 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
236 tx_data_bd = (struct eth_tx_bd *)
237 qed_chain_consume(&txq->tx_pbl);
238 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
239 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
240 }
241
242 while (bds_consumed++ < nbds)
243 qed_chain_consume(&txq->tx_pbl);
244
245 /* Free skb */
246 dev_kfree_skb_any(skb);
247 txq->sw_tx_ring[idx].skb = NULL;
248 txq->sw_tx_ring[idx].flags = 0;
249
250 return 0;
251}
252
253/* Unmap the data and free skb when mapping failed during start_xmit */
254static void qede_free_failed_tx_pkt(struct qede_dev *edev,
255 struct qede_tx_queue *txq,
256 struct eth_tx_1st_bd *first_bd,
257 int nbd,
258 bool data_split)
259{
260 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
261 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
262 struct eth_tx_bd *tx_data_bd;
263 int i, split_bd_len = 0;
264
265 /* Return prod to its position before this skb was handled */
266 qed_chain_set_prod(&txq->tx_pbl,
267 le16_to_cpu(txq->tx_db.data.bd_prod),
268 first_bd);
269
270 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
271
272 if (data_split) {
273 struct eth_tx_bd *split = (struct eth_tx_bd *)
274 qed_chain_produce(&txq->tx_pbl);
275 split_bd_len = BD_UNMAP_LEN(split);
276 nbd--;
277 }
278
279 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
280 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
281
282 /* Unmap the data of the skb frags */
283 for (i = 0; i < nbd; i++) {
284 tx_data_bd = (struct eth_tx_bd *)
285 qed_chain_produce(&txq->tx_pbl);
286 if (tx_data_bd->nbytes)
287 dma_unmap_page(&edev->pdev->dev,
288 BD_UNMAP_ADDR(tx_data_bd),
289 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
290 }
291
292 /* Return again prod to its position before this skb was handled */
293 qed_chain_set_prod(&txq->tx_pbl,
294 le16_to_cpu(txq->tx_db.data.bd_prod),
295 first_bd);
296
297 /* Free skb */
298 dev_kfree_skb_any(skb);
299 txq->sw_tx_ring[idx].skb = NULL;
300 txq->sw_tx_ring[idx].flags = 0;
301}
302
303static u32 qede_xmit_type(struct qede_dev *edev,
304 struct sk_buff *skb,
305 int *ipv6_ext)
306{
307 u32 rc = XMIT_L4_CSUM;
308 __be16 l3_proto;
309
310 if (skb->ip_summed != CHECKSUM_PARTIAL)
311 return XMIT_PLAIN;
312
313 l3_proto = vlan_get_protocol(skb);
314 if (l3_proto == htons(ETH_P_IPV6) &&
315 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
316 *ipv6_ext = 1;
317
14db81de
MC		 318 if (skb->encapsulation)
319 rc |= XMIT_ENC;
320
2950219d
YM		 321 if (skb_is_gso(skb))
322 rc |= XMIT_LSO;
323
324 return rc;
325}
326
327static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
328 struct eth_tx_2nd_bd *second_bd,
329 struct eth_tx_3rd_bd *third_bd)
330{
331 u8 l4_proto;
fc48b7a6 332 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 333
fc48b7a6 334 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 335
fc48b7a6 336 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 337 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
338 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
339
fc48b7a6 340 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 341 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
342
343 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
344 l4_proto = ipv6_hdr(skb)->nexthdr;
345 else
346 l4_proto = ip_hdr(skb)->protocol;
347
348 if (l4_proto == IPPROTO_UDP)
fc48b7a6 349 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 350
fc48b7a6 351 if (third_bd)
2950219d 352 third_bd->data.bitfields |=
fc48b7a6
YM		 353 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
354 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 356
fc48b7a6 357 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 358 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
359}
360
361static int map_frag_to_bd(struct qede_dev *edev,
362 skb_frag_t *frag,
363 struct eth_tx_bd *bd)
364{
365 dma_addr_t mapping;
366
367 /* Map skb non-linear frag data for DMA */
368 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
369 skb_frag_size(frag),
370 DMA_TO_DEVICE);
371 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
372 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
373 return -ENOMEM;
374 }
375
376 /* Setup the data pointer of the frag data */
377 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
378
379 return 0;
380}
381
14db81de
MC		 382static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
383{
384 if (is_encap_pkt)
385 return (skb_inner_transport_header(skb) +
386 inner_tcp_hdrlen(skb) - skb->data);
387 else
388 return (skb_transport_header(skb) +
389 tcp_hdrlen(skb) - skb->data);
390}
391
b1199b10
YM		 392/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
393#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
394static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
395 u8 xmit_type)
396{
397 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
398
399 if (xmit_type & XMIT_LSO) {
400 int hlen;
401
14db81de 402 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
b1199b10
YM		 403
404 /* linear payload would require its own BD */
405 if (skb_headlen(skb) > hlen)
406 allowed_frags--;
407 }
408
409 return (skb_shinfo(skb)->nr_frags > allowed_frags);
410}
411#endif
412
2950219d
YM		 413/* Main transmit function */
414static
415netdev_tx_t qede_start_xmit(struct sk_buff *skb,
416 struct net_device *ndev)
417{
418 struct qede_dev *edev = netdev_priv(ndev);
419 struct netdev_queue *netdev_txq;
420 struct qede_tx_queue *txq;
421 struct eth_tx_1st_bd *first_bd;
422 struct eth_tx_2nd_bd *second_bd = NULL;
423 struct eth_tx_3rd_bd *third_bd = NULL;
424 struct eth_tx_bd *tx_data_bd = NULL;
425 u16 txq_index;
426 u8 nbd = 0;
427 dma_addr_t mapping;
428 int rc, frag_idx = 0, ipv6_ext = 0;
429 u8 xmit_type;
430 u16 idx;
431 u16 hlen;
432 bool data_split;
433
434 /* Get tx-queue context and netdev index */
435 txq_index = skb_get_queue_mapping(skb);
436 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
437 txq = QEDE_TX_QUEUE(edev, txq_index);
438 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
439
2950219d
YM		 440 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
441 (MAX_SKB_FRAGS + 1));
442
443 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
444
b1199b10
YM		 445#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
446 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
447 if (skb_linearize(skb)) {
448 DP_NOTICE(edev,
449 "SKB linearization failed - silently dropping this SKB\n");
450 dev_kfree_skb_any(skb);
451 return NETDEV_TX_OK;
452 }
453 }
454#endif
455
2950219d
YM		 456 /* Fill the entry in the SW ring and the BDs in the FW ring */
457 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
458 txq->sw_tx_ring[idx].skb = skb;
459 first_bd = (struct eth_tx_1st_bd *)
460 qed_chain_produce(&txq->tx_pbl);
461 memset(first_bd, 0, sizeof(*first_bd));
462 first_bd->data.bd_flags.bitfields =
463 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
464
465 /* Map skb linear data for DMA and set in the first BD */
466 mapping = dma_map_single(&edev->pdev->dev, skb->data,
467 skb_headlen(skb), DMA_TO_DEVICE);
468 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
469 DP_NOTICE(edev, "SKB mapping failed\n");
470 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
471 return NETDEV_TX_OK;
472 }
473 nbd++;
474 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
475
476 /* In case there is IPv6 with extension headers or LSO we need 2nd and
477 * 3rd BDs.
478 */
479 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
480 second_bd = (struct eth_tx_2nd_bd *)
481 qed_chain_produce(&txq->tx_pbl);
482 memset(second_bd, 0, sizeof(*second_bd));
483
484 nbd++;
485 third_bd = (struct eth_tx_3rd_bd *)
486 qed_chain_produce(&txq->tx_pbl);
487 memset(third_bd, 0, sizeof(*third_bd));
488
489 nbd++;
490 /* We need to fill in additional data in second_bd... */
491 tx_data_bd = (struct eth_tx_bd *)second_bd;
492 }
493
494 if (skb_vlan_tag_present(skb)) {
495 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
496 first_bd->data.bd_flags.bitfields |=
497 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
498 }
499
500 /* Fill the parsing flags & params according to the requested offload */
501 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 502 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
503
2950219d
YM		 504 /* We don't re-calculate IP checksum as it is already done by
505 * the upper stack
506 */
507 first_bd->data.bd_flags.bitfields |=
508 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
509
14db81de
MC		 510 if (xmit_type & XMIT_ENC) {
511 first_bd->data.bd_flags.bitfields |=
512 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
513 } else {
514 /* In cases when OS doesn't indicate for inner offloads
515 * when packet is tunnelled, we need to override the HW
516 * tunnel configuration so that packets are treated as
517 * regular non tunnelled packets and no inner offloads
518 * are done by the hardware.
519 */
520 first_bd->data.bitfields |= cpu_to_le16(temp);
521 }
fc48b7a6 522
2950219d
YM		 523 /* If the packet is IPv6 with extension header, indicate that
524 * to FW and pass few params, since the device cracker doesn't
525 * support parsing IPv6 with extension header/s.
526 */
527 if (unlikely(ipv6_ext))
528 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
529 }
530
531 if (xmit_type & XMIT_LSO) {
532 first_bd->data.bd_flags.bitfields |=
533 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
534 third_bd->data.lso_mss =
535 cpu_to_le16(skb_shinfo(skb)->gso_size);
536
14db81de
MC		 537 if (unlikely(xmit_type & XMIT_ENC)) {
538 first_bd->data.bd_flags.bitfields |=
539 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
540 hlen = qede_get_skb_hlen(skb, true);
541 } else {
542 first_bd->data.bd_flags.bitfields |=
543 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
544 hlen = qede_get_skb_hlen(skb, false);
545 }
2950219d
YM		 546
547 /* @@@TBD - if will not be removed need to check */
548 third_bd->data.bitfields |=
fc48b7a6 549 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 550
551 /* Make life easier for FW guys who can't deal with header and
552 * data on same BD. If we need to split, use the second bd...
553 */
554 if (unlikely(skb_headlen(skb) > hlen)) {
555 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
556 "TSO split header size is %d (%x:%x)\n",
557 first_bd->nbytes, first_bd->addr.hi,
558 first_bd->addr.lo);
559
560 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
561 le32_to_cpu(first_bd->addr.lo)) +
562 hlen;
563
564 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
565 le16_to_cpu(first_bd->nbytes) -
566 hlen);
567
568 /* this marks the BD as one that has no
569 * individual mapping
570 */
571 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
572
573 first_bd->nbytes = cpu_to_le16(hlen);
574
575 tx_data_bd = (struct eth_tx_bd *)third_bd;
576 data_split = true;
577 }
578 }
579
580 /* Handle fragmented skb */
581 /* special handle for frags inside 2nd and 3rd bds.. */
582 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
583 rc = map_frag_to_bd(edev,
584 &skb_shinfo(skb)->frags[frag_idx],
585 tx_data_bd);
586 if (rc) {
587 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
588 data_split);
589 return NETDEV_TX_OK;
590 }
591
592 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
593 tx_data_bd = (struct eth_tx_bd *)third_bd;
594 else
595 tx_data_bd = NULL;
596
597 frag_idx++;
598 }
599
600 /* map last frags into 4th, 5th .... */
601 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
602 tx_data_bd = (struct eth_tx_bd *)
603 qed_chain_produce(&txq->tx_pbl);
604
605 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
606
607 rc = map_frag_to_bd(edev,
608 &skb_shinfo(skb)->frags[frag_idx],
609 tx_data_bd);
610 if (rc) {
611 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
612 data_split);
613 return NETDEV_TX_OK;
614 }
615 }
616
617 /* update the first BD with the actual num BDs */
618 first_bd->data.nbds = nbd;
619
620 netdev_tx_sent_queue(netdev_txq, skb->len);
621
622 skb_tx_timestamp(skb);
623
624 /* Advance packet producer only before sending the packet since mapping
625 * of pages may fail.
626 */
627 txq->sw_tx_prod++;
628
629 /* 'next page' entries are counted in the producer value */
630 txq->tx_db.data.bd_prod =
631 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
632
633 /* wmb makes sure that the BDs data is updated before updating the
634 * producer, otherwise FW may read old data from the BDs.
635 */
636 wmb();
637 barrier();
638 writel(txq->tx_db.raw, txq->doorbell_addr);
639
640 /* mmiowb is needed to synchronize doorbell writes from more than one
641 * processor. It guarantees that the write arrives to the device before
642 * the queue lock is released and another start_xmit is called (possibly
643 * on another CPU). Without this barrier, the next doorbell can bypass
644 * this doorbell. This is applicable to IA64/Altix systems.
645 */
646 mmiowb();
647
648 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
649 < (MAX_SKB_FRAGS + 1))) {
650 netif_tx_stop_queue(netdev_txq);
651 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
652 "Stop queue was called\n");
653 /* paired memory barrier is in qede_tx_int(), we have to keep
654 * ordering of set_bit() in netif_tx_stop_queue() and read of
655 * fp->bd_tx_cons
656 */
657 smp_mb();
658
659 if (qed_chain_get_elem_left(&txq->tx_pbl)
660 >= (MAX_SKB_FRAGS + 1) &&
661 (edev->state == QEDE_STATE_OPEN)) {
662 netif_tx_wake_queue(netdev_txq);
663 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
664 "Wake queue was called\n");
665 }
666 }
667
668 return NETDEV_TX_OK;
669}
670
671static int qede_txq_has_work(struct qede_tx_queue *txq)
672{
673 u16 hw_bd_cons;
674
675 /* Tell compiler that consumer and producer can change */
676 barrier();
677 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
678 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
679 return 0;
680
681 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
682}
683
684static int qede_tx_int(struct qede_dev *edev,
685 struct qede_tx_queue *txq)
686{
687 struct netdev_queue *netdev_txq;
688 u16 hw_bd_cons;
689 unsigned int pkts_compl = 0, bytes_compl = 0;
690 int rc;
691
692 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
693
694 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
695 barrier();
696
697 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
698 int len = 0;
699
700 rc = qede_free_tx_pkt(edev, txq, &len);
701 if (rc) {
702 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
703 hw_bd_cons,
704 qed_chain_get_cons_idx(&txq->tx_pbl));
705 break;
706 }
707
708 bytes_compl += len;
709 pkts_compl++;
710 txq->sw_tx_cons++;
711 }
712
713 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
714
715 /* Need to make the tx_bd_cons update visible to start_xmit()
716 * before checking for netif_tx_queue_stopped(). Without the
717 * memory barrier, there is a small possibility that
718 * start_xmit() will miss it and cause the queue to be stopped
719 * forever.
720 * On the other hand we need an rmb() here to ensure the proper
721 * ordering of bit testing in the following
722 * netif_tx_queue_stopped(txq) call.
723 */
724 smp_mb();
725
726 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
727 /* Taking tx_lock is needed to prevent reenabling the queue
728 * while it's empty. This could have happen if rx_action() gets
729 * suspended in qede_tx_int() after the condition before
730 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
731 *
732 * stops the queue->sees fresh tx_bd_cons->releases the queue->
733 * sends some packets consuming the whole queue again->
734 * stops the queue
735 */
736
737 __netif_tx_lock(netdev_txq, smp_processor_id());
738
739 if ((netif_tx_queue_stopped(netdev_txq)) &&
740 (edev->state == QEDE_STATE_OPEN) &&
741 (qed_chain_get_elem_left(&txq->tx_pbl)
742 >= (MAX_SKB_FRAGS + 1))) {
743 netif_tx_wake_queue(netdev_txq);
744 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
745 "Wake queue was called\n");
746 }
747
748 __netif_tx_unlock(netdev_txq);
749 }
750
751 return 0;
752}
753
754static bool qede_has_rx_work(struct qede_rx_queue *rxq)
755{
756 u16 hw_comp_cons, sw_comp_cons;
757
758 /* Tell compiler that status block fields can change */
759 barrier();
760
761 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
762 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
763
764 return hw_comp_cons != sw_comp_cons;
765}
766
767static bool qede_has_tx_work(struct qede_fastpath *fp)
768{
769 u8 tc;
770
771 for (tc = 0; tc < fp->edev->num_tc; tc++)
772 if (qede_txq_has_work(&fp->txqs[tc]))
773 return true;
774 return false;
775}
776
f86af2df
MC		 777static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
778{
779 qed_chain_consume(&rxq->rx_bd_ring);
780 rxq->sw_rx_cons++;
781}
782
fc48b7a6
YM		 783/* This function reuses the buffer(from an offset) from
784 * consumer index to producer index in the bd ring
2950219d 785 */
fc48b7a6
YM		 786static inline void qede_reuse_page(struct qede_dev *edev,
787 struct qede_rx_queue *rxq,
788 struct sw_rx_data *curr_cons)
2950219d 789{
2950219d 790 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 791 struct sw_rx_data *curr_prod;
792 dma_addr_t new_mapping;
2950219d 793
fc48b7a6
YM		 794 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
795 *curr_prod = *curr_cons;
2950219d 796
fc48b7a6
YM		 797 new_mapping = curr_prod->mapping + curr_prod->page_offset;
798
799 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
800 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 801
2950219d 802 rxq->sw_rx_prod++;
fc48b7a6
YM		 803 curr_cons->data = NULL;
804}
805
f86af2df
MC		 806/* In case of allocation failures reuse buffers
807 * from consumer index to produce buffers for firmware
808 */
809static void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
810 struct qede_dev *edev, u8 count)
811{
812 struct sw_rx_data *curr_cons;
813
814 for (; count > 0; count--) {
815 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
816 qede_reuse_page(edev, rxq, curr_cons);
817 qede_rx_bd_ring_consume(rxq);
818 }
819}
820
fc48b7a6
YM		 821static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
822 struct qede_rx_queue *rxq,
823 struct sw_rx_data *curr_cons)
824{
825 /* Move to the next segment in the page */
826 curr_cons->page_offset += rxq->rx_buf_seg_size;
827
828 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 829 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
830 /* Since we failed to allocate new buffer
831 * current buffer can be used again.
832 */
833 curr_cons->page_offset -= rxq->rx_buf_seg_size;
834
fc48b7a6 835 return -ENOMEM;
f86af2df 836 }
fc48b7a6
YM		 837
838 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
839 PAGE_SIZE, DMA_FROM_DEVICE);
840 } else {
841 /* Increment refcount of the page as we don't want
842 * network stack to take the ownership of the page
843 * which can be recycled multiple times by the driver.
844 */
845 atomic_inc(&curr_cons->data->_count);
846 qede_reuse_page(edev, rxq, curr_cons);
847 }
848
849 return 0;
2950219d
YM		 850}
851
852static inline void qede_update_rx_prod(struct qede_dev *edev,
853 struct qede_rx_queue *rxq)
854{
855 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
856 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
857 struct eth_rx_prod_data rx_prods = {0};
858
859 /* Update producers */
860 rx_prods.bd_prod = cpu_to_le16(bd_prod);
861 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
862
863 /* Make sure that the BD and SGE data is updated before updating the
864 * producers since FW might read the BD/SGE right after the producer
865 * is updated.
866 */
867 wmb();
868
869 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
870 (u32 *)&rx_prods);
871
872 /* mmiowb is needed to synchronize doorbell writes from more than one
873 * processor. It guarantees that the write arrives to the device before
874 * the napi lock is released and another qede_poll is called (possibly
875 * on another CPU). Without this barrier, the next doorbell can bypass
876 * this doorbell. This is applicable to IA64/Altix systems.
877 */
878 mmiowb();
879}
880
881static u32 qede_get_rxhash(struct qede_dev *edev,
882 u8 bitfields,
883 __le32 rss_hash,
884 enum pkt_hash_types *rxhash_type)
885{
886 enum rss_hash_type htype;
887
888 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
889
890 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
891 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
892 (htype == RSS_HASH_TYPE_IPV6)) ?
893 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
894 return le32_to_cpu(rss_hash);
895 }
896 *rxhash_type = PKT_HASH_TYPE_NONE;
897 return 0;
898}
899
900static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
901{
902 skb_checksum_none_assert(skb);
903
904 if (csum_flag & QEDE_CSUM_UNNECESSARY)
905 skb->ip_summed = CHECKSUM_UNNECESSARY;
14db81de
MC		 906
907 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
908 skb->csum_level = 1;
2950219d
YM		 909}
910
911static inline void qede_skb_receive(struct qede_dev *edev,
912 struct qede_fastpath *fp,
913 struct sk_buff *skb,
914 u16 vlan_tag)
915{
916 if (vlan_tag)
917 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
918 vlan_tag);
919
920 napi_gro_receive(&fp->napi, skb);
921}
922
55482edc
MC		 923static void qede_set_gro_params(struct qede_dev *edev,
924 struct sk_buff *skb,
925 struct eth_fast_path_rx_tpa_start_cqe *cqe)
926{
927 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
928
929 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
930 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
931 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
932 else
933 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
934
935 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
936 cqe->header_len;
937}
938
939static int qede_fill_frag_skb(struct qede_dev *edev,
940 struct qede_rx_queue *rxq,
941 u8 tpa_agg_index,
942 u16 len_on_bd)
943{
944 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
945 NUM_RX_BDS_MAX];
946 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
947 struct sk_buff *skb = tpa_info->skb;
948
949 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
950 goto out;
951
952 /* Add one frag and update the appropriate fields in the skb */
953 skb_fill_page_desc(skb, tpa_info->frag_id++,
954 current_bd->data, current_bd->page_offset,
955 len_on_bd);
956
957 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 958 /* Incr page ref count to reuse on allocation failure
959 * so that it doesn't get freed while freeing SKB.
960 */
961 atomic_inc(&current_bd->data->_count);
55482edc
MC		 962 goto out;
963 }
964
965 qed_chain_consume(&rxq->rx_bd_ring);
966 rxq->sw_rx_cons++;
967
968 skb->data_len += len_on_bd;
969 skb->truesize += rxq->rx_buf_seg_size;
970 skb->len += len_on_bd;
971
972 return 0;
973
974out:
f86af2df
MC		 975 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
976 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 977 return -ENOMEM;
978}
979
980static void qede_tpa_start(struct qede_dev *edev,
981 struct qede_rx_queue *rxq,
982 struct eth_fast_path_rx_tpa_start_cqe *cqe)
983{
984 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
985 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
986 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
987 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
988 dma_addr_t mapping = tpa_info->replace_buf_mapping;
989 struct sw_rx_data *sw_rx_data_cons;
990 struct sw_rx_data *sw_rx_data_prod;
991 enum pkt_hash_types rxhash_type;
992 u32 rxhash;
993
994 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
995 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
996
997 /* Use pre-allocated replacement buffer - we can't release the agg.
998 * start until its over and we don't want to risk allocation failing
999 * here, so re-allocate when aggregation will be over.
1000 */
1001 dma_unmap_addr_set(sw_rx_data_prod, mapping,
1002 dma_unmap_addr(replace_buf, mapping));
1003
1004 sw_rx_data_prod->data = replace_buf->data;
1005 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1006 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1007 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1008
1009 rxq->sw_rx_prod++;
1010
1011 /* move partial skb from cons to pool (don't unmap yet)
1012 * save mapping, incase we drop the packet later on.
1013 */
1014 tpa_info->start_buf = *sw_rx_data_cons;
1015 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1016 le32_to_cpu(rx_bd_cons->addr.lo));
1017
1018 tpa_info->start_buf_mapping = mapping;
1019 rxq->sw_rx_cons++;
1020
1021 /* set tpa state to start only if we are able to allocate skb
1022 * for this aggregation, otherwise mark as error and aggregation will
1023 * be dropped
1024 */
1025 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1026 le16_to_cpu(cqe->len_on_first_bd));
1027 if (unlikely(!tpa_info->skb)) {
f86af2df 1028 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1029 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1030 goto cons_buf;
55482edc
MC		 1031 }
1032
1033 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1034 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1035
1036 /* Start filling in the aggregation info */
1037 tpa_info->frag_id = 0;
1038 tpa_info->agg_state = QEDE_AGG_STATE_START;
1039
1040 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1041 cqe->rss_hash, &rxhash_type);
1042 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1043 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1044 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1045 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1046 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1047 else
1048 tpa_info->vlan_tag = 0;
1049
1050 /* This is needed in order to enable forwarding support */
1051 qede_set_gro_params(edev, tpa_info->skb, cqe);
1052
f86af2df 1053cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1054 if (likely(cqe->ext_bd_len_list[0]))
1055 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1056 le16_to_cpu(cqe->ext_bd_len_list[0]));
1057
1058 if (unlikely(cqe->ext_bd_len_list[1])) {
1059 DP_ERR(edev,
1060 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1061 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1062 }
1063}
1064
88f09bd5 1065#ifdef CONFIG_INET
55482edc
MC		 1066static void qede_gro_ip_csum(struct sk_buff *skb)
1067{
1068 const struct iphdr *iph = ip_hdr(skb);
1069 struct tcphdr *th;
1070
55482edc
MC		 1071 skb_set_transport_header(skb, sizeof(struct iphdr));
1072 th = tcp_hdr(skb);
1073
1074 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1075 iph->saddr, iph->daddr, 0);
1076
1077 tcp_gro_complete(skb);
1078}
1079
1080static void qede_gro_ipv6_csum(struct sk_buff *skb)
1081{
1082 struct ipv6hdr *iph = ipv6_hdr(skb);
1083 struct tcphdr *th;
1084
55482edc
MC		 1085 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1086 th = tcp_hdr(skb);
1087
1088 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1089 &iph->saddr, &iph->daddr, 0);
1090 tcp_gro_complete(skb);
1091}
88f09bd5 1092#endif
55482edc
MC		 1093
1094static void qede_gro_receive(struct qede_dev *edev,
1095 struct qede_fastpath *fp,
1096 struct sk_buff *skb,
1097 u16 vlan_tag)
1098{
ee2fa8e6
MC		 1099 /* FW can send a single MTU sized packet from gro flow
1100 * due to aggregation timeout/last segment etc. which
1101 * is not expected to be a gro packet. If a skb has zero
1102 * frags then simply push it in the stack as non gso skb.
1103 */
1104 if (unlikely(!skb->data_len)) {
1105 skb_shinfo(skb)->gso_type = 0;
1106 skb_shinfo(skb)->gso_size = 0;
1107 goto send_skb;
1108 }
1109
88f09bd5 1110#ifdef CONFIG_INET
55482edc 1111 if (skb_shinfo(skb)->gso_size) {
aad94c04
MC		 1112 skb_set_network_header(skb, 0);
1113
55482edc
MC		 1114 switch (skb->protocol) {
1115 case htons(ETH_P_IP):
1116 qede_gro_ip_csum(skb);
1117 break;
1118 case htons(ETH_P_IPV6):
1119 qede_gro_ipv6_csum(skb);
1120 break;
1121 default:
1122 DP_ERR(edev,
1123 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1124 ntohs(skb->protocol));
1125 }
1126 }
88f09bd5 1127#endif
ee2fa8e6
MC		 1128
1129send_skb:
55482edc
MC		 1130 skb_record_rx_queue(skb, fp->rss_id);
1131 qede_skb_receive(edev, fp, skb, vlan_tag);
1132}
1133
1134static inline void qede_tpa_cont(struct qede_dev *edev,
1135 struct qede_rx_queue *rxq,
1136 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1137{
1138 int i;
1139
1140 for (i = 0; cqe->len_list[i]; i++)
1141 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1142 le16_to_cpu(cqe->len_list[i]));
1143
1144 if (unlikely(i > 1))
1145 DP_ERR(edev,
1146 "Strange - TPA cont with more than a single len_list entry\n");
1147}
1148
1149static void qede_tpa_end(struct qede_dev *edev,
1150 struct qede_fastpath *fp,
1151 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1152{
1153 struct qede_rx_queue *rxq = fp->rxq;
1154 struct qede_agg_info *tpa_info;
1155 struct sk_buff *skb;
1156 int i;
1157
1158 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1159 skb = tpa_info->skb;
1160
1161 for (i = 0; cqe->len_list[i]; i++)
1162 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1163 le16_to_cpu(cqe->len_list[i]));
1164 if (unlikely(i > 1))
1165 DP_ERR(edev,
1166 "Strange - TPA emd with more than a single len_list entry\n");
1167
1168 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1169 goto err;
1170
1171 /* Sanity */
1172 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1173 DP_ERR(edev,
1174 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1175 cqe->num_of_bds, tpa_info->frag_id);
1176 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1177 DP_ERR(edev,
1178 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1179 le16_to_cpu(cqe->total_packet_len), skb->len);
1180
1181 memcpy(skb->data,
1182 page_address(tpa_info->start_buf.data) +
1183 tpa_info->start_cqe.placement_offset +
1184 tpa_info->start_buf.page_offset,
1185 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1186
1187 /* Recycle [mapped] start buffer for the next replacement */
1188 tpa_info->replace_buf = tpa_info->start_buf;
1189 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1190
1191 /* Finalize the SKB */
1192 skb->protocol = eth_type_trans(skb, edev->ndev);
1193 skb->ip_summed = CHECKSUM_UNNECESSARY;
1194
1195 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1196 * to skb_shinfo(skb)->gso_segs
1197 */
1198 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1199
1200 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1201
1202 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1203
1204 return;
1205err:
1206 /* The BD starting the aggregation is still mapped; Re-use it for
1207 * future aggregations [as replacement buffer]
1208 */
1209 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1210 sizeof(struct sw_rx_data));
1211 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1212 tpa_info->start_buf.data = NULL;
1213 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1214 dev_kfree_skb_any(tpa_info->skb);
1215 tpa_info->skb = NULL;
1216}
1217
14db81de
MC		 1218static bool qede_tunn_exist(u16 flag)
1219{
1220 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1221 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1222}
1223
1224static u8 qede_check_tunn_csum(u16 flag)
1225{
1226 u16 csum_flag = 0;
1227 u8 tcsum = 0;
1228
1229 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1230 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1231 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1232 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1233
1234 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1235 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1236 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1237 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1238 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1239 }
1240
1241 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1242 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1243 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1244 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1245
1246 if (csum_flag & flag)
1247 return QEDE_CSUM_ERROR;
1248
1249 return QEDE_CSUM_UNNECESSARY | tcsum;
1250}
1251
1252static u8 qede_check_notunn_csum(u16 flag)
2950219d
YM		 1253{
1254 u16 csum_flag = 0;
1255 u8 csum = 0;
1256
14db81de
MC		 1257 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1258 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
2950219d
YM		 1259 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1260 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1261 csum = QEDE_CSUM_UNNECESSARY;
1262 }
1263
1264 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1265 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1266
1267 if (csum_flag & flag)
1268 return QEDE_CSUM_ERROR;
1269
1270 return csum;
1271}
1272
14db81de
MC		 1273static u8 qede_check_csum(u16 flag)
1274{
1275 if (!qede_tunn_exist(flag))
1276 return qede_check_notunn_csum(flag);
1277 else
1278 return qede_check_tunn_csum(flag);
1279}
1280
2950219d
YM		 1281static int qede_rx_int(struct qede_fastpath *fp, int budget)
1282{
1283 struct qede_dev *edev = fp->edev;
1284 struct qede_rx_queue *rxq = fp->rxq;
1285
1286 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1287 int rx_pkt = 0;
1288 u8 csum_flag;
1289
1290 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1291 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1292
1293 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1294 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1295 * read before it is written by FW, then FW writes CQE and SB, and then
1296 * the CPU reads the hw_comp_cons, it will use an old CQE.
1297 */
1298 rmb();
1299
1300 /* Loop to complete all indicated BDs */
1301 while (sw_comp_cons != hw_comp_cons) {
1302 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1303 enum pkt_hash_types rxhash_type;
1304 enum eth_rx_cqe_type cqe_type;
1305 struct sw_rx_data *sw_rx_data;
1306 union eth_rx_cqe *cqe;
1307 struct sk_buff *skb;
fc48b7a6
YM		 1308 struct page *data;
1309 __le16 flags;
2950219d
YM		 1310 u16 len, pad;
1311 u32 rx_hash;
2950219d
YM		 1312
1313 /* Get the CQE from the completion ring */
1314 cqe = (union eth_rx_cqe *)
1315 qed_chain_consume(&rxq->rx_comp_ring);
1316 cqe_type = cqe->fast_path_regular.type;
1317
1318 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1319 edev->ops->eth_cqe_completion(
1320 edev->cdev, fp->rss_id,
1321 (struct eth_slow_path_rx_cqe *)cqe);
1322 goto next_cqe;
1323 }
1324
55482edc
MC		 1325 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1326 switch (cqe_type) {
1327 case ETH_RX_CQE_TYPE_TPA_START:
1328 qede_tpa_start(edev, rxq,
1329 &cqe->fast_path_tpa_start);
1330 goto next_cqe;
1331 case ETH_RX_CQE_TYPE_TPA_CONT:
1332 qede_tpa_cont(edev, rxq,
1333 &cqe->fast_path_tpa_cont);
1334 goto next_cqe;
1335 case ETH_RX_CQE_TYPE_TPA_END:
1336 qede_tpa_end(edev, fp,
1337 &cqe->fast_path_tpa_end);
1338 goto next_rx_only;
1339 default:
1340 break;
1341 }
1342 }
1343
2950219d
YM		 1344 /* Get the data from the SW ring */
1345 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1346 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1347 data = sw_rx_data->data;
1348
1349 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1350 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1351 pad = fp_cqe->placement_offset;
fc48b7a6 1352 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1353
fc48b7a6
YM		 1354 /* If this is an error packet then drop it */
1355 parse_flag = le16_to_cpu(flags);
2950219d 1356
fc48b7a6
YM		 1357 csum_flag = qede_check_csum(parse_flag);
1358 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1359 DP_NOTICE(edev,
1360 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1361 sw_comp_cons, parse_flag);
1362 rxq->rx_hw_errors++;
f86af2df
MC		 1363 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1364 goto next_cqe;
fc48b7a6 1365 }
2950219d 1366
fc48b7a6
YM		 1367 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1368 if (unlikely(!skb)) {
2950219d 1369 DP_NOTICE(edev,
fc48b7a6 1370 "Build_skb failed, dropping incoming packet\n");
f86af2df 1371 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1372 rxq->rx_alloc_errors++;
f86af2df 1373 goto next_cqe;
fc48b7a6
YM		 1374 }
1375
1376 /* Copy data into SKB */
1377 if (len + pad <= QEDE_RX_HDR_SIZE) {
1378 memcpy(skb_put(skb, len),
1379 page_address(data) + pad +
1380 sw_rx_data->page_offset, len);
1381 qede_reuse_page(edev, rxq, sw_rx_data);
1382 } else {
1383 struct skb_frag_struct *frag;
1384 unsigned int pull_len;
1385 unsigned char *va;
1386
1387 frag = &skb_shinfo(skb)->frags[0];
1388
1389 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1390 pad + sw_rx_data->page_offset,
1391 len, rxq->rx_buf_seg_size);
1392
1393 va = skb_frag_address(frag);
1394 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1395
1396 /* Align the pull_len to optimize memcpy */
1397 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1398
1399 skb_frag_size_sub(frag, pull_len);
1400 frag->page_offset += pull_len;
1401 skb->data_len -= pull_len;
1402 skb->tail += pull_len;
1403
1404 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1405 sw_rx_data))) {
1406 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1407 /* Incr page ref count to reuse on allocation
1408 * failure so that it doesn't get freed while
1409 * freeing SKB.
1410 */
1411
1412 atomic_inc(&sw_rx_data->data->_count);
fc48b7a6 1413 rxq->rx_alloc_errors++;
f86af2df
MC		 1414 qede_recycle_rx_bd_ring(rxq, edev,
1415 fp_cqe->bd_num);
1416 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1417 goto next_cqe;
1418 }
2950219d
YM		 1419 }
1420
f86af2df
MC		 1421 qede_rx_bd_ring_consume(rxq);
1422
fc48b7a6
YM		 1423 if (fp_cqe->bd_num != 1) {
1424 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1425 u8 num_frags;
1426
1427 pkt_len -= len;
1428
1429 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1430 num_frags--) {
1431 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1432 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1433 if (unlikely(!cur_size)) {
1434 DP_ERR(edev,
1435 "Still got %d BDs for mapping jumbo, but length became 0\n",
1436 num_frags);
1437 qede_recycle_rx_bd_ring(rxq, edev,
1438 num_frags);
1439 dev_kfree_skb_any(skb);
1440 goto next_cqe;
1441 }
fc48b7a6 1442
f86af2df
MC		 1443 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1444 qede_recycle_rx_bd_ring(rxq, edev,
1445 num_frags);
1446 dev_kfree_skb_any(skb);
fc48b7a6 1447 goto next_cqe;
f86af2df 1448 }
fc48b7a6 1449
fc48b7a6
YM		 1450 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1451 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1452 qede_rx_bd_ring_consume(rxq);
1453
fc48b7a6
YM		 1454 dma_unmap_page(&edev->pdev->dev,
1455 sw_rx_data->mapping,
1456 PAGE_SIZE, DMA_FROM_DEVICE);
1457
1458 skb_fill_page_desc(skb,
1459 skb_shinfo(skb)->nr_frags++,
1460 sw_rx_data->data, 0,
1461 cur_size);
1462
1463 skb->truesize += PAGE_SIZE;
1464 skb->data_len += cur_size;
1465 skb->len += cur_size;
1466 pkt_len -= cur_size;
1467 }
2950219d 1468
f86af2df 1469 if (unlikely(pkt_len))
fc48b7a6
YM		 1470 DP_ERR(edev,
1471 "Mapped all BDs of jumbo, but still have %d bytes\n",
1472 pkt_len);
1473 }
2950219d
YM		 1474
1475 skb->protocol = eth_type_trans(skb, edev->ndev);
1476
1477 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1478 fp_cqe->rss_hash,
1479 &rxhash_type);
1480
1481 skb_set_hash(skb, rx_hash, rxhash_type);
1482
1483 qede_set_skb_csum(skb, csum_flag);
1484
1485 skb_record_rx_queue(skb, fp->rss_id);
1486
1487 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1488next_rx_only:
2950219d
YM		 1489 rx_pkt++;
1490
1491next_cqe: /* don't consume bd rx buffer */
1492 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1493 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1494 /* CR TPA - revisit how to handle budget in TPA perhaps
1495 * increase on "end"
1496 */
1497 if (rx_pkt == budget)
1498 break;
1499 } /* repeat while sw_comp_cons != hw_comp_cons... */
1500
1501 /* Update producers */
1502 qede_update_rx_prod(edev, rxq);
1503
1504 return rx_pkt;
1505}
1506
1507static int qede_poll(struct napi_struct *napi, int budget)
1508{
1509 int work_done = 0;
1510 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1511 napi);
1512 struct qede_dev *edev = fp->edev;
1513
1514 while (1) {
1515 u8 tc;
1516
1517 for (tc = 0; tc < edev->num_tc; tc++)
1518 if (qede_txq_has_work(&fp->txqs[tc]))
1519 qede_tx_int(edev, &fp->txqs[tc]);
1520
1521 if (qede_has_rx_work(fp->rxq)) {
1522 work_done += qede_rx_int(fp, budget - work_done);
1523
1524 /* must not complete if we consumed full budget */
1525 if (work_done >= budget)
1526 break;
1527 }
1528
1529 /* Fall out from the NAPI loop if needed */
1530 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1531 qed_sb_update_sb_idx(fp->sb_info);
1532 /* *_has_*_work() reads the status block,
1533 * thus we need to ensure that status block indices
1534 * have been actually read (qed_sb_update_sb_idx)
1535 * prior to this check (*_has_*_work) so that
1536 * we won't write the "newer" value of the status block
1537 * to HW (if there was a DMA right after
1538 * qede_has_rx_work and if there is no rmb, the memory
1539 * reading (qed_sb_update_sb_idx) may be postponed
1540 * to right before *_ack_sb). In this case there
1541 * will never be another interrupt until there is
1542 * another update of the status block, while there
1543 * is still unhandled work.
1544 */
1545 rmb();
1546
1547 if (!(qede_has_rx_work(fp->rxq) ||
1548 qede_has_tx_work(fp))) {
1549 napi_complete(napi);
1550 /* Update and reenable interrupts */
1551 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1552 1 /*update*/);
1553 break;
1554 }
1555 }
1556 }
1557
1558 return work_done;
1559}
1560
1561static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1562{
1563 struct qede_fastpath *fp = fp_cookie;
1564
1565 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1566
1567 napi_schedule_irqoff(&fp->napi);
1568 return IRQ_HANDLED;
1569}
1570
1571/* -------------------------------------------------------------------------
1572 * END OF FAST-PATH
1573 * -------------------------------------------------------------------------
1574 */
1575
1576static int qede_open(struct net_device *ndev);
1577static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1578static int qede_set_mac_addr(struct net_device *ndev, void *p);
1579static void qede_set_rx_mode(struct net_device *ndev);
1580static void qede_config_rx_mode(struct net_device *ndev);
1581
1582static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1583 enum qed_filter_xcast_params_type opcode,
1584 unsigned char mac[ETH_ALEN])
1585{
1586 struct qed_filter_params filter_cmd;
1587
1588 memset(&filter_cmd, 0, sizeof(filter_cmd));
1589 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1590 filter_cmd.filter.ucast.type = opcode;
1591 filter_cmd.filter.ucast.mac_valid = 1;
1592 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1593
1594 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1595}
1596
7c1bfcad
SRK		 1597static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1598 enum qed_filter_xcast_params_type opcode,
1599 u16 vid)
1600{
1601 struct qed_filter_params filter_cmd;
1602
1603 memset(&filter_cmd, 0, sizeof(filter_cmd));
1604 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1605 filter_cmd.filter.ucast.type = opcode;
1606 filter_cmd.filter.ucast.vlan_valid = 1;
1607 filter_cmd.filter.ucast.vlan = vid;
1608
1609 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1610}
1611
133fac0e
SK		 1612void qede_fill_by_demand_stats(struct qede_dev *edev)
1613{
1614 struct qed_eth_stats stats;
1615
1616 edev->ops->get_vport_stats(edev->cdev, &stats);
1617 edev->stats.no_buff_discards = stats.no_buff_discards;
1618 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1619 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1620 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1621 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1622 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1623 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1624 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1625 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1626
1627 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1628 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1629 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1630 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1631 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1632 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1633 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1634 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1635 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1636 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1637 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1638 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1639
1640 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
d4967cf3
YM		 1641 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1642 edev->stats.rx_128_to_255_byte_packets =
1643 stats.rx_128_to_255_byte_packets;
1644 edev->stats.rx_256_to_511_byte_packets =
1645 stats.rx_256_to_511_byte_packets;
1646 edev->stats.rx_512_to_1023_byte_packets =
1647 stats.rx_512_to_1023_byte_packets;
1648 edev->stats.rx_1024_to_1518_byte_packets =
1649 stats.rx_1024_to_1518_byte_packets;
1650 edev->stats.rx_1519_to_1522_byte_packets =
1651 stats.rx_1519_to_1522_byte_packets;
1652 edev->stats.rx_1519_to_2047_byte_packets =
1653 stats.rx_1519_to_2047_byte_packets;
1654 edev->stats.rx_2048_to_4095_byte_packets =
1655 stats.rx_2048_to_4095_byte_packets;
1656 edev->stats.rx_4096_to_9216_byte_packets =
1657 stats.rx_4096_to_9216_byte_packets;
1658 edev->stats.rx_9217_to_16383_byte_packets =
1659 stats.rx_9217_to_16383_byte_packets;
133fac0e
SK		 1660 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1661 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1662 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1663 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1664 edev->stats.rx_align_errors = stats.rx_align_errors;
1665 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1666 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1667 edev->stats.rx_jabbers = stats.rx_jabbers;
1668 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1669 edev->stats.rx_fragments = stats.rx_fragments;
1670 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1671 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1672 edev->stats.tx_128_to_255_byte_packets =
1673 stats.tx_128_to_255_byte_packets;
1674 edev->stats.tx_256_to_511_byte_packets =
1675 stats.tx_256_to_511_byte_packets;
1676 edev->stats.tx_512_to_1023_byte_packets =
1677 stats.tx_512_to_1023_byte_packets;
1678 edev->stats.tx_1024_to_1518_byte_packets =
1679 stats.tx_1024_to_1518_byte_packets;
1680 edev->stats.tx_1519_to_2047_byte_packets =
1681 stats.tx_1519_to_2047_byte_packets;
1682 edev->stats.tx_2048_to_4095_byte_packets =
1683 stats.tx_2048_to_4095_byte_packets;
1684 edev->stats.tx_4096_to_9216_byte_packets =
1685 stats.tx_4096_to_9216_byte_packets;
1686 edev->stats.tx_9217_to_16383_byte_packets =
1687 stats.tx_9217_to_16383_byte_packets;
1688 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1689 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1690 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1691 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1692 edev->stats.brb_truncates = stats.brb_truncates;
1693 edev->stats.brb_discards = stats.brb_discards;
1694 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1695}
1696
1697static struct rtnl_link_stats64 *qede_get_stats64(
1698 struct net_device *dev,
1699 struct rtnl_link_stats64 *stats)
1700{
1701 struct qede_dev *edev = netdev_priv(dev);
1702
1703 qede_fill_by_demand_stats(edev);
1704
1705 stats->rx_packets = edev->stats.rx_ucast_pkts +
1706 edev->stats.rx_mcast_pkts +
1707 edev->stats.rx_bcast_pkts;
1708 stats->tx_packets = edev->stats.tx_ucast_pkts +
1709 edev->stats.tx_mcast_pkts +
1710 edev->stats.tx_bcast_pkts;
1711
1712 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1713 edev->stats.rx_mcast_bytes +
1714 edev->stats.rx_bcast_bytes;
1715
1716 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1717 edev->stats.tx_mcast_bytes +
1718 edev->stats.tx_bcast_bytes;
1719
1720 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1721 stats->multicast = edev->stats.rx_mcast_pkts +
1722 edev->stats.rx_bcast_pkts;
1723
1724 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1725
1726 stats->collisions = edev->stats.tx_total_collisions;
1727 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1728 stats->rx_frame_errors = edev->stats.rx_align_errors;
1729
1730 return stats;
1731}
1732
7c1bfcad
SRK		 1733static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1734{
1735 struct qed_update_vport_params params;
1736 int rc;
1737
1738 /* Proceed only if action actually needs to be performed */
1739 if (edev->accept_any_vlan == action)
1740 return;
1741
1742 memset(&params, 0, sizeof(params));
1743
1744 params.vport_id = 0;
1745 params.accept_any_vlan = action;
1746 params.update_accept_any_vlan_flg = 1;
1747
1748 rc = edev->ops->vport_update(edev->cdev, &params);
1749 if (rc) {
1750 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1751 action ? "enable" : "disable");
1752 } else {
1753 DP_INFO(edev, "%s accept-any-vlan\n",
1754 action ? "enabled" : "disabled");
1755 edev->accept_any_vlan = action;
1756 }
1757}
1758
1759static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1760{
1761 struct qede_dev *edev = netdev_priv(dev);
1762 struct qede_vlan *vlan, *tmp;
1763 int rc;
1764
1765 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1766
1767 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1768 if (!vlan) {
1769 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1770 return -ENOMEM;
1771 }
1772 INIT_LIST_HEAD(&vlan->list);
1773 vlan->vid = vid;
1774 vlan->configured = false;
1775
1776 /* Verify vlan isn't already configured */
1777 list_for_each_entry(tmp, &edev->vlan_list, list) {
1778 if (tmp->vid == vlan->vid) {
1779 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1780 "vlan already configured\n");
1781 kfree(vlan);
1782 return -EEXIST;
1783 }
1784 }
1785
1786 /* If interface is down, cache this VLAN ID and return */
1787 if (edev->state != QEDE_STATE_OPEN) {
1788 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1789 "Interface is down, VLAN %d will be configured when interface is up\n",
1790 vid);
1791 if (vid != 0)
1792 edev->non_configured_vlans++;
1793 list_add(&vlan->list, &edev->vlan_list);
1794
1795 return 0;
1796 }
1797
1798 /* Check for the filter limit.
1799 * Note - vlan0 has a reserved filter and can be added without
1800 * worrying about quota
1801 */
1802 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1803 (vlan->vid == 0)) {
1804 rc = qede_set_ucast_rx_vlan(edev,
1805 QED_FILTER_XCAST_TYPE_ADD,
1806 vlan->vid);
1807 if (rc) {
1808 DP_ERR(edev, "Failed to configure VLAN %d\n",
1809 vlan->vid);
1810 kfree(vlan);
1811 return -EINVAL;
1812 }
1813 vlan->configured = true;
1814
1815 /* vlan0 filter isn't consuming out of our quota */
1816 if (vlan->vid != 0)
1817 edev->configured_vlans++;
1818 } else {
1819 /* Out of quota; Activate accept-any-VLAN mode */
1820 if (!edev->non_configured_vlans)
1821 qede_config_accept_any_vlan(edev, true);
1822
1823 edev->non_configured_vlans++;
1824 }
1825
1826 list_add(&vlan->list, &edev->vlan_list);
1827
1828 return 0;
1829}
1830
1831static void qede_del_vlan_from_list(struct qede_dev *edev,
1832 struct qede_vlan *vlan)
1833{
1834 /* vlan0 filter isn't consuming out of our quota */
1835 if (vlan->vid != 0) {
1836 if (vlan->configured)
1837 edev->configured_vlans--;
1838 else
1839 edev->non_configured_vlans--;
1840 }
1841
1842 list_del(&vlan->list);
1843 kfree(vlan);
1844}
1845
1846static int qede_configure_vlan_filters(struct qede_dev *edev)
1847{
1848 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1849 struct qed_dev_eth_info *dev_info;
1850 struct qede_vlan *vlan = NULL;
1851
1852 if (list_empty(&edev->vlan_list))
1853 return 0;
1854
1855 dev_info = &edev->dev_info;
1856
1857 /* Configure non-configured vlans */
1858 list_for_each_entry(vlan, &edev->vlan_list, list) {
1859 if (vlan->configured)
1860 continue;
1861
1862 /* We have used all our credits, now enable accept_any_vlan */
1863 if ((vlan->vid != 0) &&
1864 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1865 accept_any_vlan = 1;
1866 continue;
1867 }
1868
1869 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1870
1871 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1872 vlan->vid);
1873 if (rc) {
1874 DP_ERR(edev, "Failed to configure VLAN %u\n",
1875 vlan->vid);
1876 real_rc = rc;
1877 continue;
1878 }
1879
1880 vlan->configured = true;
1881 /* vlan0 filter doesn't consume our VLAN filter's quota */
1882 if (vlan->vid != 0) {
1883 edev->non_configured_vlans--;
1884 edev->configured_vlans++;
1885 }
1886 }
1887
1888 /* enable accept_any_vlan mode if we have more VLANs than credits,
1889 * or remove accept_any_vlan mode if we've actually removed
1890 * a non-configured vlan, and all remaining vlans are truly configured.
1891 */
1892
1893 if (accept_any_vlan)
1894 qede_config_accept_any_vlan(edev, true);
1895 else if (!edev->non_configured_vlans)
1896 qede_config_accept_any_vlan(edev, false);
1897
1898 return real_rc;
1899}
1900
1901static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1902{
1903 struct qede_dev *edev = netdev_priv(dev);
1904 struct qede_vlan *vlan = NULL;
1905 int rc;
1906
1907 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1908
1909 /* Find whether entry exists */
1910 list_for_each_entry(vlan, &edev->vlan_list, list)
1911 if (vlan->vid == vid)
1912 break;
1913
1914 if (!vlan || (vlan->vid != vid)) {
1915 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1916 "Vlan isn't configured\n");
1917 return 0;
1918 }
1919
1920 if (edev->state != QEDE_STATE_OPEN) {
1921 /* As interface is already down, we don't have a VPORT
1922 * instance to remove vlan filter. So just update vlan list
1923 */
1924 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1925 "Interface is down, removing VLAN from list only\n");
1926 qede_del_vlan_from_list(edev, vlan);
1927 return 0;
1928 }
1929
1930 /* Remove vlan */
1931 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1932 if (rc) {
1933 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1934 return -EINVAL;
1935 }
1936
1937 qede_del_vlan_from_list(edev, vlan);
1938
1939 /* We have removed a VLAN - try to see if we can
1940 * configure non-configured VLAN from the list.
1941 */
1942 rc = qede_configure_vlan_filters(edev);
1943
1944 return rc;
1945}
1946
1947static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1948{
1949 struct qede_vlan *vlan = NULL;
1950
1951 if (list_empty(&edev->vlan_list))
1952 return;
1953
1954 list_for_each_entry(vlan, &edev->vlan_list, list) {
1955 if (!vlan->configured)
1956 continue;
1957
1958 vlan->configured = false;
1959
1960 /* vlan0 filter isn't consuming out of our quota */
1961 if (vlan->vid != 0) {
1962 edev->non_configured_vlans++;
1963 edev->configured_vlans--;
1964 }
1965
1966 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1967 "marked vlan %d as non-configured\n",
1968 vlan->vid);
1969 }
1970
1971 edev->accept_any_vlan = false;
1972}
1973
b18e170c
MC		 1974#ifdef CONFIG_QEDE_VXLAN
1975static void qede_add_vxlan_port(struct net_device *dev,
1976 sa_family_t sa_family, __be16 port)
1977{
1978 struct qede_dev *edev = netdev_priv(dev);
1979 u16 t_port = ntohs(port);
1980
1981 if (edev->vxlan_dst_port)
1982 return;
1983
1984 edev->vxlan_dst_port = t_port;
1985
1986 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
1987
1988 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
1989 schedule_delayed_work(&edev->sp_task, 0);
1990}
1991
1992static void qede_del_vxlan_port(struct net_device *dev,
1993 sa_family_t sa_family, __be16 port)
1994{
1995 struct qede_dev *edev = netdev_priv(dev);
1996 u16 t_port = ntohs(port);
1997
1998 if (t_port != edev->vxlan_dst_port)
1999 return;
2000
2001 edev->vxlan_dst_port = 0;
2002
2003 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
2004
2005 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2006 schedule_delayed_work(&edev->sp_task, 0);
2007}
2008#endif
2009
9a109dd0
MC		 2010#ifdef CONFIG_QEDE_GENEVE
2011static void qede_add_geneve_port(struct net_device *dev,
2012 sa_family_t sa_family, __be16 port)
2013{
2014 struct qede_dev *edev = netdev_priv(dev);
2015 u16 t_port = ntohs(port);
2016
2017 if (edev->geneve_dst_port)
2018 return;
2019
2020 edev->geneve_dst_port = t_port;
2021
2022 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
2023 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2024 schedule_delayed_work(&edev->sp_task, 0);
2025}
2026
2027static void qede_del_geneve_port(struct net_device *dev,
2028 sa_family_t sa_family, __be16 port)
2029{
2030 struct qede_dev *edev = netdev_priv(dev);
2031 u16 t_port = ntohs(port);
2032
2033 if (t_port != edev->geneve_dst_port)
2034 return;
2035
2036 edev->geneve_dst_port = 0;
2037
2038 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
2039 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2040 schedule_delayed_work(&edev->sp_task, 0);
2041}
2042#endif
2043
2950219d
YM		 2044static const struct net_device_ops qede_netdev_ops = {
2045 .ndo_open = qede_open,
2046 .ndo_stop = qede_close,
2047 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 2048 .ndo_set_rx_mode = qede_set_rx_mode,
2049 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 2050 .ndo_validate_addr = eth_validate_addr,
133fac0e 2051 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 2052 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2053 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 2054 .ndo_get_stats64 = qede_get_stats64,
b18e170c
MC		 2055#ifdef CONFIG_QEDE_VXLAN
2056 .ndo_add_vxlan_port = qede_add_vxlan_port,
2057 .ndo_del_vxlan_port = qede_del_vxlan_port,
2058#endif
9a109dd0
MC		 2059#ifdef CONFIG_QEDE_GENEVE
2060 .ndo_add_geneve_port = qede_add_geneve_port,
2061 .ndo_del_geneve_port = qede_del_geneve_port,
2062#endif
2950219d
YM		 2063};
2064
e712d52b
YM		 2065/* -------------------------------------------------------------------------
2066 * START OF PROBE / REMOVE
2067 * -------------------------------------------------------------------------
2068 */
2069
2070static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2071 struct pci_dev *pdev,
2072 struct qed_dev_eth_info *info,
2073 u32 dp_module,
2074 u8 dp_level)
2075{
2076 struct net_device *ndev;
2077 struct qede_dev *edev;
2078
2079 ndev = alloc_etherdev_mqs(sizeof(*edev),
2080 info->num_queues,
2081 info->num_queues);
2082 if (!ndev) {
2083 pr_err("etherdev allocation failed\n");
2084 return NULL;
2085 }
2086
2087 edev = netdev_priv(ndev);
2088 edev->ndev = ndev;
2089 edev->cdev = cdev;
2090 edev->pdev = pdev;
2091 edev->dp_module = dp_module;
2092 edev->dp_level = dp_level;
2093 edev->ops = qed_ops;
2950219d
YM		 2094 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2095 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 2096
2097 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
2098
2099 SET_NETDEV_DEV(ndev, &pdev->dev);
2100
133fac0e 2101 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 2102 memcpy(&edev->dev_info, info, sizeof(*info));
2103
2104 edev->num_tc = edev->dev_info.num_tc;
2105
7c1bfcad
SRK		 2106 INIT_LIST_HEAD(&edev->vlan_list);
2107
e712d52b
YM		 2108 return edev;
2109}
2110
2111static void qede_init_ndev(struct qede_dev *edev)
2112{
2113 struct net_device *ndev = edev->ndev;
2114 struct pci_dev *pdev = edev->pdev;
2115 u32 hw_features;
2116
2117 pci_set_drvdata(pdev, ndev);
2118
2119 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2120 ndev->base_addr = ndev->mem_start;
2121 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2122 ndev->irq = edev->dev_info.common.pci_irq;
2123
2124 ndev->watchdog_timeo = TX_TIMEOUT;
2125
2950219d
YM		 2126 ndev->netdev_ops = &qede_netdev_ops;
2127
133fac0e
SK		 2128 qede_set_ethtool_ops(ndev);
2129
e712d52b
YM		 2130 /* user-changeble features */
2131 hw_features = NETIF_F_GRO | NETIF_F_SG |
2132 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2133 NETIF_F_TSO | NETIF_F_TSO6;
2134
14db81de
MC		 2135 /* Encap features*/
2136 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2137 NETIF_F_TSO_ECN;
2138 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2139 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2140 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2141 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2142
e712d52b
YM		 2143 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2144 NETIF_F_HIGHDMA;
2145 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2146 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 2147 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 2148
2149 ndev->hw_features = hw_features;
2150
2151 /* Set network device HW mac */
2152 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2153}
2154
2155/* This function converts from 32b param to two params of level and module
2156 * Input 32b decoding:
2157 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2158 * 'happy' flow, e.g. memory allocation failed.
2159 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2160 * and provide important parameters.
2161 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2162 * module. VERBOSE prints are for tracking the specific flow in low level.
2163 *
2164 * Notice that the level should be that of the lowest required logs.
2165 */
133fac0e 2166void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2167{
2168 *p_dp_level = QED_LEVEL_NOTICE;
2169 *p_dp_module = 0;
2170
2171 if (debug & QED_LOG_VERBOSE_MASK) {
2172 *p_dp_level = QED_LEVEL_VERBOSE;
2173 *p_dp_module = (debug & 0x3FFFFFFF);
2174 } else if (debug & QED_LOG_INFO_MASK) {
2175 *p_dp_level = QED_LEVEL_INFO;
2176 } else if (debug & QED_LOG_NOTICE_MASK) {
2177 *p_dp_level = QED_LEVEL_NOTICE;
2178 }
2179}
2180
2950219d
YM		 2181static void qede_free_fp_array(struct qede_dev *edev)
2182{
2183 if (edev->fp_array) {
2184 struct qede_fastpath *fp;
2185 int i;
2186
2187 for_each_rss(i) {
2188 fp = &edev->fp_array[i];
2189
2190 kfree(fp->sb_info);
2191 kfree(fp->rxq);
2192 kfree(fp->txqs);
2193 }
2194 kfree(edev->fp_array);
2195 }
2196 edev->num_rss = 0;
2197}
2198
2199static int qede_alloc_fp_array(struct qede_dev *edev)
2200{
2201 struct qede_fastpath *fp;
2202 int i;
2203
2204 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2205 sizeof(*edev->fp_array), GFP_KERNEL);
2206 if (!edev->fp_array) {
2207 DP_NOTICE(edev, "fp array allocation failed\n");
2208 goto err;
2209 }
2210
2211 for_each_rss(i) {
2212 fp = &edev->fp_array[i];
2213
2214 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2215 if (!fp->sb_info) {
2216 DP_NOTICE(edev, "sb info struct allocation failed\n");
2217 goto err;
2218 }
2219
2220 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2221 if (!fp->rxq) {
2222 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2223 goto err;
2224 }
2225
2226 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2227 if (!fp->txqs) {
2228 DP_NOTICE(edev, "TXQ array allocation failed\n");
2229 goto err;
2230 }
2231 }
2232
2233 return 0;
2234err:
2235 qede_free_fp_array(edev);
2236 return -ENOMEM;
2237}
2238
0d8e0aa0
SK		 2239static void qede_sp_task(struct work_struct *work)
2240{
2241 struct qede_dev *edev = container_of(work, struct qede_dev,
2242 sp_task.work);
b18e170c
MC		 2243 struct qed_dev *cdev = edev->cdev;
2244
0d8e0aa0
SK		 2245 mutex_lock(&edev->qede_lock);
2246
2247 if (edev->state == QEDE_STATE_OPEN) {
2248 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2249 qede_config_rx_mode(edev->ndev);
2250 }
2251
b18e170c
MC		 2252 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2253 struct qed_tunn_params tunn_params;
2254
2255 memset(&tunn_params, 0, sizeof(tunn_params));
2256 tunn_params.update_vxlan_port = 1;
2257 tunn_params.vxlan_port = edev->vxlan_dst_port;
2258 qed_ops->tunn_config(cdev, &tunn_params);
2259 }
2260
9a109dd0
MC		 2261 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2262 struct qed_tunn_params tunn_params;
2263
2264 memset(&tunn_params, 0, sizeof(tunn_params));
2265 tunn_params.update_geneve_port = 1;
2266 tunn_params.geneve_port = edev->geneve_dst_port;
2267 qed_ops->tunn_config(cdev, &tunn_params);
2268 }
2269
0d8e0aa0
SK		 2270 mutex_unlock(&edev->qede_lock);
2271}
2272
e712d52b
YM		 2273static void qede_update_pf_params(struct qed_dev *cdev)
2274{
2275 struct qed_pf_params pf_params;
2276
2277 /* 16 rx + 16 tx */
2278 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2279 pf_params.eth_pf_params.num_cons = 32;
2280 qed_ops->common->update_pf_params(cdev, &pf_params);
2281}
2282
2283enum qede_probe_mode {
2284 QEDE_PROBE_NORMAL,
2285};
2286
2287static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2288 enum qede_probe_mode mode)
2289{
2290 struct qed_slowpath_params params;
2291 struct qed_dev_eth_info dev_info;
2292 struct qede_dev *edev;
2293 struct qed_dev *cdev;
2294 int rc;
2295
2296 if (unlikely(dp_level & QED_LEVEL_INFO))
2297 pr_notice("Starting qede probe\n");
2298
2299 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2300 dp_module, dp_level);
2301 if (!cdev) {
2302 rc = -ENODEV;
2303 goto err0;
2304 }
2305
2306 qede_update_pf_params(cdev);
2307
2308 /* Start the Slowpath-process */
2309 memset(&params, 0, sizeof(struct qed_slowpath_params));
2310 params.int_mode = QED_INT_MODE_MSIX;
2311 params.drv_major = QEDE_MAJOR_VERSION;
2312 params.drv_minor = QEDE_MINOR_VERSION;
2313 params.drv_rev = QEDE_REVISION_VERSION;
2314 params.drv_eng = QEDE_ENGINEERING_VERSION;
2315 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2316 rc = qed_ops->common->slowpath_start(cdev, &params);
2317 if (rc) {
2318 pr_notice("Cannot start slowpath\n");
2319 goto err1;
2320 }
2321
2322 /* Learn information crucial for qede to progress */
2323 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2324 if (rc)
2325 goto err2;
2326
2327 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2328 dp_level);
2329 if (!edev) {
2330 rc = -ENOMEM;
2331 goto err2;
2332 }
2333
2334 qede_init_ndev(edev);
2335
2950219d
YM		 2336 rc = register_netdev(edev->ndev);
2337 if (rc) {
2338 DP_NOTICE(edev, "Cannot register net-device\n");
2339 goto err3;
2340 }
2341
e712d52b
YM		 2342 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2343
a2ec6172
SK		 2344 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2345
0d8e0aa0
SK		 2346 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2347 mutex_init(&edev->qede_lock);
2348
e712d52b
YM		 2349 DP_INFO(edev, "Ending successfully qede probe\n");
2350
2351 return 0;
2352
2950219d
YM		 2353err3:
2354 free_netdev(edev->ndev);
e712d52b
YM		 2355err2:
2356 qed_ops->common->slowpath_stop(cdev);
2357err1:
2358 qed_ops->common->remove(cdev);
2359err0:
2360 return rc;
2361}
2362
2363static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2364{
2365 u32 dp_module = 0;
2366 u8 dp_level = 0;
2367
2368 qede_config_debug(debug, &dp_module, &dp_level);
2369
2370 return __qede_probe(pdev, dp_module, dp_level,
2371 QEDE_PROBE_NORMAL);
2372}
2373
2374enum qede_remove_mode {
2375 QEDE_REMOVE_NORMAL,
2376};
2377
2378static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2379{
2380 struct net_device *ndev = pci_get_drvdata(pdev);
2381 struct qede_dev *edev = netdev_priv(ndev);
2382 struct qed_dev *cdev = edev->cdev;
2383
2384 DP_INFO(edev, "Starting qede_remove\n");
2385
0d8e0aa0 2386 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2387 unregister_netdev(ndev);
2388
e712d52b
YM		 2389 edev->ops->common->set_power_state(cdev, PCI_D0);
2390
2391 pci_set_drvdata(pdev, NULL);
2392
2393 free_netdev(ndev);
2394
2395 /* Use global ops since we've freed edev */
2396 qed_ops->common->slowpath_stop(cdev);
2397 qed_ops->common->remove(cdev);
2398
2399 pr_notice("Ending successfully qede_remove\n");
2400}
2401
2402static void qede_remove(struct pci_dev *pdev)
2403{
2404 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2405}
2950219d
YM		 2406
2407/* -------------------------------------------------------------------------
2408 * START OF LOAD / UNLOAD
2409 * -------------------------------------------------------------------------
2410 */
2411
2412static int qede_set_num_queues(struct qede_dev *edev)
2413{
2414 int rc;
2415 u16 rss_num;
2416
2417 /* Setup queues according to possible resources*/
8edf049d
SK		 2418 if (edev->req_rss)
2419 rss_num = edev->req_rss;
2420 else
2421 rss_num = netif_get_num_default_rss_queues() *
2422 edev->dev_info.common.num_hwfns;
2950219d
YM		 2423
2424 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2425
2426 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2427 if (rc > 0) {
2428 /* Managed to request interrupts for our queues */
2429 edev->num_rss = rc;
2430 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2431 QEDE_RSS_CNT(edev), rss_num);
2432 rc = 0;
2433 }
2434 return rc;
2435}
2436
2437static void qede_free_mem_sb(struct qede_dev *edev,
2438 struct qed_sb_info *sb_info)
2439{
2440 if (sb_info->sb_virt)
2441 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2442 (void *)sb_info->sb_virt, sb_info->sb_phys);
2443}
2444
2445/* This function allocates fast-path status block memory */
2446static int qede_alloc_mem_sb(struct qede_dev *edev,
2447 struct qed_sb_info *sb_info,
2448 u16 sb_id)
2449{
2450 struct status_block *sb_virt;
2451 dma_addr_t sb_phys;
2452 int rc;
2453
2454 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2455 sizeof(*sb_virt),
2456 &sb_phys, GFP_KERNEL);
2457 if (!sb_virt) {
2458 DP_ERR(edev, "Status block allocation failed\n");
2459 return -ENOMEM;
2460 }
2461
2462 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2463 sb_virt, sb_phys, sb_id,
2464 QED_SB_TYPE_L2_QUEUE);
2465 if (rc) {
2466 DP_ERR(edev, "Status block initialization failed\n");
2467 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2468 sb_virt, sb_phys);
2469 return rc;
2470 }
2471
2472 return 0;
2473}
2474
2475static void qede_free_rx_buffers(struct qede_dev *edev,
2476 struct qede_rx_queue *rxq)
2477{
2478 u16 i;
2479
2480 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2481 struct sw_rx_data *rx_buf;
fc48b7a6 2482 struct page *data;
2950219d
YM		 2483
2484 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2485 data = rx_buf->data;
2486
fc48b7a6
YM		 2487 dma_unmap_page(&edev->pdev->dev,
2488 rx_buf->mapping,
2489 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2490
2491 rx_buf->data = NULL;
fc48b7a6 2492 __free_page(data);
2950219d
YM		 2493 }
2494}
2495
55482edc
MC		 2496static void qede_free_sge_mem(struct qede_dev *edev,
2497 struct qede_rx_queue *rxq) {
2498 int i;
2499
2500 if (edev->gro_disable)
2501 return;
2502
2503 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2504 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2505 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2506
f86af2df 2507 if (replace_buf->data) {
55482edc
MC		 2508 dma_unmap_page(&edev->pdev->dev,
2509 dma_unmap_addr(replace_buf, mapping),
2510 PAGE_SIZE, DMA_FROM_DEVICE);
2511 __free_page(replace_buf->data);
2512 }
2513 }
2514}
2515
2950219d
YM		 2516static void qede_free_mem_rxq(struct qede_dev *edev,
2517 struct qede_rx_queue *rxq)
2518{
55482edc
MC		 2519 qede_free_sge_mem(edev, rxq);
2520
2950219d
YM		 2521 /* Free rx buffers */
2522 qede_free_rx_buffers(edev, rxq);
2523
2524 /* Free the parallel SW ring */
2525 kfree(rxq->sw_rx_ring);
2526
2527 /* Free the real RQ ring used by FW */
2528 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2529 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2530}
2531
2532static int qede_alloc_rx_buffer(struct qede_dev *edev,
2533 struct qede_rx_queue *rxq)
2534{
2535 struct sw_rx_data *sw_rx_data;
2536 struct eth_rx_bd *rx_bd;
2537 dma_addr_t mapping;
fc48b7a6 2538 struct page *data;
2950219d 2539 u16 rx_buf_size;
2950219d
YM		 2540
2541 rx_buf_size = rxq->rx_buf_size;
2542
fc48b7a6 2543 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2544 if (unlikely(!data)) {
fc48b7a6 2545 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2546 return -ENOMEM;
2547 }
2548
fc48b7a6
YM		 2549 /* Map the entire page as it would be used
2550 * for multiple RX buffer segment size mapping.
2551 */
2552 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2553 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2554 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2555 __free_page(data);
2950219d
YM		 2556 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2557 return -ENOMEM;
2558 }
2559
2560 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2561 sw_rx_data->page_offset = 0;
2950219d 2562 sw_rx_data->data = data;
fc48b7a6 2563 sw_rx_data->mapping = mapping;
2950219d
YM		 2564
2565 /* Advance PROD and get BD pointer */
2566 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2567 WARN_ON(!rx_bd);
2568 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2569 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2570
2571 rxq->sw_rx_prod++;
2572
2573 return 0;
2574}
2575
55482edc
MC		 2576static int qede_alloc_sge_mem(struct qede_dev *edev,
2577 struct qede_rx_queue *rxq)
2578{
2579 dma_addr_t mapping;
2580 int i;
2581
2582 if (edev->gro_disable)
2583 return 0;
2584
2585 if (edev->ndev->mtu > PAGE_SIZE) {
2586 edev->gro_disable = 1;
2587 return 0;
2588 }
2589
2590 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2591 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2592 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2593
2594 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2595 if (unlikely(!replace_buf->data)) {
2596 DP_NOTICE(edev,
2597 "Failed to allocate TPA skb pool [replacement buffer]\n");
2598 goto err;
2599 }
2600
2601 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2602 rxq->rx_buf_size, DMA_FROM_DEVICE);
2603 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2604 DP_NOTICE(edev,
2605 "Failed to map TPA replacement buffer\n");
2606 goto err;
2607 }
2608
2609 dma_unmap_addr_set(replace_buf, mapping, mapping);
2610 tpa_info->replace_buf.page_offset = 0;
2611
2612 tpa_info->replace_buf_mapping = mapping;
2613 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2614 }
2615
2616 return 0;
2617err:
2618 qede_free_sge_mem(edev, rxq);
2619 edev->gro_disable = 1;
2620 return -ENOMEM;
2621}
2622
2950219d
YM		 2623/* This function allocates all memory needed per Rx queue */
2624static int qede_alloc_mem_rxq(struct qede_dev *edev,
2625 struct qede_rx_queue *rxq)
2626{
f86af2df 2627 int i, rc, size;
2950219d
YM		 2628
2629 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2630
fc48b7a6
YM		 2631 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2632 edev->ndev->mtu;
2633 if (rxq->rx_buf_size > PAGE_SIZE)
2634 rxq->rx_buf_size = PAGE_SIZE;
2635
2636 /* Segment size to spilt a page in multiple equal parts */
2637 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2638
2639 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2640 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2641 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2642 if (!rxq->sw_rx_ring) {
2643 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2644 rc = -ENOMEM;
2950219d
YM		 2645 goto err;
2646 }
2647
2648 /* Allocate FW Rx ring */
2649 rc = edev->ops->common->chain_alloc(edev->cdev,
2650 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2651 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2652 RX_RING_SIZE,
2950219d
YM		 2653 sizeof(struct eth_rx_bd),
2654 &rxq->rx_bd_ring);
2655
2656 if (rc)
2657 goto err;
2658
2659 /* Allocate FW completion ring */
2660 rc = edev->ops->common->chain_alloc(edev->cdev,
2661 QED_CHAIN_USE_TO_CONSUME,
2662 QED_CHAIN_MODE_PBL,
fc48b7a6 2663 RX_RING_SIZE,
2950219d
YM		 2664 sizeof(union eth_rx_cqe),
2665 &rxq->rx_comp_ring);
2666 if (rc)
2667 goto err;
2668
2669 /* Allocate buffers for the Rx ring */
2670 for (i = 0; i < rxq->num_rx_buffers; i++) {
2671 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2672 if (rc) {
2673 DP_ERR(edev,
2674 "Rx buffers allocation failed at index %d\n", i);
2675 goto err;
2676 }
2950219d
YM		 2677 }
2678
f86af2df 2679 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2680err:
f86af2df 2681 return rc;
2950219d
YM		 2682}
2683
2684static void qede_free_mem_txq(struct qede_dev *edev,
2685 struct qede_tx_queue *txq)
2686{
2687 /* Free the parallel SW ring */
2688 kfree(txq->sw_tx_ring);
2689
2690 /* Free the real RQ ring used by FW */
2691 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2692}
2693
2694/* This function allocates all memory needed per Tx queue */
2695static int qede_alloc_mem_txq(struct qede_dev *edev,
2696 struct qede_tx_queue *txq)
2697{
2698 int size, rc;
2699 union eth_tx_bd_types *p_virt;
2700
2701 txq->num_tx_buffers = edev->q_num_tx_buffers;
2702
2703 /* Allocate the parallel driver ring for Tx buffers */
2704 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2705 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2706 if (!txq->sw_tx_ring) {
2707 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2708 goto err;
2709 }
2710
2711 rc = edev->ops->common->chain_alloc(edev->cdev,
2712 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2713 QED_CHAIN_MODE_PBL,
2714 NUM_TX_BDS_MAX,
2715 sizeof(*p_virt),
2716 &txq->tx_pbl);
2717 if (rc)
2718 goto err;
2719
2720 return 0;
2721
2722err:
2723 qede_free_mem_txq(edev, txq);
2724 return -ENOMEM;
2725}
2726
2727/* This function frees all memory of a single fp */
2728static void qede_free_mem_fp(struct qede_dev *edev,
2729 struct qede_fastpath *fp)
2730{
2731 int tc;
2732
2733 qede_free_mem_sb(edev, fp->sb_info);
2734
2735 qede_free_mem_rxq(edev, fp->rxq);
2736
2737 for (tc = 0; tc < edev->num_tc; tc++)
2738 qede_free_mem_txq(edev, &fp->txqs[tc]);
2739}
2740
2741/* This function allocates all memory needed for a single fp (i.e. an entity
2742 * which contains status block, one rx queue and multiple per-TC tx queues.
2743 */
2744static int qede_alloc_mem_fp(struct qede_dev *edev,
2745 struct qede_fastpath *fp)
2746{
2747 int rc, tc;
2748
2749 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2750 if (rc)
2751 goto err;
2752
2753 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2754 if (rc)
2755 goto err;
2756
2757 for (tc = 0; tc < edev->num_tc; tc++) {
2758 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2759 if (rc)
2760 goto err;
2761 }
2762
2763 return 0;
2950219d 2764err:
f86af2df 2765 return rc;
2950219d
YM		 2766}
2767
2768static void qede_free_mem_load(struct qede_dev *edev)
2769{
2770 int i;
2771
2772 for_each_rss(i) {
2773 struct qede_fastpath *fp = &edev->fp_array[i];
2774
2775 qede_free_mem_fp(edev, fp);
2776 }
2777}
2778
2779/* This function allocates all qede memory at NIC load. */
2780static int qede_alloc_mem_load(struct qede_dev *edev)
2781{
2782 int rc = 0, rss_id;
2783
2784 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2785 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2786
2787 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 2788 if (rc) {
2950219d 2789 DP_ERR(edev,
f86af2df
MC		 2790 "Failed to allocate memory for fastpath - rss id = %d\n",
2791 rss_id);
2792 qede_free_mem_load(edev);
2793 return rc;
2950219d 2794 }
2950219d
YM		 2795 }
2796
2797 return 0;
2798}
2799
2800/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2801static void qede_init_fp(struct qede_dev *edev)
2802{
2803 int rss_id, txq_index, tc;
2804 struct qede_fastpath *fp;
2805
2806 for_each_rss(rss_id) {
2807 fp = &edev->fp_array[rss_id];
2808
2809 fp->edev = edev;
2810 fp->rss_id = rss_id;
2811
2812 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2813
2814 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2815
2816 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2817 fp->rxq->rxq_id = rss_id;
2818
2819 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2820 for (tc = 0; tc < edev->num_tc; tc++) {
2821 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2822 fp->txqs[tc].index = txq_index;
2823 }
2824
2825 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2826 edev->ndev->name, rss_id);
2827 }
55482edc
MC		 2828
2829 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2830}
2831
2832static int qede_set_real_num_queues(struct qede_dev *edev)
2833{
2834 int rc = 0;
2835
2836 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2837 if (rc) {
2838 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2839 return rc;
2840 }
2841 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2842 if (rc) {
2843 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2844 return rc;
2845 }
2846
2847 return 0;
2848}
2849
2850static void qede_napi_disable_remove(struct qede_dev *edev)
2851{
2852 int i;
2853
2854 for_each_rss(i) {
2855 napi_disable(&edev->fp_array[i].napi);
2856
2857 netif_napi_del(&edev->fp_array[i].napi);
2858 }
2859}
2860
2861static void qede_napi_add_enable(struct qede_dev *edev)
2862{
2863 int i;
2864
2865 /* Add NAPI objects */
2866 for_each_rss(i) {
2867 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2868 qede_poll, NAPI_POLL_WEIGHT);
2869 napi_enable(&edev->fp_array[i].napi);
2870 }
2871}
2872
2873static void qede_sync_free_irqs(struct qede_dev *edev)
2874{
2875 int i;
2876
2877 for (i = 0; i < edev->int_info.used_cnt; i++) {
2878 if (edev->int_info.msix_cnt) {
2879 synchronize_irq(edev->int_info.msix[i].vector);
2880 free_irq(edev->int_info.msix[i].vector,
2881 &edev->fp_array[i]);
2882 } else {
2883 edev->ops->common->simd_handler_clean(edev->cdev, i);
2884 }
2885 }
2886
2887 edev->int_info.used_cnt = 0;
2888}
2889
2890static int qede_req_msix_irqs(struct qede_dev *edev)
2891{
2892 int i, rc;
2893
2894 /* Sanitize number of interrupts == number of prepared RSS queues */
2895 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2896 DP_ERR(edev,
2897 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2898 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2899 return -EINVAL;
2900 }
2901
2902 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2903 rc = request_irq(edev->int_info.msix[i].vector,
2904 qede_msix_fp_int, 0, edev->fp_array[i].name,
2905 &edev->fp_array[i]);
2906 if (rc) {
2907 DP_ERR(edev, "Request fp %d irq failed\n", i);
2908 qede_sync_free_irqs(edev);
2909 return rc;
2910 }
2911 DP_VERBOSE(edev, NETIF_MSG_INTR,
2912 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2913 edev->fp_array[i].name, i,
2914 &edev->fp_array[i]);
2915 edev->int_info.used_cnt++;
2916 }
2917
2918 return 0;
2919}
2920
2921static void qede_simd_fp_handler(void *cookie)
2922{
2923 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2924
2925 napi_schedule_irqoff(&fp->napi);
2926}
2927
2928static int qede_setup_irqs(struct qede_dev *edev)
2929{
2930 int i, rc = 0;
2931
2932 /* Learn Interrupt configuration */
2933 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2934 if (rc)
2935 return rc;
2936
2937 if (edev->int_info.msix_cnt) {
2938 rc = qede_req_msix_irqs(edev);
2939 if (rc)
2940 return rc;
2941 edev->ndev->irq = edev->int_info.msix[0].vector;
2942 } else {
2943 const struct qed_common_ops *ops;
2944
2945 /* qed should learn receive the RSS ids and callbacks */
2946 ops = edev->ops->common;
2947 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2948 ops->simd_handler_config(edev->cdev,
2949 &edev->fp_array[i], i,
2950 qede_simd_fp_handler);
2951 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2952 }
2953 return 0;
2954}
2955
2956static int qede_drain_txq(struct qede_dev *edev,
2957 struct qede_tx_queue *txq,
2958 bool allow_drain)
2959{
2960 int rc, cnt = 1000;
2961
2962 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2963 if (!cnt) {
2964 if (allow_drain) {
2965 DP_NOTICE(edev,
2966 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2967 txq->index);
2968 rc = edev->ops->common->drain(edev->cdev);
2969 if (rc)
2970 return rc;
2971 return qede_drain_txq(edev, txq, false);
2972 }
2973 DP_NOTICE(edev,
2974 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2975 txq->index, txq->sw_tx_prod,
2976 txq->sw_tx_cons);
2977 return -ENODEV;
2978 }
2979 cnt--;
2980 usleep_range(1000, 2000);
2981 barrier();
2982 }
2983
2984 /* FW finished processing, wait for HW to transmit all tx packets */
2985 usleep_range(1000, 2000);
2986
2987 return 0;
2988}
2989
2990static int qede_stop_queues(struct qede_dev *edev)
2991{
2992 struct qed_update_vport_params vport_update_params;
2993 struct qed_dev *cdev = edev->cdev;
2994 int rc, tc, i;
2995
2996 /* Disable the vport */
2997 memset(&vport_update_params, 0, sizeof(vport_update_params));
2998 vport_update_params.vport_id = 0;
2999 vport_update_params.update_vport_active_flg = 1;
3000 vport_update_params.vport_active_flg = 0;
3001 vport_update_params.update_rss_flg = 0;
3002
3003 rc = edev->ops->vport_update(cdev, &vport_update_params);
3004 if (rc) {
3005 DP_ERR(edev, "Failed to update vport\n");
3006 return rc;
3007 }
3008
3009 /* Flush Tx queues. If needed, request drain from MCP */
3010 for_each_rss(i) {
3011 struct qede_fastpath *fp = &edev->fp_array[i];
3012
3013 for (tc = 0; tc < edev->num_tc; tc++) {
3014 struct qede_tx_queue *txq = &fp->txqs[tc];
3015
3016 rc = qede_drain_txq(edev, txq, true);
3017 if (rc)
3018 return rc;
3019 }
3020 }
3021
3022 /* Stop all Queues in reverse order*/
3023 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3024 struct qed_stop_rxq_params rx_params;
3025
3026 /* Stop the Tx Queue(s)*/
3027 for (tc = 0; tc < edev->num_tc; tc++) {
3028 struct qed_stop_txq_params tx_params;
3029
3030 tx_params.rss_id = i;
3031 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3032 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3033 if (rc) {
3034 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3035 tx_params.tx_queue_id);
3036 return rc;
3037 }
3038 }
3039
3040 /* Stop the Rx Queue*/
3041 memset(&rx_params, 0, sizeof(rx_params));
3042 rx_params.rss_id = i;
3043 rx_params.rx_queue_id = i;
3044
3045 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3046 if (rc) {
3047 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3048 return rc;
3049 }
3050 }
3051
3052 /* Stop the vport */
3053 rc = edev->ops->vport_stop(cdev, 0);
3054 if (rc)
3055 DP_ERR(edev, "Failed to stop VPORT\n");
3056
3057 return rc;
3058}
3059
3060static int qede_start_queues(struct qede_dev *edev)
3061{
3062 int rc, tc, i;
088c8618 3063 int vlan_removal_en = 1;
2950219d 3064 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 3065 struct qed_update_vport_params vport_update_params;
3066 struct qed_queue_start_common_params q_params;
088c8618 3067 struct qed_start_vport_params start = {0};
961acdea 3068 bool reset_rss_indir = false;
2950219d
YM		 3069
3070 if (!edev->num_rss) {
3071 DP_ERR(edev,
3072 "Cannot update V-VPORT as active as there are no Rx queues\n");
3073 return -EINVAL;
3074 }
3075
55482edc 3076 start.gro_enable = !edev->gro_disable;
088c8618
MC		 3077 start.mtu = edev->ndev->mtu;
3078 start.vport_id = 0;
3079 start.drop_ttl0 = true;
3080 start.remove_inner_vlan = vlan_removal_en;
3081
3082 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 3083
3084 if (rc) {
3085 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3086 return rc;
3087 }
3088
3089 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3090 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 3091 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 3092
3093 for_each_rss(i) {
3094 struct qede_fastpath *fp = &edev->fp_array[i];
3095 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3096
3097 memset(&q_params, 0, sizeof(q_params));
3098 q_params.rss_id = i;
3099 q_params.queue_id = i;
3100 q_params.vport_id = 0;
3101 q_params.sb = fp->sb_info->igu_sb_id;
3102 q_params.sb_idx = RX_PI;
3103
3104 rc = edev->ops->q_rx_start(cdev, &q_params,
3105 fp->rxq->rx_buf_size,
3106 fp->rxq->rx_bd_ring.p_phys_addr,
3107 phys_table,
3108 fp->rxq->rx_comp_ring.page_cnt,
3109 &fp->rxq->hw_rxq_prod_addr);
3110 if (rc) {
3111 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3112 return rc;
3113 }
3114
3115 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3116
3117 qede_update_rx_prod(edev, fp->rxq);
3118
3119 for (tc = 0; tc < edev->num_tc; tc++) {
3120 struct qede_tx_queue *txq = &fp->txqs[tc];
3121 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3122
3123 memset(&q_params, 0, sizeof(q_params));
3124 q_params.rss_id = i;
3125 q_params.queue_id = txq_index;
3126 q_params.vport_id = 0;
3127 q_params.sb = fp->sb_info->igu_sb_id;
3128 q_params.sb_idx = TX_PI(tc);
3129
3130 rc = edev->ops->q_tx_start(cdev, &q_params,
3131 txq->tx_pbl.pbl.p_phys_table,
3132 txq->tx_pbl.page_cnt,
3133 &txq->doorbell_addr);
3134 if (rc) {
3135 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3136 txq_index, rc);
3137 return rc;
3138 }
3139
3140 txq->hw_cons_ptr =
3141 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3142 SET_FIELD(txq->tx_db.data.params,
3143 ETH_DB_DATA_DEST, DB_DEST_XCM);
3144 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3145 DB_AGG_CMD_SET);
3146 SET_FIELD(txq->tx_db.data.params,
3147 ETH_DB_DATA_AGG_VAL_SEL,
3148 DQ_XCM_ETH_TX_BD_PROD_CMD);
3149
3150 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3151 }
3152 }
3153
3154 /* Prepare and send the vport enable */
3155 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3156 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3157 vport_update_params.update_vport_active_flg = 1;
3158 vport_update_params.vport_active_flg = 1;
3159
3160 /* Fill struct with RSS params */
3161 if (QEDE_RSS_CNT(edev) > 1) {
3162 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3163
3164 /* Need to validate current RSS config uses valid entries */
3165 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3166 if (edev->rss_params.rss_ind_table[i] >=
3167 edev->num_rss) {
3168 reset_rss_indir = true;
3169 break;
3170 }
3171 }
3172
3173 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3174 reset_rss_indir) {
3175 u16 val;
3176
3177 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3178 u16 indir_val;
3179
3180 val = QEDE_RSS_CNT(edev);
3181 indir_val = ethtool_rxfh_indir_default(i, val);
3182 edev->rss_params.rss_ind_table[i] = indir_val;
3183 }
3184 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3185 }
3186
3187 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3188 netdev_rss_key_fill(edev->rss_params.rss_key,
3189 sizeof(edev->rss_params.rss_key));
3190 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3191 }
3192
3193 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3194 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3195 QED_RSS_IPV6 |
3196 QED_RSS_IPV4_TCP |
3197 QED_RSS_IPV6_TCP;
3198 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3199 }
3200
3201 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3202 sizeof(vport_update_params.rss_params));
2950219d 3203 } else {
961acdea
SRK		 3204 memset(&vport_update_params.rss_params, 0,
3205 sizeof(vport_update_params.rss_params));
2950219d 3206 }
2950219d
YM		 3207
3208 rc = edev->ops->vport_update(cdev, &vport_update_params);
3209 if (rc) {
3210 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3211 return rc;
3212 }
3213
3214 return 0;
3215}
3216
0d8e0aa0
SK		 3217static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3218 enum qed_filter_xcast_params_type opcode,
3219 unsigned char *mac, int num_macs)
3220{
3221 struct qed_filter_params filter_cmd;
3222 int i;
3223
3224 memset(&filter_cmd, 0, sizeof(filter_cmd));
3225 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3226 filter_cmd.filter.mcast.type = opcode;
3227 filter_cmd.filter.mcast.num = num_macs;
3228
3229 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3230 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3231
3232 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3233}
3234
2950219d
YM		 3235enum qede_unload_mode {
3236 QEDE_UNLOAD_NORMAL,
3237};
3238
3239static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3240{
a2ec6172 3241 struct qed_link_params link_params;
2950219d
YM		 3242 int rc;
3243
3244 DP_INFO(edev, "Starting qede unload\n");
3245
0d8e0aa0
SK		 3246 mutex_lock(&edev->qede_lock);
3247 edev->state = QEDE_STATE_CLOSED;
3248
2950219d
YM		 3249 /* Close OS Tx */
3250 netif_tx_disable(edev->ndev);
3251 netif_carrier_off(edev->ndev);
3252
a2ec6172
SK		 3253 /* Reset the link */
3254 memset(&link_params, 0, sizeof(link_params));
3255 link_params.link_up = false;
3256 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3257 rc = qede_stop_queues(edev);
3258 if (rc) {
3259 qede_sync_free_irqs(edev);
3260 goto out;
3261 }
3262
3263 DP_INFO(edev, "Stopped Queues\n");
3264
7c1bfcad 3265 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3266 edev->ops->fastpath_stop(edev->cdev);
3267
3268 /* Release the interrupts */
3269 qede_sync_free_irqs(edev);
3270 edev->ops->common->set_fp_int(edev->cdev, 0);
3271
3272 qede_napi_disable_remove(edev);
3273
3274 qede_free_mem_load(edev);
3275 qede_free_fp_array(edev);
3276
3277out:
3278 mutex_unlock(&edev->qede_lock);
3279 DP_INFO(edev, "Ending qede unload\n");
3280}
3281
3282enum qede_load_mode {
3283 QEDE_LOAD_NORMAL,
3284};
3285
3286static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3287{
a2ec6172
SK		 3288 struct qed_link_params link_params;
3289 struct qed_link_output link_output;
2950219d
YM		 3290 int rc;
3291
3292 DP_INFO(edev, "Starting qede load\n");
3293
3294 rc = qede_set_num_queues(edev);
3295 if (rc)
3296 goto err0;
3297
3298 rc = qede_alloc_fp_array(edev);
3299 if (rc)
3300 goto err0;
3301
3302 qede_init_fp(edev);
3303
3304 rc = qede_alloc_mem_load(edev);
3305 if (rc)
3306 goto err1;
3307 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3308 QEDE_RSS_CNT(edev), edev->num_tc);
3309
3310 rc = qede_set_real_num_queues(edev);
3311 if (rc)
3312 goto err2;
3313
3314 qede_napi_add_enable(edev);
3315 DP_INFO(edev, "Napi added and enabled\n");
3316
3317 rc = qede_setup_irqs(edev);
3318 if (rc)
3319 goto err3;
3320 DP_INFO(edev, "Setup IRQs succeeded\n");
3321
3322 rc = qede_start_queues(edev);
3323 if (rc)
3324 goto err4;
3325 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3326
3327 /* Add primary mac and set Rx filters */
3328 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3329
0d8e0aa0
SK		 3330 mutex_lock(&edev->qede_lock);
3331 edev->state = QEDE_STATE_OPEN;
3332 mutex_unlock(&edev->qede_lock);
a2ec6172 3333
7c1bfcad
SRK		 3334 /* Program un-configured VLANs */
3335 qede_configure_vlan_filters(edev);
3336
a2ec6172
SK		 3337 /* Ask for link-up using current configuration */
3338 memset(&link_params, 0, sizeof(link_params));
3339 link_params.link_up = true;
3340 edev->ops->common->set_link(edev->cdev, &link_params);
3341
3342 /* Query whether link is already-up */
3343 memset(&link_output, 0, sizeof(link_output));
3344 edev->ops->common->get_link(edev->cdev, &link_output);
3345 qede_link_update(edev, &link_output);
3346
2950219d
YM		 3347 DP_INFO(edev, "Ending successfully qede load\n");
3348
3349 return 0;
3350
3351err4:
3352 qede_sync_free_irqs(edev);
3353 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3354err3:
3355 qede_napi_disable_remove(edev);
3356err2:
3357 qede_free_mem_load(edev);
3358err1:
3359 edev->ops->common->set_fp_int(edev->cdev, 0);
3360 qede_free_fp_array(edev);
3361 edev->num_rss = 0;
3362err0:
3363 return rc;
3364}
3365
133fac0e
SK		 3366void qede_reload(struct qede_dev *edev,
3367 void (*func)(struct qede_dev *, union qede_reload_args *),
3368 union qede_reload_args *args)
3369{
3370 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3371 /* Call function handler to update parameters
3372 * needed for function load.
3373 */
3374 if (func)
3375 func(edev, args);
3376
3377 qede_load(edev, QEDE_LOAD_NORMAL);
3378
3379 mutex_lock(&edev->qede_lock);
3380 qede_config_rx_mode(edev->ndev);
3381 mutex_unlock(&edev->qede_lock);
3382}
3383
2950219d
YM		 3384/* called with rtnl_lock */
3385static int qede_open(struct net_device *ndev)
3386{
3387 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3388 int rc;
2950219d
YM		 3389
3390 netif_carrier_off(ndev);
3391
3392 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3393
b18e170c
MC		 3394 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3395
3396 if (rc)
3397 return rc;
3398
3399#ifdef CONFIG_QEDE_VXLAN
3400 vxlan_get_rx_port(ndev);
9a109dd0
MC		 3401#endif
3402#ifdef CONFIG_QEDE_GENEVE
3403 geneve_get_rx_port(ndev);
b18e170c
MC		 3404#endif
3405 return 0;
2950219d
YM		 3406}
3407
3408static int qede_close(struct net_device *ndev)
3409{
3410 struct qede_dev *edev = netdev_priv(ndev);
3411
3412 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3413
3414 return 0;
3415}
0d8e0aa0 3416
a2ec6172
SK		 3417static void qede_link_update(void *dev, struct qed_link_output *link)
3418{
3419 struct qede_dev *edev = dev;
3420
3421 if (!netif_running(edev->ndev)) {
3422 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3423 return;
3424 }
3425
3426 if (link->link_up) {
8e025ae2
YM		 3427 if (!netif_carrier_ok(edev->ndev)) {
3428 DP_NOTICE(edev, "Link is up\n");
3429 netif_tx_start_all_queues(edev->ndev);
3430 netif_carrier_on(edev->ndev);
3431 }
a2ec6172 3432 } else {
8e025ae2
YM		 3433 if (netif_carrier_ok(edev->ndev)) {
3434 DP_NOTICE(edev, "Link is down\n");
3435 netif_tx_disable(edev->ndev);
3436 netif_carrier_off(edev->ndev);
3437 }
a2ec6172
SK		 3438 }
3439}
3440
0d8e0aa0
SK		 3441static int qede_set_mac_addr(struct net_device *ndev, void *p)
3442{
3443 struct qede_dev *edev = netdev_priv(ndev);
3444 struct sockaddr *addr = p;
3445 int rc;
3446
3447 ASSERT_RTNL(); /* @@@TBD To be removed */
3448
3449 DP_INFO(edev, "Set_mac_addr called\n");
3450
3451 if (!is_valid_ether_addr(addr->sa_data)) {
3452 DP_NOTICE(edev, "The MAC address is not valid\n");
3453 return -EFAULT;
3454 }
3455
3456 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3457
3458 if (!netif_running(ndev)) {
3459 DP_NOTICE(edev, "The device is currently down\n");
3460 return 0;
3461 }
3462
3463 /* Remove the previous primary mac */
3464 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3465 edev->primary_mac);
3466 if (rc)
3467 return rc;
3468
3469 /* Add MAC filter according to the new unicast HW MAC address */
3470 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3471 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3472 edev->primary_mac);
3473}
3474
3475static int
3476qede_configure_mcast_filtering(struct net_device *ndev,
3477 enum qed_filter_rx_mode_type *accept_flags)
3478{
3479 struct qede_dev *edev = netdev_priv(ndev);
3480 unsigned char *mc_macs, *temp;
3481 struct netdev_hw_addr *ha;
3482 int rc = 0, mc_count;
3483 size_t size;
3484
3485 size = 64 * ETH_ALEN;
3486
3487 mc_macs = kzalloc(size, GFP_KERNEL);
3488 if (!mc_macs) {
3489 DP_NOTICE(edev,
3490 "Failed to allocate memory for multicast MACs\n");
3491 rc = -ENOMEM;
3492 goto exit;
3493 }
3494
3495 temp = mc_macs;
3496
3497 /* Remove all previously configured MAC filters */
3498 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3499 mc_macs, 1);
3500 if (rc)
3501 goto exit;
3502
3503 netif_addr_lock_bh(ndev);
3504
3505 mc_count = netdev_mc_count(ndev);
3506 if (mc_count < 64) {
3507 netdev_for_each_mc_addr(ha, ndev) {
3508 ether_addr_copy(temp, ha->addr);
3509 temp += ETH_ALEN;
3510 }
3511 }
3512
3513 netif_addr_unlock_bh(ndev);
3514
3515 /* Check for all multicast @@@TBD resource allocation */
3516 if ((ndev->flags & IFF_ALLMULTI) ||
3517 (mc_count > 64)) {
3518 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3519 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3520 } else {
3521 /* Add all multicast MAC filters */
3522 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3523 mc_macs, mc_count);
3524 }
3525
3526exit:
3527 kfree(mc_macs);
3528 return rc;
3529}
3530
3531static void qede_set_rx_mode(struct net_device *ndev)
3532{
3533 struct qede_dev *edev = netdev_priv(ndev);
3534
3535 DP_INFO(edev, "qede_set_rx_mode called\n");
3536
3537 if (edev->state != QEDE_STATE_OPEN) {
3538 DP_INFO(edev,
3539 "qede_set_rx_mode called while interface is down\n");
3540 } else {
3541 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3542 schedule_delayed_work(&edev->sp_task, 0);
3543 }
3544}
3545
3546/* Must be called with qede_lock held */
3547static void qede_config_rx_mode(struct net_device *ndev)
3548{
3549 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3550 struct qede_dev *edev = netdev_priv(ndev);
3551 struct qed_filter_params rx_mode;
3552 unsigned char *uc_macs, *temp;
3553 struct netdev_hw_addr *ha;
3554 int rc, uc_count;
3555 size_t size;
3556
3557 netif_addr_lock_bh(ndev);
3558
3559 uc_count = netdev_uc_count(ndev);
3560 size = uc_count * ETH_ALEN;
3561
3562 uc_macs = kzalloc(size, GFP_ATOMIC);
3563 if (!uc_macs) {
3564 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3565 netif_addr_unlock_bh(ndev);
3566 return;
3567 }
3568
3569 temp = uc_macs;
3570 netdev_for_each_uc_addr(ha, ndev) {
3571 ether_addr_copy(temp, ha->addr);
3572 temp += ETH_ALEN;
3573 }
3574
3575 netif_addr_unlock_bh(ndev);
3576
3577 /* Configure the struct for the Rx mode */
3578 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3579 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3580
3581 /* Remove all previous unicast secondary macs and multicast macs
3582 * (configrue / leave the primary mac)
3583 */
3584 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3585 edev->primary_mac);
3586 if (rc)
3587 goto out;
3588
3589 /* Check for promiscuous */
3590 if ((ndev->flags & IFF_PROMISC) ||
3591 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3592 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3593 } else {
3594 /* Add MAC filters according to the unicast secondary macs */
3595 int i;
3596
3597 temp = uc_macs;
3598 for (i = 0; i < uc_count; i++) {
3599 rc = qede_set_ucast_rx_mac(edev,
3600 QED_FILTER_XCAST_TYPE_ADD,
3601 temp);
3602 if (rc)
3603 goto out;
3604
3605 temp += ETH_ALEN;
3606 }
3607
3608 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3609 if (rc)
3610 goto out;
3611 }
3612
7c1bfcad
SRK		 3613 /* take care of VLAN mode */
3614 if (ndev->flags & IFF_PROMISC) {
3615 qede_config_accept_any_vlan(edev, true);
3616 } else if (!edev->non_configured_vlans) {
3617 /* It's possible that accept_any_vlan mode is set due to a
3618 * previous setting of IFF_PROMISC. If vlan credits are
3619 * sufficient, disable accept_any_vlan.
3620 */
3621 qede_config_accept_any_vlan(edev, false);
3622 }
3623
0d8e0aa0
SK		 3624 rx_mode.filter.accept_flags = accept_flags;
3625 edev->ops->filter_config(edev->cdev, &rx_mode);
3626out:
3627 kfree(uc_macs);
3628}
Linux kernel - Deliverables
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