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net: ethernet: ti: cpsw: remove unused priv lock
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
b18e170c 27#ifdef CONFIG_QEDE_VXLAN
e712d52b 28#include <net/vxlan.h>
b18e170c 29#endif
9a109dd0
MC		 30#ifdef CONFIG_QEDE_GENEVE
31#include <net/geneve.h>
32#endif
e712d52b
YM		 33#include <linux/ip.h>
34#include <net/ipv6.h>
35#include <net/tcp.h>
36#include <linux/if_ether.h>
37#include <linux/if_vlan.h>
38#include <linux/pkt_sched.h>
39#include <linux/ethtool.h>
40#include <linux/in.h>
41#include <linux/random.h>
42#include <net/ip6_checksum.h>
43#include <linux/bitops.h>
44
45#include "qede.h"
46
5abd7e92
YM		 47static char version[] =
48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 49
5abd7e92 50MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 51MODULE_LICENSE("GPL");
52MODULE_VERSION(DRV_MODULE_VERSION);
53
54static uint debug;
55module_param(debug, uint, 0);
56MODULE_PARM_DESC(debug, " Default debug msglevel");
57
58static const struct qed_eth_ops *qed_ops;
59
60#define CHIP_NUM_57980S_40 0x1634
0e7441d7 61#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 62#define CHIP_NUM_57980S_MF 0x1636
63#define CHIP_NUM_57980S_100 0x1644
64#define CHIP_NUM_57980S_50 0x1654
65#define CHIP_NUM_57980S_25 0x1656
fefb0202 66#define CHIP_NUM_57980S_IOV 0x1664
e712d52b
YM		 67
68#ifndef PCI_DEVICE_ID_NX2_57980E
69#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
70#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
71#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
72#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
73#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
74#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
fefb0202 75#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
e712d52b
YM		 76#endif
77
fefb0202
YM		 78enum qede_pci_private {
79 QEDE_PRIVATE_PF,
80 QEDE_PRIVATE_VF
81};
82
e712d52b 83static const struct pci_device_id qede_pci_tbl[] = {
fefb0202
YM		 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
90 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
e712d52b
YM		 91 { 0 }
92};
93
94MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
95
96static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
97
98#define TX_TIMEOUT (5 * HZ)
99
100static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 101static int qede_alloc_rx_buffer(struct qede_dev *edev,
102 struct qede_rx_queue *rxq);
a2ec6172 103static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b 104
fefb0202 105#ifdef CONFIG_QED_SRIOV
08feecd7
YM		 106static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
107{
108 struct qede_dev *edev = netdev_priv(ndev);
109
110 if (vlan > 4095) {
111 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
112 return -EINVAL;
113 }
114
115 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
116 vlan, vf);
117
118 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
119}
120
eff16960
YM		 121static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
122{
123 struct qede_dev *edev = netdev_priv(ndev);
124
125 DP_VERBOSE(edev, QED_MSG_IOV,
126 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
127 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
128
129 if (!is_valid_ether_addr(mac)) {
130 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
131 return -EINVAL;
132 }
133
134 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
135}
136
fefb0202
YM		 137static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
138{
139 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
831bfb0e
YM		 140 struct qed_dev_info *qed_info = &edev->dev_info.common;
141 int rc;
fefb0202
YM		 142
143 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
144
831bfb0e
YM		 145 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
146
147 /* Enable/Disable Tx switching for PF */
148 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
149 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
150 struct qed_update_vport_params params;
151
152 memset(&params, 0, sizeof(params));
153 params.vport_id = 0;
154 params.update_tx_switching_flg = 1;
155 params.tx_switching_flg = num_vfs_param ? 1 : 0;
156 edev->ops->vport_update(edev->cdev, &params);
157 }
158
159 return rc;
fefb0202
YM		 160}
161#endif
162
e712d52b
YM		 163static struct pci_driver qede_pci_driver = {
164 .name = "qede",
165 .id_table = qede_pci_tbl,
166 .probe = qede_probe,
167 .remove = qede_remove,
fefb0202
YM		 168#ifdef CONFIG_QED_SRIOV
169 .sriov_configure = qede_sriov_configure,
170#endif
e712d52b
YM		 171};
172
eff16960
YM		 173static void qede_force_mac(void *dev, u8 *mac)
174{
175 struct qede_dev *edev = dev;
176
177 ether_addr_copy(edev->ndev->dev_addr, mac);
178 ether_addr_copy(edev->primary_mac, mac);
179}
180
a2ec6172
SK		 181static struct qed_eth_cb_ops qede_ll_ops = {
182 {
183 .link_update = qede_link_update,
184 },
eff16960 185 .force_mac = qede_force_mac,
a2ec6172
SK		 186};
187
2950219d
YM		 188static int qede_netdev_event(struct notifier_block *this, unsigned long event,
189 void *ptr)
190{
191 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
192 struct ethtool_drvinfo drvinfo;
193 struct qede_dev *edev;
194
195 /* Currently only support name change */
196 if (event != NETDEV_CHANGENAME)
197 goto done;
198
199 /* Check whether this is a qede device */
200 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
201 goto done;
202
203 memset(&drvinfo, 0, sizeof(drvinfo));
204 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
205 if (strcmp(drvinfo.driver, "qede"))
206 goto done;
207 edev = netdev_priv(ndev);
208
209 /* Notify qed of the name change */
210 if (!edev->ops || !edev->ops->common)
211 goto done;
212 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
213 "qede");
214
215done:
216 return NOTIFY_DONE;
217}
218
219static struct notifier_block qede_netdev_notifier = {
220 .notifier_call = qede_netdev_event,
221};
222
e712d52b
YM		 223static
224int __init qede_init(void)
225{
226 int ret;
e712d52b
YM		 227
228 pr_notice("qede_init: %s\n", version);
229
95114344 230 qed_ops = qed_get_eth_ops();
e712d52b
YM		 231 if (!qed_ops) {
232 pr_notice("Failed to get qed ethtool operations\n");
233 return -EINVAL;
234 }
235
2950219d
YM		 236 /* Must register notifier before pci ops, since we might miss
237 * interface rename after pci probe and netdev registeration.
238 */
239 ret = register_netdevice_notifier(&qede_netdev_notifier);
240 if (ret) {
241 pr_notice("Failed to register netdevice_notifier\n");
242 qed_put_eth_ops();
243 return -EINVAL;
244 }
245
e712d52b
YM		 246 ret = pci_register_driver(&qede_pci_driver);
247 if (ret) {
248 pr_notice("Failed to register driver\n");
2950219d 249 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 250 qed_put_eth_ops();
251 return -EINVAL;
252 }
253
254 return 0;
255}
256
257static void __exit qede_cleanup(void)
258{
259 pr_notice("qede_cleanup called\n");
260
2950219d 261 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 262 pci_unregister_driver(&qede_pci_driver);
263 qed_put_eth_ops();
264}
265
266module_init(qede_init);
267module_exit(qede_cleanup);
268
2950219d
YM		 269/* -------------------------------------------------------------------------
270 * START OF FAST-PATH
271 * -------------------------------------------------------------------------
272 */
273
274/* Unmap the data and free skb */
275static int qede_free_tx_pkt(struct qede_dev *edev,
276 struct qede_tx_queue *txq,
277 int *len)
278{
279 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
280 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
281 struct eth_tx_1st_bd *first_bd;
282 struct eth_tx_bd *tx_data_bd;
283 int bds_consumed = 0;
284 int nbds;
285 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
286 int i, split_bd_len = 0;
287
288 if (unlikely(!skb)) {
289 DP_ERR(edev,
290 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
291 idx, txq->sw_tx_cons, txq->sw_tx_prod);
292 return -1;
293 }
294
295 *len = skb->len;
296
297 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
298
299 bds_consumed++;
300
301 nbds = first_bd->data.nbds;
302
303 if (data_split) {
304 struct eth_tx_bd *split = (struct eth_tx_bd *)
305 qed_chain_consume(&txq->tx_pbl);
306 split_bd_len = BD_UNMAP_LEN(split);
307 bds_consumed++;
308 }
309 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
310 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
311
312 /* Unmap the data of the skb frags */
313 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
314 tx_data_bd = (struct eth_tx_bd *)
315 qed_chain_consume(&txq->tx_pbl);
316 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
317 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
318 }
319
320 while (bds_consumed++ < nbds)
321 qed_chain_consume(&txq->tx_pbl);
322
323 /* Free skb */
324 dev_kfree_skb_any(skb);
325 txq->sw_tx_ring[idx].skb = NULL;
326 txq->sw_tx_ring[idx].flags = 0;
327
328 return 0;
329}
330
331/* Unmap the data and free skb when mapping failed during start_xmit */
332static void qede_free_failed_tx_pkt(struct qede_dev *edev,
333 struct qede_tx_queue *txq,
334 struct eth_tx_1st_bd *first_bd,
335 int nbd,
336 bool data_split)
337{
338 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
339 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
340 struct eth_tx_bd *tx_data_bd;
341 int i, split_bd_len = 0;
342
343 /* Return prod to its position before this skb was handled */
344 qed_chain_set_prod(&txq->tx_pbl,
345 le16_to_cpu(txq->tx_db.data.bd_prod),
346 first_bd);
347
348 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
349
350 if (data_split) {
351 struct eth_tx_bd *split = (struct eth_tx_bd *)
352 qed_chain_produce(&txq->tx_pbl);
353 split_bd_len = BD_UNMAP_LEN(split);
354 nbd--;
355 }
356
357 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
358 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
359
360 /* Unmap the data of the skb frags */
361 for (i = 0; i < nbd; i++) {
362 tx_data_bd = (struct eth_tx_bd *)
363 qed_chain_produce(&txq->tx_pbl);
364 if (tx_data_bd->nbytes)
365 dma_unmap_page(&edev->pdev->dev,
366 BD_UNMAP_ADDR(tx_data_bd),
367 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
368 }
369
370 /* Return again prod to its position before this skb was handled */
371 qed_chain_set_prod(&txq->tx_pbl,
372 le16_to_cpu(txq->tx_db.data.bd_prod),
373 first_bd);
374
375 /* Free skb */
376 dev_kfree_skb_any(skb);
377 txq->sw_tx_ring[idx].skb = NULL;
378 txq->sw_tx_ring[idx].flags = 0;
379}
380
381static u32 qede_xmit_type(struct qede_dev *edev,
382 struct sk_buff *skb,
383 int *ipv6_ext)
384{
385 u32 rc = XMIT_L4_CSUM;
386 __be16 l3_proto;
387
388 if (skb->ip_summed != CHECKSUM_PARTIAL)
389 return XMIT_PLAIN;
390
391 l3_proto = vlan_get_protocol(skb);
392 if (l3_proto == htons(ETH_P_IPV6) &&
393 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
394 *ipv6_ext = 1;
395
14db81de
MC		 396 if (skb->encapsulation)
397 rc |= XMIT_ENC;
398
2950219d
YM		 399 if (skb_is_gso(skb))
400 rc |= XMIT_LSO;
401
402 return rc;
403}
404
405static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
406 struct eth_tx_2nd_bd *second_bd,
407 struct eth_tx_3rd_bd *third_bd)
408{
409 u8 l4_proto;
fc48b7a6 410 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 411
fc48b7a6 412 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 413
fc48b7a6 414 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 415 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
416 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
417
fc48b7a6 418 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 419 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
420
421 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
422 l4_proto = ipv6_hdr(skb)->nexthdr;
423 else
424 l4_proto = ip_hdr(skb)->protocol;
425
426 if (l4_proto == IPPROTO_UDP)
fc48b7a6 427 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 428
fc48b7a6 429 if (third_bd)
2950219d 430 third_bd->data.bitfields |=
fc48b7a6
YM		 431 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
432 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
433 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 434
fc48b7a6 435 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 436 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
437}
438
439static int map_frag_to_bd(struct qede_dev *edev,
440 skb_frag_t *frag,
441 struct eth_tx_bd *bd)
442{
443 dma_addr_t mapping;
444
445 /* Map skb non-linear frag data for DMA */
446 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
447 skb_frag_size(frag),
448 DMA_TO_DEVICE);
449 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
450 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
451 return -ENOMEM;
452 }
453
454 /* Setup the data pointer of the frag data */
455 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
456
457 return 0;
458}
459
14db81de
MC		 460static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
461{
462 if (is_encap_pkt)
463 return (skb_inner_transport_header(skb) +
464 inner_tcp_hdrlen(skb) - skb->data);
465 else
466 return (skb_transport_header(skb) +
467 tcp_hdrlen(skb) - skb->data);
468}
469
b1199b10
YM		 470/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
471#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
472static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
473 u8 xmit_type)
474{
475 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
476
477 if (xmit_type & XMIT_LSO) {
478 int hlen;
479
14db81de 480 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
b1199b10
YM		 481
482 /* linear payload would require its own BD */
483 if (skb_headlen(skb) > hlen)
484 allowed_frags--;
485 }
486
487 return (skb_shinfo(skb)->nr_frags > allowed_frags);
488}
489#endif
490
2950219d
YM		 491/* Main transmit function */
492static
493netdev_tx_t qede_start_xmit(struct sk_buff *skb,
494 struct net_device *ndev)
495{
496 struct qede_dev *edev = netdev_priv(ndev);
497 struct netdev_queue *netdev_txq;
498 struct qede_tx_queue *txq;
499 struct eth_tx_1st_bd *first_bd;
500 struct eth_tx_2nd_bd *second_bd = NULL;
501 struct eth_tx_3rd_bd *third_bd = NULL;
502 struct eth_tx_bd *tx_data_bd = NULL;
503 u16 txq_index;
504 u8 nbd = 0;
505 dma_addr_t mapping;
506 int rc, frag_idx = 0, ipv6_ext = 0;
507 u8 xmit_type;
508 u16 idx;
509 u16 hlen;
810810ff 510 bool data_split = false;
2950219d
YM		 511
512 /* Get tx-queue context and netdev index */
513 txq_index = skb_get_queue_mapping(skb);
514 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
515 txq = QEDE_TX_QUEUE(edev, txq_index);
516 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
517
2950219d
YM		 518 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
519 (MAX_SKB_FRAGS + 1));
520
521 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
522
b1199b10
YM		 523#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
524 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
525 if (skb_linearize(skb)) {
526 DP_NOTICE(edev,
527 "SKB linearization failed - silently dropping this SKB\n");
528 dev_kfree_skb_any(skb);
529 return NETDEV_TX_OK;
530 }
531 }
532#endif
533
2950219d
YM		 534 /* Fill the entry in the SW ring and the BDs in the FW ring */
535 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
536 txq->sw_tx_ring[idx].skb = skb;
537 first_bd = (struct eth_tx_1st_bd *)
538 qed_chain_produce(&txq->tx_pbl);
539 memset(first_bd, 0, sizeof(*first_bd));
540 first_bd->data.bd_flags.bitfields =
541 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
542
543 /* Map skb linear data for DMA and set in the first BD */
544 mapping = dma_map_single(&edev->pdev->dev, skb->data,
545 skb_headlen(skb), DMA_TO_DEVICE);
546 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
547 DP_NOTICE(edev, "SKB mapping failed\n");
548 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
549 return NETDEV_TX_OK;
550 }
551 nbd++;
552 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
553
554 /* In case there is IPv6 with extension headers or LSO we need 2nd and
555 * 3rd BDs.
556 */
557 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
558 second_bd = (struct eth_tx_2nd_bd *)
559 qed_chain_produce(&txq->tx_pbl);
560 memset(second_bd, 0, sizeof(*second_bd));
561
562 nbd++;
563 third_bd = (struct eth_tx_3rd_bd *)
564 qed_chain_produce(&txq->tx_pbl);
565 memset(third_bd, 0, sizeof(*third_bd));
566
567 nbd++;
568 /* We need to fill in additional data in second_bd... */
569 tx_data_bd = (struct eth_tx_bd *)second_bd;
570 }
571
572 if (skb_vlan_tag_present(skb)) {
573 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
574 first_bd->data.bd_flags.bitfields |=
575 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
576 }
577
578 /* Fill the parsing flags & params according to the requested offload */
579 if (xmit_type & XMIT_L4_CSUM) {
580 /* We don't re-calculate IP checksum as it is already done by
581 * the upper stack
582 */
583 first_bd->data.bd_flags.bitfields |=
584 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
585
14db81de
MC		 586 if (xmit_type & XMIT_ENC) {
587 first_bd->data.bd_flags.bitfields |=
588 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
351a4ded
YM		 589 first_bd->data.bitfields |=
590 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
14db81de 591 }
fc48b7a6 592
2950219d
YM		 593 /* If the packet is IPv6 with extension header, indicate that
594 * to FW and pass few params, since the device cracker doesn't
595 * support parsing IPv6 with extension header/s.
596 */
597 if (unlikely(ipv6_ext))
598 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
599 }
600
601 if (xmit_type & XMIT_LSO) {
602 first_bd->data.bd_flags.bitfields |=
603 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
604 third_bd->data.lso_mss =
605 cpu_to_le16(skb_shinfo(skb)->gso_size);
606
14db81de
MC		 607 if (unlikely(xmit_type & XMIT_ENC)) {
608 first_bd->data.bd_flags.bitfields |=
609 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
610 hlen = qede_get_skb_hlen(skb, true);
611 } else {
612 first_bd->data.bd_flags.bitfields |=
613 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
614 hlen = qede_get_skb_hlen(skb, false);
615 }
2950219d
YM		 616
617 /* @@@TBD - if will not be removed need to check */
618 third_bd->data.bitfields |=
fc48b7a6 619 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 620
621 /* Make life easier for FW guys who can't deal with header and
622 * data on same BD. If we need to split, use the second bd...
623 */
624 if (unlikely(skb_headlen(skb) > hlen)) {
625 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
626 "TSO split header size is %d (%x:%x)\n",
627 first_bd->nbytes, first_bd->addr.hi,
628 first_bd->addr.lo);
629
630 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
631 le32_to_cpu(first_bd->addr.lo)) +
632 hlen;
633
634 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
635 le16_to_cpu(first_bd->nbytes) -
636 hlen);
637
638 /* this marks the BD as one that has no
639 * individual mapping
640 */
641 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
642
643 first_bd->nbytes = cpu_to_le16(hlen);
644
645 tx_data_bd = (struct eth_tx_bd *)third_bd;
646 data_split = true;
647 }
351a4ded
YM		 648 } else {
649 first_bd->data.bitfields |=
650 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
651 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
2950219d
YM		 652 }
653
654 /* Handle fragmented skb */
655 /* special handle for frags inside 2nd and 3rd bds.. */
656 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
657 rc = map_frag_to_bd(edev,
658 &skb_shinfo(skb)->frags[frag_idx],
659 tx_data_bd);
660 if (rc) {
661 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
662 data_split);
663 return NETDEV_TX_OK;
664 }
665
666 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
667 tx_data_bd = (struct eth_tx_bd *)third_bd;
668 else
669 tx_data_bd = NULL;
670
671 frag_idx++;
672 }
673
674 /* map last frags into 4th, 5th .... */
675 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
676 tx_data_bd = (struct eth_tx_bd *)
677 qed_chain_produce(&txq->tx_pbl);
678
679 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
680
681 rc = map_frag_to_bd(edev,
682 &skb_shinfo(skb)->frags[frag_idx],
683 tx_data_bd);
684 if (rc) {
685 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
686 data_split);
687 return NETDEV_TX_OK;
688 }
689 }
690
691 /* update the first BD with the actual num BDs */
692 first_bd->data.nbds = nbd;
693
694 netdev_tx_sent_queue(netdev_txq, skb->len);
695
696 skb_tx_timestamp(skb);
697
698 /* Advance packet producer only before sending the packet since mapping
699 * of pages may fail.
700 */
701 txq->sw_tx_prod++;
702
703 /* 'next page' entries are counted in the producer value */
704 txq->tx_db.data.bd_prod =
705 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
706
707 /* wmb makes sure that the BDs data is updated before updating the
708 * producer, otherwise FW may read old data from the BDs.
709 */
710 wmb();
711 barrier();
712 writel(txq->tx_db.raw, txq->doorbell_addr);
713
714 /* mmiowb is needed to synchronize doorbell writes from more than one
715 * processor. It guarantees that the write arrives to the device before
716 * the queue lock is released and another start_xmit is called (possibly
717 * on another CPU). Without this barrier, the next doorbell can bypass
718 * this doorbell. This is applicable to IA64/Altix systems.
719 */
720 mmiowb();
721
722 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
723 < (MAX_SKB_FRAGS + 1))) {
724 netif_tx_stop_queue(netdev_txq);
725 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
726 "Stop queue was called\n");
727 /* paired memory barrier is in qede_tx_int(), we have to keep
728 * ordering of set_bit() in netif_tx_stop_queue() and read of
729 * fp->bd_tx_cons
730 */
731 smp_mb();
732
733 if (qed_chain_get_elem_left(&txq->tx_pbl)
734 >= (MAX_SKB_FRAGS + 1) &&
735 (edev->state == QEDE_STATE_OPEN)) {
736 netif_tx_wake_queue(netdev_txq);
737 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
738 "Wake queue was called\n");
739 }
740 }
741
742 return NETDEV_TX_OK;
743}
744
16f46bf0 745int qede_txq_has_work(struct qede_tx_queue *txq)
2950219d
YM		 746{
747 u16 hw_bd_cons;
748
749 /* Tell compiler that consumer and producer can change */
750 barrier();
751 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
752 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
753 return 0;
754
755 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
756}
757
758static int qede_tx_int(struct qede_dev *edev,
759 struct qede_tx_queue *txq)
760{
761 struct netdev_queue *netdev_txq;
762 u16 hw_bd_cons;
763 unsigned int pkts_compl = 0, bytes_compl = 0;
764 int rc;
765
766 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
767
768 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
769 barrier();
770
771 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
772 int len = 0;
773
774 rc = qede_free_tx_pkt(edev, txq, &len);
775 if (rc) {
776 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
777 hw_bd_cons,
778 qed_chain_get_cons_idx(&txq->tx_pbl));
779 break;
780 }
781
782 bytes_compl += len;
783 pkts_compl++;
784 txq->sw_tx_cons++;
785 }
786
787 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
788
789 /* Need to make the tx_bd_cons update visible to start_xmit()
790 * before checking for netif_tx_queue_stopped(). Without the
791 * memory barrier, there is a small possibility that
792 * start_xmit() will miss it and cause the queue to be stopped
793 * forever.
794 * On the other hand we need an rmb() here to ensure the proper
795 * ordering of bit testing in the following
796 * netif_tx_queue_stopped(txq) call.
797 */
798 smp_mb();
799
800 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
801 /* Taking tx_lock is needed to prevent reenabling the queue
802 * while it's empty. This could have happen if rx_action() gets
803 * suspended in qede_tx_int() after the condition before
804 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
805 *
806 * stops the queue->sees fresh tx_bd_cons->releases the queue->
807 * sends some packets consuming the whole queue again->
808 * stops the queue
809 */
810
811 __netif_tx_lock(netdev_txq, smp_processor_id());
812
813 if ((netif_tx_queue_stopped(netdev_txq)) &&
814 (edev->state == QEDE_STATE_OPEN) &&
815 (qed_chain_get_elem_left(&txq->tx_pbl)
816 >= (MAX_SKB_FRAGS + 1))) {
817 netif_tx_wake_queue(netdev_txq);
818 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
819 "Wake queue was called\n");
820 }
821
822 __netif_tx_unlock(netdev_txq);
823 }
824
825 return 0;
826}
827
16f46bf0 828bool qede_has_rx_work(struct qede_rx_queue *rxq)
2950219d
YM		 829{
830 u16 hw_comp_cons, sw_comp_cons;
831
832 /* Tell compiler that status block fields can change */
833 barrier();
834
835 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
836 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
837
838 return hw_comp_cons != sw_comp_cons;
839}
840
841static bool qede_has_tx_work(struct qede_fastpath *fp)
842{
843 u8 tc;
844
845 for (tc = 0; tc < fp->edev->num_tc; tc++)
846 if (qede_txq_has_work(&fp->txqs[tc]))
847 return true;
848 return false;
849}
850
f86af2df
MC		 851static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
852{
853 qed_chain_consume(&rxq->rx_bd_ring);
854 rxq->sw_rx_cons++;
855}
856
fc48b7a6
YM		 857/* This function reuses the buffer(from an offset) from
858 * consumer index to producer index in the bd ring
2950219d 859 */
fc48b7a6
YM		 860static inline void qede_reuse_page(struct qede_dev *edev,
861 struct qede_rx_queue *rxq,
862 struct sw_rx_data *curr_cons)
2950219d 863{
2950219d 864 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 865 struct sw_rx_data *curr_prod;
866 dma_addr_t new_mapping;
2950219d 867
fc48b7a6
YM		 868 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
869 *curr_prod = *curr_cons;
2950219d 870
fc48b7a6
YM		 871 new_mapping = curr_prod->mapping + curr_prod->page_offset;
872
873 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
874 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 875
2950219d 876 rxq->sw_rx_prod++;
fc48b7a6
YM		 877 curr_cons->data = NULL;
878}
879
f86af2df
MC		 880/* In case of allocation failures reuse buffers
881 * from consumer index to produce buffers for firmware
882 */
16f46bf0
SRK		 883void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
884 struct qede_dev *edev, u8 count)
f86af2df
MC		 885{
886 struct sw_rx_data *curr_cons;
887
888 for (; count > 0; count--) {
889 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
890 qede_reuse_page(edev, rxq, curr_cons);
891 qede_rx_bd_ring_consume(rxq);
892 }
893}
894
fc48b7a6
YM		 895static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
896 struct qede_rx_queue *rxq,
897 struct sw_rx_data *curr_cons)
898{
899 /* Move to the next segment in the page */
900 curr_cons->page_offset += rxq->rx_buf_seg_size;
901
902 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 903 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
904 /* Since we failed to allocate new buffer
905 * current buffer can be used again.
906 */
907 curr_cons->page_offset -= rxq->rx_buf_seg_size;
908
fc48b7a6 909 return -ENOMEM;
f86af2df 910 }
fc48b7a6
YM		 911
912 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
913 PAGE_SIZE, DMA_FROM_DEVICE);
914 } else {
915 /* Increment refcount of the page as we don't want
916 * network stack to take the ownership of the page
917 * which can be recycled multiple times by the driver.
918 */
6d061f9f 919 page_ref_inc(curr_cons->data);
fc48b7a6
YM		 920 qede_reuse_page(edev, rxq, curr_cons);
921 }
922
923 return 0;
2950219d
YM		 924}
925
926static inline void qede_update_rx_prod(struct qede_dev *edev,
927 struct qede_rx_queue *rxq)
928{
929 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
930 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
931 struct eth_rx_prod_data rx_prods = {0};
932
933 /* Update producers */
934 rx_prods.bd_prod = cpu_to_le16(bd_prod);
935 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
936
937 /* Make sure that the BD and SGE data is updated before updating the
938 * producers since FW might read the BD/SGE right after the producer
939 * is updated.
940 */
941 wmb();
942
943 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
944 (u32 *)&rx_prods);
945
946 /* mmiowb is needed to synchronize doorbell writes from more than one
947 * processor. It guarantees that the write arrives to the device before
948 * the napi lock is released and another qede_poll is called (possibly
949 * on another CPU). Without this barrier, the next doorbell can bypass
950 * this doorbell. This is applicable to IA64/Altix systems.
951 */
952 mmiowb();
953}
954
955static u32 qede_get_rxhash(struct qede_dev *edev,
956 u8 bitfields,
957 __le32 rss_hash,
958 enum pkt_hash_types *rxhash_type)
959{
960 enum rss_hash_type htype;
961
962 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
963
964 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
965 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
966 (htype == RSS_HASH_TYPE_IPV6)) ?
967 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
968 return le32_to_cpu(rss_hash);
969 }
970 *rxhash_type = PKT_HASH_TYPE_NONE;
971 return 0;
972}
973
974static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
975{
976 skb_checksum_none_assert(skb);
977
978 if (csum_flag & QEDE_CSUM_UNNECESSARY)
979 skb->ip_summed = CHECKSUM_UNNECESSARY;
14db81de
MC		 980
981 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
982 skb->csum_level = 1;
2950219d
YM		 983}
984
985static inline void qede_skb_receive(struct qede_dev *edev,
986 struct qede_fastpath *fp,
987 struct sk_buff *skb,
988 u16 vlan_tag)
989{
990 if (vlan_tag)
991 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
992 vlan_tag);
993
994 napi_gro_receive(&fp->napi, skb);
995}
996
55482edc
MC		 997static void qede_set_gro_params(struct qede_dev *edev,
998 struct sk_buff *skb,
999 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1000{
1001 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1002
1003 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1004 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1005 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1006 else
1007 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1008
1009 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1010 cqe->header_len;
1011}
1012
1013static int qede_fill_frag_skb(struct qede_dev *edev,
1014 struct qede_rx_queue *rxq,
1015 u8 tpa_agg_index,
1016 u16 len_on_bd)
1017{
1018 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1019 NUM_RX_BDS_MAX];
1020 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1021 struct sk_buff *skb = tpa_info->skb;
1022
1023 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1024 goto out;
1025
1026 /* Add one frag and update the appropriate fields in the skb */
1027 skb_fill_page_desc(skb, tpa_info->frag_id++,
1028 current_bd->data, current_bd->page_offset,
1029 len_on_bd);
1030
1031 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 1032 /* Incr page ref count to reuse on allocation failure
1033 * so that it doesn't get freed while freeing SKB.
1034 */
0139aa7b 1035 page_ref_inc(current_bd->data);
55482edc
MC		 1036 goto out;
1037 }
1038
1039 qed_chain_consume(&rxq->rx_bd_ring);
1040 rxq->sw_rx_cons++;
1041
1042 skb->data_len += len_on_bd;
1043 skb->truesize += rxq->rx_buf_seg_size;
1044 skb->len += len_on_bd;
1045
1046 return 0;
1047
1048out:
f86af2df
MC		 1049 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1050 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 1051 return -ENOMEM;
1052}
1053
1054static void qede_tpa_start(struct qede_dev *edev,
1055 struct qede_rx_queue *rxq,
1056 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1057{
1058 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1059 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1060 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1061 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1062 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1063 struct sw_rx_data *sw_rx_data_cons;
1064 struct sw_rx_data *sw_rx_data_prod;
1065 enum pkt_hash_types rxhash_type;
1066 u32 rxhash;
1067
1068 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1069 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1070
1071 /* Use pre-allocated replacement buffer - we can't release the agg.
1072 * start until its over and we don't want to risk allocation failing
1073 * here, so re-allocate when aggregation will be over.
1074 */
09ec8e7f 1075 sw_rx_data_prod->mapping = replace_buf->mapping;
55482edc
MC		 1076
1077 sw_rx_data_prod->data = replace_buf->data;
1078 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1079 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1080 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1081
1082 rxq->sw_rx_prod++;
1083
1084 /* move partial skb from cons to pool (don't unmap yet)
1085 * save mapping, incase we drop the packet later on.
1086 */
1087 tpa_info->start_buf = *sw_rx_data_cons;
1088 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1089 le32_to_cpu(rx_bd_cons->addr.lo));
1090
1091 tpa_info->start_buf_mapping = mapping;
1092 rxq->sw_rx_cons++;
1093
1094 /* set tpa state to start only if we are able to allocate skb
1095 * for this aggregation, otherwise mark as error and aggregation will
1096 * be dropped
1097 */
1098 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1099 le16_to_cpu(cqe->len_on_first_bd));
1100 if (unlikely(!tpa_info->skb)) {
f86af2df 1101 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1102 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1103 goto cons_buf;
55482edc
MC		 1104 }
1105
1106 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1107 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1108
1109 /* Start filling in the aggregation info */
1110 tpa_info->frag_id = 0;
1111 tpa_info->agg_state = QEDE_AGG_STATE_START;
1112
1113 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1114 cqe->rss_hash, &rxhash_type);
1115 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1116 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1117 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1118 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1119 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1120 else
1121 tpa_info->vlan_tag = 0;
1122
1123 /* This is needed in order to enable forwarding support */
1124 qede_set_gro_params(edev, tpa_info->skb, cqe);
1125
f86af2df 1126cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1127 if (likely(cqe->ext_bd_len_list[0]))
1128 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1129 le16_to_cpu(cqe->ext_bd_len_list[0]));
1130
1131 if (unlikely(cqe->ext_bd_len_list[1])) {
1132 DP_ERR(edev,
1133 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1134 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1135 }
1136}
1137
88f09bd5 1138#ifdef CONFIG_INET
55482edc
MC		 1139static void qede_gro_ip_csum(struct sk_buff *skb)
1140{
1141 const struct iphdr *iph = ip_hdr(skb);
1142 struct tcphdr *th;
1143
55482edc
MC		 1144 skb_set_transport_header(skb, sizeof(struct iphdr));
1145 th = tcp_hdr(skb);
1146
1147 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1148 iph->saddr, iph->daddr, 0);
1149
1150 tcp_gro_complete(skb);
1151}
1152
1153static void qede_gro_ipv6_csum(struct sk_buff *skb)
1154{
1155 struct ipv6hdr *iph = ipv6_hdr(skb);
1156 struct tcphdr *th;
1157
55482edc
MC		 1158 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1159 th = tcp_hdr(skb);
1160
1161 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1162 &iph->saddr, &iph->daddr, 0);
1163 tcp_gro_complete(skb);
1164}
88f09bd5 1165#endif
55482edc
MC		 1166
1167static void qede_gro_receive(struct qede_dev *edev,
1168 struct qede_fastpath *fp,
1169 struct sk_buff *skb,
1170 u16 vlan_tag)
1171{
ee2fa8e6
MC		 1172 /* FW can send a single MTU sized packet from gro flow
1173 * due to aggregation timeout/last segment etc. which
1174 * is not expected to be a gro packet. If a skb has zero
1175 * frags then simply push it in the stack as non gso skb.
1176 */
1177 if (unlikely(!skb->data_len)) {
1178 skb_shinfo(skb)->gso_type = 0;
1179 skb_shinfo(skb)->gso_size = 0;
1180 goto send_skb;
1181 }
1182
88f09bd5 1183#ifdef CONFIG_INET
55482edc 1184 if (skb_shinfo(skb)->gso_size) {
aad94c04
MC		 1185 skb_set_network_header(skb, 0);
1186
55482edc
MC		 1187 switch (skb->protocol) {
1188 case htons(ETH_P_IP):
1189 qede_gro_ip_csum(skb);
1190 break;
1191 case htons(ETH_P_IPV6):
1192 qede_gro_ipv6_csum(skb);
1193 break;
1194 default:
1195 DP_ERR(edev,
1196 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1197 ntohs(skb->protocol));
1198 }
1199 }
88f09bd5 1200#endif
ee2fa8e6
MC		 1201
1202send_skb:
55482edc
MC		 1203 skb_record_rx_queue(skb, fp->rss_id);
1204 qede_skb_receive(edev, fp, skb, vlan_tag);
1205}
1206
1207static inline void qede_tpa_cont(struct qede_dev *edev,
1208 struct qede_rx_queue *rxq,
1209 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1210{
1211 int i;
1212
1213 for (i = 0; cqe->len_list[i]; i++)
1214 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1215 le16_to_cpu(cqe->len_list[i]));
1216
1217 if (unlikely(i > 1))
1218 DP_ERR(edev,
1219 "Strange - TPA cont with more than a single len_list entry\n");
1220}
1221
1222static void qede_tpa_end(struct qede_dev *edev,
1223 struct qede_fastpath *fp,
1224 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1225{
1226 struct qede_rx_queue *rxq = fp->rxq;
1227 struct qede_agg_info *tpa_info;
1228 struct sk_buff *skb;
1229 int i;
1230
1231 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1232 skb = tpa_info->skb;
1233
1234 for (i = 0; cqe->len_list[i]; i++)
1235 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1236 le16_to_cpu(cqe->len_list[i]));
1237 if (unlikely(i > 1))
1238 DP_ERR(edev,
1239 "Strange - TPA emd with more than a single len_list entry\n");
1240
1241 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1242 goto err;
1243
1244 /* Sanity */
1245 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1246 DP_ERR(edev,
1247 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1248 cqe->num_of_bds, tpa_info->frag_id);
1249 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1250 DP_ERR(edev,
1251 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1252 le16_to_cpu(cqe->total_packet_len), skb->len);
1253
1254 memcpy(skb->data,
1255 page_address(tpa_info->start_buf.data) +
1256 tpa_info->start_cqe.placement_offset +
1257 tpa_info->start_buf.page_offset,
1258 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1259
1260 /* Recycle [mapped] start buffer for the next replacement */
1261 tpa_info->replace_buf = tpa_info->start_buf;
1262 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1263
1264 /* Finalize the SKB */
1265 skb->protocol = eth_type_trans(skb, edev->ndev);
1266 skb->ip_summed = CHECKSUM_UNNECESSARY;
1267
1268 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1269 * to skb_shinfo(skb)->gso_segs
1270 */
1271 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1272
1273 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1274
1275 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1276
1277 return;
1278err:
1279 /* The BD starting the aggregation is still mapped; Re-use it for
1280 * future aggregations [as replacement buffer]
1281 */
1282 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1283 sizeof(struct sw_rx_data));
1284 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1285 tpa_info->start_buf.data = NULL;
1286 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1287 dev_kfree_skb_any(tpa_info->skb);
1288 tpa_info->skb = NULL;
1289}
1290
14db81de
MC		 1291static bool qede_tunn_exist(u16 flag)
1292{
1293 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1294 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1295}
1296
1297static u8 qede_check_tunn_csum(u16 flag)
1298{
1299 u16 csum_flag = 0;
1300 u8 tcsum = 0;
1301
1302 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1303 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1304 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1305 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1306
1307 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1308 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1309 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1310 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1311 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1312 }
1313
1314 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1315 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1316 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1317 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1318
1319 if (csum_flag & flag)
1320 return QEDE_CSUM_ERROR;
1321
1322 return QEDE_CSUM_UNNECESSARY | tcsum;
1323}
1324
1325static u8 qede_check_notunn_csum(u16 flag)
2950219d
YM		 1326{
1327 u16 csum_flag = 0;
1328 u8 csum = 0;
1329
14db81de
MC		 1330 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1331 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
2950219d
YM		 1332 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1333 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1334 csum = QEDE_CSUM_UNNECESSARY;
1335 }
1336
1337 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1338 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1339
1340 if (csum_flag & flag)
1341 return QEDE_CSUM_ERROR;
1342
1343 return csum;
1344}
1345
14db81de
MC		 1346static u8 qede_check_csum(u16 flag)
1347{
1348 if (!qede_tunn_exist(flag))
1349 return qede_check_notunn_csum(flag);
1350 else
1351 return qede_check_tunn_csum(flag);
1352}
1353
2950219d
YM		 1354static int qede_rx_int(struct qede_fastpath *fp, int budget)
1355{
1356 struct qede_dev *edev = fp->edev;
1357 struct qede_rx_queue *rxq = fp->rxq;
1358
1359 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1360 int rx_pkt = 0;
1361 u8 csum_flag;
1362
1363 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1364 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1365
1366 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1367 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1368 * read before it is written by FW, then FW writes CQE and SB, and then
1369 * the CPU reads the hw_comp_cons, it will use an old CQE.
1370 */
1371 rmb();
1372
1373 /* Loop to complete all indicated BDs */
1374 while (sw_comp_cons != hw_comp_cons) {
1375 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1376 enum pkt_hash_types rxhash_type;
1377 enum eth_rx_cqe_type cqe_type;
1378 struct sw_rx_data *sw_rx_data;
1379 union eth_rx_cqe *cqe;
1380 struct sk_buff *skb;
fc48b7a6
YM		 1381 struct page *data;
1382 __le16 flags;
2950219d
YM		 1383 u16 len, pad;
1384 u32 rx_hash;
2950219d
YM		 1385
1386 /* Get the CQE from the completion ring */
1387 cqe = (union eth_rx_cqe *)
1388 qed_chain_consume(&rxq->rx_comp_ring);
1389 cqe_type = cqe->fast_path_regular.type;
1390
1391 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1392 edev->ops->eth_cqe_completion(
1393 edev->cdev, fp->rss_id,
1394 (struct eth_slow_path_rx_cqe *)cqe);
1395 goto next_cqe;
1396 }
1397
55482edc
MC		 1398 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1399 switch (cqe_type) {
1400 case ETH_RX_CQE_TYPE_TPA_START:
1401 qede_tpa_start(edev, rxq,
1402 &cqe->fast_path_tpa_start);
1403 goto next_cqe;
1404 case ETH_RX_CQE_TYPE_TPA_CONT:
1405 qede_tpa_cont(edev, rxq,
1406 &cqe->fast_path_tpa_cont);
1407 goto next_cqe;
1408 case ETH_RX_CQE_TYPE_TPA_END:
1409 qede_tpa_end(edev, fp,
1410 &cqe->fast_path_tpa_end);
1411 goto next_rx_only;
1412 default:
1413 break;
1414 }
1415 }
1416
2950219d
YM		 1417 /* Get the data from the SW ring */
1418 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1419 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1420 data = sw_rx_data->data;
1421
1422 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1423 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1424 pad = fp_cqe->placement_offset;
fc48b7a6 1425 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1426
fc48b7a6
YM		 1427 /* If this is an error packet then drop it */
1428 parse_flag = le16_to_cpu(flags);
2950219d 1429
fc48b7a6
YM		 1430 csum_flag = qede_check_csum(parse_flag);
1431 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1432 DP_NOTICE(edev,
1433 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1434 sw_comp_cons, parse_flag);
1435 rxq->rx_hw_errors++;
f86af2df
MC		 1436 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1437 goto next_cqe;
fc48b7a6 1438 }
2950219d 1439
fc48b7a6
YM		 1440 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1441 if (unlikely(!skb)) {
2950219d 1442 DP_NOTICE(edev,
fc48b7a6 1443 "Build_skb failed, dropping incoming packet\n");
f86af2df 1444 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1445 rxq->rx_alloc_errors++;
f86af2df 1446 goto next_cqe;
fc48b7a6
YM		 1447 }
1448
1449 /* Copy data into SKB */
1450 if (len + pad <= QEDE_RX_HDR_SIZE) {
1451 memcpy(skb_put(skb, len),
1452 page_address(data) + pad +
1453 sw_rx_data->page_offset, len);
1454 qede_reuse_page(edev, rxq, sw_rx_data);
1455 } else {
1456 struct skb_frag_struct *frag;
1457 unsigned int pull_len;
1458 unsigned char *va;
1459
1460 frag = &skb_shinfo(skb)->frags[0];
1461
1462 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1463 pad + sw_rx_data->page_offset,
1464 len, rxq->rx_buf_seg_size);
1465
1466 va = skb_frag_address(frag);
1467 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1468
1469 /* Align the pull_len to optimize memcpy */
1470 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1471
1472 skb_frag_size_sub(frag, pull_len);
1473 frag->page_offset += pull_len;
1474 skb->data_len -= pull_len;
1475 skb->tail += pull_len;
1476
1477 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1478 sw_rx_data))) {
1479 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1480 /* Incr page ref count to reuse on allocation
1481 * failure so that it doesn't get freed while
1482 * freeing SKB.
1483 */
1484
0139aa7b 1485 page_ref_inc(sw_rx_data->data);
fc48b7a6 1486 rxq->rx_alloc_errors++;
f86af2df
MC		 1487 qede_recycle_rx_bd_ring(rxq, edev,
1488 fp_cqe->bd_num);
1489 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1490 goto next_cqe;
1491 }
2950219d
YM		 1492 }
1493
f86af2df
MC		 1494 qede_rx_bd_ring_consume(rxq);
1495
fc48b7a6
YM		 1496 if (fp_cqe->bd_num != 1) {
1497 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1498 u8 num_frags;
1499
1500 pkt_len -= len;
1501
1502 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1503 num_frags--) {
1504 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1505 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1506 if (unlikely(!cur_size)) {
1507 DP_ERR(edev,
1508 "Still got %d BDs for mapping jumbo, but length became 0\n",
1509 num_frags);
1510 qede_recycle_rx_bd_ring(rxq, edev,
1511 num_frags);
1512 dev_kfree_skb_any(skb);
1513 goto next_cqe;
1514 }
fc48b7a6 1515
f86af2df
MC		 1516 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1517 qede_recycle_rx_bd_ring(rxq, edev,
1518 num_frags);
1519 dev_kfree_skb_any(skb);
fc48b7a6 1520 goto next_cqe;
f86af2df 1521 }
fc48b7a6 1522
fc48b7a6
YM		 1523 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1524 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1525 qede_rx_bd_ring_consume(rxq);
1526
fc48b7a6
YM		 1527 dma_unmap_page(&edev->pdev->dev,
1528 sw_rx_data->mapping,
1529 PAGE_SIZE, DMA_FROM_DEVICE);
1530
1531 skb_fill_page_desc(skb,
1532 skb_shinfo(skb)->nr_frags++,
1533 sw_rx_data->data, 0,
1534 cur_size);
1535
1536 skb->truesize += PAGE_SIZE;
1537 skb->data_len += cur_size;
1538 skb->len += cur_size;
1539 pkt_len -= cur_size;
1540 }
2950219d 1541
f86af2df 1542 if (unlikely(pkt_len))
fc48b7a6
YM		 1543 DP_ERR(edev,
1544 "Mapped all BDs of jumbo, but still have %d bytes\n",
1545 pkt_len);
1546 }
2950219d
YM		 1547
1548 skb->protocol = eth_type_trans(skb, edev->ndev);
1549
1550 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1551 fp_cqe->rss_hash,
1552 &rxhash_type);
1553
1554 skb_set_hash(skb, rx_hash, rxhash_type);
1555
1556 qede_set_skb_csum(skb, csum_flag);
1557
1558 skb_record_rx_queue(skb, fp->rss_id);
1559
1560 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1561next_rx_only:
2950219d
YM		 1562 rx_pkt++;
1563
1564next_cqe: /* don't consume bd rx buffer */
1565 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1566 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1567 /* CR TPA - revisit how to handle budget in TPA perhaps
1568 * increase on "end"
1569 */
1570 if (rx_pkt == budget)
1571 break;
1572 } /* repeat while sw_comp_cons != hw_comp_cons... */
1573
1574 /* Update producers */
1575 qede_update_rx_prod(edev, rxq);
1576
1577 return rx_pkt;
1578}
1579
1580static int qede_poll(struct napi_struct *napi, int budget)
1581{
1582 int work_done = 0;
1583 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1584 napi);
1585 struct qede_dev *edev = fp->edev;
1586
1587 while (1) {
1588 u8 tc;
1589
1590 for (tc = 0; tc < edev->num_tc; tc++)
1591 if (qede_txq_has_work(&fp->txqs[tc]))
1592 qede_tx_int(edev, &fp->txqs[tc]);
1593
1594 if (qede_has_rx_work(fp->rxq)) {
1595 work_done += qede_rx_int(fp, budget - work_done);
1596
1597 /* must not complete if we consumed full budget */
1598 if (work_done >= budget)
1599 break;
1600 }
1601
1602 /* Fall out from the NAPI loop if needed */
1603 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1604 qed_sb_update_sb_idx(fp->sb_info);
1605 /* *_has_*_work() reads the status block,
1606 * thus we need to ensure that status block indices
1607 * have been actually read (qed_sb_update_sb_idx)
1608 * prior to this check (*_has_*_work) so that
1609 * we won't write the "newer" value of the status block
1610 * to HW (if there was a DMA right after
1611 * qede_has_rx_work and if there is no rmb, the memory
1612 * reading (qed_sb_update_sb_idx) may be postponed
1613 * to right before *_ack_sb). In this case there
1614 * will never be another interrupt until there is
1615 * another update of the status block, while there
1616 * is still unhandled work.
1617 */
1618 rmb();
1619
1620 if (!(qede_has_rx_work(fp->rxq) ||
1621 qede_has_tx_work(fp))) {
1622 napi_complete(napi);
1623 /* Update and reenable interrupts */
1624 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1625 1 /*update*/);
1626 break;
1627 }
1628 }
1629 }
1630
1631 return work_done;
1632}
1633
1634static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1635{
1636 struct qede_fastpath *fp = fp_cookie;
1637
1638 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1639
1640 napi_schedule_irqoff(&fp->napi);
1641 return IRQ_HANDLED;
1642}
1643
1644/* -------------------------------------------------------------------------
1645 * END OF FAST-PATH
1646 * -------------------------------------------------------------------------
1647 */
1648
1649static int qede_open(struct net_device *ndev);
1650static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1651static int qede_set_mac_addr(struct net_device *ndev, void *p);
1652static void qede_set_rx_mode(struct net_device *ndev);
1653static void qede_config_rx_mode(struct net_device *ndev);
1654
1655static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1656 enum qed_filter_xcast_params_type opcode,
1657 unsigned char mac[ETH_ALEN])
1658{
1659 struct qed_filter_params filter_cmd;
1660
1661 memset(&filter_cmd, 0, sizeof(filter_cmd));
1662 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1663 filter_cmd.filter.ucast.type = opcode;
1664 filter_cmd.filter.ucast.mac_valid = 1;
1665 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1666
1667 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1668}
1669
7c1bfcad
SRK		 1670static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1671 enum qed_filter_xcast_params_type opcode,
1672 u16 vid)
1673{
1674 struct qed_filter_params filter_cmd;
1675
1676 memset(&filter_cmd, 0, sizeof(filter_cmd));
1677 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1678 filter_cmd.filter.ucast.type = opcode;
1679 filter_cmd.filter.ucast.vlan_valid = 1;
1680 filter_cmd.filter.ucast.vlan = vid;
1681
1682 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1683}
1684
133fac0e
SK		 1685void qede_fill_by_demand_stats(struct qede_dev *edev)
1686{
1687 struct qed_eth_stats stats;
1688
1689 edev->ops->get_vport_stats(edev->cdev, &stats);
1690 edev->stats.no_buff_discards = stats.no_buff_discards;
1691 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1692 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1693 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1694 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1695 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1696 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1697 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1698 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1699
1700 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1701 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1702 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1703 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1704 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1705 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1706 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1707 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1708 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1709 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1710 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1711 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1712
1713 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
d4967cf3
YM		 1714 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1715 edev->stats.rx_128_to_255_byte_packets =
1716 stats.rx_128_to_255_byte_packets;
1717 edev->stats.rx_256_to_511_byte_packets =
1718 stats.rx_256_to_511_byte_packets;
1719 edev->stats.rx_512_to_1023_byte_packets =
1720 stats.rx_512_to_1023_byte_packets;
1721 edev->stats.rx_1024_to_1518_byte_packets =
1722 stats.rx_1024_to_1518_byte_packets;
1723 edev->stats.rx_1519_to_1522_byte_packets =
1724 stats.rx_1519_to_1522_byte_packets;
1725 edev->stats.rx_1519_to_2047_byte_packets =
1726 stats.rx_1519_to_2047_byte_packets;
1727 edev->stats.rx_2048_to_4095_byte_packets =
1728 stats.rx_2048_to_4095_byte_packets;
1729 edev->stats.rx_4096_to_9216_byte_packets =
1730 stats.rx_4096_to_9216_byte_packets;
1731 edev->stats.rx_9217_to_16383_byte_packets =
1732 stats.rx_9217_to_16383_byte_packets;
133fac0e
SK		 1733 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1734 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1735 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1736 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1737 edev->stats.rx_align_errors = stats.rx_align_errors;
1738 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1739 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1740 edev->stats.rx_jabbers = stats.rx_jabbers;
1741 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1742 edev->stats.rx_fragments = stats.rx_fragments;
1743 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1744 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1745 edev->stats.tx_128_to_255_byte_packets =
1746 stats.tx_128_to_255_byte_packets;
1747 edev->stats.tx_256_to_511_byte_packets =
1748 stats.tx_256_to_511_byte_packets;
1749 edev->stats.tx_512_to_1023_byte_packets =
1750 stats.tx_512_to_1023_byte_packets;
1751 edev->stats.tx_1024_to_1518_byte_packets =
1752 stats.tx_1024_to_1518_byte_packets;
1753 edev->stats.tx_1519_to_2047_byte_packets =
1754 stats.tx_1519_to_2047_byte_packets;
1755 edev->stats.tx_2048_to_4095_byte_packets =
1756 stats.tx_2048_to_4095_byte_packets;
1757 edev->stats.tx_4096_to_9216_byte_packets =
1758 stats.tx_4096_to_9216_byte_packets;
1759 edev->stats.tx_9217_to_16383_byte_packets =
1760 stats.tx_9217_to_16383_byte_packets;
1761 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1762 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1763 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1764 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1765 edev->stats.brb_truncates = stats.brb_truncates;
1766 edev->stats.brb_discards = stats.brb_discards;
1767 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1768}
1769
1770static struct rtnl_link_stats64 *qede_get_stats64(
1771 struct net_device *dev,
1772 struct rtnl_link_stats64 *stats)
1773{
1774 struct qede_dev *edev = netdev_priv(dev);
1775
1776 qede_fill_by_demand_stats(edev);
1777
1778 stats->rx_packets = edev->stats.rx_ucast_pkts +
1779 edev->stats.rx_mcast_pkts +
1780 edev->stats.rx_bcast_pkts;
1781 stats->tx_packets = edev->stats.tx_ucast_pkts +
1782 edev->stats.tx_mcast_pkts +
1783 edev->stats.tx_bcast_pkts;
1784
1785 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1786 edev->stats.rx_mcast_bytes +
1787 edev->stats.rx_bcast_bytes;
1788
1789 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1790 edev->stats.tx_mcast_bytes +
1791 edev->stats.tx_bcast_bytes;
1792
1793 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1794 stats->multicast = edev->stats.rx_mcast_pkts +
1795 edev->stats.rx_bcast_pkts;
1796
1797 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1798
1799 stats->collisions = edev->stats.tx_total_collisions;
1800 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1801 stats->rx_frame_errors = edev->stats.rx_align_errors;
1802
1803 return stats;
1804}
1805
733def6a 1806#ifdef CONFIG_QED_SRIOV
73390ac9
YM		 1807static int qede_get_vf_config(struct net_device *dev, int vfidx,
1808 struct ifla_vf_info *ivi)
1809{
1810 struct qede_dev *edev = netdev_priv(dev);
1811
1812 if (!edev->ops)
1813 return -EINVAL;
1814
1815 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1816}
1817
733def6a
YM		 1818static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1819 int min_tx_rate, int max_tx_rate)
1820{
1821 struct qede_dev *edev = netdev_priv(dev);
1822
be7b6d64 1823 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
733def6a
YM		 1824 max_tx_rate);
1825}
1826
6ddc7608
YM		 1827static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1828{
1829 struct qede_dev *edev = netdev_priv(dev);
1830
1831 if (!edev->ops)
1832 return -EINVAL;
1833
1834 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1835}
1836
733def6a
YM		 1837static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1838 int link_state)
1839{
1840 struct qede_dev *edev = netdev_priv(dev);
1841
1842 if (!edev->ops)
1843 return -EINVAL;
1844
1845 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1846}
1847#endif
1848
7c1bfcad
SRK		 1849static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1850{
1851 struct qed_update_vport_params params;
1852 int rc;
1853
1854 /* Proceed only if action actually needs to be performed */
1855 if (edev->accept_any_vlan == action)
1856 return;
1857
1858 memset(&params, 0, sizeof(params));
1859
1860 params.vport_id = 0;
1861 params.accept_any_vlan = action;
1862 params.update_accept_any_vlan_flg = 1;
1863
1864 rc = edev->ops->vport_update(edev->cdev, &params);
1865 if (rc) {
1866 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1867 action ? "enable" : "disable");
1868 } else {
1869 DP_INFO(edev, "%s accept-any-vlan\n",
1870 action ? "enabled" : "disabled");
1871 edev->accept_any_vlan = action;
1872 }
1873}
1874
1875static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1876{
1877 struct qede_dev *edev = netdev_priv(dev);
1878 struct qede_vlan *vlan, *tmp;
1879 int rc;
1880
1881 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1882
1883 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1884 if (!vlan) {
1885 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1886 return -ENOMEM;
1887 }
1888 INIT_LIST_HEAD(&vlan->list);
1889 vlan->vid = vid;
1890 vlan->configured = false;
1891
1892 /* Verify vlan isn't already configured */
1893 list_for_each_entry(tmp, &edev->vlan_list, list) {
1894 if (tmp->vid == vlan->vid) {
1895 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1896 "vlan already configured\n");
1897 kfree(vlan);
1898 return -EEXIST;
1899 }
1900 }
1901
1902 /* If interface is down, cache this VLAN ID and return */
1903 if (edev->state != QEDE_STATE_OPEN) {
1904 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1905 "Interface is down, VLAN %d will be configured when interface is up\n",
1906 vid);
1907 if (vid != 0)
1908 edev->non_configured_vlans++;
1909 list_add(&vlan->list, &edev->vlan_list);
1910
1911 return 0;
1912 }
1913
1914 /* Check for the filter limit.
1915 * Note - vlan0 has a reserved filter and can be added without
1916 * worrying about quota
1917 */
1918 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1919 (vlan->vid == 0)) {
1920 rc = qede_set_ucast_rx_vlan(edev,
1921 QED_FILTER_XCAST_TYPE_ADD,
1922 vlan->vid);
1923 if (rc) {
1924 DP_ERR(edev, "Failed to configure VLAN %d\n",
1925 vlan->vid);
1926 kfree(vlan);
1927 return -EINVAL;
1928 }
1929 vlan->configured = true;
1930
1931 /* vlan0 filter isn't consuming out of our quota */
1932 if (vlan->vid != 0)
1933 edev->configured_vlans++;
1934 } else {
1935 /* Out of quota; Activate accept-any-VLAN mode */
1936 if (!edev->non_configured_vlans)
1937 qede_config_accept_any_vlan(edev, true);
1938
1939 edev->non_configured_vlans++;
1940 }
1941
1942 list_add(&vlan->list, &edev->vlan_list);
1943
1944 return 0;
1945}
1946
1947static void qede_del_vlan_from_list(struct qede_dev *edev,
1948 struct qede_vlan *vlan)
1949{
1950 /* vlan0 filter isn't consuming out of our quota */
1951 if (vlan->vid != 0) {
1952 if (vlan->configured)
1953 edev->configured_vlans--;
1954 else
1955 edev->non_configured_vlans--;
1956 }
1957
1958 list_del(&vlan->list);
1959 kfree(vlan);
1960}
1961
1962static int qede_configure_vlan_filters(struct qede_dev *edev)
1963{
1964 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1965 struct qed_dev_eth_info *dev_info;
1966 struct qede_vlan *vlan = NULL;
1967
1968 if (list_empty(&edev->vlan_list))
1969 return 0;
1970
1971 dev_info = &edev->dev_info;
1972
1973 /* Configure non-configured vlans */
1974 list_for_each_entry(vlan, &edev->vlan_list, list) {
1975 if (vlan->configured)
1976 continue;
1977
1978 /* We have used all our credits, now enable accept_any_vlan */
1979 if ((vlan->vid != 0) &&
1980 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1981 accept_any_vlan = 1;
1982 continue;
1983 }
1984
1985 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1986
1987 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1988 vlan->vid);
1989 if (rc) {
1990 DP_ERR(edev, "Failed to configure VLAN %u\n",
1991 vlan->vid);
1992 real_rc = rc;
1993 continue;
1994 }
1995
1996 vlan->configured = true;
1997 /* vlan0 filter doesn't consume our VLAN filter's quota */
1998 if (vlan->vid != 0) {
1999 edev->non_configured_vlans--;
2000 edev->configured_vlans++;
2001 }
2002 }
2003
2004 /* enable accept_any_vlan mode if we have more VLANs than credits,
2005 * or remove accept_any_vlan mode if we've actually removed
2006 * a non-configured vlan, and all remaining vlans are truly configured.
2007 */
2008
2009 if (accept_any_vlan)
2010 qede_config_accept_any_vlan(edev, true);
2011 else if (!edev->non_configured_vlans)
2012 qede_config_accept_any_vlan(edev, false);
2013
2014 return real_rc;
2015}
2016
2017static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2018{
2019 struct qede_dev *edev = netdev_priv(dev);
2020 struct qede_vlan *vlan = NULL;
2021 int rc;
2022
2023 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2024
2025 /* Find whether entry exists */
2026 list_for_each_entry(vlan, &edev->vlan_list, list)
2027 if (vlan->vid == vid)
2028 break;
2029
2030 if (!vlan || (vlan->vid != vid)) {
2031 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2032 "Vlan isn't configured\n");
2033 return 0;
2034 }
2035
2036 if (edev->state != QEDE_STATE_OPEN) {
2037 /* As interface is already down, we don't have a VPORT
2038 * instance to remove vlan filter. So just update vlan list
2039 */
2040 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2041 "Interface is down, removing VLAN from list only\n");
2042 qede_del_vlan_from_list(edev, vlan);
2043 return 0;
2044 }
2045
2046 /* Remove vlan */
2047 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
2048 if (rc) {
2049 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2050 return -EINVAL;
2051 }
2052
2053 qede_del_vlan_from_list(edev, vlan);
2054
2055 /* We have removed a VLAN - try to see if we can
2056 * configure non-configured VLAN from the list.
2057 */
2058 rc = qede_configure_vlan_filters(edev);
2059
2060 return rc;
2061}
2062
2063static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2064{
2065 struct qede_vlan *vlan = NULL;
2066
2067 if (list_empty(&edev->vlan_list))
2068 return;
2069
2070 list_for_each_entry(vlan, &edev->vlan_list, list) {
2071 if (!vlan->configured)
2072 continue;
2073
2074 vlan->configured = false;
2075
2076 /* vlan0 filter isn't consuming out of our quota */
2077 if (vlan->vid != 0) {
2078 edev->non_configured_vlans++;
2079 edev->configured_vlans--;
2080 }
2081
2082 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2083 "marked vlan %d as non-configured\n",
2084 vlan->vid);
2085 }
2086
2087 edev->accept_any_vlan = false;
2088}
2089
ce2b885c
YM		 2090int qede_set_features(struct net_device *dev, netdev_features_t features)
2091{
2092 struct qede_dev *edev = netdev_priv(dev);
2093 netdev_features_t changes = features ^ dev->features;
2094 bool need_reload = false;
2095
2096 /* No action needed if hardware GRO is disabled during driver load */
2097 if (changes & NETIF_F_GRO) {
2098 if (dev->features & NETIF_F_GRO)
2099 need_reload = !edev->gro_disable;
2100 else
2101 need_reload = edev->gro_disable;
2102 }
2103
2104 if (need_reload && netif_running(edev->ndev)) {
2105 dev->features = features;
2106 qede_reload(edev, NULL, NULL);
2107 return 1;
2108 }
2109
2110 return 0;
2111}
2112
b18e170c
MC		 2113#ifdef CONFIG_QEDE_VXLAN
2114static void qede_add_vxlan_port(struct net_device *dev,
2115 sa_family_t sa_family, __be16 port)
2116{
2117 struct qede_dev *edev = netdev_priv(dev);
2118 u16 t_port = ntohs(port);
2119
2120 if (edev->vxlan_dst_port)
2121 return;
2122
2123 edev->vxlan_dst_port = t_port;
2124
2125 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
2126
2127 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2128 schedule_delayed_work(&edev->sp_task, 0);
2129}
2130
2131static void qede_del_vxlan_port(struct net_device *dev,
2132 sa_family_t sa_family, __be16 port)
2133{
2134 struct qede_dev *edev = netdev_priv(dev);
2135 u16 t_port = ntohs(port);
2136
2137 if (t_port != edev->vxlan_dst_port)
2138 return;
2139
2140 edev->vxlan_dst_port = 0;
2141
2142 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
2143
2144 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2145 schedule_delayed_work(&edev->sp_task, 0);
2146}
2147#endif
2148
9a109dd0
MC		 2149#ifdef CONFIG_QEDE_GENEVE
2150static void qede_add_geneve_port(struct net_device *dev,
2151 sa_family_t sa_family, __be16 port)
2152{
2153 struct qede_dev *edev = netdev_priv(dev);
2154 u16 t_port = ntohs(port);
2155
2156 if (edev->geneve_dst_port)
2157 return;
2158
2159 edev->geneve_dst_port = t_port;
2160
2161 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
2162 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2163 schedule_delayed_work(&edev->sp_task, 0);
2164}
2165
2166static void qede_del_geneve_port(struct net_device *dev,
2167 sa_family_t sa_family, __be16 port)
2168{
2169 struct qede_dev *edev = netdev_priv(dev);
2170 u16 t_port = ntohs(port);
2171
2172 if (t_port != edev->geneve_dst_port)
2173 return;
2174
2175 edev->geneve_dst_port = 0;
2176
2177 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
2178 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2179 schedule_delayed_work(&edev->sp_task, 0);
2180}
2181#endif
2182
2950219d
YM		 2183static const struct net_device_ops qede_netdev_ops = {
2184 .ndo_open = qede_open,
2185 .ndo_stop = qede_close,
2186 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 2187 .ndo_set_rx_mode = qede_set_rx_mode,
2188 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 2189 .ndo_validate_addr = eth_validate_addr,
133fac0e 2190 .ndo_change_mtu = qede_change_mtu,
08feecd7 2191#ifdef CONFIG_QED_SRIOV
eff16960 2192 .ndo_set_vf_mac = qede_set_vf_mac,
08feecd7
YM		 2193 .ndo_set_vf_vlan = qede_set_vf_vlan,
2194#endif
7c1bfcad
SRK		 2195 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2196 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
ce2b885c 2197 .ndo_set_features = qede_set_features,
133fac0e 2198 .ndo_get_stats64 = qede_get_stats64,
733def6a
YM		 2199#ifdef CONFIG_QED_SRIOV
2200 .ndo_set_vf_link_state = qede_set_vf_link_state,
6ddc7608 2201 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
73390ac9 2202 .ndo_get_vf_config = qede_get_vf_config,
733def6a
YM		 2203 .ndo_set_vf_rate = qede_set_vf_rate,
2204#endif
b18e170c
MC		 2205#ifdef CONFIG_QEDE_VXLAN
2206 .ndo_add_vxlan_port = qede_add_vxlan_port,
2207 .ndo_del_vxlan_port = qede_del_vxlan_port,
2208#endif
9a109dd0
MC		 2209#ifdef CONFIG_QEDE_GENEVE
2210 .ndo_add_geneve_port = qede_add_geneve_port,
2211 .ndo_del_geneve_port = qede_del_geneve_port,
2212#endif
2950219d
YM		 2213};
2214
e712d52b
YM		 2215/* -------------------------------------------------------------------------
2216 * START OF PROBE / REMOVE
2217 * -------------------------------------------------------------------------
2218 */
2219
2220static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2221 struct pci_dev *pdev,
2222 struct qed_dev_eth_info *info,
2223 u32 dp_module,
2224 u8 dp_level)
2225{
2226 struct net_device *ndev;
2227 struct qede_dev *edev;
2228
2229 ndev = alloc_etherdev_mqs(sizeof(*edev),
2230 info->num_queues,
2231 info->num_queues);
2232 if (!ndev) {
2233 pr_err("etherdev allocation failed\n");
2234 return NULL;
2235 }
2236
2237 edev = netdev_priv(ndev);
2238 edev->ndev = ndev;
2239 edev->cdev = cdev;
2240 edev->pdev = pdev;
2241 edev->dp_module = dp_module;
2242 edev->dp_level = dp_level;
2243 edev->ops = qed_ops;
2950219d
YM		 2244 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2245 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b 2246
e712d52b
YM		 2247 SET_NETDEV_DEV(ndev, &pdev->dev);
2248
133fac0e 2249 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 2250 memcpy(&edev->dev_info, info, sizeof(*info));
2251
2252 edev->num_tc = edev->dev_info.num_tc;
2253
7c1bfcad
SRK		 2254 INIT_LIST_HEAD(&edev->vlan_list);
2255
e712d52b
YM		 2256 return edev;
2257}
2258
2259static void qede_init_ndev(struct qede_dev *edev)
2260{
2261 struct net_device *ndev = edev->ndev;
2262 struct pci_dev *pdev = edev->pdev;
2263 u32 hw_features;
2264
2265 pci_set_drvdata(pdev, ndev);
2266
2267 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2268 ndev->base_addr = ndev->mem_start;
2269 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2270 ndev->irq = edev->dev_info.common.pci_irq;
2271
2272 ndev->watchdog_timeo = TX_TIMEOUT;
2273
2950219d
YM		 2274 ndev->netdev_ops = &qede_netdev_ops;
2275
133fac0e
SK		 2276 qede_set_ethtool_ops(ndev);
2277
e712d52b
YM		 2278 /* user-changeble features */
2279 hw_features = NETIF_F_GRO | NETIF_F_SG |
2280 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2281 NETIF_F_TSO | NETIF_F_TSO6;
2282
14db81de
MC		 2283 /* Encap features*/
2284 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2285 NETIF_F_TSO_ECN;
2286 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2287 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2288 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2289 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2290
e712d52b
YM		 2291 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2292 NETIF_F_HIGHDMA;
2293 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2294 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 2295 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 2296
2297 ndev->hw_features = hw_features;
2298
2299 /* Set network device HW mac */
2300 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2301}
2302
2303/* This function converts from 32b param to two params of level and module
2304 * Input 32b decoding:
2305 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2306 * 'happy' flow, e.g. memory allocation failed.
2307 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2308 * and provide important parameters.
2309 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2310 * module. VERBOSE prints are for tracking the specific flow in low level.
2311 *
2312 * Notice that the level should be that of the lowest required logs.
2313 */
133fac0e 2314void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2315{
2316 *p_dp_level = QED_LEVEL_NOTICE;
2317 *p_dp_module = 0;
2318
2319 if (debug & QED_LOG_VERBOSE_MASK) {
2320 *p_dp_level = QED_LEVEL_VERBOSE;
2321 *p_dp_module = (debug & 0x3FFFFFFF);
2322 } else if (debug & QED_LOG_INFO_MASK) {
2323 *p_dp_level = QED_LEVEL_INFO;
2324 } else if (debug & QED_LOG_NOTICE_MASK) {
2325 *p_dp_level = QED_LEVEL_NOTICE;
2326 }
2327}
2328
2950219d
YM		 2329static void qede_free_fp_array(struct qede_dev *edev)
2330{
2331 if (edev->fp_array) {
2332 struct qede_fastpath *fp;
2333 int i;
2334
2335 for_each_rss(i) {
2336 fp = &edev->fp_array[i];
2337
2338 kfree(fp->sb_info);
2339 kfree(fp->rxq);
2340 kfree(fp->txqs);
2341 }
2342 kfree(edev->fp_array);
2343 }
2344 edev->num_rss = 0;
2345}
2346
2347static int qede_alloc_fp_array(struct qede_dev *edev)
2348{
2349 struct qede_fastpath *fp;
2350 int i;
2351
2352 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2353 sizeof(*edev->fp_array), GFP_KERNEL);
2354 if (!edev->fp_array) {
2355 DP_NOTICE(edev, "fp array allocation failed\n");
2356 goto err;
2357 }
2358
2359 for_each_rss(i) {
2360 fp = &edev->fp_array[i];
2361
2362 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2363 if (!fp->sb_info) {
2364 DP_NOTICE(edev, "sb info struct allocation failed\n");
2365 goto err;
2366 }
2367
2368 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2369 if (!fp->rxq) {
2370 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2371 goto err;
2372 }
2373
2374 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2375 if (!fp->txqs) {
2376 DP_NOTICE(edev, "TXQ array allocation failed\n");
2377 goto err;
2378 }
2379 }
2380
2381 return 0;
2382err:
2383 qede_free_fp_array(edev);
2384 return -ENOMEM;
2385}
2386
0d8e0aa0
SK		 2387static void qede_sp_task(struct work_struct *work)
2388{
2389 struct qede_dev *edev = container_of(work, struct qede_dev,
2390 sp_task.work);
b18e170c
MC		 2391 struct qed_dev *cdev = edev->cdev;
2392
0d8e0aa0
SK		 2393 mutex_lock(&edev->qede_lock);
2394
2395 if (edev->state == QEDE_STATE_OPEN) {
2396 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2397 qede_config_rx_mode(edev->ndev);
2398 }
2399
b18e170c
MC		 2400 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2401 struct qed_tunn_params tunn_params;
2402
2403 memset(&tunn_params, 0, sizeof(tunn_params));
2404 tunn_params.update_vxlan_port = 1;
2405 tunn_params.vxlan_port = edev->vxlan_dst_port;
2406 qed_ops->tunn_config(cdev, &tunn_params);
2407 }
2408
9a109dd0
MC		 2409 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2410 struct qed_tunn_params tunn_params;
2411
2412 memset(&tunn_params, 0, sizeof(tunn_params));
2413 tunn_params.update_geneve_port = 1;
2414 tunn_params.geneve_port = edev->geneve_dst_port;
2415 qed_ops->tunn_config(cdev, &tunn_params);
2416 }
2417
0d8e0aa0
SK		 2418 mutex_unlock(&edev->qede_lock);
2419}
2420
e712d52b
YM		 2421static void qede_update_pf_params(struct qed_dev *cdev)
2422{
2423 struct qed_pf_params pf_params;
2424
8e0ddc04 2425 /* 64 rx + 64 tx */
e712d52b 2426 memset(&pf_params, 0, sizeof(struct qed_pf_params));
8e0ddc04 2427 pf_params.eth_pf_params.num_cons = 128;
e712d52b
YM		 2428 qed_ops->common->update_pf_params(cdev, &pf_params);
2429}
2430
2431enum qede_probe_mode {
2432 QEDE_PROBE_NORMAL,
2433};
2434
2435static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1408cc1f 2436 bool is_vf, enum qede_probe_mode mode)
e712d52b 2437{
1408cc1f 2438 struct qed_probe_params probe_params;
e712d52b
YM		 2439 struct qed_slowpath_params params;
2440 struct qed_dev_eth_info dev_info;
2441 struct qede_dev *edev;
2442 struct qed_dev *cdev;
2443 int rc;
2444
2445 if (unlikely(dp_level & QED_LEVEL_INFO))
2446 pr_notice("Starting qede probe\n");
2447
1408cc1f
YM		 2448 memset(&probe_params, 0, sizeof(probe_params));
2449 probe_params.protocol = QED_PROTOCOL_ETH;
2450 probe_params.dp_module = dp_module;
2451 probe_params.dp_level = dp_level;
2452 probe_params.is_vf = is_vf;
2453 cdev = qed_ops->common->probe(pdev, &probe_params);
e712d52b
YM		 2454 if (!cdev) {
2455 rc = -ENODEV;
2456 goto err0;
2457 }
2458
2459 qede_update_pf_params(cdev);
2460
2461 /* Start the Slowpath-process */
2462 memset(&params, 0, sizeof(struct qed_slowpath_params));
2463 params.int_mode = QED_INT_MODE_MSIX;
2464 params.drv_major = QEDE_MAJOR_VERSION;
2465 params.drv_minor = QEDE_MINOR_VERSION;
2466 params.drv_rev = QEDE_REVISION_VERSION;
2467 params.drv_eng = QEDE_ENGINEERING_VERSION;
2468 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2469 rc = qed_ops->common->slowpath_start(cdev, &params);
2470 if (rc) {
2471 pr_notice("Cannot start slowpath\n");
2472 goto err1;
2473 }
2474
2475 /* Learn information crucial for qede to progress */
2476 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2477 if (rc)
2478 goto err2;
2479
2480 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2481 dp_level);
2482 if (!edev) {
2483 rc = -ENOMEM;
2484 goto err2;
2485 }
2486
fefb0202
YM		 2487 if (is_vf)
2488 edev->flags |= QEDE_FLAG_IS_VF;
2489
e712d52b
YM		 2490 qede_init_ndev(edev);
2491
2950219d
YM		 2492 rc = register_netdev(edev->ndev);
2493 if (rc) {
2494 DP_NOTICE(edev, "Cannot register net-device\n");
2495 goto err3;
2496 }
2497
e712d52b
YM		 2498 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2499
a2ec6172
SK		 2500 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2501
0d8e0aa0
SK		 2502 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2503 mutex_init(&edev->qede_lock);
2504
e712d52b
YM		 2505 DP_INFO(edev, "Ending successfully qede probe\n");
2506
2507 return 0;
2508
2950219d
YM		 2509err3:
2510 free_netdev(edev->ndev);
e712d52b
YM		 2511err2:
2512 qed_ops->common->slowpath_stop(cdev);
2513err1:
2514 qed_ops->common->remove(cdev);
2515err0:
2516 return rc;
2517}
2518
2519static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2520{
fefb0202 2521 bool is_vf = false;
e712d52b
YM		 2522 u32 dp_module = 0;
2523 u8 dp_level = 0;
2524
fefb0202
YM		 2525 switch ((enum qede_pci_private)id->driver_data) {
2526 case QEDE_PRIVATE_VF:
2527 if (debug & QED_LOG_VERBOSE_MASK)
2528 dev_err(&pdev->dev, "Probing a VF\n");
2529 is_vf = true;
2530 break;
2531 default:
2532 if (debug & QED_LOG_VERBOSE_MASK)
2533 dev_err(&pdev->dev, "Probing a PF\n");
2534 }
2535
e712d52b
YM		 2536 qede_config_debug(debug, &dp_module, &dp_level);
2537
fefb0202 2538 return __qede_probe(pdev, dp_module, dp_level, is_vf,
e712d52b
YM		 2539 QEDE_PROBE_NORMAL);
2540}
2541
2542enum qede_remove_mode {
2543 QEDE_REMOVE_NORMAL,
2544};
2545
2546static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2547{
2548 struct net_device *ndev = pci_get_drvdata(pdev);
2549 struct qede_dev *edev = netdev_priv(ndev);
2550 struct qed_dev *cdev = edev->cdev;
2551
2552 DP_INFO(edev, "Starting qede_remove\n");
2553
0d8e0aa0 2554 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2555 unregister_netdev(ndev);
2556
e712d52b
YM		 2557 edev->ops->common->set_power_state(cdev, PCI_D0);
2558
2559 pci_set_drvdata(pdev, NULL);
2560
2561 free_netdev(ndev);
2562
2563 /* Use global ops since we've freed edev */
2564 qed_ops->common->slowpath_stop(cdev);
2565 qed_ops->common->remove(cdev);
2566
2567 pr_notice("Ending successfully qede_remove\n");
2568}
2569
2570static void qede_remove(struct pci_dev *pdev)
2571{
2572 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2573}
2950219d
YM		 2574
2575/* -------------------------------------------------------------------------
2576 * START OF LOAD / UNLOAD
2577 * -------------------------------------------------------------------------
2578 */
2579
2580static int qede_set_num_queues(struct qede_dev *edev)
2581{
2582 int rc;
2583 u16 rss_num;
2584
2585 /* Setup queues according to possible resources*/
8edf049d
SK		 2586 if (edev->req_rss)
2587 rss_num = edev->req_rss;
2588 else
2589 rss_num = netif_get_num_default_rss_queues() *
2590 edev->dev_info.common.num_hwfns;
2950219d
YM		 2591
2592 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2593
2594 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2595 if (rc > 0) {
2596 /* Managed to request interrupts for our queues */
2597 edev->num_rss = rc;
2598 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2599 QEDE_RSS_CNT(edev), rss_num);
2600 rc = 0;
2601 }
2602 return rc;
2603}
2604
2605static void qede_free_mem_sb(struct qede_dev *edev,
2606 struct qed_sb_info *sb_info)
2607{
2608 if (sb_info->sb_virt)
2609 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2610 (void *)sb_info->sb_virt, sb_info->sb_phys);
2611}
2612
2613/* This function allocates fast-path status block memory */
2614static int qede_alloc_mem_sb(struct qede_dev *edev,
2615 struct qed_sb_info *sb_info,
2616 u16 sb_id)
2617{
2618 struct status_block *sb_virt;
2619 dma_addr_t sb_phys;
2620 int rc;
2621
2622 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2623 sizeof(*sb_virt),
2624 &sb_phys, GFP_KERNEL);
2625 if (!sb_virt) {
2626 DP_ERR(edev, "Status block allocation failed\n");
2627 return -ENOMEM;
2628 }
2629
2630 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2631 sb_virt, sb_phys, sb_id,
2632 QED_SB_TYPE_L2_QUEUE);
2633 if (rc) {
2634 DP_ERR(edev, "Status block initialization failed\n");
2635 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2636 sb_virt, sb_phys);
2637 return rc;
2638 }
2639
2640 return 0;
2641}
2642
2643static void qede_free_rx_buffers(struct qede_dev *edev,
2644 struct qede_rx_queue *rxq)
2645{
2646 u16 i;
2647
2648 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2649 struct sw_rx_data *rx_buf;
fc48b7a6 2650 struct page *data;
2950219d
YM		 2651
2652 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2653 data = rx_buf->data;
2654
fc48b7a6
YM		 2655 dma_unmap_page(&edev->pdev->dev,
2656 rx_buf->mapping,
2657 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2658
2659 rx_buf->data = NULL;
fc48b7a6 2660 __free_page(data);
2950219d
YM		 2661 }
2662}
2663
55482edc
MC		 2664static void qede_free_sge_mem(struct qede_dev *edev,
2665 struct qede_rx_queue *rxq) {
2666 int i;
2667
2668 if (edev->gro_disable)
2669 return;
2670
2671 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2672 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2673 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2674
f86af2df 2675 if (replace_buf->data) {
55482edc 2676 dma_unmap_page(&edev->pdev->dev,
09ec8e7f 2677 replace_buf->mapping,
55482edc
MC		 2678 PAGE_SIZE, DMA_FROM_DEVICE);
2679 __free_page(replace_buf->data);
2680 }
2681 }
2682}
2683
2950219d
YM		 2684static void qede_free_mem_rxq(struct qede_dev *edev,
2685 struct qede_rx_queue *rxq)
2686{
55482edc
MC		 2687 qede_free_sge_mem(edev, rxq);
2688
2950219d
YM		 2689 /* Free rx buffers */
2690 qede_free_rx_buffers(edev, rxq);
2691
2692 /* Free the parallel SW ring */
2693 kfree(rxq->sw_rx_ring);
2694
2695 /* Free the real RQ ring used by FW */
2696 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2697 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2698}
2699
2700static int qede_alloc_rx_buffer(struct qede_dev *edev,
2701 struct qede_rx_queue *rxq)
2702{
2703 struct sw_rx_data *sw_rx_data;
2704 struct eth_rx_bd *rx_bd;
2705 dma_addr_t mapping;
fc48b7a6 2706 struct page *data;
2950219d 2707 u16 rx_buf_size;
2950219d
YM		 2708
2709 rx_buf_size = rxq->rx_buf_size;
2710
fc48b7a6 2711 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2712 if (unlikely(!data)) {
fc48b7a6 2713 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2714 return -ENOMEM;
2715 }
2716
fc48b7a6
YM		 2717 /* Map the entire page as it would be used
2718 * for multiple RX buffer segment size mapping.
2719 */
2720 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2721 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2722 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2723 __free_page(data);
2950219d
YM		 2724 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2725 return -ENOMEM;
2726 }
2727
2728 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2729 sw_rx_data->page_offset = 0;
2950219d 2730 sw_rx_data->data = data;
fc48b7a6 2731 sw_rx_data->mapping = mapping;
2950219d
YM		 2732
2733 /* Advance PROD and get BD pointer */
2734 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2735 WARN_ON(!rx_bd);
2736 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2737 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2738
2739 rxq->sw_rx_prod++;
2740
2741 return 0;
2742}
2743
55482edc
MC		 2744static int qede_alloc_sge_mem(struct qede_dev *edev,
2745 struct qede_rx_queue *rxq)
2746{
2747 dma_addr_t mapping;
2748 int i;
2749
2750 if (edev->gro_disable)
2751 return 0;
2752
2753 if (edev->ndev->mtu > PAGE_SIZE) {
2754 edev->gro_disable = 1;
2755 return 0;
2756 }
2757
2758 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2759 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2760 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2761
2762 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2763 if (unlikely(!replace_buf->data)) {
2764 DP_NOTICE(edev,
2765 "Failed to allocate TPA skb pool [replacement buffer]\n");
2766 goto err;
2767 }
2768
2769 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2770 rxq->rx_buf_size, DMA_FROM_DEVICE);
2771 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2772 DP_NOTICE(edev,
2773 "Failed to map TPA replacement buffer\n");
2774 goto err;
2775 }
2776
09ec8e7f 2777 replace_buf->mapping = mapping;
55482edc
MC		 2778 tpa_info->replace_buf.page_offset = 0;
2779
2780 tpa_info->replace_buf_mapping = mapping;
2781 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2782 }
2783
2784 return 0;
2785err:
2786 qede_free_sge_mem(edev, rxq);
2787 edev->gro_disable = 1;
2788 return -ENOMEM;
2789}
2790
2950219d
YM		 2791/* This function allocates all memory needed per Rx queue */
2792static int qede_alloc_mem_rxq(struct qede_dev *edev,
2793 struct qede_rx_queue *rxq)
2794{
f86af2df 2795 int i, rc, size;
2950219d
YM		 2796
2797 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2798
fc48b7a6
YM		 2799 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2800 edev->ndev->mtu;
2801 if (rxq->rx_buf_size > PAGE_SIZE)
2802 rxq->rx_buf_size = PAGE_SIZE;
2803
2804 /* Segment size to spilt a page in multiple equal parts */
2805 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2806
2807 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2808 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2809 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2810 if (!rxq->sw_rx_ring) {
2811 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2812 rc = -ENOMEM;
2950219d
YM		 2813 goto err;
2814 }
2815
2816 /* Allocate FW Rx ring */
2817 rc = edev->ops->common->chain_alloc(edev->cdev,
2818 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2819 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2820 RX_RING_SIZE,
2950219d
YM		 2821 sizeof(struct eth_rx_bd),
2822 &rxq->rx_bd_ring);
2823
2824 if (rc)
2825 goto err;
2826
2827 /* Allocate FW completion ring */
2828 rc = edev->ops->common->chain_alloc(edev->cdev,
2829 QED_CHAIN_USE_TO_CONSUME,
2830 QED_CHAIN_MODE_PBL,
fc48b7a6 2831 RX_RING_SIZE,
2950219d
YM		 2832 sizeof(union eth_rx_cqe),
2833 &rxq->rx_comp_ring);
2834 if (rc)
2835 goto err;
2836
2837 /* Allocate buffers for the Rx ring */
2838 for (i = 0; i < rxq->num_rx_buffers; i++) {
2839 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2840 if (rc) {
2841 DP_ERR(edev,
2842 "Rx buffers allocation failed at index %d\n", i);
2843 goto err;
2844 }
2950219d
YM		 2845 }
2846
f86af2df 2847 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2848err:
f86af2df 2849 return rc;
2950219d
YM		 2850}
2851
2852static void qede_free_mem_txq(struct qede_dev *edev,
2853 struct qede_tx_queue *txq)
2854{
2855 /* Free the parallel SW ring */
2856 kfree(txq->sw_tx_ring);
2857
2858 /* Free the real RQ ring used by FW */
2859 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2860}
2861
2862/* This function allocates all memory needed per Tx queue */
2863static int qede_alloc_mem_txq(struct qede_dev *edev,
2864 struct qede_tx_queue *txq)
2865{
2866 int size, rc;
2867 union eth_tx_bd_types *p_virt;
2868
2869 txq->num_tx_buffers = edev->q_num_tx_buffers;
2870
2871 /* Allocate the parallel driver ring for Tx buffers */
2872 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2873 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2874 if (!txq->sw_tx_ring) {
2875 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2876 goto err;
2877 }
2878
2879 rc = edev->ops->common->chain_alloc(edev->cdev,
2880 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2881 QED_CHAIN_MODE_PBL,
2882 NUM_TX_BDS_MAX,
2883 sizeof(*p_virt),
2884 &txq->tx_pbl);
2885 if (rc)
2886 goto err;
2887
2888 return 0;
2889
2890err:
2891 qede_free_mem_txq(edev, txq);
2892 return -ENOMEM;
2893}
2894
2895/* This function frees all memory of a single fp */
2896static void qede_free_mem_fp(struct qede_dev *edev,
2897 struct qede_fastpath *fp)
2898{
2899 int tc;
2900
2901 qede_free_mem_sb(edev, fp->sb_info);
2902
2903 qede_free_mem_rxq(edev, fp->rxq);
2904
2905 for (tc = 0; tc < edev->num_tc; tc++)
2906 qede_free_mem_txq(edev, &fp->txqs[tc]);
2907}
2908
2909/* This function allocates all memory needed for a single fp (i.e. an entity
2910 * which contains status block, one rx queue and multiple per-TC tx queues.
2911 */
2912static int qede_alloc_mem_fp(struct qede_dev *edev,
2913 struct qede_fastpath *fp)
2914{
2915 int rc, tc;
2916
2917 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2918 if (rc)
2919 goto err;
2920
2921 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2922 if (rc)
2923 goto err;
2924
2925 for (tc = 0; tc < edev->num_tc; tc++) {
2926 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2927 if (rc)
2928 goto err;
2929 }
2930
2931 return 0;
2950219d 2932err:
f86af2df 2933 return rc;
2950219d
YM		 2934}
2935
2936static void qede_free_mem_load(struct qede_dev *edev)
2937{
2938 int i;
2939
2940 for_each_rss(i) {
2941 struct qede_fastpath *fp = &edev->fp_array[i];
2942
2943 qede_free_mem_fp(edev, fp);
2944 }
2945}
2946
2947/* This function allocates all qede memory at NIC load. */
2948static int qede_alloc_mem_load(struct qede_dev *edev)
2949{
2950 int rc = 0, rss_id;
2951
2952 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2953 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2954
2955 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 2956 if (rc) {
2950219d 2957 DP_ERR(edev,
f86af2df
MC		 2958 "Failed to allocate memory for fastpath - rss id = %d\n",
2959 rss_id);
2960 qede_free_mem_load(edev);
2961 return rc;
2950219d 2962 }
2950219d
YM		 2963 }
2964
2965 return 0;
2966}
2967
2968/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2969static void qede_init_fp(struct qede_dev *edev)
2970{
2971 int rss_id, txq_index, tc;
2972 struct qede_fastpath *fp;
2973
2974 for_each_rss(rss_id) {
2975 fp = &edev->fp_array[rss_id];
2976
2977 fp->edev = edev;
2978 fp->rss_id = rss_id;
2979
2980 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2981
2982 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2983
2984 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2985 fp->rxq->rxq_id = rss_id;
2986
2987 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2988 for (tc = 0; tc < edev->num_tc; tc++) {
2989 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2990 fp->txqs[tc].index = txq_index;
2991 }
2992
2993 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2994 edev->ndev->name, rss_id);
2995 }
55482edc
MC		 2996
2997 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2998}
2999
3000static int qede_set_real_num_queues(struct qede_dev *edev)
3001{
3002 int rc = 0;
3003
3004 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3005 if (rc) {
3006 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3007 return rc;
3008 }
3009 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3010 if (rc) {
3011 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3012 return rc;
3013 }
3014
3015 return 0;
3016}
3017
3018static void qede_napi_disable_remove(struct qede_dev *edev)
3019{
3020 int i;
3021
3022 for_each_rss(i) {
3023 napi_disable(&edev->fp_array[i].napi);
3024
3025 netif_napi_del(&edev->fp_array[i].napi);
3026 }
3027}
3028
3029static void qede_napi_add_enable(struct qede_dev *edev)
3030{
3031 int i;
3032
3033 /* Add NAPI objects */
3034 for_each_rss(i) {
3035 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3036 qede_poll, NAPI_POLL_WEIGHT);
3037 napi_enable(&edev->fp_array[i].napi);
3038 }
3039}
3040
3041static void qede_sync_free_irqs(struct qede_dev *edev)
3042{
3043 int i;
3044
3045 for (i = 0; i < edev->int_info.used_cnt; i++) {
3046 if (edev->int_info.msix_cnt) {
3047 synchronize_irq(edev->int_info.msix[i].vector);
3048 free_irq(edev->int_info.msix[i].vector,
3049 &edev->fp_array[i]);
3050 } else {
3051 edev->ops->common->simd_handler_clean(edev->cdev, i);
3052 }
3053 }
3054
3055 edev->int_info.used_cnt = 0;
3056}
3057
3058static int qede_req_msix_irqs(struct qede_dev *edev)
3059{
3060 int i, rc;
3061
3062 /* Sanitize number of interrupts == number of prepared RSS queues */
3063 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3064 DP_ERR(edev,
3065 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3066 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3067 return -EINVAL;
3068 }
3069
3070 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3071 rc = request_irq(edev->int_info.msix[i].vector,
3072 qede_msix_fp_int, 0, edev->fp_array[i].name,
3073 &edev->fp_array[i]);
3074 if (rc) {
3075 DP_ERR(edev, "Request fp %d irq failed\n", i);
3076 qede_sync_free_irqs(edev);
3077 return rc;
3078 }
3079 DP_VERBOSE(edev, NETIF_MSG_INTR,
3080 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3081 edev->fp_array[i].name, i,
3082 &edev->fp_array[i]);
3083 edev->int_info.used_cnt++;
3084 }
3085
3086 return 0;
3087}
3088
3089static void qede_simd_fp_handler(void *cookie)
3090{
3091 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3092
3093 napi_schedule_irqoff(&fp->napi);
3094}
3095
3096static int qede_setup_irqs(struct qede_dev *edev)
3097{
3098 int i, rc = 0;
3099
3100 /* Learn Interrupt configuration */
3101 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3102 if (rc)
3103 return rc;
3104
3105 if (edev->int_info.msix_cnt) {
3106 rc = qede_req_msix_irqs(edev);
3107 if (rc)
3108 return rc;
3109 edev->ndev->irq = edev->int_info.msix[0].vector;
3110 } else {
3111 const struct qed_common_ops *ops;
3112
3113 /* qed should learn receive the RSS ids and callbacks */
3114 ops = edev->ops->common;
3115 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3116 ops->simd_handler_config(edev->cdev,
3117 &edev->fp_array[i], i,
3118 qede_simd_fp_handler);
3119 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3120 }
3121 return 0;
3122}
3123
3124static int qede_drain_txq(struct qede_dev *edev,
3125 struct qede_tx_queue *txq,
3126 bool allow_drain)
3127{
3128 int rc, cnt = 1000;
3129
3130 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3131 if (!cnt) {
3132 if (allow_drain) {
3133 DP_NOTICE(edev,
3134 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3135 txq->index);
3136 rc = edev->ops->common->drain(edev->cdev);
3137 if (rc)
3138 return rc;
3139 return qede_drain_txq(edev, txq, false);
3140 }
3141 DP_NOTICE(edev,
3142 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3143 txq->index, txq->sw_tx_prod,
3144 txq->sw_tx_cons);
3145 return -ENODEV;
3146 }
3147 cnt--;
3148 usleep_range(1000, 2000);
3149 barrier();
3150 }
3151
3152 /* FW finished processing, wait for HW to transmit all tx packets */
3153 usleep_range(1000, 2000);
3154
3155 return 0;
3156}
3157
3158static int qede_stop_queues(struct qede_dev *edev)
3159{
3160 struct qed_update_vport_params vport_update_params;
3161 struct qed_dev *cdev = edev->cdev;
3162 int rc, tc, i;
3163
3164 /* Disable the vport */
3165 memset(&vport_update_params, 0, sizeof(vport_update_params));
3166 vport_update_params.vport_id = 0;
3167 vport_update_params.update_vport_active_flg = 1;
3168 vport_update_params.vport_active_flg = 0;
3169 vport_update_params.update_rss_flg = 0;
3170
3171 rc = edev->ops->vport_update(cdev, &vport_update_params);
3172 if (rc) {
3173 DP_ERR(edev, "Failed to update vport\n");
3174 return rc;
3175 }
3176
3177 /* Flush Tx queues. If needed, request drain from MCP */
3178 for_each_rss(i) {
3179 struct qede_fastpath *fp = &edev->fp_array[i];
3180
3181 for (tc = 0; tc < edev->num_tc; tc++) {
3182 struct qede_tx_queue *txq = &fp->txqs[tc];
3183
3184 rc = qede_drain_txq(edev, txq, true);
3185 if (rc)
3186 return rc;
3187 }
3188 }
3189
3190 /* Stop all Queues in reverse order*/
3191 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3192 struct qed_stop_rxq_params rx_params;
3193
3194 /* Stop the Tx Queue(s)*/
3195 for (tc = 0; tc < edev->num_tc; tc++) {
3196 struct qed_stop_txq_params tx_params;
3197
3198 tx_params.rss_id = i;
3199 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3200 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3201 if (rc) {
3202 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3203 tx_params.tx_queue_id);
3204 return rc;
3205 }
3206 }
3207
3208 /* Stop the Rx Queue*/
3209 memset(&rx_params, 0, sizeof(rx_params));
3210 rx_params.rss_id = i;
3211 rx_params.rx_queue_id = i;
3212
3213 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3214 if (rc) {
3215 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3216 return rc;
3217 }
3218 }
3219
3220 /* Stop the vport */
3221 rc = edev->ops->vport_stop(cdev, 0);
3222 if (rc)
3223 DP_ERR(edev, "Failed to stop VPORT\n");
3224
3225 return rc;
3226}
3227
3228static int qede_start_queues(struct qede_dev *edev)
3229{
3230 int rc, tc, i;
088c8618 3231 int vlan_removal_en = 1;
2950219d 3232 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 3233 struct qed_update_vport_params vport_update_params;
3234 struct qed_queue_start_common_params q_params;
fefb0202 3235 struct qed_dev_info *qed_info = &edev->dev_info.common;
088c8618 3236 struct qed_start_vport_params start = {0};
961acdea 3237 bool reset_rss_indir = false;
2950219d
YM		 3238
3239 if (!edev->num_rss) {
3240 DP_ERR(edev,
3241 "Cannot update V-VPORT as active as there are no Rx queues\n");
3242 return -EINVAL;
3243 }
3244
55482edc 3245 start.gro_enable = !edev->gro_disable;
088c8618
MC		 3246 start.mtu = edev->ndev->mtu;
3247 start.vport_id = 0;
3248 start.drop_ttl0 = true;
3249 start.remove_inner_vlan = vlan_removal_en;
3250
3251 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 3252
3253 if (rc) {
3254 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3255 return rc;
3256 }
3257
3258 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3259 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 3260 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 3261
3262 for_each_rss(i) {
3263 struct qede_fastpath *fp = &edev->fp_array[i];
3264 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3265
3266 memset(&q_params, 0, sizeof(q_params));
3267 q_params.rss_id = i;
3268 q_params.queue_id = i;
3269 q_params.vport_id = 0;
3270 q_params.sb = fp->sb_info->igu_sb_id;
3271 q_params.sb_idx = RX_PI;
3272
3273 rc = edev->ops->q_rx_start(cdev, &q_params,
3274 fp->rxq->rx_buf_size,
3275 fp->rxq->rx_bd_ring.p_phys_addr,
3276 phys_table,
3277 fp->rxq->rx_comp_ring.page_cnt,
3278 &fp->rxq->hw_rxq_prod_addr);
3279 if (rc) {
3280 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3281 return rc;
3282 }
3283
3284 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3285
3286 qede_update_rx_prod(edev, fp->rxq);
3287
3288 for (tc = 0; tc < edev->num_tc; tc++) {
3289 struct qede_tx_queue *txq = &fp->txqs[tc];
3290 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3291
3292 memset(&q_params, 0, sizeof(q_params));
3293 q_params.rss_id = i;
3294 q_params.queue_id = txq_index;
3295 q_params.vport_id = 0;
3296 q_params.sb = fp->sb_info->igu_sb_id;
3297 q_params.sb_idx = TX_PI(tc);
3298
3299 rc = edev->ops->q_tx_start(cdev, &q_params,
3300 txq->tx_pbl.pbl.p_phys_table,
3301 txq->tx_pbl.page_cnt,
3302 &txq->doorbell_addr);
3303 if (rc) {
3304 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3305 txq_index, rc);
3306 return rc;
3307 }
3308
3309 txq->hw_cons_ptr =
3310 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3311 SET_FIELD(txq->tx_db.data.params,
3312 ETH_DB_DATA_DEST, DB_DEST_XCM);
3313 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3314 DB_AGG_CMD_SET);
3315 SET_FIELD(txq->tx_db.data.params,
3316 ETH_DB_DATA_AGG_VAL_SEL,
3317 DQ_XCM_ETH_TX_BD_PROD_CMD);
3318
3319 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3320 }
3321 }
3322
3323 /* Prepare and send the vport enable */
3324 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3325 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3326 vport_update_params.update_vport_active_flg = 1;
3327 vport_update_params.vport_active_flg = 1;
3328
831bfb0e
YM		 3329 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3330 qed_info->tx_switching) {
3331 vport_update_params.update_tx_switching_flg = 1;
3332 vport_update_params.tx_switching_flg = 1;
3333 }
3334
2950219d
YM		 3335 /* Fill struct with RSS params */
3336 if (QEDE_RSS_CNT(edev) > 1) {
3337 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3338
3339 /* Need to validate current RSS config uses valid entries */
3340 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3341 if (edev->rss_params.rss_ind_table[i] >=
3342 edev->num_rss) {
3343 reset_rss_indir = true;
3344 break;
3345 }
3346 }
3347
3348 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3349 reset_rss_indir) {
3350 u16 val;
3351
3352 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3353 u16 indir_val;
3354
3355 val = QEDE_RSS_CNT(edev);
3356 indir_val = ethtool_rxfh_indir_default(i, val);
3357 edev->rss_params.rss_ind_table[i] = indir_val;
3358 }
3359 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3360 }
3361
3362 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3363 netdev_rss_key_fill(edev->rss_params.rss_key,
3364 sizeof(edev->rss_params.rss_key));
3365 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3366 }
3367
3368 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3369 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3370 QED_RSS_IPV6 |
3371 QED_RSS_IPV4_TCP |
3372 QED_RSS_IPV6_TCP;
3373 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3374 }
3375
3376 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3377 sizeof(vport_update_params.rss_params));
2950219d 3378 } else {
961acdea
SRK		 3379 memset(&vport_update_params.rss_params, 0,
3380 sizeof(vport_update_params.rss_params));
2950219d 3381 }
2950219d
YM		 3382
3383 rc = edev->ops->vport_update(cdev, &vport_update_params);
3384 if (rc) {
3385 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3386 return rc;
3387 }
3388
3389 return 0;
3390}
3391
0d8e0aa0
SK		 3392static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3393 enum qed_filter_xcast_params_type opcode,
3394 unsigned char *mac, int num_macs)
3395{
3396 struct qed_filter_params filter_cmd;
3397 int i;
3398
3399 memset(&filter_cmd, 0, sizeof(filter_cmd));
3400 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3401 filter_cmd.filter.mcast.type = opcode;
3402 filter_cmd.filter.mcast.num = num_macs;
3403
3404 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3405 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3406
3407 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3408}
3409
2950219d
YM		 3410enum qede_unload_mode {
3411 QEDE_UNLOAD_NORMAL,
3412};
3413
3414static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3415{
a2ec6172 3416 struct qed_link_params link_params;
2950219d
YM		 3417 int rc;
3418
3419 DP_INFO(edev, "Starting qede unload\n");
3420
0d8e0aa0
SK		 3421 mutex_lock(&edev->qede_lock);
3422 edev->state = QEDE_STATE_CLOSED;
3423
2950219d
YM		 3424 /* Close OS Tx */
3425 netif_tx_disable(edev->ndev);
3426 netif_carrier_off(edev->ndev);
3427
a2ec6172
SK		 3428 /* Reset the link */
3429 memset(&link_params, 0, sizeof(link_params));
3430 link_params.link_up = false;
3431 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3432 rc = qede_stop_queues(edev);
3433 if (rc) {
3434 qede_sync_free_irqs(edev);
3435 goto out;
3436 }
3437
3438 DP_INFO(edev, "Stopped Queues\n");
3439
7c1bfcad 3440 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3441 edev->ops->fastpath_stop(edev->cdev);
3442
3443 /* Release the interrupts */
3444 qede_sync_free_irqs(edev);
3445 edev->ops->common->set_fp_int(edev->cdev, 0);
3446
3447 qede_napi_disable_remove(edev);
3448
3449 qede_free_mem_load(edev);
3450 qede_free_fp_array(edev);
3451
3452out:
3453 mutex_unlock(&edev->qede_lock);
3454 DP_INFO(edev, "Ending qede unload\n");
3455}
3456
3457enum qede_load_mode {
3458 QEDE_LOAD_NORMAL,
3459};
3460
3461static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3462{
a2ec6172
SK		 3463 struct qed_link_params link_params;
3464 struct qed_link_output link_output;
2950219d
YM		 3465 int rc;
3466
3467 DP_INFO(edev, "Starting qede load\n");
3468
3469 rc = qede_set_num_queues(edev);
3470 if (rc)
3471 goto err0;
3472
3473 rc = qede_alloc_fp_array(edev);
3474 if (rc)
3475 goto err0;
3476
3477 qede_init_fp(edev);
3478
3479 rc = qede_alloc_mem_load(edev);
3480 if (rc)
3481 goto err1;
3482 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3483 QEDE_RSS_CNT(edev), edev->num_tc);
3484
3485 rc = qede_set_real_num_queues(edev);
3486 if (rc)
3487 goto err2;
3488
3489 qede_napi_add_enable(edev);
3490 DP_INFO(edev, "Napi added and enabled\n");
3491
3492 rc = qede_setup_irqs(edev);
3493 if (rc)
3494 goto err3;
3495 DP_INFO(edev, "Setup IRQs succeeded\n");
3496
3497 rc = qede_start_queues(edev);
3498 if (rc)
3499 goto err4;
3500 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3501
3502 /* Add primary mac and set Rx filters */
3503 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3504
0d8e0aa0
SK		 3505 mutex_lock(&edev->qede_lock);
3506 edev->state = QEDE_STATE_OPEN;
3507 mutex_unlock(&edev->qede_lock);
a2ec6172 3508
7c1bfcad
SRK		 3509 /* Program un-configured VLANs */
3510 qede_configure_vlan_filters(edev);
3511
a2ec6172
SK		 3512 /* Ask for link-up using current configuration */
3513 memset(&link_params, 0, sizeof(link_params));
3514 link_params.link_up = true;
3515 edev->ops->common->set_link(edev->cdev, &link_params);
3516
3517 /* Query whether link is already-up */
3518 memset(&link_output, 0, sizeof(link_output));
3519 edev->ops->common->get_link(edev->cdev, &link_output);
3520 qede_link_update(edev, &link_output);
3521
2950219d
YM		 3522 DP_INFO(edev, "Ending successfully qede load\n");
3523
3524 return 0;
3525
3526err4:
3527 qede_sync_free_irqs(edev);
3528 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3529err3:
3530 qede_napi_disable_remove(edev);
3531err2:
3532 qede_free_mem_load(edev);
3533err1:
3534 edev->ops->common->set_fp_int(edev->cdev, 0);
3535 qede_free_fp_array(edev);
3536 edev->num_rss = 0;
3537err0:
3538 return rc;
3539}
3540
133fac0e
SK		 3541void qede_reload(struct qede_dev *edev,
3542 void (*func)(struct qede_dev *, union qede_reload_args *),
3543 union qede_reload_args *args)
3544{
3545 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3546 /* Call function handler to update parameters
3547 * needed for function load.
3548 */
3549 if (func)
3550 func(edev, args);
3551
3552 qede_load(edev, QEDE_LOAD_NORMAL);
3553
3554 mutex_lock(&edev->qede_lock);
3555 qede_config_rx_mode(edev->ndev);
3556 mutex_unlock(&edev->qede_lock);
3557}
3558
2950219d
YM		 3559/* called with rtnl_lock */
3560static int qede_open(struct net_device *ndev)
3561{
3562 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3563 int rc;
2950219d
YM		 3564
3565 netif_carrier_off(ndev);
3566
3567 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3568
b18e170c
MC		 3569 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3570
3571 if (rc)
3572 return rc;
3573
3574#ifdef CONFIG_QEDE_VXLAN
3575 vxlan_get_rx_port(ndev);
9a109dd0
MC		 3576#endif
3577#ifdef CONFIG_QEDE_GENEVE
3578 geneve_get_rx_port(ndev);
b18e170c
MC		 3579#endif
3580 return 0;
2950219d
YM		 3581}
3582
3583static int qede_close(struct net_device *ndev)
3584{
3585 struct qede_dev *edev = netdev_priv(ndev);
3586
3587 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3588
3589 return 0;
3590}
0d8e0aa0 3591
a2ec6172
SK		 3592static void qede_link_update(void *dev, struct qed_link_output *link)
3593{
3594 struct qede_dev *edev = dev;
3595
3596 if (!netif_running(edev->ndev)) {
3597 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3598 return;
3599 }
3600
3601 if (link->link_up) {
8e025ae2
YM		 3602 if (!netif_carrier_ok(edev->ndev)) {
3603 DP_NOTICE(edev, "Link is up\n");
3604 netif_tx_start_all_queues(edev->ndev);
3605 netif_carrier_on(edev->ndev);
3606 }
a2ec6172 3607 } else {
8e025ae2
YM		 3608 if (netif_carrier_ok(edev->ndev)) {
3609 DP_NOTICE(edev, "Link is down\n");
3610 netif_tx_disable(edev->ndev);
3611 netif_carrier_off(edev->ndev);
3612 }
a2ec6172
SK		 3613 }
3614}
3615
0d8e0aa0
SK		 3616static int qede_set_mac_addr(struct net_device *ndev, void *p)
3617{
3618 struct qede_dev *edev = netdev_priv(ndev);
3619 struct sockaddr *addr = p;
3620 int rc;
3621
3622 ASSERT_RTNL(); /* @@@TBD To be removed */
3623
3624 DP_INFO(edev, "Set_mac_addr called\n");
3625
3626 if (!is_valid_ether_addr(addr->sa_data)) {
3627 DP_NOTICE(edev, "The MAC address is not valid\n");
3628 return -EFAULT;
3629 }
3630
eff16960
YM		 3631 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3632 DP_NOTICE(edev, "qed prevents setting MAC\n");
3633 return -EINVAL;
3634 }
3635
0d8e0aa0
SK		 3636 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3637
3638 if (!netif_running(ndev)) {
3639 DP_NOTICE(edev, "The device is currently down\n");
3640 return 0;
3641 }
3642
3643 /* Remove the previous primary mac */
3644 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3645 edev->primary_mac);
3646 if (rc)
3647 return rc;
3648
3649 /* Add MAC filter according to the new unicast HW MAC address */
3650 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3651 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3652 edev->primary_mac);
3653}
3654
3655static int
3656qede_configure_mcast_filtering(struct net_device *ndev,
3657 enum qed_filter_rx_mode_type *accept_flags)
3658{
3659 struct qede_dev *edev = netdev_priv(ndev);
3660 unsigned char *mc_macs, *temp;
3661 struct netdev_hw_addr *ha;
3662 int rc = 0, mc_count;
3663 size_t size;
3664
3665 size = 64 * ETH_ALEN;
3666
3667 mc_macs = kzalloc(size, GFP_KERNEL);
3668 if (!mc_macs) {
3669 DP_NOTICE(edev,
3670 "Failed to allocate memory for multicast MACs\n");
3671 rc = -ENOMEM;
3672 goto exit;
3673 }
3674
3675 temp = mc_macs;
3676
3677 /* Remove all previously configured MAC filters */
3678 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3679 mc_macs, 1);
3680 if (rc)
3681 goto exit;
3682
3683 netif_addr_lock_bh(ndev);
3684
3685 mc_count = netdev_mc_count(ndev);
3686 if (mc_count < 64) {
3687 netdev_for_each_mc_addr(ha, ndev) {
3688 ether_addr_copy(temp, ha->addr);
3689 temp += ETH_ALEN;
3690 }
3691 }
3692
3693 netif_addr_unlock_bh(ndev);
3694
3695 /* Check for all multicast @@@TBD resource allocation */
3696 if ((ndev->flags & IFF_ALLMULTI) ||
3697 (mc_count > 64)) {
3698 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3699 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3700 } else {
3701 /* Add all multicast MAC filters */
3702 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3703 mc_macs, mc_count);
3704 }
3705
3706exit:
3707 kfree(mc_macs);
3708 return rc;
3709}
3710
3711static void qede_set_rx_mode(struct net_device *ndev)
3712{
3713 struct qede_dev *edev = netdev_priv(ndev);
3714
3715 DP_INFO(edev, "qede_set_rx_mode called\n");
3716
3717 if (edev->state != QEDE_STATE_OPEN) {
3718 DP_INFO(edev,
3719 "qede_set_rx_mode called while interface is down\n");
3720 } else {
3721 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3722 schedule_delayed_work(&edev->sp_task, 0);
3723 }
3724}
3725
3726/* Must be called with qede_lock held */
3727static void qede_config_rx_mode(struct net_device *ndev)
3728{
3729 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3730 struct qede_dev *edev = netdev_priv(ndev);
3731 struct qed_filter_params rx_mode;
3732 unsigned char *uc_macs, *temp;
3733 struct netdev_hw_addr *ha;
3734 int rc, uc_count;
3735 size_t size;
3736
3737 netif_addr_lock_bh(ndev);
3738
3739 uc_count = netdev_uc_count(ndev);
3740 size = uc_count * ETH_ALEN;
3741
3742 uc_macs = kzalloc(size, GFP_ATOMIC);
3743 if (!uc_macs) {
3744 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3745 netif_addr_unlock_bh(ndev);
3746 return;
3747 }
3748
3749 temp = uc_macs;
3750 netdev_for_each_uc_addr(ha, ndev) {
3751 ether_addr_copy(temp, ha->addr);
3752 temp += ETH_ALEN;
3753 }
3754
3755 netif_addr_unlock_bh(ndev);
3756
3757 /* Configure the struct for the Rx mode */
3758 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3759 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3760
3761 /* Remove all previous unicast secondary macs and multicast macs
3762 * (configrue / leave the primary mac)
3763 */
3764 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3765 edev->primary_mac);
3766 if (rc)
3767 goto out;
3768
3769 /* Check for promiscuous */
3770 if ((ndev->flags & IFF_PROMISC) ||
3771 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3772 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3773 } else {
3774 /* Add MAC filters according to the unicast secondary macs */
3775 int i;
3776
3777 temp = uc_macs;
3778 for (i = 0; i < uc_count; i++) {
3779 rc = qede_set_ucast_rx_mac(edev,
3780 QED_FILTER_XCAST_TYPE_ADD,
3781 temp);
3782 if (rc)
3783 goto out;
3784
3785 temp += ETH_ALEN;
3786 }
3787
3788 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3789 if (rc)
3790 goto out;
3791 }
3792
7c1bfcad
SRK		 3793 /* take care of VLAN mode */
3794 if (ndev->flags & IFF_PROMISC) {
3795 qede_config_accept_any_vlan(edev, true);
3796 } else if (!edev->non_configured_vlans) {
3797 /* It's possible that accept_any_vlan mode is set due to a
3798 * previous setting of IFF_PROMISC. If vlan credits are
3799 * sufficient, disable accept_any_vlan.
3800 */
3801 qede_config_accept_any_vlan(edev, false);
3802 }
3803
0d8e0aa0
SK		 3804 rx_mode.filter.accept_flags = accept_flags;
3805 edev->ops->filter_config(edev->cdev, &rx_mode);
3806out:
3807 kfree(uc_macs);
3808}
Linux kernel - Deliverables
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