projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
nfp: Replace ndo_add/del_vxlan_port with ndo_add/del_udp_enc_port
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
b18e170c 27#ifdef CONFIG_QEDE_VXLAN
e712d52b 28#include <net/vxlan.h>
b18e170c 29#endif
9a109dd0
MC		 30#ifdef CONFIG_QEDE_GENEVE
31#include <net/geneve.h>
32#endif
e712d52b
YM		 33#include <linux/ip.h>
34#include <net/ipv6.h>
35#include <net/tcp.h>
36#include <linux/if_ether.h>
37#include <linux/if_vlan.h>
38#include <linux/pkt_sched.h>
39#include <linux/ethtool.h>
40#include <linux/in.h>
41#include <linux/random.h>
42#include <net/ip6_checksum.h>
43#include <linux/bitops.h>
44
45#include "qede.h"
46
5abd7e92
YM		 47static char version[] =
48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 49
5abd7e92 50MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 51MODULE_LICENSE("GPL");
52MODULE_VERSION(DRV_MODULE_VERSION);
53
54static uint debug;
55module_param(debug, uint, 0);
56MODULE_PARM_DESC(debug, " Default debug msglevel");
57
58static const struct qed_eth_ops *qed_ops;
59
60#define CHIP_NUM_57980S_40 0x1634
0e7441d7 61#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 62#define CHIP_NUM_57980S_MF 0x1636
63#define CHIP_NUM_57980S_100 0x1644
64#define CHIP_NUM_57980S_50 0x1654
65#define CHIP_NUM_57980S_25 0x1656
fefb0202 66#define CHIP_NUM_57980S_IOV 0x1664
e712d52b
YM		 67
68#ifndef PCI_DEVICE_ID_NX2_57980E
69#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
70#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
71#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
72#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
73#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
74#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
fefb0202 75#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
e712d52b
YM		 76#endif
77
fefb0202
YM		 78enum qede_pci_private {
79 QEDE_PRIVATE_PF,
80 QEDE_PRIVATE_VF
81};
82
e712d52b 83static const struct pci_device_id qede_pci_tbl[] = {
fefb0202
YM		 84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
88 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
14b84e86 90#ifdef CONFIG_QED_SRIOV
fefb0202 91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
14b84e86 92#endif
e712d52b
YM		 93 { 0 }
94};
95
96MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
97
98static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
99
100#define TX_TIMEOUT (5 * HZ)
101
102static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 103static int qede_alloc_rx_buffer(struct qede_dev *edev,
104 struct qede_rx_queue *rxq);
a2ec6172 105static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b 106
fefb0202 107#ifdef CONFIG_QED_SRIOV
08feecd7
YM		 108static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
109{
110 struct qede_dev *edev = netdev_priv(ndev);
111
112 if (vlan > 4095) {
113 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
114 return -EINVAL;
115 }
116
117 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
118 vlan, vf);
119
120 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
121}
122
eff16960
YM		 123static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
124{
125 struct qede_dev *edev = netdev_priv(ndev);
126
127 DP_VERBOSE(edev, QED_MSG_IOV,
128 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
129 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
130
131 if (!is_valid_ether_addr(mac)) {
132 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
133 return -EINVAL;
134 }
135
136 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
137}
138
fefb0202
YM		 139static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
140{
141 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
831bfb0e
YM		 142 struct qed_dev_info *qed_info = &edev->dev_info.common;
143 int rc;
fefb0202
YM		 144
145 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
146
831bfb0e
YM		 147 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
148
149 /* Enable/Disable Tx switching for PF */
150 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
151 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
152 struct qed_update_vport_params params;
153
154 memset(&params, 0, sizeof(params));
155 params.vport_id = 0;
156 params.update_tx_switching_flg = 1;
157 params.tx_switching_flg = num_vfs_param ? 1 : 0;
158 edev->ops->vport_update(edev->cdev, &params);
159 }
160
161 return rc;
fefb0202
YM		 162}
163#endif
164
e712d52b
YM		 165static struct pci_driver qede_pci_driver = {
166 .name = "qede",
167 .id_table = qede_pci_tbl,
168 .probe = qede_probe,
169 .remove = qede_remove,
fefb0202
YM		 170#ifdef CONFIG_QED_SRIOV
171 .sriov_configure = qede_sriov_configure,
172#endif
e712d52b
YM		 173};
174
eff16960
YM		 175static void qede_force_mac(void *dev, u8 *mac)
176{
177 struct qede_dev *edev = dev;
178
179 ether_addr_copy(edev->ndev->dev_addr, mac);
180 ether_addr_copy(edev->primary_mac, mac);
181}
182
a2ec6172
SK		 183static struct qed_eth_cb_ops qede_ll_ops = {
184 {
185 .link_update = qede_link_update,
186 },
eff16960 187 .force_mac = qede_force_mac,
a2ec6172
SK		 188};
189
2950219d
YM		 190static int qede_netdev_event(struct notifier_block *this, unsigned long event,
191 void *ptr)
192{
193 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
194 struct ethtool_drvinfo drvinfo;
195 struct qede_dev *edev;
196
197 /* Currently only support name change */
198 if (event != NETDEV_CHANGENAME)
199 goto done;
200
201 /* Check whether this is a qede device */
202 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
203 goto done;
204
205 memset(&drvinfo, 0, sizeof(drvinfo));
206 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
207 if (strcmp(drvinfo.driver, "qede"))
208 goto done;
209 edev = netdev_priv(ndev);
210
211 /* Notify qed of the name change */
212 if (!edev->ops || !edev->ops->common)
213 goto done;
214 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
215 "qede");
216
217done:
218 return NOTIFY_DONE;
219}
220
221static struct notifier_block qede_netdev_notifier = {
222 .notifier_call = qede_netdev_event,
223};
224
e712d52b
YM		 225static
226int __init qede_init(void)
227{
228 int ret;
e712d52b
YM		 229
230 pr_notice("qede_init: %s\n", version);
231
95114344 232 qed_ops = qed_get_eth_ops();
e712d52b
YM		 233 if (!qed_ops) {
234 pr_notice("Failed to get qed ethtool operations\n");
235 return -EINVAL;
236 }
237
2950219d
YM		 238 /* Must register notifier before pci ops, since we might miss
239 * interface rename after pci probe and netdev registeration.
240 */
241 ret = register_netdevice_notifier(&qede_netdev_notifier);
242 if (ret) {
243 pr_notice("Failed to register netdevice_notifier\n");
244 qed_put_eth_ops();
245 return -EINVAL;
246 }
247
e712d52b
YM		 248 ret = pci_register_driver(&qede_pci_driver);
249 if (ret) {
250 pr_notice("Failed to register driver\n");
2950219d 251 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 252 qed_put_eth_ops();
253 return -EINVAL;
254 }
255
256 return 0;
257}
258
259static void __exit qede_cleanup(void)
260{
261 pr_notice("qede_cleanup called\n");
262
2950219d 263 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 264 pci_unregister_driver(&qede_pci_driver);
265 qed_put_eth_ops();
266}
267
268module_init(qede_init);
269module_exit(qede_cleanup);
270
2950219d
YM		 271/* -------------------------------------------------------------------------
272 * START OF FAST-PATH
273 * -------------------------------------------------------------------------
274 */
275
276/* Unmap the data and free skb */
277static int qede_free_tx_pkt(struct qede_dev *edev,
278 struct qede_tx_queue *txq,
279 int *len)
280{
281 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
282 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
283 struct eth_tx_1st_bd *first_bd;
284 struct eth_tx_bd *tx_data_bd;
285 int bds_consumed = 0;
286 int nbds;
287 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
288 int i, split_bd_len = 0;
289
290 if (unlikely(!skb)) {
291 DP_ERR(edev,
292 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
293 idx, txq->sw_tx_cons, txq->sw_tx_prod);
294 return -1;
295 }
296
297 *len = skb->len;
298
299 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
300
301 bds_consumed++;
302
303 nbds = first_bd->data.nbds;
304
305 if (data_split) {
306 struct eth_tx_bd *split = (struct eth_tx_bd *)
307 qed_chain_consume(&txq->tx_pbl);
308 split_bd_len = BD_UNMAP_LEN(split);
309 bds_consumed++;
310 }
311 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
312 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
313
314 /* Unmap the data of the skb frags */
315 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
316 tx_data_bd = (struct eth_tx_bd *)
317 qed_chain_consume(&txq->tx_pbl);
318 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
319 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
320 }
321
322 while (bds_consumed++ < nbds)
323 qed_chain_consume(&txq->tx_pbl);
324
325 /* Free skb */
326 dev_kfree_skb_any(skb);
327 txq->sw_tx_ring[idx].skb = NULL;
328 txq->sw_tx_ring[idx].flags = 0;
329
330 return 0;
331}
332
333/* Unmap the data and free skb when mapping failed during start_xmit */
334static void qede_free_failed_tx_pkt(struct qede_dev *edev,
335 struct qede_tx_queue *txq,
336 struct eth_tx_1st_bd *first_bd,
337 int nbd,
338 bool data_split)
339{
340 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
341 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
342 struct eth_tx_bd *tx_data_bd;
343 int i, split_bd_len = 0;
344
345 /* Return prod to its position before this skb was handled */
346 qed_chain_set_prod(&txq->tx_pbl,
347 le16_to_cpu(txq->tx_db.data.bd_prod),
348 first_bd);
349
350 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
351
352 if (data_split) {
353 struct eth_tx_bd *split = (struct eth_tx_bd *)
354 qed_chain_produce(&txq->tx_pbl);
355 split_bd_len = BD_UNMAP_LEN(split);
356 nbd--;
357 }
358
359 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
360 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
361
362 /* Unmap the data of the skb frags */
363 for (i = 0; i < nbd; i++) {
364 tx_data_bd = (struct eth_tx_bd *)
365 qed_chain_produce(&txq->tx_pbl);
366 if (tx_data_bd->nbytes)
367 dma_unmap_page(&edev->pdev->dev,
368 BD_UNMAP_ADDR(tx_data_bd),
369 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
370 }
371
372 /* Return again prod to its position before this skb was handled */
373 qed_chain_set_prod(&txq->tx_pbl,
374 le16_to_cpu(txq->tx_db.data.bd_prod),
375 first_bd);
376
377 /* Free skb */
378 dev_kfree_skb_any(skb);
379 txq->sw_tx_ring[idx].skb = NULL;
380 txq->sw_tx_ring[idx].flags = 0;
381}
382
383static u32 qede_xmit_type(struct qede_dev *edev,
384 struct sk_buff *skb,
385 int *ipv6_ext)
386{
387 u32 rc = XMIT_L4_CSUM;
388 __be16 l3_proto;
389
390 if (skb->ip_summed != CHECKSUM_PARTIAL)
391 return XMIT_PLAIN;
392
393 l3_proto = vlan_get_protocol(skb);
394 if (l3_proto == htons(ETH_P_IPV6) &&
395 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
396 *ipv6_ext = 1;
397
14db81de
MC		 398 if (skb->encapsulation)
399 rc |= XMIT_ENC;
400
2950219d
YM		 401 if (skb_is_gso(skb))
402 rc |= XMIT_LSO;
403
404 return rc;
405}
406
407static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
408 struct eth_tx_2nd_bd *second_bd,
409 struct eth_tx_3rd_bd *third_bd)
410{
411 u8 l4_proto;
fc48b7a6 412 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 413
fc48b7a6 414 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 415
fc48b7a6 416 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 417 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
418 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
419
fc48b7a6 420 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 421 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
422
423 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
424 l4_proto = ipv6_hdr(skb)->nexthdr;
425 else
426 l4_proto = ip_hdr(skb)->protocol;
427
428 if (l4_proto == IPPROTO_UDP)
fc48b7a6 429 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 430
fc48b7a6 431 if (third_bd)
2950219d 432 third_bd->data.bitfields |=
fc48b7a6
YM		 433 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
434 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
435 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 436
fc48b7a6 437 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 438 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
439}
440
441static int map_frag_to_bd(struct qede_dev *edev,
442 skb_frag_t *frag,
443 struct eth_tx_bd *bd)
444{
445 dma_addr_t mapping;
446
447 /* Map skb non-linear frag data for DMA */
448 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
449 skb_frag_size(frag),
450 DMA_TO_DEVICE);
451 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
452 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
453 return -ENOMEM;
454 }
455
456 /* Setup the data pointer of the frag data */
457 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
458
459 return 0;
460}
461
14db81de
MC		 462static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
463{
464 if (is_encap_pkt)
465 return (skb_inner_transport_header(skb) +
466 inner_tcp_hdrlen(skb) - skb->data);
467 else
468 return (skb_transport_header(skb) +
469 tcp_hdrlen(skb) - skb->data);
470}
471
b1199b10
YM		 472/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
473#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
474static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
475 u8 xmit_type)
476{
477 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
478
479 if (xmit_type & XMIT_LSO) {
480 int hlen;
481
14db81de 482 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
b1199b10
YM		 483
484 /* linear payload would require its own BD */
485 if (skb_headlen(skb) > hlen)
486 allowed_frags--;
487 }
488
489 return (skb_shinfo(skb)->nr_frags > allowed_frags);
490}
491#endif
492
2950219d
YM		 493/* Main transmit function */
494static
495netdev_tx_t qede_start_xmit(struct sk_buff *skb,
496 struct net_device *ndev)
497{
498 struct qede_dev *edev = netdev_priv(ndev);
499 struct netdev_queue *netdev_txq;
500 struct qede_tx_queue *txq;
501 struct eth_tx_1st_bd *first_bd;
502 struct eth_tx_2nd_bd *second_bd = NULL;
503 struct eth_tx_3rd_bd *third_bd = NULL;
504 struct eth_tx_bd *tx_data_bd = NULL;
505 u16 txq_index;
506 u8 nbd = 0;
507 dma_addr_t mapping;
508 int rc, frag_idx = 0, ipv6_ext = 0;
509 u8 xmit_type;
510 u16 idx;
511 u16 hlen;
810810ff 512 bool data_split = false;
2950219d
YM		 513
514 /* Get tx-queue context and netdev index */
515 txq_index = skb_get_queue_mapping(skb);
516 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
517 txq = QEDE_TX_QUEUE(edev, txq_index);
518 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
519
2950219d
YM		 520 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
521 (MAX_SKB_FRAGS + 1));
522
523 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
524
b1199b10
YM		 525#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
526 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
527 if (skb_linearize(skb)) {
528 DP_NOTICE(edev,
529 "SKB linearization failed - silently dropping this SKB\n");
530 dev_kfree_skb_any(skb);
531 return NETDEV_TX_OK;
532 }
533 }
534#endif
535
2950219d
YM		 536 /* Fill the entry in the SW ring and the BDs in the FW ring */
537 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
538 txq->sw_tx_ring[idx].skb = skb;
539 first_bd = (struct eth_tx_1st_bd *)
540 qed_chain_produce(&txq->tx_pbl);
541 memset(first_bd, 0, sizeof(*first_bd));
542 first_bd->data.bd_flags.bitfields =
543 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
544
545 /* Map skb linear data for DMA and set in the first BD */
546 mapping = dma_map_single(&edev->pdev->dev, skb->data,
547 skb_headlen(skb), DMA_TO_DEVICE);
548 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
549 DP_NOTICE(edev, "SKB mapping failed\n");
550 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
551 return NETDEV_TX_OK;
552 }
553 nbd++;
554 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
555
556 /* In case there is IPv6 with extension headers or LSO we need 2nd and
557 * 3rd BDs.
558 */
559 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
560 second_bd = (struct eth_tx_2nd_bd *)
561 qed_chain_produce(&txq->tx_pbl);
562 memset(second_bd, 0, sizeof(*second_bd));
563
564 nbd++;
565 third_bd = (struct eth_tx_3rd_bd *)
566 qed_chain_produce(&txq->tx_pbl);
567 memset(third_bd, 0, sizeof(*third_bd));
568
569 nbd++;
570 /* We need to fill in additional data in second_bd... */
571 tx_data_bd = (struct eth_tx_bd *)second_bd;
572 }
573
574 if (skb_vlan_tag_present(skb)) {
575 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
576 first_bd->data.bd_flags.bitfields |=
577 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
578 }
579
580 /* Fill the parsing flags & params according to the requested offload */
581 if (xmit_type & XMIT_L4_CSUM) {
582 /* We don't re-calculate IP checksum as it is already done by
583 * the upper stack
584 */
585 first_bd->data.bd_flags.bitfields |=
586 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
587
14db81de
MC		 588 if (xmit_type & XMIT_ENC) {
589 first_bd->data.bd_flags.bitfields |=
590 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
351a4ded
YM		 591 first_bd->data.bitfields |=
592 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
14db81de 593 }
fc48b7a6 594
2950219d
YM		 595 /* If the packet is IPv6 with extension header, indicate that
596 * to FW and pass few params, since the device cracker doesn't
597 * support parsing IPv6 with extension header/s.
598 */
599 if (unlikely(ipv6_ext))
600 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
601 }
602
603 if (xmit_type & XMIT_LSO) {
604 first_bd->data.bd_flags.bitfields |=
605 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
606 third_bd->data.lso_mss =
607 cpu_to_le16(skb_shinfo(skb)->gso_size);
608
14db81de
MC		 609 if (unlikely(xmit_type & XMIT_ENC)) {
610 first_bd->data.bd_flags.bitfields |=
611 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
612 hlen = qede_get_skb_hlen(skb, true);
613 } else {
614 first_bd->data.bd_flags.bitfields |=
615 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
616 hlen = qede_get_skb_hlen(skb, false);
617 }
2950219d
YM		 618
619 /* @@@TBD - if will not be removed need to check */
620 third_bd->data.bitfields |=
fc48b7a6 621 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 622
623 /* Make life easier for FW guys who can't deal with header and
624 * data on same BD. If we need to split, use the second bd...
625 */
626 if (unlikely(skb_headlen(skb) > hlen)) {
627 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
628 "TSO split header size is %d (%x:%x)\n",
629 first_bd->nbytes, first_bd->addr.hi,
630 first_bd->addr.lo);
631
632 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
633 le32_to_cpu(first_bd->addr.lo)) +
634 hlen;
635
636 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
637 le16_to_cpu(first_bd->nbytes) -
638 hlen);
639
640 /* this marks the BD as one that has no
641 * individual mapping
642 */
643 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
644
645 first_bd->nbytes = cpu_to_le16(hlen);
646
647 tx_data_bd = (struct eth_tx_bd *)third_bd;
648 data_split = true;
649 }
351a4ded
YM		 650 } else {
651 first_bd->data.bitfields |=
652 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
653 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
2950219d
YM		 654 }
655
656 /* Handle fragmented skb */
657 /* special handle for frags inside 2nd and 3rd bds.. */
658 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
659 rc = map_frag_to_bd(edev,
660 &skb_shinfo(skb)->frags[frag_idx],
661 tx_data_bd);
662 if (rc) {
663 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
664 data_split);
665 return NETDEV_TX_OK;
666 }
667
668 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
669 tx_data_bd = (struct eth_tx_bd *)third_bd;
670 else
671 tx_data_bd = NULL;
672
673 frag_idx++;
674 }
675
676 /* map last frags into 4th, 5th .... */
677 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
678 tx_data_bd = (struct eth_tx_bd *)
679 qed_chain_produce(&txq->tx_pbl);
680
681 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
682
683 rc = map_frag_to_bd(edev,
684 &skb_shinfo(skb)->frags[frag_idx],
685 tx_data_bd);
686 if (rc) {
687 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
688 data_split);
689 return NETDEV_TX_OK;
690 }
691 }
692
693 /* update the first BD with the actual num BDs */
694 first_bd->data.nbds = nbd;
695
696 netdev_tx_sent_queue(netdev_txq, skb->len);
697
698 skb_tx_timestamp(skb);
699
700 /* Advance packet producer only before sending the packet since mapping
701 * of pages may fail.
702 */
703 txq->sw_tx_prod++;
704
705 /* 'next page' entries are counted in the producer value */
706 txq->tx_db.data.bd_prod =
707 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
708
709 /* wmb makes sure that the BDs data is updated before updating the
710 * producer, otherwise FW may read old data from the BDs.
711 */
712 wmb();
713 barrier();
714 writel(txq->tx_db.raw, txq->doorbell_addr);
715
716 /* mmiowb is needed to synchronize doorbell writes from more than one
717 * processor. It guarantees that the write arrives to the device before
718 * the queue lock is released and another start_xmit is called (possibly
719 * on another CPU). Without this barrier, the next doorbell can bypass
720 * this doorbell. This is applicable to IA64/Altix systems.
721 */
722 mmiowb();
723
724 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
725 < (MAX_SKB_FRAGS + 1))) {
726 netif_tx_stop_queue(netdev_txq);
727 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
728 "Stop queue was called\n");
729 /* paired memory barrier is in qede_tx_int(), we have to keep
730 * ordering of set_bit() in netif_tx_stop_queue() and read of
731 * fp->bd_tx_cons
732 */
733 smp_mb();
734
735 if (qed_chain_get_elem_left(&txq->tx_pbl)
736 >= (MAX_SKB_FRAGS + 1) &&
737 (edev->state == QEDE_STATE_OPEN)) {
738 netif_tx_wake_queue(netdev_txq);
739 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
740 "Wake queue was called\n");
741 }
742 }
743
744 return NETDEV_TX_OK;
745}
746
16f46bf0 747int qede_txq_has_work(struct qede_tx_queue *txq)
2950219d
YM		 748{
749 u16 hw_bd_cons;
750
751 /* Tell compiler that consumer and producer can change */
752 barrier();
753 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
754 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
755 return 0;
756
757 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
758}
759
760static int qede_tx_int(struct qede_dev *edev,
761 struct qede_tx_queue *txq)
762{
763 struct netdev_queue *netdev_txq;
764 u16 hw_bd_cons;
765 unsigned int pkts_compl = 0, bytes_compl = 0;
766 int rc;
767
768 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
769
770 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
771 barrier();
772
773 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
774 int len = 0;
775
776 rc = qede_free_tx_pkt(edev, txq, &len);
777 if (rc) {
778 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
779 hw_bd_cons,
780 qed_chain_get_cons_idx(&txq->tx_pbl));
781 break;
782 }
783
784 bytes_compl += len;
785 pkts_compl++;
786 txq->sw_tx_cons++;
787 }
788
789 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
790
791 /* Need to make the tx_bd_cons update visible to start_xmit()
792 * before checking for netif_tx_queue_stopped(). Without the
793 * memory barrier, there is a small possibility that
794 * start_xmit() will miss it and cause the queue to be stopped
795 * forever.
796 * On the other hand we need an rmb() here to ensure the proper
797 * ordering of bit testing in the following
798 * netif_tx_queue_stopped(txq) call.
799 */
800 smp_mb();
801
802 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
803 /* Taking tx_lock is needed to prevent reenabling the queue
804 * while it's empty. This could have happen if rx_action() gets
805 * suspended in qede_tx_int() after the condition before
806 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
807 *
808 * stops the queue->sees fresh tx_bd_cons->releases the queue->
809 * sends some packets consuming the whole queue again->
810 * stops the queue
811 */
812
813 __netif_tx_lock(netdev_txq, smp_processor_id());
814
815 if ((netif_tx_queue_stopped(netdev_txq)) &&
816 (edev->state == QEDE_STATE_OPEN) &&
817 (qed_chain_get_elem_left(&txq->tx_pbl)
818 >= (MAX_SKB_FRAGS + 1))) {
819 netif_tx_wake_queue(netdev_txq);
820 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
821 "Wake queue was called\n");
822 }
823
824 __netif_tx_unlock(netdev_txq);
825 }
826
827 return 0;
828}
829
16f46bf0 830bool qede_has_rx_work(struct qede_rx_queue *rxq)
2950219d
YM		 831{
832 u16 hw_comp_cons, sw_comp_cons;
833
834 /* Tell compiler that status block fields can change */
835 barrier();
836
837 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
838 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
839
840 return hw_comp_cons != sw_comp_cons;
841}
842
843static bool qede_has_tx_work(struct qede_fastpath *fp)
844{
845 u8 tc;
846
847 for (tc = 0; tc < fp->edev->num_tc; tc++)
848 if (qede_txq_has_work(&fp->txqs[tc]))
849 return true;
850 return false;
851}
852
f86af2df
MC		 853static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
854{
855 qed_chain_consume(&rxq->rx_bd_ring);
856 rxq->sw_rx_cons++;
857}
858
fc48b7a6
YM		 859/* This function reuses the buffer(from an offset) from
860 * consumer index to producer index in the bd ring
2950219d 861 */
fc48b7a6
YM		 862static inline void qede_reuse_page(struct qede_dev *edev,
863 struct qede_rx_queue *rxq,
864 struct sw_rx_data *curr_cons)
2950219d 865{
2950219d 866 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 867 struct sw_rx_data *curr_prod;
868 dma_addr_t new_mapping;
2950219d 869
fc48b7a6
YM		 870 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
871 *curr_prod = *curr_cons;
2950219d 872
fc48b7a6
YM		 873 new_mapping = curr_prod->mapping + curr_prod->page_offset;
874
875 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
876 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 877
2950219d 878 rxq->sw_rx_prod++;
fc48b7a6
YM		 879 curr_cons->data = NULL;
880}
881
f86af2df
MC		 882/* In case of allocation failures reuse buffers
883 * from consumer index to produce buffers for firmware
884 */
16f46bf0
SRK		 885void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
886 struct qede_dev *edev, u8 count)
f86af2df
MC		 887{
888 struct sw_rx_data *curr_cons;
889
890 for (; count > 0; count--) {
891 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
892 qede_reuse_page(edev, rxq, curr_cons);
893 qede_rx_bd_ring_consume(rxq);
894 }
895}
896
fc48b7a6
YM		 897static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
898 struct qede_rx_queue *rxq,
899 struct sw_rx_data *curr_cons)
900{
901 /* Move to the next segment in the page */
902 curr_cons->page_offset += rxq->rx_buf_seg_size;
903
904 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 905 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
906 /* Since we failed to allocate new buffer
907 * current buffer can be used again.
908 */
909 curr_cons->page_offset -= rxq->rx_buf_seg_size;
910
fc48b7a6 911 return -ENOMEM;
f86af2df 912 }
fc48b7a6
YM		 913
914 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
915 PAGE_SIZE, DMA_FROM_DEVICE);
916 } else {
917 /* Increment refcount of the page as we don't want
918 * network stack to take the ownership of the page
919 * which can be recycled multiple times by the driver.
920 */
6d061f9f 921 page_ref_inc(curr_cons->data);
fc48b7a6
YM		 922 qede_reuse_page(edev, rxq, curr_cons);
923 }
924
925 return 0;
2950219d
YM		 926}
927
928static inline void qede_update_rx_prod(struct qede_dev *edev,
929 struct qede_rx_queue *rxq)
930{
931 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
932 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
933 struct eth_rx_prod_data rx_prods = {0};
934
935 /* Update producers */
936 rx_prods.bd_prod = cpu_to_le16(bd_prod);
937 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
938
939 /* Make sure that the BD and SGE data is updated before updating the
940 * producers since FW might read the BD/SGE right after the producer
941 * is updated.
942 */
943 wmb();
944
945 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
946 (u32 *)&rx_prods);
947
948 /* mmiowb is needed to synchronize doorbell writes from more than one
949 * processor. It guarantees that the write arrives to the device before
950 * the napi lock is released and another qede_poll is called (possibly
951 * on another CPU). Without this barrier, the next doorbell can bypass
952 * this doorbell. This is applicable to IA64/Altix systems.
953 */
954 mmiowb();
955}
956
957static u32 qede_get_rxhash(struct qede_dev *edev,
958 u8 bitfields,
959 __le32 rss_hash,
960 enum pkt_hash_types *rxhash_type)
961{
962 enum rss_hash_type htype;
963
964 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
965
966 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
967 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
968 (htype == RSS_HASH_TYPE_IPV6)) ?
969 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
970 return le32_to_cpu(rss_hash);
971 }
972 *rxhash_type = PKT_HASH_TYPE_NONE;
973 return 0;
974}
975
976static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
977{
978 skb_checksum_none_assert(skb);
979
980 if (csum_flag & QEDE_CSUM_UNNECESSARY)
981 skb->ip_summed = CHECKSUM_UNNECESSARY;
14db81de
MC		 982
983 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
984 skb->csum_level = 1;
2950219d
YM		 985}
986
987static inline void qede_skb_receive(struct qede_dev *edev,
988 struct qede_fastpath *fp,
989 struct sk_buff *skb,
990 u16 vlan_tag)
991{
992 if (vlan_tag)
993 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
994 vlan_tag);
995
996 napi_gro_receive(&fp->napi, skb);
997}
998
55482edc
MC		 999static void qede_set_gro_params(struct qede_dev *edev,
1000 struct sk_buff *skb,
1001 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1002{
1003 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1004
1005 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1006 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1007 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1008 else
1009 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1010
1011 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1012 cqe->header_len;
1013}
1014
1015static int qede_fill_frag_skb(struct qede_dev *edev,
1016 struct qede_rx_queue *rxq,
1017 u8 tpa_agg_index,
1018 u16 len_on_bd)
1019{
1020 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1021 NUM_RX_BDS_MAX];
1022 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1023 struct sk_buff *skb = tpa_info->skb;
1024
1025 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1026 goto out;
1027
1028 /* Add one frag and update the appropriate fields in the skb */
1029 skb_fill_page_desc(skb, tpa_info->frag_id++,
1030 current_bd->data, current_bd->page_offset,
1031 len_on_bd);
1032
1033 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 1034 /* Incr page ref count to reuse on allocation failure
1035 * so that it doesn't get freed while freeing SKB.
1036 */
0139aa7b 1037 page_ref_inc(current_bd->data);
55482edc
MC		 1038 goto out;
1039 }
1040
1041 qed_chain_consume(&rxq->rx_bd_ring);
1042 rxq->sw_rx_cons++;
1043
1044 skb->data_len += len_on_bd;
1045 skb->truesize += rxq->rx_buf_seg_size;
1046 skb->len += len_on_bd;
1047
1048 return 0;
1049
1050out:
f86af2df
MC		 1051 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1052 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 1053 return -ENOMEM;
1054}
1055
1056static void qede_tpa_start(struct qede_dev *edev,
1057 struct qede_rx_queue *rxq,
1058 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1059{
1060 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1061 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1062 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1063 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1064 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1065 struct sw_rx_data *sw_rx_data_cons;
1066 struct sw_rx_data *sw_rx_data_prod;
1067 enum pkt_hash_types rxhash_type;
1068 u32 rxhash;
1069
1070 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1071 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1072
1073 /* Use pre-allocated replacement buffer - we can't release the agg.
1074 * start until its over and we don't want to risk allocation failing
1075 * here, so re-allocate when aggregation will be over.
1076 */
09ec8e7f 1077 sw_rx_data_prod->mapping = replace_buf->mapping;
55482edc
MC		 1078
1079 sw_rx_data_prod->data = replace_buf->data;
1080 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1081 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1082 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1083
1084 rxq->sw_rx_prod++;
1085
1086 /* move partial skb from cons to pool (don't unmap yet)
1087 * save mapping, incase we drop the packet later on.
1088 */
1089 tpa_info->start_buf = *sw_rx_data_cons;
1090 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1091 le32_to_cpu(rx_bd_cons->addr.lo));
1092
1093 tpa_info->start_buf_mapping = mapping;
1094 rxq->sw_rx_cons++;
1095
1096 /* set tpa state to start only if we are able to allocate skb
1097 * for this aggregation, otherwise mark as error and aggregation will
1098 * be dropped
1099 */
1100 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1101 le16_to_cpu(cqe->len_on_first_bd));
1102 if (unlikely(!tpa_info->skb)) {
f86af2df 1103 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1104 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1105 goto cons_buf;
55482edc
MC		 1106 }
1107
1108 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1109 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1110
1111 /* Start filling in the aggregation info */
1112 tpa_info->frag_id = 0;
1113 tpa_info->agg_state = QEDE_AGG_STATE_START;
1114
1115 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1116 cqe->rss_hash, &rxhash_type);
1117 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1118 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1119 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1120 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1121 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1122 else
1123 tpa_info->vlan_tag = 0;
1124
1125 /* This is needed in order to enable forwarding support */
1126 qede_set_gro_params(edev, tpa_info->skb, cqe);
1127
f86af2df 1128cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1129 if (likely(cqe->ext_bd_len_list[0]))
1130 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1131 le16_to_cpu(cqe->ext_bd_len_list[0]));
1132
1133 if (unlikely(cqe->ext_bd_len_list[1])) {
1134 DP_ERR(edev,
1135 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1136 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1137 }
1138}
1139
88f09bd5 1140#ifdef CONFIG_INET
55482edc
MC		 1141static void qede_gro_ip_csum(struct sk_buff *skb)
1142{
1143 const struct iphdr *iph = ip_hdr(skb);
1144 struct tcphdr *th;
1145
55482edc
MC		 1146 skb_set_transport_header(skb, sizeof(struct iphdr));
1147 th = tcp_hdr(skb);
1148
1149 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1150 iph->saddr, iph->daddr, 0);
1151
1152 tcp_gro_complete(skb);
1153}
1154
1155static void qede_gro_ipv6_csum(struct sk_buff *skb)
1156{
1157 struct ipv6hdr *iph = ipv6_hdr(skb);
1158 struct tcphdr *th;
1159
55482edc
MC		 1160 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1161 th = tcp_hdr(skb);
1162
1163 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1164 &iph->saddr, &iph->daddr, 0);
1165 tcp_gro_complete(skb);
1166}
88f09bd5 1167#endif
55482edc
MC		 1168
1169static void qede_gro_receive(struct qede_dev *edev,
1170 struct qede_fastpath *fp,
1171 struct sk_buff *skb,
1172 u16 vlan_tag)
1173{
ee2fa8e6
MC		 1174 /* FW can send a single MTU sized packet from gro flow
1175 * due to aggregation timeout/last segment etc. which
1176 * is not expected to be a gro packet. If a skb has zero
1177 * frags then simply push it in the stack as non gso skb.
1178 */
1179 if (unlikely(!skb->data_len)) {
1180 skb_shinfo(skb)->gso_type = 0;
1181 skb_shinfo(skb)->gso_size = 0;
1182 goto send_skb;
1183 }
1184
88f09bd5 1185#ifdef CONFIG_INET
55482edc 1186 if (skb_shinfo(skb)->gso_size) {
aad94c04
MC		 1187 skb_set_network_header(skb, 0);
1188
55482edc
MC		 1189 switch (skb->protocol) {
1190 case htons(ETH_P_IP):
1191 qede_gro_ip_csum(skb);
1192 break;
1193 case htons(ETH_P_IPV6):
1194 qede_gro_ipv6_csum(skb);
1195 break;
1196 default:
1197 DP_ERR(edev,
1198 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1199 ntohs(skb->protocol));
1200 }
1201 }
88f09bd5 1202#endif
ee2fa8e6
MC		 1203
1204send_skb:
55482edc
MC		 1205 skb_record_rx_queue(skb, fp->rss_id);
1206 qede_skb_receive(edev, fp, skb, vlan_tag);
1207}
1208
1209static inline void qede_tpa_cont(struct qede_dev *edev,
1210 struct qede_rx_queue *rxq,
1211 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1212{
1213 int i;
1214
1215 for (i = 0; cqe->len_list[i]; i++)
1216 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1217 le16_to_cpu(cqe->len_list[i]));
1218
1219 if (unlikely(i > 1))
1220 DP_ERR(edev,
1221 "Strange - TPA cont with more than a single len_list entry\n");
1222}
1223
1224static void qede_tpa_end(struct qede_dev *edev,
1225 struct qede_fastpath *fp,
1226 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1227{
1228 struct qede_rx_queue *rxq = fp->rxq;
1229 struct qede_agg_info *tpa_info;
1230 struct sk_buff *skb;
1231 int i;
1232
1233 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1234 skb = tpa_info->skb;
1235
1236 for (i = 0; cqe->len_list[i]; i++)
1237 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1238 le16_to_cpu(cqe->len_list[i]));
1239 if (unlikely(i > 1))
1240 DP_ERR(edev,
1241 "Strange - TPA emd with more than a single len_list entry\n");
1242
1243 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1244 goto err;
1245
1246 /* Sanity */
1247 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1248 DP_ERR(edev,
1249 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1250 cqe->num_of_bds, tpa_info->frag_id);
1251 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1252 DP_ERR(edev,
1253 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1254 le16_to_cpu(cqe->total_packet_len), skb->len);
1255
1256 memcpy(skb->data,
1257 page_address(tpa_info->start_buf.data) +
1258 tpa_info->start_cqe.placement_offset +
1259 tpa_info->start_buf.page_offset,
1260 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1261
1262 /* Recycle [mapped] start buffer for the next replacement */
1263 tpa_info->replace_buf = tpa_info->start_buf;
1264 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1265
1266 /* Finalize the SKB */
1267 skb->protocol = eth_type_trans(skb, edev->ndev);
1268 skb->ip_summed = CHECKSUM_UNNECESSARY;
1269
1270 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1271 * to skb_shinfo(skb)->gso_segs
1272 */
1273 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1274
1275 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1276
1277 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1278
1279 return;
1280err:
1281 /* The BD starting the aggregation is still mapped; Re-use it for
1282 * future aggregations [as replacement buffer]
1283 */
1284 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1285 sizeof(struct sw_rx_data));
1286 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1287 tpa_info->start_buf.data = NULL;
1288 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1289 dev_kfree_skb_any(tpa_info->skb);
1290 tpa_info->skb = NULL;
1291}
1292
14db81de
MC		 1293static bool qede_tunn_exist(u16 flag)
1294{
1295 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1296 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1297}
1298
1299static u8 qede_check_tunn_csum(u16 flag)
1300{
1301 u16 csum_flag = 0;
1302 u8 tcsum = 0;
1303
1304 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1305 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1306 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1307 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1308
1309 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1310 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1311 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1312 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1313 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1314 }
1315
1316 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1317 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1318 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1319 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1320
1321 if (csum_flag & flag)
1322 return QEDE_CSUM_ERROR;
1323
1324 return QEDE_CSUM_UNNECESSARY | tcsum;
1325}
1326
1327static u8 qede_check_notunn_csum(u16 flag)
2950219d
YM		 1328{
1329 u16 csum_flag = 0;
1330 u8 csum = 0;
1331
14db81de
MC		 1332 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1333 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
2950219d
YM		 1334 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1335 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1336 csum = QEDE_CSUM_UNNECESSARY;
1337 }
1338
1339 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1340 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1341
1342 if (csum_flag & flag)
1343 return QEDE_CSUM_ERROR;
1344
1345 return csum;
1346}
1347
14db81de
MC		 1348static u8 qede_check_csum(u16 flag)
1349{
1350 if (!qede_tunn_exist(flag))
1351 return qede_check_notunn_csum(flag);
1352 else
1353 return qede_check_tunn_csum(flag);
1354}
1355
2950219d
YM		 1356static int qede_rx_int(struct qede_fastpath *fp, int budget)
1357{
1358 struct qede_dev *edev = fp->edev;
1359 struct qede_rx_queue *rxq = fp->rxq;
1360
1361 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1362 int rx_pkt = 0;
1363 u8 csum_flag;
1364
1365 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1366 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1367
1368 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1369 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1370 * read before it is written by FW, then FW writes CQE and SB, and then
1371 * the CPU reads the hw_comp_cons, it will use an old CQE.
1372 */
1373 rmb();
1374
1375 /* Loop to complete all indicated BDs */
1376 while (sw_comp_cons != hw_comp_cons) {
1377 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1378 enum pkt_hash_types rxhash_type;
1379 enum eth_rx_cqe_type cqe_type;
1380 struct sw_rx_data *sw_rx_data;
1381 union eth_rx_cqe *cqe;
1382 struct sk_buff *skb;
fc48b7a6
YM		 1383 struct page *data;
1384 __le16 flags;
2950219d
YM		 1385 u16 len, pad;
1386 u32 rx_hash;
2950219d
YM		 1387
1388 /* Get the CQE from the completion ring */
1389 cqe = (union eth_rx_cqe *)
1390 qed_chain_consume(&rxq->rx_comp_ring);
1391 cqe_type = cqe->fast_path_regular.type;
1392
1393 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1394 edev->ops->eth_cqe_completion(
1395 edev->cdev, fp->rss_id,
1396 (struct eth_slow_path_rx_cqe *)cqe);
1397 goto next_cqe;
1398 }
1399
55482edc
MC		 1400 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1401 switch (cqe_type) {
1402 case ETH_RX_CQE_TYPE_TPA_START:
1403 qede_tpa_start(edev, rxq,
1404 &cqe->fast_path_tpa_start);
1405 goto next_cqe;
1406 case ETH_RX_CQE_TYPE_TPA_CONT:
1407 qede_tpa_cont(edev, rxq,
1408 &cqe->fast_path_tpa_cont);
1409 goto next_cqe;
1410 case ETH_RX_CQE_TYPE_TPA_END:
1411 qede_tpa_end(edev, fp,
1412 &cqe->fast_path_tpa_end);
1413 goto next_rx_only;
1414 default:
1415 break;
1416 }
1417 }
1418
2950219d
YM		 1419 /* Get the data from the SW ring */
1420 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1421 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1422 data = sw_rx_data->data;
1423
1424 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1425 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1426 pad = fp_cqe->placement_offset;
fc48b7a6 1427 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1428
fc48b7a6
YM		 1429 /* If this is an error packet then drop it */
1430 parse_flag = le16_to_cpu(flags);
2950219d 1431
fc48b7a6
YM		 1432 csum_flag = qede_check_csum(parse_flag);
1433 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1434 DP_NOTICE(edev,
1435 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1436 sw_comp_cons, parse_flag);
1437 rxq->rx_hw_errors++;
f86af2df
MC		 1438 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1439 goto next_cqe;
fc48b7a6 1440 }
2950219d 1441
fc48b7a6
YM		 1442 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1443 if (unlikely(!skb)) {
2950219d 1444 DP_NOTICE(edev,
fc48b7a6 1445 "Build_skb failed, dropping incoming packet\n");
f86af2df 1446 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1447 rxq->rx_alloc_errors++;
f86af2df 1448 goto next_cqe;
fc48b7a6
YM		 1449 }
1450
1451 /* Copy data into SKB */
1452 if (len + pad <= QEDE_RX_HDR_SIZE) {
1453 memcpy(skb_put(skb, len),
1454 page_address(data) + pad +
1455 sw_rx_data->page_offset, len);
1456 qede_reuse_page(edev, rxq, sw_rx_data);
1457 } else {
1458 struct skb_frag_struct *frag;
1459 unsigned int pull_len;
1460 unsigned char *va;
1461
1462 frag = &skb_shinfo(skb)->frags[0];
1463
1464 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1465 pad + sw_rx_data->page_offset,
1466 len, rxq->rx_buf_seg_size);
1467
1468 va = skb_frag_address(frag);
1469 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1470
1471 /* Align the pull_len to optimize memcpy */
1472 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1473
1474 skb_frag_size_sub(frag, pull_len);
1475 frag->page_offset += pull_len;
1476 skb->data_len -= pull_len;
1477 skb->tail += pull_len;
1478
1479 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1480 sw_rx_data))) {
1481 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1482 /* Incr page ref count to reuse on allocation
1483 * failure so that it doesn't get freed while
1484 * freeing SKB.
1485 */
1486
0139aa7b 1487 page_ref_inc(sw_rx_data->data);
fc48b7a6 1488 rxq->rx_alloc_errors++;
f86af2df
MC		 1489 qede_recycle_rx_bd_ring(rxq, edev,
1490 fp_cqe->bd_num);
1491 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1492 goto next_cqe;
1493 }
2950219d
YM		 1494 }
1495
f86af2df
MC		 1496 qede_rx_bd_ring_consume(rxq);
1497
fc48b7a6
YM		 1498 if (fp_cqe->bd_num != 1) {
1499 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1500 u8 num_frags;
1501
1502 pkt_len -= len;
1503
1504 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1505 num_frags--) {
1506 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1507 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1508 if (unlikely(!cur_size)) {
1509 DP_ERR(edev,
1510 "Still got %d BDs for mapping jumbo, but length became 0\n",
1511 num_frags);
1512 qede_recycle_rx_bd_ring(rxq, edev,
1513 num_frags);
1514 dev_kfree_skb_any(skb);
1515 goto next_cqe;
1516 }
fc48b7a6 1517
f86af2df
MC		 1518 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1519 qede_recycle_rx_bd_ring(rxq, edev,
1520 num_frags);
1521 dev_kfree_skb_any(skb);
fc48b7a6 1522 goto next_cqe;
f86af2df 1523 }
fc48b7a6 1524
fc48b7a6
YM		 1525 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1526 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1527 qede_rx_bd_ring_consume(rxq);
1528
fc48b7a6
YM		 1529 dma_unmap_page(&edev->pdev->dev,
1530 sw_rx_data->mapping,
1531 PAGE_SIZE, DMA_FROM_DEVICE);
1532
1533 skb_fill_page_desc(skb,
1534 skb_shinfo(skb)->nr_frags++,
1535 sw_rx_data->data, 0,
1536 cur_size);
1537
1538 skb->truesize += PAGE_SIZE;
1539 skb->data_len += cur_size;
1540 skb->len += cur_size;
1541 pkt_len -= cur_size;
1542 }
2950219d 1543
f86af2df 1544 if (unlikely(pkt_len))
fc48b7a6
YM		 1545 DP_ERR(edev,
1546 "Mapped all BDs of jumbo, but still have %d bytes\n",
1547 pkt_len);
1548 }
2950219d
YM		 1549
1550 skb->protocol = eth_type_trans(skb, edev->ndev);
1551
1552 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1553 fp_cqe->rss_hash,
1554 &rxhash_type);
1555
1556 skb_set_hash(skb, rx_hash, rxhash_type);
1557
1558 qede_set_skb_csum(skb, csum_flag);
1559
1560 skb_record_rx_queue(skb, fp->rss_id);
1561
1562 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1563next_rx_only:
2950219d
YM		 1564 rx_pkt++;
1565
1566next_cqe: /* don't consume bd rx buffer */
1567 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1568 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1569 /* CR TPA - revisit how to handle budget in TPA perhaps
1570 * increase on "end"
1571 */
1572 if (rx_pkt == budget)
1573 break;
1574 } /* repeat while sw_comp_cons != hw_comp_cons... */
1575
1576 /* Update producers */
1577 qede_update_rx_prod(edev, rxq);
1578
1579 return rx_pkt;
1580}
1581
1582static int qede_poll(struct napi_struct *napi, int budget)
1583{
1584 int work_done = 0;
1585 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1586 napi);
1587 struct qede_dev *edev = fp->edev;
1588
1589 while (1) {
1590 u8 tc;
1591
1592 for (tc = 0; tc < edev->num_tc; tc++)
1593 if (qede_txq_has_work(&fp->txqs[tc]))
1594 qede_tx_int(edev, &fp->txqs[tc]);
1595
1596 if (qede_has_rx_work(fp->rxq)) {
1597 work_done += qede_rx_int(fp, budget - work_done);
1598
1599 /* must not complete if we consumed full budget */
1600 if (work_done >= budget)
1601 break;
1602 }
1603
1604 /* Fall out from the NAPI loop if needed */
1605 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1606 qed_sb_update_sb_idx(fp->sb_info);
1607 /* *_has_*_work() reads the status block,
1608 * thus we need to ensure that status block indices
1609 * have been actually read (qed_sb_update_sb_idx)
1610 * prior to this check (*_has_*_work) so that
1611 * we won't write the "newer" value of the status block
1612 * to HW (if there was a DMA right after
1613 * qede_has_rx_work and if there is no rmb, the memory
1614 * reading (qed_sb_update_sb_idx) may be postponed
1615 * to right before *_ack_sb). In this case there
1616 * will never be another interrupt until there is
1617 * another update of the status block, while there
1618 * is still unhandled work.
1619 */
1620 rmb();
1621
1622 if (!(qede_has_rx_work(fp->rxq) ||
1623 qede_has_tx_work(fp))) {
1624 napi_complete(napi);
1625 /* Update and reenable interrupts */
1626 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1627 1 /*update*/);
1628 break;
1629 }
1630 }
1631 }
1632
1633 return work_done;
1634}
1635
1636static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1637{
1638 struct qede_fastpath *fp = fp_cookie;
1639
1640 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1641
1642 napi_schedule_irqoff(&fp->napi);
1643 return IRQ_HANDLED;
1644}
1645
1646/* -------------------------------------------------------------------------
1647 * END OF FAST-PATH
1648 * -------------------------------------------------------------------------
1649 */
1650
1651static int qede_open(struct net_device *ndev);
1652static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1653static int qede_set_mac_addr(struct net_device *ndev, void *p);
1654static void qede_set_rx_mode(struct net_device *ndev);
1655static void qede_config_rx_mode(struct net_device *ndev);
1656
1657static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1658 enum qed_filter_xcast_params_type opcode,
1659 unsigned char mac[ETH_ALEN])
1660{
1661 struct qed_filter_params filter_cmd;
1662
1663 memset(&filter_cmd, 0, sizeof(filter_cmd));
1664 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1665 filter_cmd.filter.ucast.type = opcode;
1666 filter_cmd.filter.ucast.mac_valid = 1;
1667 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1668
1669 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1670}
1671
7c1bfcad
SRK		 1672static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1673 enum qed_filter_xcast_params_type opcode,
1674 u16 vid)
1675{
1676 struct qed_filter_params filter_cmd;
1677
1678 memset(&filter_cmd, 0, sizeof(filter_cmd));
1679 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1680 filter_cmd.filter.ucast.type = opcode;
1681 filter_cmd.filter.ucast.vlan_valid = 1;
1682 filter_cmd.filter.ucast.vlan = vid;
1683
1684 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1685}
1686
133fac0e
SK		 1687void qede_fill_by_demand_stats(struct qede_dev *edev)
1688{
1689 struct qed_eth_stats stats;
1690
1691 edev->ops->get_vport_stats(edev->cdev, &stats);
1692 edev->stats.no_buff_discards = stats.no_buff_discards;
1693 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1694 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1695 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1696 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1697 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1698 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1699 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1700 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1701
1702 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1703 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1704 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1705 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1706 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1707 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1708 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1709 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1710 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1711 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1712 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1713 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1714
1715 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
d4967cf3
YM		 1716 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1717 edev->stats.rx_128_to_255_byte_packets =
1718 stats.rx_128_to_255_byte_packets;
1719 edev->stats.rx_256_to_511_byte_packets =
1720 stats.rx_256_to_511_byte_packets;
1721 edev->stats.rx_512_to_1023_byte_packets =
1722 stats.rx_512_to_1023_byte_packets;
1723 edev->stats.rx_1024_to_1518_byte_packets =
1724 stats.rx_1024_to_1518_byte_packets;
1725 edev->stats.rx_1519_to_1522_byte_packets =
1726 stats.rx_1519_to_1522_byte_packets;
1727 edev->stats.rx_1519_to_2047_byte_packets =
1728 stats.rx_1519_to_2047_byte_packets;
1729 edev->stats.rx_2048_to_4095_byte_packets =
1730 stats.rx_2048_to_4095_byte_packets;
1731 edev->stats.rx_4096_to_9216_byte_packets =
1732 stats.rx_4096_to_9216_byte_packets;
1733 edev->stats.rx_9217_to_16383_byte_packets =
1734 stats.rx_9217_to_16383_byte_packets;
133fac0e
SK		 1735 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1736 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1737 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1738 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1739 edev->stats.rx_align_errors = stats.rx_align_errors;
1740 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1741 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1742 edev->stats.rx_jabbers = stats.rx_jabbers;
1743 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1744 edev->stats.rx_fragments = stats.rx_fragments;
1745 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1746 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1747 edev->stats.tx_128_to_255_byte_packets =
1748 stats.tx_128_to_255_byte_packets;
1749 edev->stats.tx_256_to_511_byte_packets =
1750 stats.tx_256_to_511_byte_packets;
1751 edev->stats.tx_512_to_1023_byte_packets =
1752 stats.tx_512_to_1023_byte_packets;
1753 edev->stats.tx_1024_to_1518_byte_packets =
1754 stats.tx_1024_to_1518_byte_packets;
1755 edev->stats.tx_1519_to_2047_byte_packets =
1756 stats.tx_1519_to_2047_byte_packets;
1757 edev->stats.tx_2048_to_4095_byte_packets =
1758 stats.tx_2048_to_4095_byte_packets;
1759 edev->stats.tx_4096_to_9216_byte_packets =
1760 stats.tx_4096_to_9216_byte_packets;
1761 edev->stats.tx_9217_to_16383_byte_packets =
1762 stats.tx_9217_to_16383_byte_packets;
1763 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1764 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1765 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1766 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1767 edev->stats.brb_truncates = stats.brb_truncates;
1768 edev->stats.brb_discards = stats.brb_discards;
1769 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1770}
1771
1772static struct rtnl_link_stats64 *qede_get_stats64(
1773 struct net_device *dev,
1774 struct rtnl_link_stats64 *stats)
1775{
1776 struct qede_dev *edev = netdev_priv(dev);
1777
1778 qede_fill_by_demand_stats(edev);
1779
1780 stats->rx_packets = edev->stats.rx_ucast_pkts +
1781 edev->stats.rx_mcast_pkts +
1782 edev->stats.rx_bcast_pkts;
1783 stats->tx_packets = edev->stats.tx_ucast_pkts +
1784 edev->stats.tx_mcast_pkts +
1785 edev->stats.tx_bcast_pkts;
1786
1787 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1788 edev->stats.rx_mcast_bytes +
1789 edev->stats.rx_bcast_bytes;
1790
1791 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1792 edev->stats.tx_mcast_bytes +
1793 edev->stats.tx_bcast_bytes;
1794
1795 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1796 stats->multicast = edev->stats.rx_mcast_pkts +
1797 edev->stats.rx_bcast_pkts;
1798
1799 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1800
1801 stats->collisions = edev->stats.tx_total_collisions;
1802 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1803 stats->rx_frame_errors = edev->stats.rx_align_errors;
1804
1805 return stats;
1806}
1807
733def6a 1808#ifdef CONFIG_QED_SRIOV
73390ac9
YM		 1809static int qede_get_vf_config(struct net_device *dev, int vfidx,
1810 struct ifla_vf_info *ivi)
1811{
1812 struct qede_dev *edev = netdev_priv(dev);
1813
1814 if (!edev->ops)
1815 return -EINVAL;
1816
1817 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1818}
1819
733def6a
YM		 1820static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1821 int min_tx_rate, int max_tx_rate)
1822{
1823 struct qede_dev *edev = netdev_priv(dev);
1824
be7b6d64 1825 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
733def6a
YM		 1826 max_tx_rate);
1827}
1828
6ddc7608
YM		 1829static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1830{
1831 struct qede_dev *edev = netdev_priv(dev);
1832
1833 if (!edev->ops)
1834 return -EINVAL;
1835
1836 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1837}
1838
733def6a
YM		 1839static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1840 int link_state)
1841{
1842 struct qede_dev *edev = netdev_priv(dev);
1843
1844 if (!edev->ops)
1845 return -EINVAL;
1846
1847 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1848}
1849#endif
1850
7c1bfcad
SRK		 1851static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1852{
1853 struct qed_update_vport_params params;
1854 int rc;
1855
1856 /* Proceed only if action actually needs to be performed */
1857 if (edev->accept_any_vlan == action)
1858 return;
1859
1860 memset(&params, 0, sizeof(params));
1861
1862 params.vport_id = 0;
1863 params.accept_any_vlan = action;
1864 params.update_accept_any_vlan_flg = 1;
1865
1866 rc = edev->ops->vport_update(edev->cdev, &params);
1867 if (rc) {
1868 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1869 action ? "enable" : "disable");
1870 } else {
1871 DP_INFO(edev, "%s accept-any-vlan\n",
1872 action ? "enabled" : "disabled");
1873 edev->accept_any_vlan = action;
1874 }
1875}
1876
1877static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1878{
1879 struct qede_dev *edev = netdev_priv(dev);
1880 struct qede_vlan *vlan, *tmp;
1881 int rc;
1882
1883 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1884
1885 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1886 if (!vlan) {
1887 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1888 return -ENOMEM;
1889 }
1890 INIT_LIST_HEAD(&vlan->list);
1891 vlan->vid = vid;
1892 vlan->configured = false;
1893
1894 /* Verify vlan isn't already configured */
1895 list_for_each_entry(tmp, &edev->vlan_list, list) {
1896 if (tmp->vid == vlan->vid) {
1897 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1898 "vlan already configured\n");
1899 kfree(vlan);
1900 return -EEXIST;
1901 }
1902 }
1903
1904 /* If interface is down, cache this VLAN ID and return */
1905 if (edev->state != QEDE_STATE_OPEN) {
1906 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1907 "Interface is down, VLAN %d will be configured when interface is up\n",
1908 vid);
1909 if (vid != 0)
1910 edev->non_configured_vlans++;
1911 list_add(&vlan->list, &edev->vlan_list);
1912
1913 return 0;
1914 }
1915
1916 /* Check for the filter limit.
1917 * Note - vlan0 has a reserved filter and can be added without
1918 * worrying about quota
1919 */
1920 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1921 (vlan->vid == 0)) {
1922 rc = qede_set_ucast_rx_vlan(edev,
1923 QED_FILTER_XCAST_TYPE_ADD,
1924 vlan->vid);
1925 if (rc) {
1926 DP_ERR(edev, "Failed to configure VLAN %d\n",
1927 vlan->vid);
1928 kfree(vlan);
1929 return -EINVAL;
1930 }
1931 vlan->configured = true;
1932
1933 /* vlan0 filter isn't consuming out of our quota */
1934 if (vlan->vid != 0)
1935 edev->configured_vlans++;
1936 } else {
1937 /* Out of quota; Activate accept-any-VLAN mode */
1938 if (!edev->non_configured_vlans)
1939 qede_config_accept_any_vlan(edev, true);
1940
1941 edev->non_configured_vlans++;
1942 }
1943
1944 list_add(&vlan->list, &edev->vlan_list);
1945
1946 return 0;
1947}
1948
1949static void qede_del_vlan_from_list(struct qede_dev *edev,
1950 struct qede_vlan *vlan)
1951{
1952 /* vlan0 filter isn't consuming out of our quota */
1953 if (vlan->vid != 0) {
1954 if (vlan->configured)
1955 edev->configured_vlans--;
1956 else
1957 edev->non_configured_vlans--;
1958 }
1959
1960 list_del(&vlan->list);
1961 kfree(vlan);
1962}
1963
1964static int qede_configure_vlan_filters(struct qede_dev *edev)
1965{
1966 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1967 struct qed_dev_eth_info *dev_info;
1968 struct qede_vlan *vlan = NULL;
1969
1970 if (list_empty(&edev->vlan_list))
1971 return 0;
1972
1973 dev_info = &edev->dev_info;
1974
1975 /* Configure non-configured vlans */
1976 list_for_each_entry(vlan, &edev->vlan_list, list) {
1977 if (vlan->configured)
1978 continue;
1979
1980 /* We have used all our credits, now enable accept_any_vlan */
1981 if ((vlan->vid != 0) &&
1982 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1983 accept_any_vlan = 1;
1984 continue;
1985 }
1986
1987 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1988
1989 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1990 vlan->vid);
1991 if (rc) {
1992 DP_ERR(edev, "Failed to configure VLAN %u\n",
1993 vlan->vid);
1994 real_rc = rc;
1995 continue;
1996 }
1997
1998 vlan->configured = true;
1999 /* vlan0 filter doesn't consume our VLAN filter's quota */
2000 if (vlan->vid != 0) {
2001 edev->non_configured_vlans--;
2002 edev->configured_vlans++;
2003 }
2004 }
2005
2006 /* enable accept_any_vlan mode if we have more VLANs than credits,
2007 * or remove accept_any_vlan mode if we've actually removed
2008 * a non-configured vlan, and all remaining vlans are truly configured.
2009 */
2010
2011 if (accept_any_vlan)
2012 qede_config_accept_any_vlan(edev, true);
2013 else if (!edev->non_configured_vlans)
2014 qede_config_accept_any_vlan(edev, false);
2015
2016 return real_rc;
2017}
2018
2019static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2020{
2021 struct qede_dev *edev = netdev_priv(dev);
2022 struct qede_vlan *vlan = NULL;
2023 int rc;
2024
2025 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2026
2027 /* Find whether entry exists */
2028 list_for_each_entry(vlan, &edev->vlan_list, list)
2029 if (vlan->vid == vid)
2030 break;
2031
2032 if (!vlan || (vlan->vid != vid)) {
2033 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2034 "Vlan isn't configured\n");
2035 return 0;
2036 }
2037
2038 if (edev->state != QEDE_STATE_OPEN) {
2039 /* As interface is already down, we don't have a VPORT
2040 * instance to remove vlan filter. So just update vlan list
2041 */
2042 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2043 "Interface is down, removing VLAN from list only\n");
2044 qede_del_vlan_from_list(edev, vlan);
2045 return 0;
2046 }
2047
2048 /* Remove vlan */
2049 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
2050 if (rc) {
2051 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2052 return -EINVAL;
2053 }
2054
2055 qede_del_vlan_from_list(edev, vlan);
2056
2057 /* We have removed a VLAN - try to see if we can
2058 * configure non-configured VLAN from the list.
2059 */
2060 rc = qede_configure_vlan_filters(edev);
2061
2062 return rc;
2063}
2064
2065static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2066{
2067 struct qede_vlan *vlan = NULL;
2068
2069 if (list_empty(&edev->vlan_list))
2070 return;
2071
2072 list_for_each_entry(vlan, &edev->vlan_list, list) {
2073 if (!vlan->configured)
2074 continue;
2075
2076 vlan->configured = false;
2077
2078 /* vlan0 filter isn't consuming out of our quota */
2079 if (vlan->vid != 0) {
2080 edev->non_configured_vlans++;
2081 edev->configured_vlans--;
2082 }
2083
2084 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2085 "marked vlan %d as non-configured\n",
2086 vlan->vid);
2087 }
2088
2089 edev->accept_any_vlan = false;
2090}
2091
ce2b885c
YM		 2092int qede_set_features(struct net_device *dev, netdev_features_t features)
2093{
2094 struct qede_dev *edev = netdev_priv(dev);
2095 netdev_features_t changes = features ^ dev->features;
2096 bool need_reload = false;
2097
2098 /* No action needed if hardware GRO is disabled during driver load */
2099 if (changes & NETIF_F_GRO) {
2100 if (dev->features & NETIF_F_GRO)
2101 need_reload = !edev->gro_disable;
2102 else
2103 need_reload = edev->gro_disable;
2104 }
2105
2106 if (need_reload && netif_running(edev->ndev)) {
2107 dev->features = features;
2108 qede_reload(edev, NULL, NULL);
2109 return 1;
2110 }
2111
2112 return 0;
2113}
2114
b18e170c
MC		 2115#ifdef CONFIG_QEDE_VXLAN
2116static void qede_add_vxlan_port(struct net_device *dev,
2117 sa_family_t sa_family, __be16 port)
2118{
2119 struct qede_dev *edev = netdev_priv(dev);
2120 u16 t_port = ntohs(port);
2121
2122 if (edev->vxlan_dst_port)
2123 return;
2124
2125 edev->vxlan_dst_port = t_port;
2126
2127 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
2128
2129 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2130 schedule_delayed_work(&edev->sp_task, 0);
2131}
2132
2133static void qede_del_vxlan_port(struct net_device *dev,
2134 sa_family_t sa_family, __be16 port)
2135{
2136 struct qede_dev *edev = netdev_priv(dev);
2137 u16 t_port = ntohs(port);
2138
2139 if (t_port != edev->vxlan_dst_port)
2140 return;
2141
2142 edev->vxlan_dst_port = 0;
2143
2144 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
2145
2146 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2147 schedule_delayed_work(&edev->sp_task, 0);
2148}
2149#endif
2150
9a109dd0
MC		 2151#ifdef CONFIG_QEDE_GENEVE
2152static void qede_add_geneve_port(struct net_device *dev,
2153 sa_family_t sa_family, __be16 port)
2154{
2155 struct qede_dev *edev = netdev_priv(dev);
2156 u16 t_port = ntohs(port);
2157
2158 if (edev->geneve_dst_port)
2159 return;
2160
2161 edev->geneve_dst_port = t_port;
2162
2163 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
2164 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2165 schedule_delayed_work(&edev->sp_task, 0);
2166}
2167
2168static void qede_del_geneve_port(struct net_device *dev,
2169 sa_family_t sa_family, __be16 port)
2170{
2171 struct qede_dev *edev = netdev_priv(dev);
2172 u16 t_port = ntohs(port);
2173
2174 if (t_port != edev->geneve_dst_port)
2175 return;
2176
2177 edev->geneve_dst_port = 0;
2178
2179 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
2180 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2181 schedule_delayed_work(&edev->sp_task, 0);
2182}
2183#endif
2184
2950219d
YM		 2185static const struct net_device_ops qede_netdev_ops = {
2186 .ndo_open = qede_open,
2187 .ndo_stop = qede_close,
2188 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 2189 .ndo_set_rx_mode = qede_set_rx_mode,
2190 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 2191 .ndo_validate_addr = eth_validate_addr,
133fac0e 2192 .ndo_change_mtu = qede_change_mtu,
08feecd7 2193#ifdef CONFIG_QED_SRIOV
eff16960 2194 .ndo_set_vf_mac = qede_set_vf_mac,
08feecd7
YM		 2195 .ndo_set_vf_vlan = qede_set_vf_vlan,
2196#endif
7c1bfcad
SRK		 2197 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2198 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
ce2b885c 2199 .ndo_set_features = qede_set_features,
133fac0e 2200 .ndo_get_stats64 = qede_get_stats64,
733def6a
YM		 2201#ifdef CONFIG_QED_SRIOV
2202 .ndo_set_vf_link_state = qede_set_vf_link_state,
6ddc7608 2203 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
73390ac9 2204 .ndo_get_vf_config = qede_get_vf_config,
733def6a
YM		 2205 .ndo_set_vf_rate = qede_set_vf_rate,
2206#endif
b18e170c
MC		 2207#ifdef CONFIG_QEDE_VXLAN
2208 .ndo_add_vxlan_port = qede_add_vxlan_port,
2209 .ndo_del_vxlan_port = qede_del_vxlan_port,
2210#endif
9a109dd0
MC		 2211#ifdef CONFIG_QEDE_GENEVE
2212 .ndo_add_geneve_port = qede_add_geneve_port,
2213 .ndo_del_geneve_port = qede_del_geneve_port,
2214#endif
2950219d
YM		 2215};
2216
e712d52b
YM		 2217/* -------------------------------------------------------------------------
2218 * START OF PROBE / REMOVE
2219 * -------------------------------------------------------------------------
2220 */
2221
2222static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2223 struct pci_dev *pdev,
2224 struct qed_dev_eth_info *info,
2225 u32 dp_module,
2226 u8 dp_level)
2227{
2228 struct net_device *ndev;
2229 struct qede_dev *edev;
2230
2231 ndev = alloc_etherdev_mqs(sizeof(*edev),
2232 info->num_queues,
2233 info->num_queues);
2234 if (!ndev) {
2235 pr_err("etherdev allocation failed\n");
2236 return NULL;
2237 }
2238
2239 edev = netdev_priv(ndev);
2240 edev->ndev = ndev;
2241 edev->cdev = cdev;
2242 edev->pdev = pdev;
2243 edev->dp_module = dp_module;
2244 edev->dp_level = dp_level;
2245 edev->ops = qed_ops;
2950219d
YM		 2246 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2247 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b 2248
e712d52b
YM		 2249 SET_NETDEV_DEV(ndev, &pdev->dev);
2250
133fac0e 2251 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 2252 memcpy(&edev->dev_info, info, sizeof(*info));
2253
2254 edev->num_tc = edev->dev_info.num_tc;
2255
7c1bfcad
SRK		 2256 INIT_LIST_HEAD(&edev->vlan_list);
2257
e712d52b
YM		 2258 return edev;
2259}
2260
2261static void qede_init_ndev(struct qede_dev *edev)
2262{
2263 struct net_device *ndev = edev->ndev;
2264 struct pci_dev *pdev = edev->pdev;
2265 u32 hw_features;
2266
2267 pci_set_drvdata(pdev, ndev);
2268
2269 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2270 ndev->base_addr = ndev->mem_start;
2271 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2272 ndev->irq = edev->dev_info.common.pci_irq;
2273
2274 ndev->watchdog_timeo = TX_TIMEOUT;
2275
2950219d
YM		 2276 ndev->netdev_ops = &qede_netdev_ops;
2277
133fac0e
SK		 2278 qede_set_ethtool_ops(ndev);
2279
e712d52b
YM		 2280 /* user-changeble features */
2281 hw_features = NETIF_F_GRO | NETIF_F_SG |
2282 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2283 NETIF_F_TSO | NETIF_F_TSO6;
2284
14db81de
MC		 2285 /* Encap features*/
2286 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2287 NETIF_F_TSO_ECN;
2288 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2289 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2290 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2291 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2292
e712d52b
YM		 2293 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2294 NETIF_F_HIGHDMA;
2295 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2296 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 2297 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 2298
2299 ndev->hw_features = hw_features;
2300
2301 /* Set network device HW mac */
2302 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2303}
2304
2305/* This function converts from 32b param to two params of level and module
2306 * Input 32b decoding:
2307 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2308 * 'happy' flow, e.g. memory allocation failed.
2309 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2310 * and provide important parameters.
2311 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2312 * module. VERBOSE prints are for tracking the specific flow in low level.
2313 *
2314 * Notice that the level should be that of the lowest required logs.
2315 */
133fac0e 2316void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2317{
2318 *p_dp_level = QED_LEVEL_NOTICE;
2319 *p_dp_module = 0;
2320
2321 if (debug & QED_LOG_VERBOSE_MASK) {
2322 *p_dp_level = QED_LEVEL_VERBOSE;
2323 *p_dp_module = (debug & 0x3FFFFFFF);
2324 } else if (debug & QED_LOG_INFO_MASK) {
2325 *p_dp_level = QED_LEVEL_INFO;
2326 } else if (debug & QED_LOG_NOTICE_MASK) {
2327 *p_dp_level = QED_LEVEL_NOTICE;
2328 }
2329}
2330
2950219d
YM		 2331static void qede_free_fp_array(struct qede_dev *edev)
2332{
2333 if (edev->fp_array) {
2334 struct qede_fastpath *fp;
2335 int i;
2336
2337 for_each_rss(i) {
2338 fp = &edev->fp_array[i];
2339
2340 kfree(fp->sb_info);
2341 kfree(fp->rxq);
2342 kfree(fp->txqs);
2343 }
2344 kfree(edev->fp_array);
2345 }
2346 edev->num_rss = 0;
2347}
2348
2349static int qede_alloc_fp_array(struct qede_dev *edev)
2350{
2351 struct qede_fastpath *fp;
2352 int i;
2353
2354 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2355 sizeof(*edev->fp_array), GFP_KERNEL);
2356 if (!edev->fp_array) {
2357 DP_NOTICE(edev, "fp array allocation failed\n");
2358 goto err;
2359 }
2360
2361 for_each_rss(i) {
2362 fp = &edev->fp_array[i];
2363
2364 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2365 if (!fp->sb_info) {
2366 DP_NOTICE(edev, "sb info struct allocation failed\n");
2367 goto err;
2368 }
2369
2370 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2371 if (!fp->rxq) {
2372 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2373 goto err;
2374 }
2375
2376 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2377 if (!fp->txqs) {
2378 DP_NOTICE(edev, "TXQ array allocation failed\n");
2379 goto err;
2380 }
2381 }
2382
2383 return 0;
2384err:
2385 qede_free_fp_array(edev);
2386 return -ENOMEM;
2387}
2388
0d8e0aa0
SK		 2389static void qede_sp_task(struct work_struct *work)
2390{
2391 struct qede_dev *edev = container_of(work, struct qede_dev,
2392 sp_task.work);
b18e170c
MC		 2393 struct qed_dev *cdev = edev->cdev;
2394
0d8e0aa0
SK		 2395 mutex_lock(&edev->qede_lock);
2396
2397 if (edev->state == QEDE_STATE_OPEN) {
2398 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2399 qede_config_rx_mode(edev->ndev);
2400 }
2401
b18e170c
MC		 2402 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2403 struct qed_tunn_params tunn_params;
2404
2405 memset(&tunn_params, 0, sizeof(tunn_params));
2406 tunn_params.update_vxlan_port = 1;
2407 tunn_params.vxlan_port = edev->vxlan_dst_port;
2408 qed_ops->tunn_config(cdev, &tunn_params);
2409 }
2410
9a109dd0
MC		 2411 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2412 struct qed_tunn_params tunn_params;
2413
2414 memset(&tunn_params, 0, sizeof(tunn_params));
2415 tunn_params.update_geneve_port = 1;
2416 tunn_params.geneve_port = edev->geneve_dst_port;
2417 qed_ops->tunn_config(cdev, &tunn_params);
2418 }
2419
0d8e0aa0
SK		 2420 mutex_unlock(&edev->qede_lock);
2421}
2422
e712d52b
YM		 2423static void qede_update_pf_params(struct qed_dev *cdev)
2424{
2425 struct qed_pf_params pf_params;
2426
8e0ddc04 2427 /* 64 rx + 64 tx */
e712d52b 2428 memset(&pf_params, 0, sizeof(struct qed_pf_params));
8e0ddc04 2429 pf_params.eth_pf_params.num_cons = 128;
e712d52b
YM		 2430 qed_ops->common->update_pf_params(cdev, &pf_params);
2431}
2432
2433enum qede_probe_mode {
2434 QEDE_PROBE_NORMAL,
2435};
2436
2437static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1408cc1f 2438 bool is_vf, enum qede_probe_mode mode)
e712d52b 2439{
1408cc1f 2440 struct qed_probe_params probe_params;
e712d52b
YM		 2441 struct qed_slowpath_params params;
2442 struct qed_dev_eth_info dev_info;
2443 struct qede_dev *edev;
2444 struct qed_dev *cdev;
2445 int rc;
2446
2447 if (unlikely(dp_level & QED_LEVEL_INFO))
2448 pr_notice("Starting qede probe\n");
2449
1408cc1f
YM		 2450 memset(&probe_params, 0, sizeof(probe_params));
2451 probe_params.protocol = QED_PROTOCOL_ETH;
2452 probe_params.dp_module = dp_module;
2453 probe_params.dp_level = dp_level;
2454 probe_params.is_vf = is_vf;
2455 cdev = qed_ops->common->probe(pdev, &probe_params);
e712d52b
YM		 2456 if (!cdev) {
2457 rc = -ENODEV;
2458 goto err0;
2459 }
2460
2461 qede_update_pf_params(cdev);
2462
2463 /* Start the Slowpath-process */
2464 memset(&params, 0, sizeof(struct qed_slowpath_params));
2465 params.int_mode = QED_INT_MODE_MSIX;
2466 params.drv_major = QEDE_MAJOR_VERSION;
2467 params.drv_minor = QEDE_MINOR_VERSION;
2468 params.drv_rev = QEDE_REVISION_VERSION;
2469 params.drv_eng = QEDE_ENGINEERING_VERSION;
2470 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2471 rc = qed_ops->common->slowpath_start(cdev, &params);
2472 if (rc) {
2473 pr_notice("Cannot start slowpath\n");
2474 goto err1;
2475 }
2476
2477 /* Learn information crucial for qede to progress */
2478 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2479 if (rc)
2480 goto err2;
2481
2482 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2483 dp_level);
2484 if (!edev) {
2485 rc = -ENOMEM;
2486 goto err2;
2487 }
2488
fefb0202
YM		 2489 if (is_vf)
2490 edev->flags |= QEDE_FLAG_IS_VF;
2491
e712d52b
YM		 2492 qede_init_ndev(edev);
2493
2950219d
YM		 2494 rc = register_netdev(edev->ndev);
2495 if (rc) {
2496 DP_NOTICE(edev, "Cannot register net-device\n");
2497 goto err3;
2498 }
2499
e712d52b
YM		 2500 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2501
a2ec6172
SK		 2502 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2503
489e45ae
SRK		 2504#ifdef CONFIG_DCB
2505 qede_set_dcbnl_ops(edev->ndev);
2506#endif
2507
0d8e0aa0
SK		 2508 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2509 mutex_init(&edev->qede_lock);
2510
e712d52b
YM		 2511 DP_INFO(edev, "Ending successfully qede probe\n");
2512
2513 return 0;
2514
2950219d
YM		 2515err3:
2516 free_netdev(edev->ndev);
e712d52b
YM		 2517err2:
2518 qed_ops->common->slowpath_stop(cdev);
2519err1:
2520 qed_ops->common->remove(cdev);
2521err0:
2522 return rc;
2523}
2524
2525static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2526{
fefb0202 2527 bool is_vf = false;
e712d52b
YM		 2528 u32 dp_module = 0;
2529 u8 dp_level = 0;
2530
fefb0202
YM		 2531 switch ((enum qede_pci_private)id->driver_data) {
2532 case QEDE_PRIVATE_VF:
2533 if (debug & QED_LOG_VERBOSE_MASK)
2534 dev_err(&pdev->dev, "Probing a VF\n");
2535 is_vf = true;
2536 break;
2537 default:
2538 if (debug & QED_LOG_VERBOSE_MASK)
2539 dev_err(&pdev->dev, "Probing a PF\n");
2540 }
2541
e712d52b
YM		 2542 qede_config_debug(debug, &dp_module, &dp_level);
2543
fefb0202 2544 return __qede_probe(pdev, dp_module, dp_level, is_vf,
e712d52b
YM		 2545 QEDE_PROBE_NORMAL);
2546}
2547
2548enum qede_remove_mode {
2549 QEDE_REMOVE_NORMAL,
2550};
2551
2552static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2553{
2554 struct net_device *ndev = pci_get_drvdata(pdev);
2555 struct qede_dev *edev = netdev_priv(ndev);
2556 struct qed_dev *cdev = edev->cdev;
2557
2558 DP_INFO(edev, "Starting qede_remove\n");
2559
0d8e0aa0 2560 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2561 unregister_netdev(ndev);
2562
e712d52b
YM		 2563 edev->ops->common->set_power_state(cdev, PCI_D0);
2564
2565 pci_set_drvdata(pdev, NULL);
2566
2567 free_netdev(ndev);
2568
2569 /* Use global ops since we've freed edev */
2570 qed_ops->common->slowpath_stop(cdev);
2571 qed_ops->common->remove(cdev);
2572
2573 pr_notice("Ending successfully qede_remove\n");
2574}
2575
2576static void qede_remove(struct pci_dev *pdev)
2577{
2578 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2579}
2950219d
YM		 2580
2581/* -------------------------------------------------------------------------
2582 * START OF LOAD / UNLOAD
2583 * -------------------------------------------------------------------------
2584 */
2585
2586static int qede_set_num_queues(struct qede_dev *edev)
2587{
2588 int rc;
2589 u16 rss_num;
2590
2591 /* Setup queues according to possible resources*/
8edf049d
SK		 2592 if (edev->req_rss)
2593 rss_num = edev->req_rss;
2594 else
2595 rss_num = netif_get_num_default_rss_queues() *
2596 edev->dev_info.common.num_hwfns;
2950219d
YM		 2597
2598 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2599
2600 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2601 if (rc > 0) {
2602 /* Managed to request interrupts for our queues */
2603 edev->num_rss = rc;
2604 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2605 QEDE_RSS_CNT(edev), rss_num);
2606 rc = 0;
2607 }
2608 return rc;
2609}
2610
2611static void qede_free_mem_sb(struct qede_dev *edev,
2612 struct qed_sb_info *sb_info)
2613{
2614 if (sb_info->sb_virt)
2615 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2616 (void *)sb_info->sb_virt, sb_info->sb_phys);
2617}
2618
2619/* This function allocates fast-path status block memory */
2620static int qede_alloc_mem_sb(struct qede_dev *edev,
2621 struct qed_sb_info *sb_info,
2622 u16 sb_id)
2623{
2624 struct status_block *sb_virt;
2625 dma_addr_t sb_phys;
2626 int rc;
2627
2628 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2629 sizeof(*sb_virt),
2630 &sb_phys, GFP_KERNEL);
2631 if (!sb_virt) {
2632 DP_ERR(edev, "Status block allocation failed\n");
2633 return -ENOMEM;
2634 }
2635
2636 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2637 sb_virt, sb_phys, sb_id,
2638 QED_SB_TYPE_L2_QUEUE);
2639 if (rc) {
2640 DP_ERR(edev, "Status block initialization failed\n");
2641 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2642 sb_virt, sb_phys);
2643 return rc;
2644 }
2645
2646 return 0;
2647}
2648
2649static void qede_free_rx_buffers(struct qede_dev *edev,
2650 struct qede_rx_queue *rxq)
2651{
2652 u16 i;
2653
2654 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2655 struct sw_rx_data *rx_buf;
fc48b7a6 2656 struct page *data;
2950219d
YM		 2657
2658 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2659 data = rx_buf->data;
2660
fc48b7a6
YM		 2661 dma_unmap_page(&edev->pdev->dev,
2662 rx_buf->mapping,
2663 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2664
2665 rx_buf->data = NULL;
fc48b7a6 2666 __free_page(data);
2950219d
YM		 2667 }
2668}
2669
55482edc
MC		 2670static void qede_free_sge_mem(struct qede_dev *edev,
2671 struct qede_rx_queue *rxq) {
2672 int i;
2673
2674 if (edev->gro_disable)
2675 return;
2676
2677 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2678 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2679 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2680
f86af2df 2681 if (replace_buf->data) {
55482edc 2682 dma_unmap_page(&edev->pdev->dev,
09ec8e7f 2683 replace_buf->mapping,
55482edc
MC		 2684 PAGE_SIZE, DMA_FROM_DEVICE);
2685 __free_page(replace_buf->data);
2686 }
2687 }
2688}
2689
2950219d
YM		 2690static void qede_free_mem_rxq(struct qede_dev *edev,
2691 struct qede_rx_queue *rxq)
2692{
55482edc
MC		 2693 qede_free_sge_mem(edev, rxq);
2694
2950219d
YM		 2695 /* Free rx buffers */
2696 qede_free_rx_buffers(edev, rxq);
2697
2698 /* Free the parallel SW ring */
2699 kfree(rxq->sw_rx_ring);
2700
2701 /* Free the real RQ ring used by FW */
2702 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2703 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2704}
2705
2706static int qede_alloc_rx_buffer(struct qede_dev *edev,
2707 struct qede_rx_queue *rxq)
2708{
2709 struct sw_rx_data *sw_rx_data;
2710 struct eth_rx_bd *rx_bd;
2711 dma_addr_t mapping;
fc48b7a6 2712 struct page *data;
2950219d 2713 u16 rx_buf_size;
2950219d
YM		 2714
2715 rx_buf_size = rxq->rx_buf_size;
2716
fc48b7a6 2717 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2718 if (unlikely(!data)) {
fc48b7a6 2719 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2720 return -ENOMEM;
2721 }
2722
fc48b7a6
YM		 2723 /* Map the entire page as it would be used
2724 * for multiple RX buffer segment size mapping.
2725 */
2726 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2727 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2728 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2729 __free_page(data);
2950219d
YM		 2730 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2731 return -ENOMEM;
2732 }
2733
2734 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2735 sw_rx_data->page_offset = 0;
2950219d 2736 sw_rx_data->data = data;
fc48b7a6 2737 sw_rx_data->mapping = mapping;
2950219d
YM		 2738
2739 /* Advance PROD and get BD pointer */
2740 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2741 WARN_ON(!rx_bd);
2742 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2743 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2744
2745 rxq->sw_rx_prod++;
2746
2747 return 0;
2748}
2749
55482edc
MC		 2750static int qede_alloc_sge_mem(struct qede_dev *edev,
2751 struct qede_rx_queue *rxq)
2752{
2753 dma_addr_t mapping;
2754 int i;
2755
2756 if (edev->gro_disable)
2757 return 0;
2758
2759 if (edev->ndev->mtu > PAGE_SIZE) {
2760 edev->gro_disable = 1;
2761 return 0;
2762 }
2763
2764 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2765 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2766 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2767
2768 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2769 if (unlikely(!replace_buf->data)) {
2770 DP_NOTICE(edev,
2771 "Failed to allocate TPA skb pool [replacement buffer]\n");
2772 goto err;
2773 }
2774
2775 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2776 rxq->rx_buf_size, DMA_FROM_DEVICE);
2777 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2778 DP_NOTICE(edev,
2779 "Failed to map TPA replacement buffer\n");
2780 goto err;
2781 }
2782
09ec8e7f 2783 replace_buf->mapping = mapping;
55482edc
MC		 2784 tpa_info->replace_buf.page_offset = 0;
2785
2786 tpa_info->replace_buf_mapping = mapping;
2787 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2788 }
2789
2790 return 0;
2791err:
2792 qede_free_sge_mem(edev, rxq);
2793 edev->gro_disable = 1;
2794 return -ENOMEM;
2795}
2796
2950219d
YM		 2797/* This function allocates all memory needed per Rx queue */
2798static int qede_alloc_mem_rxq(struct qede_dev *edev,
2799 struct qede_rx_queue *rxq)
2800{
f86af2df 2801 int i, rc, size;
2950219d
YM		 2802
2803 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2804
fc48b7a6
YM		 2805 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2806 edev->ndev->mtu;
2807 if (rxq->rx_buf_size > PAGE_SIZE)
2808 rxq->rx_buf_size = PAGE_SIZE;
2809
2810 /* Segment size to spilt a page in multiple equal parts */
2811 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2812
2813 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2814 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2815 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2816 if (!rxq->sw_rx_ring) {
2817 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2818 rc = -ENOMEM;
2950219d
YM		 2819 goto err;
2820 }
2821
2822 /* Allocate FW Rx ring */
2823 rc = edev->ops->common->chain_alloc(edev->cdev,
2824 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2825 QED_CHAIN_MODE_NEXT_PTR,
a91eb52a 2826 QED_CHAIN_CNT_TYPE_U16,
fc48b7a6 2827 RX_RING_SIZE,
2950219d
YM		 2828 sizeof(struct eth_rx_bd),
2829 &rxq->rx_bd_ring);
2830
2831 if (rc)
2832 goto err;
2833
2834 /* Allocate FW completion ring */
2835 rc = edev->ops->common->chain_alloc(edev->cdev,
2836 QED_CHAIN_USE_TO_CONSUME,
2837 QED_CHAIN_MODE_PBL,
a91eb52a 2838 QED_CHAIN_CNT_TYPE_U16,
fc48b7a6 2839 RX_RING_SIZE,
2950219d
YM		 2840 sizeof(union eth_rx_cqe),
2841 &rxq->rx_comp_ring);
2842 if (rc)
2843 goto err;
2844
2845 /* Allocate buffers for the Rx ring */
2846 for (i = 0; i < rxq->num_rx_buffers; i++) {
2847 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2848 if (rc) {
2849 DP_ERR(edev,
2850 "Rx buffers allocation failed at index %d\n", i);
2851 goto err;
2852 }
2950219d
YM		 2853 }
2854
f86af2df 2855 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2856err:
f86af2df 2857 return rc;
2950219d
YM		 2858}
2859
2860static void qede_free_mem_txq(struct qede_dev *edev,
2861 struct qede_tx_queue *txq)
2862{
2863 /* Free the parallel SW ring */
2864 kfree(txq->sw_tx_ring);
2865
2866 /* Free the real RQ ring used by FW */
2867 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2868}
2869
2870/* This function allocates all memory needed per Tx queue */
2871static int qede_alloc_mem_txq(struct qede_dev *edev,
2872 struct qede_tx_queue *txq)
2873{
2874 int size, rc;
2875 union eth_tx_bd_types *p_virt;
2876
2877 txq->num_tx_buffers = edev->q_num_tx_buffers;
2878
2879 /* Allocate the parallel driver ring for Tx buffers */
2880 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2881 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2882 if (!txq->sw_tx_ring) {
2883 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2884 goto err;
2885 }
2886
2887 rc = edev->ops->common->chain_alloc(edev->cdev,
2888 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2889 QED_CHAIN_MODE_PBL,
a91eb52a 2890 QED_CHAIN_CNT_TYPE_U16,
2950219d 2891 NUM_TX_BDS_MAX,
a91eb52a 2892 sizeof(*p_virt), &txq->tx_pbl);
2950219d
YM		 2893 if (rc)
2894 goto err;
2895
2896 return 0;
2897
2898err:
2899 qede_free_mem_txq(edev, txq);
2900 return -ENOMEM;
2901}
2902
2903/* This function frees all memory of a single fp */
2904static void qede_free_mem_fp(struct qede_dev *edev,
2905 struct qede_fastpath *fp)
2906{
2907 int tc;
2908
2909 qede_free_mem_sb(edev, fp->sb_info);
2910
2911 qede_free_mem_rxq(edev, fp->rxq);
2912
2913 for (tc = 0; tc < edev->num_tc; tc++)
2914 qede_free_mem_txq(edev, &fp->txqs[tc]);
2915}
2916
2917/* This function allocates all memory needed for a single fp (i.e. an entity
2918 * which contains status block, one rx queue and multiple per-TC tx queues.
2919 */
2920static int qede_alloc_mem_fp(struct qede_dev *edev,
2921 struct qede_fastpath *fp)
2922{
2923 int rc, tc;
2924
2925 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2926 if (rc)
2927 goto err;
2928
2929 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2930 if (rc)
2931 goto err;
2932
2933 for (tc = 0; tc < edev->num_tc; tc++) {
2934 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2935 if (rc)
2936 goto err;
2937 }
2938
2939 return 0;
2950219d 2940err:
f86af2df 2941 return rc;
2950219d
YM		 2942}
2943
2944static void qede_free_mem_load(struct qede_dev *edev)
2945{
2946 int i;
2947
2948 for_each_rss(i) {
2949 struct qede_fastpath *fp = &edev->fp_array[i];
2950
2951 qede_free_mem_fp(edev, fp);
2952 }
2953}
2954
2955/* This function allocates all qede memory at NIC load. */
2956static int qede_alloc_mem_load(struct qede_dev *edev)
2957{
2958 int rc = 0, rss_id;
2959
2960 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2961 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2962
2963 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 2964 if (rc) {
2950219d 2965 DP_ERR(edev,
f86af2df
MC		 2966 "Failed to allocate memory for fastpath - rss id = %d\n",
2967 rss_id);
2968 qede_free_mem_load(edev);
2969 return rc;
2950219d 2970 }
2950219d
YM		 2971 }
2972
2973 return 0;
2974}
2975
2976/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2977static void qede_init_fp(struct qede_dev *edev)
2978{
2979 int rss_id, txq_index, tc;
2980 struct qede_fastpath *fp;
2981
2982 for_each_rss(rss_id) {
2983 fp = &edev->fp_array[rss_id];
2984
2985 fp->edev = edev;
2986 fp->rss_id = rss_id;
2987
2988 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2989
2990 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2991
2992 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2993 fp->rxq->rxq_id = rss_id;
2994
2995 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2996 for (tc = 0; tc < edev->num_tc; tc++) {
2997 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2998 fp->txqs[tc].index = txq_index;
2999 }
3000
3001 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
3002 edev->ndev->name, rss_id);
3003 }
55482edc
MC		 3004
3005 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 3006}
3007
3008static int qede_set_real_num_queues(struct qede_dev *edev)
3009{
3010 int rc = 0;
3011
3012 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3013 if (rc) {
3014 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3015 return rc;
3016 }
3017 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3018 if (rc) {
3019 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3020 return rc;
3021 }
3022
3023 return 0;
3024}
3025
3026static void qede_napi_disable_remove(struct qede_dev *edev)
3027{
3028 int i;
3029
3030 for_each_rss(i) {
3031 napi_disable(&edev->fp_array[i].napi);
3032
3033 netif_napi_del(&edev->fp_array[i].napi);
3034 }
3035}
3036
3037static void qede_napi_add_enable(struct qede_dev *edev)
3038{
3039 int i;
3040
3041 /* Add NAPI objects */
3042 for_each_rss(i) {
3043 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3044 qede_poll, NAPI_POLL_WEIGHT);
3045 napi_enable(&edev->fp_array[i].napi);
3046 }
3047}
3048
3049static void qede_sync_free_irqs(struct qede_dev *edev)
3050{
3051 int i;
3052
3053 for (i = 0; i < edev->int_info.used_cnt; i++) {
3054 if (edev->int_info.msix_cnt) {
3055 synchronize_irq(edev->int_info.msix[i].vector);
3056 free_irq(edev->int_info.msix[i].vector,
3057 &edev->fp_array[i]);
3058 } else {
3059 edev->ops->common->simd_handler_clean(edev->cdev, i);
3060 }
3061 }
3062
3063 edev->int_info.used_cnt = 0;
3064}
3065
3066static int qede_req_msix_irqs(struct qede_dev *edev)
3067{
3068 int i, rc;
3069
3070 /* Sanitize number of interrupts == number of prepared RSS queues */
3071 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3072 DP_ERR(edev,
3073 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3074 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3075 return -EINVAL;
3076 }
3077
3078 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3079 rc = request_irq(edev->int_info.msix[i].vector,
3080 qede_msix_fp_int, 0, edev->fp_array[i].name,
3081 &edev->fp_array[i]);
3082 if (rc) {
3083 DP_ERR(edev, "Request fp %d irq failed\n", i);
3084 qede_sync_free_irqs(edev);
3085 return rc;
3086 }
3087 DP_VERBOSE(edev, NETIF_MSG_INTR,
3088 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3089 edev->fp_array[i].name, i,
3090 &edev->fp_array[i]);
3091 edev->int_info.used_cnt++;
3092 }
3093
3094 return 0;
3095}
3096
3097static void qede_simd_fp_handler(void *cookie)
3098{
3099 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3100
3101 napi_schedule_irqoff(&fp->napi);
3102}
3103
3104static int qede_setup_irqs(struct qede_dev *edev)
3105{
3106 int i, rc = 0;
3107
3108 /* Learn Interrupt configuration */
3109 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3110 if (rc)
3111 return rc;
3112
3113 if (edev->int_info.msix_cnt) {
3114 rc = qede_req_msix_irqs(edev);
3115 if (rc)
3116 return rc;
3117 edev->ndev->irq = edev->int_info.msix[0].vector;
3118 } else {
3119 const struct qed_common_ops *ops;
3120
3121 /* qed should learn receive the RSS ids and callbacks */
3122 ops = edev->ops->common;
3123 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3124 ops->simd_handler_config(edev->cdev,
3125 &edev->fp_array[i], i,
3126 qede_simd_fp_handler);
3127 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3128 }
3129 return 0;
3130}
3131
3132static int qede_drain_txq(struct qede_dev *edev,
3133 struct qede_tx_queue *txq,
3134 bool allow_drain)
3135{
3136 int rc, cnt = 1000;
3137
3138 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3139 if (!cnt) {
3140 if (allow_drain) {
3141 DP_NOTICE(edev,
3142 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3143 txq->index);
3144 rc = edev->ops->common->drain(edev->cdev);
3145 if (rc)
3146 return rc;
3147 return qede_drain_txq(edev, txq, false);
3148 }
3149 DP_NOTICE(edev,
3150 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3151 txq->index, txq->sw_tx_prod,
3152 txq->sw_tx_cons);
3153 return -ENODEV;
3154 }
3155 cnt--;
3156 usleep_range(1000, 2000);
3157 barrier();
3158 }
3159
3160 /* FW finished processing, wait for HW to transmit all tx packets */
3161 usleep_range(1000, 2000);
3162
3163 return 0;
3164}
3165
3166static int qede_stop_queues(struct qede_dev *edev)
3167{
3168 struct qed_update_vport_params vport_update_params;
3169 struct qed_dev *cdev = edev->cdev;
3170 int rc, tc, i;
3171
3172 /* Disable the vport */
3173 memset(&vport_update_params, 0, sizeof(vport_update_params));
3174 vport_update_params.vport_id = 0;
3175 vport_update_params.update_vport_active_flg = 1;
3176 vport_update_params.vport_active_flg = 0;
3177 vport_update_params.update_rss_flg = 0;
3178
3179 rc = edev->ops->vport_update(cdev, &vport_update_params);
3180 if (rc) {
3181 DP_ERR(edev, "Failed to update vport\n");
3182 return rc;
3183 }
3184
3185 /* Flush Tx queues. If needed, request drain from MCP */
3186 for_each_rss(i) {
3187 struct qede_fastpath *fp = &edev->fp_array[i];
3188
3189 for (tc = 0; tc < edev->num_tc; tc++) {
3190 struct qede_tx_queue *txq = &fp->txqs[tc];
3191
3192 rc = qede_drain_txq(edev, txq, true);
3193 if (rc)
3194 return rc;
3195 }
3196 }
3197
3198 /* Stop all Queues in reverse order*/
3199 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3200 struct qed_stop_rxq_params rx_params;
3201
3202 /* Stop the Tx Queue(s)*/
3203 for (tc = 0; tc < edev->num_tc; tc++) {
3204 struct qed_stop_txq_params tx_params;
3205
3206 tx_params.rss_id = i;
3207 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3208 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3209 if (rc) {
3210 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3211 tx_params.tx_queue_id);
3212 return rc;
3213 }
3214 }
3215
3216 /* Stop the Rx Queue*/
3217 memset(&rx_params, 0, sizeof(rx_params));
3218 rx_params.rss_id = i;
3219 rx_params.rx_queue_id = i;
3220
3221 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3222 if (rc) {
3223 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3224 return rc;
3225 }
3226 }
3227
3228 /* Stop the vport */
3229 rc = edev->ops->vport_stop(cdev, 0);
3230 if (rc)
3231 DP_ERR(edev, "Failed to stop VPORT\n");
3232
3233 return rc;
3234}
3235
3236static int qede_start_queues(struct qede_dev *edev)
3237{
3238 int rc, tc, i;
088c8618 3239 int vlan_removal_en = 1;
2950219d 3240 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 3241 struct qed_update_vport_params vport_update_params;
3242 struct qed_queue_start_common_params q_params;
fefb0202 3243 struct qed_dev_info *qed_info = &edev->dev_info.common;
088c8618 3244 struct qed_start_vport_params start = {0};
961acdea 3245 bool reset_rss_indir = false;
2950219d
YM		 3246
3247 if (!edev->num_rss) {
3248 DP_ERR(edev,
3249 "Cannot update V-VPORT as active as there are no Rx queues\n");
3250 return -EINVAL;
3251 }
3252
55482edc 3253 start.gro_enable = !edev->gro_disable;
088c8618
MC		 3254 start.mtu = edev->ndev->mtu;
3255 start.vport_id = 0;
3256 start.drop_ttl0 = true;
3257 start.remove_inner_vlan = vlan_removal_en;
3258
3259 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 3260
3261 if (rc) {
3262 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3263 return rc;
3264 }
3265
3266 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3267 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 3268 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 3269
3270 for_each_rss(i) {
3271 struct qede_fastpath *fp = &edev->fp_array[i];
3272 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3273
3274 memset(&q_params, 0, sizeof(q_params));
3275 q_params.rss_id = i;
3276 q_params.queue_id = i;
3277 q_params.vport_id = 0;
3278 q_params.sb = fp->sb_info->igu_sb_id;
3279 q_params.sb_idx = RX_PI;
3280
3281 rc = edev->ops->q_rx_start(cdev, &q_params,
3282 fp->rxq->rx_buf_size,
3283 fp->rxq->rx_bd_ring.p_phys_addr,
3284 phys_table,
3285 fp->rxq->rx_comp_ring.page_cnt,
3286 &fp->rxq->hw_rxq_prod_addr);
3287 if (rc) {
3288 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3289 return rc;
3290 }
3291
3292 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3293
3294 qede_update_rx_prod(edev, fp->rxq);
3295
3296 for (tc = 0; tc < edev->num_tc; tc++) {
3297 struct qede_tx_queue *txq = &fp->txqs[tc];
3298 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3299
3300 memset(&q_params, 0, sizeof(q_params));
3301 q_params.rss_id = i;
3302 q_params.queue_id = txq_index;
3303 q_params.vport_id = 0;
3304 q_params.sb = fp->sb_info->igu_sb_id;
3305 q_params.sb_idx = TX_PI(tc);
3306
3307 rc = edev->ops->q_tx_start(cdev, &q_params,
3308 txq->tx_pbl.pbl.p_phys_table,
3309 txq->tx_pbl.page_cnt,
3310 &txq->doorbell_addr);
3311 if (rc) {
3312 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3313 txq_index, rc);
3314 return rc;
3315 }
3316
3317 txq->hw_cons_ptr =
3318 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3319 SET_FIELD(txq->tx_db.data.params,
3320 ETH_DB_DATA_DEST, DB_DEST_XCM);
3321 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3322 DB_AGG_CMD_SET);
3323 SET_FIELD(txq->tx_db.data.params,
3324 ETH_DB_DATA_AGG_VAL_SEL,
3325 DQ_XCM_ETH_TX_BD_PROD_CMD);
3326
3327 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3328 }
3329 }
3330
3331 /* Prepare and send the vport enable */
3332 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3333 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3334 vport_update_params.update_vport_active_flg = 1;
3335 vport_update_params.vport_active_flg = 1;
3336
831bfb0e
YM		 3337 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3338 qed_info->tx_switching) {
3339 vport_update_params.update_tx_switching_flg = 1;
3340 vport_update_params.tx_switching_flg = 1;
3341 }
3342
2950219d
YM		 3343 /* Fill struct with RSS params */
3344 if (QEDE_RSS_CNT(edev) > 1) {
3345 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3346
3347 /* Need to validate current RSS config uses valid entries */
3348 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3349 if (edev->rss_params.rss_ind_table[i] >=
3350 edev->num_rss) {
3351 reset_rss_indir = true;
3352 break;
3353 }
3354 }
3355
3356 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3357 reset_rss_indir) {
3358 u16 val;
3359
3360 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3361 u16 indir_val;
3362
3363 val = QEDE_RSS_CNT(edev);
3364 indir_val = ethtool_rxfh_indir_default(i, val);
3365 edev->rss_params.rss_ind_table[i] = indir_val;
3366 }
3367 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3368 }
3369
3370 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3371 netdev_rss_key_fill(edev->rss_params.rss_key,
3372 sizeof(edev->rss_params.rss_key));
3373 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3374 }
3375
3376 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3377 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3378 QED_RSS_IPV6 |
3379 QED_RSS_IPV4_TCP |
3380 QED_RSS_IPV6_TCP;
3381 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3382 }
3383
3384 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3385 sizeof(vport_update_params.rss_params));
2950219d 3386 } else {
961acdea
SRK		 3387 memset(&vport_update_params.rss_params, 0,
3388 sizeof(vport_update_params.rss_params));
2950219d 3389 }
2950219d
YM		 3390
3391 rc = edev->ops->vport_update(cdev, &vport_update_params);
3392 if (rc) {
3393 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3394 return rc;
3395 }
3396
3397 return 0;
3398}
3399
0d8e0aa0
SK		 3400static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3401 enum qed_filter_xcast_params_type opcode,
3402 unsigned char *mac, int num_macs)
3403{
3404 struct qed_filter_params filter_cmd;
3405 int i;
3406
3407 memset(&filter_cmd, 0, sizeof(filter_cmd));
3408 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3409 filter_cmd.filter.mcast.type = opcode;
3410 filter_cmd.filter.mcast.num = num_macs;
3411
3412 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3413 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3414
3415 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3416}
3417
2950219d
YM		 3418enum qede_unload_mode {
3419 QEDE_UNLOAD_NORMAL,
3420};
3421
3422static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3423{
a2ec6172 3424 struct qed_link_params link_params;
2950219d
YM		 3425 int rc;
3426
3427 DP_INFO(edev, "Starting qede unload\n");
3428
0d8e0aa0
SK		 3429 mutex_lock(&edev->qede_lock);
3430 edev->state = QEDE_STATE_CLOSED;
3431
2950219d
YM		 3432 /* Close OS Tx */
3433 netif_tx_disable(edev->ndev);
3434 netif_carrier_off(edev->ndev);
3435
a2ec6172
SK		 3436 /* Reset the link */
3437 memset(&link_params, 0, sizeof(link_params));
3438 link_params.link_up = false;
3439 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3440 rc = qede_stop_queues(edev);
3441 if (rc) {
3442 qede_sync_free_irqs(edev);
3443 goto out;
3444 }
3445
3446 DP_INFO(edev, "Stopped Queues\n");
3447
7c1bfcad 3448 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3449 edev->ops->fastpath_stop(edev->cdev);
3450
3451 /* Release the interrupts */
3452 qede_sync_free_irqs(edev);
3453 edev->ops->common->set_fp_int(edev->cdev, 0);
3454
3455 qede_napi_disable_remove(edev);
3456
3457 qede_free_mem_load(edev);
3458 qede_free_fp_array(edev);
3459
3460out:
3461 mutex_unlock(&edev->qede_lock);
3462 DP_INFO(edev, "Ending qede unload\n");
3463}
3464
3465enum qede_load_mode {
3466 QEDE_LOAD_NORMAL,
3467};
3468
3469static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3470{
a2ec6172
SK		 3471 struct qed_link_params link_params;
3472 struct qed_link_output link_output;
2950219d
YM		 3473 int rc;
3474
3475 DP_INFO(edev, "Starting qede load\n");
3476
3477 rc = qede_set_num_queues(edev);
3478 if (rc)
3479 goto err0;
3480
3481 rc = qede_alloc_fp_array(edev);
3482 if (rc)
3483 goto err0;
3484
3485 qede_init_fp(edev);
3486
3487 rc = qede_alloc_mem_load(edev);
3488 if (rc)
3489 goto err1;
3490 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3491 QEDE_RSS_CNT(edev), edev->num_tc);
3492
3493 rc = qede_set_real_num_queues(edev);
3494 if (rc)
3495 goto err2;
3496
3497 qede_napi_add_enable(edev);
3498 DP_INFO(edev, "Napi added and enabled\n");
3499
3500 rc = qede_setup_irqs(edev);
3501 if (rc)
3502 goto err3;
3503 DP_INFO(edev, "Setup IRQs succeeded\n");
3504
3505 rc = qede_start_queues(edev);
3506 if (rc)
3507 goto err4;
3508 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3509
3510 /* Add primary mac and set Rx filters */
3511 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3512
0d8e0aa0
SK		 3513 mutex_lock(&edev->qede_lock);
3514 edev->state = QEDE_STATE_OPEN;
3515 mutex_unlock(&edev->qede_lock);
a2ec6172 3516
7c1bfcad
SRK		 3517 /* Program un-configured VLANs */
3518 qede_configure_vlan_filters(edev);
3519
a2ec6172
SK		 3520 /* Ask for link-up using current configuration */
3521 memset(&link_params, 0, sizeof(link_params));
3522 link_params.link_up = true;
3523 edev->ops->common->set_link(edev->cdev, &link_params);
3524
3525 /* Query whether link is already-up */
3526 memset(&link_output, 0, sizeof(link_output));
3527 edev->ops->common->get_link(edev->cdev, &link_output);
3528 qede_link_update(edev, &link_output);
3529
2950219d
YM		 3530 DP_INFO(edev, "Ending successfully qede load\n");
3531
3532 return 0;
3533
3534err4:
3535 qede_sync_free_irqs(edev);
3536 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3537err3:
3538 qede_napi_disable_remove(edev);
3539err2:
3540 qede_free_mem_load(edev);
3541err1:
3542 edev->ops->common->set_fp_int(edev->cdev, 0);
3543 qede_free_fp_array(edev);
3544 edev->num_rss = 0;
3545err0:
3546 return rc;
3547}
3548
133fac0e
SK		 3549void qede_reload(struct qede_dev *edev,
3550 void (*func)(struct qede_dev *, union qede_reload_args *),
3551 union qede_reload_args *args)
3552{
3553 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3554 /* Call function handler to update parameters
3555 * needed for function load.
3556 */
3557 if (func)
3558 func(edev, args);
3559
3560 qede_load(edev, QEDE_LOAD_NORMAL);
3561
3562 mutex_lock(&edev->qede_lock);
3563 qede_config_rx_mode(edev->ndev);
3564 mutex_unlock(&edev->qede_lock);
3565}
3566
2950219d
YM		 3567/* called with rtnl_lock */
3568static int qede_open(struct net_device *ndev)
3569{
3570 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3571 int rc;
2950219d
YM		 3572
3573 netif_carrier_off(ndev);
3574
3575 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3576
b18e170c
MC		 3577 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3578
3579 if (rc)
3580 return rc;
3581
3582#ifdef CONFIG_QEDE_VXLAN
3583 vxlan_get_rx_port(ndev);
9a109dd0
MC		 3584#endif
3585#ifdef CONFIG_QEDE_GENEVE
3586 geneve_get_rx_port(ndev);
b18e170c
MC		 3587#endif
3588 return 0;
2950219d
YM		 3589}
3590
3591static int qede_close(struct net_device *ndev)
3592{
3593 struct qede_dev *edev = netdev_priv(ndev);
3594
3595 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3596
3597 return 0;
3598}
0d8e0aa0 3599
a2ec6172
SK		 3600static void qede_link_update(void *dev, struct qed_link_output *link)
3601{
3602 struct qede_dev *edev = dev;
3603
3604 if (!netif_running(edev->ndev)) {
3605 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3606 return;
3607 }
3608
3609 if (link->link_up) {
8e025ae2
YM		 3610 if (!netif_carrier_ok(edev->ndev)) {
3611 DP_NOTICE(edev, "Link is up\n");
3612 netif_tx_start_all_queues(edev->ndev);
3613 netif_carrier_on(edev->ndev);
3614 }
a2ec6172 3615 } else {
8e025ae2
YM		 3616 if (netif_carrier_ok(edev->ndev)) {
3617 DP_NOTICE(edev, "Link is down\n");
3618 netif_tx_disable(edev->ndev);
3619 netif_carrier_off(edev->ndev);
3620 }
a2ec6172
SK		 3621 }
3622}
3623
0d8e0aa0
SK		 3624static int qede_set_mac_addr(struct net_device *ndev, void *p)
3625{
3626 struct qede_dev *edev = netdev_priv(ndev);
3627 struct sockaddr *addr = p;
3628 int rc;
3629
3630 ASSERT_RTNL(); /* @@@TBD To be removed */
3631
3632 DP_INFO(edev, "Set_mac_addr called\n");
3633
3634 if (!is_valid_ether_addr(addr->sa_data)) {
3635 DP_NOTICE(edev, "The MAC address is not valid\n");
3636 return -EFAULT;
3637 }
3638
eff16960
YM		 3639 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3640 DP_NOTICE(edev, "qed prevents setting MAC\n");
3641 return -EINVAL;
3642 }
3643
0d8e0aa0
SK		 3644 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3645
3646 if (!netif_running(ndev)) {
3647 DP_NOTICE(edev, "The device is currently down\n");
3648 return 0;
3649 }
3650
3651 /* Remove the previous primary mac */
3652 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3653 edev->primary_mac);
3654 if (rc)
3655 return rc;
3656
3657 /* Add MAC filter according to the new unicast HW MAC address */
3658 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3659 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3660 edev->primary_mac);
3661}
3662
3663static int
3664qede_configure_mcast_filtering(struct net_device *ndev,
3665 enum qed_filter_rx_mode_type *accept_flags)
3666{
3667 struct qede_dev *edev = netdev_priv(ndev);
3668 unsigned char *mc_macs, *temp;
3669 struct netdev_hw_addr *ha;
3670 int rc = 0, mc_count;
3671 size_t size;
3672
3673 size = 64 * ETH_ALEN;
3674
3675 mc_macs = kzalloc(size, GFP_KERNEL);
3676 if (!mc_macs) {
3677 DP_NOTICE(edev,
3678 "Failed to allocate memory for multicast MACs\n");
3679 rc = -ENOMEM;
3680 goto exit;
3681 }
3682
3683 temp = mc_macs;
3684
3685 /* Remove all previously configured MAC filters */
3686 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3687 mc_macs, 1);
3688 if (rc)
3689 goto exit;
3690
3691 netif_addr_lock_bh(ndev);
3692
3693 mc_count = netdev_mc_count(ndev);
3694 if (mc_count < 64) {
3695 netdev_for_each_mc_addr(ha, ndev) {
3696 ether_addr_copy(temp, ha->addr);
3697 temp += ETH_ALEN;
3698 }
3699 }
3700
3701 netif_addr_unlock_bh(ndev);
3702
3703 /* Check for all multicast @@@TBD resource allocation */
3704 if ((ndev->flags & IFF_ALLMULTI) ||
3705 (mc_count > 64)) {
3706 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3707 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3708 } else {
3709 /* Add all multicast MAC filters */
3710 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3711 mc_macs, mc_count);
3712 }
3713
3714exit:
3715 kfree(mc_macs);
3716 return rc;
3717}
3718
3719static void qede_set_rx_mode(struct net_device *ndev)
3720{
3721 struct qede_dev *edev = netdev_priv(ndev);
3722
3723 DP_INFO(edev, "qede_set_rx_mode called\n");
3724
3725 if (edev->state != QEDE_STATE_OPEN) {
3726 DP_INFO(edev,
3727 "qede_set_rx_mode called while interface is down\n");
3728 } else {
3729 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3730 schedule_delayed_work(&edev->sp_task, 0);
3731 }
3732}
3733
3734/* Must be called with qede_lock held */
3735static void qede_config_rx_mode(struct net_device *ndev)
3736{
3737 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3738 struct qede_dev *edev = netdev_priv(ndev);
3739 struct qed_filter_params rx_mode;
3740 unsigned char *uc_macs, *temp;
3741 struct netdev_hw_addr *ha;
3742 int rc, uc_count;
3743 size_t size;
3744
3745 netif_addr_lock_bh(ndev);
3746
3747 uc_count = netdev_uc_count(ndev);
3748 size = uc_count * ETH_ALEN;
3749
3750 uc_macs = kzalloc(size, GFP_ATOMIC);
3751 if (!uc_macs) {
3752 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3753 netif_addr_unlock_bh(ndev);
3754 return;
3755 }
3756
3757 temp = uc_macs;
3758 netdev_for_each_uc_addr(ha, ndev) {
3759 ether_addr_copy(temp, ha->addr);
3760 temp += ETH_ALEN;
3761 }
3762
3763 netif_addr_unlock_bh(ndev);
3764
3765 /* Configure the struct for the Rx mode */
3766 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3767 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3768
3769 /* Remove all previous unicast secondary macs and multicast macs
3770 * (configrue / leave the primary mac)
3771 */
3772 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3773 edev->primary_mac);
3774 if (rc)
3775 goto out;
3776
3777 /* Check for promiscuous */
3778 if ((ndev->flags & IFF_PROMISC) ||
3779 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3780 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3781 } else {
3782 /* Add MAC filters according to the unicast secondary macs */
3783 int i;
3784
3785 temp = uc_macs;
3786 for (i = 0; i < uc_count; i++) {
3787 rc = qede_set_ucast_rx_mac(edev,
3788 QED_FILTER_XCAST_TYPE_ADD,
3789 temp);
3790 if (rc)
3791 goto out;
3792
3793 temp += ETH_ALEN;
3794 }
3795
3796 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3797 if (rc)
3798 goto out;
3799 }
3800
7c1bfcad
SRK		 3801 /* take care of VLAN mode */
3802 if (ndev->flags & IFF_PROMISC) {
3803 qede_config_accept_any_vlan(edev, true);
3804 } else if (!edev->non_configured_vlans) {
3805 /* It's possible that accept_any_vlan mode is set due to a
3806 * previous setting of IFF_PROMISC. If vlan credits are
3807 * sufficient, disable accept_any_vlan.
3808 */
3809 qede_config_accept_any_vlan(edev, false);
3810 }
3811
0d8e0aa0
SK		 3812 rx_mode.filter.accept_flags = accept_flags;
3813 edev->ops->filter_config(edev->cdev, &rx_mode);
3814out:
3815 kfree(uc_macs);
3816}
Linux kernel - Deliverables
This page took 0.257818 seconds and 5 git commands to generate.