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qed: Add infrastructure support for tunneling
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
5abd7e92
YM		 42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 44
5abd7e92 45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
0e7441d7 56#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
a2ec6172 90static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
a2ec6172
SK		 99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
2950219d
YM		 105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
e712d52b
YM		 140static
141int __init qede_init(void)
142{
143 int ret;
e712d52b
YM		 144
145 pr_notice("qede_init: %s\n", version);
146
95114344 147 qed_ops = qed_get_eth_ops();
e712d52b
YM		 148 if (!qed_ops) {
149 pr_notice("Failed to get qed ethtool operations\n");
150 return -EINVAL;
151 }
152
2950219d
YM		 153 /* Must register notifier before pci ops, since we might miss
154 * interface rename after pci probe and netdev registeration.
155 */
156 ret = register_netdevice_notifier(&qede_netdev_notifier);
157 if (ret) {
158 pr_notice("Failed to register netdevice_notifier\n");
159 qed_put_eth_ops();
160 return -EINVAL;
161 }
162
e712d52b
YM		 163 ret = pci_register_driver(&qede_pci_driver);
164 if (ret) {
165 pr_notice("Failed to register driver\n");
2950219d 166 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 167 qed_put_eth_ops();
168 return -EINVAL;
169 }
170
171 return 0;
172}
173
174static void __exit qede_cleanup(void)
175{
176 pr_notice("qede_cleanup called\n");
177
2950219d 178 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 179 pci_unregister_driver(&qede_pci_driver);
180 qed_put_eth_ops();
181}
182
183module_init(qede_init);
184module_exit(qede_cleanup);
185
2950219d
YM		 186/* -------------------------------------------------------------------------
187 * START OF FAST-PATH
188 * -------------------------------------------------------------------------
189 */
190
191/* Unmap the data and free skb */
192static int qede_free_tx_pkt(struct qede_dev *edev,
193 struct qede_tx_queue *txq,
194 int *len)
195{
196 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
197 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
198 struct eth_tx_1st_bd *first_bd;
199 struct eth_tx_bd *tx_data_bd;
200 int bds_consumed = 0;
201 int nbds;
202 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
203 int i, split_bd_len = 0;
204
205 if (unlikely(!skb)) {
206 DP_ERR(edev,
207 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
208 idx, txq->sw_tx_cons, txq->sw_tx_prod);
209 return -1;
210 }
211
212 *len = skb->len;
213
214 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
215
216 bds_consumed++;
217
218 nbds = first_bd->data.nbds;
219
220 if (data_split) {
221 struct eth_tx_bd *split = (struct eth_tx_bd *)
222 qed_chain_consume(&txq->tx_pbl);
223 split_bd_len = BD_UNMAP_LEN(split);
224 bds_consumed++;
225 }
226 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
227 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
228
229 /* Unmap the data of the skb frags */
230 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
231 tx_data_bd = (struct eth_tx_bd *)
232 qed_chain_consume(&txq->tx_pbl);
233 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
234 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
235 }
236
237 while (bds_consumed++ < nbds)
238 qed_chain_consume(&txq->tx_pbl);
239
240 /* Free skb */
241 dev_kfree_skb_any(skb);
242 txq->sw_tx_ring[idx].skb = NULL;
243 txq->sw_tx_ring[idx].flags = 0;
244
245 return 0;
246}
247
248/* Unmap the data and free skb when mapping failed during start_xmit */
249static void qede_free_failed_tx_pkt(struct qede_dev *edev,
250 struct qede_tx_queue *txq,
251 struct eth_tx_1st_bd *first_bd,
252 int nbd,
253 bool data_split)
254{
255 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
256 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
257 struct eth_tx_bd *tx_data_bd;
258 int i, split_bd_len = 0;
259
260 /* Return prod to its position before this skb was handled */
261 qed_chain_set_prod(&txq->tx_pbl,
262 le16_to_cpu(txq->tx_db.data.bd_prod),
263 first_bd);
264
265 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
266
267 if (data_split) {
268 struct eth_tx_bd *split = (struct eth_tx_bd *)
269 qed_chain_produce(&txq->tx_pbl);
270 split_bd_len = BD_UNMAP_LEN(split);
271 nbd--;
272 }
273
274 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
275 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
276
277 /* Unmap the data of the skb frags */
278 for (i = 0; i < nbd; i++) {
279 tx_data_bd = (struct eth_tx_bd *)
280 qed_chain_produce(&txq->tx_pbl);
281 if (tx_data_bd->nbytes)
282 dma_unmap_page(&edev->pdev->dev,
283 BD_UNMAP_ADDR(tx_data_bd),
284 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
285 }
286
287 /* Return again prod to its position before this skb was handled */
288 qed_chain_set_prod(&txq->tx_pbl,
289 le16_to_cpu(txq->tx_db.data.bd_prod),
290 first_bd);
291
292 /* Free skb */
293 dev_kfree_skb_any(skb);
294 txq->sw_tx_ring[idx].skb = NULL;
295 txq->sw_tx_ring[idx].flags = 0;
296}
297
298static u32 qede_xmit_type(struct qede_dev *edev,
299 struct sk_buff *skb,
300 int *ipv6_ext)
301{
302 u32 rc = XMIT_L4_CSUM;
303 __be16 l3_proto;
304
305 if (skb->ip_summed != CHECKSUM_PARTIAL)
306 return XMIT_PLAIN;
307
308 l3_proto = vlan_get_protocol(skb);
309 if (l3_proto == htons(ETH_P_IPV6) &&
310 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
311 *ipv6_ext = 1;
312
313 if (skb_is_gso(skb))
314 rc |= XMIT_LSO;
315
316 return rc;
317}
318
319static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
320 struct eth_tx_2nd_bd *second_bd,
321 struct eth_tx_3rd_bd *third_bd)
322{
323 u8 l4_proto;
fc48b7a6 324 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 325
fc48b7a6 326 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 327
fc48b7a6 328 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 329 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
330 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
331
fc48b7a6 332 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 333 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
334
335 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
336 l4_proto = ipv6_hdr(skb)->nexthdr;
337 else
338 l4_proto = ip_hdr(skb)->protocol;
339
340 if (l4_proto == IPPROTO_UDP)
fc48b7a6 341 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 342
fc48b7a6 343 if (third_bd)
2950219d 344 third_bd->data.bitfields |=
fc48b7a6
YM		 345 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
346 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
347 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 348
fc48b7a6 349 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 350 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
351}
352
353static int map_frag_to_bd(struct qede_dev *edev,
354 skb_frag_t *frag,
355 struct eth_tx_bd *bd)
356{
357 dma_addr_t mapping;
358
359 /* Map skb non-linear frag data for DMA */
360 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
361 skb_frag_size(frag),
362 DMA_TO_DEVICE);
363 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
364 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
365 return -ENOMEM;
366 }
367
368 /* Setup the data pointer of the frag data */
369 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
370
371 return 0;
372}
373
b1199b10
YM		 374/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
375#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
376static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
377 u8 xmit_type)
378{
379 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
380
381 if (xmit_type & XMIT_LSO) {
382 int hlen;
383
384 hlen = skb_transport_header(skb) +
385 tcp_hdrlen(skb) - skb->data;
386
387 /* linear payload would require its own BD */
388 if (skb_headlen(skb) > hlen)
389 allowed_frags--;
390 }
391
392 return (skb_shinfo(skb)->nr_frags > allowed_frags);
393}
394#endif
395
2950219d
YM		 396/* Main transmit function */
397static
398netdev_tx_t qede_start_xmit(struct sk_buff *skb,
399 struct net_device *ndev)
400{
401 struct qede_dev *edev = netdev_priv(ndev);
402 struct netdev_queue *netdev_txq;
403 struct qede_tx_queue *txq;
404 struct eth_tx_1st_bd *first_bd;
405 struct eth_tx_2nd_bd *second_bd = NULL;
406 struct eth_tx_3rd_bd *third_bd = NULL;
407 struct eth_tx_bd *tx_data_bd = NULL;
408 u16 txq_index;
409 u8 nbd = 0;
410 dma_addr_t mapping;
411 int rc, frag_idx = 0, ipv6_ext = 0;
412 u8 xmit_type;
413 u16 idx;
414 u16 hlen;
415 bool data_split;
416
417 /* Get tx-queue context and netdev index */
418 txq_index = skb_get_queue_mapping(skb);
419 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
420 txq = QEDE_TX_QUEUE(edev, txq_index);
421 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
422
2950219d
YM		 423 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
424 (MAX_SKB_FRAGS + 1));
425
426 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
427
b1199b10
YM		 428#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
429 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
430 if (skb_linearize(skb)) {
431 DP_NOTICE(edev,
432 "SKB linearization failed - silently dropping this SKB\n");
433 dev_kfree_skb_any(skb);
434 return NETDEV_TX_OK;
435 }
436 }
437#endif
438
2950219d
YM		 439 /* Fill the entry in the SW ring and the BDs in the FW ring */
440 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
441 txq->sw_tx_ring[idx].skb = skb;
442 first_bd = (struct eth_tx_1st_bd *)
443 qed_chain_produce(&txq->tx_pbl);
444 memset(first_bd, 0, sizeof(*first_bd));
445 first_bd->data.bd_flags.bitfields =
446 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
447
448 /* Map skb linear data for DMA and set in the first BD */
449 mapping = dma_map_single(&edev->pdev->dev, skb->data,
450 skb_headlen(skb), DMA_TO_DEVICE);
451 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
452 DP_NOTICE(edev, "SKB mapping failed\n");
453 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
454 return NETDEV_TX_OK;
455 }
456 nbd++;
457 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
458
459 /* In case there is IPv6 with extension headers or LSO we need 2nd and
460 * 3rd BDs.
461 */
462 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
463 second_bd = (struct eth_tx_2nd_bd *)
464 qed_chain_produce(&txq->tx_pbl);
465 memset(second_bd, 0, sizeof(*second_bd));
466
467 nbd++;
468 third_bd = (struct eth_tx_3rd_bd *)
469 qed_chain_produce(&txq->tx_pbl);
470 memset(third_bd, 0, sizeof(*third_bd));
471
472 nbd++;
473 /* We need to fill in additional data in second_bd... */
474 tx_data_bd = (struct eth_tx_bd *)second_bd;
475 }
476
477 if (skb_vlan_tag_present(skb)) {
478 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
479 first_bd->data.bd_flags.bitfields |=
480 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
481 }
482
483 /* Fill the parsing flags & params according to the requested offload */
484 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 485 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
486
2950219d
YM		 487 /* We don't re-calculate IP checksum as it is already done by
488 * the upper stack
489 */
490 first_bd->data.bd_flags.bitfields |=
491 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
492
fc48b7a6
YM		 493 first_bd->data.bitfields |= cpu_to_le16(temp);
494
2950219d
YM		 495 /* If the packet is IPv6 with extension header, indicate that
496 * to FW and pass few params, since the device cracker doesn't
497 * support parsing IPv6 with extension header/s.
498 */
499 if (unlikely(ipv6_ext))
500 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
501 }
502
503 if (xmit_type & XMIT_LSO) {
504 first_bd->data.bd_flags.bitfields |=
505 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
506 third_bd->data.lso_mss =
507 cpu_to_le16(skb_shinfo(skb)->gso_size);
508
509 first_bd->data.bd_flags.bitfields |=
510 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
511 hlen = skb_transport_header(skb) +
512 tcp_hdrlen(skb) - skb->data;
513
514 /* @@@TBD - if will not be removed need to check */
515 third_bd->data.bitfields |=
fc48b7a6 516 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 517
518 /* Make life easier for FW guys who can't deal with header and
519 * data on same BD. If we need to split, use the second bd...
520 */
521 if (unlikely(skb_headlen(skb) > hlen)) {
522 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
523 "TSO split header size is %d (%x:%x)\n",
524 first_bd->nbytes, first_bd->addr.hi,
525 first_bd->addr.lo);
526
527 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
528 le32_to_cpu(first_bd->addr.lo)) +
529 hlen;
530
531 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
532 le16_to_cpu(first_bd->nbytes) -
533 hlen);
534
535 /* this marks the BD as one that has no
536 * individual mapping
537 */
538 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
539
540 first_bd->nbytes = cpu_to_le16(hlen);
541
542 tx_data_bd = (struct eth_tx_bd *)third_bd;
543 data_split = true;
544 }
545 }
546
547 /* Handle fragmented skb */
548 /* special handle for frags inside 2nd and 3rd bds.. */
549 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
550 rc = map_frag_to_bd(edev,
551 &skb_shinfo(skb)->frags[frag_idx],
552 tx_data_bd);
553 if (rc) {
554 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
555 data_split);
556 return NETDEV_TX_OK;
557 }
558
559 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
560 tx_data_bd = (struct eth_tx_bd *)third_bd;
561 else
562 tx_data_bd = NULL;
563
564 frag_idx++;
565 }
566
567 /* map last frags into 4th, 5th .... */
568 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
569 tx_data_bd = (struct eth_tx_bd *)
570 qed_chain_produce(&txq->tx_pbl);
571
572 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
573
574 rc = map_frag_to_bd(edev,
575 &skb_shinfo(skb)->frags[frag_idx],
576 tx_data_bd);
577 if (rc) {
578 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
579 data_split);
580 return NETDEV_TX_OK;
581 }
582 }
583
584 /* update the first BD with the actual num BDs */
585 first_bd->data.nbds = nbd;
586
587 netdev_tx_sent_queue(netdev_txq, skb->len);
588
589 skb_tx_timestamp(skb);
590
591 /* Advance packet producer only before sending the packet since mapping
592 * of pages may fail.
593 */
594 txq->sw_tx_prod++;
595
596 /* 'next page' entries are counted in the producer value */
597 txq->tx_db.data.bd_prod =
598 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
599
600 /* wmb makes sure that the BDs data is updated before updating the
601 * producer, otherwise FW may read old data from the BDs.
602 */
603 wmb();
604 barrier();
605 writel(txq->tx_db.raw, txq->doorbell_addr);
606
607 /* mmiowb is needed to synchronize doorbell writes from more than one
608 * processor. It guarantees that the write arrives to the device before
609 * the queue lock is released and another start_xmit is called (possibly
610 * on another CPU). Without this barrier, the next doorbell can bypass
611 * this doorbell. This is applicable to IA64/Altix systems.
612 */
613 mmiowb();
614
615 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
616 < (MAX_SKB_FRAGS + 1))) {
617 netif_tx_stop_queue(netdev_txq);
618 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
619 "Stop queue was called\n");
620 /* paired memory barrier is in qede_tx_int(), we have to keep
621 * ordering of set_bit() in netif_tx_stop_queue() and read of
622 * fp->bd_tx_cons
623 */
624 smp_mb();
625
626 if (qed_chain_get_elem_left(&txq->tx_pbl)
627 >= (MAX_SKB_FRAGS + 1) &&
628 (edev->state == QEDE_STATE_OPEN)) {
629 netif_tx_wake_queue(netdev_txq);
630 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
631 "Wake queue was called\n");
632 }
633 }
634
635 return NETDEV_TX_OK;
636}
637
638static int qede_txq_has_work(struct qede_tx_queue *txq)
639{
640 u16 hw_bd_cons;
641
642 /* Tell compiler that consumer and producer can change */
643 barrier();
644 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
645 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
646 return 0;
647
648 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
649}
650
651static int qede_tx_int(struct qede_dev *edev,
652 struct qede_tx_queue *txq)
653{
654 struct netdev_queue *netdev_txq;
655 u16 hw_bd_cons;
656 unsigned int pkts_compl = 0, bytes_compl = 0;
657 int rc;
658
659 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
660
661 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
662 barrier();
663
664 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
665 int len = 0;
666
667 rc = qede_free_tx_pkt(edev, txq, &len);
668 if (rc) {
669 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
670 hw_bd_cons,
671 qed_chain_get_cons_idx(&txq->tx_pbl));
672 break;
673 }
674
675 bytes_compl += len;
676 pkts_compl++;
677 txq->sw_tx_cons++;
678 }
679
680 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
681
682 /* Need to make the tx_bd_cons update visible to start_xmit()
683 * before checking for netif_tx_queue_stopped(). Without the
684 * memory barrier, there is a small possibility that
685 * start_xmit() will miss it and cause the queue to be stopped
686 * forever.
687 * On the other hand we need an rmb() here to ensure the proper
688 * ordering of bit testing in the following
689 * netif_tx_queue_stopped(txq) call.
690 */
691 smp_mb();
692
693 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
694 /* Taking tx_lock is needed to prevent reenabling the queue
695 * while it's empty. This could have happen if rx_action() gets
696 * suspended in qede_tx_int() after the condition before
697 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
698 *
699 * stops the queue->sees fresh tx_bd_cons->releases the queue->
700 * sends some packets consuming the whole queue again->
701 * stops the queue
702 */
703
704 __netif_tx_lock(netdev_txq, smp_processor_id());
705
706 if ((netif_tx_queue_stopped(netdev_txq)) &&
707 (edev->state == QEDE_STATE_OPEN) &&
708 (qed_chain_get_elem_left(&txq->tx_pbl)
709 >= (MAX_SKB_FRAGS + 1))) {
710 netif_tx_wake_queue(netdev_txq);
711 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
712 "Wake queue was called\n");
713 }
714
715 __netif_tx_unlock(netdev_txq);
716 }
717
718 return 0;
719}
720
721static bool qede_has_rx_work(struct qede_rx_queue *rxq)
722{
723 u16 hw_comp_cons, sw_comp_cons;
724
725 /* Tell compiler that status block fields can change */
726 barrier();
727
728 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
729 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
730
731 return hw_comp_cons != sw_comp_cons;
732}
733
734static bool qede_has_tx_work(struct qede_fastpath *fp)
735{
736 u8 tc;
737
738 for (tc = 0; tc < fp->edev->num_tc; tc++)
739 if (qede_txq_has_work(&fp->txqs[tc]))
740 return true;
741 return false;
742}
743
fc48b7a6
YM		 744/* This function reuses the buffer(from an offset) from
745 * consumer index to producer index in the bd ring
2950219d 746 */
fc48b7a6
YM		 747static inline void qede_reuse_page(struct qede_dev *edev,
748 struct qede_rx_queue *rxq,
749 struct sw_rx_data *curr_cons)
2950219d 750{
2950219d 751 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 752 struct sw_rx_data *curr_prod;
753 dma_addr_t new_mapping;
2950219d 754
fc48b7a6
YM		 755 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
756 *curr_prod = *curr_cons;
2950219d 757
fc48b7a6
YM		 758 new_mapping = curr_prod->mapping + curr_prod->page_offset;
759
760 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
761 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 762
2950219d 763 rxq->sw_rx_prod++;
fc48b7a6
YM		 764 curr_cons->data = NULL;
765}
766
767static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
768 struct qede_rx_queue *rxq,
769 struct sw_rx_data *curr_cons)
770{
771 /* Move to the next segment in the page */
772 curr_cons->page_offset += rxq->rx_buf_seg_size;
773
774 if (curr_cons->page_offset == PAGE_SIZE) {
775 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
776 return -ENOMEM;
777
778 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
779 PAGE_SIZE, DMA_FROM_DEVICE);
780 } else {
781 /* Increment refcount of the page as we don't want
782 * network stack to take the ownership of the page
783 * which can be recycled multiple times by the driver.
784 */
785 atomic_inc(&curr_cons->data->_count);
786 qede_reuse_page(edev, rxq, curr_cons);
787 }
788
789 return 0;
2950219d
YM		 790}
791
792static inline void qede_update_rx_prod(struct qede_dev *edev,
793 struct qede_rx_queue *rxq)
794{
795 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
796 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
797 struct eth_rx_prod_data rx_prods = {0};
798
799 /* Update producers */
800 rx_prods.bd_prod = cpu_to_le16(bd_prod);
801 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
802
803 /* Make sure that the BD and SGE data is updated before updating the
804 * producers since FW might read the BD/SGE right after the producer
805 * is updated.
806 */
807 wmb();
808
809 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
810 (u32 *)&rx_prods);
811
812 /* mmiowb is needed to synchronize doorbell writes from more than one
813 * processor. It guarantees that the write arrives to the device before
814 * the napi lock is released and another qede_poll is called (possibly
815 * on another CPU). Without this barrier, the next doorbell can bypass
816 * this doorbell. This is applicable to IA64/Altix systems.
817 */
818 mmiowb();
819}
820
821static u32 qede_get_rxhash(struct qede_dev *edev,
822 u8 bitfields,
823 __le32 rss_hash,
824 enum pkt_hash_types *rxhash_type)
825{
826 enum rss_hash_type htype;
827
828 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
829
830 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
831 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
832 (htype == RSS_HASH_TYPE_IPV6)) ?
833 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
834 return le32_to_cpu(rss_hash);
835 }
836 *rxhash_type = PKT_HASH_TYPE_NONE;
837 return 0;
838}
839
840static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
841{
842 skb_checksum_none_assert(skb);
843
844 if (csum_flag & QEDE_CSUM_UNNECESSARY)
845 skb->ip_summed = CHECKSUM_UNNECESSARY;
846}
847
848static inline void qede_skb_receive(struct qede_dev *edev,
849 struct qede_fastpath *fp,
850 struct sk_buff *skb,
851 u16 vlan_tag)
852{
853 if (vlan_tag)
854 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
855 vlan_tag);
856
857 napi_gro_receive(&fp->napi, skb);
858}
859
55482edc
MC		 860static void qede_set_gro_params(struct qede_dev *edev,
861 struct sk_buff *skb,
862 struct eth_fast_path_rx_tpa_start_cqe *cqe)
863{
864 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
865
866 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
867 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
868 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
869 else
870 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
871
872 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
873 cqe->header_len;
874}
875
876static int qede_fill_frag_skb(struct qede_dev *edev,
877 struct qede_rx_queue *rxq,
878 u8 tpa_agg_index,
879 u16 len_on_bd)
880{
881 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
882 NUM_RX_BDS_MAX];
883 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
884 struct sk_buff *skb = tpa_info->skb;
885
886 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
887 goto out;
888
889 /* Add one frag and update the appropriate fields in the skb */
890 skb_fill_page_desc(skb, tpa_info->frag_id++,
891 current_bd->data, current_bd->page_offset,
892 len_on_bd);
893
894 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
895 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
896 goto out;
897 }
898
899 qed_chain_consume(&rxq->rx_bd_ring);
900 rxq->sw_rx_cons++;
901
902 skb->data_len += len_on_bd;
903 skb->truesize += rxq->rx_buf_seg_size;
904 skb->len += len_on_bd;
905
906 return 0;
907
908out:
909 return -ENOMEM;
910}
911
912static void qede_tpa_start(struct qede_dev *edev,
913 struct qede_rx_queue *rxq,
914 struct eth_fast_path_rx_tpa_start_cqe *cqe)
915{
916 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
917 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
918 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
919 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
920 dma_addr_t mapping = tpa_info->replace_buf_mapping;
921 struct sw_rx_data *sw_rx_data_cons;
922 struct sw_rx_data *sw_rx_data_prod;
923 enum pkt_hash_types rxhash_type;
924 u32 rxhash;
925
926 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
927 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
928
929 /* Use pre-allocated replacement buffer - we can't release the agg.
930 * start until its over and we don't want to risk allocation failing
931 * here, so re-allocate when aggregation will be over.
932 */
933 dma_unmap_addr_set(sw_rx_data_prod, mapping,
934 dma_unmap_addr(replace_buf, mapping));
935
936 sw_rx_data_prod->data = replace_buf->data;
937 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
938 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
939 sw_rx_data_prod->page_offset = replace_buf->page_offset;
940
941 rxq->sw_rx_prod++;
942
943 /* move partial skb from cons to pool (don't unmap yet)
944 * save mapping, incase we drop the packet later on.
945 */
946 tpa_info->start_buf = *sw_rx_data_cons;
947 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
948 le32_to_cpu(rx_bd_cons->addr.lo));
949
950 tpa_info->start_buf_mapping = mapping;
951 rxq->sw_rx_cons++;
952
953 /* set tpa state to start only if we are able to allocate skb
954 * for this aggregation, otherwise mark as error and aggregation will
955 * be dropped
956 */
957 tpa_info->skb = netdev_alloc_skb(edev->ndev,
958 le16_to_cpu(cqe->len_on_first_bd));
959 if (unlikely(!tpa_info->skb)) {
960 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
961 return;
962 }
963
964 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
965 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
966
967 /* Start filling in the aggregation info */
968 tpa_info->frag_id = 0;
969 tpa_info->agg_state = QEDE_AGG_STATE_START;
970
971 rxhash = qede_get_rxhash(edev, cqe->bitfields,
972 cqe->rss_hash, &rxhash_type);
973 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
974 if ((le16_to_cpu(cqe->pars_flags.flags) >>
975 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
976 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
977 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
978 else
979 tpa_info->vlan_tag = 0;
980
981 /* This is needed in order to enable forwarding support */
982 qede_set_gro_params(edev, tpa_info->skb, cqe);
983
984 if (likely(cqe->ext_bd_len_list[0]))
985 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
986 le16_to_cpu(cqe->ext_bd_len_list[0]));
987
988 if (unlikely(cqe->ext_bd_len_list[1])) {
989 DP_ERR(edev,
990 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
991 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
992 }
993}
994
88f09bd5 995#ifdef CONFIG_INET
55482edc
MC		 996static void qede_gro_ip_csum(struct sk_buff *skb)
997{
998 const struct iphdr *iph = ip_hdr(skb);
999 struct tcphdr *th;
1000
1001 skb_set_network_header(skb, 0);
1002 skb_set_transport_header(skb, sizeof(struct iphdr));
1003 th = tcp_hdr(skb);
1004
1005 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1006 iph->saddr, iph->daddr, 0);
1007
1008 tcp_gro_complete(skb);
1009}
1010
1011static void qede_gro_ipv6_csum(struct sk_buff *skb)
1012{
1013 struct ipv6hdr *iph = ipv6_hdr(skb);
1014 struct tcphdr *th;
1015
1016 skb_set_network_header(skb, 0);
1017 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1018 th = tcp_hdr(skb);
1019
1020 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1021 &iph->saddr, &iph->daddr, 0);
1022 tcp_gro_complete(skb);
1023}
88f09bd5 1024#endif
55482edc
MC		 1025
1026static void qede_gro_receive(struct qede_dev *edev,
1027 struct qede_fastpath *fp,
1028 struct sk_buff *skb,
1029 u16 vlan_tag)
1030{
88f09bd5 1031#ifdef CONFIG_INET
55482edc
MC		 1032 if (skb_shinfo(skb)->gso_size) {
1033 switch (skb->protocol) {
1034 case htons(ETH_P_IP):
1035 qede_gro_ip_csum(skb);
1036 break;
1037 case htons(ETH_P_IPV6):
1038 qede_gro_ipv6_csum(skb);
1039 break;
1040 default:
1041 DP_ERR(edev,
1042 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1043 ntohs(skb->protocol));
1044 }
1045 }
88f09bd5 1046#endif
55482edc
MC		 1047 skb_record_rx_queue(skb, fp->rss_id);
1048 qede_skb_receive(edev, fp, skb, vlan_tag);
1049}
1050
1051static inline void qede_tpa_cont(struct qede_dev *edev,
1052 struct qede_rx_queue *rxq,
1053 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1054{
1055 int i;
1056
1057 for (i = 0; cqe->len_list[i]; i++)
1058 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1059 le16_to_cpu(cqe->len_list[i]));
1060
1061 if (unlikely(i > 1))
1062 DP_ERR(edev,
1063 "Strange - TPA cont with more than a single len_list entry\n");
1064}
1065
1066static void qede_tpa_end(struct qede_dev *edev,
1067 struct qede_fastpath *fp,
1068 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1069{
1070 struct qede_rx_queue *rxq = fp->rxq;
1071 struct qede_agg_info *tpa_info;
1072 struct sk_buff *skb;
1073 int i;
1074
1075 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1076 skb = tpa_info->skb;
1077
1078 for (i = 0; cqe->len_list[i]; i++)
1079 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1080 le16_to_cpu(cqe->len_list[i]));
1081 if (unlikely(i > 1))
1082 DP_ERR(edev,
1083 "Strange - TPA emd with more than a single len_list entry\n");
1084
1085 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1086 goto err;
1087
1088 /* Sanity */
1089 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1090 DP_ERR(edev,
1091 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1092 cqe->num_of_bds, tpa_info->frag_id);
1093 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1094 DP_ERR(edev,
1095 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1096 le16_to_cpu(cqe->total_packet_len), skb->len);
1097
1098 memcpy(skb->data,
1099 page_address(tpa_info->start_buf.data) +
1100 tpa_info->start_cqe.placement_offset +
1101 tpa_info->start_buf.page_offset,
1102 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1103
1104 /* Recycle [mapped] start buffer for the next replacement */
1105 tpa_info->replace_buf = tpa_info->start_buf;
1106 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1107
1108 /* Finalize the SKB */
1109 skb->protocol = eth_type_trans(skb, edev->ndev);
1110 skb->ip_summed = CHECKSUM_UNNECESSARY;
1111
1112 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1113 * to skb_shinfo(skb)->gso_segs
1114 */
1115 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1116
1117 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1118
1119 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1120
1121 return;
1122err:
1123 /* The BD starting the aggregation is still mapped; Re-use it for
1124 * future aggregations [as replacement buffer]
1125 */
1126 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1127 sizeof(struct sw_rx_data));
1128 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1129 tpa_info->start_buf.data = NULL;
1130 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1131 dev_kfree_skb_any(tpa_info->skb);
1132 tpa_info->skb = NULL;
1133}
1134
2950219d
YM		 1135static u8 qede_check_csum(u16 flag)
1136{
1137 u16 csum_flag = 0;
1138 u8 csum = 0;
1139
1140 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1141 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
1142 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1143 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1144 csum = QEDE_CSUM_UNNECESSARY;
1145 }
1146
1147 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1148 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1149
1150 if (csum_flag & flag)
1151 return QEDE_CSUM_ERROR;
1152
1153 return csum;
1154}
1155
1156static int qede_rx_int(struct qede_fastpath *fp, int budget)
1157{
1158 struct qede_dev *edev = fp->edev;
1159 struct qede_rx_queue *rxq = fp->rxq;
1160
1161 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1162 int rx_pkt = 0;
1163 u8 csum_flag;
1164
1165 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1166 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1167
1168 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1169 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1170 * read before it is written by FW, then FW writes CQE and SB, and then
1171 * the CPU reads the hw_comp_cons, it will use an old CQE.
1172 */
1173 rmb();
1174
1175 /* Loop to complete all indicated BDs */
1176 while (sw_comp_cons != hw_comp_cons) {
1177 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1178 enum pkt_hash_types rxhash_type;
1179 enum eth_rx_cqe_type cqe_type;
1180 struct sw_rx_data *sw_rx_data;
1181 union eth_rx_cqe *cqe;
1182 struct sk_buff *skb;
fc48b7a6
YM		 1183 struct page *data;
1184 __le16 flags;
2950219d
YM		 1185 u16 len, pad;
1186 u32 rx_hash;
2950219d
YM		 1187
1188 /* Get the CQE from the completion ring */
1189 cqe = (union eth_rx_cqe *)
1190 qed_chain_consume(&rxq->rx_comp_ring);
1191 cqe_type = cqe->fast_path_regular.type;
1192
1193 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1194 edev->ops->eth_cqe_completion(
1195 edev->cdev, fp->rss_id,
1196 (struct eth_slow_path_rx_cqe *)cqe);
1197 goto next_cqe;
1198 }
1199
55482edc
MC		 1200 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1201 switch (cqe_type) {
1202 case ETH_RX_CQE_TYPE_TPA_START:
1203 qede_tpa_start(edev, rxq,
1204 &cqe->fast_path_tpa_start);
1205 goto next_cqe;
1206 case ETH_RX_CQE_TYPE_TPA_CONT:
1207 qede_tpa_cont(edev, rxq,
1208 &cqe->fast_path_tpa_cont);
1209 goto next_cqe;
1210 case ETH_RX_CQE_TYPE_TPA_END:
1211 qede_tpa_end(edev, fp,
1212 &cqe->fast_path_tpa_end);
1213 goto next_rx_only;
1214 default:
1215 break;
1216 }
1217 }
1218
2950219d
YM		 1219 /* Get the data from the SW ring */
1220 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1221 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1222 data = sw_rx_data->data;
1223
1224 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1225 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1226 pad = fp_cqe->placement_offset;
fc48b7a6 1227 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1228
fc48b7a6
YM		 1229 /* If this is an error packet then drop it */
1230 parse_flag = le16_to_cpu(flags);
2950219d 1231
fc48b7a6
YM		 1232 csum_flag = qede_check_csum(parse_flag);
1233 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1234 DP_NOTICE(edev,
1235 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1236 sw_comp_cons, parse_flag);
1237 rxq->rx_hw_errors++;
1238 qede_reuse_page(edev, rxq, sw_rx_data);
1239 goto next_rx;
1240 }
2950219d 1241
fc48b7a6
YM		 1242 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1243 if (unlikely(!skb)) {
2950219d 1244 DP_NOTICE(edev,
fc48b7a6
YM		 1245 "Build_skb failed, dropping incoming packet\n");
1246 qede_reuse_page(edev, rxq, sw_rx_data);
2950219d 1247 rxq->rx_alloc_errors++;
fc48b7a6
YM		 1248 goto next_rx;
1249 }
1250
1251 /* Copy data into SKB */
1252 if (len + pad <= QEDE_RX_HDR_SIZE) {
1253 memcpy(skb_put(skb, len),
1254 page_address(data) + pad +
1255 sw_rx_data->page_offset, len);
1256 qede_reuse_page(edev, rxq, sw_rx_data);
1257 } else {
1258 struct skb_frag_struct *frag;
1259 unsigned int pull_len;
1260 unsigned char *va;
1261
1262 frag = &skb_shinfo(skb)->frags[0];
1263
1264 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1265 pad + sw_rx_data->page_offset,
1266 len, rxq->rx_buf_seg_size);
1267
1268 va = skb_frag_address(frag);
1269 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1270
1271 /* Align the pull_len to optimize memcpy */
1272 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1273
1274 skb_frag_size_sub(frag, pull_len);
1275 frag->page_offset += pull_len;
1276 skb->data_len -= pull_len;
1277 skb->tail += pull_len;
1278
1279 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1280 sw_rx_data))) {
1281 DP_ERR(edev, "Failed to allocate rx buffer\n");
1282 rxq->rx_alloc_errors++;
1283 goto next_cqe;
1284 }
2950219d
YM		 1285 }
1286
fc48b7a6
YM		 1287 if (fp_cqe->bd_num != 1) {
1288 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1289 u8 num_frags;
1290
1291 pkt_len -= len;
1292
1293 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1294 num_frags--) {
1295 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1296 rxq->rx_buf_size : pkt_len;
1297
1298 WARN_ONCE(!cur_size,
1299 "Still got %d BDs for mapping jumbo, but length became 0\n",
1300 num_frags);
1301
1302 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
1303 goto next_cqe;
1304
1305 rxq->sw_rx_cons++;
1306 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1307 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1308 qed_chain_consume(&rxq->rx_bd_ring);
1309 dma_unmap_page(&edev->pdev->dev,
1310 sw_rx_data->mapping,
1311 PAGE_SIZE, DMA_FROM_DEVICE);
1312
1313 skb_fill_page_desc(skb,
1314 skb_shinfo(skb)->nr_frags++,
1315 sw_rx_data->data, 0,
1316 cur_size);
1317
1318 skb->truesize += PAGE_SIZE;
1319 skb->data_len += cur_size;
1320 skb->len += cur_size;
1321 pkt_len -= cur_size;
1322 }
2950219d 1323
fc48b7a6
YM		 1324 if (pkt_len)
1325 DP_ERR(edev,
1326 "Mapped all BDs of jumbo, but still have %d bytes\n",
1327 pkt_len);
1328 }
2950219d
YM		 1329
1330 skb->protocol = eth_type_trans(skb, edev->ndev);
1331
1332 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1333 fp_cqe->rss_hash,
1334 &rxhash_type);
1335
1336 skb_set_hash(skb, rx_hash, rxhash_type);
1337
1338 qede_set_skb_csum(skb, csum_flag);
1339
1340 skb_record_rx_queue(skb, fp->rss_id);
1341
1342 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1343
1344 qed_chain_consume(&rxq->rx_bd_ring);
2950219d
YM		 1345next_rx:
1346 rxq->sw_rx_cons++;
55482edc 1347next_rx_only:
2950219d
YM		 1348 rx_pkt++;
1349
1350next_cqe: /* don't consume bd rx buffer */
1351 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1352 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1353 /* CR TPA - revisit how to handle budget in TPA perhaps
1354 * increase on "end"
1355 */
1356 if (rx_pkt == budget)
1357 break;
1358 } /* repeat while sw_comp_cons != hw_comp_cons... */
1359
1360 /* Update producers */
1361 qede_update_rx_prod(edev, rxq);
1362
1363 return rx_pkt;
1364}
1365
1366static int qede_poll(struct napi_struct *napi, int budget)
1367{
1368 int work_done = 0;
1369 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1370 napi);
1371 struct qede_dev *edev = fp->edev;
1372
1373 while (1) {
1374 u8 tc;
1375
1376 for (tc = 0; tc < edev->num_tc; tc++)
1377 if (qede_txq_has_work(&fp->txqs[tc]))
1378 qede_tx_int(edev, &fp->txqs[tc]);
1379
1380 if (qede_has_rx_work(fp->rxq)) {
1381 work_done += qede_rx_int(fp, budget - work_done);
1382
1383 /* must not complete if we consumed full budget */
1384 if (work_done >= budget)
1385 break;
1386 }
1387
1388 /* Fall out from the NAPI loop if needed */
1389 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1390 qed_sb_update_sb_idx(fp->sb_info);
1391 /* *_has_*_work() reads the status block,
1392 * thus we need to ensure that status block indices
1393 * have been actually read (qed_sb_update_sb_idx)
1394 * prior to this check (*_has_*_work) so that
1395 * we won't write the "newer" value of the status block
1396 * to HW (if there was a DMA right after
1397 * qede_has_rx_work and if there is no rmb, the memory
1398 * reading (qed_sb_update_sb_idx) may be postponed
1399 * to right before *_ack_sb). In this case there
1400 * will never be another interrupt until there is
1401 * another update of the status block, while there
1402 * is still unhandled work.
1403 */
1404 rmb();
1405
1406 if (!(qede_has_rx_work(fp->rxq) ||
1407 qede_has_tx_work(fp))) {
1408 napi_complete(napi);
1409 /* Update and reenable interrupts */
1410 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1411 1 /*update*/);
1412 break;
1413 }
1414 }
1415 }
1416
1417 return work_done;
1418}
1419
1420static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1421{
1422 struct qede_fastpath *fp = fp_cookie;
1423
1424 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1425
1426 napi_schedule_irqoff(&fp->napi);
1427 return IRQ_HANDLED;
1428}
1429
1430/* -------------------------------------------------------------------------
1431 * END OF FAST-PATH
1432 * -------------------------------------------------------------------------
1433 */
1434
1435static int qede_open(struct net_device *ndev);
1436static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1437static int qede_set_mac_addr(struct net_device *ndev, void *p);
1438static void qede_set_rx_mode(struct net_device *ndev);
1439static void qede_config_rx_mode(struct net_device *ndev);
1440
1441static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1442 enum qed_filter_xcast_params_type opcode,
1443 unsigned char mac[ETH_ALEN])
1444{
1445 struct qed_filter_params filter_cmd;
1446
1447 memset(&filter_cmd, 0, sizeof(filter_cmd));
1448 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1449 filter_cmd.filter.ucast.type = opcode;
1450 filter_cmd.filter.ucast.mac_valid = 1;
1451 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1452
1453 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1454}
1455
7c1bfcad
SRK		 1456static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1457 enum qed_filter_xcast_params_type opcode,
1458 u16 vid)
1459{
1460 struct qed_filter_params filter_cmd;
1461
1462 memset(&filter_cmd, 0, sizeof(filter_cmd));
1463 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1464 filter_cmd.filter.ucast.type = opcode;
1465 filter_cmd.filter.ucast.vlan_valid = 1;
1466 filter_cmd.filter.ucast.vlan = vid;
1467
1468 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1469}
1470
133fac0e
SK		 1471void qede_fill_by_demand_stats(struct qede_dev *edev)
1472{
1473 struct qed_eth_stats stats;
1474
1475 edev->ops->get_vport_stats(edev->cdev, &stats);
1476 edev->stats.no_buff_discards = stats.no_buff_discards;
1477 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1478 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1479 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1480 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1481 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1482 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1483 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1484 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1485
1486 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1487 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1488 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1489 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1490 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1491 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1492 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1493 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1494 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1495 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1496 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1497 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1498
1499 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1500 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1501 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1502 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1503 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1504 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1505 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1506 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1507 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1508 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1509 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1510 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1511 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1512 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1513 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1514 edev->stats.rx_align_errors = stats.rx_align_errors;
1515 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1516 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1517 edev->stats.rx_jabbers = stats.rx_jabbers;
1518 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1519 edev->stats.rx_fragments = stats.rx_fragments;
1520 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1521 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1522 edev->stats.tx_128_to_255_byte_packets =
1523 stats.tx_128_to_255_byte_packets;
1524 edev->stats.tx_256_to_511_byte_packets =
1525 stats.tx_256_to_511_byte_packets;
1526 edev->stats.tx_512_to_1023_byte_packets =
1527 stats.tx_512_to_1023_byte_packets;
1528 edev->stats.tx_1024_to_1518_byte_packets =
1529 stats.tx_1024_to_1518_byte_packets;
1530 edev->stats.tx_1519_to_2047_byte_packets =
1531 stats.tx_1519_to_2047_byte_packets;
1532 edev->stats.tx_2048_to_4095_byte_packets =
1533 stats.tx_2048_to_4095_byte_packets;
1534 edev->stats.tx_4096_to_9216_byte_packets =
1535 stats.tx_4096_to_9216_byte_packets;
1536 edev->stats.tx_9217_to_16383_byte_packets =
1537 stats.tx_9217_to_16383_byte_packets;
1538 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1539 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1540 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1541 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1542 edev->stats.brb_truncates = stats.brb_truncates;
1543 edev->stats.brb_discards = stats.brb_discards;
1544 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1545}
1546
1547static struct rtnl_link_stats64 *qede_get_stats64(
1548 struct net_device *dev,
1549 struct rtnl_link_stats64 *stats)
1550{
1551 struct qede_dev *edev = netdev_priv(dev);
1552
1553 qede_fill_by_demand_stats(edev);
1554
1555 stats->rx_packets = edev->stats.rx_ucast_pkts +
1556 edev->stats.rx_mcast_pkts +
1557 edev->stats.rx_bcast_pkts;
1558 stats->tx_packets = edev->stats.tx_ucast_pkts +
1559 edev->stats.tx_mcast_pkts +
1560 edev->stats.tx_bcast_pkts;
1561
1562 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1563 edev->stats.rx_mcast_bytes +
1564 edev->stats.rx_bcast_bytes;
1565
1566 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1567 edev->stats.tx_mcast_bytes +
1568 edev->stats.tx_bcast_bytes;
1569
1570 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1571 stats->multicast = edev->stats.rx_mcast_pkts +
1572 edev->stats.rx_bcast_pkts;
1573
1574 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1575
1576 stats->collisions = edev->stats.tx_total_collisions;
1577 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1578 stats->rx_frame_errors = edev->stats.rx_align_errors;
1579
1580 return stats;
1581}
1582
7c1bfcad
SRK		 1583static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1584{
1585 struct qed_update_vport_params params;
1586 int rc;
1587
1588 /* Proceed only if action actually needs to be performed */
1589 if (edev->accept_any_vlan == action)
1590 return;
1591
1592 memset(&params, 0, sizeof(params));
1593
1594 params.vport_id = 0;
1595 params.accept_any_vlan = action;
1596 params.update_accept_any_vlan_flg = 1;
1597
1598 rc = edev->ops->vport_update(edev->cdev, &params);
1599 if (rc) {
1600 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1601 action ? "enable" : "disable");
1602 } else {
1603 DP_INFO(edev, "%s accept-any-vlan\n",
1604 action ? "enabled" : "disabled");
1605 edev->accept_any_vlan = action;
1606 }
1607}
1608
1609static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1610{
1611 struct qede_dev *edev = netdev_priv(dev);
1612 struct qede_vlan *vlan, *tmp;
1613 int rc;
1614
1615 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1616
1617 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1618 if (!vlan) {
1619 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1620 return -ENOMEM;
1621 }
1622 INIT_LIST_HEAD(&vlan->list);
1623 vlan->vid = vid;
1624 vlan->configured = false;
1625
1626 /* Verify vlan isn't already configured */
1627 list_for_each_entry(tmp, &edev->vlan_list, list) {
1628 if (tmp->vid == vlan->vid) {
1629 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1630 "vlan already configured\n");
1631 kfree(vlan);
1632 return -EEXIST;
1633 }
1634 }
1635
1636 /* If interface is down, cache this VLAN ID and return */
1637 if (edev->state != QEDE_STATE_OPEN) {
1638 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1639 "Interface is down, VLAN %d will be configured when interface is up\n",
1640 vid);
1641 if (vid != 0)
1642 edev->non_configured_vlans++;
1643 list_add(&vlan->list, &edev->vlan_list);
1644
1645 return 0;
1646 }
1647
1648 /* Check for the filter limit.
1649 * Note - vlan0 has a reserved filter and can be added without
1650 * worrying about quota
1651 */
1652 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1653 (vlan->vid == 0)) {
1654 rc = qede_set_ucast_rx_vlan(edev,
1655 QED_FILTER_XCAST_TYPE_ADD,
1656 vlan->vid);
1657 if (rc) {
1658 DP_ERR(edev, "Failed to configure VLAN %d\n",
1659 vlan->vid);
1660 kfree(vlan);
1661 return -EINVAL;
1662 }
1663 vlan->configured = true;
1664
1665 /* vlan0 filter isn't consuming out of our quota */
1666 if (vlan->vid != 0)
1667 edev->configured_vlans++;
1668 } else {
1669 /* Out of quota; Activate accept-any-VLAN mode */
1670 if (!edev->non_configured_vlans)
1671 qede_config_accept_any_vlan(edev, true);
1672
1673 edev->non_configured_vlans++;
1674 }
1675
1676 list_add(&vlan->list, &edev->vlan_list);
1677
1678 return 0;
1679}
1680
1681static void qede_del_vlan_from_list(struct qede_dev *edev,
1682 struct qede_vlan *vlan)
1683{
1684 /* vlan0 filter isn't consuming out of our quota */
1685 if (vlan->vid != 0) {
1686 if (vlan->configured)
1687 edev->configured_vlans--;
1688 else
1689 edev->non_configured_vlans--;
1690 }
1691
1692 list_del(&vlan->list);
1693 kfree(vlan);
1694}
1695
1696static int qede_configure_vlan_filters(struct qede_dev *edev)
1697{
1698 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1699 struct qed_dev_eth_info *dev_info;
1700 struct qede_vlan *vlan = NULL;
1701
1702 if (list_empty(&edev->vlan_list))
1703 return 0;
1704
1705 dev_info = &edev->dev_info;
1706
1707 /* Configure non-configured vlans */
1708 list_for_each_entry(vlan, &edev->vlan_list, list) {
1709 if (vlan->configured)
1710 continue;
1711
1712 /* We have used all our credits, now enable accept_any_vlan */
1713 if ((vlan->vid != 0) &&
1714 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1715 accept_any_vlan = 1;
1716 continue;
1717 }
1718
1719 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1720
1721 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1722 vlan->vid);
1723 if (rc) {
1724 DP_ERR(edev, "Failed to configure VLAN %u\n",
1725 vlan->vid);
1726 real_rc = rc;
1727 continue;
1728 }
1729
1730 vlan->configured = true;
1731 /* vlan0 filter doesn't consume our VLAN filter's quota */
1732 if (vlan->vid != 0) {
1733 edev->non_configured_vlans--;
1734 edev->configured_vlans++;
1735 }
1736 }
1737
1738 /* enable accept_any_vlan mode if we have more VLANs than credits,
1739 * or remove accept_any_vlan mode if we've actually removed
1740 * a non-configured vlan, and all remaining vlans are truly configured.
1741 */
1742
1743 if (accept_any_vlan)
1744 qede_config_accept_any_vlan(edev, true);
1745 else if (!edev->non_configured_vlans)
1746 qede_config_accept_any_vlan(edev, false);
1747
1748 return real_rc;
1749}
1750
1751static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1752{
1753 struct qede_dev *edev = netdev_priv(dev);
1754 struct qede_vlan *vlan = NULL;
1755 int rc;
1756
1757 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1758
1759 /* Find whether entry exists */
1760 list_for_each_entry(vlan, &edev->vlan_list, list)
1761 if (vlan->vid == vid)
1762 break;
1763
1764 if (!vlan || (vlan->vid != vid)) {
1765 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1766 "Vlan isn't configured\n");
1767 return 0;
1768 }
1769
1770 if (edev->state != QEDE_STATE_OPEN) {
1771 /* As interface is already down, we don't have a VPORT
1772 * instance to remove vlan filter. So just update vlan list
1773 */
1774 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1775 "Interface is down, removing VLAN from list only\n");
1776 qede_del_vlan_from_list(edev, vlan);
1777 return 0;
1778 }
1779
1780 /* Remove vlan */
1781 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1782 if (rc) {
1783 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1784 return -EINVAL;
1785 }
1786
1787 qede_del_vlan_from_list(edev, vlan);
1788
1789 /* We have removed a VLAN - try to see if we can
1790 * configure non-configured VLAN from the list.
1791 */
1792 rc = qede_configure_vlan_filters(edev);
1793
1794 return rc;
1795}
1796
1797static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1798{
1799 struct qede_vlan *vlan = NULL;
1800
1801 if (list_empty(&edev->vlan_list))
1802 return;
1803
1804 list_for_each_entry(vlan, &edev->vlan_list, list) {
1805 if (!vlan->configured)
1806 continue;
1807
1808 vlan->configured = false;
1809
1810 /* vlan0 filter isn't consuming out of our quota */
1811 if (vlan->vid != 0) {
1812 edev->non_configured_vlans++;
1813 edev->configured_vlans--;
1814 }
1815
1816 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1817 "marked vlan %d as non-configured\n",
1818 vlan->vid);
1819 }
1820
1821 edev->accept_any_vlan = false;
1822}
1823
2950219d
YM		 1824static const struct net_device_ops qede_netdev_ops = {
1825 .ndo_open = qede_open,
1826 .ndo_stop = qede_close,
1827 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1828 .ndo_set_rx_mode = qede_set_rx_mode,
1829 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1830 .ndo_validate_addr = eth_validate_addr,
133fac0e 1831 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 1832 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1833 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 1834 .ndo_get_stats64 = qede_get_stats64,
2950219d
YM		 1835};
1836
e712d52b
YM		 1837/* -------------------------------------------------------------------------
1838 * START OF PROBE / REMOVE
1839 * -------------------------------------------------------------------------
1840 */
1841
1842static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1843 struct pci_dev *pdev,
1844 struct qed_dev_eth_info *info,
1845 u32 dp_module,
1846 u8 dp_level)
1847{
1848 struct net_device *ndev;
1849 struct qede_dev *edev;
1850
1851 ndev = alloc_etherdev_mqs(sizeof(*edev),
1852 info->num_queues,
1853 info->num_queues);
1854 if (!ndev) {
1855 pr_err("etherdev allocation failed\n");
1856 return NULL;
1857 }
1858
1859 edev = netdev_priv(ndev);
1860 edev->ndev = ndev;
1861 edev->cdev = cdev;
1862 edev->pdev = pdev;
1863 edev->dp_module = dp_module;
1864 edev->dp_level = dp_level;
1865 edev->ops = qed_ops;
2950219d
YM		 1866 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1867 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1868
1869 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1870
1871 SET_NETDEV_DEV(ndev, &pdev->dev);
1872
133fac0e 1873 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1874 memcpy(&edev->dev_info, info, sizeof(*info));
1875
1876 edev->num_tc = edev->dev_info.num_tc;
1877
7c1bfcad
SRK		 1878 INIT_LIST_HEAD(&edev->vlan_list);
1879
e712d52b
YM		 1880 return edev;
1881}
1882
1883static void qede_init_ndev(struct qede_dev *edev)
1884{
1885 struct net_device *ndev = edev->ndev;
1886 struct pci_dev *pdev = edev->pdev;
1887 u32 hw_features;
1888
1889 pci_set_drvdata(pdev, ndev);
1890
1891 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1892 ndev->base_addr = ndev->mem_start;
1893 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1894 ndev->irq = edev->dev_info.common.pci_irq;
1895
1896 ndev->watchdog_timeo = TX_TIMEOUT;
1897
2950219d
YM		 1898 ndev->netdev_ops = &qede_netdev_ops;
1899
133fac0e
SK		 1900 qede_set_ethtool_ops(ndev);
1901
e712d52b
YM		 1902 /* user-changeble features */
1903 hw_features = NETIF_F_GRO | NETIF_F_SG |
1904 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1905 NETIF_F_TSO | NETIF_F_TSO6;
1906
1907 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1908 NETIF_F_HIGHDMA;
1909 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1910 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 1911 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 1912
1913 ndev->hw_features = hw_features;
1914
1915 /* Set network device HW mac */
1916 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1917}
1918
1919/* This function converts from 32b param to two params of level and module
1920 * Input 32b decoding:
1921 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1922 * 'happy' flow, e.g. memory allocation failed.
1923 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1924 * and provide important parameters.
1925 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1926 * module. VERBOSE prints are for tracking the specific flow in low level.
1927 *
1928 * Notice that the level should be that of the lowest required logs.
1929 */
133fac0e 1930void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 1931{
1932 *p_dp_level = QED_LEVEL_NOTICE;
1933 *p_dp_module = 0;
1934
1935 if (debug & QED_LOG_VERBOSE_MASK) {
1936 *p_dp_level = QED_LEVEL_VERBOSE;
1937 *p_dp_module = (debug & 0x3FFFFFFF);
1938 } else if (debug & QED_LOG_INFO_MASK) {
1939 *p_dp_level = QED_LEVEL_INFO;
1940 } else if (debug & QED_LOG_NOTICE_MASK) {
1941 *p_dp_level = QED_LEVEL_NOTICE;
1942 }
1943}
1944
2950219d
YM		 1945static void qede_free_fp_array(struct qede_dev *edev)
1946{
1947 if (edev->fp_array) {
1948 struct qede_fastpath *fp;
1949 int i;
1950
1951 for_each_rss(i) {
1952 fp = &edev->fp_array[i];
1953
1954 kfree(fp->sb_info);
1955 kfree(fp->rxq);
1956 kfree(fp->txqs);
1957 }
1958 kfree(edev->fp_array);
1959 }
1960 edev->num_rss = 0;
1961}
1962
1963static int qede_alloc_fp_array(struct qede_dev *edev)
1964{
1965 struct qede_fastpath *fp;
1966 int i;
1967
1968 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
1969 sizeof(*edev->fp_array), GFP_KERNEL);
1970 if (!edev->fp_array) {
1971 DP_NOTICE(edev, "fp array allocation failed\n");
1972 goto err;
1973 }
1974
1975 for_each_rss(i) {
1976 fp = &edev->fp_array[i];
1977
1978 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
1979 if (!fp->sb_info) {
1980 DP_NOTICE(edev, "sb info struct allocation failed\n");
1981 goto err;
1982 }
1983
1984 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
1985 if (!fp->rxq) {
1986 DP_NOTICE(edev, "RXQ struct allocation failed\n");
1987 goto err;
1988 }
1989
1990 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
1991 if (!fp->txqs) {
1992 DP_NOTICE(edev, "TXQ array allocation failed\n");
1993 goto err;
1994 }
1995 }
1996
1997 return 0;
1998err:
1999 qede_free_fp_array(edev);
2000 return -ENOMEM;
2001}
2002
0d8e0aa0
SK		 2003static void qede_sp_task(struct work_struct *work)
2004{
2005 struct qede_dev *edev = container_of(work, struct qede_dev,
2006 sp_task.work);
2007 mutex_lock(&edev->qede_lock);
2008
2009 if (edev->state == QEDE_STATE_OPEN) {
2010 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2011 qede_config_rx_mode(edev->ndev);
2012 }
2013
2014 mutex_unlock(&edev->qede_lock);
2015}
2016
e712d52b
YM		 2017static void qede_update_pf_params(struct qed_dev *cdev)
2018{
2019 struct qed_pf_params pf_params;
2020
2021 /* 16 rx + 16 tx */
2022 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2023 pf_params.eth_pf_params.num_cons = 32;
2024 qed_ops->common->update_pf_params(cdev, &pf_params);
2025}
2026
2027enum qede_probe_mode {
2028 QEDE_PROBE_NORMAL,
2029};
2030
2031static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2032 enum qede_probe_mode mode)
2033{
2034 struct qed_slowpath_params params;
2035 struct qed_dev_eth_info dev_info;
2036 struct qede_dev *edev;
2037 struct qed_dev *cdev;
2038 int rc;
2039
2040 if (unlikely(dp_level & QED_LEVEL_INFO))
2041 pr_notice("Starting qede probe\n");
2042
2043 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2044 dp_module, dp_level);
2045 if (!cdev) {
2046 rc = -ENODEV;
2047 goto err0;
2048 }
2049
2050 qede_update_pf_params(cdev);
2051
2052 /* Start the Slowpath-process */
2053 memset(&params, 0, sizeof(struct qed_slowpath_params));
2054 params.int_mode = QED_INT_MODE_MSIX;
2055 params.drv_major = QEDE_MAJOR_VERSION;
2056 params.drv_minor = QEDE_MINOR_VERSION;
2057 params.drv_rev = QEDE_REVISION_VERSION;
2058 params.drv_eng = QEDE_ENGINEERING_VERSION;
2059 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2060 rc = qed_ops->common->slowpath_start(cdev, &params);
2061 if (rc) {
2062 pr_notice("Cannot start slowpath\n");
2063 goto err1;
2064 }
2065
2066 /* Learn information crucial for qede to progress */
2067 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2068 if (rc)
2069 goto err2;
2070
2071 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2072 dp_level);
2073 if (!edev) {
2074 rc = -ENOMEM;
2075 goto err2;
2076 }
2077
2078 qede_init_ndev(edev);
2079
2950219d
YM		 2080 rc = register_netdev(edev->ndev);
2081 if (rc) {
2082 DP_NOTICE(edev, "Cannot register net-device\n");
2083 goto err3;
2084 }
2085
e712d52b
YM		 2086 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2087
a2ec6172
SK		 2088 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2089
0d8e0aa0
SK		 2090 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2091 mutex_init(&edev->qede_lock);
2092
e712d52b
YM		 2093 DP_INFO(edev, "Ending successfully qede probe\n");
2094
2095 return 0;
2096
2950219d
YM		 2097err3:
2098 free_netdev(edev->ndev);
e712d52b
YM		 2099err2:
2100 qed_ops->common->slowpath_stop(cdev);
2101err1:
2102 qed_ops->common->remove(cdev);
2103err0:
2104 return rc;
2105}
2106
2107static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2108{
2109 u32 dp_module = 0;
2110 u8 dp_level = 0;
2111
2112 qede_config_debug(debug, &dp_module, &dp_level);
2113
2114 return __qede_probe(pdev, dp_module, dp_level,
2115 QEDE_PROBE_NORMAL);
2116}
2117
2118enum qede_remove_mode {
2119 QEDE_REMOVE_NORMAL,
2120};
2121
2122static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2123{
2124 struct net_device *ndev = pci_get_drvdata(pdev);
2125 struct qede_dev *edev = netdev_priv(ndev);
2126 struct qed_dev *cdev = edev->cdev;
2127
2128 DP_INFO(edev, "Starting qede_remove\n");
2129
0d8e0aa0 2130 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2131 unregister_netdev(ndev);
2132
e712d52b
YM		 2133 edev->ops->common->set_power_state(cdev, PCI_D0);
2134
2135 pci_set_drvdata(pdev, NULL);
2136
2137 free_netdev(ndev);
2138
2139 /* Use global ops since we've freed edev */
2140 qed_ops->common->slowpath_stop(cdev);
2141 qed_ops->common->remove(cdev);
2142
2143 pr_notice("Ending successfully qede_remove\n");
2144}
2145
2146static void qede_remove(struct pci_dev *pdev)
2147{
2148 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2149}
2950219d
YM		 2150
2151/* -------------------------------------------------------------------------
2152 * START OF LOAD / UNLOAD
2153 * -------------------------------------------------------------------------
2154 */
2155
2156static int qede_set_num_queues(struct qede_dev *edev)
2157{
2158 int rc;
2159 u16 rss_num;
2160
2161 /* Setup queues according to possible resources*/
8edf049d
SK		 2162 if (edev->req_rss)
2163 rss_num = edev->req_rss;
2164 else
2165 rss_num = netif_get_num_default_rss_queues() *
2166 edev->dev_info.common.num_hwfns;
2950219d
YM		 2167
2168 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2169
2170 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2171 if (rc > 0) {
2172 /* Managed to request interrupts for our queues */
2173 edev->num_rss = rc;
2174 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2175 QEDE_RSS_CNT(edev), rss_num);
2176 rc = 0;
2177 }
2178 return rc;
2179}
2180
2181static void qede_free_mem_sb(struct qede_dev *edev,
2182 struct qed_sb_info *sb_info)
2183{
2184 if (sb_info->sb_virt)
2185 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2186 (void *)sb_info->sb_virt, sb_info->sb_phys);
2187}
2188
2189/* This function allocates fast-path status block memory */
2190static int qede_alloc_mem_sb(struct qede_dev *edev,
2191 struct qed_sb_info *sb_info,
2192 u16 sb_id)
2193{
2194 struct status_block *sb_virt;
2195 dma_addr_t sb_phys;
2196 int rc;
2197
2198 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2199 sizeof(*sb_virt),
2200 &sb_phys, GFP_KERNEL);
2201 if (!sb_virt) {
2202 DP_ERR(edev, "Status block allocation failed\n");
2203 return -ENOMEM;
2204 }
2205
2206 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2207 sb_virt, sb_phys, sb_id,
2208 QED_SB_TYPE_L2_QUEUE);
2209 if (rc) {
2210 DP_ERR(edev, "Status block initialization failed\n");
2211 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2212 sb_virt, sb_phys);
2213 return rc;
2214 }
2215
2216 return 0;
2217}
2218
2219static void qede_free_rx_buffers(struct qede_dev *edev,
2220 struct qede_rx_queue *rxq)
2221{
2222 u16 i;
2223
2224 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2225 struct sw_rx_data *rx_buf;
fc48b7a6 2226 struct page *data;
2950219d
YM		 2227
2228 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2229 data = rx_buf->data;
2230
fc48b7a6
YM		 2231 dma_unmap_page(&edev->pdev->dev,
2232 rx_buf->mapping,
2233 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2234
2235 rx_buf->data = NULL;
fc48b7a6 2236 __free_page(data);
2950219d
YM		 2237 }
2238}
2239
55482edc
MC		 2240static void qede_free_sge_mem(struct qede_dev *edev,
2241 struct qede_rx_queue *rxq) {
2242 int i;
2243
2244 if (edev->gro_disable)
2245 return;
2246
2247 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2248 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2249 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2250
2251 if (replace_buf) {
2252 dma_unmap_page(&edev->pdev->dev,
2253 dma_unmap_addr(replace_buf, mapping),
2254 PAGE_SIZE, DMA_FROM_DEVICE);
2255 __free_page(replace_buf->data);
2256 }
2257 }
2258}
2259
2950219d
YM		 2260static void qede_free_mem_rxq(struct qede_dev *edev,
2261 struct qede_rx_queue *rxq)
2262{
55482edc
MC		 2263 qede_free_sge_mem(edev, rxq);
2264
2950219d
YM		 2265 /* Free rx buffers */
2266 qede_free_rx_buffers(edev, rxq);
2267
2268 /* Free the parallel SW ring */
2269 kfree(rxq->sw_rx_ring);
2270
2271 /* Free the real RQ ring used by FW */
2272 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2273 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2274}
2275
2276static int qede_alloc_rx_buffer(struct qede_dev *edev,
2277 struct qede_rx_queue *rxq)
2278{
2279 struct sw_rx_data *sw_rx_data;
2280 struct eth_rx_bd *rx_bd;
2281 dma_addr_t mapping;
fc48b7a6 2282 struct page *data;
2950219d 2283 u16 rx_buf_size;
2950219d
YM		 2284
2285 rx_buf_size = rxq->rx_buf_size;
2286
fc48b7a6 2287 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2288 if (unlikely(!data)) {
fc48b7a6 2289 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2290 return -ENOMEM;
2291 }
2292
fc48b7a6
YM		 2293 /* Map the entire page as it would be used
2294 * for multiple RX buffer segment size mapping.
2295 */
2296 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2297 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2298 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2299 __free_page(data);
2950219d
YM		 2300 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2301 return -ENOMEM;
2302 }
2303
2304 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2305 sw_rx_data->page_offset = 0;
2950219d 2306 sw_rx_data->data = data;
fc48b7a6 2307 sw_rx_data->mapping = mapping;
2950219d
YM		 2308
2309 /* Advance PROD and get BD pointer */
2310 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2311 WARN_ON(!rx_bd);
2312 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2313 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2314
2315 rxq->sw_rx_prod++;
2316
2317 return 0;
2318}
2319
55482edc
MC		 2320static int qede_alloc_sge_mem(struct qede_dev *edev,
2321 struct qede_rx_queue *rxq)
2322{
2323 dma_addr_t mapping;
2324 int i;
2325
2326 if (edev->gro_disable)
2327 return 0;
2328
2329 if (edev->ndev->mtu > PAGE_SIZE) {
2330 edev->gro_disable = 1;
2331 return 0;
2332 }
2333
2334 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2335 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2336 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2337
2338 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2339 if (unlikely(!replace_buf->data)) {
2340 DP_NOTICE(edev,
2341 "Failed to allocate TPA skb pool [replacement buffer]\n");
2342 goto err;
2343 }
2344
2345 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2346 rxq->rx_buf_size, DMA_FROM_DEVICE);
2347 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2348 DP_NOTICE(edev,
2349 "Failed to map TPA replacement buffer\n");
2350 goto err;
2351 }
2352
2353 dma_unmap_addr_set(replace_buf, mapping, mapping);
2354 tpa_info->replace_buf.page_offset = 0;
2355
2356 tpa_info->replace_buf_mapping = mapping;
2357 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2358 }
2359
2360 return 0;
2361err:
2362 qede_free_sge_mem(edev, rxq);
2363 edev->gro_disable = 1;
2364 return -ENOMEM;
2365}
2366
2950219d
YM		 2367/* This function allocates all memory needed per Rx queue */
2368static int qede_alloc_mem_rxq(struct qede_dev *edev,
2369 struct qede_rx_queue *rxq)
2370{
2371 int i, rc, size, num_allocated;
2372
2373 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2374
fc48b7a6
YM		 2375 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2376 edev->ndev->mtu;
2377 if (rxq->rx_buf_size > PAGE_SIZE)
2378 rxq->rx_buf_size = PAGE_SIZE;
2379
2380 /* Segment size to spilt a page in multiple equal parts */
2381 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2382
2383 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2384 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2385 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2386 if (!rxq->sw_rx_ring) {
2387 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2388 goto err;
2389 }
2390
2391 /* Allocate FW Rx ring */
2392 rc = edev->ops->common->chain_alloc(edev->cdev,
2393 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2394 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2395 RX_RING_SIZE,
2950219d
YM		 2396 sizeof(struct eth_rx_bd),
2397 &rxq->rx_bd_ring);
2398
2399 if (rc)
2400 goto err;
2401
2402 /* Allocate FW completion ring */
2403 rc = edev->ops->common->chain_alloc(edev->cdev,
2404 QED_CHAIN_USE_TO_CONSUME,
2405 QED_CHAIN_MODE_PBL,
fc48b7a6 2406 RX_RING_SIZE,
2950219d
YM		 2407 sizeof(union eth_rx_cqe),
2408 &rxq->rx_comp_ring);
2409 if (rc)
2410 goto err;
2411
2412 /* Allocate buffers for the Rx ring */
2413 for (i = 0; i < rxq->num_rx_buffers; i++) {
2414 rc = qede_alloc_rx_buffer(edev, rxq);
2415 if (rc)
2416 break;
2417 }
2418 num_allocated = i;
2419 if (!num_allocated) {
2420 DP_ERR(edev, "Rx buffers allocation failed\n");
2421 goto err;
2422 } else if (num_allocated < rxq->num_rx_buffers) {
2423 DP_NOTICE(edev,
2424 "Allocated less buffers than desired (%d allocated)\n",
2425 num_allocated);
2426 }
2427
55482edc
MC		 2428 qede_alloc_sge_mem(edev, rxq);
2429
2950219d
YM		 2430 return 0;
2431
2432err:
2433 qede_free_mem_rxq(edev, rxq);
2434 return -ENOMEM;
2435}
2436
2437static void qede_free_mem_txq(struct qede_dev *edev,
2438 struct qede_tx_queue *txq)
2439{
2440 /* Free the parallel SW ring */
2441 kfree(txq->sw_tx_ring);
2442
2443 /* Free the real RQ ring used by FW */
2444 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2445}
2446
2447/* This function allocates all memory needed per Tx queue */
2448static int qede_alloc_mem_txq(struct qede_dev *edev,
2449 struct qede_tx_queue *txq)
2450{
2451 int size, rc;
2452 union eth_tx_bd_types *p_virt;
2453
2454 txq->num_tx_buffers = edev->q_num_tx_buffers;
2455
2456 /* Allocate the parallel driver ring for Tx buffers */
2457 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2458 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2459 if (!txq->sw_tx_ring) {
2460 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2461 goto err;
2462 }
2463
2464 rc = edev->ops->common->chain_alloc(edev->cdev,
2465 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2466 QED_CHAIN_MODE_PBL,
2467 NUM_TX_BDS_MAX,
2468 sizeof(*p_virt),
2469 &txq->tx_pbl);
2470 if (rc)
2471 goto err;
2472
2473 return 0;
2474
2475err:
2476 qede_free_mem_txq(edev, txq);
2477 return -ENOMEM;
2478}
2479
2480/* This function frees all memory of a single fp */
2481static void qede_free_mem_fp(struct qede_dev *edev,
2482 struct qede_fastpath *fp)
2483{
2484 int tc;
2485
2486 qede_free_mem_sb(edev, fp->sb_info);
2487
2488 qede_free_mem_rxq(edev, fp->rxq);
2489
2490 for (tc = 0; tc < edev->num_tc; tc++)
2491 qede_free_mem_txq(edev, &fp->txqs[tc]);
2492}
2493
2494/* This function allocates all memory needed for a single fp (i.e. an entity
2495 * which contains status block, one rx queue and multiple per-TC tx queues.
2496 */
2497static int qede_alloc_mem_fp(struct qede_dev *edev,
2498 struct qede_fastpath *fp)
2499{
2500 int rc, tc;
2501
2502 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2503 if (rc)
2504 goto err;
2505
2506 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2507 if (rc)
2508 goto err;
2509
2510 for (tc = 0; tc < edev->num_tc; tc++) {
2511 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2512 if (rc)
2513 goto err;
2514 }
2515
2516 return 0;
2517
2518err:
2519 qede_free_mem_fp(edev, fp);
2520 return -ENOMEM;
2521}
2522
2523static void qede_free_mem_load(struct qede_dev *edev)
2524{
2525 int i;
2526
2527 for_each_rss(i) {
2528 struct qede_fastpath *fp = &edev->fp_array[i];
2529
2530 qede_free_mem_fp(edev, fp);
2531 }
2532}
2533
2534/* This function allocates all qede memory at NIC load. */
2535static int qede_alloc_mem_load(struct qede_dev *edev)
2536{
2537 int rc = 0, rss_id;
2538
2539 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2540 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2541
2542 rc = qede_alloc_mem_fp(edev, fp);
2543 if (rc)
2544 break;
2545 }
2546
2547 if (rss_id != QEDE_RSS_CNT(edev)) {
2548 /* Failed allocating memory for all the queues */
2549 if (!rss_id) {
2550 DP_ERR(edev,
2551 "Failed to allocate memory for the leading queue\n");
2552 rc = -ENOMEM;
2553 } else {
2554 DP_NOTICE(edev,
2555 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
2556 QEDE_RSS_CNT(edev), rss_id);
2557 }
2558 edev->num_rss = rss_id;
2559 }
2560
2561 return 0;
2562}
2563
2564/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2565static void qede_init_fp(struct qede_dev *edev)
2566{
2567 int rss_id, txq_index, tc;
2568 struct qede_fastpath *fp;
2569
2570 for_each_rss(rss_id) {
2571 fp = &edev->fp_array[rss_id];
2572
2573 fp->edev = edev;
2574 fp->rss_id = rss_id;
2575
2576 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2577
2578 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2579
2580 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2581 fp->rxq->rxq_id = rss_id;
2582
2583 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2584 for (tc = 0; tc < edev->num_tc; tc++) {
2585 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2586 fp->txqs[tc].index = txq_index;
2587 }
2588
2589 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2590 edev->ndev->name, rss_id);
2591 }
55482edc
MC		 2592
2593 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2594}
2595
2596static int qede_set_real_num_queues(struct qede_dev *edev)
2597{
2598 int rc = 0;
2599
2600 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2601 if (rc) {
2602 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2603 return rc;
2604 }
2605 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2606 if (rc) {
2607 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2608 return rc;
2609 }
2610
2611 return 0;
2612}
2613
2614static void qede_napi_disable_remove(struct qede_dev *edev)
2615{
2616 int i;
2617
2618 for_each_rss(i) {
2619 napi_disable(&edev->fp_array[i].napi);
2620
2621 netif_napi_del(&edev->fp_array[i].napi);
2622 }
2623}
2624
2625static void qede_napi_add_enable(struct qede_dev *edev)
2626{
2627 int i;
2628
2629 /* Add NAPI objects */
2630 for_each_rss(i) {
2631 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2632 qede_poll, NAPI_POLL_WEIGHT);
2633 napi_enable(&edev->fp_array[i].napi);
2634 }
2635}
2636
2637static void qede_sync_free_irqs(struct qede_dev *edev)
2638{
2639 int i;
2640
2641 for (i = 0; i < edev->int_info.used_cnt; i++) {
2642 if (edev->int_info.msix_cnt) {
2643 synchronize_irq(edev->int_info.msix[i].vector);
2644 free_irq(edev->int_info.msix[i].vector,
2645 &edev->fp_array[i]);
2646 } else {
2647 edev->ops->common->simd_handler_clean(edev->cdev, i);
2648 }
2649 }
2650
2651 edev->int_info.used_cnt = 0;
2652}
2653
2654static int qede_req_msix_irqs(struct qede_dev *edev)
2655{
2656 int i, rc;
2657
2658 /* Sanitize number of interrupts == number of prepared RSS queues */
2659 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2660 DP_ERR(edev,
2661 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2662 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2663 return -EINVAL;
2664 }
2665
2666 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2667 rc = request_irq(edev->int_info.msix[i].vector,
2668 qede_msix_fp_int, 0, edev->fp_array[i].name,
2669 &edev->fp_array[i]);
2670 if (rc) {
2671 DP_ERR(edev, "Request fp %d irq failed\n", i);
2672 qede_sync_free_irqs(edev);
2673 return rc;
2674 }
2675 DP_VERBOSE(edev, NETIF_MSG_INTR,
2676 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2677 edev->fp_array[i].name, i,
2678 &edev->fp_array[i]);
2679 edev->int_info.used_cnt++;
2680 }
2681
2682 return 0;
2683}
2684
2685static void qede_simd_fp_handler(void *cookie)
2686{
2687 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2688
2689 napi_schedule_irqoff(&fp->napi);
2690}
2691
2692static int qede_setup_irqs(struct qede_dev *edev)
2693{
2694 int i, rc = 0;
2695
2696 /* Learn Interrupt configuration */
2697 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2698 if (rc)
2699 return rc;
2700
2701 if (edev->int_info.msix_cnt) {
2702 rc = qede_req_msix_irqs(edev);
2703 if (rc)
2704 return rc;
2705 edev->ndev->irq = edev->int_info.msix[0].vector;
2706 } else {
2707 const struct qed_common_ops *ops;
2708
2709 /* qed should learn receive the RSS ids and callbacks */
2710 ops = edev->ops->common;
2711 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2712 ops->simd_handler_config(edev->cdev,
2713 &edev->fp_array[i], i,
2714 qede_simd_fp_handler);
2715 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2716 }
2717 return 0;
2718}
2719
2720static int qede_drain_txq(struct qede_dev *edev,
2721 struct qede_tx_queue *txq,
2722 bool allow_drain)
2723{
2724 int rc, cnt = 1000;
2725
2726 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2727 if (!cnt) {
2728 if (allow_drain) {
2729 DP_NOTICE(edev,
2730 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2731 txq->index);
2732 rc = edev->ops->common->drain(edev->cdev);
2733 if (rc)
2734 return rc;
2735 return qede_drain_txq(edev, txq, false);
2736 }
2737 DP_NOTICE(edev,
2738 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2739 txq->index, txq->sw_tx_prod,
2740 txq->sw_tx_cons);
2741 return -ENODEV;
2742 }
2743 cnt--;
2744 usleep_range(1000, 2000);
2745 barrier();
2746 }
2747
2748 /* FW finished processing, wait for HW to transmit all tx packets */
2749 usleep_range(1000, 2000);
2750
2751 return 0;
2752}
2753
2754static int qede_stop_queues(struct qede_dev *edev)
2755{
2756 struct qed_update_vport_params vport_update_params;
2757 struct qed_dev *cdev = edev->cdev;
2758 int rc, tc, i;
2759
2760 /* Disable the vport */
2761 memset(&vport_update_params, 0, sizeof(vport_update_params));
2762 vport_update_params.vport_id = 0;
2763 vport_update_params.update_vport_active_flg = 1;
2764 vport_update_params.vport_active_flg = 0;
2765 vport_update_params.update_rss_flg = 0;
2766
2767 rc = edev->ops->vport_update(cdev, &vport_update_params);
2768 if (rc) {
2769 DP_ERR(edev, "Failed to update vport\n");
2770 return rc;
2771 }
2772
2773 /* Flush Tx queues. If needed, request drain from MCP */
2774 for_each_rss(i) {
2775 struct qede_fastpath *fp = &edev->fp_array[i];
2776
2777 for (tc = 0; tc < edev->num_tc; tc++) {
2778 struct qede_tx_queue *txq = &fp->txqs[tc];
2779
2780 rc = qede_drain_txq(edev, txq, true);
2781 if (rc)
2782 return rc;
2783 }
2784 }
2785
2786 /* Stop all Queues in reverse order*/
2787 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2788 struct qed_stop_rxq_params rx_params;
2789
2790 /* Stop the Tx Queue(s)*/
2791 for (tc = 0; tc < edev->num_tc; tc++) {
2792 struct qed_stop_txq_params tx_params;
2793
2794 tx_params.rss_id = i;
2795 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2796 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2797 if (rc) {
2798 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2799 tx_params.tx_queue_id);
2800 return rc;
2801 }
2802 }
2803
2804 /* Stop the Rx Queue*/
2805 memset(&rx_params, 0, sizeof(rx_params));
2806 rx_params.rss_id = i;
2807 rx_params.rx_queue_id = i;
2808
2809 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2810 if (rc) {
2811 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2812 return rc;
2813 }
2814 }
2815
2816 /* Stop the vport */
2817 rc = edev->ops->vport_stop(cdev, 0);
2818 if (rc)
2819 DP_ERR(edev, "Failed to stop VPORT\n");
2820
2821 return rc;
2822}
2823
2824static int qede_start_queues(struct qede_dev *edev)
2825{
2826 int rc, tc, i;
088c8618 2827 int vlan_removal_en = 1;
2950219d 2828 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 2829 struct qed_update_vport_params vport_update_params;
2830 struct qed_queue_start_common_params q_params;
088c8618 2831 struct qed_start_vport_params start = {0};
961acdea 2832 bool reset_rss_indir = false;
2950219d
YM		 2833
2834 if (!edev->num_rss) {
2835 DP_ERR(edev,
2836 "Cannot update V-VPORT as active as there are no Rx queues\n");
2837 return -EINVAL;
2838 }
2839
55482edc 2840 start.gro_enable = !edev->gro_disable;
088c8618
MC		 2841 start.mtu = edev->ndev->mtu;
2842 start.vport_id = 0;
2843 start.drop_ttl0 = true;
2844 start.remove_inner_vlan = vlan_removal_en;
2845
2846 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 2847
2848 if (rc) {
2849 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2850 return rc;
2851 }
2852
2853 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2854 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 2855 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 2856
2857 for_each_rss(i) {
2858 struct qede_fastpath *fp = &edev->fp_array[i];
2859 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2860
2861 memset(&q_params, 0, sizeof(q_params));
2862 q_params.rss_id = i;
2863 q_params.queue_id = i;
2864 q_params.vport_id = 0;
2865 q_params.sb = fp->sb_info->igu_sb_id;
2866 q_params.sb_idx = RX_PI;
2867
2868 rc = edev->ops->q_rx_start(cdev, &q_params,
2869 fp->rxq->rx_buf_size,
2870 fp->rxq->rx_bd_ring.p_phys_addr,
2871 phys_table,
2872 fp->rxq->rx_comp_ring.page_cnt,
2873 &fp->rxq->hw_rxq_prod_addr);
2874 if (rc) {
2875 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2876 return rc;
2877 }
2878
2879 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2880
2881 qede_update_rx_prod(edev, fp->rxq);
2882
2883 for (tc = 0; tc < edev->num_tc; tc++) {
2884 struct qede_tx_queue *txq = &fp->txqs[tc];
2885 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2886
2887 memset(&q_params, 0, sizeof(q_params));
2888 q_params.rss_id = i;
2889 q_params.queue_id = txq_index;
2890 q_params.vport_id = 0;
2891 q_params.sb = fp->sb_info->igu_sb_id;
2892 q_params.sb_idx = TX_PI(tc);
2893
2894 rc = edev->ops->q_tx_start(cdev, &q_params,
2895 txq->tx_pbl.pbl.p_phys_table,
2896 txq->tx_pbl.page_cnt,
2897 &txq->doorbell_addr);
2898 if (rc) {
2899 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2900 txq_index, rc);
2901 return rc;
2902 }
2903
2904 txq->hw_cons_ptr =
2905 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2906 SET_FIELD(txq->tx_db.data.params,
2907 ETH_DB_DATA_DEST, DB_DEST_XCM);
2908 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2909 DB_AGG_CMD_SET);
2910 SET_FIELD(txq->tx_db.data.params,
2911 ETH_DB_DATA_AGG_VAL_SEL,
2912 DQ_XCM_ETH_TX_BD_PROD_CMD);
2913
2914 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2915 }
2916 }
2917
2918 /* Prepare and send the vport enable */
2919 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 2920 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 2921 vport_update_params.update_vport_active_flg = 1;
2922 vport_update_params.vport_active_flg = 1;
2923
2924 /* Fill struct with RSS params */
2925 if (QEDE_RSS_CNT(edev) > 1) {
2926 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 2927
2928 /* Need to validate current RSS config uses valid entries */
2929 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
2930 if (edev->rss_params.rss_ind_table[i] >=
2931 edev->num_rss) {
2932 reset_rss_indir = true;
2933 break;
2934 }
2935 }
2936
2937 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
2938 reset_rss_indir) {
2939 u16 val;
2940
2941 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
2942 u16 indir_val;
2943
2944 val = QEDE_RSS_CNT(edev);
2945 indir_val = ethtool_rxfh_indir_default(i, val);
2946 edev->rss_params.rss_ind_table[i] = indir_val;
2947 }
2948 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
2949 }
2950
2951 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
2952 netdev_rss_key_fill(edev->rss_params.rss_key,
2953 sizeof(edev->rss_params.rss_key));
2954 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
2955 }
2956
2957 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
2958 edev->rss_params.rss_caps = QED_RSS_IPV4 |
2959 QED_RSS_IPV6 |
2960 QED_RSS_IPV4_TCP |
2961 QED_RSS_IPV6_TCP;
2962 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
2963 }
2964
2965 memcpy(&vport_update_params.rss_params, &edev->rss_params,
2966 sizeof(vport_update_params.rss_params));
2950219d 2967 } else {
961acdea
SRK		 2968 memset(&vport_update_params.rss_params, 0,
2969 sizeof(vport_update_params.rss_params));
2950219d 2970 }
2950219d
YM		 2971
2972 rc = edev->ops->vport_update(cdev, &vport_update_params);
2973 if (rc) {
2974 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2975 return rc;
2976 }
2977
2978 return 0;
2979}
2980
0d8e0aa0
SK		 2981static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2982 enum qed_filter_xcast_params_type opcode,
2983 unsigned char *mac, int num_macs)
2984{
2985 struct qed_filter_params filter_cmd;
2986 int i;
2987
2988 memset(&filter_cmd, 0, sizeof(filter_cmd));
2989 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2990 filter_cmd.filter.mcast.type = opcode;
2991 filter_cmd.filter.mcast.num = num_macs;
2992
2993 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2994 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
2995
2996 return edev->ops->filter_config(edev->cdev, &filter_cmd);
2997}
2998
2950219d
YM		 2999enum qede_unload_mode {
3000 QEDE_UNLOAD_NORMAL,
3001};
3002
3003static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3004{
a2ec6172 3005 struct qed_link_params link_params;
2950219d
YM		 3006 int rc;
3007
3008 DP_INFO(edev, "Starting qede unload\n");
3009
0d8e0aa0
SK		 3010 mutex_lock(&edev->qede_lock);
3011 edev->state = QEDE_STATE_CLOSED;
3012
2950219d
YM		 3013 /* Close OS Tx */
3014 netif_tx_disable(edev->ndev);
3015 netif_carrier_off(edev->ndev);
3016
a2ec6172
SK		 3017 /* Reset the link */
3018 memset(&link_params, 0, sizeof(link_params));
3019 link_params.link_up = false;
3020 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3021 rc = qede_stop_queues(edev);
3022 if (rc) {
3023 qede_sync_free_irqs(edev);
3024 goto out;
3025 }
3026
3027 DP_INFO(edev, "Stopped Queues\n");
3028
7c1bfcad 3029 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3030 edev->ops->fastpath_stop(edev->cdev);
3031
3032 /* Release the interrupts */
3033 qede_sync_free_irqs(edev);
3034 edev->ops->common->set_fp_int(edev->cdev, 0);
3035
3036 qede_napi_disable_remove(edev);
3037
3038 qede_free_mem_load(edev);
3039 qede_free_fp_array(edev);
3040
3041out:
3042 mutex_unlock(&edev->qede_lock);
3043 DP_INFO(edev, "Ending qede unload\n");
3044}
3045
3046enum qede_load_mode {
3047 QEDE_LOAD_NORMAL,
3048};
3049
3050static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3051{
a2ec6172
SK		 3052 struct qed_link_params link_params;
3053 struct qed_link_output link_output;
2950219d
YM		 3054 int rc;
3055
3056 DP_INFO(edev, "Starting qede load\n");
3057
3058 rc = qede_set_num_queues(edev);
3059 if (rc)
3060 goto err0;
3061
3062 rc = qede_alloc_fp_array(edev);
3063 if (rc)
3064 goto err0;
3065
3066 qede_init_fp(edev);
3067
3068 rc = qede_alloc_mem_load(edev);
3069 if (rc)
3070 goto err1;
3071 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3072 QEDE_RSS_CNT(edev), edev->num_tc);
3073
3074 rc = qede_set_real_num_queues(edev);
3075 if (rc)
3076 goto err2;
3077
3078 qede_napi_add_enable(edev);
3079 DP_INFO(edev, "Napi added and enabled\n");
3080
3081 rc = qede_setup_irqs(edev);
3082 if (rc)
3083 goto err3;
3084 DP_INFO(edev, "Setup IRQs succeeded\n");
3085
3086 rc = qede_start_queues(edev);
3087 if (rc)
3088 goto err4;
3089 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3090
3091 /* Add primary mac and set Rx filters */
3092 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3093
0d8e0aa0
SK		 3094 mutex_lock(&edev->qede_lock);
3095 edev->state = QEDE_STATE_OPEN;
3096 mutex_unlock(&edev->qede_lock);
a2ec6172 3097
7c1bfcad
SRK		 3098 /* Program un-configured VLANs */
3099 qede_configure_vlan_filters(edev);
3100
a2ec6172
SK		 3101 /* Ask for link-up using current configuration */
3102 memset(&link_params, 0, sizeof(link_params));
3103 link_params.link_up = true;
3104 edev->ops->common->set_link(edev->cdev, &link_params);
3105
3106 /* Query whether link is already-up */
3107 memset(&link_output, 0, sizeof(link_output));
3108 edev->ops->common->get_link(edev->cdev, &link_output);
3109 qede_link_update(edev, &link_output);
3110
2950219d
YM		 3111 DP_INFO(edev, "Ending successfully qede load\n");
3112
3113 return 0;
3114
3115err4:
3116 qede_sync_free_irqs(edev);
3117 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3118err3:
3119 qede_napi_disable_remove(edev);
3120err2:
3121 qede_free_mem_load(edev);
3122err1:
3123 edev->ops->common->set_fp_int(edev->cdev, 0);
3124 qede_free_fp_array(edev);
3125 edev->num_rss = 0;
3126err0:
3127 return rc;
3128}
3129
133fac0e
SK		 3130void qede_reload(struct qede_dev *edev,
3131 void (*func)(struct qede_dev *, union qede_reload_args *),
3132 union qede_reload_args *args)
3133{
3134 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3135 /* Call function handler to update parameters
3136 * needed for function load.
3137 */
3138 if (func)
3139 func(edev, args);
3140
3141 qede_load(edev, QEDE_LOAD_NORMAL);
3142
3143 mutex_lock(&edev->qede_lock);
3144 qede_config_rx_mode(edev->ndev);
3145 mutex_unlock(&edev->qede_lock);
3146}
3147
2950219d
YM		 3148/* called with rtnl_lock */
3149static int qede_open(struct net_device *ndev)
3150{
3151 struct qede_dev *edev = netdev_priv(ndev);
3152
3153 netif_carrier_off(ndev);
3154
3155 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3156
3157 return qede_load(edev, QEDE_LOAD_NORMAL);
3158}
3159
3160static int qede_close(struct net_device *ndev)
3161{
3162 struct qede_dev *edev = netdev_priv(ndev);
3163
3164 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3165
3166 return 0;
3167}
0d8e0aa0 3168
a2ec6172
SK		 3169static void qede_link_update(void *dev, struct qed_link_output *link)
3170{
3171 struct qede_dev *edev = dev;
3172
3173 if (!netif_running(edev->ndev)) {
3174 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3175 return;
3176 }
3177
3178 if (link->link_up) {
8e025ae2
YM		 3179 if (!netif_carrier_ok(edev->ndev)) {
3180 DP_NOTICE(edev, "Link is up\n");
3181 netif_tx_start_all_queues(edev->ndev);
3182 netif_carrier_on(edev->ndev);
3183 }
a2ec6172 3184 } else {
8e025ae2
YM		 3185 if (netif_carrier_ok(edev->ndev)) {
3186 DP_NOTICE(edev, "Link is down\n");
3187 netif_tx_disable(edev->ndev);
3188 netif_carrier_off(edev->ndev);
3189 }
a2ec6172
SK		 3190 }
3191}
3192
0d8e0aa0
SK		 3193static int qede_set_mac_addr(struct net_device *ndev, void *p)
3194{
3195 struct qede_dev *edev = netdev_priv(ndev);
3196 struct sockaddr *addr = p;
3197 int rc;
3198
3199 ASSERT_RTNL(); /* @@@TBD To be removed */
3200
3201 DP_INFO(edev, "Set_mac_addr called\n");
3202
3203 if (!is_valid_ether_addr(addr->sa_data)) {
3204 DP_NOTICE(edev, "The MAC address is not valid\n");
3205 return -EFAULT;
3206 }
3207
3208 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3209
3210 if (!netif_running(ndev)) {
3211 DP_NOTICE(edev, "The device is currently down\n");
3212 return 0;
3213 }
3214
3215 /* Remove the previous primary mac */
3216 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3217 edev->primary_mac);
3218 if (rc)
3219 return rc;
3220
3221 /* Add MAC filter according to the new unicast HW MAC address */
3222 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3223 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3224 edev->primary_mac);
3225}
3226
3227static int
3228qede_configure_mcast_filtering(struct net_device *ndev,
3229 enum qed_filter_rx_mode_type *accept_flags)
3230{
3231 struct qede_dev *edev = netdev_priv(ndev);
3232 unsigned char *mc_macs, *temp;
3233 struct netdev_hw_addr *ha;
3234 int rc = 0, mc_count;
3235 size_t size;
3236
3237 size = 64 * ETH_ALEN;
3238
3239 mc_macs = kzalloc(size, GFP_KERNEL);
3240 if (!mc_macs) {
3241 DP_NOTICE(edev,
3242 "Failed to allocate memory for multicast MACs\n");
3243 rc = -ENOMEM;
3244 goto exit;
3245 }
3246
3247 temp = mc_macs;
3248
3249 /* Remove all previously configured MAC filters */
3250 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3251 mc_macs, 1);
3252 if (rc)
3253 goto exit;
3254
3255 netif_addr_lock_bh(ndev);
3256
3257 mc_count = netdev_mc_count(ndev);
3258 if (mc_count < 64) {
3259 netdev_for_each_mc_addr(ha, ndev) {
3260 ether_addr_copy(temp, ha->addr);
3261 temp += ETH_ALEN;
3262 }
3263 }
3264
3265 netif_addr_unlock_bh(ndev);
3266
3267 /* Check for all multicast @@@TBD resource allocation */
3268 if ((ndev->flags & IFF_ALLMULTI) ||
3269 (mc_count > 64)) {
3270 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3271 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3272 } else {
3273 /* Add all multicast MAC filters */
3274 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3275 mc_macs, mc_count);
3276 }
3277
3278exit:
3279 kfree(mc_macs);
3280 return rc;
3281}
3282
3283static void qede_set_rx_mode(struct net_device *ndev)
3284{
3285 struct qede_dev *edev = netdev_priv(ndev);
3286
3287 DP_INFO(edev, "qede_set_rx_mode called\n");
3288
3289 if (edev->state != QEDE_STATE_OPEN) {
3290 DP_INFO(edev,
3291 "qede_set_rx_mode called while interface is down\n");
3292 } else {
3293 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3294 schedule_delayed_work(&edev->sp_task, 0);
3295 }
3296}
3297
3298/* Must be called with qede_lock held */
3299static void qede_config_rx_mode(struct net_device *ndev)
3300{
3301 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3302 struct qede_dev *edev = netdev_priv(ndev);
3303 struct qed_filter_params rx_mode;
3304 unsigned char *uc_macs, *temp;
3305 struct netdev_hw_addr *ha;
3306 int rc, uc_count;
3307 size_t size;
3308
3309 netif_addr_lock_bh(ndev);
3310
3311 uc_count = netdev_uc_count(ndev);
3312 size = uc_count * ETH_ALEN;
3313
3314 uc_macs = kzalloc(size, GFP_ATOMIC);
3315 if (!uc_macs) {
3316 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3317 netif_addr_unlock_bh(ndev);
3318 return;
3319 }
3320
3321 temp = uc_macs;
3322 netdev_for_each_uc_addr(ha, ndev) {
3323 ether_addr_copy(temp, ha->addr);
3324 temp += ETH_ALEN;
3325 }
3326
3327 netif_addr_unlock_bh(ndev);
3328
3329 /* Configure the struct for the Rx mode */
3330 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3331 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3332
3333 /* Remove all previous unicast secondary macs and multicast macs
3334 * (configrue / leave the primary mac)
3335 */
3336 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3337 edev->primary_mac);
3338 if (rc)
3339 goto out;
3340
3341 /* Check for promiscuous */
3342 if ((ndev->flags & IFF_PROMISC) ||
3343 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3344 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3345 } else {
3346 /* Add MAC filters according to the unicast secondary macs */
3347 int i;
3348
3349 temp = uc_macs;
3350 for (i = 0; i < uc_count; i++) {
3351 rc = qede_set_ucast_rx_mac(edev,
3352 QED_FILTER_XCAST_TYPE_ADD,
3353 temp);
3354 if (rc)
3355 goto out;
3356
3357 temp += ETH_ALEN;
3358 }
3359
3360 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3361 if (rc)
3362 goto out;
3363 }
3364
7c1bfcad
SRK		 3365 /* take care of VLAN mode */
3366 if (ndev->flags & IFF_PROMISC) {
3367 qede_config_accept_any_vlan(edev, true);
3368 } else if (!edev->non_configured_vlans) {
3369 /* It's possible that accept_any_vlan mode is set due to a
3370 * previous setting of IFF_PROMISC. If vlan credits are
3371 * sufficient, disable accept_any_vlan.
3372 */
3373 qede_config_accept_any_vlan(edev, false);
3374 }
3375
0d8e0aa0
SK		 3376 rx_mode.filter.accept_flags = accept_flags;
3377 edev->ops->filter_config(edev->cdev, &rx_mode);
3378out:
3379 kfree(uc_macs);
3380}
Linux kernel - Deliverables
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