Commit | Line | Data |
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e712d52b YM |
1 | /* QLogic qede NIC Driver |
2 | * Copyright (c) 2015 QLogic Corporation | |
3 | * | |
4 | * This software is available under the terms of the GNU General Public License | |
5 | * (GPL) Version 2, available from the file COPYING in the main directory of | |
6 | * this source tree. | |
7 | */ | |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/pci.h> | |
11 | #include <linux/version.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/netdevice.h> | |
14 | #include <linux/etherdevice.h> | |
15 | #include <linux/skbuff.h> | |
16 | #include <linux/errno.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/dma-mapping.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <asm/byteorder.h> | |
22 | #include <asm/param.h> | |
23 | #include <linux/io.h> | |
24 | #include <linux/netdev_features.h> | |
25 | #include <linux/udp.h> | |
26 | #include <linux/tcp.h> | |
b18e170c | 27 | #ifdef CONFIG_QEDE_VXLAN |
e712d52b | 28 | #include <net/vxlan.h> |
b18e170c | 29 | #endif |
9a109dd0 MC |
30 | #ifdef CONFIG_QEDE_GENEVE |
31 | #include <net/geneve.h> | |
32 | #endif | |
e712d52b YM |
33 | #include <linux/ip.h> |
34 | #include <net/ipv6.h> | |
35 | #include <net/tcp.h> | |
36 | #include <linux/if_ether.h> | |
37 | #include <linux/if_vlan.h> | |
38 | #include <linux/pkt_sched.h> | |
39 | #include <linux/ethtool.h> | |
40 | #include <linux/in.h> | |
41 | #include <linux/random.h> | |
42 | #include <net/ip6_checksum.h> | |
43 | #include <linux/bitops.h> | |
44 | ||
45 | #include "qede.h" | |
46 | ||
5abd7e92 YM |
47 | static char version[] = |
48 | "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n"; | |
e712d52b | 49 | |
5abd7e92 | 50 | MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver"); |
e712d52b YM |
51 | MODULE_LICENSE("GPL"); |
52 | MODULE_VERSION(DRV_MODULE_VERSION); | |
53 | ||
54 | static uint debug; | |
55 | module_param(debug, uint, 0); | |
56 | MODULE_PARM_DESC(debug, " Default debug msglevel"); | |
57 | ||
58 | static const struct qed_eth_ops *qed_ops; | |
59 | ||
60 | #define CHIP_NUM_57980S_40 0x1634 | |
0e7441d7 | 61 | #define CHIP_NUM_57980S_10 0x1666 |
e712d52b YM |
62 | #define CHIP_NUM_57980S_MF 0x1636 |
63 | #define CHIP_NUM_57980S_100 0x1644 | |
64 | #define CHIP_NUM_57980S_50 0x1654 | |
65 | #define CHIP_NUM_57980S_25 0x1656 | |
fefb0202 | 66 | #define CHIP_NUM_57980S_IOV 0x1664 |
e712d52b YM |
67 | |
68 | #ifndef PCI_DEVICE_ID_NX2_57980E | |
69 | #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40 | |
70 | #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10 | |
71 | #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF | |
72 | #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100 | |
73 | #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50 | |
74 | #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25 | |
fefb0202 | 75 | #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV |
e712d52b YM |
76 | #endif |
77 | ||
fefb0202 YM |
78 | enum qede_pci_private { |
79 | QEDE_PRIVATE_PF, | |
80 | QEDE_PRIVATE_VF | |
81 | }; | |
82 | ||
e712d52b | 83 | static const struct pci_device_id qede_pci_tbl[] = { |
fefb0202 YM |
84 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF}, |
85 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF}, | |
86 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF}, | |
87 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF}, | |
88 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF}, | |
89 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF}, | |
90 | {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF}, | |
e712d52b YM |
91 | { 0 } |
92 | }; | |
93 | ||
94 | MODULE_DEVICE_TABLE(pci, qede_pci_tbl); | |
95 | ||
96 | static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id); | |
97 | ||
98 | #define TX_TIMEOUT (5 * HZ) | |
99 | ||
100 | static void qede_remove(struct pci_dev *pdev); | |
2950219d YM |
101 | static int qede_alloc_rx_buffer(struct qede_dev *edev, |
102 | struct qede_rx_queue *rxq); | |
a2ec6172 | 103 | static void qede_link_update(void *dev, struct qed_link_output *link); |
e712d52b | 104 | |
fefb0202 | 105 | #ifdef CONFIG_QED_SRIOV |
08feecd7 YM |
106 | static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos) |
107 | { | |
108 | struct qede_dev *edev = netdev_priv(ndev); | |
109 | ||
110 | if (vlan > 4095) { | |
111 | DP_NOTICE(edev, "Illegal vlan value %d\n", vlan); | |
112 | return -EINVAL; | |
113 | } | |
114 | ||
115 | DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n", | |
116 | vlan, vf); | |
117 | ||
118 | return edev->ops->iov->set_vlan(edev->cdev, vlan, vf); | |
119 | } | |
120 | ||
eff16960 YM |
121 | static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac) |
122 | { | |
123 | struct qede_dev *edev = netdev_priv(ndev); | |
124 | ||
125 | DP_VERBOSE(edev, QED_MSG_IOV, | |
126 | "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n", | |
127 | mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx); | |
128 | ||
129 | if (!is_valid_ether_addr(mac)) { | |
130 | DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n"); | |
131 | return -EINVAL; | |
132 | } | |
133 | ||
134 | return edev->ops->iov->set_mac(edev->cdev, mac, vfidx); | |
135 | } | |
136 | ||
fefb0202 YM |
137 | static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param) |
138 | { | |
139 | struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev)); | |
140 | ||
141 | DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param); | |
142 | ||
143 | return edev->ops->iov->configure(edev->cdev, num_vfs_param); | |
144 | } | |
145 | #endif | |
146 | ||
e712d52b YM |
147 | static struct pci_driver qede_pci_driver = { |
148 | .name = "qede", | |
149 | .id_table = qede_pci_tbl, | |
150 | .probe = qede_probe, | |
151 | .remove = qede_remove, | |
fefb0202 YM |
152 | #ifdef CONFIG_QED_SRIOV |
153 | .sriov_configure = qede_sriov_configure, | |
154 | #endif | |
e712d52b YM |
155 | }; |
156 | ||
eff16960 YM |
157 | static void qede_force_mac(void *dev, u8 *mac) |
158 | { | |
159 | struct qede_dev *edev = dev; | |
160 | ||
161 | ether_addr_copy(edev->ndev->dev_addr, mac); | |
162 | ether_addr_copy(edev->primary_mac, mac); | |
163 | } | |
164 | ||
a2ec6172 SK |
165 | static struct qed_eth_cb_ops qede_ll_ops = { |
166 | { | |
167 | .link_update = qede_link_update, | |
168 | }, | |
eff16960 | 169 | .force_mac = qede_force_mac, |
a2ec6172 SK |
170 | }; |
171 | ||
2950219d YM |
172 | static int qede_netdev_event(struct notifier_block *this, unsigned long event, |
173 | void *ptr) | |
174 | { | |
175 | struct net_device *ndev = netdev_notifier_info_to_dev(ptr); | |
176 | struct ethtool_drvinfo drvinfo; | |
177 | struct qede_dev *edev; | |
178 | ||
179 | /* Currently only support name change */ | |
180 | if (event != NETDEV_CHANGENAME) | |
181 | goto done; | |
182 | ||
183 | /* Check whether this is a qede device */ | |
184 | if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo) | |
185 | goto done; | |
186 | ||
187 | memset(&drvinfo, 0, sizeof(drvinfo)); | |
188 | ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo); | |
189 | if (strcmp(drvinfo.driver, "qede")) | |
190 | goto done; | |
191 | edev = netdev_priv(ndev); | |
192 | ||
193 | /* Notify qed of the name change */ | |
194 | if (!edev->ops || !edev->ops->common) | |
195 | goto done; | |
196 | edev->ops->common->set_id(edev->cdev, edev->ndev->name, | |
197 | "qede"); | |
198 | ||
199 | done: | |
200 | return NOTIFY_DONE; | |
201 | } | |
202 | ||
203 | static struct notifier_block qede_netdev_notifier = { | |
204 | .notifier_call = qede_netdev_event, | |
205 | }; | |
206 | ||
e712d52b YM |
207 | static |
208 | int __init qede_init(void) | |
209 | { | |
210 | int ret; | |
e712d52b YM |
211 | |
212 | pr_notice("qede_init: %s\n", version); | |
213 | ||
95114344 | 214 | qed_ops = qed_get_eth_ops(); |
e712d52b YM |
215 | if (!qed_ops) { |
216 | pr_notice("Failed to get qed ethtool operations\n"); | |
217 | return -EINVAL; | |
218 | } | |
219 | ||
2950219d YM |
220 | /* Must register notifier before pci ops, since we might miss |
221 | * interface rename after pci probe and netdev registeration. | |
222 | */ | |
223 | ret = register_netdevice_notifier(&qede_netdev_notifier); | |
224 | if (ret) { | |
225 | pr_notice("Failed to register netdevice_notifier\n"); | |
226 | qed_put_eth_ops(); | |
227 | return -EINVAL; | |
228 | } | |
229 | ||
e712d52b YM |
230 | ret = pci_register_driver(&qede_pci_driver); |
231 | if (ret) { | |
232 | pr_notice("Failed to register driver\n"); | |
2950219d | 233 | unregister_netdevice_notifier(&qede_netdev_notifier); |
e712d52b YM |
234 | qed_put_eth_ops(); |
235 | return -EINVAL; | |
236 | } | |
237 | ||
238 | return 0; | |
239 | } | |
240 | ||
241 | static void __exit qede_cleanup(void) | |
242 | { | |
243 | pr_notice("qede_cleanup called\n"); | |
244 | ||
2950219d | 245 | unregister_netdevice_notifier(&qede_netdev_notifier); |
e712d52b YM |
246 | pci_unregister_driver(&qede_pci_driver); |
247 | qed_put_eth_ops(); | |
248 | } | |
249 | ||
250 | module_init(qede_init); | |
251 | module_exit(qede_cleanup); | |
252 | ||
2950219d YM |
253 | /* ------------------------------------------------------------------------- |
254 | * START OF FAST-PATH | |
255 | * ------------------------------------------------------------------------- | |
256 | */ | |
257 | ||
258 | /* Unmap the data and free skb */ | |
259 | static int qede_free_tx_pkt(struct qede_dev *edev, | |
260 | struct qede_tx_queue *txq, | |
261 | int *len) | |
262 | { | |
263 | u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX; | |
264 | struct sk_buff *skb = txq->sw_tx_ring[idx].skb; | |
265 | struct eth_tx_1st_bd *first_bd; | |
266 | struct eth_tx_bd *tx_data_bd; | |
267 | int bds_consumed = 0; | |
268 | int nbds; | |
269 | bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD; | |
270 | int i, split_bd_len = 0; | |
271 | ||
272 | if (unlikely(!skb)) { | |
273 | DP_ERR(edev, | |
274 | "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n", | |
275 | idx, txq->sw_tx_cons, txq->sw_tx_prod); | |
276 | return -1; | |
277 | } | |
278 | ||
279 | *len = skb->len; | |
280 | ||
281 | first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl); | |
282 | ||
283 | bds_consumed++; | |
284 | ||
285 | nbds = first_bd->data.nbds; | |
286 | ||
287 | if (data_split) { | |
288 | struct eth_tx_bd *split = (struct eth_tx_bd *) | |
289 | qed_chain_consume(&txq->tx_pbl); | |
290 | split_bd_len = BD_UNMAP_LEN(split); | |
291 | bds_consumed++; | |
292 | } | |
293 | dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), | |
294 | BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); | |
295 | ||
296 | /* Unmap the data of the skb frags */ | |
297 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) { | |
298 | tx_data_bd = (struct eth_tx_bd *) | |
299 | qed_chain_consume(&txq->tx_pbl); | |
300 | dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd), | |
301 | BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); | |
302 | } | |
303 | ||
304 | while (bds_consumed++ < nbds) | |
305 | qed_chain_consume(&txq->tx_pbl); | |
306 | ||
307 | /* Free skb */ | |
308 | dev_kfree_skb_any(skb); | |
309 | txq->sw_tx_ring[idx].skb = NULL; | |
310 | txq->sw_tx_ring[idx].flags = 0; | |
311 | ||
312 | return 0; | |
313 | } | |
314 | ||
315 | /* Unmap the data and free skb when mapping failed during start_xmit */ | |
316 | static void qede_free_failed_tx_pkt(struct qede_dev *edev, | |
317 | struct qede_tx_queue *txq, | |
318 | struct eth_tx_1st_bd *first_bd, | |
319 | int nbd, | |
320 | bool data_split) | |
321 | { | |
322 | u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; | |
323 | struct sk_buff *skb = txq->sw_tx_ring[idx].skb; | |
324 | struct eth_tx_bd *tx_data_bd; | |
325 | int i, split_bd_len = 0; | |
326 | ||
327 | /* Return prod to its position before this skb was handled */ | |
328 | qed_chain_set_prod(&txq->tx_pbl, | |
329 | le16_to_cpu(txq->tx_db.data.bd_prod), | |
330 | first_bd); | |
331 | ||
332 | first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl); | |
333 | ||
334 | if (data_split) { | |
335 | struct eth_tx_bd *split = (struct eth_tx_bd *) | |
336 | qed_chain_produce(&txq->tx_pbl); | |
337 | split_bd_len = BD_UNMAP_LEN(split); | |
338 | nbd--; | |
339 | } | |
340 | ||
341 | dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd), | |
342 | BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE); | |
343 | ||
344 | /* Unmap the data of the skb frags */ | |
345 | for (i = 0; i < nbd; i++) { | |
346 | tx_data_bd = (struct eth_tx_bd *) | |
347 | qed_chain_produce(&txq->tx_pbl); | |
348 | if (tx_data_bd->nbytes) | |
349 | dma_unmap_page(&edev->pdev->dev, | |
350 | BD_UNMAP_ADDR(tx_data_bd), | |
351 | BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE); | |
352 | } | |
353 | ||
354 | /* Return again prod to its position before this skb was handled */ | |
355 | qed_chain_set_prod(&txq->tx_pbl, | |
356 | le16_to_cpu(txq->tx_db.data.bd_prod), | |
357 | first_bd); | |
358 | ||
359 | /* Free skb */ | |
360 | dev_kfree_skb_any(skb); | |
361 | txq->sw_tx_ring[idx].skb = NULL; | |
362 | txq->sw_tx_ring[idx].flags = 0; | |
363 | } | |
364 | ||
365 | static u32 qede_xmit_type(struct qede_dev *edev, | |
366 | struct sk_buff *skb, | |
367 | int *ipv6_ext) | |
368 | { | |
369 | u32 rc = XMIT_L4_CSUM; | |
370 | __be16 l3_proto; | |
371 | ||
372 | if (skb->ip_summed != CHECKSUM_PARTIAL) | |
373 | return XMIT_PLAIN; | |
374 | ||
375 | l3_proto = vlan_get_protocol(skb); | |
376 | if (l3_proto == htons(ETH_P_IPV6) && | |
377 | (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6)) | |
378 | *ipv6_ext = 1; | |
379 | ||
14db81de MC |
380 | if (skb->encapsulation) |
381 | rc |= XMIT_ENC; | |
382 | ||
2950219d YM |
383 | if (skb_is_gso(skb)) |
384 | rc |= XMIT_LSO; | |
385 | ||
386 | return rc; | |
387 | } | |
388 | ||
389 | static void qede_set_params_for_ipv6_ext(struct sk_buff *skb, | |
390 | struct eth_tx_2nd_bd *second_bd, | |
391 | struct eth_tx_3rd_bd *third_bd) | |
392 | { | |
393 | u8 l4_proto; | |
fc48b7a6 | 394 | u16 bd2_bits1 = 0, bd2_bits2 = 0; |
2950219d | 395 | |
fc48b7a6 | 396 | bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT); |
2950219d | 397 | |
fc48b7a6 | 398 | bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) & |
2950219d YM |
399 | ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK) |
400 | << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT; | |
401 | ||
fc48b7a6 | 402 | bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH << |
2950219d YM |
403 | ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT); |
404 | ||
405 | if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) | |
406 | l4_proto = ipv6_hdr(skb)->nexthdr; | |
407 | else | |
408 | l4_proto = ip_hdr(skb)->protocol; | |
409 | ||
410 | if (l4_proto == IPPROTO_UDP) | |
fc48b7a6 | 411 | bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT; |
2950219d | 412 | |
fc48b7a6 | 413 | if (third_bd) |
2950219d | 414 | third_bd->data.bitfields |= |
fc48b7a6 YM |
415 | cpu_to_le16(((tcp_hdrlen(skb) / 4) & |
416 | ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) << | |
417 | ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT); | |
2950219d | 418 | |
fc48b7a6 | 419 | second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1); |
2950219d YM |
420 | second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2); |
421 | } | |
422 | ||
423 | static int map_frag_to_bd(struct qede_dev *edev, | |
424 | skb_frag_t *frag, | |
425 | struct eth_tx_bd *bd) | |
426 | { | |
427 | dma_addr_t mapping; | |
428 | ||
429 | /* Map skb non-linear frag data for DMA */ | |
430 | mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0, | |
431 | skb_frag_size(frag), | |
432 | DMA_TO_DEVICE); | |
433 | if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { | |
434 | DP_NOTICE(edev, "Unable to map frag - dropping packet\n"); | |
435 | return -ENOMEM; | |
436 | } | |
437 | ||
438 | /* Setup the data pointer of the frag data */ | |
439 | BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag)); | |
440 | ||
441 | return 0; | |
442 | } | |
443 | ||
14db81de MC |
444 | static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt) |
445 | { | |
446 | if (is_encap_pkt) | |
447 | return (skb_inner_transport_header(skb) + | |
448 | inner_tcp_hdrlen(skb) - skb->data); | |
449 | else | |
450 | return (skb_transport_header(skb) + | |
451 | tcp_hdrlen(skb) - skb->data); | |
452 | } | |
453 | ||
b1199b10 YM |
454 | /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */ |
455 | #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) | |
456 | static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb, | |
457 | u8 xmit_type) | |
458 | { | |
459 | int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1; | |
460 | ||
461 | if (xmit_type & XMIT_LSO) { | |
462 | int hlen; | |
463 | ||
14db81de | 464 | hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC); |
b1199b10 YM |
465 | |
466 | /* linear payload would require its own BD */ | |
467 | if (skb_headlen(skb) > hlen) | |
468 | allowed_frags--; | |
469 | } | |
470 | ||
471 | return (skb_shinfo(skb)->nr_frags > allowed_frags); | |
472 | } | |
473 | #endif | |
474 | ||
2950219d YM |
475 | /* Main transmit function */ |
476 | static | |
477 | netdev_tx_t qede_start_xmit(struct sk_buff *skb, | |
478 | struct net_device *ndev) | |
479 | { | |
480 | struct qede_dev *edev = netdev_priv(ndev); | |
481 | struct netdev_queue *netdev_txq; | |
482 | struct qede_tx_queue *txq; | |
483 | struct eth_tx_1st_bd *first_bd; | |
484 | struct eth_tx_2nd_bd *second_bd = NULL; | |
485 | struct eth_tx_3rd_bd *third_bd = NULL; | |
486 | struct eth_tx_bd *tx_data_bd = NULL; | |
487 | u16 txq_index; | |
488 | u8 nbd = 0; | |
489 | dma_addr_t mapping; | |
490 | int rc, frag_idx = 0, ipv6_ext = 0; | |
491 | u8 xmit_type; | |
492 | u16 idx; | |
493 | u16 hlen; | |
810810ff | 494 | bool data_split = false; |
2950219d YM |
495 | |
496 | /* Get tx-queue context and netdev index */ | |
497 | txq_index = skb_get_queue_mapping(skb); | |
498 | WARN_ON(txq_index >= QEDE_TSS_CNT(edev)); | |
499 | txq = QEDE_TX_QUEUE(edev, txq_index); | |
500 | netdev_txq = netdev_get_tx_queue(ndev, txq_index); | |
501 | ||
2950219d YM |
502 | WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < |
503 | (MAX_SKB_FRAGS + 1)); | |
504 | ||
505 | xmit_type = qede_xmit_type(edev, skb, &ipv6_ext); | |
506 | ||
b1199b10 YM |
507 | #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET) |
508 | if (qede_pkt_req_lin(edev, skb, xmit_type)) { | |
509 | if (skb_linearize(skb)) { | |
510 | DP_NOTICE(edev, | |
511 | "SKB linearization failed - silently dropping this SKB\n"); | |
512 | dev_kfree_skb_any(skb); | |
513 | return NETDEV_TX_OK; | |
514 | } | |
515 | } | |
516 | #endif | |
517 | ||
2950219d YM |
518 | /* Fill the entry in the SW ring and the BDs in the FW ring */ |
519 | idx = txq->sw_tx_prod & NUM_TX_BDS_MAX; | |
520 | txq->sw_tx_ring[idx].skb = skb; | |
521 | first_bd = (struct eth_tx_1st_bd *) | |
522 | qed_chain_produce(&txq->tx_pbl); | |
523 | memset(first_bd, 0, sizeof(*first_bd)); | |
524 | first_bd->data.bd_flags.bitfields = | |
525 | 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT; | |
526 | ||
527 | /* Map skb linear data for DMA and set in the first BD */ | |
528 | mapping = dma_map_single(&edev->pdev->dev, skb->data, | |
529 | skb_headlen(skb), DMA_TO_DEVICE); | |
530 | if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { | |
531 | DP_NOTICE(edev, "SKB mapping failed\n"); | |
532 | qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false); | |
533 | return NETDEV_TX_OK; | |
534 | } | |
535 | nbd++; | |
536 | BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb)); | |
537 | ||
538 | /* In case there is IPv6 with extension headers or LSO we need 2nd and | |
539 | * 3rd BDs. | |
540 | */ | |
541 | if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) { | |
542 | second_bd = (struct eth_tx_2nd_bd *) | |
543 | qed_chain_produce(&txq->tx_pbl); | |
544 | memset(second_bd, 0, sizeof(*second_bd)); | |
545 | ||
546 | nbd++; | |
547 | third_bd = (struct eth_tx_3rd_bd *) | |
548 | qed_chain_produce(&txq->tx_pbl); | |
549 | memset(third_bd, 0, sizeof(*third_bd)); | |
550 | ||
551 | nbd++; | |
552 | /* We need to fill in additional data in second_bd... */ | |
553 | tx_data_bd = (struct eth_tx_bd *)second_bd; | |
554 | } | |
555 | ||
556 | if (skb_vlan_tag_present(skb)) { | |
557 | first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb)); | |
558 | first_bd->data.bd_flags.bitfields |= | |
559 | 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT; | |
560 | } | |
561 | ||
562 | /* Fill the parsing flags & params according to the requested offload */ | |
563 | if (xmit_type & XMIT_L4_CSUM) { | |
fc48b7a6 YM |
564 | u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT; |
565 | ||
2950219d YM |
566 | /* We don't re-calculate IP checksum as it is already done by |
567 | * the upper stack | |
568 | */ | |
569 | first_bd->data.bd_flags.bitfields |= | |
570 | 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT; | |
571 | ||
14db81de MC |
572 | if (xmit_type & XMIT_ENC) { |
573 | first_bd->data.bd_flags.bitfields |= | |
574 | 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; | |
575 | } else { | |
576 | /* In cases when OS doesn't indicate for inner offloads | |
577 | * when packet is tunnelled, we need to override the HW | |
578 | * tunnel configuration so that packets are treated as | |
579 | * regular non tunnelled packets and no inner offloads | |
580 | * are done by the hardware. | |
581 | */ | |
582 | first_bd->data.bitfields |= cpu_to_le16(temp); | |
583 | } | |
fc48b7a6 | 584 | |
2950219d YM |
585 | /* If the packet is IPv6 with extension header, indicate that |
586 | * to FW and pass few params, since the device cracker doesn't | |
587 | * support parsing IPv6 with extension header/s. | |
588 | */ | |
589 | if (unlikely(ipv6_ext)) | |
590 | qede_set_params_for_ipv6_ext(skb, second_bd, third_bd); | |
591 | } | |
592 | ||
593 | if (xmit_type & XMIT_LSO) { | |
594 | first_bd->data.bd_flags.bitfields |= | |
595 | (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT); | |
596 | third_bd->data.lso_mss = | |
597 | cpu_to_le16(skb_shinfo(skb)->gso_size); | |
598 | ||
14db81de MC |
599 | if (unlikely(xmit_type & XMIT_ENC)) { |
600 | first_bd->data.bd_flags.bitfields |= | |
601 | 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT; | |
602 | hlen = qede_get_skb_hlen(skb, true); | |
603 | } else { | |
604 | first_bd->data.bd_flags.bitfields |= | |
605 | 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT; | |
606 | hlen = qede_get_skb_hlen(skb, false); | |
607 | } | |
2950219d YM |
608 | |
609 | /* @@@TBD - if will not be removed need to check */ | |
610 | third_bd->data.bitfields |= | |
fc48b7a6 | 611 | cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT)); |
2950219d YM |
612 | |
613 | /* Make life easier for FW guys who can't deal with header and | |
614 | * data on same BD. If we need to split, use the second bd... | |
615 | */ | |
616 | if (unlikely(skb_headlen(skb) > hlen)) { | |
617 | DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, | |
618 | "TSO split header size is %d (%x:%x)\n", | |
619 | first_bd->nbytes, first_bd->addr.hi, | |
620 | first_bd->addr.lo); | |
621 | ||
622 | mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi), | |
623 | le32_to_cpu(first_bd->addr.lo)) + | |
624 | hlen; | |
625 | ||
626 | BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping, | |
627 | le16_to_cpu(first_bd->nbytes) - | |
628 | hlen); | |
629 | ||
630 | /* this marks the BD as one that has no | |
631 | * individual mapping | |
632 | */ | |
633 | txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD; | |
634 | ||
635 | first_bd->nbytes = cpu_to_le16(hlen); | |
636 | ||
637 | tx_data_bd = (struct eth_tx_bd *)third_bd; | |
638 | data_split = true; | |
639 | } | |
640 | } | |
641 | ||
642 | /* Handle fragmented skb */ | |
643 | /* special handle for frags inside 2nd and 3rd bds.. */ | |
644 | while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) { | |
645 | rc = map_frag_to_bd(edev, | |
646 | &skb_shinfo(skb)->frags[frag_idx], | |
647 | tx_data_bd); | |
648 | if (rc) { | |
649 | qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, | |
650 | data_split); | |
651 | return NETDEV_TX_OK; | |
652 | } | |
653 | ||
654 | if (tx_data_bd == (struct eth_tx_bd *)second_bd) | |
655 | tx_data_bd = (struct eth_tx_bd *)third_bd; | |
656 | else | |
657 | tx_data_bd = NULL; | |
658 | ||
659 | frag_idx++; | |
660 | } | |
661 | ||
662 | /* map last frags into 4th, 5th .... */ | |
663 | for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) { | |
664 | tx_data_bd = (struct eth_tx_bd *) | |
665 | qed_chain_produce(&txq->tx_pbl); | |
666 | ||
667 | memset(tx_data_bd, 0, sizeof(*tx_data_bd)); | |
668 | ||
669 | rc = map_frag_to_bd(edev, | |
670 | &skb_shinfo(skb)->frags[frag_idx], | |
671 | tx_data_bd); | |
672 | if (rc) { | |
673 | qede_free_failed_tx_pkt(edev, txq, first_bd, nbd, | |
674 | data_split); | |
675 | return NETDEV_TX_OK; | |
676 | } | |
677 | } | |
678 | ||
679 | /* update the first BD with the actual num BDs */ | |
680 | first_bd->data.nbds = nbd; | |
681 | ||
682 | netdev_tx_sent_queue(netdev_txq, skb->len); | |
683 | ||
684 | skb_tx_timestamp(skb); | |
685 | ||
686 | /* Advance packet producer only before sending the packet since mapping | |
687 | * of pages may fail. | |
688 | */ | |
689 | txq->sw_tx_prod++; | |
690 | ||
691 | /* 'next page' entries are counted in the producer value */ | |
692 | txq->tx_db.data.bd_prod = | |
693 | cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl)); | |
694 | ||
695 | /* wmb makes sure that the BDs data is updated before updating the | |
696 | * producer, otherwise FW may read old data from the BDs. | |
697 | */ | |
698 | wmb(); | |
699 | barrier(); | |
700 | writel(txq->tx_db.raw, txq->doorbell_addr); | |
701 | ||
702 | /* mmiowb is needed to synchronize doorbell writes from more than one | |
703 | * processor. It guarantees that the write arrives to the device before | |
704 | * the queue lock is released and another start_xmit is called (possibly | |
705 | * on another CPU). Without this barrier, the next doorbell can bypass | |
706 | * this doorbell. This is applicable to IA64/Altix systems. | |
707 | */ | |
708 | mmiowb(); | |
709 | ||
710 | if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl) | |
711 | < (MAX_SKB_FRAGS + 1))) { | |
712 | netif_tx_stop_queue(netdev_txq); | |
713 | DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, | |
714 | "Stop queue was called\n"); | |
715 | /* paired memory barrier is in qede_tx_int(), we have to keep | |
716 | * ordering of set_bit() in netif_tx_stop_queue() and read of | |
717 | * fp->bd_tx_cons | |
718 | */ | |
719 | smp_mb(); | |
720 | ||
721 | if (qed_chain_get_elem_left(&txq->tx_pbl) | |
722 | >= (MAX_SKB_FRAGS + 1) && | |
723 | (edev->state == QEDE_STATE_OPEN)) { | |
724 | netif_tx_wake_queue(netdev_txq); | |
725 | DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED, | |
726 | "Wake queue was called\n"); | |
727 | } | |
728 | } | |
729 | ||
730 | return NETDEV_TX_OK; | |
731 | } | |
732 | ||
16f46bf0 | 733 | int qede_txq_has_work(struct qede_tx_queue *txq) |
2950219d YM |
734 | { |
735 | u16 hw_bd_cons; | |
736 | ||
737 | /* Tell compiler that consumer and producer can change */ | |
738 | barrier(); | |
739 | hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); | |
740 | if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1) | |
741 | return 0; | |
742 | ||
743 | return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl); | |
744 | } | |
745 | ||
746 | static int qede_tx_int(struct qede_dev *edev, | |
747 | struct qede_tx_queue *txq) | |
748 | { | |
749 | struct netdev_queue *netdev_txq; | |
750 | u16 hw_bd_cons; | |
751 | unsigned int pkts_compl = 0, bytes_compl = 0; | |
752 | int rc; | |
753 | ||
754 | netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index); | |
755 | ||
756 | hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr); | |
757 | barrier(); | |
758 | ||
759 | while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) { | |
760 | int len = 0; | |
761 | ||
762 | rc = qede_free_tx_pkt(edev, txq, &len); | |
763 | if (rc) { | |
764 | DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n", | |
765 | hw_bd_cons, | |
766 | qed_chain_get_cons_idx(&txq->tx_pbl)); | |
767 | break; | |
768 | } | |
769 | ||
770 | bytes_compl += len; | |
771 | pkts_compl++; | |
772 | txq->sw_tx_cons++; | |
773 | } | |
774 | ||
775 | netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl); | |
776 | ||
777 | /* Need to make the tx_bd_cons update visible to start_xmit() | |
778 | * before checking for netif_tx_queue_stopped(). Without the | |
779 | * memory barrier, there is a small possibility that | |
780 | * start_xmit() will miss it and cause the queue to be stopped | |
781 | * forever. | |
782 | * On the other hand we need an rmb() here to ensure the proper | |
783 | * ordering of bit testing in the following | |
784 | * netif_tx_queue_stopped(txq) call. | |
785 | */ | |
786 | smp_mb(); | |
787 | ||
788 | if (unlikely(netif_tx_queue_stopped(netdev_txq))) { | |
789 | /* Taking tx_lock is needed to prevent reenabling the queue | |
790 | * while it's empty. This could have happen if rx_action() gets | |
791 | * suspended in qede_tx_int() after the condition before | |
792 | * netif_tx_wake_queue(), while tx_action (qede_start_xmit()): | |
793 | * | |
794 | * stops the queue->sees fresh tx_bd_cons->releases the queue-> | |
795 | * sends some packets consuming the whole queue again-> | |
796 | * stops the queue | |
797 | */ | |
798 | ||
799 | __netif_tx_lock(netdev_txq, smp_processor_id()); | |
800 | ||
801 | if ((netif_tx_queue_stopped(netdev_txq)) && | |
802 | (edev->state == QEDE_STATE_OPEN) && | |
803 | (qed_chain_get_elem_left(&txq->tx_pbl) | |
804 | >= (MAX_SKB_FRAGS + 1))) { | |
805 | netif_tx_wake_queue(netdev_txq); | |
806 | DP_VERBOSE(edev, NETIF_MSG_TX_DONE, | |
807 | "Wake queue was called\n"); | |
808 | } | |
809 | ||
810 | __netif_tx_unlock(netdev_txq); | |
811 | } | |
812 | ||
813 | return 0; | |
814 | } | |
815 | ||
16f46bf0 | 816 | bool qede_has_rx_work(struct qede_rx_queue *rxq) |
2950219d YM |
817 | { |
818 | u16 hw_comp_cons, sw_comp_cons; | |
819 | ||
820 | /* Tell compiler that status block fields can change */ | |
821 | barrier(); | |
822 | ||
823 | hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); | |
824 | sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); | |
825 | ||
826 | return hw_comp_cons != sw_comp_cons; | |
827 | } | |
828 | ||
829 | static bool qede_has_tx_work(struct qede_fastpath *fp) | |
830 | { | |
831 | u8 tc; | |
832 | ||
833 | for (tc = 0; tc < fp->edev->num_tc; tc++) | |
834 | if (qede_txq_has_work(&fp->txqs[tc])) | |
835 | return true; | |
836 | return false; | |
837 | } | |
838 | ||
f86af2df MC |
839 | static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq) |
840 | { | |
841 | qed_chain_consume(&rxq->rx_bd_ring); | |
842 | rxq->sw_rx_cons++; | |
843 | } | |
844 | ||
fc48b7a6 YM |
845 | /* This function reuses the buffer(from an offset) from |
846 | * consumer index to producer index in the bd ring | |
2950219d | 847 | */ |
fc48b7a6 YM |
848 | static inline void qede_reuse_page(struct qede_dev *edev, |
849 | struct qede_rx_queue *rxq, | |
850 | struct sw_rx_data *curr_cons) | |
2950219d | 851 | { |
2950219d | 852 | struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); |
fc48b7a6 YM |
853 | struct sw_rx_data *curr_prod; |
854 | dma_addr_t new_mapping; | |
2950219d | 855 | |
fc48b7a6 YM |
856 | curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; |
857 | *curr_prod = *curr_cons; | |
2950219d | 858 | |
fc48b7a6 YM |
859 | new_mapping = curr_prod->mapping + curr_prod->page_offset; |
860 | ||
861 | rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping)); | |
862 | rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping)); | |
2950219d | 863 | |
2950219d | 864 | rxq->sw_rx_prod++; |
fc48b7a6 YM |
865 | curr_cons->data = NULL; |
866 | } | |
867 | ||
f86af2df MC |
868 | /* In case of allocation failures reuse buffers |
869 | * from consumer index to produce buffers for firmware | |
870 | */ | |
16f46bf0 SRK |
871 | void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, |
872 | struct qede_dev *edev, u8 count) | |
f86af2df MC |
873 | { |
874 | struct sw_rx_data *curr_cons; | |
875 | ||
876 | for (; count > 0; count--) { | |
877 | curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; | |
878 | qede_reuse_page(edev, rxq, curr_cons); | |
879 | qede_rx_bd_ring_consume(rxq); | |
880 | } | |
881 | } | |
882 | ||
fc48b7a6 YM |
883 | static inline int qede_realloc_rx_buffer(struct qede_dev *edev, |
884 | struct qede_rx_queue *rxq, | |
885 | struct sw_rx_data *curr_cons) | |
886 | { | |
887 | /* Move to the next segment in the page */ | |
888 | curr_cons->page_offset += rxq->rx_buf_seg_size; | |
889 | ||
890 | if (curr_cons->page_offset == PAGE_SIZE) { | |
f86af2df MC |
891 | if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { |
892 | /* Since we failed to allocate new buffer | |
893 | * current buffer can be used again. | |
894 | */ | |
895 | curr_cons->page_offset -= rxq->rx_buf_seg_size; | |
896 | ||
fc48b7a6 | 897 | return -ENOMEM; |
f86af2df | 898 | } |
fc48b7a6 YM |
899 | |
900 | dma_unmap_page(&edev->pdev->dev, curr_cons->mapping, | |
901 | PAGE_SIZE, DMA_FROM_DEVICE); | |
902 | } else { | |
903 | /* Increment refcount of the page as we don't want | |
904 | * network stack to take the ownership of the page | |
905 | * which can be recycled multiple times by the driver. | |
906 | */ | |
907 | atomic_inc(&curr_cons->data->_count); | |
908 | qede_reuse_page(edev, rxq, curr_cons); | |
909 | } | |
910 | ||
911 | return 0; | |
2950219d YM |
912 | } |
913 | ||
914 | static inline void qede_update_rx_prod(struct qede_dev *edev, | |
915 | struct qede_rx_queue *rxq) | |
916 | { | |
917 | u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring); | |
918 | u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring); | |
919 | struct eth_rx_prod_data rx_prods = {0}; | |
920 | ||
921 | /* Update producers */ | |
922 | rx_prods.bd_prod = cpu_to_le16(bd_prod); | |
923 | rx_prods.cqe_prod = cpu_to_le16(cqe_prod); | |
924 | ||
925 | /* Make sure that the BD and SGE data is updated before updating the | |
926 | * producers since FW might read the BD/SGE right after the producer | |
927 | * is updated. | |
928 | */ | |
929 | wmb(); | |
930 | ||
931 | internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods), | |
932 | (u32 *)&rx_prods); | |
933 | ||
934 | /* mmiowb is needed to synchronize doorbell writes from more than one | |
935 | * processor. It guarantees that the write arrives to the device before | |
936 | * the napi lock is released and another qede_poll is called (possibly | |
937 | * on another CPU). Without this barrier, the next doorbell can bypass | |
938 | * this doorbell. This is applicable to IA64/Altix systems. | |
939 | */ | |
940 | mmiowb(); | |
941 | } | |
942 | ||
943 | static u32 qede_get_rxhash(struct qede_dev *edev, | |
944 | u8 bitfields, | |
945 | __le32 rss_hash, | |
946 | enum pkt_hash_types *rxhash_type) | |
947 | { | |
948 | enum rss_hash_type htype; | |
949 | ||
950 | htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE); | |
951 | ||
952 | if ((edev->ndev->features & NETIF_F_RXHASH) && htype) { | |
953 | *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) || | |
954 | (htype == RSS_HASH_TYPE_IPV6)) ? | |
955 | PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4; | |
956 | return le32_to_cpu(rss_hash); | |
957 | } | |
958 | *rxhash_type = PKT_HASH_TYPE_NONE; | |
959 | return 0; | |
960 | } | |
961 | ||
962 | static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag) | |
963 | { | |
964 | skb_checksum_none_assert(skb); | |
965 | ||
966 | if (csum_flag & QEDE_CSUM_UNNECESSARY) | |
967 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
14db81de MC |
968 | |
969 | if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) | |
970 | skb->csum_level = 1; | |
2950219d YM |
971 | } |
972 | ||
973 | static inline void qede_skb_receive(struct qede_dev *edev, | |
974 | struct qede_fastpath *fp, | |
975 | struct sk_buff *skb, | |
976 | u16 vlan_tag) | |
977 | { | |
978 | if (vlan_tag) | |
979 | __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), | |
980 | vlan_tag); | |
981 | ||
982 | napi_gro_receive(&fp->napi, skb); | |
983 | } | |
984 | ||
55482edc MC |
985 | static void qede_set_gro_params(struct qede_dev *edev, |
986 | struct sk_buff *skb, | |
987 | struct eth_fast_path_rx_tpa_start_cqe *cqe) | |
988 | { | |
989 | u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags); | |
990 | ||
991 | if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) & | |
992 | PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2) | |
993 | skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6; | |
994 | else | |
995 | skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4; | |
996 | ||
997 | skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) - | |
998 | cqe->header_len; | |
999 | } | |
1000 | ||
1001 | static int qede_fill_frag_skb(struct qede_dev *edev, | |
1002 | struct qede_rx_queue *rxq, | |
1003 | u8 tpa_agg_index, | |
1004 | u16 len_on_bd) | |
1005 | { | |
1006 | struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons & | |
1007 | NUM_RX_BDS_MAX]; | |
1008 | struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index]; | |
1009 | struct sk_buff *skb = tpa_info->skb; | |
1010 | ||
1011 | if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) | |
1012 | goto out; | |
1013 | ||
1014 | /* Add one frag and update the appropriate fields in the skb */ | |
1015 | skb_fill_page_desc(skb, tpa_info->frag_id++, | |
1016 | current_bd->data, current_bd->page_offset, | |
1017 | len_on_bd); | |
1018 | ||
1019 | if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) { | |
f86af2df MC |
1020 | /* Incr page ref count to reuse on allocation failure |
1021 | * so that it doesn't get freed while freeing SKB. | |
1022 | */ | |
1023 | atomic_inc(¤t_bd->data->_count); | |
55482edc MC |
1024 | goto out; |
1025 | } | |
1026 | ||
1027 | qed_chain_consume(&rxq->rx_bd_ring); | |
1028 | rxq->sw_rx_cons++; | |
1029 | ||
1030 | skb->data_len += len_on_bd; | |
1031 | skb->truesize += rxq->rx_buf_seg_size; | |
1032 | skb->len += len_on_bd; | |
1033 | ||
1034 | return 0; | |
1035 | ||
1036 | out: | |
f86af2df MC |
1037 | tpa_info->agg_state = QEDE_AGG_STATE_ERROR; |
1038 | qede_recycle_rx_bd_ring(rxq, edev, 1); | |
55482edc MC |
1039 | return -ENOMEM; |
1040 | } | |
1041 | ||
1042 | static void qede_tpa_start(struct qede_dev *edev, | |
1043 | struct qede_rx_queue *rxq, | |
1044 | struct eth_fast_path_rx_tpa_start_cqe *cqe) | |
1045 | { | |
1046 | struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; | |
1047 | struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring); | |
1048 | struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring); | |
1049 | struct sw_rx_data *replace_buf = &tpa_info->replace_buf; | |
1050 | dma_addr_t mapping = tpa_info->replace_buf_mapping; | |
1051 | struct sw_rx_data *sw_rx_data_cons; | |
1052 | struct sw_rx_data *sw_rx_data_prod; | |
1053 | enum pkt_hash_types rxhash_type; | |
1054 | u32 rxhash; | |
1055 | ||
1056 | sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX]; | |
1057 | sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; | |
1058 | ||
1059 | /* Use pre-allocated replacement buffer - we can't release the agg. | |
1060 | * start until its over and we don't want to risk allocation failing | |
1061 | * here, so re-allocate when aggregation will be over. | |
1062 | */ | |
1063 | dma_unmap_addr_set(sw_rx_data_prod, mapping, | |
1064 | dma_unmap_addr(replace_buf, mapping)); | |
1065 | ||
1066 | sw_rx_data_prod->data = replace_buf->data; | |
1067 | rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping)); | |
1068 | rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping)); | |
1069 | sw_rx_data_prod->page_offset = replace_buf->page_offset; | |
1070 | ||
1071 | rxq->sw_rx_prod++; | |
1072 | ||
1073 | /* move partial skb from cons to pool (don't unmap yet) | |
1074 | * save mapping, incase we drop the packet later on. | |
1075 | */ | |
1076 | tpa_info->start_buf = *sw_rx_data_cons; | |
1077 | mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi), | |
1078 | le32_to_cpu(rx_bd_cons->addr.lo)); | |
1079 | ||
1080 | tpa_info->start_buf_mapping = mapping; | |
1081 | rxq->sw_rx_cons++; | |
1082 | ||
1083 | /* set tpa state to start only if we are able to allocate skb | |
1084 | * for this aggregation, otherwise mark as error and aggregation will | |
1085 | * be dropped | |
1086 | */ | |
1087 | tpa_info->skb = netdev_alloc_skb(edev->ndev, | |
1088 | le16_to_cpu(cqe->len_on_first_bd)); | |
1089 | if (unlikely(!tpa_info->skb)) { | |
f86af2df | 1090 | DP_NOTICE(edev, "Failed to allocate SKB for gro\n"); |
55482edc | 1091 | tpa_info->agg_state = QEDE_AGG_STATE_ERROR; |
f86af2df | 1092 | goto cons_buf; |
55482edc MC |
1093 | } |
1094 | ||
1095 | skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd)); | |
1096 | memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe)); | |
1097 | ||
1098 | /* Start filling in the aggregation info */ | |
1099 | tpa_info->frag_id = 0; | |
1100 | tpa_info->agg_state = QEDE_AGG_STATE_START; | |
1101 | ||
1102 | rxhash = qede_get_rxhash(edev, cqe->bitfields, | |
1103 | cqe->rss_hash, &rxhash_type); | |
1104 | skb_set_hash(tpa_info->skb, rxhash, rxhash_type); | |
1105 | if ((le16_to_cpu(cqe->pars_flags.flags) >> | |
1106 | PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) & | |
1107 | PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK) | |
1108 | tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag); | |
1109 | else | |
1110 | tpa_info->vlan_tag = 0; | |
1111 | ||
1112 | /* This is needed in order to enable forwarding support */ | |
1113 | qede_set_gro_params(edev, tpa_info->skb, cqe); | |
1114 | ||
f86af2df | 1115 | cons_buf: /* We still need to handle bd_len_list to consume buffers */ |
55482edc MC |
1116 | if (likely(cqe->ext_bd_len_list[0])) |
1117 | qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, | |
1118 | le16_to_cpu(cqe->ext_bd_len_list[0])); | |
1119 | ||
1120 | if (unlikely(cqe->ext_bd_len_list[1])) { | |
1121 | DP_ERR(edev, | |
1122 | "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n"); | |
1123 | tpa_info->agg_state = QEDE_AGG_STATE_ERROR; | |
1124 | } | |
1125 | } | |
1126 | ||
88f09bd5 | 1127 | #ifdef CONFIG_INET |
55482edc MC |
1128 | static void qede_gro_ip_csum(struct sk_buff *skb) |
1129 | { | |
1130 | const struct iphdr *iph = ip_hdr(skb); | |
1131 | struct tcphdr *th; | |
1132 | ||
55482edc MC |
1133 | skb_set_transport_header(skb, sizeof(struct iphdr)); |
1134 | th = tcp_hdr(skb); | |
1135 | ||
1136 | th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb), | |
1137 | iph->saddr, iph->daddr, 0); | |
1138 | ||
1139 | tcp_gro_complete(skb); | |
1140 | } | |
1141 | ||
1142 | static void qede_gro_ipv6_csum(struct sk_buff *skb) | |
1143 | { | |
1144 | struct ipv6hdr *iph = ipv6_hdr(skb); | |
1145 | struct tcphdr *th; | |
1146 | ||
55482edc MC |
1147 | skb_set_transport_header(skb, sizeof(struct ipv6hdr)); |
1148 | th = tcp_hdr(skb); | |
1149 | ||
1150 | th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb), | |
1151 | &iph->saddr, &iph->daddr, 0); | |
1152 | tcp_gro_complete(skb); | |
1153 | } | |
88f09bd5 | 1154 | #endif |
55482edc MC |
1155 | |
1156 | static void qede_gro_receive(struct qede_dev *edev, | |
1157 | struct qede_fastpath *fp, | |
1158 | struct sk_buff *skb, | |
1159 | u16 vlan_tag) | |
1160 | { | |
ee2fa8e6 MC |
1161 | /* FW can send a single MTU sized packet from gro flow |
1162 | * due to aggregation timeout/last segment etc. which | |
1163 | * is not expected to be a gro packet. If a skb has zero | |
1164 | * frags then simply push it in the stack as non gso skb. | |
1165 | */ | |
1166 | if (unlikely(!skb->data_len)) { | |
1167 | skb_shinfo(skb)->gso_type = 0; | |
1168 | skb_shinfo(skb)->gso_size = 0; | |
1169 | goto send_skb; | |
1170 | } | |
1171 | ||
88f09bd5 | 1172 | #ifdef CONFIG_INET |
55482edc | 1173 | if (skb_shinfo(skb)->gso_size) { |
aad94c04 MC |
1174 | skb_set_network_header(skb, 0); |
1175 | ||
55482edc MC |
1176 | switch (skb->protocol) { |
1177 | case htons(ETH_P_IP): | |
1178 | qede_gro_ip_csum(skb); | |
1179 | break; | |
1180 | case htons(ETH_P_IPV6): | |
1181 | qede_gro_ipv6_csum(skb); | |
1182 | break; | |
1183 | default: | |
1184 | DP_ERR(edev, | |
1185 | "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n", | |
1186 | ntohs(skb->protocol)); | |
1187 | } | |
1188 | } | |
88f09bd5 | 1189 | #endif |
ee2fa8e6 MC |
1190 | |
1191 | send_skb: | |
55482edc MC |
1192 | skb_record_rx_queue(skb, fp->rss_id); |
1193 | qede_skb_receive(edev, fp, skb, vlan_tag); | |
1194 | } | |
1195 | ||
1196 | static inline void qede_tpa_cont(struct qede_dev *edev, | |
1197 | struct qede_rx_queue *rxq, | |
1198 | struct eth_fast_path_rx_tpa_cont_cqe *cqe) | |
1199 | { | |
1200 | int i; | |
1201 | ||
1202 | for (i = 0; cqe->len_list[i]; i++) | |
1203 | qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, | |
1204 | le16_to_cpu(cqe->len_list[i])); | |
1205 | ||
1206 | if (unlikely(i > 1)) | |
1207 | DP_ERR(edev, | |
1208 | "Strange - TPA cont with more than a single len_list entry\n"); | |
1209 | } | |
1210 | ||
1211 | static void qede_tpa_end(struct qede_dev *edev, | |
1212 | struct qede_fastpath *fp, | |
1213 | struct eth_fast_path_rx_tpa_end_cqe *cqe) | |
1214 | { | |
1215 | struct qede_rx_queue *rxq = fp->rxq; | |
1216 | struct qede_agg_info *tpa_info; | |
1217 | struct sk_buff *skb; | |
1218 | int i; | |
1219 | ||
1220 | tpa_info = &rxq->tpa_info[cqe->tpa_agg_index]; | |
1221 | skb = tpa_info->skb; | |
1222 | ||
1223 | for (i = 0; cqe->len_list[i]; i++) | |
1224 | qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index, | |
1225 | le16_to_cpu(cqe->len_list[i])); | |
1226 | if (unlikely(i > 1)) | |
1227 | DP_ERR(edev, | |
1228 | "Strange - TPA emd with more than a single len_list entry\n"); | |
1229 | ||
1230 | if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START)) | |
1231 | goto err; | |
1232 | ||
1233 | /* Sanity */ | |
1234 | if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1)) | |
1235 | DP_ERR(edev, | |
1236 | "Strange - TPA had %02x BDs, but SKB has only %d frags\n", | |
1237 | cqe->num_of_bds, tpa_info->frag_id); | |
1238 | if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len))) | |
1239 | DP_ERR(edev, | |
1240 | "Strange - total packet len [cqe] is %4x but SKB has len %04x\n", | |
1241 | le16_to_cpu(cqe->total_packet_len), skb->len); | |
1242 | ||
1243 | memcpy(skb->data, | |
1244 | page_address(tpa_info->start_buf.data) + | |
1245 | tpa_info->start_cqe.placement_offset + | |
1246 | tpa_info->start_buf.page_offset, | |
1247 | le16_to_cpu(tpa_info->start_cqe.len_on_first_bd)); | |
1248 | ||
1249 | /* Recycle [mapped] start buffer for the next replacement */ | |
1250 | tpa_info->replace_buf = tpa_info->start_buf; | |
1251 | tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; | |
1252 | ||
1253 | /* Finalize the SKB */ | |
1254 | skb->protocol = eth_type_trans(skb, edev->ndev); | |
1255 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
1256 | ||
1257 | /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count | |
1258 | * to skb_shinfo(skb)->gso_segs | |
1259 | */ | |
1260 | NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs); | |
1261 | ||
1262 | qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag); | |
1263 | ||
1264 | tpa_info->agg_state = QEDE_AGG_STATE_NONE; | |
1265 | ||
1266 | return; | |
1267 | err: | |
1268 | /* The BD starting the aggregation is still mapped; Re-use it for | |
1269 | * future aggregations [as replacement buffer] | |
1270 | */ | |
1271 | memcpy(&tpa_info->replace_buf, &tpa_info->start_buf, | |
1272 | sizeof(struct sw_rx_data)); | |
1273 | tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping; | |
1274 | tpa_info->start_buf.data = NULL; | |
1275 | tpa_info->agg_state = QEDE_AGG_STATE_NONE; | |
1276 | dev_kfree_skb_any(tpa_info->skb); | |
1277 | tpa_info->skb = NULL; | |
1278 | } | |
1279 | ||
14db81de MC |
1280 | static bool qede_tunn_exist(u16 flag) |
1281 | { | |
1282 | return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK << | |
1283 | PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT)); | |
1284 | } | |
1285 | ||
1286 | static u8 qede_check_tunn_csum(u16 flag) | |
1287 | { | |
1288 | u16 csum_flag = 0; | |
1289 | u8 tcsum = 0; | |
1290 | ||
1291 | if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK << | |
1292 | PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT)) | |
1293 | csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK << | |
1294 | PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT; | |
1295 | ||
1296 | if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << | |
1297 | PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { | |
1298 | csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << | |
1299 | PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; | |
1300 | tcsum = QEDE_TUNN_CSUM_UNNECESSARY; | |
1301 | } | |
1302 | ||
1303 | csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK << | |
1304 | PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT | | |
1305 | PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << | |
1306 | PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; | |
1307 | ||
1308 | if (csum_flag & flag) | |
1309 | return QEDE_CSUM_ERROR; | |
1310 | ||
1311 | return QEDE_CSUM_UNNECESSARY | tcsum; | |
1312 | } | |
1313 | ||
1314 | static u8 qede_check_notunn_csum(u16 flag) | |
2950219d YM |
1315 | { |
1316 | u16 csum_flag = 0; | |
1317 | u8 csum = 0; | |
1318 | ||
14db81de MC |
1319 | if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK << |
1320 | PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) { | |
2950219d YM |
1321 | csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK << |
1322 | PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT; | |
1323 | csum = QEDE_CSUM_UNNECESSARY; | |
1324 | } | |
1325 | ||
1326 | csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK << | |
1327 | PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT; | |
1328 | ||
1329 | if (csum_flag & flag) | |
1330 | return QEDE_CSUM_ERROR; | |
1331 | ||
1332 | return csum; | |
1333 | } | |
1334 | ||
14db81de MC |
1335 | static u8 qede_check_csum(u16 flag) |
1336 | { | |
1337 | if (!qede_tunn_exist(flag)) | |
1338 | return qede_check_notunn_csum(flag); | |
1339 | else | |
1340 | return qede_check_tunn_csum(flag); | |
1341 | } | |
1342 | ||
2950219d YM |
1343 | static int qede_rx_int(struct qede_fastpath *fp, int budget) |
1344 | { | |
1345 | struct qede_dev *edev = fp->edev; | |
1346 | struct qede_rx_queue *rxq = fp->rxq; | |
1347 | ||
1348 | u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag; | |
1349 | int rx_pkt = 0; | |
1350 | u8 csum_flag; | |
1351 | ||
1352 | hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr); | |
1353 | sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); | |
1354 | ||
1355 | /* Memory barrier to prevent the CPU from doing speculative reads of CQE | |
1356 | * / BD in the while-loop before reading hw_comp_cons. If the CQE is | |
1357 | * read before it is written by FW, then FW writes CQE and SB, and then | |
1358 | * the CPU reads the hw_comp_cons, it will use an old CQE. | |
1359 | */ | |
1360 | rmb(); | |
1361 | ||
1362 | /* Loop to complete all indicated BDs */ | |
1363 | while (sw_comp_cons != hw_comp_cons) { | |
1364 | struct eth_fast_path_rx_reg_cqe *fp_cqe; | |
1365 | enum pkt_hash_types rxhash_type; | |
1366 | enum eth_rx_cqe_type cqe_type; | |
1367 | struct sw_rx_data *sw_rx_data; | |
1368 | union eth_rx_cqe *cqe; | |
1369 | struct sk_buff *skb; | |
fc48b7a6 YM |
1370 | struct page *data; |
1371 | __le16 flags; | |
2950219d YM |
1372 | u16 len, pad; |
1373 | u32 rx_hash; | |
2950219d YM |
1374 | |
1375 | /* Get the CQE from the completion ring */ | |
1376 | cqe = (union eth_rx_cqe *) | |
1377 | qed_chain_consume(&rxq->rx_comp_ring); | |
1378 | cqe_type = cqe->fast_path_regular.type; | |
1379 | ||
1380 | if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) { | |
1381 | edev->ops->eth_cqe_completion( | |
1382 | edev->cdev, fp->rss_id, | |
1383 | (struct eth_slow_path_rx_cqe *)cqe); | |
1384 | goto next_cqe; | |
1385 | } | |
1386 | ||
55482edc MC |
1387 | if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) { |
1388 | switch (cqe_type) { | |
1389 | case ETH_RX_CQE_TYPE_TPA_START: | |
1390 | qede_tpa_start(edev, rxq, | |
1391 | &cqe->fast_path_tpa_start); | |
1392 | goto next_cqe; | |
1393 | case ETH_RX_CQE_TYPE_TPA_CONT: | |
1394 | qede_tpa_cont(edev, rxq, | |
1395 | &cqe->fast_path_tpa_cont); | |
1396 | goto next_cqe; | |
1397 | case ETH_RX_CQE_TYPE_TPA_END: | |
1398 | qede_tpa_end(edev, fp, | |
1399 | &cqe->fast_path_tpa_end); | |
1400 | goto next_rx_only; | |
1401 | default: | |
1402 | break; | |
1403 | } | |
1404 | } | |
1405 | ||
2950219d YM |
1406 | /* Get the data from the SW ring */ |
1407 | sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; | |
1408 | sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; | |
1409 | data = sw_rx_data->data; | |
1410 | ||
1411 | fp_cqe = &cqe->fast_path_regular; | |
fc48b7a6 | 1412 | len = le16_to_cpu(fp_cqe->len_on_first_bd); |
2950219d | 1413 | pad = fp_cqe->placement_offset; |
fc48b7a6 | 1414 | flags = cqe->fast_path_regular.pars_flags.flags; |
2950219d | 1415 | |
fc48b7a6 YM |
1416 | /* If this is an error packet then drop it */ |
1417 | parse_flag = le16_to_cpu(flags); | |
2950219d | 1418 | |
fc48b7a6 YM |
1419 | csum_flag = qede_check_csum(parse_flag); |
1420 | if (unlikely(csum_flag == QEDE_CSUM_ERROR)) { | |
1421 | DP_NOTICE(edev, | |
1422 | "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n", | |
1423 | sw_comp_cons, parse_flag); | |
1424 | rxq->rx_hw_errors++; | |
f86af2df MC |
1425 | qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); |
1426 | goto next_cqe; | |
fc48b7a6 | 1427 | } |
2950219d | 1428 | |
fc48b7a6 YM |
1429 | skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE); |
1430 | if (unlikely(!skb)) { | |
2950219d | 1431 | DP_NOTICE(edev, |
fc48b7a6 | 1432 | "Build_skb failed, dropping incoming packet\n"); |
f86af2df | 1433 | qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num); |
2950219d | 1434 | rxq->rx_alloc_errors++; |
f86af2df | 1435 | goto next_cqe; |
fc48b7a6 YM |
1436 | } |
1437 | ||
1438 | /* Copy data into SKB */ | |
1439 | if (len + pad <= QEDE_RX_HDR_SIZE) { | |
1440 | memcpy(skb_put(skb, len), | |
1441 | page_address(data) + pad + | |
1442 | sw_rx_data->page_offset, len); | |
1443 | qede_reuse_page(edev, rxq, sw_rx_data); | |
1444 | } else { | |
1445 | struct skb_frag_struct *frag; | |
1446 | unsigned int pull_len; | |
1447 | unsigned char *va; | |
1448 | ||
1449 | frag = &skb_shinfo(skb)->frags[0]; | |
1450 | ||
1451 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data, | |
1452 | pad + sw_rx_data->page_offset, | |
1453 | len, rxq->rx_buf_seg_size); | |
1454 | ||
1455 | va = skb_frag_address(frag); | |
1456 | pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE); | |
1457 | ||
1458 | /* Align the pull_len to optimize memcpy */ | |
1459 | memcpy(skb->data, va, ALIGN(pull_len, sizeof(long))); | |
1460 | ||
1461 | skb_frag_size_sub(frag, pull_len); | |
1462 | frag->page_offset += pull_len; | |
1463 | skb->data_len -= pull_len; | |
1464 | skb->tail += pull_len; | |
1465 | ||
1466 | if (unlikely(qede_realloc_rx_buffer(edev, rxq, | |
1467 | sw_rx_data))) { | |
1468 | DP_ERR(edev, "Failed to allocate rx buffer\n"); | |
f86af2df MC |
1469 | /* Incr page ref count to reuse on allocation |
1470 | * failure so that it doesn't get freed while | |
1471 | * freeing SKB. | |
1472 | */ | |
1473 | ||
1474 | atomic_inc(&sw_rx_data->data->_count); | |
fc48b7a6 | 1475 | rxq->rx_alloc_errors++; |
f86af2df MC |
1476 | qede_recycle_rx_bd_ring(rxq, edev, |
1477 | fp_cqe->bd_num); | |
1478 | dev_kfree_skb_any(skb); | |
fc48b7a6 YM |
1479 | goto next_cqe; |
1480 | } | |
2950219d YM |
1481 | } |
1482 | ||
f86af2df MC |
1483 | qede_rx_bd_ring_consume(rxq); |
1484 | ||
fc48b7a6 YM |
1485 | if (fp_cqe->bd_num != 1) { |
1486 | u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len); | |
1487 | u8 num_frags; | |
1488 | ||
1489 | pkt_len -= len; | |
1490 | ||
1491 | for (num_frags = fp_cqe->bd_num - 1; num_frags > 0; | |
1492 | num_frags--) { | |
1493 | u16 cur_size = pkt_len > rxq->rx_buf_size ? | |
1494 | rxq->rx_buf_size : pkt_len; | |
f86af2df MC |
1495 | if (unlikely(!cur_size)) { |
1496 | DP_ERR(edev, | |
1497 | "Still got %d BDs for mapping jumbo, but length became 0\n", | |
1498 | num_frags); | |
1499 | qede_recycle_rx_bd_ring(rxq, edev, | |
1500 | num_frags); | |
1501 | dev_kfree_skb_any(skb); | |
1502 | goto next_cqe; | |
1503 | } | |
fc48b7a6 | 1504 | |
f86af2df MC |
1505 | if (unlikely(qede_alloc_rx_buffer(edev, rxq))) { |
1506 | qede_recycle_rx_bd_ring(rxq, edev, | |
1507 | num_frags); | |
1508 | dev_kfree_skb_any(skb); | |
fc48b7a6 | 1509 | goto next_cqe; |
f86af2df | 1510 | } |
fc48b7a6 | 1511 | |
fc48b7a6 YM |
1512 | sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX; |
1513 | sw_rx_data = &rxq->sw_rx_ring[sw_rx_index]; | |
f86af2df MC |
1514 | qede_rx_bd_ring_consume(rxq); |
1515 | ||
fc48b7a6 YM |
1516 | dma_unmap_page(&edev->pdev->dev, |
1517 | sw_rx_data->mapping, | |
1518 | PAGE_SIZE, DMA_FROM_DEVICE); | |
1519 | ||
1520 | skb_fill_page_desc(skb, | |
1521 | skb_shinfo(skb)->nr_frags++, | |
1522 | sw_rx_data->data, 0, | |
1523 | cur_size); | |
1524 | ||
1525 | skb->truesize += PAGE_SIZE; | |
1526 | skb->data_len += cur_size; | |
1527 | skb->len += cur_size; | |
1528 | pkt_len -= cur_size; | |
1529 | } | |
2950219d | 1530 | |
f86af2df | 1531 | if (unlikely(pkt_len)) |
fc48b7a6 YM |
1532 | DP_ERR(edev, |
1533 | "Mapped all BDs of jumbo, but still have %d bytes\n", | |
1534 | pkt_len); | |
1535 | } | |
2950219d YM |
1536 | |
1537 | skb->protocol = eth_type_trans(skb, edev->ndev); | |
1538 | ||
1539 | rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields, | |
1540 | fp_cqe->rss_hash, | |
1541 | &rxhash_type); | |
1542 | ||
1543 | skb_set_hash(skb, rx_hash, rxhash_type); | |
1544 | ||
1545 | qede_set_skb_csum(skb, csum_flag); | |
1546 | ||
1547 | skb_record_rx_queue(skb, fp->rss_id); | |
1548 | ||
1549 | qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag)); | |
55482edc | 1550 | next_rx_only: |
2950219d YM |
1551 | rx_pkt++; |
1552 | ||
1553 | next_cqe: /* don't consume bd rx buffer */ | |
1554 | qed_chain_recycle_consumed(&rxq->rx_comp_ring); | |
1555 | sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring); | |
1556 | /* CR TPA - revisit how to handle budget in TPA perhaps | |
1557 | * increase on "end" | |
1558 | */ | |
1559 | if (rx_pkt == budget) | |
1560 | break; | |
1561 | } /* repeat while sw_comp_cons != hw_comp_cons... */ | |
1562 | ||
1563 | /* Update producers */ | |
1564 | qede_update_rx_prod(edev, rxq); | |
1565 | ||
1566 | return rx_pkt; | |
1567 | } | |
1568 | ||
1569 | static int qede_poll(struct napi_struct *napi, int budget) | |
1570 | { | |
1571 | int work_done = 0; | |
1572 | struct qede_fastpath *fp = container_of(napi, struct qede_fastpath, | |
1573 | napi); | |
1574 | struct qede_dev *edev = fp->edev; | |
1575 | ||
1576 | while (1) { | |
1577 | u8 tc; | |
1578 | ||
1579 | for (tc = 0; tc < edev->num_tc; tc++) | |
1580 | if (qede_txq_has_work(&fp->txqs[tc])) | |
1581 | qede_tx_int(edev, &fp->txqs[tc]); | |
1582 | ||
1583 | if (qede_has_rx_work(fp->rxq)) { | |
1584 | work_done += qede_rx_int(fp, budget - work_done); | |
1585 | ||
1586 | /* must not complete if we consumed full budget */ | |
1587 | if (work_done >= budget) | |
1588 | break; | |
1589 | } | |
1590 | ||
1591 | /* Fall out from the NAPI loop if needed */ | |
1592 | if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) { | |
1593 | qed_sb_update_sb_idx(fp->sb_info); | |
1594 | /* *_has_*_work() reads the status block, | |
1595 | * thus we need to ensure that status block indices | |
1596 | * have been actually read (qed_sb_update_sb_idx) | |
1597 | * prior to this check (*_has_*_work) so that | |
1598 | * we won't write the "newer" value of the status block | |
1599 | * to HW (if there was a DMA right after | |
1600 | * qede_has_rx_work and if there is no rmb, the memory | |
1601 | * reading (qed_sb_update_sb_idx) may be postponed | |
1602 | * to right before *_ack_sb). In this case there | |
1603 | * will never be another interrupt until there is | |
1604 | * another update of the status block, while there | |
1605 | * is still unhandled work. | |
1606 | */ | |
1607 | rmb(); | |
1608 | ||
1609 | if (!(qede_has_rx_work(fp->rxq) || | |
1610 | qede_has_tx_work(fp))) { | |
1611 | napi_complete(napi); | |
1612 | /* Update and reenable interrupts */ | |
1613 | qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, | |
1614 | 1 /*update*/); | |
1615 | break; | |
1616 | } | |
1617 | } | |
1618 | } | |
1619 | ||
1620 | return work_done; | |
1621 | } | |
1622 | ||
1623 | static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie) | |
1624 | { | |
1625 | struct qede_fastpath *fp = fp_cookie; | |
1626 | ||
1627 | qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/); | |
1628 | ||
1629 | napi_schedule_irqoff(&fp->napi); | |
1630 | return IRQ_HANDLED; | |
1631 | } | |
1632 | ||
1633 | /* ------------------------------------------------------------------------- | |
1634 | * END OF FAST-PATH | |
1635 | * ------------------------------------------------------------------------- | |
1636 | */ | |
1637 | ||
1638 | static int qede_open(struct net_device *ndev); | |
1639 | static int qede_close(struct net_device *ndev); | |
0d8e0aa0 SK |
1640 | static int qede_set_mac_addr(struct net_device *ndev, void *p); |
1641 | static void qede_set_rx_mode(struct net_device *ndev); | |
1642 | static void qede_config_rx_mode(struct net_device *ndev); | |
1643 | ||
1644 | static int qede_set_ucast_rx_mac(struct qede_dev *edev, | |
1645 | enum qed_filter_xcast_params_type opcode, | |
1646 | unsigned char mac[ETH_ALEN]) | |
1647 | { | |
1648 | struct qed_filter_params filter_cmd; | |
1649 | ||
1650 | memset(&filter_cmd, 0, sizeof(filter_cmd)); | |
1651 | filter_cmd.type = QED_FILTER_TYPE_UCAST; | |
1652 | filter_cmd.filter.ucast.type = opcode; | |
1653 | filter_cmd.filter.ucast.mac_valid = 1; | |
1654 | ether_addr_copy(filter_cmd.filter.ucast.mac, mac); | |
1655 | ||
1656 | return edev->ops->filter_config(edev->cdev, &filter_cmd); | |
1657 | } | |
1658 | ||
7c1bfcad SRK |
1659 | static int qede_set_ucast_rx_vlan(struct qede_dev *edev, |
1660 | enum qed_filter_xcast_params_type opcode, | |
1661 | u16 vid) | |
1662 | { | |
1663 | struct qed_filter_params filter_cmd; | |
1664 | ||
1665 | memset(&filter_cmd, 0, sizeof(filter_cmd)); | |
1666 | filter_cmd.type = QED_FILTER_TYPE_UCAST; | |
1667 | filter_cmd.filter.ucast.type = opcode; | |
1668 | filter_cmd.filter.ucast.vlan_valid = 1; | |
1669 | filter_cmd.filter.ucast.vlan = vid; | |
1670 | ||
1671 | return edev->ops->filter_config(edev->cdev, &filter_cmd); | |
1672 | } | |
1673 | ||
133fac0e SK |
1674 | void qede_fill_by_demand_stats(struct qede_dev *edev) |
1675 | { | |
1676 | struct qed_eth_stats stats; | |
1677 | ||
1678 | edev->ops->get_vport_stats(edev->cdev, &stats); | |
1679 | edev->stats.no_buff_discards = stats.no_buff_discards; | |
1680 | edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes; | |
1681 | edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes; | |
1682 | edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes; | |
1683 | edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts; | |
1684 | edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts; | |
1685 | edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts; | |
1686 | edev->stats.mftag_filter_discards = stats.mftag_filter_discards; | |
1687 | edev->stats.mac_filter_discards = stats.mac_filter_discards; | |
1688 | ||
1689 | edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes; | |
1690 | edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes; | |
1691 | edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes; | |
1692 | edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts; | |
1693 | edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts; | |
1694 | edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts; | |
1695 | edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts; | |
1696 | edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts; | |
1697 | edev->stats.coalesced_events = stats.tpa_coalesced_events; | |
1698 | edev->stats.coalesced_aborts_num = stats.tpa_aborts_num; | |
1699 | edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts; | |
1700 | edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes; | |
1701 | ||
1702 | edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets; | |
d4967cf3 YM |
1703 | edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets; |
1704 | edev->stats.rx_128_to_255_byte_packets = | |
1705 | stats.rx_128_to_255_byte_packets; | |
1706 | edev->stats.rx_256_to_511_byte_packets = | |
1707 | stats.rx_256_to_511_byte_packets; | |
1708 | edev->stats.rx_512_to_1023_byte_packets = | |
1709 | stats.rx_512_to_1023_byte_packets; | |
1710 | edev->stats.rx_1024_to_1518_byte_packets = | |
1711 | stats.rx_1024_to_1518_byte_packets; | |
1712 | edev->stats.rx_1519_to_1522_byte_packets = | |
1713 | stats.rx_1519_to_1522_byte_packets; | |
1714 | edev->stats.rx_1519_to_2047_byte_packets = | |
1715 | stats.rx_1519_to_2047_byte_packets; | |
1716 | edev->stats.rx_2048_to_4095_byte_packets = | |
1717 | stats.rx_2048_to_4095_byte_packets; | |
1718 | edev->stats.rx_4096_to_9216_byte_packets = | |
1719 | stats.rx_4096_to_9216_byte_packets; | |
1720 | edev->stats.rx_9217_to_16383_byte_packets = | |
1721 | stats.rx_9217_to_16383_byte_packets; | |
133fac0e SK |
1722 | edev->stats.rx_crc_errors = stats.rx_crc_errors; |
1723 | edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames; | |
1724 | edev->stats.rx_pause_frames = stats.rx_pause_frames; | |
1725 | edev->stats.rx_pfc_frames = stats.rx_pfc_frames; | |
1726 | edev->stats.rx_align_errors = stats.rx_align_errors; | |
1727 | edev->stats.rx_carrier_errors = stats.rx_carrier_errors; | |
1728 | edev->stats.rx_oversize_packets = stats.rx_oversize_packets; | |
1729 | edev->stats.rx_jabbers = stats.rx_jabbers; | |
1730 | edev->stats.rx_undersize_packets = stats.rx_undersize_packets; | |
1731 | edev->stats.rx_fragments = stats.rx_fragments; | |
1732 | edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets; | |
1733 | edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets; | |
1734 | edev->stats.tx_128_to_255_byte_packets = | |
1735 | stats.tx_128_to_255_byte_packets; | |
1736 | edev->stats.tx_256_to_511_byte_packets = | |
1737 | stats.tx_256_to_511_byte_packets; | |
1738 | edev->stats.tx_512_to_1023_byte_packets = | |
1739 | stats.tx_512_to_1023_byte_packets; | |
1740 | edev->stats.tx_1024_to_1518_byte_packets = | |
1741 | stats.tx_1024_to_1518_byte_packets; | |
1742 | edev->stats.tx_1519_to_2047_byte_packets = | |
1743 | stats.tx_1519_to_2047_byte_packets; | |
1744 | edev->stats.tx_2048_to_4095_byte_packets = | |
1745 | stats.tx_2048_to_4095_byte_packets; | |
1746 | edev->stats.tx_4096_to_9216_byte_packets = | |
1747 | stats.tx_4096_to_9216_byte_packets; | |
1748 | edev->stats.tx_9217_to_16383_byte_packets = | |
1749 | stats.tx_9217_to_16383_byte_packets; | |
1750 | edev->stats.tx_pause_frames = stats.tx_pause_frames; | |
1751 | edev->stats.tx_pfc_frames = stats.tx_pfc_frames; | |
1752 | edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count; | |
1753 | edev->stats.tx_total_collisions = stats.tx_total_collisions; | |
1754 | edev->stats.brb_truncates = stats.brb_truncates; | |
1755 | edev->stats.brb_discards = stats.brb_discards; | |
1756 | edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames; | |
1757 | } | |
1758 | ||
1759 | static struct rtnl_link_stats64 *qede_get_stats64( | |
1760 | struct net_device *dev, | |
1761 | struct rtnl_link_stats64 *stats) | |
1762 | { | |
1763 | struct qede_dev *edev = netdev_priv(dev); | |
1764 | ||
1765 | qede_fill_by_demand_stats(edev); | |
1766 | ||
1767 | stats->rx_packets = edev->stats.rx_ucast_pkts + | |
1768 | edev->stats.rx_mcast_pkts + | |
1769 | edev->stats.rx_bcast_pkts; | |
1770 | stats->tx_packets = edev->stats.tx_ucast_pkts + | |
1771 | edev->stats.tx_mcast_pkts + | |
1772 | edev->stats.tx_bcast_pkts; | |
1773 | ||
1774 | stats->rx_bytes = edev->stats.rx_ucast_bytes + | |
1775 | edev->stats.rx_mcast_bytes + | |
1776 | edev->stats.rx_bcast_bytes; | |
1777 | ||
1778 | stats->tx_bytes = edev->stats.tx_ucast_bytes + | |
1779 | edev->stats.tx_mcast_bytes + | |
1780 | edev->stats.tx_bcast_bytes; | |
1781 | ||
1782 | stats->tx_errors = edev->stats.tx_err_drop_pkts; | |
1783 | stats->multicast = edev->stats.rx_mcast_pkts + | |
1784 | edev->stats.rx_bcast_pkts; | |
1785 | ||
1786 | stats->rx_fifo_errors = edev->stats.no_buff_discards; | |
1787 | ||
1788 | stats->collisions = edev->stats.tx_total_collisions; | |
1789 | stats->rx_crc_errors = edev->stats.rx_crc_errors; | |
1790 | stats->rx_frame_errors = edev->stats.rx_align_errors; | |
1791 | ||
1792 | return stats; | |
1793 | } | |
1794 | ||
733def6a YM |
1795 | #ifdef CONFIG_QED_SRIOV |
1796 | static int qede_set_vf_rate(struct net_device *dev, int vfidx, | |
1797 | int min_tx_rate, int max_tx_rate) | |
1798 | { | |
1799 | struct qede_dev *edev = netdev_priv(dev); | |
1800 | ||
1801 | return edev->ops->iov->set_rate(edev->cdev, vfidx, max_tx_rate, | |
1802 | max_tx_rate); | |
1803 | } | |
1804 | ||
6ddc7608 YM |
1805 | static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val) |
1806 | { | |
1807 | struct qede_dev *edev = netdev_priv(dev); | |
1808 | ||
1809 | if (!edev->ops) | |
1810 | return -EINVAL; | |
1811 | ||
1812 | return edev->ops->iov->set_spoof(edev->cdev, vfidx, val); | |
1813 | } | |
1814 | ||
733def6a YM |
1815 | static int qede_set_vf_link_state(struct net_device *dev, int vfidx, |
1816 | int link_state) | |
1817 | { | |
1818 | struct qede_dev *edev = netdev_priv(dev); | |
1819 | ||
1820 | if (!edev->ops) | |
1821 | return -EINVAL; | |
1822 | ||
1823 | return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state); | |
1824 | } | |
1825 | #endif | |
1826 | ||
7c1bfcad SRK |
1827 | static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action) |
1828 | { | |
1829 | struct qed_update_vport_params params; | |
1830 | int rc; | |
1831 | ||
1832 | /* Proceed only if action actually needs to be performed */ | |
1833 | if (edev->accept_any_vlan == action) | |
1834 | return; | |
1835 | ||
1836 | memset(¶ms, 0, sizeof(params)); | |
1837 | ||
1838 | params.vport_id = 0; | |
1839 | params.accept_any_vlan = action; | |
1840 | params.update_accept_any_vlan_flg = 1; | |
1841 | ||
1842 | rc = edev->ops->vport_update(edev->cdev, ¶ms); | |
1843 | if (rc) { | |
1844 | DP_ERR(edev, "Failed to %s accept-any-vlan\n", | |
1845 | action ? "enable" : "disable"); | |
1846 | } else { | |
1847 | DP_INFO(edev, "%s accept-any-vlan\n", | |
1848 | action ? "enabled" : "disabled"); | |
1849 | edev->accept_any_vlan = action; | |
1850 | } | |
1851 | } | |
1852 | ||
1853 | static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) | |
1854 | { | |
1855 | struct qede_dev *edev = netdev_priv(dev); | |
1856 | struct qede_vlan *vlan, *tmp; | |
1857 | int rc; | |
1858 | ||
1859 | DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid); | |
1860 | ||
1861 | vlan = kzalloc(sizeof(*vlan), GFP_KERNEL); | |
1862 | if (!vlan) { | |
1863 | DP_INFO(edev, "Failed to allocate struct for vlan\n"); | |
1864 | return -ENOMEM; | |
1865 | } | |
1866 | INIT_LIST_HEAD(&vlan->list); | |
1867 | vlan->vid = vid; | |
1868 | vlan->configured = false; | |
1869 | ||
1870 | /* Verify vlan isn't already configured */ | |
1871 | list_for_each_entry(tmp, &edev->vlan_list, list) { | |
1872 | if (tmp->vid == vlan->vid) { | |
1873 | DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), | |
1874 | "vlan already configured\n"); | |
1875 | kfree(vlan); | |
1876 | return -EEXIST; | |
1877 | } | |
1878 | } | |
1879 | ||
1880 | /* If interface is down, cache this VLAN ID and return */ | |
1881 | if (edev->state != QEDE_STATE_OPEN) { | |
1882 | DP_VERBOSE(edev, NETIF_MSG_IFDOWN, | |
1883 | "Interface is down, VLAN %d will be configured when interface is up\n", | |
1884 | vid); | |
1885 | if (vid != 0) | |
1886 | edev->non_configured_vlans++; | |
1887 | list_add(&vlan->list, &edev->vlan_list); | |
1888 | ||
1889 | return 0; | |
1890 | } | |
1891 | ||
1892 | /* Check for the filter limit. | |
1893 | * Note - vlan0 has a reserved filter and can be added without | |
1894 | * worrying about quota | |
1895 | */ | |
1896 | if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) || | |
1897 | (vlan->vid == 0)) { | |
1898 | rc = qede_set_ucast_rx_vlan(edev, | |
1899 | QED_FILTER_XCAST_TYPE_ADD, | |
1900 | vlan->vid); | |
1901 | if (rc) { | |
1902 | DP_ERR(edev, "Failed to configure VLAN %d\n", | |
1903 | vlan->vid); | |
1904 | kfree(vlan); | |
1905 | return -EINVAL; | |
1906 | } | |
1907 | vlan->configured = true; | |
1908 | ||
1909 | /* vlan0 filter isn't consuming out of our quota */ | |
1910 | if (vlan->vid != 0) | |
1911 | edev->configured_vlans++; | |
1912 | } else { | |
1913 | /* Out of quota; Activate accept-any-VLAN mode */ | |
1914 | if (!edev->non_configured_vlans) | |
1915 | qede_config_accept_any_vlan(edev, true); | |
1916 | ||
1917 | edev->non_configured_vlans++; | |
1918 | } | |
1919 | ||
1920 | list_add(&vlan->list, &edev->vlan_list); | |
1921 | ||
1922 | return 0; | |
1923 | } | |
1924 | ||
1925 | static void qede_del_vlan_from_list(struct qede_dev *edev, | |
1926 | struct qede_vlan *vlan) | |
1927 | { | |
1928 | /* vlan0 filter isn't consuming out of our quota */ | |
1929 | if (vlan->vid != 0) { | |
1930 | if (vlan->configured) | |
1931 | edev->configured_vlans--; | |
1932 | else | |
1933 | edev->non_configured_vlans--; | |
1934 | } | |
1935 | ||
1936 | list_del(&vlan->list); | |
1937 | kfree(vlan); | |
1938 | } | |
1939 | ||
1940 | static int qede_configure_vlan_filters(struct qede_dev *edev) | |
1941 | { | |
1942 | int rc = 0, real_rc = 0, accept_any_vlan = 0; | |
1943 | struct qed_dev_eth_info *dev_info; | |
1944 | struct qede_vlan *vlan = NULL; | |
1945 | ||
1946 | if (list_empty(&edev->vlan_list)) | |
1947 | return 0; | |
1948 | ||
1949 | dev_info = &edev->dev_info; | |
1950 | ||
1951 | /* Configure non-configured vlans */ | |
1952 | list_for_each_entry(vlan, &edev->vlan_list, list) { | |
1953 | if (vlan->configured) | |
1954 | continue; | |
1955 | ||
1956 | /* We have used all our credits, now enable accept_any_vlan */ | |
1957 | if ((vlan->vid != 0) && | |
1958 | (edev->configured_vlans == dev_info->num_vlan_filters)) { | |
1959 | accept_any_vlan = 1; | |
1960 | continue; | |
1961 | } | |
1962 | ||
1963 | DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid); | |
1964 | ||
1965 | rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD, | |
1966 | vlan->vid); | |
1967 | if (rc) { | |
1968 | DP_ERR(edev, "Failed to configure VLAN %u\n", | |
1969 | vlan->vid); | |
1970 | real_rc = rc; | |
1971 | continue; | |
1972 | } | |
1973 | ||
1974 | vlan->configured = true; | |
1975 | /* vlan0 filter doesn't consume our VLAN filter's quota */ | |
1976 | if (vlan->vid != 0) { | |
1977 | edev->non_configured_vlans--; | |
1978 | edev->configured_vlans++; | |
1979 | } | |
1980 | } | |
1981 | ||
1982 | /* enable accept_any_vlan mode if we have more VLANs than credits, | |
1983 | * or remove accept_any_vlan mode if we've actually removed | |
1984 | * a non-configured vlan, and all remaining vlans are truly configured. | |
1985 | */ | |
1986 | ||
1987 | if (accept_any_vlan) | |
1988 | qede_config_accept_any_vlan(edev, true); | |
1989 | else if (!edev->non_configured_vlans) | |
1990 | qede_config_accept_any_vlan(edev, false); | |
1991 | ||
1992 | return real_rc; | |
1993 | } | |
1994 | ||
1995 | static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid) | |
1996 | { | |
1997 | struct qede_dev *edev = netdev_priv(dev); | |
1998 | struct qede_vlan *vlan = NULL; | |
1999 | int rc; | |
2000 | ||
2001 | DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid); | |
2002 | ||
2003 | /* Find whether entry exists */ | |
2004 | list_for_each_entry(vlan, &edev->vlan_list, list) | |
2005 | if (vlan->vid == vid) | |
2006 | break; | |
2007 | ||
2008 | if (!vlan || (vlan->vid != vid)) { | |
2009 | DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN), | |
2010 | "Vlan isn't configured\n"); | |
2011 | return 0; | |
2012 | } | |
2013 | ||
2014 | if (edev->state != QEDE_STATE_OPEN) { | |
2015 | /* As interface is already down, we don't have a VPORT | |
2016 | * instance to remove vlan filter. So just update vlan list | |
2017 | */ | |
2018 | DP_VERBOSE(edev, NETIF_MSG_IFDOWN, | |
2019 | "Interface is down, removing VLAN from list only\n"); | |
2020 | qede_del_vlan_from_list(edev, vlan); | |
2021 | return 0; | |
2022 | } | |
2023 | ||
2024 | /* Remove vlan */ | |
2025 | rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid); | |
2026 | if (rc) { | |
2027 | DP_ERR(edev, "Failed to remove VLAN %d\n", vid); | |
2028 | return -EINVAL; | |
2029 | } | |
2030 | ||
2031 | qede_del_vlan_from_list(edev, vlan); | |
2032 | ||
2033 | /* We have removed a VLAN - try to see if we can | |
2034 | * configure non-configured VLAN from the list. | |
2035 | */ | |
2036 | rc = qede_configure_vlan_filters(edev); | |
2037 | ||
2038 | return rc; | |
2039 | } | |
2040 | ||
2041 | static void qede_vlan_mark_nonconfigured(struct qede_dev *edev) | |
2042 | { | |
2043 | struct qede_vlan *vlan = NULL; | |
2044 | ||
2045 | if (list_empty(&edev->vlan_list)) | |
2046 | return; | |
2047 | ||
2048 | list_for_each_entry(vlan, &edev->vlan_list, list) { | |
2049 | if (!vlan->configured) | |
2050 | continue; | |
2051 | ||
2052 | vlan->configured = false; | |
2053 | ||
2054 | /* vlan0 filter isn't consuming out of our quota */ | |
2055 | if (vlan->vid != 0) { | |
2056 | edev->non_configured_vlans++; | |
2057 | edev->configured_vlans--; | |
2058 | } | |
2059 | ||
2060 | DP_VERBOSE(edev, NETIF_MSG_IFDOWN, | |
2061 | "marked vlan %d as non-configured\n", | |
2062 | vlan->vid); | |
2063 | } | |
2064 | ||
2065 | edev->accept_any_vlan = false; | |
2066 | } | |
2067 | ||
b18e170c MC |
2068 | #ifdef CONFIG_QEDE_VXLAN |
2069 | static void qede_add_vxlan_port(struct net_device *dev, | |
2070 | sa_family_t sa_family, __be16 port) | |
2071 | { | |
2072 | struct qede_dev *edev = netdev_priv(dev); | |
2073 | u16 t_port = ntohs(port); | |
2074 | ||
2075 | if (edev->vxlan_dst_port) | |
2076 | return; | |
2077 | ||
2078 | edev->vxlan_dst_port = t_port; | |
2079 | ||
2080 | DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port); | |
2081 | ||
2082 | set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); | |
2083 | schedule_delayed_work(&edev->sp_task, 0); | |
2084 | } | |
2085 | ||
2086 | static void qede_del_vxlan_port(struct net_device *dev, | |
2087 | sa_family_t sa_family, __be16 port) | |
2088 | { | |
2089 | struct qede_dev *edev = netdev_priv(dev); | |
2090 | u16 t_port = ntohs(port); | |
2091 | ||
2092 | if (t_port != edev->vxlan_dst_port) | |
2093 | return; | |
2094 | ||
2095 | edev->vxlan_dst_port = 0; | |
2096 | ||
2097 | DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port); | |
2098 | ||
2099 | set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags); | |
2100 | schedule_delayed_work(&edev->sp_task, 0); | |
2101 | } | |
2102 | #endif | |
2103 | ||
9a109dd0 MC |
2104 | #ifdef CONFIG_QEDE_GENEVE |
2105 | static void qede_add_geneve_port(struct net_device *dev, | |
2106 | sa_family_t sa_family, __be16 port) | |
2107 | { | |
2108 | struct qede_dev *edev = netdev_priv(dev); | |
2109 | u16 t_port = ntohs(port); | |
2110 | ||
2111 | if (edev->geneve_dst_port) | |
2112 | return; | |
2113 | ||
2114 | edev->geneve_dst_port = t_port; | |
2115 | ||
2116 | DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port); | |
2117 | set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); | |
2118 | schedule_delayed_work(&edev->sp_task, 0); | |
2119 | } | |
2120 | ||
2121 | static void qede_del_geneve_port(struct net_device *dev, | |
2122 | sa_family_t sa_family, __be16 port) | |
2123 | { | |
2124 | struct qede_dev *edev = netdev_priv(dev); | |
2125 | u16 t_port = ntohs(port); | |
2126 | ||
2127 | if (t_port != edev->geneve_dst_port) | |
2128 | return; | |
2129 | ||
2130 | edev->geneve_dst_port = 0; | |
2131 | ||
2132 | DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port); | |
2133 | set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags); | |
2134 | schedule_delayed_work(&edev->sp_task, 0); | |
2135 | } | |
2136 | #endif | |
2137 | ||
2950219d YM |
2138 | static const struct net_device_ops qede_netdev_ops = { |
2139 | .ndo_open = qede_open, | |
2140 | .ndo_stop = qede_close, | |
2141 | .ndo_start_xmit = qede_start_xmit, | |
0d8e0aa0 SK |
2142 | .ndo_set_rx_mode = qede_set_rx_mode, |
2143 | .ndo_set_mac_address = qede_set_mac_addr, | |
2950219d | 2144 | .ndo_validate_addr = eth_validate_addr, |
133fac0e | 2145 | .ndo_change_mtu = qede_change_mtu, |
08feecd7 | 2146 | #ifdef CONFIG_QED_SRIOV |
eff16960 | 2147 | .ndo_set_vf_mac = qede_set_vf_mac, |
08feecd7 YM |
2148 | .ndo_set_vf_vlan = qede_set_vf_vlan, |
2149 | #endif | |
7c1bfcad SRK |
2150 | .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid, |
2151 | .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid, | |
133fac0e | 2152 | .ndo_get_stats64 = qede_get_stats64, |
733def6a YM |
2153 | #ifdef CONFIG_QED_SRIOV |
2154 | .ndo_set_vf_link_state = qede_set_vf_link_state, | |
6ddc7608 | 2155 | .ndo_set_vf_spoofchk = qede_set_vf_spoofchk, |
733def6a YM |
2156 | .ndo_set_vf_rate = qede_set_vf_rate, |
2157 | #endif | |
b18e170c MC |
2158 | #ifdef CONFIG_QEDE_VXLAN |
2159 | .ndo_add_vxlan_port = qede_add_vxlan_port, | |
2160 | .ndo_del_vxlan_port = qede_del_vxlan_port, | |
2161 | #endif | |
9a109dd0 MC |
2162 | #ifdef CONFIG_QEDE_GENEVE |
2163 | .ndo_add_geneve_port = qede_add_geneve_port, | |
2164 | .ndo_del_geneve_port = qede_del_geneve_port, | |
2165 | #endif | |
2950219d YM |
2166 | }; |
2167 | ||
e712d52b YM |
2168 | /* ------------------------------------------------------------------------- |
2169 | * START OF PROBE / REMOVE | |
2170 | * ------------------------------------------------------------------------- | |
2171 | */ | |
2172 | ||
2173 | static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev, | |
2174 | struct pci_dev *pdev, | |
2175 | struct qed_dev_eth_info *info, | |
2176 | u32 dp_module, | |
2177 | u8 dp_level) | |
2178 | { | |
2179 | struct net_device *ndev; | |
2180 | struct qede_dev *edev; | |
2181 | ||
2182 | ndev = alloc_etherdev_mqs(sizeof(*edev), | |
2183 | info->num_queues, | |
2184 | info->num_queues); | |
2185 | if (!ndev) { | |
2186 | pr_err("etherdev allocation failed\n"); | |
2187 | return NULL; | |
2188 | } | |
2189 | ||
2190 | edev = netdev_priv(ndev); | |
2191 | edev->ndev = ndev; | |
2192 | edev->cdev = cdev; | |
2193 | edev->pdev = pdev; | |
2194 | edev->dp_module = dp_module; | |
2195 | edev->dp_level = dp_level; | |
2196 | edev->ops = qed_ops; | |
2950219d YM |
2197 | edev->q_num_rx_buffers = NUM_RX_BDS_DEF; |
2198 | edev->q_num_tx_buffers = NUM_TX_BDS_DEF; | |
e712d52b | 2199 | |
e712d52b YM |
2200 | SET_NETDEV_DEV(ndev, &pdev->dev); |
2201 | ||
133fac0e | 2202 | memset(&edev->stats, 0, sizeof(edev->stats)); |
e712d52b YM |
2203 | memcpy(&edev->dev_info, info, sizeof(*info)); |
2204 | ||
2205 | edev->num_tc = edev->dev_info.num_tc; | |
2206 | ||
7c1bfcad SRK |
2207 | INIT_LIST_HEAD(&edev->vlan_list); |
2208 | ||
e712d52b YM |
2209 | return edev; |
2210 | } | |
2211 | ||
2212 | static void qede_init_ndev(struct qede_dev *edev) | |
2213 | { | |
2214 | struct net_device *ndev = edev->ndev; | |
2215 | struct pci_dev *pdev = edev->pdev; | |
2216 | u32 hw_features; | |
2217 | ||
2218 | pci_set_drvdata(pdev, ndev); | |
2219 | ||
2220 | ndev->mem_start = edev->dev_info.common.pci_mem_start; | |
2221 | ndev->base_addr = ndev->mem_start; | |
2222 | ndev->mem_end = edev->dev_info.common.pci_mem_end; | |
2223 | ndev->irq = edev->dev_info.common.pci_irq; | |
2224 | ||
2225 | ndev->watchdog_timeo = TX_TIMEOUT; | |
2226 | ||
2950219d YM |
2227 | ndev->netdev_ops = &qede_netdev_ops; |
2228 | ||
133fac0e SK |
2229 | qede_set_ethtool_ops(ndev); |
2230 | ||
e712d52b YM |
2231 | /* user-changeble features */ |
2232 | hw_features = NETIF_F_GRO | NETIF_F_SG | | |
2233 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | | |
2234 | NETIF_F_TSO | NETIF_F_TSO6; | |
2235 | ||
14db81de MC |
2236 | /* Encap features*/ |
2237 | hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL | | |
2238 | NETIF_F_TSO_ECN; | |
2239 | ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | | |
2240 | NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN | | |
2241 | NETIF_F_TSO6 | NETIF_F_GSO_GRE | | |
2242 | NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM; | |
2243 | ||
e712d52b YM |
2244 | ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | |
2245 | NETIF_F_HIGHDMA; | |
2246 | ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM | | |
2247 | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA | | |
7c1bfcad | 2248 | NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX; |
e712d52b YM |
2249 | |
2250 | ndev->hw_features = hw_features; | |
2251 | ||
2252 | /* Set network device HW mac */ | |
2253 | ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac); | |
2254 | } | |
2255 | ||
2256 | /* This function converts from 32b param to two params of level and module | |
2257 | * Input 32b decoding: | |
2258 | * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the | |
2259 | * 'happy' flow, e.g. memory allocation failed. | |
2260 | * b30 - enable all INFO prints. INFO prints are for major steps in the flow | |
2261 | * and provide important parameters. | |
2262 | * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that | |
2263 | * module. VERBOSE prints are for tracking the specific flow in low level. | |
2264 | * | |
2265 | * Notice that the level should be that of the lowest required logs. | |
2266 | */ | |
133fac0e | 2267 | void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level) |
e712d52b YM |
2268 | { |
2269 | *p_dp_level = QED_LEVEL_NOTICE; | |
2270 | *p_dp_module = 0; | |
2271 | ||
2272 | if (debug & QED_LOG_VERBOSE_MASK) { | |
2273 | *p_dp_level = QED_LEVEL_VERBOSE; | |
2274 | *p_dp_module = (debug & 0x3FFFFFFF); | |
2275 | } else if (debug & QED_LOG_INFO_MASK) { | |
2276 | *p_dp_level = QED_LEVEL_INFO; | |
2277 | } else if (debug & QED_LOG_NOTICE_MASK) { | |
2278 | *p_dp_level = QED_LEVEL_NOTICE; | |
2279 | } | |
2280 | } | |
2281 | ||
2950219d YM |
2282 | static void qede_free_fp_array(struct qede_dev *edev) |
2283 | { | |
2284 | if (edev->fp_array) { | |
2285 | struct qede_fastpath *fp; | |
2286 | int i; | |
2287 | ||
2288 | for_each_rss(i) { | |
2289 | fp = &edev->fp_array[i]; | |
2290 | ||
2291 | kfree(fp->sb_info); | |
2292 | kfree(fp->rxq); | |
2293 | kfree(fp->txqs); | |
2294 | } | |
2295 | kfree(edev->fp_array); | |
2296 | } | |
2297 | edev->num_rss = 0; | |
2298 | } | |
2299 | ||
2300 | static int qede_alloc_fp_array(struct qede_dev *edev) | |
2301 | { | |
2302 | struct qede_fastpath *fp; | |
2303 | int i; | |
2304 | ||
2305 | edev->fp_array = kcalloc(QEDE_RSS_CNT(edev), | |
2306 | sizeof(*edev->fp_array), GFP_KERNEL); | |
2307 | if (!edev->fp_array) { | |
2308 | DP_NOTICE(edev, "fp array allocation failed\n"); | |
2309 | goto err; | |
2310 | } | |
2311 | ||
2312 | for_each_rss(i) { | |
2313 | fp = &edev->fp_array[i]; | |
2314 | ||
2315 | fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL); | |
2316 | if (!fp->sb_info) { | |
2317 | DP_NOTICE(edev, "sb info struct allocation failed\n"); | |
2318 | goto err; | |
2319 | } | |
2320 | ||
2321 | fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL); | |
2322 | if (!fp->rxq) { | |
2323 | DP_NOTICE(edev, "RXQ struct allocation failed\n"); | |
2324 | goto err; | |
2325 | } | |
2326 | ||
2327 | fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL); | |
2328 | if (!fp->txqs) { | |
2329 | DP_NOTICE(edev, "TXQ array allocation failed\n"); | |
2330 | goto err; | |
2331 | } | |
2332 | } | |
2333 | ||
2334 | return 0; | |
2335 | err: | |
2336 | qede_free_fp_array(edev); | |
2337 | return -ENOMEM; | |
2338 | } | |
2339 | ||
0d8e0aa0 SK |
2340 | static void qede_sp_task(struct work_struct *work) |
2341 | { | |
2342 | struct qede_dev *edev = container_of(work, struct qede_dev, | |
2343 | sp_task.work); | |
b18e170c MC |
2344 | struct qed_dev *cdev = edev->cdev; |
2345 | ||
0d8e0aa0 SK |
2346 | mutex_lock(&edev->qede_lock); |
2347 | ||
2348 | if (edev->state == QEDE_STATE_OPEN) { | |
2349 | if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags)) | |
2350 | qede_config_rx_mode(edev->ndev); | |
2351 | } | |
2352 | ||
b18e170c MC |
2353 | if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) { |
2354 | struct qed_tunn_params tunn_params; | |
2355 | ||
2356 | memset(&tunn_params, 0, sizeof(tunn_params)); | |
2357 | tunn_params.update_vxlan_port = 1; | |
2358 | tunn_params.vxlan_port = edev->vxlan_dst_port; | |
2359 | qed_ops->tunn_config(cdev, &tunn_params); | |
2360 | } | |
2361 | ||
9a109dd0 MC |
2362 | if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) { |
2363 | struct qed_tunn_params tunn_params; | |
2364 | ||
2365 | memset(&tunn_params, 0, sizeof(tunn_params)); | |
2366 | tunn_params.update_geneve_port = 1; | |
2367 | tunn_params.geneve_port = edev->geneve_dst_port; | |
2368 | qed_ops->tunn_config(cdev, &tunn_params); | |
2369 | } | |
2370 | ||
0d8e0aa0 SK |
2371 | mutex_unlock(&edev->qede_lock); |
2372 | } | |
2373 | ||
e712d52b YM |
2374 | static void qede_update_pf_params(struct qed_dev *cdev) |
2375 | { | |
2376 | struct qed_pf_params pf_params; | |
2377 | ||
8e0ddc04 | 2378 | /* 64 rx + 64 tx */ |
e712d52b | 2379 | memset(&pf_params, 0, sizeof(struct qed_pf_params)); |
8e0ddc04 | 2380 | pf_params.eth_pf_params.num_cons = 128; |
e712d52b YM |
2381 | qed_ops->common->update_pf_params(cdev, &pf_params); |
2382 | } | |
2383 | ||
2384 | enum qede_probe_mode { | |
2385 | QEDE_PROBE_NORMAL, | |
2386 | }; | |
2387 | ||
2388 | static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level, | |
1408cc1f | 2389 | bool is_vf, enum qede_probe_mode mode) |
e712d52b | 2390 | { |
1408cc1f | 2391 | struct qed_probe_params probe_params; |
e712d52b YM |
2392 | struct qed_slowpath_params params; |
2393 | struct qed_dev_eth_info dev_info; | |
2394 | struct qede_dev *edev; | |
2395 | struct qed_dev *cdev; | |
2396 | int rc; | |
2397 | ||
2398 | if (unlikely(dp_level & QED_LEVEL_INFO)) | |
2399 | pr_notice("Starting qede probe\n"); | |
2400 | ||
1408cc1f YM |
2401 | memset(&probe_params, 0, sizeof(probe_params)); |
2402 | probe_params.protocol = QED_PROTOCOL_ETH; | |
2403 | probe_params.dp_module = dp_module; | |
2404 | probe_params.dp_level = dp_level; | |
2405 | probe_params.is_vf = is_vf; | |
2406 | cdev = qed_ops->common->probe(pdev, &probe_params); | |
e712d52b YM |
2407 | if (!cdev) { |
2408 | rc = -ENODEV; | |
2409 | goto err0; | |
2410 | } | |
2411 | ||
2412 | qede_update_pf_params(cdev); | |
2413 | ||
2414 | /* Start the Slowpath-process */ | |
2415 | memset(¶ms, 0, sizeof(struct qed_slowpath_params)); | |
2416 | params.int_mode = QED_INT_MODE_MSIX; | |
2417 | params.drv_major = QEDE_MAJOR_VERSION; | |
2418 | params.drv_minor = QEDE_MINOR_VERSION; | |
2419 | params.drv_rev = QEDE_REVISION_VERSION; | |
2420 | params.drv_eng = QEDE_ENGINEERING_VERSION; | |
2421 | strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE); | |
2422 | rc = qed_ops->common->slowpath_start(cdev, ¶ms); | |
2423 | if (rc) { | |
2424 | pr_notice("Cannot start slowpath\n"); | |
2425 | goto err1; | |
2426 | } | |
2427 | ||
2428 | /* Learn information crucial for qede to progress */ | |
2429 | rc = qed_ops->fill_dev_info(cdev, &dev_info); | |
2430 | if (rc) | |
2431 | goto err2; | |
2432 | ||
2433 | edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module, | |
2434 | dp_level); | |
2435 | if (!edev) { | |
2436 | rc = -ENOMEM; | |
2437 | goto err2; | |
2438 | } | |
2439 | ||
fefb0202 YM |
2440 | if (is_vf) |
2441 | edev->flags |= QEDE_FLAG_IS_VF; | |
2442 | ||
e712d52b YM |
2443 | qede_init_ndev(edev); |
2444 | ||
2950219d YM |
2445 | rc = register_netdev(edev->ndev); |
2446 | if (rc) { | |
2447 | DP_NOTICE(edev, "Cannot register net-device\n"); | |
2448 | goto err3; | |
2449 | } | |
2450 | ||
e712d52b YM |
2451 | edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION); |
2452 | ||
a2ec6172 SK |
2453 | edev->ops->register_ops(cdev, &qede_ll_ops, edev); |
2454 | ||
0d8e0aa0 SK |
2455 | INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task); |
2456 | mutex_init(&edev->qede_lock); | |
2457 | ||
e712d52b YM |
2458 | DP_INFO(edev, "Ending successfully qede probe\n"); |
2459 | ||
2460 | return 0; | |
2461 | ||
2950219d YM |
2462 | err3: |
2463 | free_netdev(edev->ndev); | |
e712d52b YM |
2464 | err2: |
2465 | qed_ops->common->slowpath_stop(cdev); | |
2466 | err1: | |
2467 | qed_ops->common->remove(cdev); | |
2468 | err0: | |
2469 | return rc; | |
2470 | } | |
2471 | ||
2472 | static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id) | |
2473 | { | |
fefb0202 | 2474 | bool is_vf = false; |
e712d52b YM |
2475 | u32 dp_module = 0; |
2476 | u8 dp_level = 0; | |
2477 | ||
fefb0202 YM |
2478 | switch ((enum qede_pci_private)id->driver_data) { |
2479 | case QEDE_PRIVATE_VF: | |
2480 | if (debug & QED_LOG_VERBOSE_MASK) | |
2481 | dev_err(&pdev->dev, "Probing a VF\n"); | |
2482 | is_vf = true; | |
2483 | break; | |
2484 | default: | |
2485 | if (debug & QED_LOG_VERBOSE_MASK) | |
2486 | dev_err(&pdev->dev, "Probing a PF\n"); | |
2487 | } | |
2488 | ||
e712d52b YM |
2489 | qede_config_debug(debug, &dp_module, &dp_level); |
2490 | ||
fefb0202 | 2491 | return __qede_probe(pdev, dp_module, dp_level, is_vf, |
e712d52b YM |
2492 | QEDE_PROBE_NORMAL); |
2493 | } | |
2494 | ||
2495 | enum qede_remove_mode { | |
2496 | QEDE_REMOVE_NORMAL, | |
2497 | }; | |
2498 | ||
2499 | static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode) | |
2500 | { | |
2501 | struct net_device *ndev = pci_get_drvdata(pdev); | |
2502 | struct qede_dev *edev = netdev_priv(ndev); | |
2503 | struct qed_dev *cdev = edev->cdev; | |
2504 | ||
2505 | DP_INFO(edev, "Starting qede_remove\n"); | |
2506 | ||
0d8e0aa0 | 2507 | cancel_delayed_work_sync(&edev->sp_task); |
2950219d YM |
2508 | unregister_netdev(ndev); |
2509 | ||
e712d52b YM |
2510 | edev->ops->common->set_power_state(cdev, PCI_D0); |
2511 | ||
2512 | pci_set_drvdata(pdev, NULL); | |
2513 | ||
2514 | free_netdev(ndev); | |
2515 | ||
2516 | /* Use global ops since we've freed edev */ | |
2517 | qed_ops->common->slowpath_stop(cdev); | |
2518 | qed_ops->common->remove(cdev); | |
2519 | ||
2520 | pr_notice("Ending successfully qede_remove\n"); | |
2521 | } | |
2522 | ||
2523 | static void qede_remove(struct pci_dev *pdev) | |
2524 | { | |
2525 | __qede_remove(pdev, QEDE_REMOVE_NORMAL); | |
2526 | } | |
2950219d YM |
2527 | |
2528 | /* ------------------------------------------------------------------------- | |
2529 | * START OF LOAD / UNLOAD | |
2530 | * ------------------------------------------------------------------------- | |
2531 | */ | |
2532 | ||
2533 | static int qede_set_num_queues(struct qede_dev *edev) | |
2534 | { | |
2535 | int rc; | |
2536 | u16 rss_num; | |
2537 | ||
2538 | /* Setup queues according to possible resources*/ | |
8edf049d SK |
2539 | if (edev->req_rss) |
2540 | rss_num = edev->req_rss; | |
2541 | else | |
2542 | rss_num = netif_get_num_default_rss_queues() * | |
2543 | edev->dev_info.common.num_hwfns; | |
2950219d YM |
2544 | |
2545 | rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num); | |
2546 | ||
2547 | rc = edev->ops->common->set_fp_int(edev->cdev, rss_num); | |
2548 | if (rc > 0) { | |
2549 | /* Managed to request interrupts for our queues */ | |
2550 | edev->num_rss = rc; | |
2551 | DP_INFO(edev, "Managed %d [of %d] RSS queues\n", | |
2552 | QEDE_RSS_CNT(edev), rss_num); | |
2553 | rc = 0; | |
2554 | } | |
2555 | return rc; | |
2556 | } | |
2557 | ||
2558 | static void qede_free_mem_sb(struct qede_dev *edev, | |
2559 | struct qed_sb_info *sb_info) | |
2560 | { | |
2561 | if (sb_info->sb_virt) | |
2562 | dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt), | |
2563 | (void *)sb_info->sb_virt, sb_info->sb_phys); | |
2564 | } | |
2565 | ||
2566 | /* This function allocates fast-path status block memory */ | |
2567 | static int qede_alloc_mem_sb(struct qede_dev *edev, | |
2568 | struct qed_sb_info *sb_info, | |
2569 | u16 sb_id) | |
2570 | { | |
2571 | struct status_block *sb_virt; | |
2572 | dma_addr_t sb_phys; | |
2573 | int rc; | |
2574 | ||
2575 | sb_virt = dma_alloc_coherent(&edev->pdev->dev, | |
2576 | sizeof(*sb_virt), | |
2577 | &sb_phys, GFP_KERNEL); | |
2578 | if (!sb_virt) { | |
2579 | DP_ERR(edev, "Status block allocation failed\n"); | |
2580 | return -ENOMEM; | |
2581 | } | |
2582 | ||
2583 | rc = edev->ops->common->sb_init(edev->cdev, sb_info, | |
2584 | sb_virt, sb_phys, sb_id, | |
2585 | QED_SB_TYPE_L2_QUEUE); | |
2586 | if (rc) { | |
2587 | DP_ERR(edev, "Status block initialization failed\n"); | |
2588 | dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt), | |
2589 | sb_virt, sb_phys); | |
2590 | return rc; | |
2591 | } | |
2592 | ||
2593 | return 0; | |
2594 | } | |
2595 | ||
2596 | static void qede_free_rx_buffers(struct qede_dev *edev, | |
2597 | struct qede_rx_queue *rxq) | |
2598 | { | |
2599 | u16 i; | |
2600 | ||
2601 | for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) { | |
2602 | struct sw_rx_data *rx_buf; | |
fc48b7a6 | 2603 | struct page *data; |
2950219d YM |
2604 | |
2605 | rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX]; | |
2606 | data = rx_buf->data; | |
2607 | ||
fc48b7a6 YM |
2608 | dma_unmap_page(&edev->pdev->dev, |
2609 | rx_buf->mapping, | |
2610 | PAGE_SIZE, DMA_FROM_DEVICE); | |
2950219d YM |
2611 | |
2612 | rx_buf->data = NULL; | |
fc48b7a6 | 2613 | __free_page(data); |
2950219d YM |
2614 | } |
2615 | } | |
2616 | ||
55482edc MC |
2617 | static void qede_free_sge_mem(struct qede_dev *edev, |
2618 | struct qede_rx_queue *rxq) { | |
2619 | int i; | |
2620 | ||
2621 | if (edev->gro_disable) | |
2622 | return; | |
2623 | ||
2624 | for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { | |
2625 | struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; | |
2626 | struct sw_rx_data *replace_buf = &tpa_info->replace_buf; | |
2627 | ||
f86af2df | 2628 | if (replace_buf->data) { |
55482edc MC |
2629 | dma_unmap_page(&edev->pdev->dev, |
2630 | dma_unmap_addr(replace_buf, mapping), | |
2631 | PAGE_SIZE, DMA_FROM_DEVICE); | |
2632 | __free_page(replace_buf->data); | |
2633 | } | |
2634 | } | |
2635 | } | |
2636 | ||
2950219d YM |
2637 | static void qede_free_mem_rxq(struct qede_dev *edev, |
2638 | struct qede_rx_queue *rxq) | |
2639 | { | |
55482edc MC |
2640 | qede_free_sge_mem(edev, rxq); |
2641 | ||
2950219d YM |
2642 | /* Free rx buffers */ |
2643 | qede_free_rx_buffers(edev, rxq); | |
2644 | ||
2645 | /* Free the parallel SW ring */ | |
2646 | kfree(rxq->sw_rx_ring); | |
2647 | ||
2648 | /* Free the real RQ ring used by FW */ | |
2649 | edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring); | |
2650 | edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring); | |
2651 | } | |
2652 | ||
2653 | static int qede_alloc_rx_buffer(struct qede_dev *edev, | |
2654 | struct qede_rx_queue *rxq) | |
2655 | { | |
2656 | struct sw_rx_data *sw_rx_data; | |
2657 | struct eth_rx_bd *rx_bd; | |
2658 | dma_addr_t mapping; | |
fc48b7a6 | 2659 | struct page *data; |
2950219d | 2660 | u16 rx_buf_size; |
2950219d YM |
2661 | |
2662 | rx_buf_size = rxq->rx_buf_size; | |
2663 | ||
fc48b7a6 | 2664 | data = alloc_pages(GFP_ATOMIC, 0); |
2950219d | 2665 | if (unlikely(!data)) { |
fc48b7a6 | 2666 | DP_NOTICE(edev, "Failed to allocate Rx data [page]\n"); |
2950219d YM |
2667 | return -ENOMEM; |
2668 | } | |
2669 | ||
fc48b7a6 YM |
2670 | /* Map the entire page as it would be used |
2671 | * for multiple RX buffer segment size mapping. | |
2672 | */ | |
2673 | mapping = dma_map_page(&edev->pdev->dev, data, 0, | |
2674 | PAGE_SIZE, DMA_FROM_DEVICE); | |
2950219d | 2675 | if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { |
fc48b7a6 | 2676 | __free_page(data); |
2950219d YM |
2677 | DP_NOTICE(edev, "Failed to map Rx buffer\n"); |
2678 | return -ENOMEM; | |
2679 | } | |
2680 | ||
2681 | sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX]; | |
fc48b7a6 | 2682 | sw_rx_data->page_offset = 0; |
2950219d | 2683 | sw_rx_data->data = data; |
fc48b7a6 | 2684 | sw_rx_data->mapping = mapping; |
2950219d YM |
2685 | |
2686 | /* Advance PROD and get BD pointer */ | |
2687 | rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring); | |
2688 | WARN_ON(!rx_bd); | |
2689 | rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping)); | |
2690 | rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping)); | |
2691 | ||
2692 | rxq->sw_rx_prod++; | |
2693 | ||
2694 | return 0; | |
2695 | } | |
2696 | ||
55482edc MC |
2697 | static int qede_alloc_sge_mem(struct qede_dev *edev, |
2698 | struct qede_rx_queue *rxq) | |
2699 | { | |
2700 | dma_addr_t mapping; | |
2701 | int i; | |
2702 | ||
2703 | if (edev->gro_disable) | |
2704 | return 0; | |
2705 | ||
2706 | if (edev->ndev->mtu > PAGE_SIZE) { | |
2707 | edev->gro_disable = 1; | |
2708 | return 0; | |
2709 | } | |
2710 | ||
2711 | for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) { | |
2712 | struct qede_agg_info *tpa_info = &rxq->tpa_info[i]; | |
2713 | struct sw_rx_data *replace_buf = &tpa_info->replace_buf; | |
2714 | ||
2715 | replace_buf->data = alloc_pages(GFP_ATOMIC, 0); | |
2716 | if (unlikely(!replace_buf->data)) { | |
2717 | DP_NOTICE(edev, | |
2718 | "Failed to allocate TPA skb pool [replacement buffer]\n"); | |
2719 | goto err; | |
2720 | } | |
2721 | ||
2722 | mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0, | |
2723 | rxq->rx_buf_size, DMA_FROM_DEVICE); | |
2724 | if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) { | |
2725 | DP_NOTICE(edev, | |
2726 | "Failed to map TPA replacement buffer\n"); | |
2727 | goto err; | |
2728 | } | |
2729 | ||
2730 | dma_unmap_addr_set(replace_buf, mapping, mapping); | |
2731 | tpa_info->replace_buf.page_offset = 0; | |
2732 | ||
2733 | tpa_info->replace_buf_mapping = mapping; | |
2734 | tpa_info->agg_state = QEDE_AGG_STATE_NONE; | |
2735 | } | |
2736 | ||
2737 | return 0; | |
2738 | err: | |
2739 | qede_free_sge_mem(edev, rxq); | |
2740 | edev->gro_disable = 1; | |
2741 | return -ENOMEM; | |
2742 | } | |
2743 | ||
2950219d YM |
2744 | /* This function allocates all memory needed per Rx queue */ |
2745 | static int qede_alloc_mem_rxq(struct qede_dev *edev, | |
2746 | struct qede_rx_queue *rxq) | |
2747 | { | |
f86af2df | 2748 | int i, rc, size; |
2950219d YM |
2749 | |
2750 | rxq->num_rx_buffers = edev->q_num_rx_buffers; | |
2751 | ||
fc48b7a6 YM |
2752 | rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + |
2753 | edev->ndev->mtu; | |
2754 | if (rxq->rx_buf_size > PAGE_SIZE) | |
2755 | rxq->rx_buf_size = PAGE_SIZE; | |
2756 | ||
2757 | /* Segment size to spilt a page in multiple equal parts */ | |
2758 | rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size); | |
2950219d YM |
2759 | |
2760 | /* Allocate the parallel driver ring for Rx buffers */ | |
fc48b7a6 | 2761 | size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE; |
2950219d YM |
2762 | rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL); |
2763 | if (!rxq->sw_rx_ring) { | |
2764 | DP_ERR(edev, "Rx buffers ring allocation failed\n"); | |
f86af2df | 2765 | rc = -ENOMEM; |
2950219d YM |
2766 | goto err; |
2767 | } | |
2768 | ||
2769 | /* Allocate FW Rx ring */ | |
2770 | rc = edev->ops->common->chain_alloc(edev->cdev, | |
2771 | QED_CHAIN_USE_TO_CONSUME_PRODUCE, | |
2772 | QED_CHAIN_MODE_NEXT_PTR, | |
fc48b7a6 | 2773 | RX_RING_SIZE, |
2950219d YM |
2774 | sizeof(struct eth_rx_bd), |
2775 | &rxq->rx_bd_ring); | |
2776 | ||
2777 | if (rc) | |
2778 | goto err; | |
2779 | ||
2780 | /* Allocate FW completion ring */ | |
2781 | rc = edev->ops->common->chain_alloc(edev->cdev, | |
2782 | QED_CHAIN_USE_TO_CONSUME, | |
2783 | QED_CHAIN_MODE_PBL, | |
fc48b7a6 | 2784 | RX_RING_SIZE, |
2950219d YM |
2785 | sizeof(union eth_rx_cqe), |
2786 | &rxq->rx_comp_ring); | |
2787 | if (rc) | |
2788 | goto err; | |
2789 | ||
2790 | /* Allocate buffers for the Rx ring */ | |
2791 | for (i = 0; i < rxq->num_rx_buffers; i++) { | |
2792 | rc = qede_alloc_rx_buffer(edev, rxq); | |
f86af2df MC |
2793 | if (rc) { |
2794 | DP_ERR(edev, | |
2795 | "Rx buffers allocation failed at index %d\n", i); | |
2796 | goto err; | |
2797 | } | |
2950219d YM |
2798 | } |
2799 | ||
f86af2df | 2800 | rc = qede_alloc_sge_mem(edev, rxq); |
2950219d | 2801 | err: |
f86af2df | 2802 | return rc; |
2950219d YM |
2803 | } |
2804 | ||
2805 | static void qede_free_mem_txq(struct qede_dev *edev, | |
2806 | struct qede_tx_queue *txq) | |
2807 | { | |
2808 | /* Free the parallel SW ring */ | |
2809 | kfree(txq->sw_tx_ring); | |
2810 | ||
2811 | /* Free the real RQ ring used by FW */ | |
2812 | edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl); | |
2813 | } | |
2814 | ||
2815 | /* This function allocates all memory needed per Tx queue */ | |
2816 | static int qede_alloc_mem_txq(struct qede_dev *edev, | |
2817 | struct qede_tx_queue *txq) | |
2818 | { | |
2819 | int size, rc; | |
2820 | union eth_tx_bd_types *p_virt; | |
2821 | ||
2822 | txq->num_tx_buffers = edev->q_num_tx_buffers; | |
2823 | ||
2824 | /* Allocate the parallel driver ring for Tx buffers */ | |
2825 | size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX; | |
2826 | txq->sw_tx_ring = kzalloc(size, GFP_KERNEL); | |
2827 | if (!txq->sw_tx_ring) { | |
2828 | DP_NOTICE(edev, "Tx buffers ring allocation failed\n"); | |
2829 | goto err; | |
2830 | } | |
2831 | ||
2832 | rc = edev->ops->common->chain_alloc(edev->cdev, | |
2833 | QED_CHAIN_USE_TO_CONSUME_PRODUCE, | |
2834 | QED_CHAIN_MODE_PBL, | |
2835 | NUM_TX_BDS_MAX, | |
2836 | sizeof(*p_virt), | |
2837 | &txq->tx_pbl); | |
2838 | if (rc) | |
2839 | goto err; | |
2840 | ||
2841 | return 0; | |
2842 | ||
2843 | err: | |
2844 | qede_free_mem_txq(edev, txq); | |
2845 | return -ENOMEM; | |
2846 | } | |
2847 | ||
2848 | /* This function frees all memory of a single fp */ | |
2849 | static void qede_free_mem_fp(struct qede_dev *edev, | |
2850 | struct qede_fastpath *fp) | |
2851 | { | |
2852 | int tc; | |
2853 | ||
2854 | qede_free_mem_sb(edev, fp->sb_info); | |
2855 | ||
2856 | qede_free_mem_rxq(edev, fp->rxq); | |
2857 | ||
2858 | for (tc = 0; tc < edev->num_tc; tc++) | |
2859 | qede_free_mem_txq(edev, &fp->txqs[tc]); | |
2860 | } | |
2861 | ||
2862 | /* This function allocates all memory needed for a single fp (i.e. an entity | |
2863 | * which contains status block, one rx queue and multiple per-TC tx queues. | |
2864 | */ | |
2865 | static int qede_alloc_mem_fp(struct qede_dev *edev, | |
2866 | struct qede_fastpath *fp) | |
2867 | { | |
2868 | int rc, tc; | |
2869 | ||
2870 | rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id); | |
2871 | if (rc) | |
2872 | goto err; | |
2873 | ||
2874 | rc = qede_alloc_mem_rxq(edev, fp->rxq); | |
2875 | if (rc) | |
2876 | goto err; | |
2877 | ||
2878 | for (tc = 0; tc < edev->num_tc; tc++) { | |
2879 | rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]); | |
2880 | if (rc) | |
2881 | goto err; | |
2882 | } | |
2883 | ||
2884 | return 0; | |
2950219d | 2885 | err: |
f86af2df | 2886 | return rc; |
2950219d YM |
2887 | } |
2888 | ||
2889 | static void qede_free_mem_load(struct qede_dev *edev) | |
2890 | { | |
2891 | int i; | |
2892 | ||
2893 | for_each_rss(i) { | |
2894 | struct qede_fastpath *fp = &edev->fp_array[i]; | |
2895 | ||
2896 | qede_free_mem_fp(edev, fp); | |
2897 | } | |
2898 | } | |
2899 | ||
2900 | /* This function allocates all qede memory at NIC load. */ | |
2901 | static int qede_alloc_mem_load(struct qede_dev *edev) | |
2902 | { | |
2903 | int rc = 0, rss_id; | |
2904 | ||
2905 | for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) { | |
2906 | struct qede_fastpath *fp = &edev->fp_array[rss_id]; | |
2907 | ||
2908 | rc = qede_alloc_mem_fp(edev, fp); | |
f86af2df | 2909 | if (rc) { |
2950219d | 2910 | DP_ERR(edev, |
f86af2df MC |
2911 | "Failed to allocate memory for fastpath - rss id = %d\n", |
2912 | rss_id); | |
2913 | qede_free_mem_load(edev); | |
2914 | return rc; | |
2950219d | 2915 | } |
2950219d YM |
2916 | } |
2917 | ||
2918 | return 0; | |
2919 | } | |
2920 | ||
2921 | /* This function inits fp content and resets the SB, RXQ and TXQ structures */ | |
2922 | static void qede_init_fp(struct qede_dev *edev) | |
2923 | { | |
2924 | int rss_id, txq_index, tc; | |
2925 | struct qede_fastpath *fp; | |
2926 | ||
2927 | for_each_rss(rss_id) { | |
2928 | fp = &edev->fp_array[rss_id]; | |
2929 | ||
2930 | fp->edev = edev; | |
2931 | fp->rss_id = rss_id; | |
2932 | ||
2933 | memset((void *)&fp->napi, 0, sizeof(fp->napi)); | |
2934 | ||
2935 | memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info)); | |
2936 | ||
2937 | memset((void *)fp->rxq, 0, sizeof(*fp->rxq)); | |
2938 | fp->rxq->rxq_id = rss_id; | |
2939 | ||
2940 | memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs))); | |
2941 | for (tc = 0; tc < edev->num_tc; tc++) { | |
2942 | txq_index = tc * QEDE_RSS_CNT(edev) + rss_id; | |
2943 | fp->txqs[tc].index = txq_index; | |
2944 | } | |
2945 | ||
2946 | snprintf(fp->name, sizeof(fp->name), "%s-fp-%d", | |
2947 | edev->ndev->name, rss_id); | |
2948 | } | |
55482edc MC |
2949 | |
2950 | edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO); | |
2950219d YM |
2951 | } |
2952 | ||
2953 | static int qede_set_real_num_queues(struct qede_dev *edev) | |
2954 | { | |
2955 | int rc = 0; | |
2956 | ||
2957 | rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev)); | |
2958 | if (rc) { | |
2959 | DP_NOTICE(edev, "Failed to set real number of Tx queues\n"); | |
2960 | return rc; | |
2961 | } | |
2962 | rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev)); | |
2963 | if (rc) { | |
2964 | DP_NOTICE(edev, "Failed to set real number of Rx queues\n"); | |
2965 | return rc; | |
2966 | } | |
2967 | ||
2968 | return 0; | |
2969 | } | |
2970 | ||
2971 | static void qede_napi_disable_remove(struct qede_dev *edev) | |
2972 | { | |
2973 | int i; | |
2974 | ||
2975 | for_each_rss(i) { | |
2976 | napi_disable(&edev->fp_array[i].napi); | |
2977 | ||
2978 | netif_napi_del(&edev->fp_array[i].napi); | |
2979 | } | |
2980 | } | |
2981 | ||
2982 | static void qede_napi_add_enable(struct qede_dev *edev) | |
2983 | { | |
2984 | int i; | |
2985 | ||
2986 | /* Add NAPI objects */ | |
2987 | for_each_rss(i) { | |
2988 | netif_napi_add(edev->ndev, &edev->fp_array[i].napi, | |
2989 | qede_poll, NAPI_POLL_WEIGHT); | |
2990 | napi_enable(&edev->fp_array[i].napi); | |
2991 | } | |
2992 | } | |
2993 | ||
2994 | static void qede_sync_free_irqs(struct qede_dev *edev) | |
2995 | { | |
2996 | int i; | |
2997 | ||
2998 | for (i = 0; i < edev->int_info.used_cnt; i++) { | |
2999 | if (edev->int_info.msix_cnt) { | |
3000 | synchronize_irq(edev->int_info.msix[i].vector); | |
3001 | free_irq(edev->int_info.msix[i].vector, | |
3002 | &edev->fp_array[i]); | |
3003 | } else { | |
3004 | edev->ops->common->simd_handler_clean(edev->cdev, i); | |
3005 | } | |
3006 | } | |
3007 | ||
3008 | edev->int_info.used_cnt = 0; | |
3009 | } | |
3010 | ||
3011 | static int qede_req_msix_irqs(struct qede_dev *edev) | |
3012 | { | |
3013 | int i, rc; | |
3014 | ||
3015 | /* Sanitize number of interrupts == number of prepared RSS queues */ | |
3016 | if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) { | |
3017 | DP_ERR(edev, | |
3018 | "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n", | |
3019 | QEDE_RSS_CNT(edev), edev->int_info.msix_cnt); | |
3020 | return -EINVAL; | |
3021 | } | |
3022 | ||
3023 | for (i = 0; i < QEDE_RSS_CNT(edev); i++) { | |
3024 | rc = request_irq(edev->int_info.msix[i].vector, | |
3025 | qede_msix_fp_int, 0, edev->fp_array[i].name, | |
3026 | &edev->fp_array[i]); | |
3027 | if (rc) { | |
3028 | DP_ERR(edev, "Request fp %d irq failed\n", i); | |
3029 | qede_sync_free_irqs(edev); | |
3030 | return rc; | |
3031 | } | |
3032 | DP_VERBOSE(edev, NETIF_MSG_INTR, | |
3033 | "Requested fp irq for %s [entry %d]. Cookie is at %p\n", | |
3034 | edev->fp_array[i].name, i, | |
3035 | &edev->fp_array[i]); | |
3036 | edev->int_info.used_cnt++; | |
3037 | } | |
3038 | ||
3039 | return 0; | |
3040 | } | |
3041 | ||
3042 | static void qede_simd_fp_handler(void *cookie) | |
3043 | { | |
3044 | struct qede_fastpath *fp = (struct qede_fastpath *)cookie; | |
3045 | ||
3046 | napi_schedule_irqoff(&fp->napi); | |
3047 | } | |
3048 | ||
3049 | static int qede_setup_irqs(struct qede_dev *edev) | |
3050 | { | |
3051 | int i, rc = 0; | |
3052 | ||
3053 | /* Learn Interrupt configuration */ | |
3054 | rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info); | |
3055 | if (rc) | |
3056 | return rc; | |
3057 | ||
3058 | if (edev->int_info.msix_cnt) { | |
3059 | rc = qede_req_msix_irqs(edev); | |
3060 | if (rc) | |
3061 | return rc; | |
3062 | edev->ndev->irq = edev->int_info.msix[0].vector; | |
3063 | } else { | |
3064 | const struct qed_common_ops *ops; | |
3065 | ||
3066 | /* qed should learn receive the RSS ids and callbacks */ | |
3067 | ops = edev->ops->common; | |
3068 | for (i = 0; i < QEDE_RSS_CNT(edev); i++) | |
3069 | ops->simd_handler_config(edev->cdev, | |
3070 | &edev->fp_array[i], i, | |
3071 | qede_simd_fp_handler); | |
3072 | edev->int_info.used_cnt = QEDE_RSS_CNT(edev); | |
3073 | } | |
3074 | return 0; | |
3075 | } | |
3076 | ||
3077 | static int qede_drain_txq(struct qede_dev *edev, | |
3078 | struct qede_tx_queue *txq, | |
3079 | bool allow_drain) | |
3080 | { | |
3081 | int rc, cnt = 1000; | |
3082 | ||
3083 | while (txq->sw_tx_cons != txq->sw_tx_prod) { | |
3084 | if (!cnt) { | |
3085 | if (allow_drain) { | |
3086 | DP_NOTICE(edev, | |
3087 | "Tx queue[%d] is stuck, requesting MCP to drain\n", | |
3088 | txq->index); | |
3089 | rc = edev->ops->common->drain(edev->cdev); | |
3090 | if (rc) | |
3091 | return rc; | |
3092 | return qede_drain_txq(edev, txq, false); | |
3093 | } | |
3094 | DP_NOTICE(edev, | |
3095 | "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n", | |
3096 | txq->index, txq->sw_tx_prod, | |
3097 | txq->sw_tx_cons); | |
3098 | return -ENODEV; | |
3099 | } | |
3100 | cnt--; | |
3101 | usleep_range(1000, 2000); | |
3102 | barrier(); | |
3103 | } | |
3104 | ||
3105 | /* FW finished processing, wait for HW to transmit all tx packets */ | |
3106 | usleep_range(1000, 2000); | |
3107 | ||
3108 | return 0; | |
3109 | } | |
3110 | ||
3111 | static int qede_stop_queues(struct qede_dev *edev) | |
3112 | { | |
3113 | struct qed_update_vport_params vport_update_params; | |
3114 | struct qed_dev *cdev = edev->cdev; | |
3115 | int rc, tc, i; | |
3116 | ||
3117 | /* Disable the vport */ | |
3118 | memset(&vport_update_params, 0, sizeof(vport_update_params)); | |
3119 | vport_update_params.vport_id = 0; | |
3120 | vport_update_params.update_vport_active_flg = 1; | |
3121 | vport_update_params.vport_active_flg = 0; | |
3122 | vport_update_params.update_rss_flg = 0; | |
3123 | ||
3124 | rc = edev->ops->vport_update(cdev, &vport_update_params); | |
3125 | if (rc) { | |
3126 | DP_ERR(edev, "Failed to update vport\n"); | |
3127 | return rc; | |
3128 | } | |
3129 | ||
3130 | /* Flush Tx queues. If needed, request drain from MCP */ | |
3131 | for_each_rss(i) { | |
3132 | struct qede_fastpath *fp = &edev->fp_array[i]; | |
3133 | ||
3134 | for (tc = 0; tc < edev->num_tc; tc++) { | |
3135 | struct qede_tx_queue *txq = &fp->txqs[tc]; | |
3136 | ||
3137 | rc = qede_drain_txq(edev, txq, true); | |
3138 | if (rc) | |
3139 | return rc; | |
3140 | } | |
3141 | } | |
3142 | ||
3143 | /* Stop all Queues in reverse order*/ | |
3144 | for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) { | |
3145 | struct qed_stop_rxq_params rx_params; | |
3146 | ||
3147 | /* Stop the Tx Queue(s)*/ | |
3148 | for (tc = 0; tc < edev->num_tc; tc++) { | |
3149 | struct qed_stop_txq_params tx_params; | |
3150 | ||
3151 | tx_params.rss_id = i; | |
3152 | tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i; | |
3153 | rc = edev->ops->q_tx_stop(cdev, &tx_params); | |
3154 | if (rc) { | |
3155 | DP_ERR(edev, "Failed to stop TXQ #%d\n", | |
3156 | tx_params.tx_queue_id); | |
3157 | return rc; | |
3158 | } | |
3159 | } | |
3160 | ||
3161 | /* Stop the Rx Queue*/ | |
3162 | memset(&rx_params, 0, sizeof(rx_params)); | |
3163 | rx_params.rss_id = i; | |
3164 | rx_params.rx_queue_id = i; | |
3165 | ||
3166 | rc = edev->ops->q_rx_stop(cdev, &rx_params); | |
3167 | if (rc) { | |
3168 | DP_ERR(edev, "Failed to stop RXQ #%d\n", i); | |
3169 | return rc; | |
3170 | } | |
3171 | } | |
3172 | ||
3173 | /* Stop the vport */ | |
3174 | rc = edev->ops->vport_stop(cdev, 0); | |
3175 | if (rc) | |
3176 | DP_ERR(edev, "Failed to stop VPORT\n"); | |
3177 | ||
3178 | return rc; | |
3179 | } | |
3180 | ||
3181 | static int qede_start_queues(struct qede_dev *edev) | |
3182 | { | |
3183 | int rc, tc, i; | |
088c8618 | 3184 | int vlan_removal_en = 1; |
2950219d | 3185 | struct qed_dev *cdev = edev->cdev; |
2950219d YM |
3186 | struct qed_update_vport_params vport_update_params; |
3187 | struct qed_queue_start_common_params q_params; | |
fefb0202 | 3188 | struct qed_dev_info *qed_info = &edev->dev_info.common; |
088c8618 | 3189 | struct qed_start_vport_params start = {0}; |
961acdea | 3190 | bool reset_rss_indir = false; |
2950219d YM |
3191 | |
3192 | if (!edev->num_rss) { | |
3193 | DP_ERR(edev, | |
3194 | "Cannot update V-VPORT as active as there are no Rx queues\n"); | |
3195 | return -EINVAL; | |
3196 | } | |
3197 | ||
55482edc | 3198 | start.gro_enable = !edev->gro_disable; |
088c8618 MC |
3199 | start.mtu = edev->ndev->mtu; |
3200 | start.vport_id = 0; | |
3201 | start.drop_ttl0 = true; | |
3202 | start.remove_inner_vlan = vlan_removal_en; | |
3203 | ||
3204 | rc = edev->ops->vport_start(cdev, &start); | |
2950219d YM |
3205 | |
3206 | if (rc) { | |
3207 | DP_ERR(edev, "Start V-PORT failed %d\n", rc); | |
3208 | return rc; | |
3209 | } | |
3210 | ||
3211 | DP_VERBOSE(edev, NETIF_MSG_IFUP, | |
3212 | "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n", | |
088c8618 | 3213 | start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en); |
2950219d YM |
3214 | |
3215 | for_each_rss(i) { | |
3216 | struct qede_fastpath *fp = &edev->fp_array[i]; | |
3217 | dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table; | |
3218 | ||
3219 | memset(&q_params, 0, sizeof(q_params)); | |
3220 | q_params.rss_id = i; | |
3221 | q_params.queue_id = i; | |
3222 | q_params.vport_id = 0; | |
3223 | q_params.sb = fp->sb_info->igu_sb_id; | |
3224 | q_params.sb_idx = RX_PI; | |
3225 | ||
3226 | rc = edev->ops->q_rx_start(cdev, &q_params, | |
3227 | fp->rxq->rx_buf_size, | |
3228 | fp->rxq->rx_bd_ring.p_phys_addr, | |
3229 | phys_table, | |
3230 | fp->rxq->rx_comp_ring.page_cnt, | |
3231 | &fp->rxq->hw_rxq_prod_addr); | |
3232 | if (rc) { | |
3233 | DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc); | |
3234 | return rc; | |
3235 | } | |
3236 | ||
3237 | fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI]; | |
3238 | ||
3239 | qede_update_rx_prod(edev, fp->rxq); | |
3240 | ||
3241 | for (tc = 0; tc < edev->num_tc; tc++) { | |
3242 | struct qede_tx_queue *txq = &fp->txqs[tc]; | |
3243 | int txq_index = tc * QEDE_RSS_CNT(edev) + i; | |
3244 | ||
3245 | memset(&q_params, 0, sizeof(q_params)); | |
3246 | q_params.rss_id = i; | |
3247 | q_params.queue_id = txq_index; | |
3248 | q_params.vport_id = 0; | |
3249 | q_params.sb = fp->sb_info->igu_sb_id; | |
3250 | q_params.sb_idx = TX_PI(tc); | |
3251 | ||
3252 | rc = edev->ops->q_tx_start(cdev, &q_params, | |
3253 | txq->tx_pbl.pbl.p_phys_table, | |
3254 | txq->tx_pbl.page_cnt, | |
3255 | &txq->doorbell_addr); | |
3256 | if (rc) { | |
3257 | DP_ERR(edev, "Start TXQ #%d failed %d\n", | |
3258 | txq_index, rc); | |
3259 | return rc; | |
3260 | } | |
3261 | ||
3262 | txq->hw_cons_ptr = | |
3263 | &fp->sb_info->sb_virt->pi_array[TX_PI(tc)]; | |
3264 | SET_FIELD(txq->tx_db.data.params, | |
3265 | ETH_DB_DATA_DEST, DB_DEST_XCM); | |
3266 | SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, | |
3267 | DB_AGG_CMD_SET); | |
3268 | SET_FIELD(txq->tx_db.data.params, | |
3269 | ETH_DB_DATA_AGG_VAL_SEL, | |
3270 | DQ_XCM_ETH_TX_BD_PROD_CMD); | |
3271 | ||
3272 | txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD; | |
3273 | } | |
3274 | } | |
3275 | ||
3276 | /* Prepare and send the vport enable */ | |
3277 | memset(&vport_update_params, 0, sizeof(vport_update_params)); | |
088c8618 | 3278 | vport_update_params.vport_id = start.vport_id; |
2950219d YM |
3279 | vport_update_params.update_vport_active_flg = 1; |
3280 | vport_update_params.vport_active_flg = 1; | |
3281 | ||
3282 | /* Fill struct with RSS params */ | |
3283 | if (QEDE_RSS_CNT(edev) > 1) { | |
3284 | vport_update_params.update_rss_flg = 1; | |
961acdea SRK |
3285 | |
3286 | /* Need to validate current RSS config uses valid entries */ | |
3287 | for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { | |
3288 | if (edev->rss_params.rss_ind_table[i] >= | |
3289 | edev->num_rss) { | |
3290 | reset_rss_indir = true; | |
3291 | break; | |
3292 | } | |
3293 | } | |
3294 | ||
3295 | if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) || | |
3296 | reset_rss_indir) { | |
3297 | u16 val; | |
3298 | ||
3299 | for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) { | |
3300 | u16 indir_val; | |
3301 | ||
3302 | val = QEDE_RSS_CNT(edev); | |
3303 | indir_val = ethtool_rxfh_indir_default(i, val); | |
3304 | edev->rss_params.rss_ind_table[i] = indir_val; | |
3305 | } | |
3306 | edev->rss_params_inited |= QEDE_RSS_INDIR_INITED; | |
3307 | } | |
3308 | ||
3309 | if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) { | |
3310 | netdev_rss_key_fill(edev->rss_params.rss_key, | |
3311 | sizeof(edev->rss_params.rss_key)); | |
3312 | edev->rss_params_inited |= QEDE_RSS_KEY_INITED; | |
3313 | } | |
3314 | ||
3315 | if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) { | |
3316 | edev->rss_params.rss_caps = QED_RSS_IPV4 | | |
3317 | QED_RSS_IPV6 | | |
3318 | QED_RSS_IPV4_TCP | | |
3319 | QED_RSS_IPV6_TCP; | |
3320 | edev->rss_params_inited |= QEDE_RSS_CAPS_INITED; | |
3321 | } | |
3322 | ||
3323 | memcpy(&vport_update_params.rss_params, &edev->rss_params, | |
3324 | sizeof(vport_update_params.rss_params)); | |
2950219d | 3325 | } else { |
961acdea SRK |
3326 | memset(&vport_update_params.rss_params, 0, |
3327 | sizeof(vport_update_params.rss_params)); | |
2950219d | 3328 | } |
2950219d YM |
3329 | |
3330 | rc = edev->ops->vport_update(cdev, &vport_update_params); | |
3331 | if (rc) { | |
3332 | DP_ERR(edev, "Update V-PORT failed %d\n", rc); | |
3333 | return rc; | |
3334 | } | |
3335 | ||
3336 | return 0; | |
3337 | } | |
3338 | ||
0d8e0aa0 SK |
3339 | static int qede_set_mcast_rx_mac(struct qede_dev *edev, |
3340 | enum qed_filter_xcast_params_type opcode, | |
3341 | unsigned char *mac, int num_macs) | |
3342 | { | |
3343 | struct qed_filter_params filter_cmd; | |
3344 | int i; | |
3345 | ||
3346 | memset(&filter_cmd, 0, sizeof(filter_cmd)); | |
3347 | filter_cmd.type = QED_FILTER_TYPE_MCAST; | |
3348 | filter_cmd.filter.mcast.type = opcode; | |
3349 | filter_cmd.filter.mcast.num = num_macs; | |
3350 | ||
3351 | for (i = 0; i < num_macs; i++, mac += ETH_ALEN) | |
3352 | ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac); | |
3353 | ||
3354 | return edev->ops->filter_config(edev->cdev, &filter_cmd); | |
3355 | } | |
3356 | ||
2950219d YM |
3357 | enum qede_unload_mode { |
3358 | QEDE_UNLOAD_NORMAL, | |
3359 | }; | |
3360 | ||
3361 | static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode) | |
3362 | { | |
a2ec6172 | 3363 | struct qed_link_params link_params; |
2950219d YM |
3364 | int rc; |
3365 | ||
3366 | DP_INFO(edev, "Starting qede unload\n"); | |
3367 | ||
0d8e0aa0 SK |
3368 | mutex_lock(&edev->qede_lock); |
3369 | edev->state = QEDE_STATE_CLOSED; | |
3370 | ||
2950219d YM |
3371 | /* Close OS Tx */ |
3372 | netif_tx_disable(edev->ndev); | |
3373 | netif_carrier_off(edev->ndev); | |
3374 | ||
a2ec6172 SK |
3375 | /* Reset the link */ |
3376 | memset(&link_params, 0, sizeof(link_params)); | |
3377 | link_params.link_up = false; | |
3378 | edev->ops->common->set_link(edev->cdev, &link_params); | |
2950219d YM |
3379 | rc = qede_stop_queues(edev); |
3380 | if (rc) { | |
3381 | qede_sync_free_irqs(edev); | |
3382 | goto out; | |
3383 | } | |
3384 | ||
3385 | DP_INFO(edev, "Stopped Queues\n"); | |
3386 | ||
7c1bfcad | 3387 | qede_vlan_mark_nonconfigured(edev); |
2950219d YM |
3388 | edev->ops->fastpath_stop(edev->cdev); |
3389 | ||
3390 | /* Release the interrupts */ | |
3391 | qede_sync_free_irqs(edev); | |
3392 | edev->ops->common->set_fp_int(edev->cdev, 0); | |
3393 | ||
3394 | qede_napi_disable_remove(edev); | |
3395 | ||
3396 | qede_free_mem_load(edev); | |
3397 | qede_free_fp_array(edev); | |
3398 | ||
3399 | out: | |
3400 | mutex_unlock(&edev->qede_lock); | |
3401 | DP_INFO(edev, "Ending qede unload\n"); | |
3402 | } | |
3403 | ||
3404 | enum qede_load_mode { | |
3405 | QEDE_LOAD_NORMAL, | |
3406 | }; | |
3407 | ||
3408 | static int qede_load(struct qede_dev *edev, enum qede_load_mode mode) | |
3409 | { | |
a2ec6172 SK |
3410 | struct qed_link_params link_params; |
3411 | struct qed_link_output link_output; | |
2950219d YM |
3412 | int rc; |
3413 | ||
3414 | DP_INFO(edev, "Starting qede load\n"); | |
3415 | ||
3416 | rc = qede_set_num_queues(edev); | |
3417 | if (rc) | |
3418 | goto err0; | |
3419 | ||
3420 | rc = qede_alloc_fp_array(edev); | |
3421 | if (rc) | |
3422 | goto err0; | |
3423 | ||
3424 | qede_init_fp(edev); | |
3425 | ||
3426 | rc = qede_alloc_mem_load(edev); | |
3427 | if (rc) | |
3428 | goto err1; | |
3429 | DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n", | |
3430 | QEDE_RSS_CNT(edev), edev->num_tc); | |
3431 | ||
3432 | rc = qede_set_real_num_queues(edev); | |
3433 | if (rc) | |
3434 | goto err2; | |
3435 | ||
3436 | qede_napi_add_enable(edev); | |
3437 | DP_INFO(edev, "Napi added and enabled\n"); | |
3438 | ||
3439 | rc = qede_setup_irqs(edev); | |
3440 | if (rc) | |
3441 | goto err3; | |
3442 | DP_INFO(edev, "Setup IRQs succeeded\n"); | |
3443 | ||
3444 | rc = qede_start_queues(edev); | |
3445 | if (rc) | |
3446 | goto err4; | |
3447 | DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n"); | |
3448 | ||
3449 | /* Add primary mac and set Rx filters */ | |
3450 | ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr); | |
3451 | ||
0d8e0aa0 SK |
3452 | mutex_lock(&edev->qede_lock); |
3453 | edev->state = QEDE_STATE_OPEN; | |
3454 | mutex_unlock(&edev->qede_lock); | |
a2ec6172 | 3455 | |
7c1bfcad SRK |
3456 | /* Program un-configured VLANs */ |
3457 | qede_configure_vlan_filters(edev); | |
3458 | ||
a2ec6172 SK |
3459 | /* Ask for link-up using current configuration */ |
3460 | memset(&link_params, 0, sizeof(link_params)); | |
3461 | link_params.link_up = true; | |
3462 | edev->ops->common->set_link(edev->cdev, &link_params); | |
3463 | ||
3464 | /* Query whether link is already-up */ | |
3465 | memset(&link_output, 0, sizeof(link_output)); | |
3466 | edev->ops->common->get_link(edev->cdev, &link_output); | |
3467 | qede_link_update(edev, &link_output); | |
3468 | ||
2950219d YM |
3469 | DP_INFO(edev, "Ending successfully qede load\n"); |
3470 | ||
3471 | return 0; | |
3472 | ||
3473 | err4: | |
3474 | qede_sync_free_irqs(edev); | |
3475 | memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info)); | |
3476 | err3: | |
3477 | qede_napi_disable_remove(edev); | |
3478 | err2: | |
3479 | qede_free_mem_load(edev); | |
3480 | err1: | |
3481 | edev->ops->common->set_fp_int(edev->cdev, 0); | |
3482 | qede_free_fp_array(edev); | |
3483 | edev->num_rss = 0; | |
3484 | err0: | |
3485 | return rc; | |
3486 | } | |
3487 | ||
133fac0e SK |
3488 | void qede_reload(struct qede_dev *edev, |
3489 | void (*func)(struct qede_dev *, union qede_reload_args *), | |
3490 | union qede_reload_args *args) | |
3491 | { | |
3492 | qede_unload(edev, QEDE_UNLOAD_NORMAL); | |
3493 | /* Call function handler to update parameters | |
3494 | * needed for function load. | |
3495 | */ | |
3496 | if (func) | |
3497 | func(edev, args); | |
3498 | ||
3499 | qede_load(edev, QEDE_LOAD_NORMAL); | |
3500 | ||
3501 | mutex_lock(&edev->qede_lock); | |
3502 | qede_config_rx_mode(edev->ndev); | |
3503 | mutex_unlock(&edev->qede_lock); | |
3504 | } | |
3505 | ||
2950219d YM |
3506 | /* called with rtnl_lock */ |
3507 | static int qede_open(struct net_device *ndev) | |
3508 | { | |
3509 | struct qede_dev *edev = netdev_priv(ndev); | |
b18e170c | 3510 | int rc; |
2950219d YM |
3511 | |
3512 | netif_carrier_off(ndev); | |
3513 | ||
3514 | edev->ops->common->set_power_state(edev->cdev, PCI_D0); | |
3515 | ||
b18e170c MC |
3516 | rc = qede_load(edev, QEDE_LOAD_NORMAL); |
3517 | ||
3518 | if (rc) | |
3519 | return rc; | |
3520 | ||
3521 | #ifdef CONFIG_QEDE_VXLAN | |
3522 | vxlan_get_rx_port(ndev); | |
9a109dd0 MC |
3523 | #endif |
3524 | #ifdef CONFIG_QEDE_GENEVE | |
3525 | geneve_get_rx_port(ndev); | |
b18e170c MC |
3526 | #endif |
3527 | return 0; | |
2950219d YM |
3528 | } |
3529 | ||
3530 | static int qede_close(struct net_device *ndev) | |
3531 | { | |
3532 | struct qede_dev *edev = netdev_priv(ndev); | |
3533 | ||
3534 | qede_unload(edev, QEDE_UNLOAD_NORMAL); | |
3535 | ||
3536 | return 0; | |
3537 | } | |
0d8e0aa0 | 3538 | |
a2ec6172 SK |
3539 | static void qede_link_update(void *dev, struct qed_link_output *link) |
3540 | { | |
3541 | struct qede_dev *edev = dev; | |
3542 | ||
3543 | if (!netif_running(edev->ndev)) { | |
3544 | DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n"); | |
3545 | return; | |
3546 | } | |
3547 | ||
3548 | if (link->link_up) { | |
8e025ae2 YM |
3549 | if (!netif_carrier_ok(edev->ndev)) { |
3550 | DP_NOTICE(edev, "Link is up\n"); | |
3551 | netif_tx_start_all_queues(edev->ndev); | |
3552 | netif_carrier_on(edev->ndev); | |
3553 | } | |
a2ec6172 | 3554 | } else { |
8e025ae2 YM |
3555 | if (netif_carrier_ok(edev->ndev)) { |
3556 | DP_NOTICE(edev, "Link is down\n"); | |
3557 | netif_tx_disable(edev->ndev); | |
3558 | netif_carrier_off(edev->ndev); | |
3559 | } | |
a2ec6172 SK |
3560 | } |
3561 | } | |
3562 | ||
0d8e0aa0 SK |
3563 | static int qede_set_mac_addr(struct net_device *ndev, void *p) |
3564 | { | |
3565 | struct qede_dev *edev = netdev_priv(ndev); | |
3566 | struct sockaddr *addr = p; | |
3567 | int rc; | |
3568 | ||
3569 | ASSERT_RTNL(); /* @@@TBD To be removed */ | |
3570 | ||
3571 | DP_INFO(edev, "Set_mac_addr called\n"); | |
3572 | ||
3573 | if (!is_valid_ether_addr(addr->sa_data)) { | |
3574 | DP_NOTICE(edev, "The MAC address is not valid\n"); | |
3575 | return -EFAULT; | |
3576 | } | |
3577 | ||
eff16960 YM |
3578 | if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) { |
3579 | DP_NOTICE(edev, "qed prevents setting MAC\n"); | |
3580 | return -EINVAL; | |
3581 | } | |
3582 | ||
0d8e0aa0 SK |
3583 | ether_addr_copy(ndev->dev_addr, addr->sa_data); |
3584 | ||
3585 | if (!netif_running(ndev)) { | |
3586 | DP_NOTICE(edev, "The device is currently down\n"); | |
3587 | return 0; | |
3588 | } | |
3589 | ||
3590 | /* Remove the previous primary mac */ | |
3591 | rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, | |
3592 | edev->primary_mac); | |
3593 | if (rc) | |
3594 | return rc; | |
3595 | ||
3596 | /* Add MAC filter according to the new unicast HW MAC address */ | |
3597 | ether_addr_copy(edev->primary_mac, ndev->dev_addr); | |
3598 | return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, | |
3599 | edev->primary_mac); | |
3600 | } | |
3601 | ||
3602 | static int | |
3603 | qede_configure_mcast_filtering(struct net_device *ndev, | |
3604 | enum qed_filter_rx_mode_type *accept_flags) | |
3605 | { | |
3606 | struct qede_dev *edev = netdev_priv(ndev); | |
3607 | unsigned char *mc_macs, *temp; | |
3608 | struct netdev_hw_addr *ha; | |
3609 | int rc = 0, mc_count; | |
3610 | size_t size; | |
3611 | ||
3612 | size = 64 * ETH_ALEN; | |
3613 | ||
3614 | mc_macs = kzalloc(size, GFP_KERNEL); | |
3615 | if (!mc_macs) { | |
3616 | DP_NOTICE(edev, | |
3617 | "Failed to allocate memory for multicast MACs\n"); | |
3618 | rc = -ENOMEM; | |
3619 | goto exit; | |
3620 | } | |
3621 | ||
3622 | temp = mc_macs; | |
3623 | ||
3624 | /* Remove all previously configured MAC filters */ | |
3625 | rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL, | |
3626 | mc_macs, 1); | |
3627 | if (rc) | |
3628 | goto exit; | |
3629 | ||
3630 | netif_addr_lock_bh(ndev); | |
3631 | ||
3632 | mc_count = netdev_mc_count(ndev); | |
3633 | if (mc_count < 64) { | |
3634 | netdev_for_each_mc_addr(ha, ndev) { | |
3635 | ether_addr_copy(temp, ha->addr); | |
3636 | temp += ETH_ALEN; | |
3637 | } | |
3638 | } | |
3639 | ||
3640 | netif_addr_unlock_bh(ndev); | |
3641 | ||
3642 | /* Check for all multicast @@@TBD resource allocation */ | |
3643 | if ((ndev->flags & IFF_ALLMULTI) || | |
3644 | (mc_count > 64)) { | |
3645 | if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR) | |
3646 | *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC; | |
3647 | } else { | |
3648 | /* Add all multicast MAC filters */ | |
3649 | rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD, | |
3650 | mc_macs, mc_count); | |
3651 | } | |
3652 | ||
3653 | exit: | |
3654 | kfree(mc_macs); | |
3655 | return rc; | |
3656 | } | |
3657 | ||
3658 | static void qede_set_rx_mode(struct net_device *ndev) | |
3659 | { | |
3660 | struct qede_dev *edev = netdev_priv(ndev); | |
3661 | ||
3662 | DP_INFO(edev, "qede_set_rx_mode called\n"); | |
3663 | ||
3664 | if (edev->state != QEDE_STATE_OPEN) { | |
3665 | DP_INFO(edev, | |
3666 | "qede_set_rx_mode called while interface is down\n"); | |
3667 | } else { | |
3668 | set_bit(QEDE_SP_RX_MODE, &edev->sp_flags); | |
3669 | schedule_delayed_work(&edev->sp_task, 0); | |
3670 | } | |
3671 | } | |
3672 | ||
3673 | /* Must be called with qede_lock held */ | |
3674 | static void qede_config_rx_mode(struct net_device *ndev) | |
3675 | { | |
3676 | enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST; | |
3677 | struct qede_dev *edev = netdev_priv(ndev); | |
3678 | struct qed_filter_params rx_mode; | |
3679 | unsigned char *uc_macs, *temp; | |
3680 | struct netdev_hw_addr *ha; | |
3681 | int rc, uc_count; | |
3682 | size_t size; | |
3683 | ||
3684 | netif_addr_lock_bh(ndev); | |
3685 | ||
3686 | uc_count = netdev_uc_count(ndev); | |
3687 | size = uc_count * ETH_ALEN; | |
3688 | ||
3689 | uc_macs = kzalloc(size, GFP_ATOMIC); | |
3690 | if (!uc_macs) { | |
3691 | DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n"); | |
3692 | netif_addr_unlock_bh(ndev); | |
3693 | return; | |
3694 | } | |
3695 | ||
3696 | temp = uc_macs; | |
3697 | netdev_for_each_uc_addr(ha, ndev) { | |
3698 | ether_addr_copy(temp, ha->addr); | |
3699 | temp += ETH_ALEN; | |
3700 | } | |
3701 | ||
3702 | netif_addr_unlock_bh(ndev); | |
3703 | ||
3704 | /* Configure the struct for the Rx mode */ | |
3705 | memset(&rx_mode, 0, sizeof(struct qed_filter_params)); | |
3706 | rx_mode.type = QED_FILTER_TYPE_RX_MODE; | |
3707 | ||
3708 | /* Remove all previous unicast secondary macs and multicast macs | |
3709 | * (configrue / leave the primary mac) | |
3710 | */ | |
3711 | rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE, | |
3712 | edev->primary_mac); | |
3713 | if (rc) | |
3714 | goto out; | |
3715 | ||
3716 | /* Check for promiscuous */ | |
3717 | if ((ndev->flags & IFF_PROMISC) || | |
3718 | (uc_count > 15)) { /* @@@TBD resource allocation - 1 */ | |
3719 | accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC; | |
3720 | } else { | |
3721 | /* Add MAC filters according to the unicast secondary macs */ | |
3722 | int i; | |
3723 | ||
3724 | temp = uc_macs; | |
3725 | for (i = 0; i < uc_count; i++) { | |
3726 | rc = qede_set_ucast_rx_mac(edev, | |
3727 | QED_FILTER_XCAST_TYPE_ADD, | |
3728 | temp); | |
3729 | if (rc) | |
3730 | goto out; | |
3731 | ||
3732 | temp += ETH_ALEN; | |
3733 | } | |
3734 | ||
3735 | rc = qede_configure_mcast_filtering(ndev, &accept_flags); | |
3736 | if (rc) | |
3737 | goto out; | |
3738 | } | |
3739 | ||
7c1bfcad SRK |
3740 | /* take care of VLAN mode */ |
3741 | if (ndev->flags & IFF_PROMISC) { | |
3742 | qede_config_accept_any_vlan(edev, true); | |
3743 | } else if (!edev->non_configured_vlans) { | |
3744 | /* It's possible that accept_any_vlan mode is set due to a | |
3745 | * previous setting of IFF_PROMISC. If vlan credits are | |
3746 | * sufficient, disable accept_any_vlan. | |
3747 | */ | |
3748 | qede_config_accept_any_vlan(edev, false); | |
3749 | } | |
3750 | ||
0d8e0aa0 SK |
3751 | rx_mode.filter.accept_flags = accept_flags; |
3752 | edev->ops->filter_config(edev->cdev, &rx_mode); | |
3753 | out: | |
3754 | kfree(uc_macs); | |
3755 | } |