projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
qed: Add statistics support
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
42static const char version[] = "QLogic QL4xxx 40G/100G Ethernet Driver qede "
43 DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic 40G/100G Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
56#define CHIP_NUM_57980S_10 0x1635
57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
a2ec6172 90static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
a2ec6172
SK		 99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
2950219d
YM		 105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
e712d52b
YM		 140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
2950219d
YM		 162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
e712d52b
YM		 172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
2950219d 175 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
2950219d 187 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
2950219d
YM		 195/* -------------------------------------------------------------------------
196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
333 u16 bd2_bits = 0, bd2_bits2 = 0;
334
335 bd2_bits2 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
336
337 bd2_bits |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
341 bd2_bits2 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
350 bd2_bits2 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
351
352 if (third_bd) {
353 third_bd->data.bitfields |=
354 ((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT;
357 }
358
359 second_bd->data.bitfields = cpu_to_le16(bd2_bits);
360 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
361}
362
363static int map_frag_to_bd(struct qede_dev *edev,
364 skb_frag_t *frag,
365 struct eth_tx_bd *bd)
366{
367 dma_addr_t mapping;
368
369 /* Map skb non-linear frag data for DMA */
370 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
371 skb_frag_size(frag),
372 DMA_TO_DEVICE);
373 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
374 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
375 return -ENOMEM;
376 }
377
378 /* Setup the data pointer of the frag data */
379 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
380
381 return 0;
382}
383
384/* Main transmit function */
385static
386netdev_tx_t qede_start_xmit(struct sk_buff *skb,
387 struct net_device *ndev)
388{
389 struct qede_dev *edev = netdev_priv(ndev);
390 struct netdev_queue *netdev_txq;
391 struct qede_tx_queue *txq;
392 struct eth_tx_1st_bd *first_bd;
393 struct eth_tx_2nd_bd *second_bd = NULL;
394 struct eth_tx_3rd_bd *third_bd = NULL;
395 struct eth_tx_bd *tx_data_bd = NULL;
396 u16 txq_index;
397 u8 nbd = 0;
398 dma_addr_t mapping;
399 int rc, frag_idx = 0, ipv6_ext = 0;
400 u8 xmit_type;
401 u16 idx;
402 u16 hlen;
403 bool data_split;
404
405 /* Get tx-queue context and netdev index */
406 txq_index = skb_get_queue_mapping(skb);
407 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
408 txq = QEDE_TX_QUEUE(edev, txq_index);
409 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
410
411 /* Current code doesn't support SKB linearization, since the max number
412 * of skb frags can be passed in the FW HSI.
413 */
414 BUILD_BUG_ON(MAX_SKB_FRAGS > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET);
415
416 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
417 (MAX_SKB_FRAGS + 1));
418
419 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
420
421 /* Fill the entry in the SW ring and the BDs in the FW ring */
422 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
423 txq->sw_tx_ring[idx].skb = skb;
424 first_bd = (struct eth_tx_1st_bd *)
425 qed_chain_produce(&txq->tx_pbl);
426 memset(first_bd, 0, sizeof(*first_bd));
427 first_bd->data.bd_flags.bitfields =
428 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
429
430 /* Map skb linear data for DMA and set in the first BD */
431 mapping = dma_map_single(&edev->pdev->dev, skb->data,
432 skb_headlen(skb), DMA_TO_DEVICE);
433 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
434 DP_NOTICE(edev, "SKB mapping failed\n");
435 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
436 return NETDEV_TX_OK;
437 }
438 nbd++;
439 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
440
441 /* In case there is IPv6 with extension headers or LSO we need 2nd and
442 * 3rd BDs.
443 */
444 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
445 second_bd = (struct eth_tx_2nd_bd *)
446 qed_chain_produce(&txq->tx_pbl);
447 memset(second_bd, 0, sizeof(*second_bd));
448
449 nbd++;
450 third_bd = (struct eth_tx_3rd_bd *)
451 qed_chain_produce(&txq->tx_pbl);
452 memset(third_bd, 0, sizeof(*third_bd));
453
454 nbd++;
455 /* We need to fill in additional data in second_bd... */
456 tx_data_bd = (struct eth_tx_bd *)second_bd;
457 }
458
459 if (skb_vlan_tag_present(skb)) {
460 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
461 first_bd->data.bd_flags.bitfields |=
462 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
463 }
464
465 /* Fill the parsing flags & params according to the requested offload */
466 if (xmit_type & XMIT_L4_CSUM) {
467 /* We don't re-calculate IP checksum as it is already done by
468 * the upper stack
469 */
470 first_bd->data.bd_flags.bitfields |=
471 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
472
473 /* If the packet is IPv6 with extension header, indicate that
474 * to FW and pass few params, since the device cracker doesn't
475 * support parsing IPv6 with extension header/s.
476 */
477 if (unlikely(ipv6_ext))
478 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
479 }
480
481 if (xmit_type & XMIT_LSO) {
482 first_bd->data.bd_flags.bitfields |=
483 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
484 third_bd->data.lso_mss =
485 cpu_to_le16(skb_shinfo(skb)->gso_size);
486
487 first_bd->data.bd_flags.bitfields |=
488 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
489 hlen = skb_transport_header(skb) +
490 tcp_hdrlen(skb) - skb->data;
491
492 /* @@@TBD - if will not be removed need to check */
493 third_bd->data.bitfields |=
494 (1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
495
496 /* Make life easier for FW guys who can't deal with header and
497 * data on same BD. If we need to split, use the second bd...
498 */
499 if (unlikely(skb_headlen(skb) > hlen)) {
500 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
501 "TSO split header size is %d (%x:%x)\n",
502 first_bd->nbytes, first_bd->addr.hi,
503 first_bd->addr.lo);
504
505 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
506 le32_to_cpu(first_bd->addr.lo)) +
507 hlen;
508
509 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
510 le16_to_cpu(first_bd->nbytes) -
511 hlen);
512
513 /* this marks the BD as one that has no
514 * individual mapping
515 */
516 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
517
518 first_bd->nbytes = cpu_to_le16(hlen);
519
520 tx_data_bd = (struct eth_tx_bd *)third_bd;
521 data_split = true;
522 }
523 }
524
525 /* Handle fragmented skb */
526 /* special handle for frags inside 2nd and 3rd bds.. */
527 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
528 rc = map_frag_to_bd(edev,
529 &skb_shinfo(skb)->frags[frag_idx],
530 tx_data_bd);
531 if (rc) {
532 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
533 data_split);
534 return NETDEV_TX_OK;
535 }
536
537 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
538 tx_data_bd = (struct eth_tx_bd *)third_bd;
539 else
540 tx_data_bd = NULL;
541
542 frag_idx++;
543 }
544
545 /* map last frags into 4th, 5th .... */
546 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
547 tx_data_bd = (struct eth_tx_bd *)
548 qed_chain_produce(&txq->tx_pbl);
549
550 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
551
552 rc = map_frag_to_bd(edev,
553 &skb_shinfo(skb)->frags[frag_idx],
554 tx_data_bd);
555 if (rc) {
556 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
557 data_split);
558 return NETDEV_TX_OK;
559 }
560 }
561
562 /* update the first BD with the actual num BDs */
563 first_bd->data.nbds = nbd;
564
565 netdev_tx_sent_queue(netdev_txq, skb->len);
566
567 skb_tx_timestamp(skb);
568
569 /* Advance packet producer only before sending the packet since mapping
570 * of pages may fail.
571 */
572 txq->sw_tx_prod++;
573
574 /* 'next page' entries are counted in the producer value */
575 txq->tx_db.data.bd_prod =
576 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
577
578 /* wmb makes sure that the BDs data is updated before updating the
579 * producer, otherwise FW may read old data from the BDs.
580 */
581 wmb();
582 barrier();
583 writel(txq->tx_db.raw, txq->doorbell_addr);
584
585 /* mmiowb is needed to synchronize doorbell writes from more than one
586 * processor. It guarantees that the write arrives to the device before
587 * the queue lock is released and another start_xmit is called (possibly
588 * on another CPU). Without this barrier, the next doorbell can bypass
589 * this doorbell. This is applicable to IA64/Altix systems.
590 */
591 mmiowb();
592
593 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
594 < (MAX_SKB_FRAGS + 1))) {
595 netif_tx_stop_queue(netdev_txq);
596 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
597 "Stop queue was called\n");
598 /* paired memory barrier is in qede_tx_int(), we have to keep
599 * ordering of set_bit() in netif_tx_stop_queue() and read of
600 * fp->bd_tx_cons
601 */
602 smp_mb();
603
604 if (qed_chain_get_elem_left(&txq->tx_pbl)
605 >= (MAX_SKB_FRAGS + 1) &&
606 (edev->state == QEDE_STATE_OPEN)) {
607 netif_tx_wake_queue(netdev_txq);
608 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
609 "Wake queue was called\n");
610 }
611 }
612
613 return NETDEV_TX_OK;
614}
615
616static int qede_txq_has_work(struct qede_tx_queue *txq)
617{
618 u16 hw_bd_cons;
619
620 /* Tell compiler that consumer and producer can change */
621 barrier();
622 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
623 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
624 return 0;
625
626 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
627}
628
629static int qede_tx_int(struct qede_dev *edev,
630 struct qede_tx_queue *txq)
631{
632 struct netdev_queue *netdev_txq;
633 u16 hw_bd_cons;
634 unsigned int pkts_compl = 0, bytes_compl = 0;
635 int rc;
636
637 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
638
639 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
640 barrier();
641
642 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
643 int len = 0;
644
645 rc = qede_free_tx_pkt(edev, txq, &len);
646 if (rc) {
647 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
648 hw_bd_cons,
649 qed_chain_get_cons_idx(&txq->tx_pbl));
650 break;
651 }
652
653 bytes_compl += len;
654 pkts_compl++;
655 txq->sw_tx_cons++;
656 }
657
658 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
659
660 /* Need to make the tx_bd_cons update visible to start_xmit()
661 * before checking for netif_tx_queue_stopped(). Without the
662 * memory barrier, there is a small possibility that
663 * start_xmit() will miss it and cause the queue to be stopped
664 * forever.
665 * On the other hand we need an rmb() here to ensure the proper
666 * ordering of bit testing in the following
667 * netif_tx_queue_stopped(txq) call.
668 */
669 smp_mb();
670
671 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
672 /* Taking tx_lock is needed to prevent reenabling the queue
673 * while it's empty. This could have happen if rx_action() gets
674 * suspended in qede_tx_int() after the condition before
675 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
676 *
677 * stops the queue->sees fresh tx_bd_cons->releases the queue->
678 * sends some packets consuming the whole queue again->
679 * stops the queue
680 */
681
682 __netif_tx_lock(netdev_txq, smp_processor_id());
683
684 if ((netif_tx_queue_stopped(netdev_txq)) &&
685 (edev->state == QEDE_STATE_OPEN) &&
686 (qed_chain_get_elem_left(&txq->tx_pbl)
687 >= (MAX_SKB_FRAGS + 1))) {
688 netif_tx_wake_queue(netdev_txq);
689 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
690 "Wake queue was called\n");
691 }
692
693 __netif_tx_unlock(netdev_txq);
694 }
695
696 return 0;
697}
698
699static bool qede_has_rx_work(struct qede_rx_queue *rxq)
700{
701 u16 hw_comp_cons, sw_comp_cons;
702
703 /* Tell compiler that status block fields can change */
704 barrier();
705
706 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
707 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
708
709 return hw_comp_cons != sw_comp_cons;
710}
711
712static bool qede_has_tx_work(struct qede_fastpath *fp)
713{
714 u8 tc;
715
716 for (tc = 0; tc < fp->edev->num_tc; tc++)
717 if (qede_txq_has_work(&fp->txqs[tc]))
718 return true;
719 return false;
720}
721
722/* This function copies the Rx buffer from the CONS position to the PROD
723 * position, since we failed to allocate a new Rx buffer.
724 */
725static void qede_reuse_rx_data(struct qede_rx_queue *rxq)
726{
727 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
728 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
729 struct sw_rx_data *sw_rx_data_cons =
730 &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
731 struct sw_rx_data *sw_rx_data_prod =
732 &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
733
734 dma_unmap_addr_set(sw_rx_data_prod, mapping,
735 dma_unmap_addr(sw_rx_data_cons, mapping));
736
737 sw_rx_data_prod->data = sw_rx_data_cons->data;
738 memcpy(rx_bd_prod, rx_bd_cons, sizeof(struct eth_rx_bd));
739
740 rxq->sw_rx_cons++;
741 rxq->sw_rx_prod++;
742}
743
744static inline void qede_update_rx_prod(struct qede_dev *edev,
745 struct qede_rx_queue *rxq)
746{
747 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
748 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
749 struct eth_rx_prod_data rx_prods = {0};
750
751 /* Update producers */
752 rx_prods.bd_prod = cpu_to_le16(bd_prod);
753 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
754
755 /* Make sure that the BD and SGE data is updated before updating the
756 * producers since FW might read the BD/SGE right after the producer
757 * is updated.
758 */
759 wmb();
760
761 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
762 (u32 *)&rx_prods);
763
764 /* mmiowb is needed to synchronize doorbell writes from more than one
765 * processor. It guarantees that the write arrives to the device before
766 * the napi lock is released and another qede_poll is called (possibly
767 * on another CPU). Without this barrier, the next doorbell can bypass
768 * this doorbell. This is applicable to IA64/Altix systems.
769 */
770 mmiowb();
771}
772
773static u32 qede_get_rxhash(struct qede_dev *edev,
774 u8 bitfields,
775 __le32 rss_hash,
776 enum pkt_hash_types *rxhash_type)
777{
778 enum rss_hash_type htype;
779
780 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
781
782 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
783 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
784 (htype == RSS_HASH_TYPE_IPV6)) ?
785 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
786 return le32_to_cpu(rss_hash);
787 }
788 *rxhash_type = PKT_HASH_TYPE_NONE;
789 return 0;
790}
791
792static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
793{
794 skb_checksum_none_assert(skb);
795
796 if (csum_flag & QEDE_CSUM_UNNECESSARY)
797 skb->ip_summed = CHECKSUM_UNNECESSARY;
798}
799
800static inline void qede_skb_receive(struct qede_dev *edev,
801 struct qede_fastpath *fp,
802 struct sk_buff *skb,
803 u16 vlan_tag)
804{
805 if (vlan_tag)
806 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
807 vlan_tag);
808
809 napi_gro_receive(&fp->napi, skb);
810}
811
812static u8 qede_check_csum(u16 flag)
813{
814 u16 csum_flag = 0;
815 u8 csum = 0;
816
817 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
818 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
819 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
820 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
821 csum = QEDE_CSUM_UNNECESSARY;
822 }
823
824 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
825 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
826
827 if (csum_flag & flag)
828 return QEDE_CSUM_ERROR;
829
830 return csum;
831}
832
833static int qede_rx_int(struct qede_fastpath *fp, int budget)
834{
835 struct qede_dev *edev = fp->edev;
836 struct qede_rx_queue *rxq = fp->rxq;
837
838 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
839 int rx_pkt = 0;
840 u8 csum_flag;
841
842 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
843 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
844
845 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
846 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
847 * read before it is written by FW, then FW writes CQE and SB, and then
848 * the CPU reads the hw_comp_cons, it will use an old CQE.
849 */
850 rmb();
851
852 /* Loop to complete all indicated BDs */
853 while (sw_comp_cons != hw_comp_cons) {
854 struct eth_fast_path_rx_reg_cqe *fp_cqe;
855 enum pkt_hash_types rxhash_type;
856 enum eth_rx_cqe_type cqe_type;
857 struct sw_rx_data *sw_rx_data;
858 union eth_rx_cqe *cqe;
859 struct sk_buff *skb;
860 u16 len, pad;
861 u32 rx_hash;
862 u8 *data;
863
864 /* Get the CQE from the completion ring */
865 cqe = (union eth_rx_cqe *)
866 qed_chain_consume(&rxq->rx_comp_ring);
867 cqe_type = cqe->fast_path_regular.type;
868
869 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
870 edev->ops->eth_cqe_completion(
871 edev->cdev, fp->rss_id,
872 (struct eth_slow_path_rx_cqe *)cqe);
873 goto next_cqe;
874 }
875
876 /* Get the data from the SW ring */
877 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
878 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
879 data = sw_rx_data->data;
880
881 fp_cqe = &cqe->fast_path_regular;
882 len = le16_to_cpu(fp_cqe->pkt_len);
883 pad = fp_cqe->placement_offset;
884
885 /* For every Rx BD consumed, we allocate a new BD so the BD ring
886 * is always with a fixed size. If allocation fails, we take the
887 * consumed BD and return it to the ring in the PROD position.
888 * The packet that was received on that BD will be dropped (and
889 * not passed to the upper stack).
890 */
891 if (likely(qede_alloc_rx_buffer(edev, rxq) == 0)) {
892 dma_unmap_single(&edev->pdev->dev,
893 dma_unmap_addr(sw_rx_data, mapping),
894 rxq->rx_buf_size, DMA_FROM_DEVICE);
895
896 /* If this is an error packet then drop it */
897 parse_flag =
898 le16_to_cpu(cqe->fast_path_regular.pars_flags.flags);
899 csum_flag = qede_check_csum(parse_flag);
900 if (csum_flag == QEDE_CSUM_ERROR) {
901 DP_NOTICE(edev,
902 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
903 sw_comp_cons, parse_flag);
904 rxq->rx_hw_errors++;
905 kfree(data);
906 goto next_rx;
907 }
908
909 skb = build_skb(data, 0);
910
911 if (unlikely(!skb)) {
912 DP_NOTICE(edev,
913 "Build_skb failed, dropping incoming packet\n");
914 kfree(data);
915 rxq->rx_alloc_errors++;
916 goto next_rx;
917 }
918
919 skb_reserve(skb, pad);
920
921 } else {
922 DP_NOTICE(edev,
923 "New buffer allocation failed, dropping incoming packet and reusing its buffer\n");
924 qede_reuse_rx_data(rxq);
925 rxq->rx_alloc_errors++;
926 goto next_cqe;
927 }
928
929 sw_rx_data->data = NULL;
930
931 skb_put(skb, len);
932
933 skb->protocol = eth_type_trans(skb, edev->ndev);
934
935 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
936 fp_cqe->rss_hash,
937 &rxhash_type);
938
939 skb_set_hash(skb, rx_hash, rxhash_type);
940
941 qede_set_skb_csum(skb, csum_flag);
942
943 skb_record_rx_queue(skb, fp->rss_id);
944
945 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
946
947 qed_chain_consume(&rxq->rx_bd_ring);
948
949next_rx:
950 rxq->sw_rx_cons++;
951 rx_pkt++;
952
953next_cqe: /* don't consume bd rx buffer */
954 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
955 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
956 /* CR TPA - revisit how to handle budget in TPA perhaps
957 * increase on "end"
958 */
959 if (rx_pkt == budget)
960 break;
961 } /* repeat while sw_comp_cons != hw_comp_cons... */
962
963 /* Update producers */
964 qede_update_rx_prod(edev, rxq);
965
966 return rx_pkt;
967}
968
969static int qede_poll(struct napi_struct *napi, int budget)
970{
971 int work_done = 0;
972 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
973 napi);
974 struct qede_dev *edev = fp->edev;
975
976 while (1) {
977 u8 tc;
978
979 for (tc = 0; tc < edev->num_tc; tc++)
980 if (qede_txq_has_work(&fp->txqs[tc]))
981 qede_tx_int(edev, &fp->txqs[tc]);
982
983 if (qede_has_rx_work(fp->rxq)) {
984 work_done += qede_rx_int(fp, budget - work_done);
985
986 /* must not complete if we consumed full budget */
987 if (work_done >= budget)
988 break;
989 }
990
991 /* Fall out from the NAPI loop if needed */
992 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
993 qed_sb_update_sb_idx(fp->sb_info);
994 /* *_has_*_work() reads the status block,
995 * thus we need to ensure that status block indices
996 * have been actually read (qed_sb_update_sb_idx)
997 * prior to this check (*_has_*_work) so that
998 * we won't write the "newer" value of the status block
999 * to HW (if there was a DMA right after
1000 * qede_has_rx_work and if there is no rmb, the memory
1001 * reading (qed_sb_update_sb_idx) may be postponed
1002 * to right before *_ack_sb). In this case there
1003 * will never be another interrupt until there is
1004 * another update of the status block, while there
1005 * is still unhandled work.
1006 */
1007 rmb();
1008
1009 if (!(qede_has_rx_work(fp->rxq) ||
1010 qede_has_tx_work(fp))) {
1011 napi_complete(napi);
1012 /* Update and reenable interrupts */
1013 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1014 1 /*update*/);
1015 break;
1016 }
1017 }
1018 }
1019
1020 return work_done;
1021}
1022
1023static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1024{
1025 struct qede_fastpath *fp = fp_cookie;
1026
1027 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1028
1029 napi_schedule_irqoff(&fp->napi);
1030 return IRQ_HANDLED;
1031}
1032
1033/* -------------------------------------------------------------------------
1034 * END OF FAST-PATH
1035 * -------------------------------------------------------------------------
1036 */
1037
1038static int qede_open(struct net_device *ndev);
1039static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1040static int qede_set_mac_addr(struct net_device *ndev, void *p);
1041static void qede_set_rx_mode(struct net_device *ndev);
1042static void qede_config_rx_mode(struct net_device *ndev);
1043
1044static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1045 enum qed_filter_xcast_params_type opcode,
1046 unsigned char mac[ETH_ALEN])
1047{
1048 struct qed_filter_params filter_cmd;
1049
1050 memset(&filter_cmd, 0, sizeof(filter_cmd));
1051 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1052 filter_cmd.filter.ucast.type = opcode;
1053 filter_cmd.filter.ucast.mac_valid = 1;
1054 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1055
1056 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1057}
1058
2950219d
YM		 1059static const struct net_device_ops qede_netdev_ops = {
1060 .ndo_open = qede_open,
1061 .ndo_stop = qede_close,
1062 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1063 .ndo_set_rx_mode = qede_set_rx_mode,
1064 .ndo_set_mac_address = qede_set_mac_addr,
2950219d
YM		 1065 .ndo_validate_addr = eth_validate_addr,
1066};
1067
e712d52b
YM		 1068/* -------------------------------------------------------------------------
1069 * START OF PROBE / REMOVE
1070 * -------------------------------------------------------------------------
1071 */
1072
1073static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1074 struct pci_dev *pdev,
1075 struct qed_dev_eth_info *info,
1076 u32 dp_module,
1077 u8 dp_level)
1078{
1079 struct net_device *ndev;
1080 struct qede_dev *edev;
1081
1082 ndev = alloc_etherdev_mqs(sizeof(*edev),
1083 info->num_queues,
1084 info->num_queues);
1085 if (!ndev) {
1086 pr_err("etherdev allocation failed\n");
1087 return NULL;
1088 }
1089
1090 edev = netdev_priv(ndev);
1091 edev->ndev = ndev;
1092 edev->cdev = cdev;
1093 edev->pdev = pdev;
1094 edev->dp_module = dp_module;
1095 edev->dp_level = dp_level;
1096 edev->ops = qed_ops;
2950219d
YM		 1097 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1098 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1099
1100 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1101
1102 SET_NETDEV_DEV(ndev, &pdev->dev);
1103
1104 memcpy(&edev->dev_info, info, sizeof(*info));
1105
1106 edev->num_tc = edev->dev_info.num_tc;
1107
1108 return edev;
1109}
1110
1111static void qede_init_ndev(struct qede_dev *edev)
1112{
1113 struct net_device *ndev = edev->ndev;
1114 struct pci_dev *pdev = edev->pdev;
1115 u32 hw_features;
1116
1117 pci_set_drvdata(pdev, ndev);
1118
1119 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1120 ndev->base_addr = ndev->mem_start;
1121 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1122 ndev->irq = edev->dev_info.common.pci_irq;
1123
1124 ndev->watchdog_timeo = TX_TIMEOUT;
1125
2950219d
YM		 1126 ndev->netdev_ops = &qede_netdev_ops;
1127
e712d52b
YM		 1128 /* user-changeble features */
1129 hw_features = NETIF_F_GRO | NETIF_F_SG |
1130 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1131 NETIF_F_TSO | NETIF_F_TSO6;
1132
1133 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1134 NETIF_F_HIGHDMA;
1135 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1136 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
1137 NETIF_F_HW_VLAN_CTAG_TX;
1138
1139 ndev->hw_features = hw_features;
1140
1141 /* Set network device HW mac */
1142 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1143}
1144
1145/* This function converts from 32b param to two params of level and module
1146 * Input 32b decoding:
1147 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1148 * 'happy' flow, e.g. memory allocation failed.
1149 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1150 * and provide important parameters.
1151 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1152 * module. VERBOSE prints are for tracking the specific flow in low level.
1153 *
1154 * Notice that the level should be that of the lowest required logs.
1155 */
1156static void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
1157{
1158 *p_dp_level = QED_LEVEL_NOTICE;
1159 *p_dp_module = 0;
1160
1161 if (debug & QED_LOG_VERBOSE_MASK) {
1162 *p_dp_level = QED_LEVEL_VERBOSE;
1163 *p_dp_module = (debug & 0x3FFFFFFF);
1164 } else if (debug & QED_LOG_INFO_MASK) {
1165 *p_dp_level = QED_LEVEL_INFO;
1166 } else if (debug & QED_LOG_NOTICE_MASK) {
1167 *p_dp_level = QED_LEVEL_NOTICE;
1168 }
1169}
1170
2950219d
YM		 1171static void qede_free_fp_array(struct qede_dev *edev)
1172{
1173 if (edev->fp_array) {
1174 struct qede_fastpath *fp;
1175 int i;
1176
1177 for_each_rss(i) {
1178 fp = &edev->fp_array[i];
1179
1180 kfree(fp->sb_info);
1181 kfree(fp->rxq);
1182 kfree(fp->txqs);
1183 }
1184 kfree(edev->fp_array);
1185 }
1186 edev->num_rss = 0;
1187}
1188
1189static int qede_alloc_fp_array(struct qede_dev *edev)
1190{
1191 struct qede_fastpath *fp;
1192 int i;
1193
1194 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
1195 sizeof(*edev->fp_array), GFP_KERNEL);
1196 if (!edev->fp_array) {
1197 DP_NOTICE(edev, "fp array allocation failed\n");
1198 goto err;
1199 }
1200
1201 for_each_rss(i) {
1202 fp = &edev->fp_array[i];
1203
1204 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
1205 if (!fp->sb_info) {
1206 DP_NOTICE(edev, "sb info struct allocation failed\n");
1207 goto err;
1208 }
1209
1210 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
1211 if (!fp->rxq) {
1212 DP_NOTICE(edev, "RXQ struct allocation failed\n");
1213 goto err;
1214 }
1215
1216 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
1217 if (!fp->txqs) {
1218 DP_NOTICE(edev, "TXQ array allocation failed\n");
1219 goto err;
1220 }
1221 }
1222
1223 return 0;
1224err:
1225 qede_free_fp_array(edev);
1226 return -ENOMEM;
1227}
1228
0d8e0aa0
SK		 1229static void qede_sp_task(struct work_struct *work)
1230{
1231 struct qede_dev *edev = container_of(work, struct qede_dev,
1232 sp_task.work);
1233 mutex_lock(&edev->qede_lock);
1234
1235 if (edev->state == QEDE_STATE_OPEN) {
1236 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1237 qede_config_rx_mode(edev->ndev);
1238 }
1239
1240 mutex_unlock(&edev->qede_lock);
1241}
1242
e712d52b
YM		 1243static void qede_update_pf_params(struct qed_dev *cdev)
1244{
1245 struct qed_pf_params pf_params;
1246
1247 /* 16 rx + 16 tx */
1248 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1249 pf_params.eth_pf_params.num_cons = 32;
1250 qed_ops->common->update_pf_params(cdev, &pf_params);
1251}
1252
1253enum qede_probe_mode {
1254 QEDE_PROBE_NORMAL,
1255};
1256
1257static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1258 enum qede_probe_mode mode)
1259{
1260 struct qed_slowpath_params params;
1261 struct qed_dev_eth_info dev_info;
1262 struct qede_dev *edev;
1263 struct qed_dev *cdev;
1264 int rc;
1265
1266 if (unlikely(dp_level & QED_LEVEL_INFO))
1267 pr_notice("Starting qede probe\n");
1268
1269 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
1270 dp_module, dp_level);
1271 if (!cdev) {
1272 rc = -ENODEV;
1273 goto err0;
1274 }
1275
1276 qede_update_pf_params(cdev);
1277
1278 /* Start the Slowpath-process */
1279 memset(&params, 0, sizeof(struct qed_slowpath_params));
1280 params.int_mode = QED_INT_MODE_MSIX;
1281 params.drv_major = QEDE_MAJOR_VERSION;
1282 params.drv_minor = QEDE_MINOR_VERSION;
1283 params.drv_rev = QEDE_REVISION_VERSION;
1284 params.drv_eng = QEDE_ENGINEERING_VERSION;
1285 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1286 rc = qed_ops->common->slowpath_start(cdev, &params);
1287 if (rc) {
1288 pr_notice("Cannot start slowpath\n");
1289 goto err1;
1290 }
1291
1292 /* Learn information crucial for qede to progress */
1293 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1294 if (rc)
1295 goto err2;
1296
1297 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1298 dp_level);
1299 if (!edev) {
1300 rc = -ENOMEM;
1301 goto err2;
1302 }
1303
1304 qede_init_ndev(edev);
1305
2950219d
YM		 1306 rc = register_netdev(edev->ndev);
1307 if (rc) {
1308 DP_NOTICE(edev, "Cannot register net-device\n");
1309 goto err3;
1310 }
1311
e712d52b
YM		 1312 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
1313
a2ec6172
SK		 1314 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1315
0d8e0aa0
SK		 1316 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1317 mutex_init(&edev->qede_lock);
1318
e712d52b
YM		 1319 DP_INFO(edev, "Ending successfully qede probe\n");
1320
1321 return 0;
1322
2950219d
YM		 1323err3:
1324 free_netdev(edev->ndev);
e712d52b
YM		 1325err2:
1326 qed_ops->common->slowpath_stop(cdev);
1327err1:
1328 qed_ops->common->remove(cdev);
1329err0:
1330 return rc;
1331}
1332
1333static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1334{
1335 u32 dp_module = 0;
1336 u8 dp_level = 0;
1337
1338 qede_config_debug(debug, &dp_module, &dp_level);
1339
1340 return __qede_probe(pdev, dp_module, dp_level,
1341 QEDE_PROBE_NORMAL);
1342}
1343
1344enum qede_remove_mode {
1345 QEDE_REMOVE_NORMAL,
1346};
1347
1348static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1349{
1350 struct net_device *ndev = pci_get_drvdata(pdev);
1351 struct qede_dev *edev = netdev_priv(ndev);
1352 struct qed_dev *cdev = edev->cdev;
1353
1354 DP_INFO(edev, "Starting qede_remove\n");
1355
0d8e0aa0 1356 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 1357 unregister_netdev(ndev);
1358
e712d52b
YM		 1359 edev->ops->common->set_power_state(cdev, PCI_D0);
1360
1361 pci_set_drvdata(pdev, NULL);
1362
1363 free_netdev(ndev);
1364
1365 /* Use global ops since we've freed edev */
1366 qed_ops->common->slowpath_stop(cdev);
1367 qed_ops->common->remove(cdev);
1368
1369 pr_notice("Ending successfully qede_remove\n");
1370}
1371
1372static void qede_remove(struct pci_dev *pdev)
1373{
1374 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1375}
2950219d
YM		 1376
1377/* -------------------------------------------------------------------------
1378 * START OF LOAD / UNLOAD
1379 * -------------------------------------------------------------------------
1380 */
1381
1382static int qede_set_num_queues(struct qede_dev *edev)
1383{
1384 int rc;
1385 u16 rss_num;
1386
1387 /* Setup queues according to possible resources*/
1388 rss_num = netif_get_num_default_rss_queues() *
1389 edev->dev_info.common.num_hwfns;
1390
1391 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1392
1393 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1394 if (rc > 0) {
1395 /* Managed to request interrupts for our queues */
1396 edev->num_rss = rc;
1397 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1398 QEDE_RSS_CNT(edev), rss_num);
1399 rc = 0;
1400 }
1401 return rc;
1402}
1403
1404static void qede_free_mem_sb(struct qede_dev *edev,
1405 struct qed_sb_info *sb_info)
1406{
1407 if (sb_info->sb_virt)
1408 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1409 (void *)sb_info->sb_virt, sb_info->sb_phys);
1410}
1411
1412/* This function allocates fast-path status block memory */
1413static int qede_alloc_mem_sb(struct qede_dev *edev,
1414 struct qed_sb_info *sb_info,
1415 u16 sb_id)
1416{
1417 struct status_block *sb_virt;
1418 dma_addr_t sb_phys;
1419 int rc;
1420
1421 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1422 sizeof(*sb_virt),
1423 &sb_phys, GFP_KERNEL);
1424 if (!sb_virt) {
1425 DP_ERR(edev, "Status block allocation failed\n");
1426 return -ENOMEM;
1427 }
1428
1429 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1430 sb_virt, sb_phys, sb_id,
1431 QED_SB_TYPE_L2_QUEUE);
1432 if (rc) {
1433 DP_ERR(edev, "Status block initialization failed\n");
1434 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1435 sb_virt, sb_phys);
1436 return rc;
1437 }
1438
1439 return 0;
1440}
1441
1442static void qede_free_rx_buffers(struct qede_dev *edev,
1443 struct qede_rx_queue *rxq)
1444{
1445 u16 i;
1446
1447 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1448 struct sw_rx_data *rx_buf;
1449 u8 *data;
1450
1451 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1452 data = rx_buf->data;
1453
1454 dma_unmap_single(&edev->pdev->dev,
1455 dma_unmap_addr(rx_buf, mapping),
1456 rxq->rx_buf_size, DMA_FROM_DEVICE);
1457
1458 rx_buf->data = NULL;
1459 kfree(data);
1460 }
1461}
1462
1463static void qede_free_mem_rxq(struct qede_dev *edev,
1464 struct qede_rx_queue *rxq)
1465{
1466 /* Free rx buffers */
1467 qede_free_rx_buffers(edev, rxq);
1468
1469 /* Free the parallel SW ring */
1470 kfree(rxq->sw_rx_ring);
1471
1472 /* Free the real RQ ring used by FW */
1473 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1474 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1475}
1476
1477static int qede_alloc_rx_buffer(struct qede_dev *edev,
1478 struct qede_rx_queue *rxq)
1479{
1480 struct sw_rx_data *sw_rx_data;
1481 struct eth_rx_bd *rx_bd;
1482 dma_addr_t mapping;
1483 u16 rx_buf_size;
1484 u8 *data;
1485
1486 rx_buf_size = rxq->rx_buf_size;
1487
1488 data = kmalloc(rx_buf_size, GFP_ATOMIC);
1489 if (unlikely(!data)) {
1490 DP_NOTICE(edev, "Failed to allocate Rx data\n");
1491 return -ENOMEM;
1492 }
1493
1494 mapping = dma_map_single(&edev->pdev->dev, data,
1495 rx_buf_size, DMA_FROM_DEVICE);
1496 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
1497 kfree(data);
1498 DP_NOTICE(edev, "Failed to map Rx buffer\n");
1499 return -ENOMEM;
1500 }
1501
1502 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1503 sw_rx_data->data = data;
1504
1505 dma_unmap_addr_set(sw_rx_data, mapping, mapping);
1506
1507 /* Advance PROD and get BD pointer */
1508 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
1509 WARN_ON(!rx_bd);
1510 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1511 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1512
1513 rxq->sw_rx_prod++;
1514
1515 return 0;
1516}
1517
1518/* This function allocates all memory needed per Rx queue */
1519static int qede_alloc_mem_rxq(struct qede_dev *edev,
1520 struct qede_rx_queue *rxq)
1521{
1522 int i, rc, size, num_allocated;
1523
1524 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1525
1526 rxq->rx_buf_size = NET_IP_ALIGN +
1527 ETH_OVERHEAD +
1528 edev->ndev->mtu +
1529 QEDE_FW_RX_ALIGN_END;
1530
1531 /* Allocate the parallel driver ring for Rx buffers */
1532 size = sizeof(*rxq->sw_rx_ring) * NUM_RX_BDS_MAX;
1533 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1534 if (!rxq->sw_rx_ring) {
1535 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1536 goto err;
1537 }
1538
1539 /* Allocate FW Rx ring */
1540 rc = edev->ops->common->chain_alloc(edev->cdev,
1541 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1542 QED_CHAIN_MODE_NEXT_PTR,
1543 NUM_RX_BDS_MAX,
1544 sizeof(struct eth_rx_bd),
1545 &rxq->rx_bd_ring);
1546
1547 if (rc)
1548 goto err;
1549
1550 /* Allocate FW completion ring */
1551 rc = edev->ops->common->chain_alloc(edev->cdev,
1552 QED_CHAIN_USE_TO_CONSUME,
1553 QED_CHAIN_MODE_PBL,
1554 NUM_RX_BDS_MAX,
1555 sizeof(union eth_rx_cqe),
1556 &rxq->rx_comp_ring);
1557 if (rc)
1558 goto err;
1559
1560 /* Allocate buffers for the Rx ring */
1561 for (i = 0; i < rxq->num_rx_buffers; i++) {
1562 rc = qede_alloc_rx_buffer(edev, rxq);
1563 if (rc)
1564 break;
1565 }
1566 num_allocated = i;
1567 if (!num_allocated) {
1568 DP_ERR(edev, "Rx buffers allocation failed\n");
1569 goto err;
1570 } else if (num_allocated < rxq->num_rx_buffers) {
1571 DP_NOTICE(edev,
1572 "Allocated less buffers than desired (%d allocated)\n",
1573 num_allocated);
1574 }
1575
1576 return 0;
1577
1578err:
1579 qede_free_mem_rxq(edev, rxq);
1580 return -ENOMEM;
1581}
1582
1583static void qede_free_mem_txq(struct qede_dev *edev,
1584 struct qede_tx_queue *txq)
1585{
1586 /* Free the parallel SW ring */
1587 kfree(txq->sw_tx_ring);
1588
1589 /* Free the real RQ ring used by FW */
1590 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1591}
1592
1593/* This function allocates all memory needed per Tx queue */
1594static int qede_alloc_mem_txq(struct qede_dev *edev,
1595 struct qede_tx_queue *txq)
1596{
1597 int size, rc;
1598 union eth_tx_bd_types *p_virt;
1599
1600 txq->num_tx_buffers = edev->q_num_tx_buffers;
1601
1602 /* Allocate the parallel driver ring for Tx buffers */
1603 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
1604 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
1605 if (!txq->sw_tx_ring) {
1606 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
1607 goto err;
1608 }
1609
1610 rc = edev->ops->common->chain_alloc(edev->cdev,
1611 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1612 QED_CHAIN_MODE_PBL,
1613 NUM_TX_BDS_MAX,
1614 sizeof(*p_virt),
1615 &txq->tx_pbl);
1616 if (rc)
1617 goto err;
1618
1619 return 0;
1620
1621err:
1622 qede_free_mem_txq(edev, txq);
1623 return -ENOMEM;
1624}
1625
1626/* This function frees all memory of a single fp */
1627static void qede_free_mem_fp(struct qede_dev *edev,
1628 struct qede_fastpath *fp)
1629{
1630 int tc;
1631
1632 qede_free_mem_sb(edev, fp->sb_info);
1633
1634 qede_free_mem_rxq(edev, fp->rxq);
1635
1636 for (tc = 0; tc < edev->num_tc; tc++)
1637 qede_free_mem_txq(edev, &fp->txqs[tc]);
1638}
1639
1640/* This function allocates all memory needed for a single fp (i.e. an entity
1641 * which contains status block, one rx queue and multiple per-TC tx queues.
1642 */
1643static int qede_alloc_mem_fp(struct qede_dev *edev,
1644 struct qede_fastpath *fp)
1645{
1646 int rc, tc;
1647
1648 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
1649 if (rc)
1650 goto err;
1651
1652 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1653 if (rc)
1654 goto err;
1655
1656 for (tc = 0; tc < edev->num_tc; tc++) {
1657 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
1658 if (rc)
1659 goto err;
1660 }
1661
1662 return 0;
1663
1664err:
1665 qede_free_mem_fp(edev, fp);
1666 return -ENOMEM;
1667}
1668
1669static void qede_free_mem_load(struct qede_dev *edev)
1670{
1671 int i;
1672
1673 for_each_rss(i) {
1674 struct qede_fastpath *fp = &edev->fp_array[i];
1675
1676 qede_free_mem_fp(edev, fp);
1677 }
1678}
1679
1680/* This function allocates all qede memory at NIC load. */
1681static int qede_alloc_mem_load(struct qede_dev *edev)
1682{
1683 int rc = 0, rss_id;
1684
1685 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
1686 struct qede_fastpath *fp = &edev->fp_array[rss_id];
1687
1688 rc = qede_alloc_mem_fp(edev, fp);
1689 if (rc)
1690 break;
1691 }
1692
1693 if (rss_id != QEDE_RSS_CNT(edev)) {
1694 /* Failed allocating memory for all the queues */
1695 if (!rss_id) {
1696 DP_ERR(edev,
1697 "Failed to allocate memory for the leading queue\n");
1698 rc = -ENOMEM;
1699 } else {
1700 DP_NOTICE(edev,
1701 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
1702 QEDE_RSS_CNT(edev), rss_id);
1703 }
1704 edev->num_rss = rss_id;
1705 }
1706
1707 return 0;
1708}
1709
1710/* This function inits fp content and resets the SB, RXQ and TXQ structures */
1711static void qede_init_fp(struct qede_dev *edev)
1712{
1713 int rss_id, txq_index, tc;
1714 struct qede_fastpath *fp;
1715
1716 for_each_rss(rss_id) {
1717 fp = &edev->fp_array[rss_id];
1718
1719 fp->edev = edev;
1720 fp->rss_id = rss_id;
1721
1722 memset((void *)&fp->napi, 0, sizeof(fp->napi));
1723
1724 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
1725
1726 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
1727 fp->rxq->rxq_id = rss_id;
1728
1729 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
1730 for (tc = 0; tc < edev->num_tc; tc++) {
1731 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
1732 fp->txqs[tc].index = txq_index;
1733 }
1734
1735 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1736 edev->ndev->name, rss_id);
1737 }
1738}
1739
1740static int qede_set_real_num_queues(struct qede_dev *edev)
1741{
1742 int rc = 0;
1743
1744 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
1745 if (rc) {
1746 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1747 return rc;
1748 }
1749 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
1750 if (rc) {
1751 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1752 return rc;
1753 }
1754
1755 return 0;
1756}
1757
1758static void qede_napi_disable_remove(struct qede_dev *edev)
1759{
1760 int i;
1761
1762 for_each_rss(i) {
1763 napi_disable(&edev->fp_array[i].napi);
1764
1765 netif_napi_del(&edev->fp_array[i].napi);
1766 }
1767}
1768
1769static void qede_napi_add_enable(struct qede_dev *edev)
1770{
1771 int i;
1772
1773 /* Add NAPI objects */
1774 for_each_rss(i) {
1775 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1776 qede_poll, NAPI_POLL_WEIGHT);
1777 napi_enable(&edev->fp_array[i].napi);
1778 }
1779}
1780
1781static void qede_sync_free_irqs(struct qede_dev *edev)
1782{
1783 int i;
1784
1785 for (i = 0; i < edev->int_info.used_cnt; i++) {
1786 if (edev->int_info.msix_cnt) {
1787 synchronize_irq(edev->int_info.msix[i].vector);
1788 free_irq(edev->int_info.msix[i].vector,
1789 &edev->fp_array[i]);
1790 } else {
1791 edev->ops->common->simd_handler_clean(edev->cdev, i);
1792 }
1793 }
1794
1795 edev->int_info.used_cnt = 0;
1796}
1797
1798static int qede_req_msix_irqs(struct qede_dev *edev)
1799{
1800 int i, rc;
1801
1802 /* Sanitize number of interrupts == number of prepared RSS queues */
1803 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
1804 DP_ERR(edev,
1805 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1806 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
1807 return -EINVAL;
1808 }
1809
1810 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
1811 rc = request_irq(edev->int_info.msix[i].vector,
1812 qede_msix_fp_int, 0, edev->fp_array[i].name,
1813 &edev->fp_array[i]);
1814 if (rc) {
1815 DP_ERR(edev, "Request fp %d irq failed\n", i);
1816 qede_sync_free_irqs(edev);
1817 return rc;
1818 }
1819 DP_VERBOSE(edev, NETIF_MSG_INTR,
1820 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1821 edev->fp_array[i].name, i,
1822 &edev->fp_array[i]);
1823 edev->int_info.used_cnt++;
1824 }
1825
1826 return 0;
1827}
1828
1829static void qede_simd_fp_handler(void *cookie)
1830{
1831 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1832
1833 napi_schedule_irqoff(&fp->napi);
1834}
1835
1836static int qede_setup_irqs(struct qede_dev *edev)
1837{
1838 int i, rc = 0;
1839
1840 /* Learn Interrupt configuration */
1841 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1842 if (rc)
1843 return rc;
1844
1845 if (edev->int_info.msix_cnt) {
1846 rc = qede_req_msix_irqs(edev);
1847 if (rc)
1848 return rc;
1849 edev->ndev->irq = edev->int_info.msix[0].vector;
1850 } else {
1851 const struct qed_common_ops *ops;
1852
1853 /* qed should learn receive the RSS ids and callbacks */
1854 ops = edev->ops->common;
1855 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
1856 ops->simd_handler_config(edev->cdev,
1857 &edev->fp_array[i], i,
1858 qede_simd_fp_handler);
1859 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
1860 }
1861 return 0;
1862}
1863
1864static int qede_drain_txq(struct qede_dev *edev,
1865 struct qede_tx_queue *txq,
1866 bool allow_drain)
1867{
1868 int rc, cnt = 1000;
1869
1870 while (txq->sw_tx_cons != txq->sw_tx_prod) {
1871 if (!cnt) {
1872 if (allow_drain) {
1873 DP_NOTICE(edev,
1874 "Tx queue[%d] is stuck, requesting MCP to drain\n",
1875 txq->index);
1876 rc = edev->ops->common->drain(edev->cdev);
1877 if (rc)
1878 return rc;
1879 return qede_drain_txq(edev, txq, false);
1880 }
1881 DP_NOTICE(edev,
1882 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
1883 txq->index, txq->sw_tx_prod,
1884 txq->sw_tx_cons);
1885 return -ENODEV;
1886 }
1887 cnt--;
1888 usleep_range(1000, 2000);
1889 barrier();
1890 }
1891
1892 /* FW finished processing, wait for HW to transmit all tx packets */
1893 usleep_range(1000, 2000);
1894
1895 return 0;
1896}
1897
1898static int qede_stop_queues(struct qede_dev *edev)
1899{
1900 struct qed_update_vport_params vport_update_params;
1901 struct qed_dev *cdev = edev->cdev;
1902 int rc, tc, i;
1903
1904 /* Disable the vport */
1905 memset(&vport_update_params, 0, sizeof(vport_update_params));
1906 vport_update_params.vport_id = 0;
1907 vport_update_params.update_vport_active_flg = 1;
1908 vport_update_params.vport_active_flg = 0;
1909 vport_update_params.update_rss_flg = 0;
1910
1911 rc = edev->ops->vport_update(cdev, &vport_update_params);
1912 if (rc) {
1913 DP_ERR(edev, "Failed to update vport\n");
1914 return rc;
1915 }
1916
1917 /* Flush Tx queues. If needed, request drain from MCP */
1918 for_each_rss(i) {
1919 struct qede_fastpath *fp = &edev->fp_array[i];
1920
1921 for (tc = 0; tc < edev->num_tc; tc++) {
1922 struct qede_tx_queue *txq = &fp->txqs[tc];
1923
1924 rc = qede_drain_txq(edev, txq, true);
1925 if (rc)
1926 return rc;
1927 }
1928 }
1929
1930 /* Stop all Queues in reverse order*/
1931 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
1932 struct qed_stop_rxq_params rx_params;
1933
1934 /* Stop the Tx Queue(s)*/
1935 for (tc = 0; tc < edev->num_tc; tc++) {
1936 struct qed_stop_txq_params tx_params;
1937
1938 tx_params.rss_id = i;
1939 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
1940 rc = edev->ops->q_tx_stop(cdev, &tx_params);
1941 if (rc) {
1942 DP_ERR(edev, "Failed to stop TXQ #%d\n",
1943 tx_params.tx_queue_id);
1944 return rc;
1945 }
1946 }
1947
1948 /* Stop the Rx Queue*/
1949 memset(&rx_params, 0, sizeof(rx_params));
1950 rx_params.rss_id = i;
1951 rx_params.rx_queue_id = i;
1952
1953 rc = edev->ops->q_rx_stop(cdev, &rx_params);
1954 if (rc) {
1955 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
1956 return rc;
1957 }
1958 }
1959
1960 /* Stop the vport */
1961 rc = edev->ops->vport_stop(cdev, 0);
1962 if (rc)
1963 DP_ERR(edev, "Failed to stop VPORT\n");
1964
1965 return rc;
1966}
1967
1968static int qede_start_queues(struct qede_dev *edev)
1969{
1970 int rc, tc, i;
1971 int vport_id = 0, drop_ttl0_flg = 1, vlan_removal_en = 1;
1972 struct qed_dev *cdev = edev->cdev;
1973 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
1974 struct qed_update_vport_params vport_update_params;
1975 struct qed_queue_start_common_params q_params;
1976
1977 if (!edev->num_rss) {
1978 DP_ERR(edev,
1979 "Cannot update V-VPORT as active as there are no Rx queues\n");
1980 return -EINVAL;
1981 }
1982
1983 rc = edev->ops->vport_start(cdev, vport_id,
1984 edev->ndev->mtu,
1985 drop_ttl0_flg,
1986 vlan_removal_en);
1987
1988 if (rc) {
1989 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
1990 return rc;
1991 }
1992
1993 DP_VERBOSE(edev, NETIF_MSG_IFUP,
1994 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
1995 vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
1996
1997 for_each_rss(i) {
1998 struct qede_fastpath *fp = &edev->fp_array[i];
1999 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2000
2001 memset(&q_params, 0, sizeof(q_params));
2002 q_params.rss_id = i;
2003 q_params.queue_id = i;
2004 q_params.vport_id = 0;
2005 q_params.sb = fp->sb_info->igu_sb_id;
2006 q_params.sb_idx = RX_PI;
2007
2008 rc = edev->ops->q_rx_start(cdev, &q_params,
2009 fp->rxq->rx_buf_size,
2010 fp->rxq->rx_bd_ring.p_phys_addr,
2011 phys_table,
2012 fp->rxq->rx_comp_ring.page_cnt,
2013 &fp->rxq->hw_rxq_prod_addr);
2014 if (rc) {
2015 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2016 return rc;
2017 }
2018
2019 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2020
2021 qede_update_rx_prod(edev, fp->rxq);
2022
2023 for (tc = 0; tc < edev->num_tc; tc++) {
2024 struct qede_tx_queue *txq = &fp->txqs[tc];
2025 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2026
2027 memset(&q_params, 0, sizeof(q_params));
2028 q_params.rss_id = i;
2029 q_params.queue_id = txq_index;
2030 q_params.vport_id = 0;
2031 q_params.sb = fp->sb_info->igu_sb_id;
2032 q_params.sb_idx = TX_PI(tc);
2033
2034 rc = edev->ops->q_tx_start(cdev, &q_params,
2035 txq->tx_pbl.pbl.p_phys_table,
2036 txq->tx_pbl.page_cnt,
2037 &txq->doorbell_addr);
2038 if (rc) {
2039 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2040 txq_index, rc);
2041 return rc;
2042 }
2043
2044 txq->hw_cons_ptr =
2045 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2046 SET_FIELD(txq->tx_db.data.params,
2047 ETH_DB_DATA_DEST, DB_DEST_XCM);
2048 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2049 DB_AGG_CMD_SET);
2050 SET_FIELD(txq->tx_db.data.params,
2051 ETH_DB_DATA_AGG_VAL_SEL,
2052 DQ_XCM_ETH_TX_BD_PROD_CMD);
2053
2054 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2055 }
2056 }
2057
2058 /* Prepare and send the vport enable */
2059 memset(&vport_update_params, 0, sizeof(vport_update_params));
2060 vport_update_params.vport_id = vport_id;
2061 vport_update_params.update_vport_active_flg = 1;
2062 vport_update_params.vport_active_flg = 1;
2063
2064 /* Fill struct with RSS params */
2065 if (QEDE_RSS_CNT(edev) > 1) {
2066 vport_update_params.update_rss_flg = 1;
2067 for (i = 0; i < 128; i++)
2068 rss_params->rss_ind_table[i] =
2069 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2070 netdev_rss_key_fill(rss_params->rss_key,
2071 sizeof(rss_params->rss_key));
2072 } else {
2073 memset(rss_params, 0, sizeof(*rss_params));
2074 }
2075 memcpy(&vport_update_params.rss_params, rss_params,
2076 sizeof(*rss_params));
2077
2078 rc = edev->ops->vport_update(cdev, &vport_update_params);
2079 if (rc) {
2080 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2081 return rc;
2082 }
2083
2084 return 0;
2085}
2086
0d8e0aa0
SK		 2087static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2088 enum qed_filter_xcast_params_type opcode,
2089 unsigned char *mac, int num_macs)
2090{
2091 struct qed_filter_params filter_cmd;
2092 int i;
2093
2094 memset(&filter_cmd, 0, sizeof(filter_cmd));
2095 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2096 filter_cmd.filter.mcast.type = opcode;
2097 filter_cmd.filter.mcast.num = num_macs;
2098
2099 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2100 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
2101
2102 return edev->ops->filter_config(edev->cdev, &filter_cmd);
2103}
2104
2950219d
YM		 2105enum qede_unload_mode {
2106 QEDE_UNLOAD_NORMAL,
2107};
2108
2109static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
2110{
a2ec6172 2111 struct qed_link_params link_params;
2950219d
YM		 2112 int rc;
2113
2114 DP_INFO(edev, "Starting qede unload\n");
2115
0d8e0aa0
SK		 2116 mutex_lock(&edev->qede_lock);
2117 edev->state = QEDE_STATE_CLOSED;
2118
2950219d
YM		 2119 /* Close OS Tx */
2120 netif_tx_disable(edev->ndev);
2121 netif_carrier_off(edev->ndev);
2122
a2ec6172
SK		 2123 /* Reset the link */
2124 memset(&link_params, 0, sizeof(link_params));
2125 link_params.link_up = false;
2126 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 2127 rc = qede_stop_queues(edev);
2128 if (rc) {
2129 qede_sync_free_irqs(edev);
2130 goto out;
2131 }
2132
2133 DP_INFO(edev, "Stopped Queues\n");
2134
2135 edev->ops->fastpath_stop(edev->cdev);
2136
2137 /* Release the interrupts */
2138 qede_sync_free_irqs(edev);
2139 edev->ops->common->set_fp_int(edev->cdev, 0);
2140
2141 qede_napi_disable_remove(edev);
2142
2143 qede_free_mem_load(edev);
2144 qede_free_fp_array(edev);
2145
2146out:
2147 mutex_unlock(&edev->qede_lock);
2148 DP_INFO(edev, "Ending qede unload\n");
2149}
2150
2151enum qede_load_mode {
2152 QEDE_LOAD_NORMAL,
2153};
2154
2155static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
2156{
a2ec6172
SK		 2157 struct qed_link_params link_params;
2158 struct qed_link_output link_output;
2950219d
YM		 2159 int rc;
2160
2161 DP_INFO(edev, "Starting qede load\n");
2162
2163 rc = qede_set_num_queues(edev);
2164 if (rc)
2165 goto err0;
2166
2167 rc = qede_alloc_fp_array(edev);
2168 if (rc)
2169 goto err0;
2170
2171 qede_init_fp(edev);
2172
2173 rc = qede_alloc_mem_load(edev);
2174 if (rc)
2175 goto err1;
2176 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
2177 QEDE_RSS_CNT(edev), edev->num_tc);
2178
2179 rc = qede_set_real_num_queues(edev);
2180 if (rc)
2181 goto err2;
2182
2183 qede_napi_add_enable(edev);
2184 DP_INFO(edev, "Napi added and enabled\n");
2185
2186 rc = qede_setup_irqs(edev);
2187 if (rc)
2188 goto err3;
2189 DP_INFO(edev, "Setup IRQs succeeded\n");
2190
2191 rc = qede_start_queues(edev);
2192 if (rc)
2193 goto err4;
2194 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2195
2196 /* Add primary mac and set Rx filters */
2197 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
2198
0d8e0aa0
SK		 2199 mutex_lock(&edev->qede_lock);
2200 edev->state = QEDE_STATE_OPEN;
2201 mutex_unlock(&edev->qede_lock);
a2ec6172
SK		 2202
2203 /* Ask for link-up using current configuration */
2204 memset(&link_params, 0, sizeof(link_params));
2205 link_params.link_up = true;
2206 edev->ops->common->set_link(edev->cdev, &link_params);
2207
2208 /* Query whether link is already-up */
2209 memset(&link_output, 0, sizeof(link_output));
2210 edev->ops->common->get_link(edev->cdev, &link_output);
2211 qede_link_update(edev, &link_output);
2212
2950219d
YM		 2213 DP_INFO(edev, "Ending successfully qede load\n");
2214
2215 return 0;
2216
2217err4:
2218 qede_sync_free_irqs(edev);
2219 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2220err3:
2221 qede_napi_disable_remove(edev);
2222err2:
2223 qede_free_mem_load(edev);
2224err1:
2225 edev->ops->common->set_fp_int(edev->cdev, 0);
2226 qede_free_fp_array(edev);
2227 edev->num_rss = 0;
2228err0:
2229 return rc;
2230}
2231
2232/* called with rtnl_lock */
2233static int qede_open(struct net_device *ndev)
2234{
2235 struct qede_dev *edev = netdev_priv(ndev);
2236
2237 netif_carrier_off(ndev);
2238
2239 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2240
2241 return qede_load(edev, QEDE_LOAD_NORMAL);
2242}
2243
2244static int qede_close(struct net_device *ndev)
2245{
2246 struct qede_dev *edev = netdev_priv(ndev);
2247
2248 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2249
2250 return 0;
2251}
0d8e0aa0 2252
a2ec6172
SK		 2253static void qede_link_update(void *dev, struct qed_link_output *link)
2254{
2255 struct qede_dev *edev = dev;
2256
2257 if (!netif_running(edev->ndev)) {
2258 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
2259 return;
2260 }
2261
2262 if (link->link_up) {
2263 DP_NOTICE(edev, "Link is up\n");
2264 netif_tx_start_all_queues(edev->ndev);
2265 netif_carrier_on(edev->ndev);
2266 } else {
2267 DP_NOTICE(edev, "Link is down\n");
2268 netif_tx_disable(edev->ndev);
2269 netif_carrier_off(edev->ndev);
2270 }
2271}
2272
0d8e0aa0
SK		 2273static int qede_set_mac_addr(struct net_device *ndev, void *p)
2274{
2275 struct qede_dev *edev = netdev_priv(ndev);
2276 struct sockaddr *addr = p;
2277 int rc;
2278
2279 ASSERT_RTNL(); /* @@@TBD To be removed */
2280
2281 DP_INFO(edev, "Set_mac_addr called\n");
2282
2283 if (!is_valid_ether_addr(addr->sa_data)) {
2284 DP_NOTICE(edev, "The MAC address is not valid\n");
2285 return -EFAULT;
2286 }
2287
2288 ether_addr_copy(ndev->dev_addr, addr->sa_data);
2289
2290 if (!netif_running(ndev)) {
2291 DP_NOTICE(edev, "The device is currently down\n");
2292 return 0;
2293 }
2294
2295 /* Remove the previous primary mac */
2296 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2297 edev->primary_mac);
2298 if (rc)
2299 return rc;
2300
2301 /* Add MAC filter according to the new unicast HW MAC address */
2302 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
2303 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2304 edev->primary_mac);
2305}
2306
2307static int
2308qede_configure_mcast_filtering(struct net_device *ndev,
2309 enum qed_filter_rx_mode_type *accept_flags)
2310{
2311 struct qede_dev *edev = netdev_priv(ndev);
2312 unsigned char *mc_macs, *temp;
2313 struct netdev_hw_addr *ha;
2314 int rc = 0, mc_count;
2315 size_t size;
2316
2317 size = 64 * ETH_ALEN;
2318
2319 mc_macs = kzalloc(size, GFP_KERNEL);
2320 if (!mc_macs) {
2321 DP_NOTICE(edev,
2322 "Failed to allocate memory for multicast MACs\n");
2323 rc = -ENOMEM;
2324 goto exit;
2325 }
2326
2327 temp = mc_macs;
2328
2329 /* Remove all previously configured MAC filters */
2330 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2331 mc_macs, 1);
2332 if (rc)
2333 goto exit;
2334
2335 netif_addr_lock_bh(ndev);
2336
2337 mc_count = netdev_mc_count(ndev);
2338 if (mc_count < 64) {
2339 netdev_for_each_mc_addr(ha, ndev) {
2340 ether_addr_copy(temp, ha->addr);
2341 temp += ETH_ALEN;
2342 }
2343 }
2344
2345 netif_addr_unlock_bh(ndev);
2346
2347 /* Check for all multicast @@@TBD resource allocation */
2348 if ((ndev->flags & IFF_ALLMULTI) ||
2349 (mc_count > 64)) {
2350 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
2351 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
2352 } else {
2353 /* Add all multicast MAC filters */
2354 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2355 mc_macs, mc_count);
2356 }
2357
2358exit:
2359 kfree(mc_macs);
2360 return rc;
2361}
2362
2363static void qede_set_rx_mode(struct net_device *ndev)
2364{
2365 struct qede_dev *edev = netdev_priv(ndev);
2366
2367 DP_INFO(edev, "qede_set_rx_mode called\n");
2368
2369 if (edev->state != QEDE_STATE_OPEN) {
2370 DP_INFO(edev,
2371 "qede_set_rx_mode called while interface is down\n");
2372 } else {
2373 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
2374 schedule_delayed_work(&edev->sp_task, 0);
2375 }
2376}
2377
2378/* Must be called with qede_lock held */
2379static void qede_config_rx_mode(struct net_device *ndev)
2380{
2381 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
2382 struct qede_dev *edev = netdev_priv(ndev);
2383 struct qed_filter_params rx_mode;
2384 unsigned char *uc_macs, *temp;
2385 struct netdev_hw_addr *ha;
2386 int rc, uc_count;
2387 size_t size;
2388
2389 netif_addr_lock_bh(ndev);
2390
2391 uc_count = netdev_uc_count(ndev);
2392 size = uc_count * ETH_ALEN;
2393
2394 uc_macs = kzalloc(size, GFP_ATOMIC);
2395 if (!uc_macs) {
2396 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
2397 netif_addr_unlock_bh(ndev);
2398 return;
2399 }
2400
2401 temp = uc_macs;
2402 netdev_for_each_uc_addr(ha, ndev) {
2403 ether_addr_copy(temp, ha->addr);
2404 temp += ETH_ALEN;
2405 }
2406
2407 netif_addr_unlock_bh(ndev);
2408
2409 /* Configure the struct for the Rx mode */
2410 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
2411 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
2412
2413 /* Remove all previous unicast secondary macs and multicast macs
2414 * (configrue / leave the primary mac)
2415 */
2416 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
2417 edev->primary_mac);
2418 if (rc)
2419 goto out;
2420
2421 /* Check for promiscuous */
2422 if ((ndev->flags & IFF_PROMISC) ||
2423 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
2424 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
2425 } else {
2426 /* Add MAC filters according to the unicast secondary macs */
2427 int i;
2428
2429 temp = uc_macs;
2430 for (i = 0; i < uc_count; i++) {
2431 rc = qede_set_ucast_rx_mac(edev,
2432 QED_FILTER_XCAST_TYPE_ADD,
2433 temp);
2434 if (rc)
2435 goto out;
2436
2437 temp += ETH_ALEN;
2438 }
2439
2440 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
2441 if (rc)
2442 goto out;
2443 }
2444
2445 rx_mode.filter.accept_flags = accept_flags;
2446 edev->ops->filter_config(edev->cdev, &rx_mode);
2447out:
2448 kfree(uc_macs);
2449}
Linux kernel - Deliverables
This page took 0.122561 seconds and 5 git commands to generate.