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qed/qede: Add VXLAN tunnel slowpath configuration support
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
b18e170c 27#ifdef CONFIG_QEDE_VXLAN
e712d52b 28#include <net/vxlan.h>
b18e170c 29#endif
e712d52b
YM		 30#include <linux/ip.h>
31#include <net/ipv6.h>
32#include <net/tcp.h>
33#include <linux/if_ether.h>
34#include <linux/if_vlan.h>
35#include <linux/pkt_sched.h>
36#include <linux/ethtool.h>
37#include <linux/in.h>
38#include <linux/random.h>
39#include <net/ip6_checksum.h>
40#include <linux/bitops.h>
41
42#include "qede.h"
43
5abd7e92
YM		 44static char version[] =
45 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 46
5abd7e92 47MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 48MODULE_LICENSE("GPL");
49MODULE_VERSION(DRV_MODULE_VERSION);
50
51static uint debug;
52module_param(debug, uint, 0);
53MODULE_PARM_DESC(debug, " Default debug msglevel");
54
55static const struct qed_eth_ops *qed_ops;
56
57#define CHIP_NUM_57980S_40 0x1634
0e7441d7 58#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 59#define CHIP_NUM_57980S_MF 0x1636
60#define CHIP_NUM_57980S_100 0x1644
61#define CHIP_NUM_57980S_50 0x1654
62#define CHIP_NUM_57980S_25 0x1656
63
64#ifndef PCI_DEVICE_ID_NX2_57980E
65#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
66#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
67#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
68#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
69#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
70#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
71#endif
72
73static const struct pci_device_id qede_pci_tbl[] = {
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
78 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
79 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
80 { 0 }
81};
82
83MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
84
85static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
86
87#define TX_TIMEOUT (5 * HZ)
88
89static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 90static int qede_alloc_rx_buffer(struct qede_dev *edev,
91 struct qede_rx_queue *rxq);
a2ec6172 92static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 93
94static struct pci_driver qede_pci_driver = {
95 .name = "qede",
96 .id_table = qede_pci_tbl,
97 .probe = qede_probe,
98 .remove = qede_remove,
99};
100
a2ec6172
SK		 101static struct qed_eth_cb_ops qede_ll_ops = {
102 {
103 .link_update = qede_link_update,
104 },
105};
106
2950219d
YM		 107static int qede_netdev_event(struct notifier_block *this, unsigned long event,
108 void *ptr)
109{
110 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
111 struct ethtool_drvinfo drvinfo;
112 struct qede_dev *edev;
113
114 /* Currently only support name change */
115 if (event != NETDEV_CHANGENAME)
116 goto done;
117
118 /* Check whether this is a qede device */
119 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
120 goto done;
121
122 memset(&drvinfo, 0, sizeof(drvinfo));
123 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
124 if (strcmp(drvinfo.driver, "qede"))
125 goto done;
126 edev = netdev_priv(ndev);
127
128 /* Notify qed of the name change */
129 if (!edev->ops || !edev->ops->common)
130 goto done;
131 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
132 "qede");
133
134done:
135 return NOTIFY_DONE;
136}
137
138static struct notifier_block qede_netdev_notifier = {
139 .notifier_call = qede_netdev_event,
140};
141
e712d52b
YM		 142static
143int __init qede_init(void)
144{
145 int ret;
e712d52b
YM		 146
147 pr_notice("qede_init: %s\n", version);
148
95114344 149 qed_ops = qed_get_eth_ops();
e712d52b
YM		 150 if (!qed_ops) {
151 pr_notice("Failed to get qed ethtool operations\n");
152 return -EINVAL;
153 }
154
2950219d
YM		 155 /* Must register notifier before pci ops, since we might miss
156 * interface rename after pci probe and netdev registeration.
157 */
158 ret = register_netdevice_notifier(&qede_netdev_notifier);
159 if (ret) {
160 pr_notice("Failed to register netdevice_notifier\n");
161 qed_put_eth_ops();
162 return -EINVAL;
163 }
164
e712d52b
YM		 165 ret = pci_register_driver(&qede_pci_driver);
166 if (ret) {
167 pr_notice("Failed to register driver\n");
2950219d 168 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 169 qed_put_eth_ops();
170 return -EINVAL;
171 }
172
173 return 0;
174}
175
176static void __exit qede_cleanup(void)
177{
178 pr_notice("qede_cleanup called\n");
179
2950219d 180 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 181 pci_unregister_driver(&qede_pci_driver);
182 qed_put_eth_ops();
183}
184
185module_init(qede_init);
186module_exit(qede_cleanup);
187
2950219d
YM		 188/* -------------------------------------------------------------------------
189 * START OF FAST-PATH
190 * -------------------------------------------------------------------------
191 */
192
193/* Unmap the data and free skb */
194static int qede_free_tx_pkt(struct qede_dev *edev,
195 struct qede_tx_queue *txq,
196 int *len)
197{
198 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
199 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
200 struct eth_tx_1st_bd *first_bd;
201 struct eth_tx_bd *tx_data_bd;
202 int bds_consumed = 0;
203 int nbds;
204 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
205 int i, split_bd_len = 0;
206
207 if (unlikely(!skb)) {
208 DP_ERR(edev,
209 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
210 idx, txq->sw_tx_cons, txq->sw_tx_prod);
211 return -1;
212 }
213
214 *len = skb->len;
215
216 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
217
218 bds_consumed++;
219
220 nbds = first_bd->data.nbds;
221
222 if (data_split) {
223 struct eth_tx_bd *split = (struct eth_tx_bd *)
224 qed_chain_consume(&txq->tx_pbl);
225 split_bd_len = BD_UNMAP_LEN(split);
226 bds_consumed++;
227 }
228 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
229 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
230
231 /* Unmap the data of the skb frags */
232 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
233 tx_data_bd = (struct eth_tx_bd *)
234 qed_chain_consume(&txq->tx_pbl);
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
236 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
237 }
238
239 while (bds_consumed++ < nbds)
240 qed_chain_consume(&txq->tx_pbl);
241
242 /* Free skb */
243 dev_kfree_skb_any(skb);
244 txq->sw_tx_ring[idx].skb = NULL;
245 txq->sw_tx_ring[idx].flags = 0;
246
247 return 0;
248}
249
250/* Unmap the data and free skb when mapping failed during start_xmit */
251static void qede_free_failed_tx_pkt(struct qede_dev *edev,
252 struct qede_tx_queue *txq,
253 struct eth_tx_1st_bd *first_bd,
254 int nbd,
255 bool data_split)
256{
257 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
258 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
259 struct eth_tx_bd *tx_data_bd;
260 int i, split_bd_len = 0;
261
262 /* Return prod to its position before this skb was handled */
263 qed_chain_set_prod(&txq->tx_pbl,
264 le16_to_cpu(txq->tx_db.data.bd_prod),
265 first_bd);
266
267 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
268
269 if (data_split) {
270 struct eth_tx_bd *split = (struct eth_tx_bd *)
271 qed_chain_produce(&txq->tx_pbl);
272 split_bd_len = BD_UNMAP_LEN(split);
273 nbd--;
274 }
275
276 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
277 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
278
279 /* Unmap the data of the skb frags */
280 for (i = 0; i < nbd; i++) {
281 tx_data_bd = (struct eth_tx_bd *)
282 qed_chain_produce(&txq->tx_pbl);
283 if (tx_data_bd->nbytes)
284 dma_unmap_page(&edev->pdev->dev,
285 BD_UNMAP_ADDR(tx_data_bd),
286 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
287 }
288
289 /* Return again prod to its position before this skb was handled */
290 qed_chain_set_prod(&txq->tx_pbl,
291 le16_to_cpu(txq->tx_db.data.bd_prod),
292 first_bd);
293
294 /* Free skb */
295 dev_kfree_skb_any(skb);
296 txq->sw_tx_ring[idx].skb = NULL;
297 txq->sw_tx_ring[idx].flags = 0;
298}
299
300static u32 qede_xmit_type(struct qede_dev *edev,
301 struct sk_buff *skb,
302 int *ipv6_ext)
303{
304 u32 rc = XMIT_L4_CSUM;
305 __be16 l3_proto;
306
307 if (skb->ip_summed != CHECKSUM_PARTIAL)
308 return XMIT_PLAIN;
309
310 l3_proto = vlan_get_protocol(skb);
311 if (l3_proto == htons(ETH_P_IPV6) &&
312 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
313 *ipv6_ext = 1;
314
315 if (skb_is_gso(skb))
316 rc |= XMIT_LSO;
317
318 return rc;
319}
320
321static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
322 struct eth_tx_2nd_bd *second_bd,
323 struct eth_tx_3rd_bd *third_bd)
324{
325 u8 l4_proto;
fc48b7a6 326 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 327
fc48b7a6 328 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 329
fc48b7a6 330 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 331 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
332 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
333
fc48b7a6 334 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 335 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
336
337 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
338 l4_proto = ipv6_hdr(skb)->nexthdr;
339 else
340 l4_proto = ip_hdr(skb)->protocol;
341
342 if (l4_proto == IPPROTO_UDP)
fc48b7a6 343 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 344
fc48b7a6 345 if (third_bd)
2950219d 346 third_bd->data.bitfields |=
fc48b7a6
YM		 347 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
348 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
349 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 350
fc48b7a6 351 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 352 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
353}
354
355static int map_frag_to_bd(struct qede_dev *edev,
356 skb_frag_t *frag,
357 struct eth_tx_bd *bd)
358{
359 dma_addr_t mapping;
360
361 /* Map skb non-linear frag data for DMA */
362 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
363 skb_frag_size(frag),
364 DMA_TO_DEVICE);
365 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
366 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
367 return -ENOMEM;
368 }
369
370 /* Setup the data pointer of the frag data */
371 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
372
373 return 0;
374}
375
b1199b10
YM		 376/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
377#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
378static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
379 u8 xmit_type)
380{
381 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
382
383 if (xmit_type & XMIT_LSO) {
384 int hlen;
385
386 hlen = skb_transport_header(skb) +
387 tcp_hdrlen(skb) - skb->data;
388
389 /* linear payload would require its own BD */
390 if (skb_headlen(skb) > hlen)
391 allowed_frags--;
392 }
393
394 return (skb_shinfo(skb)->nr_frags > allowed_frags);
395}
396#endif
397
2950219d
YM		 398/* Main transmit function */
399static
400netdev_tx_t qede_start_xmit(struct sk_buff *skb,
401 struct net_device *ndev)
402{
403 struct qede_dev *edev = netdev_priv(ndev);
404 struct netdev_queue *netdev_txq;
405 struct qede_tx_queue *txq;
406 struct eth_tx_1st_bd *first_bd;
407 struct eth_tx_2nd_bd *second_bd = NULL;
408 struct eth_tx_3rd_bd *third_bd = NULL;
409 struct eth_tx_bd *tx_data_bd = NULL;
410 u16 txq_index;
411 u8 nbd = 0;
412 dma_addr_t mapping;
413 int rc, frag_idx = 0, ipv6_ext = 0;
414 u8 xmit_type;
415 u16 idx;
416 u16 hlen;
417 bool data_split;
418
419 /* Get tx-queue context and netdev index */
420 txq_index = skb_get_queue_mapping(skb);
421 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
422 txq = QEDE_TX_QUEUE(edev, txq_index);
423 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
424
2950219d
YM		 425 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
426 (MAX_SKB_FRAGS + 1));
427
428 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
429
b1199b10
YM		 430#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
431 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
432 if (skb_linearize(skb)) {
433 DP_NOTICE(edev,
434 "SKB linearization failed - silently dropping this SKB\n");
435 dev_kfree_skb_any(skb);
436 return NETDEV_TX_OK;
437 }
438 }
439#endif
440
2950219d
YM		 441 /* Fill the entry in the SW ring and the BDs in the FW ring */
442 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
443 txq->sw_tx_ring[idx].skb = skb;
444 first_bd = (struct eth_tx_1st_bd *)
445 qed_chain_produce(&txq->tx_pbl);
446 memset(first_bd, 0, sizeof(*first_bd));
447 first_bd->data.bd_flags.bitfields =
448 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
449
450 /* Map skb linear data for DMA and set in the first BD */
451 mapping = dma_map_single(&edev->pdev->dev, skb->data,
452 skb_headlen(skb), DMA_TO_DEVICE);
453 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
454 DP_NOTICE(edev, "SKB mapping failed\n");
455 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
456 return NETDEV_TX_OK;
457 }
458 nbd++;
459 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
460
461 /* In case there is IPv6 with extension headers or LSO we need 2nd and
462 * 3rd BDs.
463 */
464 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
465 second_bd = (struct eth_tx_2nd_bd *)
466 qed_chain_produce(&txq->tx_pbl);
467 memset(second_bd, 0, sizeof(*second_bd));
468
469 nbd++;
470 third_bd = (struct eth_tx_3rd_bd *)
471 qed_chain_produce(&txq->tx_pbl);
472 memset(third_bd, 0, sizeof(*third_bd));
473
474 nbd++;
475 /* We need to fill in additional data in second_bd... */
476 tx_data_bd = (struct eth_tx_bd *)second_bd;
477 }
478
479 if (skb_vlan_tag_present(skb)) {
480 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
481 first_bd->data.bd_flags.bitfields |=
482 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
483 }
484
485 /* Fill the parsing flags & params according to the requested offload */
486 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 487 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
488
2950219d
YM		 489 /* We don't re-calculate IP checksum as it is already done by
490 * the upper stack
491 */
492 first_bd->data.bd_flags.bitfields |=
493 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
494
fc48b7a6
YM		 495 first_bd->data.bitfields |= cpu_to_le16(temp);
496
2950219d
YM		 497 /* If the packet is IPv6 with extension header, indicate that
498 * to FW and pass few params, since the device cracker doesn't
499 * support parsing IPv6 with extension header/s.
500 */
501 if (unlikely(ipv6_ext))
502 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
503 }
504
505 if (xmit_type & XMIT_LSO) {
506 first_bd->data.bd_flags.bitfields |=
507 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
508 third_bd->data.lso_mss =
509 cpu_to_le16(skb_shinfo(skb)->gso_size);
510
511 first_bd->data.bd_flags.bitfields |=
512 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
513 hlen = skb_transport_header(skb) +
514 tcp_hdrlen(skb) - skb->data;
515
516 /* @@@TBD - if will not be removed need to check */
517 third_bd->data.bitfields |=
fc48b7a6 518 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 519
520 /* Make life easier for FW guys who can't deal with header and
521 * data on same BD. If we need to split, use the second bd...
522 */
523 if (unlikely(skb_headlen(skb) > hlen)) {
524 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
525 "TSO split header size is %d (%x:%x)\n",
526 first_bd->nbytes, first_bd->addr.hi,
527 first_bd->addr.lo);
528
529 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
530 le32_to_cpu(first_bd->addr.lo)) +
531 hlen;
532
533 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
534 le16_to_cpu(first_bd->nbytes) -
535 hlen);
536
537 /* this marks the BD as one that has no
538 * individual mapping
539 */
540 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
541
542 first_bd->nbytes = cpu_to_le16(hlen);
543
544 tx_data_bd = (struct eth_tx_bd *)third_bd;
545 data_split = true;
546 }
547 }
548
549 /* Handle fragmented skb */
550 /* special handle for frags inside 2nd and 3rd bds.. */
551 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
552 rc = map_frag_to_bd(edev,
553 &skb_shinfo(skb)->frags[frag_idx],
554 tx_data_bd);
555 if (rc) {
556 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
557 data_split);
558 return NETDEV_TX_OK;
559 }
560
561 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
562 tx_data_bd = (struct eth_tx_bd *)third_bd;
563 else
564 tx_data_bd = NULL;
565
566 frag_idx++;
567 }
568
569 /* map last frags into 4th, 5th .... */
570 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
571 tx_data_bd = (struct eth_tx_bd *)
572 qed_chain_produce(&txq->tx_pbl);
573
574 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
575
576 rc = map_frag_to_bd(edev,
577 &skb_shinfo(skb)->frags[frag_idx],
578 tx_data_bd);
579 if (rc) {
580 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
581 data_split);
582 return NETDEV_TX_OK;
583 }
584 }
585
586 /* update the first BD with the actual num BDs */
587 first_bd->data.nbds = nbd;
588
589 netdev_tx_sent_queue(netdev_txq, skb->len);
590
591 skb_tx_timestamp(skb);
592
593 /* Advance packet producer only before sending the packet since mapping
594 * of pages may fail.
595 */
596 txq->sw_tx_prod++;
597
598 /* 'next page' entries are counted in the producer value */
599 txq->tx_db.data.bd_prod =
600 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
601
602 /* wmb makes sure that the BDs data is updated before updating the
603 * producer, otherwise FW may read old data from the BDs.
604 */
605 wmb();
606 barrier();
607 writel(txq->tx_db.raw, txq->doorbell_addr);
608
609 /* mmiowb is needed to synchronize doorbell writes from more than one
610 * processor. It guarantees that the write arrives to the device before
611 * the queue lock is released and another start_xmit is called (possibly
612 * on another CPU). Without this barrier, the next doorbell can bypass
613 * this doorbell. This is applicable to IA64/Altix systems.
614 */
615 mmiowb();
616
617 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
618 < (MAX_SKB_FRAGS + 1))) {
619 netif_tx_stop_queue(netdev_txq);
620 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
621 "Stop queue was called\n");
622 /* paired memory barrier is in qede_tx_int(), we have to keep
623 * ordering of set_bit() in netif_tx_stop_queue() and read of
624 * fp->bd_tx_cons
625 */
626 smp_mb();
627
628 if (qed_chain_get_elem_left(&txq->tx_pbl)
629 >= (MAX_SKB_FRAGS + 1) &&
630 (edev->state == QEDE_STATE_OPEN)) {
631 netif_tx_wake_queue(netdev_txq);
632 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
633 "Wake queue was called\n");
634 }
635 }
636
637 return NETDEV_TX_OK;
638}
639
640static int qede_txq_has_work(struct qede_tx_queue *txq)
641{
642 u16 hw_bd_cons;
643
644 /* Tell compiler that consumer and producer can change */
645 barrier();
646 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
647 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
648 return 0;
649
650 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
651}
652
653static int qede_tx_int(struct qede_dev *edev,
654 struct qede_tx_queue *txq)
655{
656 struct netdev_queue *netdev_txq;
657 u16 hw_bd_cons;
658 unsigned int pkts_compl = 0, bytes_compl = 0;
659 int rc;
660
661 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
662
663 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
664 barrier();
665
666 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
667 int len = 0;
668
669 rc = qede_free_tx_pkt(edev, txq, &len);
670 if (rc) {
671 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
672 hw_bd_cons,
673 qed_chain_get_cons_idx(&txq->tx_pbl));
674 break;
675 }
676
677 bytes_compl += len;
678 pkts_compl++;
679 txq->sw_tx_cons++;
680 }
681
682 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
683
684 /* Need to make the tx_bd_cons update visible to start_xmit()
685 * before checking for netif_tx_queue_stopped(). Without the
686 * memory barrier, there is a small possibility that
687 * start_xmit() will miss it and cause the queue to be stopped
688 * forever.
689 * On the other hand we need an rmb() here to ensure the proper
690 * ordering of bit testing in the following
691 * netif_tx_queue_stopped(txq) call.
692 */
693 smp_mb();
694
695 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
696 /* Taking tx_lock is needed to prevent reenabling the queue
697 * while it's empty. This could have happen if rx_action() gets
698 * suspended in qede_tx_int() after the condition before
699 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
700 *
701 * stops the queue->sees fresh tx_bd_cons->releases the queue->
702 * sends some packets consuming the whole queue again->
703 * stops the queue
704 */
705
706 __netif_tx_lock(netdev_txq, smp_processor_id());
707
708 if ((netif_tx_queue_stopped(netdev_txq)) &&
709 (edev->state == QEDE_STATE_OPEN) &&
710 (qed_chain_get_elem_left(&txq->tx_pbl)
711 >= (MAX_SKB_FRAGS + 1))) {
712 netif_tx_wake_queue(netdev_txq);
713 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
714 "Wake queue was called\n");
715 }
716
717 __netif_tx_unlock(netdev_txq);
718 }
719
720 return 0;
721}
722
723static bool qede_has_rx_work(struct qede_rx_queue *rxq)
724{
725 u16 hw_comp_cons, sw_comp_cons;
726
727 /* Tell compiler that status block fields can change */
728 barrier();
729
730 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
731 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
732
733 return hw_comp_cons != sw_comp_cons;
734}
735
736static bool qede_has_tx_work(struct qede_fastpath *fp)
737{
738 u8 tc;
739
740 for (tc = 0; tc < fp->edev->num_tc; tc++)
741 if (qede_txq_has_work(&fp->txqs[tc]))
742 return true;
743 return false;
744}
745
fc48b7a6
YM		 746/* This function reuses the buffer(from an offset) from
747 * consumer index to producer index in the bd ring
2950219d 748 */
fc48b7a6
YM		 749static inline void qede_reuse_page(struct qede_dev *edev,
750 struct qede_rx_queue *rxq,
751 struct sw_rx_data *curr_cons)
2950219d 752{
2950219d 753 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 754 struct sw_rx_data *curr_prod;
755 dma_addr_t new_mapping;
2950219d 756
fc48b7a6
YM		 757 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
758 *curr_prod = *curr_cons;
2950219d 759
fc48b7a6
YM		 760 new_mapping = curr_prod->mapping + curr_prod->page_offset;
761
762 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
763 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 764
2950219d 765 rxq->sw_rx_prod++;
fc48b7a6
YM		 766 curr_cons->data = NULL;
767}
768
769static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
770 struct qede_rx_queue *rxq,
771 struct sw_rx_data *curr_cons)
772{
773 /* Move to the next segment in the page */
774 curr_cons->page_offset += rxq->rx_buf_seg_size;
775
776 if (curr_cons->page_offset == PAGE_SIZE) {
777 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
778 return -ENOMEM;
779
780 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
781 PAGE_SIZE, DMA_FROM_DEVICE);
782 } else {
783 /* Increment refcount of the page as we don't want
784 * network stack to take the ownership of the page
785 * which can be recycled multiple times by the driver.
786 */
787 atomic_inc(&curr_cons->data->_count);
788 qede_reuse_page(edev, rxq, curr_cons);
789 }
790
791 return 0;
2950219d
YM		 792}
793
794static inline void qede_update_rx_prod(struct qede_dev *edev,
795 struct qede_rx_queue *rxq)
796{
797 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
798 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
799 struct eth_rx_prod_data rx_prods = {0};
800
801 /* Update producers */
802 rx_prods.bd_prod = cpu_to_le16(bd_prod);
803 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
804
805 /* Make sure that the BD and SGE data is updated before updating the
806 * producers since FW might read the BD/SGE right after the producer
807 * is updated.
808 */
809 wmb();
810
811 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
812 (u32 *)&rx_prods);
813
814 /* mmiowb is needed to synchronize doorbell writes from more than one
815 * processor. It guarantees that the write arrives to the device before
816 * the napi lock is released and another qede_poll is called (possibly
817 * on another CPU). Without this barrier, the next doorbell can bypass
818 * this doorbell. This is applicable to IA64/Altix systems.
819 */
820 mmiowb();
821}
822
823static u32 qede_get_rxhash(struct qede_dev *edev,
824 u8 bitfields,
825 __le32 rss_hash,
826 enum pkt_hash_types *rxhash_type)
827{
828 enum rss_hash_type htype;
829
830 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
831
832 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
833 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
834 (htype == RSS_HASH_TYPE_IPV6)) ?
835 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
836 return le32_to_cpu(rss_hash);
837 }
838 *rxhash_type = PKT_HASH_TYPE_NONE;
839 return 0;
840}
841
842static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
843{
844 skb_checksum_none_assert(skb);
845
846 if (csum_flag & QEDE_CSUM_UNNECESSARY)
847 skb->ip_summed = CHECKSUM_UNNECESSARY;
848}
849
850static inline void qede_skb_receive(struct qede_dev *edev,
851 struct qede_fastpath *fp,
852 struct sk_buff *skb,
853 u16 vlan_tag)
854{
855 if (vlan_tag)
856 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
857 vlan_tag);
858
859 napi_gro_receive(&fp->napi, skb);
860}
861
55482edc
MC		 862static void qede_set_gro_params(struct qede_dev *edev,
863 struct sk_buff *skb,
864 struct eth_fast_path_rx_tpa_start_cqe *cqe)
865{
866 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
867
868 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
869 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
870 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
871 else
872 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
873
874 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
875 cqe->header_len;
876}
877
878static int qede_fill_frag_skb(struct qede_dev *edev,
879 struct qede_rx_queue *rxq,
880 u8 tpa_agg_index,
881 u16 len_on_bd)
882{
883 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
884 NUM_RX_BDS_MAX];
885 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
886 struct sk_buff *skb = tpa_info->skb;
887
888 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
889 goto out;
890
891 /* Add one frag and update the appropriate fields in the skb */
892 skb_fill_page_desc(skb, tpa_info->frag_id++,
893 current_bd->data, current_bd->page_offset,
894 len_on_bd);
895
896 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
897 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
898 goto out;
899 }
900
901 qed_chain_consume(&rxq->rx_bd_ring);
902 rxq->sw_rx_cons++;
903
904 skb->data_len += len_on_bd;
905 skb->truesize += rxq->rx_buf_seg_size;
906 skb->len += len_on_bd;
907
908 return 0;
909
910out:
911 return -ENOMEM;
912}
913
914static void qede_tpa_start(struct qede_dev *edev,
915 struct qede_rx_queue *rxq,
916 struct eth_fast_path_rx_tpa_start_cqe *cqe)
917{
918 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
919 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
920 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
921 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
922 dma_addr_t mapping = tpa_info->replace_buf_mapping;
923 struct sw_rx_data *sw_rx_data_cons;
924 struct sw_rx_data *sw_rx_data_prod;
925 enum pkt_hash_types rxhash_type;
926 u32 rxhash;
927
928 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
929 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
930
931 /* Use pre-allocated replacement buffer - we can't release the agg.
932 * start until its over and we don't want to risk allocation failing
933 * here, so re-allocate when aggregation will be over.
934 */
935 dma_unmap_addr_set(sw_rx_data_prod, mapping,
936 dma_unmap_addr(replace_buf, mapping));
937
938 sw_rx_data_prod->data = replace_buf->data;
939 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
940 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
941 sw_rx_data_prod->page_offset = replace_buf->page_offset;
942
943 rxq->sw_rx_prod++;
944
945 /* move partial skb from cons to pool (don't unmap yet)
946 * save mapping, incase we drop the packet later on.
947 */
948 tpa_info->start_buf = *sw_rx_data_cons;
949 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
950 le32_to_cpu(rx_bd_cons->addr.lo));
951
952 tpa_info->start_buf_mapping = mapping;
953 rxq->sw_rx_cons++;
954
955 /* set tpa state to start only if we are able to allocate skb
956 * for this aggregation, otherwise mark as error and aggregation will
957 * be dropped
958 */
959 tpa_info->skb = netdev_alloc_skb(edev->ndev,
960 le16_to_cpu(cqe->len_on_first_bd));
961 if (unlikely(!tpa_info->skb)) {
962 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
963 return;
964 }
965
966 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
967 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
968
969 /* Start filling in the aggregation info */
970 tpa_info->frag_id = 0;
971 tpa_info->agg_state = QEDE_AGG_STATE_START;
972
973 rxhash = qede_get_rxhash(edev, cqe->bitfields,
974 cqe->rss_hash, &rxhash_type);
975 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
976 if ((le16_to_cpu(cqe->pars_flags.flags) >>
977 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
978 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
979 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
980 else
981 tpa_info->vlan_tag = 0;
982
983 /* This is needed in order to enable forwarding support */
984 qede_set_gro_params(edev, tpa_info->skb, cqe);
985
986 if (likely(cqe->ext_bd_len_list[0]))
987 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
988 le16_to_cpu(cqe->ext_bd_len_list[0]));
989
990 if (unlikely(cqe->ext_bd_len_list[1])) {
991 DP_ERR(edev,
992 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
993 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
994 }
995}
996
88f09bd5 997#ifdef CONFIG_INET
55482edc
MC		 998static void qede_gro_ip_csum(struct sk_buff *skb)
999{
1000 const struct iphdr *iph = ip_hdr(skb);
1001 struct tcphdr *th;
1002
1003 skb_set_network_header(skb, 0);
1004 skb_set_transport_header(skb, sizeof(struct iphdr));
1005 th = tcp_hdr(skb);
1006
1007 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1008 iph->saddr, iph->daddr, 0);
1009
1010 tcp_gro_complete(skb);
1011}
1012
1013static void qede_gro_ipv6_csum(struct sk_buff *skb)
1014{
1015 struct ipv6hdr *iph = ipv6_hdr(skb);
1016 struct tcphdr *th;
1017
1018 skb_set_network_header(skb, 0);
1019 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1020 th = tcp_hdr(skb);
1021
1022 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1023 &iph->saddr, &iph->daddr, 0);
1024 tcp_gro_complete(skb);
1025}
88f09bd5 1026#endif
55482edc
MC		 1027
1028static void qede_gro_receive(struct qede_dev *edev,
1029 struct qede_fastpath *fp,
1030 struct sk_buff *skb,
1031 u16 vlan_tag)
1032{
88f09bd5 1033#ifdef CONFIG_INET
55482edc
MC		 1034 if (skb_shinfo(skb)->gso_size) {
1035 switch (skb->protocol) {
1036 case htons(ETH_P_IP):
1037 qede_gro_ip_csum(skb);
1038 break;
1039 case htons(ETH_P_IPV6):
1040 qede_gro_ipv6_csum(skb);
1041 break;
1042 default:
1043 DP_ERR(edev,
1044 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1045 ntohs(skb->protocol));
1046 }
1047 }
88f09bd5 1048#endif
55482edc
MC		 1049 skb_record_rx_queue(skb, fp->rss_id);
1050 qede_skb_receive(edev, fp, skb, vlan_tag);
1051}
1052
1053static inline void qede_tpa_cont(struct qede_dev *edev,
1054 struct qede_rx_queue *rxq,
1055 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1056{
1057 int i;
1058
1059 for (i = 0; cqe->len_list[i]; i++)
1060 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1061 le16_to_cpu(cqe->len_list[i]));
1062
1063 if (unlikely(i > 1))
1064 DP_ERR(edev,
1065 "Strange - TPA cont with more than a single len_list entry\n");
1066}
1067
1068static void qede_tpa_end(struct qede_dev *edev,
1069 struct qede_fastpath *fp,
1070 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1071{
1072 struct qede_rx_queue *rxq = fp->rxq;
1073 struct qede_agg_info *tpa_info;
1074 struct sk_buff *skb;
1075 int i;
1076
1077 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1078 skb = tpa_info->skb;
1079
1080 for (i = 0; cqe->len_list[i]; i++)
1081 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1082 le16_to_cpu(cqe->len_list[i]));
1083 if (unlikely(i > 1))
1084 DP_ERR(edev,
1085 "Strange - TPA emd with more than a single len_list entry\n");
1086
1087 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1088 goto err;
1089
1090 /* Sanity */
1091 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1092 DP_ERR(edev,
1093 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1094 cqe->num_of_bds, tpa_info->frag_id);
1095 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1096 DP_ERR(edev,
1097 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1098 le16_to_cpu(cqe->total_packet_len), skb->len);
1099
1100 memcpy(skb->data,
1101 page_address(tpa_info->start_buf.data) +
1102 tpa_info->start_cqe.placement_offset +
1103 tpa_info->start_buf.page_offset,
1104 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1105
1106 /* Recycle [mapped] start buffer for the next replacement */
1107 tpa_info->replace_buf = tpa_info->start_buf;
1108 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1109
1110 /* Finalize the SKB */
1111 skb->protocol = eth_type_trans(skb, edev->ndev);
1112 skb->ip_summed = CHECKSUM_UNNECESSARY;
1113
1114 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1115 * to skb_shinfo(skb)->gso_segs
1116 */
1117 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1118
1119 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1120
1121 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1122
1123 return;
1124err:
1125 /* The BD starting the aggregation is still mapped; Re-use it for
1126 * future aggregations [as replacement buffer]
1127 */
1128 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1129 sizeof(struct sw_rx_data));
1130 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1131 tpa_info->start_buf.data = NULL;
1132 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1133 dev_kfree_skb_any(tpa_info->skb);
1134 tpa_info->skb = NULL;
1135}
1136
2950219d
YM		 1137static u8 qede_check_csum(u16 flag)
1138{
1139 u16 csum_flag = 0;
1140 u8 csum = 0;
1141
1142 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1143 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
1144 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1145 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1146 csum = QEDE_CSUM_UNNECESSARY;
1147 }
1148
1149 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1150 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1151
1152 if (csum_flag & flag)
1153 return QEDE_CSUM_ERROR;
1154
1155 return csum;
1156}
1157
1158static int qede_rx_int(struct qede_fastpath *fp, int budget)
1159{
1160 struct qede_dev *edev = fp->edev;
1161 struct qede_rx_queue *rxq = fp->rxq;
1162
1163 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1164 int rx_pkt = 0;
1165 u8 csum_flag;
1166
1167 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1168 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1169
1170 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1171 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1172 * read before it is written by FW, then FW writes CQE and SB, and then
1173 * the CPU reads the hw_comp_cons, it will use an old CQE.
1174 */
1175 rmb();
1176
1177 /* Loop to complete all indicated BDs */
1178 while (sw_comp_cons != hw_comp_cons) {
1179 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1180 enum pkt_hash_types rxhash_type;
1181 enum eth_rx_cqe_type cqe_type;
1182 struct sw_rx_data *sw_rx_data;
1183 union eth_rx_cqe *cqe;
1184 struct sk_buff *skb;
fc48b7a6
YM		 1185 struct page *data;
1186 __le16 flags;
2950219d
YM		 1187 u16 len, pad;
1188 u32 rx_hash;
2950219d
YM		 1189
1190 /* Get the CQE from the completion ring */
1191 cqe = (union eth_rx_cqe *)
1192 qed_chain_consume(&rxq->rx_comp_ring);
1193 cqe_type = cqe->fast_path_regular.type;
1194
1195 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1196 edev->ops->eth_cqe_completion(
1197 edev->cdev, fp->rss_id,
1198 (struct eth_slow_path_rx_cqe *)cqe);
1199 goto next_cqe;
1200 }
1201
55482edc
MC		 1202 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1203 switch (cqe_type) {
1204 case ETH_RX_CQE_TYPE_TPA_START:
1205 qede_tpa_start(edev, rxq,
1206 &cqe->fast_path_tpa_start);
1207 goto next_cqe;
1208 case ETH_RX_CQE_TYPE_TPA_CONT:
1209 qede_tpa_cont(edev, rxq,
1210 &cqe->fast_path_tpa_cont);
1211 goto next_cqe;
1212 case ETH_RX_CQE_TYPE_TPA_END:
1213 qede_tpa_end(edev, fp,
1214 &cqe->fast_path_tpa_end);
1215 goto next_rx_only;
1216 default:
1217 break;
1218 }
1219 }
1220
2950219d
YM		 1221 /* Get the data from the SW ring */
1222 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1223 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1224 data = sw_rx_data->data;
1225
1226 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1227 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1228 pad = fp_cqe->placement_offset;
fc48b7a6 1229 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1230
fc48b7a6
YM		 1231 /* If this is an error packet then drop it */
1232 parse_flag = le16_to_cpu(flags);
2950219d 1233
fc48b7a6
YM		 1234 csum_flag = qede_check_csum(parse_flag);
1235 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1236 DP_NOTICE(edev,
1237 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1238 sw_comp_cons, parse_flag);
1239 rxq->rx_hw_errors++;
1240 qede_reuse_page(edev, rxq, sw_rx_data);
1241 goto next_rx;
1242 }
2950219d 1243
fc48b7a6
YM		 1244 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1245 if (unlikely(!skb)) {
2950219d 1246 DP_NOTICE(edev,
fc48b7a6
YM		 1247 "Build_skb failed, dropping incoming packet\n");
1248 qede_reuse_page(edev, rxq, sw_rx_data);
2950219d 1249 rxq->rx_alloc_errors++;
fc48b7a6
YM		 1250 goto next_rx;
1251 }
1252
1253 /* Copy data into SKB */
1254 if (len + pad <= QEDE_RX_HDR_SIZE) {
1255 memcpy(skb_put(skb, len),
1256 page_address(data) + pad +
1257 sw_rx_data->page_offset, len);
1258 qede_reuse_page(edev, rxq, sw_rx_data);
1259 } else {
1260 struct skb_frag_struct *frag;
1261 unsigned int pull_len;
1262 unsigned char *va;
1263
1264 frag = &skb_shinfo(skb)->frags[0];
1265
1266 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1267 pad + sw_rx_data->page_offset,
1268 len, rxq->rx_buf_seg_size);
1269
1270 va = skb_frag_address(frag);
1271 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1272
1273 /* Align the pull_len to optimize memcpy */
1274 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1275
1276 skb_frag_size_sub(frag, pull_len);
1277 frag->page_offset += pull_len;
1278 skb->data_len -= pull_len;
1279 skb->tail += pull_len;
1280
1281 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1282 sw_rx_data))) {
1283 DP_ERR(edev, "Failed to allocate rx buffer\n");
1284 rxq->rx_alloc_errors++;
1285 goto next_cqe;
1286 }
2950219d
YM		 1287 }
1288
fc48b7a6
YM		 1289 if (fp_cqe->bd_num != 1) {
1290 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1291 u8 num_frags;
1292
1293 pkt_len -= len;
1294
1295 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1296 num_frags--) {
1297 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1298 rxq->rx_buf_size : pkt_len;
1299
1300 WARN_ONCE(!cur_size,
1301 "Still got %d BDs for mapping jumbo, but length became 0\n",
1302 num_frags);
1303
1304 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
1305 goto next_cqe;
1306
1307 rxq->sw_rx_cons++;
1308 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1309 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1310 qed_chain_consume(&rxq->rx_bd_ring);
1311 dma_unmap_page(&edev->pdev->dev,
1312 sw_rx_data->mapping,
1313 PAGE_SIZE, DMA_FROM_DEVICE);
1314
1315 skb_fill_page_desc(skb,
1316 skb_shinfo(skb)->nr_frags++,
1317 sw_rx_data->data, 0,
1318 cur_size);
1319
1320 skb->truesize += PAGE_SIZE;
1321 skb->data_len += cur_size;
1322 skb->len += cur_size;
1323 pkt_len -= cur_size;
1324 }
2950219d 1325
fc48b7a6
YM		 1326 if (pkt_len)
1327 DP_ERR(edev,
1328 "Mapped all BDs of jumbo, but still have %d bytes\n",
1329 pkt_len);
1330 }
2950219d
YM		 1331
1332 skb->protocol = eth_type_trans(skb, edev->ndev);
1333
1334 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1335 fp_cqe->rss_hash,
1336 &rxhash_type);
1337
1338 skb_set_hash(skb, rx_hash, rxhash_type);
1339
1340 qede_set_skb_csum(skb, csum_flag);
1341
1342 skb_record_rx_queue(skb, fp->rss_id);
1343
1344 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1345
1346 qed_chain_consume(&rxq->rx_bd_ring);
2950219d
YM		 1347next_rx:
1348 rxq->sw_rx_cons++;
55482edc 1349next_rx_only:
2950219d
YM		 1350 rx_pkt++;
1351
1352next_cqe: /* don't consume bd rx buffer */
1353 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1354 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1355 /* CR TPA - revisit how to handle budget in TPA perhaps
1356 * increase on "end"
1357 */
1358 if (rx_pkt == budget)
1359 break;
1360 } /* repeat while sw_comp_cons != hw_comp_cons... */
1361
1362 /* Update producers */
1363 qede_update_rx_prod(edev, rxq);
1364
1365 return rx_pkt;
1366}
1367
1368static int qede_poll(struct napi_struct *napi, int budget)
1369{
1370 int work_done = 0;
1371 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1372 napi);
1373 struct qede_dev *edev = fp->edev;
1374
1375 while (1) {
1376 u8 tc;
1377
1378 for (tc = 0; tc < edev->num_tc; tc++)
1379 if (qede_txq_has_work(&fp->txqs[tc]))
1380 qede_tx_int(edev, &fp->txqs[tc]);
1381
1382 if (qede_has_rx_work(fp->rxq)) {
1383 work_done += qede_rx_int(fp, budget - work_done);
1384
1385 /* must not complete if we consumed full budget */
1386 if (work_done >= budget)
1387 break;
1388 }
1389
1390 /* Fall out from the NAPI loop if needed */
1391 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1392 qed_sb_update_sb_idx(fp->sb_info);
1393 /* *_has_*_work() reads the status block,
1394 * thus we need to ensure that status block indices
1395 * have been actually read (qed_sb_update_sb_idx)
1396 * prior to this check (*_has_*_work) so that
1397 * we won't write the "newer" value of the status block
1398 * to HW (if there was a DMA right after
1399 * qede_has_rx_work and if there is no rmb, the memory
1400 * reading (qed_sb_update_sb_idx) may be postponed
1401 * to right before *_ack_sb). In this case there
1402 * will never be another interrupt until there is
1403 * another update of the status block, while there
1404 * is still unhandled work.
1405 */
1406 rmb();
1407
1408 if (!(qede_has_rx_work(fp->rxq) ||
1409 qede_has_tx_work(fp))) {
1410 napi_complete(napi);
1411 /* Update and reenable interrupts */
1412 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1413 1 /*update*/);
1414 break;
1415 }
1416 }
1417 }
1418
1419 return work_done;
1420}
1421
1422static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1423{
1424 struct qede_fastpath *fp = fp_cookie;
1425
1426 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1427
1428 napi_schedule_irqoff(&fp->napi);
1429 return IRQ_HANDLED;
1430}
1431
1432/* -------------------------------------------------------------------------
1433 * END OF FAST-PATH
1434 * -------------------------------------------------------------------------
1435 */
1436
1437static int qede_open(struct net_device *ndev);
1438static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1439static int qede_set_mac_addr(struct net_device *ndev, void *p);
1440static void qede_set_rx_mode(struct net_device *ndev);
1441static void qede_config_rx_mode(struct net_device *ndev);
1442
1443static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1444 enum qed_filter_xcast_params_type opcode,
1445 unsigned char mac[ETH_ALEN])
1446{
1447 struct qed_filter_params filter_cmd;
1448
1449 memset(&filter_cmd, 0, sizeof(filter_cmd));
1450 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1451 filter_cmd.filter.ucast.type = opcode;
1452 filter_cmd.filter.ucast.mac_valid = 1;
1453 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1454
1455 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1456}
1457
7c1bfcad
SRK		 1458static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1459 enum qed_filter_xcast_params_type opcode,
1460 u16 vid)
1461{
1462 struct qed_filter_params filter_cmd;
1463
1464 memset(&filter_cmd, 0, sizeof(filter_cmd));
1465 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1466 filter_cmd.filter.ucast.type = opcode;
1467 filter_cmd.filter.ucast.vlan_valid = 1;
1468 filter_cmd.filter.ucast.vlan = vid;
1469
1470 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1471}
1472
133fac0e
SK		 1473void qede_fill_by_demand_stats(struct qede_dev *edev)
1474{
1475 struct qed_eth_stats stats;
1476
1477 edev->ops->get_vport_stats(edev->cdev, &stats);
1478 edev->stats.no_buff_discards = stats.no_buff_discards;
1479 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1480 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1481 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1482 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1483 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1484 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1485 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1486 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1487
1488 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1489 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1490 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1491 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1492 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1493 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1494 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1495 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1496 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1497 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1498 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1499 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1500
1501 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1502 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1503 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1504 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1505 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1506 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1507 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1508 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1509 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1510 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1511 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1512 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1513 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1514 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1515 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1516 edev->stats.rx_align_errors = stats.rx_align_errors;
1517 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1518 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1519 edev->stats.rx_jabbers = stats.rx_jabbers;
1520 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1521 edev->stats.rx_fragments = stats.rx_fragments;
1522 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1523 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1524 edev->stats.tx_128_to_255_byte_packets =
1525 stats.tx_128_to_255_byte_packets;
1526 edev->stats.tx_256_to_511_byte_packets =
1527 stats.tx_256_to_511_byte_packets;
1528 edev->stats.tx_512_to_1023_byte_packets =
1529 stats.tx_512_to_1023_byte_packets;
1530 edev->stats.tx_1024_to_1518_byte_packets =
1531 stats.tx_1024_to_1518_byte_packets;
1532 edev->stats.tx_1519_to_2047_byte_packets =
1533 stats.tx_1519_to_2047_byte_packets;
1534 edev->stats.tx_2048_to_4095_byte_packets =
1535 stats.tx_2048_to_4095_byte_packets;
1536 edev->stats.tx_4096_to_9216_byte_packets =
1537 stats.tx_4096_to_9216_byte_packets;
1538 edev->stats.tx_9217_to_16383_byte_packets =
1539 stats.tx_9217_to_16383_byte_packets;
1540 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1541 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1542 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1543 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1544 edev->stats.brb_truncates = stats.brb_truncates;
1545 edev->stats.brb_discards = stats.brb_discards;
1546 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1547}
1548
1549static struct rtnl_link_stats64 *qede_get_stats64(
1550 struct net_device *dev,
1551 struct rtnl_link_stats64 *stats)
1552{
1553 struct qede_dev *edev = netdev_priv(dev);
1554
1555 qede_fill_by_demand_stats(edev);
1556
1557 stats->rx_packets = edev->stats.rx_ucast_pkts +
1558 edev->stats.rx_mcast_pkts +
1559 edev->stats.rx_bcast_pkts;
1560 stats->tx_packets = edev->stats.tx_ucast_pkts +
1561 edev->stats.tx_mcast_pkts +
1562 edev->stats.tx_bcast_pkts;
1563
1564 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1565 edev->stats.rx_mcast_bytes +
1566 edev->stats.rx_bcast_bytes;
1567
1568 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1569 edev->stats.tx_mcast_bytes +
1570 edev->stats.tx_bcast_bytes;
1571
1572 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1573 stats->multicast = edev->stats.rx_mcast_pkts +
1574 edev->stats.rx_bcast_pkts;
1575
1576 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1577
1578 stats->collisions = edev->stats.tx_total_collisions;
1579 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1580 stats->rx_frame_errors = edev->stats.rx_align_errors;
1581
1582 return stats;
1583}
1584
7c1bfcad
SRK		 1585static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1586{
1587 struct qed_update_vport_params params;
1588 int rc;
1589
1590 /* Proceed only if action actually needs to be performed */
1591 if (edev->accept_any_vlan == action)
1592 return;
1593
1594 memset(&params, 0, sizeof(params));
1595
1596 params.vport_id = 0;
1597 params.accept_any_vlan = action;
1598 params.update_accept_any_vlan_flg = 1;
1599
1600 rc = edev->ops->vport_update(edev->cdev, &params);
1601 if (rc) {
1602 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1603 action ? "enable" : "disable");
1604 } else {
1605 DP_INFO(edev, "%s accept-any-vlan\n",
1606 action ? "enabled" : "disabled");
1607 edev->accept_any_vlan = action;
1608 }
1609}
1610
1611static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1612{
1613 struct qede_dev *edev = netdev_priv(dev);
1614 struct qede_vlan *vlan, *tmp;
1615 int rc;
1616
1617 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1618
1619 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1620 if (!vlan) {
1621 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1622 return -ENOMEM;
1623 }
1624 INIT_LIST_HEAD(&vlan->list);
1625 vlan->vid = vid;
1626 vlan->configured = false;
1627
1628 /* Verify vlan isn't already configured */
1629 list_for_each_entry(tmp, &edev->vlan_list, list) {
1630 if (tmp->vid == vlan->vid) {
1631 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1632 "vlan already configured\n");
1633 kfree(vlan);
1634 return -EEXIST;
1635 }
1636 }
1637
1638 /* If interface is down, cache this VLAN ID and return */
1639 if (edev->state != QEDE_STATE_OPEN) {
1640 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1641 "Interface is down, VLAN %d will be configured when interface is up\n",
1642 vid);
1643 if (vid != 0)
1644 edev->non_configured_vlans++;
1645 list_add(&vlan->list, &edev->vlan_list);
1646
1647 return 0;
1648 }
1649
1650 /* Check for the filter limit.
1651 * Note - vlan0 has a reserved filter and can be added without
1652 * worrying about quota
1653 */
1654 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1655 (vlan->vid == 0)) {
1656 rc = qede_set_ucast_rx_vlan(edev,
1657 QED_FILTER_XCAST_TYPE_ADD,
1658 vlan->vid);
1659 if (rc) {
1660 DP_ERR(edev, "Failed to configure VLAN %d\n",
1661 vlan->vid);
1662 kfree(vlan);
1663 return -EINVAL;
1664 }
1665 vlan->configured = true;
1666
1667 /* vlan0 filter isn't consuming out of our quota */
1668 if (vlan->vid != 0)
1669 edev->configured_vlans++;
1670 } else {
1671 /* Out of quota; Activate accept-any-VLAN mode */
1672 if (!edev->non_configured_vlans)
1673 qede_config_accept_any_vlan(edev, true);
1674
1675 edev->non_configured_vlans++;
1676 }
1677
1678 list_add(&vlan->list, &edev->vlan_list);
1679
1680 return 0;
1681}
1682
1683static void qede_del_vlan_from_list(struct qede_dev *edev,
1684 struct qede_vlan *vlan)
1685{
1686 /* vlan0 filter isn't consuming out of our quota */
1687 if (vlan->vid != 0) {
1688 if (vlan->configured)
1689 edev->configured_vlans--;
1690 else
1691 edev->non_configured_vlans--;
1692 }
1693
1694 list_del(&vlan->list);
1695 kfree(vlan);
1696}
1697
1698static int qede_configure_vlan_filters(struct qede_dev *edev)
1699{
1700 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1701 struct qed_dev_eth_info *dev_info;
1702 struct qede_vlan *vlan = NULL;
1703
1704 if (list_empty(&edev->vlan_list))
1705 return 0;
1706
1707 dev_info = &edev->dev_info;
1708
1709 /* Configure non-configured vlans */
1710 list_for_each_entry(vlan, &edev->vlan_list, list) {
1711 if (vlan->configured)
1712 continue;
1713
1714 /* We have used all our credits, now enable accept_any_vlan */
1715 if ((vlan->vid != 0) &&
1716 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1717 accept_any_vlan = 1;
1718 continue;
1719 }
1720
1721 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1722
1723 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1724 vlan->vid);
1725 if (rc) {
1726 DP_ERR(edev, "Failed to configure VLAN %u\n",
1727 vlan->vid);
1728 real_rc = rc;
1729 continue;
1730 }
1731
1732 vlan->configured = true;
1733 /* vlan0 filter doesn't consume our VLAN filter's quota */
1734 if (vlan->vid != 0) {
1735 edev->non_configured_vlans--;
1736 edev->configured_vlans++;
1737 }
1738 }
1739
1740 /* enable accept_any_vlan mode if we have more VLANs than credits,
1741 * or remove accept_any_vlan mode if we've actually removed
1742 * a non-configured vlan, and all remaining vlans are truly configured.
1743 */
1744
1745 if (accept_any_vlan)
1746 qede_config_accept_any_vlan(edev, true);
1747 else if (!edev->non_configured_vlans)
1748 qede_config_accept_any_vlan(edev, false);
1749
1750 return real_rc;
1751}
1752
1753static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1754{
1755 struct qede_dev *edev = netdev_priv(dev);
1756 struct qede_vlan *vlan = NULL;
1757 int rc;
1758
1759 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1760
1761 /* Find whether entry exists */
1762 list_for_each_entry(vlan, &edev->vlan_list, list)
1763 if (vlan->vid == vid)
1764 break;
1765
1766 if (!vlan || (vlan->vid != vid)) {
1767 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1768 "Vlan isn't configured\n");
1769 return 0;
1770 }
1771
1772 if (edev->state != QEDE_STATE_OPEN) {
1773 /* As interface is already down, we don't have a VPORT
1774 * instance to remove vlan filter. So just update vlan list
1775 */
1776 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1777 "Interface is down, removing VLAN from list only\n");
1778 qede_del_vlan_from_list(edev, vlan);
1779 return 0;
1780 }
1781
1782 /* Remove vlan */
1783 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1784 if (rc) {
1785 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1786 return -EINVAL;
1787 }
1788
1789 qede_del_vlan_from_list(edev, vlan);
1790
1791 /* We have removed a VLAN - try to see if we can
1792 * configure non-configured VLAN from the list.
1793 */
1794 rc = qede_configure_vlan_filters(edev);
1795
1796 return rc;
1797}
1798
1799static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1800{
1801 struct qede_vlan *vlan = NULL;
1802
1803 if (list_empty(&edev->vlan_list))
1804 return;
1805
1806 list_for_each_entry(vlan, &edev->vlan_list, list) {
1807 if (!vlan->configured)
1808 continue;
1809
1810 vlan->configured = false;
1811
1812 /* vlan0 filter isn't consuming out of our quota */
1813 if (vlan->vid != 0) {
1814 edev->non_configured_vlans++;
1815 edev->configured_vlans--;
1816 }
1817
1818 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1819 "marked vlan %d as non-configured\n",
1820 vlan->vid);
1821 }
1822
1823 edev->accept_any_vlan = false;
1824}
1825
b18e170c
MC		 1826#ifdef CONFIG_QEDE_VXLAN
1827static void qede_add_vxlan_port(struct net_device *dev,
1828 sa_family_t sa_family, __be16 port)
1829{
1830 struct qede_dev *edev = netdev_priv(dev);
1831 u16 t_port = ntohs(port);
1832
1833 if (edev->vxlan_dst_port)
1834 return;
1835
1836 edev->vxlan_dst_port = t_port;
1837
1838 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
1839
1840 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
1841 schedule_delayed_work(&edev->sp_task, 0);
1842}
1843
1844static void qede_del_vxlan_port(struct net_device *dev,
1845 sa_family_t sa_family, __be16 port)
1846{
1847 struct qede_dev *edev = netdev_priv(dev);
1848 u16 t_port = ntohs(port);
1849
1850 if (t_port != edev->vxlan_dst_port)
1851 return;
1852
1853 edev->vxlan_dst_port = 0;
1854
1855 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
1856
1857 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
1858 schedule_delayed_work(&edev->sp_task, 0);
1859}
1860#endif
1861
2950219d
YM		 1862static const struct net_device_ops qede_netdev_ops = {
1863 .ndo_open = qede_open,
1864 .ndo_stop = qede_close,
1865 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1866 .ndo_set_rx_mode = qede_set_rx_mode,
1867 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1868 .ndo_validate_addr = eth_validate_addr,
133fac0e 1869 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 1870 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1871 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 1872 .ndo_get_stats64 = qede_get_stats64,
b18e170c
MC		 1873#ifdef CONFIG_QEDE_VXLAN
1874 .ndo_add_vxlan_port = qede_add_vxlan_port,
1875 .ndo_del_vxlan_port = qede_del_vxlan_port,
1876#endif
2950219d
YM		 1877};
1878
e712d52b
YM		 1879/* -------------------------------------------------------------------------
1880 * START OF PROBE / REMOVE
1881 * -------------------------------------------------------------------------
1882 */
1883
1884static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1885 struct pci_dev *pdev,
1886 struct qed_dev_eth_info *info,
1887 u32 dp_module,
1888 u8 dp_level)
1889{
1890 struct net_device *ndev;
1891 struct qede_dev *edev;
1892
1893 ndev = alloc_etherdev_mqs(sizeof(*edev),
1894 info->num_queues,
1895 info->num_queues);
1896 if (!ndev) {
1897 pr_err("etherdev allocation failed\n");
1898 return NULL;
1899 }
1900
1901 edev = netdev_priv(ndev);
1902 edev->ndev = ndev;
1903 edev->cdev = cdev;
1904 edev->pdev = pdev;
1905 edev->dp_module = dp_module;
1906 edev->dp_level = dp_level;
1907 edev->ops = qed_ops;
2950219d
YM		 1908 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1909 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1910
1911 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1912
1913 SET_NETDEV_DEV(ndev, &pdev->dev);
1914
133fac0e 1915 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1916 memcpy(&edev->dev_info, info, sizeof(*info));
1917
1918 edev->num_tc = edev->dev_info.num_tc;
1919
7c1bfcad
SRK		 1920 INIT_LIST_HEAD(&edev->vlan_list);
1921
e712d52b
YM		 1922 return edev;
1923}
1924
1925static void qede_init_ndev(struct qede_dev *edev)
1926{
1927 struct net_device *ndev = edev->ndev;
1928 struct pci_dev *pdev = edev->pdev;
1929 u32 hw_features;
1930
1931 pci_set_drvdata(pdev, ndev);
1932
1933 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1934 ndev->base_addr = ndev->mem_start;
1935 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1936 ndev->irq = edev->dev_info.common.pci_irq;
1937
1938 ndev->watchdog_timeo = TX_TIMEOUT;
1939
2950219d
YM		 1940 ndev->netdev_ops = &qede_netdev_ops;
1941
133fac0e
SK		 1942 qede_set_ethtool_ops(ndev);
1943
e712d52b
YM		 1944 /* user-changeble features */
1945 hw_features = NETIF_F_GRO | NETIF_F_SG |
1946 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1947 NETIF_F_TSO | NETIF_F_TSO6;
1948
1949 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1950 NETIF_F_HIGHDMA;
1951 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1952 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 1953 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 1954
1955 ndev->hw_features = hw_features;
1956
1957 /* Set network device HW mac */
1958 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1959}
1960
1961/* This function converts from 32b param to two params of level and module
1962 * Input 32b decoding:
1963 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1964 * 'happy' flow, e.g. memory allocation failed.
1965 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1966 * and provide important parameters.
1967 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1968 * module. VERBOSE prints are for tracking the specific flow in low level.
1969 *
1970 * Notice that the level should be that of the lowest required logs.
1971 */
133fac0e 1972void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 1973{
1974 *p_dp_level = QED_LEVEL_NOTICE;
1975 *p_dp_module = 0;
1976
1977 if (debug & QED_LOG_VERBOSE_MASK) {
1978 *p_dp_level = QED_LEVEL_VERBOSE;
1979 *p_dp_module = (debug & 0x3FFFFFFF);
1980 } else if (debug & QED_LOG_INFO_MASK) {
1981 *p_dp_level = QED_LEVEL_INFO;
1982 } else if (debug & QED_LOG_NOTICE_MASK) {
1983 *p_dp_level = QED_LEVEL_NOTICE;
1984 }
1985}
1986
2950219d
YM		 1987static void qede_free_fp_array(struct qede_dev *edev)
1988{
1989 if (edev->fp_array) {
1990 struct qede_fastpath *fp;
1991 int i;
1992
1993 for_each_rss(i) {
1994 fp = &edev->fp_array[i];
1995
1996 kfree(fp->sb_info);
1997 kfree(fp->rxq);
1998 kfree(fp->txqs);
1999 }
2000 kfree(edev->fp_array);
2001 }
2002 edev->num_rss = 0;
2003}
2004
2005static int qede_alloc_fp_array(struct qede_dev *edev)
2006{
2007 struct qede_fastpath *fp;
2008 int i;
2009
2010 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2011 sizeof(*edev->fp_array), GFP_KERNEL);
2012 if (!edev->fp_array) {
2013 DP_NOTICE(edev, "fp array allocation failed\n");
2014 goto err;
2015 }
2016
2017 for_each_rss(i) {
2018 fp = &edev->fp_array[i];
2019
2020 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2021 if (!fp->sb_info) {
2022 DP_NOTICE(edev, "sb info struct allocation failed\n");
2023 goto err;
2024 }
2025
2026 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2027 if (!fp->rxq) {
2028 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2029 goto err;
2030 }
2031
2032 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2033 if (!fp->txqs) {
2034 DP_NOTICE(edev, "TXQ array allocation failed\n");
2035 goto err;
2036 }
2037 }
2038
2039 return 0;
2040err:
2041 qede_free_fp_array(edev);
2042 return -ENOMEM;
2043}
2044
0d8e0aa0
SK		 2045static void qede_sp_task(struct work_struct *work)
2046{
2047 struct qede_dev *edev = container_of(work, struct qede_dev,
2048 sp_task.work);
b18e170c
MC		 2049 struct qed_dev *cdev = edev->cdev;
2050
0d8e0aa0
SK		 2051 mutex_lock(&edev->qede_lock);
2052
2053 if (edev->state == QEDE_STATE_OPEN) {
2054 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2055 qede_config_rx_mode(edev->ndev);
2056 }
2057
b18e170c
MC		 2058 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2059 struct qed_tunn_params tunn_params;
2060
2061 memset(&tunn_params, 0, sizeof(tunn_params));
2062 tunn_params.update_vxlan_port = 1;
2063 tunn_params.vxlan_port = edev->vxlan_dst_port;
2064 qed_ops->tunn_config(cdev, &tunn_params);
2065 }
2066
0d8e0aa0
SK		 2067 mutex_unlock(&edev->qede_lock);
2068}
2069
e712d52b
YM		 2070static void qede_update_pf_params(struct qed_dev *cdev)
2071{
2072 struct qed_pf_params pf_params;
2073
2074 /* 16 rx + 16 tx */
2075 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2076 pf_params.eth_pf_params.num_cons = 32;
2077 qed_ops->common->update_pf_params(cdev, &pf_params);
2078}
2079
2080enum qede_probe_mode {
2081 QEDE_PROBE_NORMAL,
2082};
2083
2084static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2085 enum qede_probe_mode mode)
2086{
2087 struct qed_slowpath_params params;
2088 struct qed_dev_eth_info dev_info;
2089 struct qede_dev *edev;
2090 struct qed_dev *cdev;
2091 int rc;
2092
2093 if (unlikely(dp_level & QED_LEVEL_INFO))
2094 pr_notice("Starting qede probe\n");
2095
2096 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2097 dp_module, dp_level);
2098 if (!cdev) {
2099 rc = -ENODEV;
2100 goto err0;
2101 }
2102
2103 qede_update_pf_params(cdev);
2104
2105 /* Start the Slowpath-process */
2106 memset(&params, 0, sizeof(struct qed_slowpath_params));
2107 params.int_mode = QED_INT_MODE_MSIX;
2108 params.drv_major = QEDE_MAJOR_VERSION;
2109 params.drv_minor = QEDE_MINOR_VERSION;
2110 params.drv_rev = QEDE_REVISION_VERSION;
2111 params.drv_eng = QEDE_ENGINEERING_VERSION;
2112 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2113 rc = qed_ops->common->slowpath_start(cdev, &params);
2114 if (rc) {
2115 pr_notice("Cannot start slowpath\n");
2116 goto err1;
2117 }
2118
2119 /* Learn information crucial for qede to progress */
2120 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2121 if (rc)
2122 goto err2;
2123
2124 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2125 dp_level);
2126 if (!edev) {
2127 rc = -ENOMEM;
2128 goto err2;
2129 }
2130
2131 qede_init_ndev(edev);
2132
2950219d
YM		 2133 rc = register_netdev(edev->ndev);
2134 if (rc) {
2135 DP_NOTICE(edev, "Cannot register net-device\n");
2136 goto err3;
2137 }
2138
e712d52b
YM		 2139 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2140
a2ec6172
SK		 2141 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2142
0d8e0aa0
SK		 2143 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2144 mutex_init(&edev->qede_lock);
2145
e712d52b
YM		 2146 DP_INFO(edev, "Ending successfully qede probe\n");
2147
2148 return 0;
2149
2950219d
YM		 2150err3:
2151 free_netdev(edev->ndev);
e712d52b
YM		 2152err2:
2153 qed_ops->common->slowpath_stop(cdev);
2154err1:
2155 qed_ops->common->remove(cdev);
2156err0:
2157 return rc;
2158}
2159
2160static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2161{
2162 u32 dp_module = 0;
2163 u8 dp_level = 0;
2164
2165 qede_config_debug(debug, &dp_module, &dp_level);
2166
2167 return __qede_probe(pdev, dp_module, dp_level,
2168 QEDE_PROBE_NORMAL);
2169}
2170
2171enum qede_remove_mode {
2172 QEDE_REMOVE_NORMAL,
2173};
2174
2175static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2176{
2177 struct net_device *ndev = pci_get_drvdata(pdev);
2178 struct qede_dev *edev = netdev_priv(ndev);
2179 struct qed_dev *cdev = edev->cdev;
2180
2181 DP_INFO(edev, "Starting qede_remove\n");
2182
0d8e0aa0 2183 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2184 unregister_netdev(ndev);
2185
e712d52b
YM		 2186 edev->ops->common->set_power_state(cdev, PCI_D0);
2187
2188 pci_set_drvdata(pdev, NULL);
2189
2190 free_netdev(ndev);
2191
2192 /* Use global ops since we've freed edev */
2193 qed_ops->common->slowpath_stop(cdev);
2194 qed_ops->common->remove(cdev);
2195
2196 pr_notice("Ending successfully qede_remove\n");
2197}
2198
2199static void qede_remove(struct pci_dev *pdev)
2200{
2201 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2202}
2950219d
YM		 2203
2204/* -------------------------------------------------------------------------
2205 * START OF LOAD / UNLOAD
2206 * -------------------------------------------------------------------------
2207 */
2208
2209static int qede_set_num_queues(struct qede_dev *edev)
2210{
2211 int rc;
2212 u16 rss_num;
2213
2214 /* Setup queues according to possible resources*/
8edf049d
SK		 2215 if (edev->req_rss)
2216 rss_num = edev->req_rss;
2217 else
2218 rss_num = netif_get_num_default_rss_queues() *
2219 edev->dev_info.common.num_hwfns;
2950219d
YM		 2220
2221 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2222
2223 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2224 if (rc > 0) {
2225 /* Managed to request interrupts for our queues */
2226 edev->num_rss = rc;
2227 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2228 QEDE_RSS_CNT(edev), rss_num);
2229 rc = 0;
2230 }
2231 return rc;
2232}
2233
2234static void qede_free_mem_sb(struct qede_dev *edev,
2235 struct qed_sb_info *sb_info)
2236{
2237 if (sb_info->sb_virt)
2238 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2239 (void *)sb_info->sb_virt, sb_info->sb_phys);
2240}
2241
2242/* This function allocates fast-path status block memory */
2243static int qede_alloc_mem_sb(struct qede_dev *edev,
2244 struct qed_sb_info *sb_info,
2245 u16 sb_id)
2246{
2247 struct status_block *sb_virt;
2248 dma_addr_t sb_phys;
2249 int rc;
2250
2251 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2252 sizeof(*sb_virt),
2253 &sb_phys, GFP_KERNEL);
2254 if (!sb_virt) {
2255 DP_ERR(edev, "Status block allocation failed\n");
2256 return -ENOMEM;
2257 }
2258
2259 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2260 sb_virt, sb_phys, sb_id,
2261 QED_SB_TYPE_L2_QUEUE);
2262 if (rc) {
2263 DP_ERR(edev, "Status block initialization failed\n");
2264 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2265 sb_virt, sb_phys);
2266 return rc;
2267 }
2268
2269 return 0;
2270}
2271
2272static void qede_free_rx_buffers(struct qede_dev *edev,
2273 struct qede_rx_queue *rxq)
2274{
2275 u16 i;
2276
2277 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2278 struct sw_rx_data *rx_buf;
fc48b7a6 2279 struct page *data;
2950219d
YM		 2280
2281 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2282 data = rx_buf->data;
2283
fc48b7a6
YM		 2284 dma_unmap_page(&edev->pdev->dev,
2285 rx_buf->mapping,
2286 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2287
2288 rx_buf->data = NULL;
fc48b7a6 2289 __free_page(data);
2950219d
YM		 2290 }
2291}
2292
55482edc
MC		 2293static void qede_free_sge_mem(struct qede_dev *edev,
2294 struct qede_rx_queue *rxq) {
2295 int i;
2296
2297 if (edev->gro_disable)
2298 return;
2299
2300 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2301 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2302 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2303
2304 if (replace_buf) {
2305 dma_unmap_page(&edev->pdev->dev,
2306 dma_unmap_addr(replace_buf, mapping),
2307 PAGE_SIZE, DMA_FROM_DEVICE);
2308 __free_page(replace_buf->data);
2309 }
2310 }
2311}
2312
2950219d
YM		 2313static void qede_free_mem_rxq(struct qede_dev *edev,
2314 struct qede_rx_queue *rxq)
2315{
55482edc
MC		 2316 qede_free_sge_mem(edev, rxq);
2317
2950219d
YM		 2318 /* Free rx buffers */
2319 qede_free_rx_buffers(edev, rxq);
2320
2321 /* Free the parallel SW ring */
2322 kfree(rxq->sw_rx_ring);
2323
2324 /* Free the real RQ ring used by FW */
2325 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2326 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2327}
2328
2329static int qede_alloc_rx_buffer(struct qede_dev *edev,
2330 struct qede_rx_queue *rxq)
2331{
2332 struct sw_rx_data *sw_rx_data;
2333 struct eth_rx_bd *rx_bd;
2334 dma_addr_t mapping;
fc48b7a6 2335 struct page *data;
2950219d 2336 u16 rx_buf_size;
2950219d
YM		 2337
2338 rx_buf_size = rxq->rx_buf_size;
2339
fc48b7a6 2340 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2341 if (unlikely(!data)) {
fc48b7a6 2342 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2343 return -ENOMEM;
2344 }
2345
fc48b7a6
YM		 2346 /* Map the entire page as it would be used
2347 * for multiple RX buffer segment size mapping.
2348 */
2349 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2350 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2351 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2352 __free_page(data);
2950219d
YM		 2353 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2354 return -ENOMEM;
2355 }
2356
2357 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2358 sw_rx_data->page_offset = 0;
2950219d 2359 sw_rx_data->data = data;
fc48b7a6 2360 sw_rx_data->mapping = mapping;
2950219d
YM		 2361
2362 /* Advance PROD and get BD pointer */
2363 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2364 WARN_ON(!rx_bd);
2365 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2366 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2367
2368 rxq->sw_rx_prod++;
2369
2370 return 0;
2371}
2372
55482edc
MC		 2373static int qede_alloc_sge_mem(struct qede_dev *edev,
2374 struct qede_rx_queue *rxq)
2375{
2376 dma_addr_t mapping;
2377 int i;
2378
2379 if (edev->gro_disable)
2380 return 0;
2381
2382 if (edev->ndev->mtu > PAGE_SIZE) {
2383 edev->gro_disable = 1;
2384 return 0;
2385 }
2386
2387 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2388 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2389 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2390
2391 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2392 if (unlikely(!replace_buf->data)) {
2393 DP_NOTICE(edev,
2394 "Failed to allocate TPA skb pool [replacement buffer]\n");
2395 goto err;
2396 }
2397
2398 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2399 rxq->rx_buf_size, DMA_FROM_DEVICE);
2400 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2401 DP_NOTICE(edev,
2402 "Failed to map TPA replacement buffer\n");
2403 goto err;
2404 }
2405
2406 dma_unmap_addr_set(replace_buf, mapping, mapping);
2407 tpa_info->replace_buf.page_offset = 0;
2408
2409 tpa_info->replace_buf_mapping = mapping;
2410 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2411 }
2412
2413 return 0;
2414err:
2415 qede_free_sge_mem(edev, rxq);
2416 edev->gro_disable = 1;
2417 return -ENOMEM;
2418}
2419
2950219d
YM		 2420/* This function allocates all memory needed per Rx queue */
2421static int qede_alloc_mem_rxq(struct qede_dev *edev,
2422 struct qede_rx_queue *rxq)
2423{
2424 int i, rc, size, num_allocated;
2425
2426 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2427
fc48b7a6
YM		 2428 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2429 edev->ndev->mtu;
2430 if (rxq->rx_buf_size > PAGE_SIZE)
2431 rxq->rx_buf_size = PAGE_SIZE;
2432
2433 /* Segment size to spilt a page in multiple equal parts */
2434 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2435
2436 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2437 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2438 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2439 if (!rxq->sw_rx_ring) {
2440 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2441 goto err;
2442 }
2443
2444 /* Allocate FW Rx ring */
2445 rc = edev->ops->common->chain_alloc(edev->cdev,
2446 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2447 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2448 RX_RING_SIZE,
2950219d
YM		 2449 sizeof(struct eth_rx_bd),
2450 &rxq->rx_bd_ring);
2451
2452 if (rc)
2453 goto err;
2454
2455 /* Allocate FW completion ring */
2456 rc = edev->ops->common->chain_alloc(edev->cdev,
2457 QED_CHAIN_USE_TO_CONSUME,
2458 QED_CHAIN_MODE_PBL,
fc48b7a6 2459 RX_RING_SIZE,
2950219d
YM		 2460 sizeof(union eth_rx_cqe),
2461 &rxq->rx_comp_ring);
2462 if (rc)
2463 goto err;
2464
2465 /* Allocate buffers for the Rx ring */
2466 for (i = 0; i < rxq->num_rx_buffers; i++) {
2467 rc = qede_alloc_rx_buffer(edev, rxq);
2468 if (rc)
2469 break;
2470 }
2471 num_allocated = i;
2472 if (!num_allocated) {
2473 DP_ERR(edev, "Rx buffers allocation failed\n");
2474 goto err;
2475 } else if (num_allocated < rxq->num_rx_buffers) {
2476 DP_NOTICE(edev,
2477 "Allocated less buffers than desired (%d allocated)\n",
2478 num_allocated);
2479 }
2480
55482edc
MC		 2481 qede_alloc_sge_mem(edev, rxq);
2482
2950219d
YM		 2483 return 0;
2484
2485err:
2486 qede_free_mem_rxq(edev, rxq);
2487 return -ENOMEM;
2488}
2489
2490static void qede_free_mem_txq(struct qede_dev *edev,
2491 struct qede_tx_queue *txq)
2492{
2493 /* Free the parallel SW ring */
2494 kfree(txq->sw_tx_ring);
2495
2496 /* Free the real RQ ring used by FW */
2497 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2498}
2499
2500/* This function allocates all memory needed per Tx queue */
2501static int qede_alloc_mem_txq(struct qede_dev *edev,
2502 struct qede_tx_queue *txq)
2503{
2504 int size, rc;
2505 union eth_tx_bd_types *p_virt;
2506
2507 txq->num_tx_buffers = edev->q_num_tx_buffers;
2508
2509 /* Allocate the parallel driver ring for Tx buffers */
2510 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2511 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2512 if (!txq->sw_tx_ring) {
2513 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2514 goto err;
2515 }
2516
2517 rc = edev->ops->common->chain_alloc(edev->cdev,
2518 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2519 QED_CHAIN_MODE_PBL,
2520 NUM_TX_BDS_MAX,
2521 sizeof(*p_virt),
2522 &txq->tx_pbl);
2523 if (rc)
2524 goto err;
2525
2526 return 0;
2527
2528err:
2529 qede_free_mem_txq(edev, txq);
2530 return -ENOMEM;
2531}
2532
2533/* This function frees all memory of a single fp */
2534static void qede_free_mem_fp(struct qede_dev *edev,
2535 struct qede_fastpath *fp)
2536{
2537 int tc;
2538
2539 qede_free_mem_sb(edev, fp->sb_info);
2540
2541 qede_free_mem_rxq(edev, fp->rxq);
2542
2543 for (tc = 0; tc < edev->num_tc; tc++)
2544 qede_free_mem_txq(edev, &fp->txqs[tc]);
2545}
2546
2547/* This function allocates all memory needed for a single fp (i.e. an entity
2548 * which contains status block, one rx queue and multiple per-TC tx queues.
2549 */
2550static int qede_alloc_mem_fp(struct qede_dev *edev,
2551 struct qede_fastpath *fp)
2552{
2553 int rc, tc;
2554
2555 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2556 if (rc)
2557 goto err;
2558
2559 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2560 if (rc)
2561 goto err;
2562
2563 for (tc = 0; tc < edev->num_tc; tc++) {
2564 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2565 if (rc)
2566 goto err;
2567 }
2568
2569 return 0;
2570
2571err:
2572 qede_free_mem_fp(edev, fp);
2573 return -ENOMEM;
2574}
2575
2576static void qede_free_mem_load(struct qede_dev *edev)
2577{
2578 int i;
2579
2580 for_each_rss(i) {
2581 struct qede_fastpath *fp = &edev->fp_array[i];
2582
2583 qede_free_mem_fp(edev, fp);
2584 }
2585}
2586
2587/* This function allocates all qede memory at NIC load. */
2588static int qede_alloc_mem_load(struct qede_dev *edev)
2589{
2590 int rc = 0, rss_id;
2591
2592 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2593 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2594
2595 rc = qede_alloc_mem_fp(edev, fp);
2596 if (rc)
2597 break;
2598 }
2599
2600 if (rss_id != QEDE_RSS_CNT(edev)) {
2601 /* Failed allocating memory for all the queues */
2602 if (!rss_id) {
2603 DP_ERR(edev,
2604 "Failed to allocate memory for the leading queue\n");
2605 rc = -ENOMEM;
2606 } else {
2607 DP_NOTICE(edev,
2608 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
2609 QEDE_RSS_CNT(edev), rss_id);
2610 }
2611 edev->num_rss = rss_id;
2612 }
2613
2614 return 0;
2615}
2616
2617/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2618static void qede_init_fp(struct qede_dev *edev)
2619{
2620 int rss_id, txq_index, tc;
2621 struct qede_fastpath *fp;
2622
2623 for_each_rss(rss_id) {
2624 fp = &edev->fp_array[rss_id];
2625
2626 fp->edev = edev;
2627 fp->rss_id = rss_id;
2628
2629 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2630
2631 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2632
2633 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2634 fp->rxq->rxq_id = rss_id;
2635
2636 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2637 for (tc = 0; tc < edev->num_tc; tc++) {
2638 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2639 fp->txqs[tc].index = txq_index;
2640 }
2641
2642 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2643 edev->ndev->name, rss_id);
2644 }
55482edc
MC		 2645
2646 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2647}
2648
2649static int qede_set_real_num_queues(struct qede_dev *edev)
2650{
2651 int rc = 0;
2652
2653 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2654 if (rc) {
2655 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2656 return rc;
2657 }
2658 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2659 if (rc) {
2660 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2661 return rc;
2662 }
2663
2664 return 0;
2665}
2666
2667static void qede_napi_disable_remove(struct qede_dev *edev)
2668{
2669 int i;
2670
2671 for_each_rss(i) {
2672 napi_disable(&edev->fp_array[i].napi);
2673
2674 netif_napi_del(&edev->fp_array[i].napi);
2675 }
2676}
2677
2678static void qede_napi_add_enable(struct qede_dev *edev)
2679{
2680 int i;
2681
2682 /* Add NAPI objects */
2683 for_each_rss(i) {
2684 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2685 qede_poll, NAPI_POLL_WEIGHT);
2686 napi_enable(&edev->fp_array[i].napi);
2687 }
2688}
2689
2690static void qede_sync_free_irqs(struct qede_dev *edev)
2691{
2692 int i;
2693
2694 for (i = 0; i < edev->int_info.used_cnt; i++) {
2695 if (edev->int_info.msix_cnt) {
2696 synchronize_irq(edev->int_info.msix[i].vector);
2697 free_irq(edev->int_info.msix[i].vector,
2698 &edev->fp_array[i]);
2699 } else {
2700 edev->ops->common->simd_handler_clean(edev->cdev, i);
2701 }
2702 }
2703
2704 edev->int_info.used_cnt = 0;
2705}
2706
2707static int qede_req_msix_irqs(struct qede_dev *edev)
2708{
2709 int i, rc;
2710
2711 /* Sanitize number of interrupts == number of prepared RSS queues */
2712 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2713 DP_ERR(edev,
2714 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2715 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2716 return -EINVAL;
2717 }
2718
2719 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2720 rc = request_irq(edev->int_info.msix[i].vector,
2721 qede_msix_fp_int, 0, edev->fp_array[i].name,
2722 &edev->fp_array[i]);
2723 if (rc) {
2724 DP_ERR(edev, "Request fp %d irq failed\n", i);
2725 qede_sync_free_irqs(edev);
2726 return rc;
2727 }
2728 DP_VERBOSE(edev, NETIF_MSG_INTR,
2729 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2730 edev->fp_array[i].name, i,
2731 &edev->fp_array[i]);
2732 edev->int_info.used_cnt++;
2733 }
2734
2735 return 0;
2736}
2737
2738static void qede_simd_fp_handler(void *cookie)
2739{
2740 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2741
2742 napi_schedule_irqoff(&fp->napi);
2743}
2744
2745static int qede_setup_irqs(struct qede_dev *edev)
2746{
2747 int i, rc = 0;
2748
2749 /* Learn Interrupt configuration */
2750 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2751 if (rc)
2752 return rc;
2753
2754 if (edev->int_info.msix_cnt) {
2755 rc = qede_req_msix_irqs(edev);
2756 if (rc)
2757 return rc;
2758 edev->ndev->irq = edev->int_info.msix[0].vector;
2759 } else {
2760 const struct qed_common_ops *ops;
2761
2762 /* qed should learn receive the RSS ids and callbacks */
2763 ops = edev->ops->common;
2764 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2765 ops->simd_handler_config(edev->cdev,
2766 &edev->fp_array[i], i,
2767 qede_simd_fp_handler);
2768 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2769 }
2770 return 0;
2771}
2772
2773static int qede_drain_txq(struct qede_dev *edev,
2774 struct qede_tx_queue *txq,
2775 bool allow_drain)
2776{
2777 int rc, cnt = 1000;
2778
2779 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2780 if (!cnt) {
2781 if (allow_drain) {
2782 DP_NOTICE(edev,
2783 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2784 txq->index);
2785 rc = edev->ops->common->drain(edev->cdev);
2786 if (rc)
2787 return rc;
2788 return qede_drain_txq(edev, txq, false);
2789 }
2790 DP_NOTICE(edev,
2791 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2792 txq->index, txq->sw_tx_prod,
2793 txq->sw_tx_cons);
2794 return -ENODEV;
2795 }
2796 cnt--;
2797 usleep_range(1000, 2000);
2798 barrier();
2799 }
2800
2801 /* FW finished processing, wait for HW to transmit all tx packets */
2802 usleep_range(1000, 2000);
2803
2804 return 0;
2805}
2806
2807static int qede_stop_queues(struct qede_dev *edev)
2808{
2809 struct qed_update_vport_params vport_update_params;
2810 struct qed_dev *cdev = edev->cdev;
2811 int rc, tc, i;
2812
2813 /* Disable the vport */
2814 memset(&vport_update_params, 0, sizeof(vport_update_params));
2815 vport_update_params.vport_id = 0;
2816 vport_update_params.update_vport_active_flg = 1;
2817 vport_update_params.vport_active_flg = 0;
2818 vport_update_params.update_rss_flg = 0;
2819
2820 rc = edev->ops->vport_update(cdev, &vport_update_params);
2821 if (rc) {
2822 DP_ERR(edev, "Failed to update vport\n");
2823 return rc;
2824 }
2825
2826 /* Flush Tx queues. If needed, request drain from MCP */
2827 for_each_rss(i) {
2828 struct qede_fastpath *fp = &edev->fp_array[i];
2829
2830 for (tc = 0; tc < edev->num_tc; tc++) {
2831 struct qede_tx_queue *txq = &fp->txqs[tc];
2832
2833 rc = qede_drain_txq(edev, txq, true);
2834 if (rc)
2835 return rc;
2836 }
2837 }
2838
2839 /* Stop all Queues in reverse order*/
2840 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2841 struct qed_stop_rxq_params rx_params;
2842
2843 /* Stop the Tx Queue(s)*/
2844 for (tc = 0; tc < edev->num_tc; tc++) {
2845 struct qed_stop_txq_params tx_params;
2846
2847 tx_params.rss_id = i;
2848 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2849 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2850 if (rc) {
2851 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2852 tx_params.tx_queue_id);
2853 return rc;
2854 }
2855 }
2856
2857 /* Stop the Rx Queue*/
2858 memset(&rx_params, 0, sizeof(rx_params));
2859 rx_params.rss_id = i;
2860 rx_params.rx_queue_id = i;
2861
2862 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2863 if (rc) {
2864 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2865 return rc;
2866 }
2867 }
2868
2869 /* Stop the vport */
2870 rc = edev->ops->vport_stop(cdev, 0);
2871 if (rc)
2872 DP_ERR(edev, "Failed to stop VPORT\n");
2873
2874 return rc;
2875}
2876
2877static int qede_start_queues(struct qede_dev *edev)
2878{
2879 int rc, tc, i;
088c8618 2880 int vlan_removal_en = 1;
2950219d 2881 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 2882 struct qed_update_vport_params vport_update_params;
2883 struct qed_queue_start_common_params q_params;
088c8618 2884 struct qed_start_vport_params start = {0};
961acdea 2885 bool reset_rss_indir = false;
2950219d
YM		 2886
2887 if (!edev->num_rss) {
2888 DP_ERR(edev,
2889 "Cannot update V-VPORT as active as there are no Rx queues\n");
2890 return -EINVAL;
2891 }
2892
55482edc 2893 start.gro_enable = !edev->gro_disable;
088c8618
MC		 2894 start.mtu = edev->ndev->mtu;
2895 start.vport_id = 0;
2896 start.drop_ttl0 = true;
2897 start.remove_inner_vlan = vlan_removal_en;
2898
2899 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 2900
2901 if (rc) {
2902 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2903 return rc;
2904 }
2905
2906 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2907 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 2908 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 2909
2910 for_each_rss(i) {
2911 struct qede_fastpath *fp = &edev->fp_array[i];
2912 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2913
2914 memset(&q_params, 0, sizeof(q_params));
2915 q_params.rss_id = i;
2916 q_params.queue_id = i;
2917 q_params.vport_id = 0;
2918 q_params.sb = fp->sb_info->igu_sb_id;
2919 q_params.sb_idx = RX_PI;
2920
2921 rc = edev->ops->q_rx_start(cdev, &q_params,
2922 fp->rxq->rx_buf_size,
2923 fp->rxq->rx_bd_ring.p_phys_addr,
2924 phys_table,
2925 fp->rxq->rx_comp_ring.page_cnt,
2926 &fp->rxq->hw_rxq_prod_addr);
2927 if (rc) {
2928 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2929 return rc;
2930 }
2931
2932 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2933
2934 qede_update_rx_prod(edev, fp->rxq);
2935
2936 for (tc = 0; tc < edev->num_tc; tc++) {
2937 struct qede_tx_queue *txq = &fp->txqs[tc];
2938 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2939
2940 memset(&q_params, 0, sizeof(q_params));
2941 q_params.rss_id = i;
2942 q_params.queue_id = txq_index;
2943 q_params.vport_id = 0;
2944 q_params.sb = fp->sb_info->igu_sb_id;
2945 q_params.sb_idx = TX_PI(tc);
2946
2947 rc = edev->ops->q_tx_start(cdev, &q_params,
2948 txq->tx_pbl.pbl.p_phys_table,
2949 txq->tx_pbl.page_cnt,
2950 &txq->doorbell_addr);
2951 if (rc) {
2952 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2953 txq_index, rc);
2954 return rc;
2955 }
2956
2957 txq->hw_cons_ptr =
2958 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2959 SET_FIELD(txq->tx_db.data.params,
2960 ETH_DB_DATA_DEST, DB_DEST_XCM);
2961 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2962 DB_AGG_CMD_SET);
2963 SET_FIELD(txq->tx_db.data.params,
2964 ETH_DB_DATA_AGG_VAL_SEL,
2965 DQ_XCM_ETH_TX_BD_PROD_CMD);
2966
2967 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2968 }
2969 }
2970
2971 /* Prepare and send the vport enable */
2972 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 2973 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 2974 vport_update_params.update_vport_active_flg = 1;
2975 vport_update_params.vport_active_flg = 1;
2976
2977 /* Fill struct with RSS params */
2978 if (QEDE_RSS_CNT(edev) > 1) {
2979 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 2980
2981 /* Need to validate current RSS config uses valid entries */
2982 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
2983 if (edev->rss_params.rss_ind_table[i] >=
2984 edev->num_rss) {
2985 reset_rss_indir = true;
2986 break;
2987 }
2988 }
2989
2990 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
2991 reset_rss_indir) {
2992 u16 val;
2993
2994 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
2995 u16 indir_val;
2996
2997 val = QEDE_RSS_CNT(edev);
2998 indir_val = ethtool_rxfh_indir_default(i, val);
2999 edev->rss_params.rss_ind_table[i] = indir_val;
3000 }
3001 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3002 }
3003
3004 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3005 netdev_rss_key_fill(edev->rss_params.rss_key,
3006 sizeof(edev->rss_params.rss_key));
3007 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3008 }
3009
3010 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3011 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3012 QED_RSS_IPV6 |
3013 QED_RSS_IPV4_TCP |
3014 QED_RSS_IPV6_TCP;
3015 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3016 }
3017
3018 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3019 sizeof(vport_update_params.rss_params));
2950219d 3020 } else {
961acdea
SRK		 3021 memset(&vport_update_params.rss_params, 0,
3022 sizeof(vport_update_params.rss_params));
2950219d 3023 }
2950219d
YM		 3024
3025 rc = edev->ops->vport_update(cdev, &vport_update_params);
3026 if (rc) {
3027 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3028 return rc;
3029 }
3030
3031 return 0;
3032}
3033
0d8e0aa0
SK		 3034static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3035 enum qed_filter_xcast_params_type opcode,
3036 unsigned char *mac, int num_macs)
3037{
3038 struct qed_filter_params filter_cmd;
3039 int i;
3040
3041 memset(&filter_cmd, 0, sizeof(filter_cmd));
3042 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3043 filter_cmd.filter.mcast.type = opcode;
3044 filter_cmd.filter.mcast.num = num_macs;
3045
3046 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3047 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3048
3049 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3050}
3051
2950219d
YM		 3052enum qede_unload_mode {
3053 QEDE_UNLOAD_NORMAL,
3054};
3055
3056static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3057{
a2ec6172 3058 struct qed_link_params link_params;
2950219d
YM		 3059 int rc;
3060
3061 DP_INFO(edev, "Starting qede unload\n");
3062
0d8e0aa0
SK		 3063 mutex_lock(&edev->qede_lock);
3064 edev->state = QEDE_STATE_CLOSED;
3065
2950219d
YM		 3066 /* Close OS Tx */
3067 netif_tx_disable(edev->ndev);
3068 netif_carrier_off(edev->ndev);
3069
a2ec6172
SK		 3070 /* Reset the link */
3071 memset(&link_params, 0, sizeof(link_params));
3072 link_params.link_up = false;
3073 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3074 rc = qede_stop_queues(edev);
3075 if (rc) {
3076 qede_sync_free_irqs(edev);
3077 goto out;
3078 }
3079
3080 DP_INFO(edev, "Stopped Queues\n");
3081
7c1bfcad 3082 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3083 edev->ops->fastpath_stop(edev->cdev);
3084
3085 /* Release the interrupts */
3086 qede_sync_free_irqs(edev);
3087 edev->ops->common->set_fp_int(edev->cdev, 0);
3088
3089 qede_napi_disable_remove(edev);
3090
3091 qede_free_mem_load(edev);
3092 qede_free_fp_array(edev);
3093
3094out:
3095 mutex_unlock(&edev->qede_lock);
3096 DP_INFO(edev, "Ending qede unload\n");
3097}
3098
3099enum qede_load_mode {
3100 QEDE_LOAD_NORMAL,
3101};
3102
3103static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3104{
a2ec6172
SK		 3105 struct qed_link_params link_params;
3106 struct qed_link_output link_output;
2950219d
YM		 3107 int rc;
3108
3109 DP_INFO(edev, "Starting qede load\n");
3110
3111 rc = qede_set_num_queues(edev);
3112 if (rc)
3113 goto err0;
3114
3115 rc = qede_alloc_fp_array(edev);
3116 if (rc)
3117 goto err0;
3118
3119 qede_init_fp(edev);
3120
3121 rc = qede_alloc_mem_load(edev);
3122 if (rc)
3123 goto err1;
3124 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3125 QEDE_RSS_CNT(edev), edev->num_tc);
3126
3127 rc = qede_set_real_num_queues(edev);
3128 if (rc)
3129 goto err2;
3130
3131 qede_napi_add_enable(edev);
3132 DP_INFO(edev, "Napi added and enabled\n");
3133
3134 rc = qede_setup_irqs(edev);
3135 if (rc)
3136 goto err3;
3137 DP_INFO(edev, "Setup IRQs succeeded\n");
3138
3139 rc = qede_start_queues(edev);
3140 if (rc)
3141 goto err4;
3142 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3143
3144 /* Add primary mac and set Rx filters */
3145 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3146
0d8e0aa0
SK		 3147 mutex_lock(&edev->qede_lock);
3148 edev->state = QEDE_STATE_OPEN;
3149 mutex_unlock(&edev->qede_lock);
a2ec6172 3150
7c1bfcad
SRK		 3151 /* Program un-configured VLANs */
3152 qede_configure_vlan_filters(edev);
3153
a2ec6172
SK		 3154 /* Ask for link-up using current configuration */
3155 memset(&link_params, 0, sizeof(link_params));
3156 link_params.link_up = true;
3157 edev->ops->common->set_link(edev->cdev, &link_params);
3158
3159 /* Query whether link is already-up */
3160 memset(&link_output, 0, sizeof(link_output));
3161 edev->ops->common->get_link(edev->cdev, &link_output);
3162 qede_link_update(edev, &link_output);
3163
2950219d
YM		 3164 DP_INFO(edev, "Ending successfully qede load\n");
3165
3166 return 0;
3167
3168err4:
3169 qede_sync_free_irqs(edev);
3170 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3171err3:
3172 qede_napi_disable_remove(edev);
3173err2:
3174 qede_free_mem_load(edev);
3175err1:
3176 edev->ops->common->set_fp_int(edev->cdev, 0);
3177 qede_free_fp_array(edev);
3178 edev->num_rss = 0;
3179err0:
3180 return rc;
3181}
3182
133fac0e
SK		 3183void qede_reload(struct qede_dev *edev,
3184 void (*func)(struct qede_dev *, union qede_reload_args *),
3185 union qede_reload_args *args)
3186{
3187 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3188 /* Call function handler to update parameters
3189 * needed for function load.
3190 */
3191 if (func)
3192 func(edev, args);
3193
3194 qede_load(edev, QEDE_LOAD_NORMAL);
3195
3196 mutex_lock(&edev->qede_lock);
3197 qede_config_rx_mode(edev->ndev);
3198 mutex_unlock(&edev->qede_lock);
3199}
3200
2950219d
YM		 3201/* called with rtnl_lock */
3202static int qede_open(struct net_device *ndev)
3203{
3204 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3205 int rc;
2950219d
YM		 3206
3207 netif_carrier_off(ndev);
3208
3209 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3210
b18e170c
MC		 3211 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3212
3213 if (rc)
3214 return rc;
3215
3216#ifdef CONFIG_QEDE_VXLAN
3217 vxlan_get_rx_port(ndev);
3218#endif
3219 return 0;
2950219d
YM		 3220}
3221
3222static int qede_close(struct net_device *ndev)
3223{
3224 struct qede_dev *edev = netdev_priv(ndev);
3225
3226 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3227
3228 return 0;
3229}
0d8e0aa0 3230
a2ec6172
SK		 3231static void qede_link_update(void *dev, struct qed_link_output *link)
3232{
3233 struct qede_dev *edev = dev;
3234
3235 if (!netif_running(edev->ndev)) {
3236 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3237 return;
3238 }
3239
3240 if (link->link_up) {
8e025ae2
YM		 3241 if (!netif_carrier_ok(edev->ndev)) {
3242 DP_NOTICE(edev, "Link is up\n");
3243 netif_tx_start_all_queues(edev->ndev);
3244 netif_carrier_on(edev->ndev);
3245 }
a2ec6172 3246 } else {
8e025ae2
YM		 3247 if (netif_carrier_ok(edev->ndev)) {
3248 DP_NOTICE(edev, "Link is down\n");
3249 netif_tx_disable(edev->ndev);
3250 netif_carrier_off(edev->ndev);
3251 }
a2ec6172
SK		 3252 }
3253}
3254
0d8e0aa0
SK		 3255static int qede_set_mac_addr(struct net_device *ndev, void *p)
3256{
3257 struct qede_dev *edev = netdev_priv(ndev);
3258 struct sockaddr *addr = p;
3259 int rc;
3260
3261 ASSERT_RTNL(); /* @@@TBD To be removed */
3262
3263 DP_INFO(edev, "Set_mac_addr called\n");
3264
3265 if (!is_valid_ether_addr(addr->sa_data)) {
3266 DP_NOTICE(edev, "The MAC address is not valid\n");
3267 return -EFAULT;
3268 }
3269
3270 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3271
3272 if (!netif_running(ndev)) {
3273 DP_NOTICE(edev, "The device is currently down\n");
3274 return 0;
3275 }
3276
3277 /* Remove the previous primary mac */
3278 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3279 edev->primary_mac);
3280 if (rc)
3281 return rc;
3282
3283 /* Add MAC filter according to the new unicast HW MAC address */
3284 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3285 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3286 edev->primary_mac);
3287}
3288
3289static int
3290qede_configure_mcast_filtering(struct net_device *ndev,
3291 enum qed_filter_rx_mode_type *accept_flags)
3292{
3293 struct qede_dev *edev = netdev_priv(ndev);
3294 unsigned char *mc_macs, *temp;
3295 struct netdev_hw_addr *ha;
3296 int rc = 0, mc_count;
3297 size_t size;
3298
3299 size = 64 * ETH_ALEN;
3300
3301 mc_macs = kzalloc(size, GFP_KERNEL);
3302 if (!mc_macs) {
3303 DP_NOTICE(edev,
3304 "Failed to allocate memory for multicast MACs\n");
3305 rc = -ENOMEM;
3306 goto exit;
3307 }
3308
3309 temp = mc_macs;
3310
3311 /* Remove all previously configured MAC filters */
3312 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3313 mc_macs, 1);
3314 if (rc)
3315 goto exit;
3316
3317 netif_addr_lock_bh(ndev);
3318
3319 mc_count = netdev_mc_count(ndev);
3320 if (mc_count < 64) {
3321 netdev_for_each_mc_addr(ha, ndev) {
3322 ether_addr_copy(temp, ha->addr);
3323 temp += ETH_ALEN;
3324 }
3325 }
3326
3327 netif_addr_unlock_bh(ndev);
3328
3329 /* Check for all multicast @@@TBD resource allocation */
3330 if ((ndev->flags & IFF_ALLMULTI) ||
3331 (mc_count > 64)) {
3332 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3333 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3334 } else {
3335 /* Add all multicast MAC filters */
3336 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3337 mc_macs, mc_count);
3338 }
3339
3340exit:
3341 kfree(mc_macs);
3342 return rc;
3343}
3344
3345static void qede_set_rx_mode(struct net_device *ndev)
3346{
3347 struct qede_dev *edev = netdev_priv(ndev);
3348
3349 DP_INFO(edev, "qede_set_rx_mode called\n");
3350
3351 if (edev->state != QEDE_STATE_OPEN) {
3352 DP_INFO(edev,
3353 "qede_set_rx_mode called while interface is down\n");
3354 } else {
3355 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3356 schedule_delayed_work(&edev->sp_task, 0);
3357 }
3358}
3359
3360/* Must be called with qede_lock held */
3361static void qede_config_rx_mode(struct net_device *ndev)
3362{
3363 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3364 struct qede_dev *edev = netdev_priv(ndev);
3365 struct qed_filter_params rx_mode;
3366 unsigned char *uc_macs, *temp;
3367 struct netdev_hw_addr *ha;
3368 int rc, uc_count;
3369 size_t size;
3370
3371 netif_addr_lock_bh(ndev);
3372
3373 uc_count = netdev_uc_count(ndev);
3374 size = uc_count * ETH_ALEN;
3375
3376 uc_macs = kzalloc(size, GFP_ATOMIC);
3377 if (!uc_macs) {
3378 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3379 netif_addr_unlock_bh(ndev);
3380 return;
3381 }
3382
3383 temp = uc_macs;
3384 netdev_for_each_uc_addr(ha, ndev) {
3385 ether_addr_copy(temp, ha->addr);
3386 temp += ETH_ALEN;
3387 }
3388
3389 netif_addr_unlock_bh(ndev);
3390
3391 /* Configure the struct for the Rx mode */
3392 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3393 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3394
3395 /* Remove all previous unicast secondary macs and multicast macs
3396 * (configrue / leave the primary mac)
3397 */
3398 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3399 edev->primary_mac);
3400 if (rc)
3401 goto out;
3402
3403 /* Check for promiscuous */
3404 if ((ndev->flags & IFF_PROMISC) ||
3405 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3406 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3407 } else {
3408 /* Add MAC filters according to the unicast secondary macs */
3409 int i;
3410
3411 temp = uc_macs;
3412 for (i = 0; i < uc_count; i++) {
3413 rc = qede_set_ucast_rx_mac(edev,
3414 QED_FILTER_XCAST_TYPE_ADD,
3415 temp);
3416 if (rc)
3417 goto out;
3418
3419 temp += ETH_ALEN;
3420 }
3421
3422 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3423 if (rc)
3424 goto out;
3425 }
3426
7c1bfcad
SRK		 3427 /* take care of VLAN mode */
3428 if (ndev->flags & IFF_PROMISC) {
3429 qede_config_accept_any_vlan(edev, true);
3430 } else if (!edev->non_configured_vlans) {
3431 /* It's possible that accept_any_vlan mode is set due to a
3432 * previous setting of IFF_PROMISC. If vlan credits are
3433 * sufficient, disable accept_any_vlan.
3434 */
3435 qede_config_accept_any_vlan(edev, false);
3436 }
3437
0d8e0aa0
SK		 3438 rx_mode.filter.accept_flags = accept_flags;
3439 edev->ops->filter_config(edev->cdev, &rx_mode);
3440out:
3441 kfree(uc_macs);
3442}
Linux kernel - Deliverables
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