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Merge branch 'qlcnic-next'
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
5abd7e92
YM		 42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 44
5abd7e92 45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
0e7441d7 56#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
a2ec6172 90static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
a2ec6172
SK		 99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
2950219d
YM		 105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
e712d52b
YM		 140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
2950219d
YM		 162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
e712d52b
YM		 172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
2950219d 175 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
2950219d 187 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
2950219d
YM		 195/* -------------------------------------------------------------------------
196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
fc48b7a6 333 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 334
fc48b7a6 335 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 336
fc48b7a6 337 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
fc48b7a6 341 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
fc48b7a6 350 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 351
fc48b7a6 352 if (third_bd)
2950219d 353 third_bd->data.bitfields |=
fc48b7a6
YM		 354 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 357
fc48b7a6 358 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 359 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
360}
361
362static int map_frag_to_bd(struct qede_dev *edev,
363 skb_frag_t *frag,
364 struct eth_tx_bd *bd)
365{
366 dma_addr_t mapping;
367
368 /* Map skb non-linear frag data for DMA */
369 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
370 skb_frag_size(frag),
371 DMA_TO_DEVICE);
372 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
373 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
374 return -ENOMEM;
375 }
376
377 /* Setup the data pointer of the frag data */
378 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
379
380 return 0;
381}
382
b1199b10
YM		 383/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
384#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
385static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
386 u8 xmit_type)
387{
388 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
389
390 if (xmit_type & XMIT_LSO) {
391 int hlen;
392
393 hlen = skb_transport_header(skb) +
394 tcp_hdrlen(skb) - skb->data;
395
396 /* linear payload would require its own BD */
397 if (skb_headlen(skb) > hlen)
398 allowed_frags--;
399 }
400
401 return (skb_shinfo(skb)->nr_frags > allowed_frags);
402}
403#endif
404
2950219d
YM		 405/* Main transmit function */
406static
407netdev_tx_t qede_start_xmit(struct sk_buff *skb,
408 struct net_device *ndev)
409{
410 struct qede_dev *edev = netdev_priv(ndev);
411 struct netdev_queue *netdev_txq;
412 struct qede_tx_queue *txq;
413 struct eth_tx_1st_bd *first_bd;
414 struct eth_tx_2nd_bd *second_bd = NULL;
415 struct eth_tx_3rd_bd *third_bd = NULL;
416 struct eth_tx_bd *tx_data_bd = NULL;
417 u16 txq_index;
418 u8 nbd = 0;
419 dma_addr_t mapping;
420 int rc, frag_idx = 0, ipv6_ext = 0;
421 u8 xmit_type;
422 u16 idx;
423 u16 hlen;
424 bool data_split;
425
426 /* Get tx-queue context and netdev index */
427 txq_index = skb_get_queue_mapping(skb);
428 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
429 txq = QEDE_TX_QUEUE(edev, txq_index);
430 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
431
2950219d
YM		 432 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
433 (MAX_SKB_FRAGS + 1));
434
435 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
436
b1199b10
YM		 437#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
438 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
439 if (skb_linearize(skb)) {
440 DP_NOTICE(edev,
441 "SKB linearization failed - silently dropping this SKB\n");
442 dev_kfree_skb_any(skb);
443 return NETDEV_TX_OK;
444 }
445 }
446#endif
447
2950219d
YM		 448 /* Fill the entry in the SW ring and the BDs in the FW ring */
449 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
450 txq->sw_tx_ring[idx].skb = skb;
451 first_bd = (struct eth_tx_1st_bd *)
452 qed_chain_produce(&txq->tx_pbl);
453 memset(first_bd, 0, sizeof(*first_bd));
454 first_bd->data.bd_flags.bitfields =
455 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
456
457 /* Map skb linear data for DMA and set in the first BD */
458 mapping = dma_map_single(&edev->pdev->dev, skb->data,
459 skb_headlen(skb), DMA_TO_DEVICE);
460 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
461 DP_NOTICE(edev, "SKB mapping failed\n");
462 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
463 return NETDEV_TX_OK;
464 }
465 nbd++;
466 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
467
468 /* In case there is IPv6 with extension headers or LSO we need 2nd and
469 * 3rd BDs.
470 */
471 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
472 second_bd = (struct eth_tx_2nd_bd *)
473 qed_chain_produce(&txq->tx_pbl);
474 memset(second_bd, 0, sizeof(*second_bd));
475
476 nbd++;
477 third_bd = (struct eth_tx_3rd_bd *)
478 qed_chain_produce(&txq->tx_pbl);
479 memset(third_bd, 0, sizeof(*third_bd));
480
481 nbd++;
482 /* We need to fill in additional data in second_bd... */
483 tx_data_bd = (struct eth_tx_bd *)second_bd;
484 }
485
486 if (skb_vlan_tag_present(skb)) {
487 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
488 first_bd->data.bd_flags.bitfields |=
489 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
490 }
491
492 /* Fill the parsing flags & params according to the requested offload */
493 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 494 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
495
2950219d
YM		 496 /* We don't re-calculate IP checksum as it is already done by
497 * the upper stack
498 */
499 first_bd->data.bd_flags.bitfields |=
500 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
501
fc48b7a6
YM		 502 first_bd->data.bitfields |= cpu_to_le16(temp);
503
2950219d
YM		 504 /* If the packet is IPv6 with extension header, indicate that
505 * to FW and pass few params, since the device cracker doesn't
506 * support parsing IPv6 with extension header/s.
507 */
508 if (unlikely(ipv6_ext))
509 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
510 }
511
512 if (xmit_type & XMIT_LSO) {
513 first_bd->data.bd_flags.bitfields |=
514 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
515 third_bd->data.lso_mss =
516 cpu_to_le16(skb_shinfo(skb)->gso_size);
517
518 first_bd->data.bd_flags.bitfields |=
519 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
520 hlen = skb_transport_header(skb) +
521 tcp_hdrlen(skb) - skb->data;
522
523 /* @@@TBD - if will not be removed need to check */
524 third_bd->data.bitfields |=
fc48b7a6 525 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 526
527 /* Make life easier for FW guys who can't deal with header and
528 * data on same BD. If we need to split, use the second bd...
529 */
530 if (unlikely(skb_headlen(skb) > hlen)) {
531 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
532 "TSO split header size is %d (%x:%x)\n",
533 first_bd->nbytes, first_bd->addr.hi,
534 first_bd->addr.lo);
535
536 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
537 le32_to_cpu(first_bd->addr.lo)) +
538 hlen;
539
540 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
541 le16_to_cpu(first_bd->nbytes) -
542 hlen);
543
544 /* this marks the BD as one that has no
545 * individual mapping
546 */
547 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
548
549 first_bd->nbytes = cpu_to_le16(hlen);
550
551 tx_data_bd = (struct eth_tx_bd *)third_bd;
552 data_split = true;
553 }
554 }
555
556 /* Handle fragmented skb */
557 /* special handle for frags inside 2nd and 3rd bds.. */
558 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
559 rc = map_frag_to_bd(edev,
560 &skb_shinfo(skb)->frags[frag_idx],
561 tx_data_bd);
562 if (rc) {
563 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
564 data_split);
565 return NETDEV_TX_OK;
566 }
567
568 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
569 tx_data_bd = (struct eth_tx_bd *)third_bd;
570 else
571 tx_data_bd = NULL;
572
573 frag_idx++;
574 }
575
576 /* map last frags into 4th, 5th .... */
577 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
578 tx_data_bd = (struct eth_tx_bd *)
579 qed_chain_produce(&txq->tx_pbl);
580
581 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
582
583 rc = map_frag_to_bd(edev,
584 &skb_shinfo(skb)->frags[frag_idx],
585 tx_data_bd);
586 if (rc) {
587 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
588 data_split);
589 return NETDEV_TX_OK;
590 }
591 }
592
593 /* update the first BD with the actual num BDs */
594 first_bd->data.nbds = nbd;
595
596 netdev_tx_sent_queue(netdev_txq, skb->len);
597
598 skb_tx_timestamp(skb);
599
600 /* Advance packet producer only before sending the packet since mapping
601 * of pages may fail.
602 */
603 txq->sw_tx_prod++;
604
605 /* 'next page' entries are counted in the producer value */
606 txq->tx_db.data.bd_prod =
607 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
608
609 /* wmb makes sure that the BDs data is updated before updating the
610 * producer, otherwise FW may read old data from the BDs.
611 */
612 wmb();
613 barrier();
614 writel(txq->tx_db.raw, txq->doorbell_addr);
615
616 /* mmiowb is needed to synchronize doorbell writes from more than one
617 * processor. It guarantees that the write arrives to the device before
618 * the queue lock is released and another start_xmit is called (possibly
619 * on another CPU). Without this barrier, the next doorbell can bypass
620 * this doorbell. This is applicable to IA64/Altix systems.
621 */
622 mmiowb();
623
624 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
625 < (MAX_SKB_FRAGS + 1))) {
626 netif_tx_stop_queue(netdev_txq);
627 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
628 "Stop queue was called\n");
629 /* paired memory barrier is in qede_tx_int(), we have to keep
630 * ordering of set_bit() in netif_tx_stop_queue() and read of
631 * fp->bd_tx_cons
632 */
633 smp_mb();
634
635 if (qed_chain_get_elem_left(&txq->tx_pbl)
636 >= (MAX_SKB_FRAGS + 1) &&
637 (edev->state == QEDE_STATE_OPEN)) {
638 netif_tx_wake_queue(netdev_txq);
639 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
640 "Wake queue was called\n");
641 }
642 }
643
644 return NETDEV_TX_OK;
645}
646
647static int qede_txq_has_work(struct qede_tx_queue *txq)
648{
649 u16 hw_bd_cons;
650
651 /* Tell compiler that consumer and producer can change */
652 barrier();
653 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
654 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
655 return 0;
656
657 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
658}
659
660static int qede_tx_int(struct qede_dev *edev,
661 struct qede_tx_queue *txq)
662{
663 struct netdev_queue *netdev_txq;
664 u16 hw_bd_cons;
665 unsigned int pkts_compl = 0, bytes_compl = 0;
666 int rc;
667
668 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
669
670 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
671 barrier();
672
673 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
674 int len = 0;
675
676 rc = qede_free_tx_pkt(edev, txq, &len);
677 if (rc) {
678 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
679 hw_bd_cons,
680 qed_chain_get_cons_idx(&txq->tx_pbl));
681 break;
682 }
683
684 bytes_compl += len;
685 pkts_compl++;
686 txq->sw_tx_cons++;
687 }
688
689 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
690
691 /* Need to make the tx_bd_cons update visible to start_xmit()
692 * before checking for netif_tx_queue_stopped(). Without the
693 * memory barrier, there is a small possibility that
694 * start_xmit() will miss it and cause the queue to be stopped
695 * forever.
696 * On the other hand we need an rmb() here to ensure the proper
697 * ordering of bit testing in the following
698 * netif_tx_queue_stopped(txq) call.
699 */
700 smp_mb();
701
702 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
703 /* Taking tx_lock is needed to prevent reenabling the queue
704 * while it's empty. This could have happen if rx_action() gets
705 * suspended in qede_tx_int() after the condition before
706 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
707 *
708 * stops the queue->sees fresh tx_bd_cons->releases the queue->
709 * sends some packets consuming the whole queue again->
710 * stops the queue
711 */
712
713 __netif_tx_lock(netdev_txq, smp_processor_id());
714
715 if ((netif_tx_queue_stopped(netdev_txq)) &&
716 (edev->state == QEDE_STATE_OPEN) &&
717 (qed_chain_get_elem_left(&txq->tx_pbl)
718 >= (MAX_SKB_FRAGS + 1))) {
719 netif_tx_wake_queue(netdev_txq);
720 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
721 "Wake queue was called\n");
722 }
723
724 __netif_tx_unlock(netdev_txq);
725 }
726
727 return 0;
728}
729
730static bool qede_has_rx_work(struct qede_rx_queue *rxq)
731{
732 u16 hw_comp_cons, sw_comp_cons;
733
734 /* Tell compiler that status block fields can change */
735 barrier();
736
737 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
738 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
739
740 return hw_comp_cons != sw_comp_cons;
741}
742
743static bool qede_has_tx_work(struct qede_fastpath *fp)
744{
745 u8 tc;
746
747 for (tc = 0; tc < fp->edev->num_tc; tc++)
748 if (qede_txq_has_work(&fp->txqs[tc]))
749 return true;
750 return false;
751}
752
fc48b7a6
YM		 753/* This function reuses the buffer(from an offset) from
754 * consumer index to producer index in the bd ring
2950219d 755 */
fc48b7a6
YM		 756static inline void qede_reuse_page(struct qede_dev *edev,
757 struct qede_rx_queue *rxq,
758 struct sw_rx_data *curr_cons)
2950219d 759{
2950219d 760 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 761 struct sw_rx_data *curr_prod;
762 dma_addr_t new_mapping;
2950219d 763
fc48b7a6
YM		 764 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
765 *curr_prod = *curr_cons;
2950219d 766
fc48b7a6
YM		 767 new_mapping = curr_prod->mapping + curr_prod->page_offset;
768
769 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
770 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 771
2950219d 772 rxq->sw_rx_prod++;
fc48b7a6
YM		 773 curr_cons->data = NULL;
774}
775
776static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
777 struct qede_rx_queue *rxq,
778 struct sw_rx_data *curr_cons)
779{
780 /* Move to the next segment in the page */
781 curr_cons->page_offset += rxq->rx_buf_seg_size;
782
783 if (curr_cons->page_offset == PAGE_SIZE) {
784 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
785 return -ENOMEM;
786
787 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
788 PAGE_SIZE, DMA_FROM_DEVICE);
789 } else {
790 /* Increment refcount of the page as we don't want
791 * network stack to take the ownership of the page
792 * which can be recycled multiple times by the driver.
793 */
794 atomic_inc(&curr_cons->data->_count);
795 qede_reuse_page(edev, rxq, curr_cons);
796 }
797
798 return 0;
2950219d
YM		 799}
800
801static inline void qede_update_rx_prod(struct qede_dev *edev,
802 struct qede_rx_queue *rxq)
803{
804 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
805 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
806 struct eth_rx_prod_data rx_prods = {0};
807
808 /* Update producers */
809 rx_prods.bd_prod = cpu_to_le16(bd_prod);
810 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
811
812 /* Make sure that the BD and SGE data is updated before updating the
813 * producers since FW might read the BD/SGE right after the producer
814 * is updated.
815 */
816 wmb();
817
818 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
819 (u32 *)&rx_prods);
820
821 /* mmiowb is needed to synchronize doorbell writes from more than one
822 * processor. It guarantees that the write arrives to the device before
823 * the napi lock is released and another qede_poll is called (possibly
824 * on another CPU). Without this barrier, the next doorbell can bypass
825 * this doorbell. This is applicable to IA64/Altix systems.
826 */
827 mmiowb();
828}
829
830static u32 qede_get_rxhash(struct qede_dev *edev,
831 u8 bitfields,
832 __le32 rss_hash,
833 enum pkt_hash_types *rxhash_type)
834{
835 enum rss_hash_type htype;
836
837 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
838
839 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
840 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
841 (htype == RSS_HASH_TYPE_IPV6)) ?
842 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
843 return le32_to_cpu(rss_hash);
844 }
845 *rxhash_type = PKT_HASH_TYPE_NONE;
846 return 0;
847}
848
849static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
850{
851 skb_checksum_none_assert(skb);
852
853 if (csum_flag & QEDE_CSUM_UNNECESSARY)
854 skb->ip_summed = CHECKSUM_UNNECESSARY;
855}
856
857static inline void qede_skb_receive(struct qede_dev *edev,
858 struct qede_fastpath *fp,
859 struct sk_buff *skb,
860 u16 vlan_tag)
861{
862 if (vlan_tag)
863 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
864 vlan_tag);
865
866 napi_gro_receive(&fp->napi, skb);
867}
868
55482edc
MC		 869static void qede_set_gro_params(struct qede_dev *edev,
870 struct sk_buff *skb,
871 struct eth_fast_path_rx_tpa_start_cqe *cqe)
872{
873 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
874
875 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
876 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
877 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
878 else
879 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
880
881 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
882 cqe->header_len;
883}
884
885static int qede_fill_frag_skb(struct qede_dev *edev,
886 struct qede_rx_queue *rxq,
887 u8 tpa_agg_index,
888 u16 len_on_bd)
889{
890 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
891 NUM_RX_BDS_MAX];
892 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
893 struct sk_buff *skb = tpa_info->skb;
894
895 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
896 goto out;
897
898 /* Add one frag and update the appropriate fields in the skb */
899 skb_fill_page_desc(skb, tpa_info->frag_id++,
900 current_bd->data, current_bd->page_offset,
901 len_on_bd);
902
903 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
904 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
905 goto out;
906 }
907
908 qed_chain_consume(&rxq->rx_bd_ring);
909 rxq->sw_rx_cons++;
910
911 skb->data_len += len_on_bd;
912 skb->truesize += rxq->rx_buf_seg_size;
913 skb->len += len_on_bd;
914
915 return 0;
916
917out:
918 return -ENOMEM;
919}
920
921static void qede_tpa_start(struct qede_dev *edev,
922 struct qede_rx_queue *rxq,
923 struct eth_fast_path_rx_tpa_start_cqe *cqe)
924{
925 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
926 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
927 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
928 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
929 dma_addr_t mapping = tpa_info->replace_buf_mapping;
930 struct sw_rx_data *sw_rx_data_cons;
931 struct sw_rx_data *sw_rx_data_prod;
932 enum pkt_hash_types rxhash_type;
933 u32 rxhash;
934
935 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
936 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
937
938 /* Use pre-allocated replacement buffer - we can't release the agg.
939 * start until its over and we don't want to risk allocation failing
940 * here, so re-allocate when aggregation will be over.
941 */
942 dma_unmap_addr_set(sw_rx_data_prod, mapping,
943 dma_unmap_addr(replace_buf, mapping));
944
945 sw_rx_data_prod->data = replace_buf->data;
946 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
947 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
948 sw_rx_data_prod->page_offset = replace_buf->page_offset;
949
950 rxq->sw_rx_prod++;
951
952 /* move partial skb from cons to pool (don't unmap yet)
953 * save mapping, incase we drop the packet later on.
954 */
955 tpa_info->start_buf = *sw_rx_data_cons;
956 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
957 le32_to_cpu(rx_bd_cons->addr.lo));
958
959 tpa_info->start_buf_mapping = mapping;
960 rxq->sw_rx_cons++;
961
962 /* set tpa state to start only if we are able to allocate skb
963 * for this aggregation, otherwise mark as error and aggregation will
964 * be dropped
965 */
966 tpa_info->skb = netdev_alloc_skb(edev->ndev,
967 le16_to_cpu(cqe->len_on_first_bd));
968 if (unlikely(!tpa_info->skb)) {
969 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
970 return;
971 }
972
973 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
974 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
975
976 /* Start filling in the aggregation info */
977 tpa_info->frag_id = 0;
978 tpa_info->agg_state = QEDE_AGG_STATE_START;
979
980 rxhash = qede_get_rxhash(edev, cqe->bitfields,
981 cqe->rss_hash, &rxhash_type);
982 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
983 if ((le16_to_cpu(cqe->pars_flags.flags) >>
984 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
985 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
986 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
987 else
988 tpa_info->vlan_tag = 0;
989
990 /* This is needed in order to enable forwarding support */
991 qede_set_gro_params(edev, tpa_info->skb, cqe);
992
993 if (likely(cqe->ext_bd_len_list[0]))
994 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
995 le16_to_cpu(cqe->ext_bd_len_list[0]));
996
997 if (unlikely(cqe->ext_bd_len_list[1])) {
998 DP_ERR(edev,
999 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1000 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1001 }
1002}
1003
1004static void qede_gro_ip_csum(struct sk_buff *skb)
1005{
1006 const struct iphdr *iph = ip_hdr(skb);
1007 struct tcphdr *th;
1008
1009 skb_set_network_header(skb, 0);
1010 skb_set_transport_header(skb, sizeof(struct iphdr));
1011 th = tcp_hdr(skb);
1012
1013 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1014 iph->saddr, iph->daddr, 0);
1015
1016 tcp_gro_complete(skb);
1017}
1018
1019static void qede_gro_ipv6_csum(struct sk_buff *skb)
1020{
1021 struct ipv6hdr *iph = ipv6_hdr(skb);
1022 struct tcphdr *th;
1023
1024 skb_set_network_header(skb, 0);
1025 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1026 th = tcp_hdr(skb);
1027
1028 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1029 &iph->saddr, &iph->daddr, 0);
1030 tcp_gro_complete(skb);
1031}
1032
1033static void qede_gro_receive(struct qede_dev *edev,
1034 struct qede_fastpath *fp,
1035 struct sk_buff *skb,
1036 u16 vlan_tag)
1037{
1038 if (skb_shinfo(skb)->gso_size) {
1039 switch (skb->protocol) {
1040 case htons(ETH_P_IP):
1041 qede_gro_ip_csum(skb);
1042 break;
1043 case htons(ETH_P_IPV6):
1044 qede_gro_ipv6_csum(skb);
1045 break;
1046 default:
1047 DP_ERR(edev,
1048 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1049 ntohs(skb->protocol));
1050 }
1051 }
1052
1053 skb_record_rx_queue(skb, fp->rss_id);
1054 qede_skb_receive(edev, fp, skb, vlan_tag);
1055}
1056
1057static inline void qede_tpa_cont(struct qede_dev *edev,
1058 struct qede_rx_queue *rxq,
1059 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1060{
1061 int i;
1062
1063 for (i = 0; cqe->len_list[i]; i++)
1064 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1065 le16_to_cpu(cqe->len_list[i]));
1066
1067 if (unlikely(i > 1))
1068 DP_ERR(edev,
1069 "Strange - TPA cont with more than a single len_list entry\n");
1070}
1071
1072static void qede_tpa_end(struct qede_dev *edev,
1073 struct qede_fastpath *fp,
1074 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1075{
1076 struct qede_rx_queue *rxq = fp->rxq;
1077 struct qede_agg_info *tpa_info;
1078 struct sk_buff *skb;
1079 int i;
1080
1081 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1082 skb = tpa_info->skb;
1083
1084 for (i = 0; cqe->len_list[i]; i++)
1085 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1086 le16_to_cpu(cqe->len_list[i]));
1087 if (unlikely(i > 1))
1088 DP_ERR(edev,
1089 "Strange - TPA emd with more than a single len_list entry\n");
1090
1091 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1092 goto err;
1093
1094 /* Sanity */
1095 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1096 DP_ERR(edev,
1097 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1098 cqe->num_of_bds, tpa_info->frag_id);
1099 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1100 DP_ERR(edev,
1101 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1102 le16_to_cpu(cqe->total_packet_len), skb->len);
1103
1104 memcpy(skb->data,
1105 page_address(tpa_info->start_buf.data) +
1106 tpa_info->start_cqe.placement_offset +
1107 tpa_info->start_buf.page_offset,
1108 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1109
1110 /* Recycle [mapped] start buffer for the next replacement */
1111 tpa_info->replace_buf = tpa_info->start_buf;
1112 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1113
1114 /* Finalize the SKB */
1115 skb->protocol = eth_type_trans(skb, edev->ndev);
1116 skb->ip_summed = CHECKSUM_UNNECESSARY;
1117
1118 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1119 * to skb_shinfo(skb)->gso_segs
1120 */
1121 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1122
1123 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1124
1125 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1126
1127 return;
1128err:
1129 /* The BD starting the aggregation is still mapped; Re-use it for
1130 * future aggregations [as replacement buffer]
1131 */
1132 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1133 sizeof(struct sw_rx_data));
1134 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1135 tpa_info->start_buf.data = NULL;
1136 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1137 dev_kfree_skb_any(tpa_info->skb);
1138 tpa_info->skb = NULL;
1139}
1140
2950219d
YM		 1141static u8 qede_check_csum(u16 flag)
1142{
1143 u16 csum_flag = 0;
1144 u8 csum = 0;
1145
1146 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1147 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
1148 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1149 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1150 csum = QEDE_CSUM_UNNECESSARY;
1151 }
1152
1153 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1154 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1155
1156 if (csum_flag & flag)
1157 return QEDE_CSUM_ERROR;
1158
1159 return csum;
1160}
1161
1162static int qede_rx_int(struct qede_fastpath *fp, int budget)
1163{
1164 struct qede_dev *edev = fp->edev;
1165 struct qede_rx_queue *rxq = fp->rxq;
1166
1167 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1168 int rx_pkt = 0;
1169 u8 csum_flag;
1170
1171 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1172 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1173
1174 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1175 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1176 * read before it is written by FW, then FW writes CQE and SB, and then
1177 * the CPU reads the hw_comp_cons, it will use an old CQE.
1178 */
1179 rmb();
1180
1181 /* Loop to complete all indicated BDs */
1182 while (sw_comp_cons != hw_comp_cons) {
1183 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1184 enum pkt_hash_types rxhash_type;
1185 enum eth_rx_cqe_type cqe_type;
1186 struct sw_rx_data *sw_rx_data;
1187 union eth_rx_cqe *cqe;
1188 struct sk_buff *skb;
fc48b7a6
YM		 1189 struct page *data;
1190 __le16 flags;
2950219d
YM		 1191 u16 len, pad;
1192 u32 rx_hash;
2950219d
YM		 1193
1194 /* Get the CQE from the completion ring */
1195 cqe = (union eth_rx_cqe *)
1196 qed_chain_consume(&rxq->rx_comp_ring);
1197 cqe_type = cqe->fast_path_regular.type;
1198
1199 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1200 edev->ops->eth_cqe_completion(
1201 edev->cdev, fp->rss_id,
1202 (struct eth_slow_path_rx_cqe *)cqe);
1203 goto next_cqe;
1204 }
1205
55482edc
MC		 1206 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1207 switch (cqe_type) {
1208 case ETH_RX_CQE_TYPE_TPA_START:
1209 qede_tpa_start(edev, rxq,
1210 &cqe->fast_path_tpa_start);
1211 goto next_cqe;
1212 case ETH_RX_CQE_TYPE_TPA_CONT:
1213 qede_tpa_cont(edev, rxq,
1214 &cqe->fast_path_tpa_cont);
1215 goto next_cqe;
1216 case ETH_RX_CQE_TYPE_TPA_END:
1217 qede_tpa_end(edev, fp,
1218 &cqe->fast_path_tpa_end);
1219 goto next_rx_only;
1220 default:
1221 break;
1222 }
1223 }
1224
2950219d
YM		 1225 /* Get the data from the SW ring */
1226 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1227 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1228 data = sw_rx_data->data;
1229
1230 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1231 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1232 pad = fp_cqe->placement_offset;
fc48b7a6 1233 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1234
fc48b7a6
YM		 1235 /* If this is an error packet then drop it */
1236 parse_flag = le16_to_cpu(flags);
2950219d 1237
fc48b7a6
YM		 1238 csum_flag = qede_check_csum(parse_flag);
1239 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1240 DP_NOTICE(edev,
1241 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1242 sw_comp_cons, parse_flag);
1243 rxq->rx_hw_errors++;
1244 qede_reuse_page(edev, rxq, sw_rx_data);
1245 goto next_rx;
1246 }
2950219d 1247
fc48b7a6
YM		 1248 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1249 if (unlikely(!skb)) {
2950219d 1250 DP_NOTICE(edev,
fc48b7a6
YM		 1251 "Build_skb failed, dropping incoming packet\n");
1252 qede_reuse_page(edev, rxq, sw_rx_data);
2950219d 1253 rxq->rx_alloc_errors++;
fc48b7a6
YM		 1254 goto next_rx;
1255 }
1256
1257 /* Copy data into SKB */
1258 if (len + pad <= QEDE_RX_HDR_SIZE) {
1259 memcpy(skb_put(skb, len),
1260 page_address(data) + pad +
1261 sw_rx_data->page_offset, len);
1262 qede_reuse_page(edev, rxq, sw_rx_data);
1263 } else {
1264 struct skb_frag_struct *frag;
1265 unsigned int pull_len;
1266 unsigned char *va;
1267
1268 frag = &skb_shinfo(skb)->frags[0];
1269
1270 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1271 pad + sw_rx_data->page_offset,
1272 len, rxq->rx_buf_seg_size);
1273
1274 va = skb_frag_address(frag);
1275 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1276
1277 /* Align the pull_len to optimize memcpy */
1278 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1279
1280 skb_frag_size_sub(frag, pull_len);
1281 frag->page_offset += pull_len;
1282 skb->data_len -= pull_len;
1283 skb->tail += pull_len;
1284
1285 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1286 sw_rx_data))) {
1287 DP_ERR(edev, "Failed to allocate rx buffer\n");
1288 rxq->rx_alloc_errors++;
1289 goto next_cqe;
1290 }
2950219d
YM		 1291 }
1292
fc48b7a6
YM		 1293 if (fp_cqe->bd_num != 1) {
1294 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1295 u8 num_frags;
1296
1297 pkt_len -= len;
1298
1299 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1300 num_frags--) {
1301 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1302 rxq->rx_buf_size : pkt_len;
1303
1304 WARN_ONCE(!cur_size,
1305 "Still got %d BDs for mapping jumbo, but length became 0\n",
1306 num_frags);
1307
1308 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
1309 goto next_cqe;
1310
1311 rxq->sw_rx_cons++;
1312 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1313 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1314 qed_chain_consume(&rxq->rx_bd_ring);
1315 dma_unmap_page(&edev->pdev->dev,
1316 sw_rx_data->mapping,
1317 PAGE_SIZE, DMA_FROM_DEVICE);
1318
1319 skb_fill_page_desc(skb,
1320 skb_shinfo(skb)->nr_frags++,
1321 sw_rx_data->data, 0,
1322 cur_size);
1323
1324 skb->truesize += PAGE_SIZE;
1325 skb->data_len += cur_size;
1326 skb->len += cur_size;
1327 pkt_len -= cur_size;
1328 }
2950219d 1329
fc48b7a6
YM		 1330 if (pkt_len)
1331 DP_ERR(edev,
1332 "Mapped all BDs of jumbo, but still have %d bytes\n",
1333 pkt_len);
1334 }
2950219d
YM		 1335
1336 skb->protocol = eth_type_trans(skb, edev->ndev);
1337
1338 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1339 fp_cqe->rss_hash,
1340 &rxhash_type);
1341
1342 skb_set_hash(skb, rx_hash, rxhash_type);
1343
1344 qede_set_skb_csum(skb, csum_flag);
1345
1346 skb_record_rx_queue(skb, fp->rss_id);
1347
1348 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1349
1350 qed_chain_consume(&rxq->rx_bd_ring);
2950219d
YM		 1351next_rx:
1352 rxq->sw_rx_cons++;
55482edc 1353next_rx_only:
2950219d
YM		 1354 rx_pkt++;
1355
1356next_cqe: /* don't consume bd rx buffer */
1357 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1358 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1359 /* CR TPA - revisit how to handle budget in TPA perhaps
1360 * increase on "end"
1361 */
1362 if (rx_pkt == budget)
1363 break;
1364 } /* repeat while sw_comp_cons != hw_comp_cons... */
1365
1366 /* Update producers */
1367 qede_update_rx_prod(edev, rxq);
1368
1369 return rx_pkt;
1370}
1371
1372static int qede_poll(struct napi_struct *napi, int budget)
1373{
1374 int work_done = 0;
1375 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1376 napi);
1377 struct qede_dev *edev = fp->edev;
1378
1379 while (1) {
1380 u8 tc;
1381
1382 for (tc = 0; tc < edev->num_tc; tc++)
1383 if (qede_txq_has_work(&fp->txqs[tc]))
1384 qede_tx_int(edev, &fp->txqs[tc]);
1385
1386 if (qede_has_rx_work(fp->rxq)) {
1387 work_done += qede_rx_int(fp, budget - work_done);
1388
1389 /* must not complete if we consumed full budget */
1390 if (work_done >= budget)
1391 break;
1392 }
1393
1394 /* Fall out from the NAPI loop if needed */
1395 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1396 qed_sb_update_sb_idx(fp->sb_info);
1397 /* *_has_*_work() reads the status block,
1398 * thus we need to ensure that status block indices
1399 * have been actually read (qed_sb_update_sb_idx)
1400 * prior to this check (*_has_*_work) so that
1401 * we won't write the "newer" value of the status block
1402 * to HW (if there was a DMA right after
1403 * qede_has_rx_work and if there is no rmb, the memory
1404 * reading (qed_sb_update_sb_idx) may be postponed
1405 * to right before *_ack_sb). In this case there
1406 * will never be another interrupt until there is
1407 * another update of the status block, while there
1408 * is still unhandled work.
1409 */
1410 rmb();
1411
1412 if (!(qede_has_rx_work(fp->rxq) ||
1413 qede_has_tx_work(fp))) {
1414 napi_complete(napi);
1415 /* Update and reenable interrupts */
1416 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1417 1 /*update*/);
1418 break;
1419 }
1420 }
1421 }
1422
1423 return work_done;
1424}
1425
1426static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1427{
1428 struct qede_fastpath *fp = fp_cookie;
1429
1430 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1431
1432 napi_schedule_irqoff(&fp->napi);
1433 return IRQ_HANDLED;
1434}
1435
1436/* -------------------------------------------------------------------------
1437 * END OF FAST-PATH
1438 * -------------------------------------------------------------------------
1439 */
1440
1441static int qede_open(struct net_device *ndev);
1442static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1443static int qede_set_mac_addr(struct net_device *ndev, void *p);
1444static void qede_set_rx_mode(struct net_device *ndev);
1445static void qede_config_rx_mode(struct net_device *ndev);
1446
1447static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1448 enum qed_filter_xcast_params_type opcode,
1449 unsigned char mac[ETH_ALEN])
1450{
1451 struct qed_filter_params filter_cmd;
1452
1453 memset(&filter_cmd, 0, sizeof(filter_cmd));
1454 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1455 filter_cmd.filter.ucast.type = opcode;
1456 filter_cmd.filter.ucast.mac_valid = 1;
1457 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1458
1459 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1460}
1461
7c1bfcad
SRK		 1462static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1463 enum qed_filter_xcast_params_type opcode,
1464 u16 vid)
1465{
1466 struct qed_filter_params filter_cmd;
1467
1468 memset(&filter_cmd, 0, sizeof(filter_cmd));
1469 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1470 filter_cmd.filter.ucast.type = opcode;
1471 filter_cmd.filter.ucast.vlan_valid = 1;
1472 filter_cmd.filter.ucast.vlan = vid;
1473
1474 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1475}
1476
133fac0e
SK		 1477void qede_fill_by_demand_stats(struct qede_dev *edev)
1478{
1479 struct qed_eth_stats stats;
1480
1481 edev->ops->get_vport_stats(edev->cdev, &stats);
1482 edev->stats.no_buff_discards = stats.no_buff_discards;
1483 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1484 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1485 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1486 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1487 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1488 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1489 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1490 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1491
1492 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1493 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1494 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1495 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1496 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1497 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1498 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1499 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1500 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1501 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1502 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1503 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1504
1505 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1506 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1507 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1508 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1509 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1510 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1511 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1512 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1513 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1514 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1515 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1516 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1517 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1518 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1519 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1520 edev->stats.rx_align_errors = stats.rx_align_errors;
1521 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1522 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1523 edev->stats.rx_jabbers = stats.rx_jabbers;
1524 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1525 edev->stats.rx_fragments = stats.rx_fragments;
1526 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1527 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1528 edev->stats.tx_128_to_255_byte_packets =
1529 stats.tx_128_to_255_byte_packets;
1530 edev->stats.tx_256_to_511_byte_packets =
1531 stats.tx_256_to_511_byte_packets;
1532 edev->stats.tx_512_to_1023_byte_packets =
1533 stats.tx_512_to_1023_byte_packets;
1534 edev->stats.tx_1024_to_1518_byte_packets =
1535 stats.tx_1024_to_1518_byte_packets;
1536 edev->stats.tx_1519_to_2047_byte_packets =
1537 stats.tx_1519_to_2047_byte_packets;
1538 edev->stats.tx_2048_to_4095_byte_packets =
1539 stats.tx_2048_to_4095_byte_packets;
1540 edev->stats.tx_4096_to_9216_byte_packets =
1541 stats.tx_4096_to_9216_byte_packets;
1542 edev->stats.tx_9217_to_16383_byte_packets =
1543 stats.tx_9217_to_16383_byte_packets;
1544 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1545 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1546 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1547 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1548 edev->stats.brb_truncates = stats.brb_truncates;
1549 edev->stats.brb_discards = stats.brb_discards;
1550 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1551}
1552
1553static struct rtnl_link_stats64 *qede_get_stats64(
1554 struct net_device *dev,
1555 struct rtnl_link_stats64 *stats)
1556{
1557 struct qede_dev *edev = netdev_priv(dev);
1558
1559 qede_fill_by_demand_stats(edev);
1560
1561 stats->rx_packets = edev->stats.rx_ucast_pkts +
1562 edev->stats.rx_mcast_pkts +
1563 edev->stats.rx_bcast_pkts;
1564 stats->tx_packets = edev->stats.tx_ucast_pkts +
1565 edev->stats.tx_mcast_pkts +
1566 edev->stats.tx_bcast_pkts;
1567
1568 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1569 edev->stats.rx_mcast_bytes +
1570 edev->stats.rx_bcast_bytes;
1571
1572 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1573 edev->stats.tx_mcast_bytes +
1574 edev->stats.tx_bcast_bytes;
1575
1576 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1577 stats->multicast = edev->stats.rx_mcast_pkts +
1578 edev->stats.rx_bcast_pkts;
1579
1580 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1581
1582 stats->collisions = edev->stats.tx_total_collisions;
1583 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1584 stats->rx_frame_errors = edev->stats.rx_align_errors;
1585
1586 return stats;
1587}
1588
7c1bfcad
SRK		 1589static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1590{
1591 struct qed_update_vport_params params;
1592 int rc;
1593
1594 /* Proceed only if action actually needs to be performed */
1595 if (edev->accept_any_vlan == action)
1596 return;
1597
1598 memset(&params, 0, sizeof(params));
1599
1600 params.vport_id = 0;
1601 params.accept_any_vlan = action;
1602 params.update_accept_any_vlan_flg = 1;
1603
1604 rc = edev->ops->vport_update(edev->cdev, &params);
1605 if (rc) {
1606 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1607 action ? "enable" : "disable");
1608 } else {
1609 DP_INFO(edev, "%s accept-any-vlan\n",
1610 action ? "enabled" : "disabled");
1611 edev->accept_any_vlan = action;
1612 }
1613}
1614
1615static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1616{
1617 struct qede_dev *edev = netdev_priv(dev);
1618 struct qede_vlan *vlan, *tmp;
1619 int rc;
1620
1621 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1622
1623 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1624 if (!vlan) {
1625 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1626 return -ENOMEM;
1627 }
1628 INIT_LIST_HEAD(&vlan->list);
1629 vlan->vid = vid;
1630 vlan->configured = false;
1631
1632 /* Verify vlan isn't already configured */
1633 list_for_each_entry(tmp, &edev->vlan_list, list) {
1634 if (tmp->vid == vlan->vid) {
1635 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1636 "vlan already configured\n");
1637 kfree(vlan);
1638 return -EEXIST;
1639 }
1640 }
1641
1642 /* If interface is down, cache this VLAN ID and return */
1643 if (edev->state != QEDE_STATE_OPEN) {
1644 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1645 "Interface is down, VLAN %d will be configured when interface is up\n",
1646 vid);
1647 if (vid != 0)
1648 edev->non_configured_vlans++;
1649 list_add(&vlan->list, &edev->vlan_list);
1650
1651 return 0;
1652 }
1653
1654 /* Check for the filter limit.
1655 * Note - vlan0 has a reserved filter and can be added without
1656 * worrying about quota
1657 */
1658 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1659 (vlan->vid == 0)) {
1660 rc = qede_set_ucast_rx_vlan(edev,
1661 QED_FILTER_XCAST_TYPE_ADD,
1662 vlan->vid);
1663 if (rc) {
1664 DP_ERR(edev, "Failed to configure VLAN %d\n",
1665 vlan->vid);
1666 kfree(vlan);
1667 return -EINVAL;
1668 }
1669 vlan->configured = true;
1670
1671 /* vlan0 filter isn't consuming out of our quota */
1672 if (vlan->vid != 0)
1673 edev->configured_vlans++;
1674 } else {
1675 /* Out of quota; Activate accept-any-VLAN mode */
1676 if (!edev->non_configured_vlans)
1677 qede_config_accept_any_vlan(edev, true);
1678
1679 edev->non_configured_vlans++;
1680 }
1681
1682 list_add(&vlan->list, &edev->vlan_list);
1683
1684 return 0;
1685}
1686
1687static void qede_del_vlan_from_list(struct qede_dev *edev,
1688 struct qede_vlan *vlan)
1689{
1690 /* vlan0 filter isn't consuming out of our quota */
1691 if (vlan->vid != 0) {
1692 if (vlan->configured)
1693 edev->configured_vlans--;
1694 else
1695 edev->non_configured_vlans--;
1696 }
1697
1698 list_del(&vlan->list);
1699 kfree(vlan);
1700}
1701
1702static int qede_configure_vlan_filters(struct qede_dev *edev)
1703{
1704 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1705 struct qed_dev_eth_info *dev_info;
1706 struct qede_vlan *vlan = NULL;
1707
1708 if (list_empty(&edev->vlan_list))
1709 return 0;
1710
1711 dev_info = &edev->dev_info;
1712
1713 /* Configure non-configured vlans */
1714 list_for_each_entry(vlan, &edev->vlan_list, list) {
1715 if (vlan->configured)
1716 continue;
1717
1718 /* We have used all our credits, now enable accept_any_vlan */
1719 if ((vlan->vid != 0) &&
1720 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1721 accept_any_vlan = 1;
1722 continue;
1723 }
1724
1725 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1726
1727 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1728 vlan->vid);
1729 if (rc) {
1730 DP_ERR(edev, "Failed to configure VLAN %u\n",
1731 vlan->vid);
1732 real_rc = rc;
1733 continue;
1734 }
1735
1736 vlan->configured = true;
1737 /* vlan0 filter doesn't consume our VLAN filter's quota */
1738 if (vlan->vid != 0) {
1739 edev->non_configured_vlans--;
1740 edev->configured_vlans++;
1741 }
1742 }
1743
1744 /* enable accept_any_vlan mode if we have more VLANs than credits,
1745 * or remove accept_any_vlan mode if we've actually removed
1746 * a non-configured vlan, and all remaining vlans are truly configured.
1747 */
1748
1749 if (accept_any_vlan)
1750 qede_config_accept_any_vlan(edev, true);
1751 else if (!edev->non_configured_vlans)
1752 qede_config_accept_any_vlan(edev, false);
1753
1754 return real_rc;
1755}
1756
1757static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1758{
1759 struct qede_dev *edev = netdev_priv(dev);
1760 struct qede_vlan *vlan = NULL;
1761 int rc;
1762
1763 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1764
1765 /* Find whether entry exists */
1766 list_for_each_entry(vlan, &edev->vlan_list, list)
1767 if (vlan->vid == vid)
1768 break;
1769
1770 if (!vlan || (vlan->vid != vid)) {
1771 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1772 "Vlan isn't configured\n");
1773 return 0;
1774 }
1775
1776 if (edev->state != QEDE_STATE_OPEN) {
1777 /* As interface is already down, we don't have a VPORT
1778 * instance to remove vlan filter. So just update vlan list
1779 */
1780 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1781 "Interface is down, removing VLAN from list only\n");
1782 qede_del_vlan_from_list(edev, vlan);
1783 return 0;
1784 }
1785
1786 /* Remove vlan */
1787 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1788 if (rc) {
1789 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1790 return -EINVAL;
1791 }
1792
1793 qede_del_vlan_from_list(edev, vlan);
1794
1795 /* We have removed a VLAN - try to see if we can
1796 * configure non-configured VLAN from the list.
1797 */
1798 rc = qede_configure_vlan_filters(edev);
1799
1800 return rc;
1801}
1802
1803static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1804{
1805 struct qede_vlan *vlan = NULL;
1806
1807 if (list_empty(&edev->vlan_list))
1808 return;
1809
1810 list_for_each_entry(vlan, &edev->vlan_list, list) {
1811 if (!vlan->configured)
1812 continue;
1813
1814 vlan->configured = false;
1815
1816 /* vlan0 filter isn't consuming out of our quota */
1817 if (vlan->vid != 0) {
1818 edev->non_configured_vlans++;
1819 edev->configured_vlans--;
1820 }
1821
1822 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1823 "marked vlan %d as non-configured\n",
1824 vlan->vid);
1825 }
1826
1827 edev->accept_any_vlan = false;
1828}
1829
2950219d
YM		 1830static const struct net_device_ops qede_netdev_ops = {
1831 .ndo_open = qede_open,
1832 .ndo_stop = qede_close,
1833 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1834 .ndo_set_rx_mode = qede_set_rx_mode,
1835 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1836 .ndo_validate_addr = eth_validate_addr,
133fac0e 1837 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 1838 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1839 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 1840 .ndo_get_stats64 = qede_get_stats64,
2950219d
YM		 1841};
1842
e712d52b
YM		 1843/* -------------------------------------------------------------------------
1844 * START OF PROBE / REMOVE
1845 * -------------------------------------------------------------------------
1846 */
1847
1848static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1849 struct pci_dev *pdev,
1850 struct qed_dev_eth_info *info,
1851 u32 dp_module,
1852 u8 dp_level)
1853{
1854 struct net_device *ndev;
1855 struct qede_dev *edev;
1856
1857 ndev = alloc_etherdev_mqs(sizeof(*edev),
1858 info->num_queues,
1859 info->num_queues);
1860 if (!ndev) {
1861 pr_err("etherdev allocation failed\n");
1862 return NULL;
1863 }
1864
1865 edev = netdev_priv(ndev);
1866 edev->ndev = ndev;
1867 edev->cdev = cdev;
1868 edev->pdev = pdev;
1869 edev->dp_module = dp_module;
1870 edev->dp_level = dp_level;
1871 edev->ops = qed_ops;
2950219d
YM		 1872 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1873 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1874
1875 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1876
1877 SET_NETDEV_DEV(ndev, &pdev->dev);
1878
133fac0e 1879 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1880 memcpy(&edev->dev_info, info, sizeof(*info));
1881
1882 edev->num_tc = edev->dev_info.num_tc;
1883
7c1bfcad
SRK		 1884 INIT_LIST_HEAD(&edev->vlan_list);
1885
e712d52b
YM		 1886 return edev;
1887}
1888
1889static void qede_init_ndev(struct qede_dev *edev)
1890{
1891 struct net_device *ndev = edev->ndev;
1892 struct pci_dev *pdev = edev->pdev;
1893 u32 hw_features;
1894
1895 pci_set_drvdata(pdev, ndev);
1896
1897 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1898 ndev->base_addr = ndev->mem_start;
1899 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1900 ndev->irq = edev->dev_info.common.pci_irq;
1901
1902 ndev->watchdog_timeo = TX_TIMEOUT;
1903
2950219d
YM		 1904 ndev->netdev_ops = &qede_netdev_ops;
1905
133fac0e
SK		 1906 qede_set_ethtool_ops(ndev);
1907
e712d52b
YM		 1908 /* user-changeble features */
1909 hw_features = NETIF_F_GRO | NETIF_F_SG |
1910 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1911 NETIF_F_TSO | NETIF_F_TSO6;
1912
1913 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1914 NETIF_F_HIGHDMA;
1915 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1916 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 1917 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 1918
1919 ndev->hw_features = hw_features;
1920
1921 /* Set network device HW mac */
1922 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1923}
1924
1925/* This function converts from 32b param to two params of level and module
1926 * Input 32b decoding:
1927 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1928 * 'happy' flow, e.g. memory allocation failed.
1929 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1930 * and provide important parameters.
1931 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1932 * module. VERBOSE prints are for tracking the specific flow in low level.
1933 *
1934 * Notice that the level should be that of the lowest required logs.
1935 */
133fac0e 1936void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 1937{
1938 *p_dp_level = QED_LEVEL_NOTICE;
1939 *p_dp_module = 0;
1940
1941 if (debug & QED_LOG_VERBOSE_MASK) {
1942 *p_dp_level = QED_LEVEL_VERBOSE;
1943 *p_dp_module = (debug & 0x3FFFFFFF);
1944 } else if (debug & QED_LOG_INFO_MASK) {
1945 *p_dp_level = QED_LEVEL_INFO;
1946 } else if (debug & QED_LOG_NOTICE_MASK) {
1947 *p_dp_level = QED_LEVEL_NOTICE;
1948 }
1949}
1950
2950219d
YM		 1951static void qede_free_fp_array(struct qede_dev *edev)
1952{
1953 if (edev->fp_array) {
1954 struct qede_fastpath *fp;
1955 int i;
1956
1957 for_each_rss(i) {
1958 fp = &edev->fp_array[i];
1959
1960 kfree(fp->sb_info);
1961 kfree(fp->rxq);
1962 kfree(fp->txqs);
1963 }
1964 kfree(edev->fp_array);
1965 }
1966 edev->num_rss = 0;
1967}
1968
1969static int qede_alloc_fp_array(struct qede_dev *edev)
1970{
1971 struct qede_fastpath *fp;
1972 int i;
1973
1974 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
1975 sizeof(*edev->fp_array), GFP_KERNEL);
1976 if (!edev->fp_array) {
1977 DP_NOTICE(edev, "fp array allocation failed\n");
1978 goto err;
1979 }
1980
1981 for_each_rss(i) {
1982 fp = &edev->fp_array[i];
1983
1984 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
1985 if (!fp->sb_info) {
1986 DP_NOTICE(edev, "sb info struct allocation failed\n");
1987 goto err;
1988 }
1989
1990 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
1991 if (!fp->rxq) {
1992 DP_NOTICE(edev, "RXQ struct allocation failed\n");
1993 goto err;
1994 }
1995
1996 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
1997 if (!fp->txqs) {
1998 DP_NOTICE(edev, "TXQ array allocation failed\n");
1999 goto err;
2000 }
2001 }
2002
2003 return 0;
2004err:
2005 qede_free_fp_array(edev);
2006 return -ENOMEM;
2007}
2008
0d8e0aa0
SK		 2009static void qede_sp_task(struct work_struct *work)
2010{
2011 struct qede_dev *edev = container_of(work, struct qede_dev,
2012 sp_task.work);
2013 mutex_lock(&edev->qede_lock);
2014
2015 if (edev->state == QEDE_STATE_OPEN) {
2016 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2017 qede_config_rx_mode(edev->ndev);
2018 }
2019
2020 mutex_unlock(&edev->qede_lock);
2021}
2022
e712d52b
YM		 2023static void qede_update_pf_params(struct qed_dev *cdev)
2024{
2025 struct qed_pf_params pf_params;
2026
2027 /* 16 rx + 16 tx */
2028 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2029 pf_params.eth_pf_params.num_cons = 32;
2030 qed_ops->common->update_pf_params(cdev, &pf_params);
2031}
2032
2033enum qede_probe_mode {
2034 QEDE_PROBE_NORMAL,
2035};
2036
2037static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2038 enum qede_probe_mode mode)
2039{
2040 struct qed_slowpath_params params;
2041 struct qed_dev_eth_info dev_info;
2042 struct qede_dev *edev;
2043 struct qed_dev *cdev;
2044 int rc;
2045
2046 if (unlikely(dp_level & QED_LEVEL_INFO))
2047 pr_notice("Starting qede probe\n");
2048
2049 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2050 dp_module, dp_level);
2051 if (!cdev) {
2052 rc = -ENODEV;
2053 goto err0;
2054 }
2055
2056 qede_update_pf_params(cdev);
2057
2058 /* Start the Slowpath-process */
2059 memset(&params, 0, sizeof(struct qed_slowpath_params));
2060 params.int_mode = QED_INT_MODE_MSIX;
2061 params.drv_major = QEDE_MAJOR_VERSION;
2062 params.drv_minor = QEDE_MINOR_VERSION;
2063 params.drv_rev = QEDE_REVISION_VERSION;
2064 params.drv_eng = QEDE_ENGINEERING_VERSION;
2065 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2066 rc = qed_ops->common->slowpath_start(cdev, &params);
2067 if (rc) {
2068 pr_notice("Cannot start slowpath\n");
2069 goto err1;
2070 }
2071
2072 /* Learn information crucial for qede to progress */
2073 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2074 if (rc)
2075 goto err2;
2076
2077 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2078 dp_level);
2079 if (!edev) {
2080 rc = -ENOMEM;
2081 goto err2;
2082 }
2083
2084 qede_init_ndev(edev);
2085
2950219d
YM		 2086 rc = register_netdev(edev->ndev);
2087 if (rc) {
2088 DP_NOTICE(edev, "Cannot register net-device\n");
2089 goto err3;
2090 }
2091
e712d52b
YM		 2092 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2093
a2ec6172
SK		 2094 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2095
0d8e0aa0
SK		 2096 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2097 mutex_init(&edev->qede_lock);
2098
e712d52b
YM		 2099 DP_INFO(edev, "Ending successfully qede probe\n");
2100
2101 return 0;
2102
2950219d
YM		 2103err3:
2104 free_netdev(edev->ndev);
e712d52b
YM		 2105err2:
2106 qed_ops->common->slowpath_stop(cdev);
2107err1:
2108 qed_ops->common->remove(cdev);
2109err0:
2110 return rc;
2111}
2112
2113static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2114{
2115 u32 dp_module = 0;
2116 u8 dp_level = 0;
2117
2118 qede_config_debug(debug, &dp_module, &dp_level);
2119
2120 return __qede_probe(pdev, dp_module, dp_level,
2121 QEDE_PROBE_NORMAL);
2122}
2123
2124enum qede_remove_mode {
2125 QEDE_REMOVE_NORMAL,
2126};
2127
2128static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2129{
2130 struct net_device *ndev = pci_get_drvdata(pdev);
2131 struct qede_dev *edev = netdev_priv(ndev);
2132 struct qed_dev *cdev = edev->cdev;
2133
2134 DP_INFO(edev, "Starting qede_remove\n");
2135
0d8e0aa0 2136 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2137 unregister_netdev(ndev);
2138
e712d52b
YM		 2139 edev->ops->common->set_power_state(cdev, PCI_D0);
2140
2141 pci_set_drvdata(pdev, NULL);
2142
2143 free_netdev(ndev);
2144
2145 /* Use global ops since we've freed edev */
2146 qed_ops->common->slowpath_stop(cdev);
2147 qed_ops->common->remove(cdev);
2148
2149 pr_notice("Ending successfully qede_remove\n");
2150}
2151
2152static void qede_remove(struct pci_dev *pdev)
2153{
2154 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2155}
2950219d
YM		 2156
2157/* -------------------------------------------------------------------------
2158 * START OF LOAD / UNLOAD
2159 * -------------------------------------------------------------------------
2160 */
2161
2162static int qede_set_num_queues(struct qede_dev *edev)
2163{
2164 int rc;
2165 u16 rss_num;
2166
2167 /* Setup queues according to possible resources*/
8edf049d
SK		 2168 if (edev->req_rss)
2169 rss_num = edev->req_rss;
2170 else
2171 rss_num = netif_get_num_default_rss_queues() *
2172 edev->dev_info.common.num_hwfns;
2950219d
YM		 2173
2174 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2175
2176 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2177 if (rc > 0) {
2178 /* Managed to request interrupts for our queues */
2179 edev->num_rss = rc;
2180 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2181 QEDE_RSS_CNT(edev), rss_num);
2182 rc = 0;
2183 }
2184 return rc;
2185}
2186
2187static void qede_free_mem_sb(struct qede_dev *edev,
2188 struct qed_sb_info *sb_info)
2189{
2190 if (sb_info->sb_virt)
2191 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2192 (void *)sb_info->sb_virt, sb_info->sb_phys);
2193}
2194
2195/* This function allocates fast-path status block memory */
2196static int qede_alloc_mem_sb(struct qede_dev *edev,
2197 struct qed_sb_info *sb_info,
2198 u16 sb_id)
2199{
2200 struct status_block *sb_virt;
2201 dma_addr_t sb_phys;
2202 int rc;
2203
2204 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2205 sizeof(*sb_virt),
2206 &sb_phys, GFP_KERNEL);
2207 if (!sb_virt) {
2208 DP_ERR(edev, "Status block allocation failed\n");
2209 return -ENOMEM;
2210 }
2211
2212 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2213 sb_virt, sb_phys, sb_id,
2214 QED_SB_TYPE_L2_QUEUE);
2215 if (rc) {
2216 DP_ERR(edev, "Status block initialization failed\n");
2217 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2218 sb_virt, sb_phys);
2219 return rc;
2220 }
2221
2222 return 0;
2223}
2224
2225static void qede_free_rx_buffers(struct qede_dev *edev,
2226 struct qede_rx_queue *rxq)
2227{
2228 u16 i;
2229
2230 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2231 struct sw_rx_data *rx_buf;
fc48b7a6 2232 struct page *data;
2950219d
YM		 2233
2234 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2235 data = rx_buf->data;
2236
fc48b7a6
YM		 2237 dma_unmap_page(&edev->pdev->dev,
2238 rx_buf->mapping,
2239 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2240
2241 rx_buf->data = NULL;
fc48b7a6 2242 __free_page(data);
2950219d
YM		 2243 }
2244}
2245
55482edc
MC		 2246static void qede_free_sge_mem(struct qede_dev *edev,
2247 struct qede_rx_queue *rxq) {
2248 int i;
2249
2250 if (edev->gro_disable)
2251 return;
2252
2253 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2254 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2255 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2256
2257 if (replace_buf) {
2258 dma_unmap_page(&edev->pdev->dev,
2259 dma_unmap_addr(replace_buf, mapping),
2260 PAGE_SIZE, DMA_FROM_DEVICE);
2261 __free_page(replace_buf->data);
2262 }
2263 }
2264}
2265
2950219d
YM		 2266static void qede_free_mem_rxq(struct qede_dev *edev,
2267 struct qede_rx_queue *rxq)
2268{
55482edc
MC		 2269 qede_free_sge_mem(edev, rxq);
2270
2950219d
YM		 2271 /* Free rx buffers */
2272 qede_free_rx_buffers(edev, rxq);
2273
2274 /* Free the parallel SW ring */
2275 kfree(rxq->sw_rx_ring);
2276
2277 /* Free the real RQ ring used by FW */
2278 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2279 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2280}
2281
2282static int qede_alloc_rx_buffer(struct qede_dev *edev,
2283 struct qede_rx_queue *rxq)
2284{
2285 struct sw_rx_data *sw_rx_data;
2286 struct eth_rx_bd *rx_bd;
2287 dma_addr_t mapping;
fc48b7a6 2288 struct page *data;
2950219d 2289 u16 rx_buf_size;
2950219d
YM		 2290
2291 rx_buf_size = rxq->rx_buf_size;
2292
fc48b7a6 2293 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2294 if (unlikely(!data)) {
fc48b7a6 2295 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2296 return -ENOMEM;
2297 }
2298
fc48b7a6
YM		 2299 /* Map the entire page as it would be used
2300 * for multiple RX buffer segment size mapping.
2301 */
2302 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2303 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2304 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2305 __free_page(data);
2950219d
YM		 2306 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2307 return -ENOMEM;
2308 }
2309
2310 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2311 sw_rx_data->page_offset = 0;
2950219d 2312 sw_rx_data->data = data;
fc48b7a6 2313 sw_rx_data->mapping = mapping;
2950219d
YM		 2314
2315 /* Advance PROD and get BD pointer */
2316 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2317 WARN_ON(!rx_bd);
2318 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2319 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2320
2321 rxq->sw_rx_prod++;
2322
2323 return 0;
2324}
2325
55482edc
MC		 2326static int qede_alloc_sge_mem(struct qede_dev *edev,
2327 struct qede_rx_queue *rxq)
2328{
2329 dma_addr_t mapping;
2330 int i;
2331
2332 if (edev->gro_disable)
2333 return 0;
2334
2335 if (edev->ndev->mtu > PAGE_SIZE) {
2336 edev->gro_disable = 1;
2337 return 0;
2338 }
2339
2340 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2341 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2342 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2343
2344 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2345 if (unlikely(!replace_buf->data)) {
2346 DP_NOTICE(edev,
2347 "Failed to allocate TPA skb pool [replacement buffer]\n");
2348 goto err;
2349 }
2350
2351 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2352 rxq->rx_buf_size, DMA_FROM_DEVICE);
2353 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2354 DP_NOTICE(edev,
2355 "Failed to map TPA replacement buffer\n");
2356 goto err;
2357 }
2358
2359 dma_unmap_addr_set(replace_buf, mapping, mapping);
2360 tpa_info->replace_buf.page_offset = 0;
2361
2362 tpa_info->replace_buf_mapping = mapping;
2363 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2364 }
2365
2366 return 0;
2367err:
2368 qede_free_sge_mem(edev, rxq);
2369 edev->gro_disable = 1;
2370 return -ENOMEM;
2371}
2372
2950219d
YM		 2373/* This function allocates all memory needed per Rx queue */
2374static int qede_alloc_mem_rxq(struct qede_dev *edev,
2375 struct qede_rx_queue *rxq)
2376{
2377 int i, rc, size, num_allocated;
2378
2379 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2380
fc48b7a6
YM		 2381 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2382 edev->ndev->mtu;
2383 if (rxq->rx_buf_size > PAGE_SIZE)
2384 rxq->rx_buf_size = PAGE_SIZE;
2385
2386 /* Segment size to spilt a page in multiple equal parts */
2387 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2388
2389 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2390 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2391 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2392 if (!rxq->sw_rx_ring) {
2393 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2394 goto err;
2395 }
2396
2397 /* Allocate FW Rx ring */
2398 rc = edev->ops->common->chain_alloc(edev->cdev,
2399 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2400 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2401 RX_RING_SIZE,
2950219d
YM		 2402 sizeof(struct eth_rx_bd),
2403 &rxq->rx_bd_ring);
2404
2405 if (rc)
2406 goto err;
2407
2408 /* Allocate FW completion ring */
2409 rc = edev->ops->common->chain_alloc(edev->cdev,
2410 QED_CHAIN_USE_TO_CONSUME,
2411 QED_CHAIN_MODE_PBL,
fc48b7a6 2412 RX_RING_SIZE,
2950219d
YM		 2413 sizeof(union eth_rx_cqe),
2414 &rxq->rx_comp_ring);
2415 if (rc)
2416 goto err;
2417
2418 /* Allocate buffers for the Rx ring */
2419 for (i = 0; i < rxq->num_rx_buffers; i++) {
2420 rc = qede_alloc_rx_buffer(edev, rxq);
2421 if (rc)
2422 break;
2423 }
2424 num_allocated = i;
2425 if (!num_allocated) {
2426 DP_ERR(edev, "Rx buffers allocation failed\n");
2427 goto err;
2428 } else if (num_allocated < rxq->num_rx_buffers) {
2429 DP_NOTICE(edev,
2430 "Allocated less buffers than desired (%d allocated)\n",
2431 num_allocated);
2432 }
2433
55482edc
MC		 2434 qede_alloc_sge_mem(edev, rxq);
2435
2950219d
YM		 2436 return 0;
2437
2438err:
2439 qede_free_mem_rxq(edev, rxq);
2440 return -ENOMEM;
2441}
2442
2443static void qede_free_mem_txq(struct qede_dev *edev,
2444 struct qede_tx_queue *txq)
2445{
2446 /* Free the parallel SW ring */
2447 kfree(txq->sw_tx_ring);
2448
2449 /* Free the real RQ ring used by FW */
2450 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2451}
2452
2453/* This function allocates all memory needed per Tx queue */
2454static int qede_alloc_mem_txq(struct qede_dev *edev,
2455 struct qede_tx_queue *txq)
2456{
2457 int size, rc;
2458 union eth_tx_bd_types *p_virt;
2459
2460 txq->num_tx_buffers = edev->q_num_tx_buffers;
2461
2462 /* Allocate the parallel driver ring for Tx buffers */
2463 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2464 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2465 if (!txq->sw_tx_ring) {
2466 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2467 goto err;
2468 }
2469
2470 rc = edev->ops->common->chain_alloc(edev->cdev,
2471 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2472 QED_CHAIN_MODE_PBL,
2473 NUM_TX_BDS_MAX,
2474 sizeof(*p_virt),
2475 &txq->tx_pbl);
2476 if (rc)
2477 goto err;
2478
2479 return 0;
2480
2481err:
2482 qede_free_mem_txq(edev, txq);
2483 return -ENOMEM;
2484}
2485
2486/* This function frees all memory of a single fp */
2487static void qede_free_mem_fp(struct qede_dev *edev,
2488 struct qede_fastpath *fp)
2489{
2490 int tc;
2491
2492 qede_free_mem_sb(edev, fp->sb_info);
2493
2494 qede_free_mem_rxq(edev, fp->rxq);
2495
2496 for (tc = 0; tc < edev->num_tc; tc++)
2497 qede_free_mem_txq(edev, &fp->txqs[tc]);
2498}
2499
2500/* This function allocates all memory needed for a single fp (i.e. an entity
2501 * which contains status block, one rx queue and multiple per-TC tx queues.
2502 */
2503static int qede_alloc_mem_fp(struct qede_dev *edev,
2504 struct qede_fastpath *fp)
2505{
2506 int rc, tc;
2507
2508 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2509 if (rc)
2510 goto err;
2511
2512 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2513 if (rc)
2514 goto err;
2515
2516 for (tc = 0; tc < edev->num_tc; tc++) {
2517 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2518 if (rc)
2519 goto err;
2520 }
2521
2522 return 0;
2523
2524err:
2525 qede_free_mem_fp(edev, fp);
2526 return -ENOMEM;
2527}
2528
2529static void qede_free_mem_load(struct qede_dev *edev)
2530{
2531 int i;
2532
2533 for_each_rss(i) {
2534 struct qede_fastpath *fp = &edev->fp_array[i];
2535
2536 qede_free_mem_fp(edev, fp);
2537 }
2538}
2539
2540/* This function allocates all qede memory at NIC load. */
2541static int qede_alloc_mem_load(struct qede_dev *edev)
2542{
2543 int rc = 0, rss_id;
2544
2545 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2546 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2547
2548 rc = qede_alloc_mem_fp(edev, fp);
2549 if (rc)
2550 break;
2551 }
2552
2553 if (rss_id != QEDE_RSS_CNT(edev)) {
2554 /* Failed allocating memory for all the queues */
2555 if (!rss_id) {
2556 DP_ERR(edev,
2557 "Failed to allocate memory for the leading queue\n");
2558 rc = -ENOMEM;
2559 } else {
2560 DP_NOTICE(edev,
2561 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
2562 QEDE_RSS_CNT(edev), rss_id);
2563 }
2564 edev->num_rss = rss_id;
2565 }
2566
2567 return 0;
2568}
2569
2570/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2571static void qede_init_fp(struct qede_dev *edev)
2572{
2573 int rss_id, txq_index, tc;
2574 struct qede_fastpath *fp;
2575
2576 for_each_rss(rss_id) {
2577 fp = &edev->fp_array[rss_id];
2578
2579 fp->edev = edev;
2580 fp->rss_id = rss_id;
2581
2582 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2583
2584 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2585
2586 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2587 fp->rxq->rxq_id = rss_id;
2588
2589 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2590 for (tc = 0; tc < edev->num_tc; tc++) {
2591 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2592 fp->txqs[tc].index = txq_index;
2593 }
2594
2595 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2596 edev->ndev->name, rss_id);
2597 }
55482edc
MC		 2598
2599 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2600}
2601
2602static int qede_set_real_num_queues(struct qede_dev *edev)
2603{
2604 int rc = 0;
2605
2606 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2607 if (rc) {
2608 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2609 return rc;
2610 }
2611 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2612 if (rc) {
2613 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2614 return rc;
2615 }
2616
2617 return 0;
2618}
2619
2620static void qede_napi_disable_remove(struct qede_dev *edev)
2621{
2622 int i;
2623
2624 for_each_rss(i) {
2625 napi_disable(&edev->fp_array[i].napi);
2626
2627 netif_napi_del(&edev->fp_array[i].napi);
2628 }
2629}
2630
2631static void qede_napi_add_enable(struct qede_dev *edev)
2632{
2633 int i;
2634
2635 /* Add NAPI objects */
2636 for_each_rss(i) {
2637 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2638 qede_poll, NAPI_POLL_WEIGHT);
2639 napi_enable(&edev->fp_array[i].napi);
2640 }
2641}
2642
2643static void qede_sync_free_irqs(struct qede_dev *edev)
2644{
2645 int i;
2646
2647 for (i = 0; i < edev->int_info.used_cnt; i++) {
2648 if (edev->int_info.msix_cnt) {
2649 synchronize_irq(edev->int_info.msix[i].vector);
2650 free_irq(edev->int_info.msix[i].vector,
2651 &edev->fp_array[i]);
2652 } else {
2653 edev->ops->common->simd_handler_clean(edev->cdev, i);
2654 }
2655 }
2656
2657 edev->int_info.used_cnt = 0;
2658}
2659
2660static int qede_req_msix_irqs(struct qede_dev *edev)
2661{
2662 int i, rc;
2663
2664 /* Sanitize number of interrupts == number of prepared RSS queues */
2665 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2666 DP_ERR(edev,
2667 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2668 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2669 return -EINVAL;
2670 }
2671
2672 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2673 rc = request_irq(edev->int_info.msix[i].vector,
2674 qede_msix_fp_int, 0, edev->fp_array[i].name,
2675 &edev->fp_array[i]);
2676 if (rc) {
2677 DP_ERR(edev, "Request fp %d irq failed\n", i);
2678 qede_sync_free_irqs(edev);
2679 return rc;
2680 }
2681 DP_VERBOSE(edev, NETIF_MSG_INTR,
2682 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2683 edev->fp_array[i].name, i,
2684 &edev->fp_array[i]);
2685 edev->int_info.used_cnt++;
2686 }
2687
2688 return 0;
2689}
2690
2691static void qede_simd_fp_handler(void *cookie)
2692{
2693 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2694
2695 napi_schedule_irqoff(&fp->napi);
2696}
2697
2698static int qede_setup_irqs(struct qede_dev *edev)
2699{
2700 int i, rc = 0;
2701
2702 /* Learn Interrupt configuration */
2703 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2704 if (rc)
2705 return rc;
2706
2707 if (edev->int_info.msix_cnt) {
2708 rc = qede_req_msix_irqs(edev);
2709 if (rc)
2710 return rc;
2711 edev->ndev->irq = edev->int_info.msix[0].vector;
2712 } else {
2713 const struct qed_common_ops *ops;
2714
2715 /* qed should learn receive the RSS ids and callbacks */
2716 ops = edev->ops->common;
2717 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2718 ops->simd_handler_config(edev->cdev,
2719 &edev->fp_array[i], i,
2720 qede_simd_fp_handler);
2721 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2722 }
2723 return 0;
2724}
2725
2726static int qede_drain_txq(struct qede_dev *edev,
2727 struct qede_tx_queue *txq,
2728 bool allow_drain)
2729{
2730 int rc, cnt = 1000;
2731
2732 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2733 if (!cnt) {
2734 if (allow_drain) {
2735 DP_NOTICE(edev,
2736 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2737 txq->index);
2738 rc = edev->ops->common->drain(edev->cdev);
2739 if (rc)
2740 return rc;
2741 return qede_drain_txq(edev, txq, false);
2742 }
2743 DP_NOTICE(edev,
2744 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2745 txq->index, txq->sw_tx_prod,
2746 txq->sw_tx_cons);
2747 return -ENODEV;
2748 }
2749 cnt--;
2750 usleep_range(1000, 2000);
2751 barrier();
2752 }
2753
2754 /* FW finished processing, wait for HW to transmit all tx packets */
2755 usleep_range(1000, 2000);
2756
2757 return 0;
2758}
2759
2760static int qede_stop_queues(struct qede_dev *edev)
2761{
2762 struct qed_update_vport_params vport_update_params;
2763 struct qed_dev *cdev = edev->cdev;
2764 int rc, tc, i;
2765
2766 /* Disable the vport */
2767 memset(&vport_update_params, 0, sizeof(vport_update_params));
2768 vport_update_params.vport_id = 0;
2769 vport_update_params.update_vport_active_flg = 1;
2770 vport_update_params.vport_active_flg = 0;
2771 vport_update_params.update_rss_flg = 0;
2772
2773 rc = edev->ops->vport_update(cdev, &vport_update_params);
2774 if (rc) {
2775 DP_ERR(edev, "Failed to update vport\n");
2776 return rc;
2777 }
2778
2779 /* Flush Tx queues. If needed, request drain from MCP */
2780 for_each_rss(i) {
2781 struct qede_fastpath *fp = &edev->fp_array[i];
2782
2783 for (tc = 0; tc < edev->num_tc; tc++) {
2784 struct qede_tx_queue *txq = &fp->txqs[tc];
2785
2786 rc = qede_drain_txq(edev, txq, true);
2787 if (rc)
2788 return rc;
2789 }
2790 }
2791
2792 /* Stop all Queues in reverse order*/
2793 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2794 struct qed_stop_rxq_params rx_params;
2795
2796 /* Stop the Tx Queue(s)*/
2797 for (tc = 0; tc < edev->num_tc; tc++) {
2798 struct qed_stop_txq_params tx_params;
2799
2800 tx_params.rss_id = i;
2801 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2802 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2803 if (rc) {
2804 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2805 tx_params.tx_queue_id);
2806 return rc;
2807 }
2808 }
2809
2810 /* Stop the Rx Queue*/
2811 memset(&rx_params, 0, sizeof(rx_params));
2812 rx_params.rss_id = i;
2813 rx_params.rx_queue_id = i;
2814
2815 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2816 if (rc) {
2817 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2818 return rc;
2819 }
2820 }
2821
2822 /* Stop the vport */
2823 rc = edev->ops->vport_stop(cdev, 0);
2824 if (rc)
2825 DP_ERR(edev, "Failed to stop VPORT\n");
2826
2827 return rc;
2828}
2829
2830static int qede_start_queues(struct qede_dev *edev)
2831{
2832 int rc, tc, i;
088c8618 2833 int vlan_removal_en = 1;
2950219d
YM		 2834 struct qed_dev *cdev = edev->cdev;
2835 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
2836 struct qed_update_vport_params vport_update_params;
2837 struct qed_queue_start_common_params q_params;
088c8618 2838 struct qed_start_vport_params start = {0};
2950219d
YM		 2839
2840 if (!edev->num_rss) {
2841 DP_ERR(edev,
2842 "Cannot update V-VPORT as active as there are no Rx queues\n");
2843 return -EINVAL;
2844 }
2845
55482edc 2846 start.gro_enable = !edev->gro_disable;
088c8618
MC		 2847 start.mtu = edev->ndev->mtu;
2848 start.vport_id = 0;
2849 start.drop_ttl0 = true;
2850 start.remove_inner_vlan = vlan_removal_en;
2851
2852 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 2853
2854 if (rc) {
2855 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2856 return rc;
2857 }
2858
2859 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2860 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 2861 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 2862
2863 for_each_rss(i) {
2864 struct qede_fastpath *fp = &edev->fp_array[i];
2865 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2866
2867 memset(&q_params, 0, sizeof(q_params));
2868 q_params.rss_id = i;
2869 q_params.queue_id = i;
2870 q_params.vport_id = 0;
2871 q_params.sb = fp->sb_info->igu_sb_id;
2872 q_params.sb_idx = RX_PI;
2873
2874 rc = edev->ops->q_rx_start(cdev, &q_params,
2875 fp->rxq->rx_buf_size,
2876 fp->rxq->rx_bd_ring.p_phys_addr,
2877 phys_table,
2878 fp->rxq->rx_comp_ring.page_cnt,
2879 &fp->rxq->hw_rxq_prod_addr);
2880 if (rc) {
2881 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2882 return rc;
2883 }
2884
2885 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2886
2887 qede_update_rx_prod(edev, fp->rxq);
2888
2889 for (tc = 0; tc < edev->num_tc; tc++) {
2890 struct qede_tx_queue *txq = &fp->txqs[tc];
2891 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2892
2893 memset(&q_params, 0, sizeof(q_params));
2894 q_params.rss_id = i;
2895 q_params.queue_id = txq_index;
2896 q_params.vport_id = 0;
2897 q_params.sb = fp->sb_info->igu_sb_id;
2898 q_params.sb_idx = TX_PI(tc);
2899
2900 rc = edev->ops->q_tx_start(cdev, &q_params,
2901 txq->tx_pbl.pbl.p_phys_table,
2902 txq->tx_pbl.page_cnt,
2903 &txq->doorbell_addr);
2904 if (rc) {
2905 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2906 txq_index, rc);
2907 return rc;
2908 }
2909
2910 txq->hw_cons_ptr =
2911 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2912 SET_FIELD(txq->tx_db.data.params,
2913 ETH_DB_DATA_DEST, DB_DEST_XCM);
2914 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2915 DB_AGG_CMD_SET);
2916 SET_FIELD(txq->tx_db.data.params,
2917 ETH_DB_DATA_AGG_VAL_SEL,
2918 DQ_XCM_ETH_TX_BD_PROD_CMD);
2919
2920 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2921 }
2922 }
2923
2924 /* Prepare and send the vport enable */
2925 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 2926 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 2927 vport_update_params.update_vport_active_flg = 1;
2928 vport_update_params.vport_active_flg = 1;
2929
2930 /* Fill struct with RSS params */
2931 if (QEDE_RSS_CNT(edev) > 1) {
2932 vport_update_params.update_rss_flg = 1;
2933 for (i = 0; i < 128; i++)
2934 rss_params->rss_ind_table[i] =
2935 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2936 netdev_rss_key_fill(rss_params->rss_key,
2937 sizeof(rss_params->rss_key));
2938 } else {
2939 memset(rss_params, 0, sizeof(*rss_params));
2940 }
2941 memcpy(&vport_update_params.rss_params, rss_params,
2942 sizeof(*rss_params));
2943
2944 rc = edev->ops->vport_update(cdev, &vport_update_params);
2945 if (rc) {
2946 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2947 return rc;
2948 }
2949
2950 return 0;
2951}
2952
0d8e0aa0
SK		 2953static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2954 enum qed_filter_xcast_params_type opcode,
2955 unsigned char *mac, int num_macs)
2956{
2957 struct qed_filter_params filter_cmd;
2958 int i;
2959
2960 memset(&filter_cmd, 0, sizeof(filter_cmd));
2961 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2962 filter_cmd.filter.mcast.type = opcode;
2963 filter_cmd.filter.mcast.num = num_macs;
2964
2965 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2966 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
2967
2968 return edev->ops->filter_config(edev->cdev, &filter_cmd);
2969}
2970
2950219d
YM		 2971enum qede_unload_mode {
2972 QEDE_UNLOAD_NORMAL,
2973};
2974
2975static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
2976{
a2ec6172 2977 struct qed_link_params link_params;
2950219d
YM		 2978 int rc;
2979
2980 DP_INFO(edev, "Starting qede unload\n");
2981
0d8e0aa0
SK		 2982 mutex_lock(&edev->qede_lock);
2983 edev->state = QEDE_STATE_CLOSED;
2984
2950219d
YM		 2985 /* Close OS Tx */
2986 netif_tx_disable(edev->ndev);
2987 netif_carrier_off(edev->ndev);
2988
a2ec6172
SK		 2989 /* Reset the link */
2990 memset(&link_params, 0, sizeof(link_params));
2991 link_params.link_up = false;
2992 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 2993 rc = qede_stop_queues(edev);
2994 if (rc) {
2995 qede_sync_free_irqs(edev);
2996 goto out;
2997 }
2998
2999 DP_INFO(edev, "Stopped Queues\n");
3000
7c1bfcad 3001 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3002 edev->ops->fastpath_stop(edev->cdev);
3003
3004 /* Release the interrupts */
3005 qede_sync_free_irqs(edev);
3006 edev->ops->common->set_fp_int(edev->cdev, 0);
3007
3008 qede_napi_disable_remove(edev);
3009
3010 qede_free_mem_load(edev);
3011 qede_free_fp_array(edev);
3012
3013out:
3014 mutex_unlock(&edev->qede_lock);
3015 DP_INFO(edev, "Ending qede unload\n");
3016}
3017
3018enum qede_load_mode {
3019 QEDE_LOAD_NORMAL,
3020};
3021
3022static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3023{
a2ec6172
SK		 3024 struct qed_link_params link_params;
3025 struct qed_link_output link_output;
2950219d
YM		 3026 int rc;
3027
3028 DP_INFO(edev, "Starting qede load\n");
3029
3030 rc = qede_set_num_queues(edev);
3031 if (rc)
3032 goto err0;
3033
3034 rc = qede_alloc_fp_array(edev);
3035 if (rc)
3036 goto err0;
3037
3038 qede_init_fp(edev);
3039
3040 rc = qede_alloc_mem_load(edev);
3041 if (rc)
3042 goto err1;
3043 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3044 QEDE_RSS_CNT(edev), edev->num_tc);
3045
3046 rc = qede_set_real_num_queues(edev);
3047 if (rc)
3048 goto err2;
3049
3050 qede_napi_add_enable(edev);
3051 DP_INFO(edev, "Napi added and enabled\n");
3052
3053 rc = qede_setup_irqs(edev);
3054 if (rc)
3055 goto err3;
3056 DP_INFO(edev, "Setup IRQs succeeded\n");
3057
3058 rc = qede_start_queues(edev);
3059 if (rc)
3060 goto err4;
3061 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3062
3063 /* Add primary mac and set Rx filters */
3064 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3065
0d8e0aa0
SK		 3066 mutex_lock(&edev->qede_lock);
3067 edev->state = QEDE_STATE_OPEN;
3068 mutex_unlock(&edev->qede_lock);
a2ec6172 3069
7c1bfcad
SRK		 3070 /* Program un-configured VLANs */
3071 qede_configure_vlan_filters(edev);
3072
a2ec6172
SK		 3073 /* Ask for link-up using current configuration */
3074 memset(&link_params, 0, sizeof(link_params));
3075 link_params.link_up = true;
3076 edev->ops->common->set_link(edev->cdev, &link_params);
3077
3078 /* Query whether link is already-up */
3079 memset(&link_output, 0, sizeof(link_output));
3080 edev->ops->common->get_link(edev->cdev, &link_output);
3081 qede_link_update(edev, &link_output);
3082
2950219d
YM		 3083 DP_INFO(edev, "Ending successfully qede load\n");
3084
3085 return 0;
3086
3087err4:
3088 qede_sync_free_irqs(edev);
3089 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3090err3:
3091 qede_napi_disable_remove(edev);
3092err2:
3093 qede_free_mem_load(edev);
3094err1:
3095 edev->ops->common->set_fp_int(edev->cdev, 0);
3096 qede_free_fp_array(edev);
3097 edev->num_rss = 0;
3098err0:
3099 return rc;
3100}
3101
133fac0e
SK		 3102void qede_reload(struct qede_dev *edev,
3103 void (*func)(struct qede_dev *, union qede_reload_args *),
3104 union qede_reload_args *args)
3105{
3106 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3107 /* Call function handler to update parameters
3108 * needed for function load.
3109 */
3110 if (func)
3111 func(edev, args);
3112
3113 qede_load(edev, QEDE_LOAD_NORMAL);
3114
3115 mutex_lock(&edev->qede_lock);
3116 qede_config_rx_mode(edev->ndev);
3117 mutex_unlock(&edev->qede_lock);
3118}
3119
2950219d
YM		 3120/* called with rtnl_lock */
3121static int qede_open(struct net_device *ndev)
3122{
3123 struct qede_dev *edev = netdev_priv(ndev);
3124
3125 netif_carrier_off(ndev);
3126
3127 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3128
3129 return qede_load(edev, QEDE_LOAD_NORMAL);
3130}
3131
3132static int qede_close(struct net_device *ndev)
3133{
3134 struct qede_dev *edev = netdev_priv(ndev);
3135
3136 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3137
3138 return 0;
3139}
0d8e0aa0 3140
a2ec6172
SK		 3141static void qede_link_update(void *dev, struct qed_link_output *link)
3142{
3143 struct qede_dev *edev = dev;
3144
3145 if (!netif_running(edev->ndev)) {
3146 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3147 return;
3148 }
3149
3150 if (link->link_up) {
8e025ae2
YM		 3151 if (!netif_carrier_ok(edev->ndev)) {
3152 DP_NOTICE(edev, "Link is up\n");
3153 netif_tx_start_all_queues(edev->ndev);
3154 netif_carrier_on(edev->ndev);
3155 }
a2ec6172 3156 } else {
8e025ae2
YM		 3157 if (netif_carrier_ok(edev->ndev)) {
3158 DP_NOTICE(edev, "Link is down\n");
3159 netif_tx_disable(edev->ndev);
3160 netif_carrier_off(edev->ndev);
3161 }
a2ec6172
SK		 3162 }
3163}
3164
0d8e0aa0
SK		 3165static int qede_set_mac_addr(struct net_device *ndev, void *p)
3166{
3167 struct qede_dev *edev = netdev_priv(ndev);
3168 struct sockaddr *addr = p;
3169 int rc;
3170
3171 ASSERT_RTNL(); /* @@@TBD To be removed */
3172
3173 DP_INFO(edev, "Set_mac_addr called\n");
3174
3175 if (!is_valid_ether_addr(addr->sa_data)) {
3176 DP_NOTICE(edev, "The MAC address is not valid\n");
3177 return -EFAULT;
3178 }
3179
3180 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3181
3182 if (!netif_running(ndev)) {
3183 DP_NOTICE(edev, "The device is currently down\n");
3184 return 0;
3185 }
3186
3187 /* Remove the previous primary mac */
3188 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3189 edev->primary_mac);
3190 if (rc)
3191 return rc;
3192
3193 /* Add MAC filter according to the new unicast HW MAC address */
3194 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3195 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3196 edev->primary_mac);
3197}
3198
3199static int
3200qede_configure_mcast_filtering(struct net_device *ndev,
3201 enum qed_filter_rx_mode_type *accept_flags)
3202{
3203 struct qede_dev *edev = netdev_priv(ndev);
3204 unsigned char *mc_macs, *temp;
3205 struct netdev_hw_addr *ha;
3206 int rc = 0, mc_count;
3207 size_t size;
3208
3209 size = 64 * ETH_ALEN;
3210
3211 mc_macs = kzalloc(size, GFP_KERNEL);
3212 if (!mc_macs) {
3213 DP_NOTICE(edev,
3214 "Failed to allocate memory for multicast MACs\n");
3215 rc = -ENOMEM;
3216 goto exit;
3217 }
3218
3219 temp = mc_macs;
3220
3221 /* Remove all previously configured MAC filters */
3222 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3223 mc_macs, 1);
3224 if (rc)
3225 goto exit;
3226
3227 netif_addr_lock_bh(ndev);
3228
3229 mc_count = netdev_mc_count(ndev);
3230 if (mc_count < 64) {
3231 netdev_for_each_mc_addr(ha, ndev) {
3232 ether_addr_copy(temp, ha->addr);
3233 temp += ETH_ALEN;
3234 }
3235 }
3236
3237 netif_addr_unlock_bh(ndev);
3238
3239 /* Check for all multicast @@@TBD resource allocation */
3240 if ((ndev->flags & IFF_ALLMULTI) ||
3241 (mc_count > 64)) {
3242 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3243 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3244 } else {
3245 /* Add all multicast MAC filters */
3246 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3247 mc_macs, mc_count);
3248 }
3249
3250exit:
3251 kfree(mc_macs);
3252 return rc;
3253}
3254
3255static void qede_set_rx_mode(struct net_device *ndev)
3256{
3257 struct qede_dev *edev = netdev_priv(ndev);
3258
3259 DP_INFO(edev, "qede_set_rx_mode called\n");
3260
3261 if (edev->state != QEDE_STATE_OPEN) {
3262 DP_INFO(edev,
3263 "qede_set_rx_mode called while interface is down\n");
3264 } else {
3265 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3266 schedule_delayed_work(&edev->sp_task, 0);
3267 }
3268}
3269
3270/* Must be called with qede_lock held */
3271static void qede_config_rx_mode(struct net_device *ndev)
3272{
3273 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3274 struct qede_dev *edev = netdev_priv(ndev);
3275 struct qed_filter_params rx_mode;
3276 unsigned char *uc_macs, *temp;
3277 struct netdev_hw_addr *ha;
3278 int rc, uc_count;
3279 size_t size;
3280
3281 netif_addr_lock_bh(ndev);
3282
3283 uc_count = netdev_uc_count(ndev);
3284 size = uc_count * ETH_ALEN;
3285
3286 uc_macs = kzalloc(size, GFP_ATOMIC);
3287 if (!uc_macs) {
3288 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3289 netif_addr_unlock_bh(ndev);
3290 return;
3291 }
3292
3293 temp = uc_macs;
3294 netdev_for_each_uc_addr(ha, ndev) {
3295 ether_addr_copy(temp, ha->addr);
3296 temp += ETH_ALEN;
3297 }
3298
3299 netif_addr_unlock_bh(ndev);
3300
3301 /* Configure the struct for the Rx mode */
3302 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3303 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3304
3305 /* Remove all previous unicast secondary macs and multicast macs
3306 * (configrue / leave the primary mac)
3307 */
3308 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3309 edev->primary_mac);
3310 if (rc)
3311 goto out;
3312
3313 /* Check for promiscuous */
3314 if ((ndev->flags & IFF_PROMISC) ||
3315 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3316 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3317 } else {
3318 /* Add MAC filters according to the unicast secondary macs */
3319 int i;
3320
3321 temp = uc_macs;
3322 for (i = 0; i < uc_count; i++) {
3323 rc = qede_set_ucast_rx_mac(edev,
3324 QED_FILTER_XCAST_TYPE_ADD,
3325 temp);
3326 if (rc)
3327 goto out;
3328
3329 temp += ETH_ALEN;
3330 }
3331
3332 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3333 if (rc)
3334 goto out;
3335 }
3336
7c1bfcad
SRK		 3337 /* take care of VLAN mode */
3338 if (ndev->flags & IFF_PROMISC) {
3339 qede_config_accept_any_vlan(edev, true);
3340 } else if (!edev->non_configured_vlans) {
3341 /* It's possible that accept_any_vlan mode is set due to a
3342 * previous setting of IFF_PROMISC. If vlan credits are
3343 * sufficient, disable accept_any_vlan.
3344 */
3345 qede_config_accept_any_vlan(edev, false);
3346 }
3347
0d8e0aa0
SK		 3348 rx_mode.filter.accept_flags = accept_flags;
3349 edev->ops->filter_config(edev->cdev, &rx_mode);
3350out:
3351 kfree(uc_macs);
3352}
Linux kernel - Deliverables
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