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qed: Enable GRE tunnel slowpath configuration
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
b18e170c 27#ifdef CONFIG_QEDE_VXLAN
e712d52b 28#include <net/vxlan.h>
b18e170c 29#endif
9a109dd0
MC		 30#ifdef CONFIG_QEDE_GENEVE
31#include <net/geneve.h>
32#endif
e712d52b
YM		 33#include <linux/ip.h>
34#include <net/ipv6.h>
35#include <net/tcp.h>
36#include <linux/if_ether.h>
37#include <linux/if_vlan.h>
38#include <linux/pkt_sched.h>
39#include <linux/ethtool.h>
40#include <linux/in.h>
41#include <linux/random.h>
42#include <net/ip6_checksum.h>
43#include <linux/bitops.h>
44
45#include "qede.h"
46
5abd7e92
YM		 47static char version[] =
48 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 49
5abd7e92 50MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 51MODULE_LICENSE("GPL");
52MODULE_VERSION(DRV_MODULE_VERSION);
53
54static uint debug;
55module_param(debug, uint, 0);
56MODULE_PARM_DESC(debug, " Default debug msglevel");
57
58static const struct qed_eth_ops *qed_ops;
59
60#define CHIP_NUM_57980S_40 0x1634
0e7441d7 61#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 62#define CHIP_NUM_57980S_MF 0x1636
63#define CHIP_NUM_57980S_100 0x1644
64#define CHIP_NUM_57980S_50 0x1654
65#define CHIP_NUM_57980S_25 0x1656
66
67#ifndef PCI_DEVICE_ID_NX2_57980E
68#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
69#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
70#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
71#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
72#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
73#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
74#endif
75
76static const struct pci_device_id qede_pci_tbl[] = {
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
78 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
79 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
80 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
81 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
82 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
83 { 0 }
84};
85
86MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
87
88static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
89
90#define TX_TIMEOUT (5 * HZ)
91
92static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 93static int qede_alloc_rx_buffer(struct qede_dev *edev,
94 struct qede_rx_queue *rxq);
a2ec6172 95static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 96
97static struct pci_driver qede_pci_driver = {
98 .name = "qede",
99 .id_table = qede_pci_tbl,
100 .probe = qede_probe,
101 .remove = qede_remove,
102};
103
a2ec6172
SK		 104static struct qed_eth_cb_ops qede_ll_ops = {
105 {
106 .link_update = qede_link_update,
107 },
108};
109
2950219d
YM		 110static int qede_netdev_event(struct notifier_block *this, unsigned long event,
111 void *ptr)
112{
113 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
114 struct ethtool_drvinfo drvinfo;
115 struct qede_dev *edev;
116
117 /* Currently only support name change */
118 if (event != NETDEV_CHANGENAME)
119 goto done;
120
121 /* Check whether this is a qede device */
122 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
123 goto done;
124
125 memset(&drvinfo, 0, sizeof(drvinfo));
126 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
127 if (strcmp(drvinfo.driver, "qede"))
128 goto done;
129 edev = netdev_priv(ndev);
130
131 /* Notify qed of the name change */
132 if (!edev->ops || !edev->ops->common)
133 goto done;
134 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
135 "qede");
136
137done:
138 return NOTIFY_DONE;
139}
140
141static struct notifier_block qede_netdev_notifier = {
142 .notifier_call = qede_netdev_event,
143};
144
e712d52b
YM		 145static
146int __init qede_init(void)
147{
148 int ret;
e712d52b
YM		 149
150 pr_notice("qede_init: %s\n", version);
151
95114344 152 qed_ops = qed_get_eth_ops();
e712d52b
YM		 153 if (!qed_ops) {
154 pr_notice("Failed to get qed ethtool operations\n");
155 return -EINVAL;
156 }
157
2950219d
YM		 158 /* Must register notifier before pci ops, since we might miss
159 * interface rename after pci probe and netdev registeration.
160 */
161 ret = register_netdevice_notifier(&qede_netdev_notifier);
162 if (ret) {
163 pr_notice("Failed to register netdevice_notifier\n");
164 qed_put_eth_ops();
165 return -EINVAL;
166 }
167
e712d52b
YM		 168 ret = pci_register_driver(&qede_pci_driver);
169 if (ret) {
170 pr_notice("Failed to register driver\n");
2950219d 171 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 172 qed_put_eth_ops();
173 return -EINVAL;
174 }
175
176 return 0;
177}
178
179static void __exit qede_cleanup(void)
180{
181 pr_notice("qede_cleanup called\n");
182
2950219d 183 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 184 pci_unregister_driver(&qede_pci_driver);
185 qed_put_eth_ops();
186}
187
188module_init(qede_init);
189module_exit(qede_cleanup);
190
2950219d
YM		 191/* -------------------------------------------------------------------------
192 * START OF FAST-PATH
193 * -------------------------------------------------------------------------
194 */
195
196/* Unmap the data and free skb */
197static int qede_free_tx_pkt(struct qede_dev *edev,
198 struct qede_tx_queue *txq,
199 int *len)
200{
201 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
202 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
203 struct eth_tx_1st_bd *first_bd;
204 struct eth_tx_bd *tx_data_bd;
205 int bds_consumed = 0;
206 int nbds;
207 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
208 int i, split_bd_len = 0;
209
210 if (unlikely(!skb)) {
211 DP_ERR(edev,
212 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
213 idx, txq->sw_tx_cons, txq->sw_tx_prod);
214 return -1;
215 }
216
217 *len = skb->len;
218
219 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
220
221 bds_consumed++;
222
223 nbds = first_bd->data.nbds;
224
225 if (data_split) {
226 struct eth_tx_bd *split = (struct eth_tx_bd *)
227 qed_chain_consume(&txq->tx_pbl);
228 split_bd_len = BD_UNMAP_LEN(split);
229 bds_consumed++;
230 }
231 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
232 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
233
234 /* Unmap the data of the skb frags */
235 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
236 tx_data_bd = (struct eth_tx_bd *)
237 qed_chain_consume(&txq->tx_pbl);
238 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
239 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
240 }
241
242 while (bds_consumed++ < nbds)
243 qed_chain_consume(&txq->tx_pbl);
244
245 /* Free skb */
246 dev_kfree_skb_any(skb);
247 txq->sw_tx_ring[idx].skb = NULL;
248 txq->sw_tx_ring[idx].flags = 0;
249
250 return 0;
251}
252
253/* Unmap the data and free skb when mapping failed during start_xmit */
254static void qede_free_failed_tx_pkt(struct qede_dev *edev,
255 struct qede_tx_queue *txq,
256 struct eth_tx_1st_bd *first_bd,
257 int nbd,
258 bool data_split)
259{
260 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
261 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
262 struct eth_tx_bd *tx_data_bd;
263 int i, split_bd_len = 0;
264
265 /* Return prod to its position before this skb was handled */
266 qed_chain_set_prod(&txq->tx_pbl,
267 le16_to_cpu(txq->tx_db.data.bd_prod),
268 first_bd);
269
270 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
271
272 if (data_split) {
273 struct eth_tx_bd *split = (struct eth_tx_bd *)
274 qed_chain_produce(&txq->tx_pbl);
275 split_bd_len = BD_UNMAP_LEN(split);
276 nbd--;
277 }
278
279 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
280 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
281
282 /* Unmap the data of the skb frags */
283 for (i = 0; i < nbd; i++) {
284 tx_data_bd = (struct eth_tx_bd *)
285 qed_chain_produce(&txq->tx_pbl);
286 if (tx_data_bd->nbytes)
287 dma_unmap_page(&edev->pdev->dev,
288 BD_UNMAP_ADDR(tx_data_bd),
289 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
290 }
291
292 /* Return again prod to its position before this skb was handled */
293 qed_chain_set_prod(&txq->tx_pbl,
294 le16_to_cpu(txq->tx_db.data.bd_prod),
295 first_bd);
296
297 /* Free skb */
298 dev_kfree_skb_any(skb);
299 txq->sw_tx_ring[idx].skb = NULL;
300 txq->sw_tx_ring[idx].flags = 0;
301}
302
303static u32 qede_xmit_type(struct qede_dev *edev,
304 struct sk_buff *skb,
305 int *ipv6_ext)
306{
307 u32 rc = XMIT_L4_CSUM;
308 __be16 l3_proto;
309
310 if (skb->ip_summed != CHECKSUM_PARTIAL)
311 return XMIT_PLAIN;
312
313 l3_proto = vlan_get_protocol(skb);
314 if (l3_proto == htons(ETH_P_IPV6) &&
315 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
316 *ipv6_ext = 1;
317
318 if (skb_is_gso(skb))
319 rc |= XMIT_LSO;
320
321 return rc;
322}
323
324static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
325 struct eth_tx_2nd_bd *second_bd,
326 struct eth_tx_3rd_bd *third_bd)
327{
328 u8 l4_proto;
fc48b7a6 329 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 330
fc48b7a6 331 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 332
fc48b7a6 333 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 334 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
335 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
336
fc48b7a6 337 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 338 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
339
340 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
341 l4_proto = ipv6_hdr(skb)->nexthdr;
342 else
343 l4_proto = ip_hdr(skb)->protocol;
344
345 if (l4_proto == IPPROTO_UDP)
fc48b7a6 346 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 347
fc48b7a6 348 if (third_bd)
2950219d 349 third_bd->data.bitfields |=
fc48b7a6
YM		 350 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
351 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
352 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 353
fc48b7a6 354 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 355 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
356}
357
358static int map_frag_to_bd(struct qede_dev *edev,
359 skb_frag_t *frag,
360 struct eth_tx_bd *bd)
361{
362 dma_addr_t mapping;
363
364 /* Map skb non-linear frag data for DMA */
365 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
366 skb_frag_size(frag),
367 DMA_TO_DEVICE);
368 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
369 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
370 return -ENOMEM;
371 }
372
373 /* Setup the data pointer of the frag data */
374 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
375
376 return 0;
377}
378
b1199b10
YM		 379/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
380#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
381static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
382 u8 xmit_type)
383{
384 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
385
386 if (xmit_type & XMIT_LSO) {
387 int hlen;
388
389 hlen = skb_transport_header(skb) +
390 tcp_hdrlen(skb) - skb->data;
391
392 /* linear payload would require its own BD */
393 if (skb_headlen(skb) > hlen)
394 allowed_frags--;
395 }
396
397 return (skb_shinfo(skb)->nr_frags > allowed_frags);
398}
399#endif
400
2950219d
YM		 401/* Main transmit function */
402static
403netdev_tx_t qede_start_xmit(struct sk_buff *skb,
404 struct net_device *ndev)
405{
406 struct qede_dev *edev = netdev_priv(ndev);
407 struct netdev_queue *netdev_txq;
408 struct qede_tx_queue *txq;
409 struct eth_tx_1st_bd *first_bd;
410 struct eth_tx_2nd_bd *second_bd = NULL;
411 struct eth_tx_3rd_bd *third_bd = NULL;
412 struct eth_tx_bd *tx_data_bd = NULL;
413 u16 txq_index;
414 u8 nbd = 0;
415 dma_addr_t mapping;
416 int rc, frag_idx = 0, ipv6_ext = 0;
417 u8 xmit_type;
418 u16 idx;
419 u16 hlen;
420 bool data_split;
421
422 /* Get tx-queue context and netdev index */
423 txq_index = skb_get_queue_mapping(skb);
424 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
425 txq = QEDE_TX_QUEUE(edev, txq_index);
426 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
427
2950219d
YM		 428 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
429 (MAX_SKB_FRAGS + 1));
430
431 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
432
b1199b10
YM		 433#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
434 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
435 if (skb_linearize(skb)) {
436 DP_NOTICE(edev,
437 "SKB linearization failed - silently dropping this SKB\n");
438 dev_kfree_skb_any(skb);
439 return NETDEV_TX_OK;
440 }
441 }
442#endif
443
2950219d
YM		 444 /* Fill the entry in the SW ring and the BDs in the FW ring */
445 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
446 txq->sw_tx_ring[idx].skb = skb;
447 first_bd = (struct eth_tx_1st_bd *)
448 qed_chain_produce(&txq->tx_pbl);
449 memset(first_bd, 0, sizeof(*first_bd));
450 first_bd->data.bd_flags.bitfields =
451 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
452
453 /* Map skb linear data for DMA and set in the first BD */
454 mapping = dma_map_single(&edev->pdev->dev, skb->data,
455 skb_headlen(skb), DMA_TO_DEVICE);
456 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
457 DP_NOTICE(edev, "SKB mapping failed\n");
458 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
459 return NETDEV_TX_OK;
460 }
461 nbd++;
462 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
463
464 /* In case there is IPv6 with extension headers or LSO we need 2nd and
465 * 3rd BDs.
466 */
467 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
468 second_bd = (struct eth_tx_2nd_bd *)
469 qed_chain_produce(&txq->tx_pbl);
470 memset(second_bd, 0, sizeof(*second_bd));
471
472 nbd++;
473 third_bd = (struct eth_tx_3rd_bd *)
474 qed_chain_produce(&txq->tx_pbl);
475 memset(third_bd, 0, sizeof(*third_bd));
476
477 nbd++;
478 /* We need to fill in additional data in second_bd... */
479 tx_data_bd = (struct eth_tx_bd *)second_bd;
480 }
481
482 if (skb_vlan_tag_present(skb)) {
483 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
484 first_bd->data.bd_flags.bitfields |=
485 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
486 }
487
488 /* Fill the parsing flags & params according to the requested offload */
489 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 490 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
491
2950219d
YM		 492 /* We don't re-calculate IP checksum as it is already done by
493 * the upper stack
494 */
495 first_bd->data.bd_flags.bitfields |=
496 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
497
fc48b7a6
YM		 498 first_bd->data.bitfields |= cpu_to_le16(temp);
499
2950219d
YM		 500 /* If the packet is IPv6 with extension header, indicate that
501 * to FW and pass few params, since the device cracker doesn't
502 * support parsing IPv6 with extension header/s.
503 */
504 if (unlikely(ipv6_ext))
505 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
506 }
507
508 if (xmit_type & XMIT_LSO) {
509 first_bd->data.bd_flags.bitfields |=
510 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
511 third_bd->data.lso_mss =
512 cpu_to_le16(skb_shinfo(skb)->gso_size);
513
514 first_bd->data.bd_flags.bitfields |=
515 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
516 hlen = skb_transport_header(skb) +
517 tcp_hdrlen(skb) - skb->data;
518
519 /* @@@TBD - if will not be removed need to check */
520 third_bd->data.bitfields |=
fc48b7a6 521 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 522
523 /* Make life easier for FW guys who can't deal with header and
524 * data on same BD. If we need to split, use the second bd...
525 */
526 if (unlikely(skb_headlen(skb) > hlen)) {
527 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
528 "TSO split header size is %d (%x:%x)\n",
529 first_bd->nbytes, first_bd->addr.hi,
530 first_bd->addr.lo);
531
532 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
533 le32_to_cpu(first_bd->addr.lo)) +
534 hlen;
535
536 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
537 le16_to_cpu(first_bd->nbytes) -
538 hlen);
539
540 /* this marks the BD as one that has no
541 * individual mapping
542 */
543 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
544
545 first_bd->nbytes = cpu_to_le16(hlen);
546
547 tx_data_bd = (struct eth_tx_bd *)third_bd;
548 data_split = true;
549 }
550 }
551
552 /* Handle fragmented skb */
553 /* special handle for frags inside 2nd and 3rd bds.. */
554 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
555 rc = map_frag_to_bd(edev,
556 &skb_shinfo(skb)->frags[frag_idx],
557 tx_data_bd);
558 if (rc) {
559 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
560 data_split);
561 return NETDEV_TX_OK;
562 }
563
564 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
565 tx_data_bd = (struct eth_tx_bd *)third_bd;
566 else
567 tx_data_bd = NULL;
568
569 frag_idx++;
570 }
571
572 /* map last frags into 4th, 5th .... */
573 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
574 tx_data_bd = (struct eth_tx_bd *)
575 qed_chain_produce(&txq->tx_pbl);
576
577 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
578
579 rc = map_frag_to_bd(edev,
580 &skb_shinfo(skb)->frags[frag_idx],
581 tx_data_bd);
582 if (rc) {
583 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
584 data_split);
585 return NETDEV_TX_OK;
586 }
587 }
588
589 /* update the first BD with the actual num BDs */
590 first_bd->data.nbds = nbd;
591
592 netdev_tx_sent_queue(netdev_txq, skb->len);
593
594 skb_tx_timestamp(skb);
595
596 /* Advance packet producer only before sending the packet since mapping
597 * of pages may fail.
598 */
599 txq->sw_tx_prod++;
600
601 /* 'next page' entries are counted in the producer value */
602 txq->tx_db.data.bd_prod =
603 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
604
605 /* wmb makes sure that the BDs data is updated before updating the
606 * producer, otherwise FW may read old data from the BDs.
607 */
608 wmb();
609 barrier();
610 writel(txq->tx_db.raw, txq->doorbell_addr);
611
612 /* mmiowb is needed to synchronize doorbell writes from more than one
613 * processor. It guarantees that the write arrives to the device before
614 * the queue lock is released and another start_xmit is called (possibly
615 * on another CPU). Without this barrier, the next doorbell can bypass
616 * this doorbell. This is applicable to IA64/Altix systems.
617 */
618 mmiowb();
619
620 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
621 < (MAX_SKB_FRAGS + 1))) {
622 netif_tx_stop_queue(netdev_txq);
623 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
624 "Stop queue was called\n");
625 /* paired memory barrier is in qede_tx_int(), we have to keep
626 * ordering of set_bit() in netif_tx_stop_queue() and read of
627 * fp->bd_tx_cons
628 */
629 smp_mb();
630
631 if (qed_chain_get_elem_left(&txq->tx_pbl)
632 >= (MAX_SKB_FRAGS + 1) &&
633 (edev->state == QEDE_STATE_OPEN)) {
634 netif_tx_wake_queue(netdev_txq);
635 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
636 "Wake queue was called\n");
637 }
638 }
639
640 return NETDEV_TX_OK;
641}
642
643static int qede_txq_has_work(struct qede_tx_queue *txq)
644{
645 u16 hw_bd_cons;
646
647 /* Tell compiler that consumer and producer can change */
648 barrier();
649 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
650 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
651 return 0;
652
653 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
654}
655
656static int qede_tx_int(struct qede_dev *edev,
657 struct qede_tx_queue *txq)
658{
659 struct netdev_queue *netdev_txq;
660 u16 hw_bd_cons;
661 unsigned int pkts_compl = 0, bytes_compl = 0;
662 int rc;
663
664 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
665
666 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
667 barrier();
668
669 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
670 int len = 0;
671
672 rc = qede_free_tx_pkt(edev, txq, &len);
673 if (rc) {
674 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
675 hw_bd_cons,
676 qed_chain_get_cons_idx(&txq->tx_pbl));
677 break;
678 }
679
680 bytes_compl += len;
681 pkts_compl++;
682 txq->sw_tx_cons++;
683 }
684
685 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
686
687 /* Need to make the tx_bd_cons update visible to start_xmit()
688 * before checking for netif_tx_queue_stopped(). Without the
689 * memory barrier, there is a small possibility that
690 * start_xmit() will miss it and cause the queue to be stopped
691 * forever.
692 * On the other hand we need an rmb() here to ensure the proper
693 * ordering of bit testing in the following
694 * netif_tx_queue_stopped(txq) call.
695 */
696 smp_mb();
697
698 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
699 /* Taking tx_lock is needed to prevent reenabling the queue
700 * while it's empty. This could have happen if rx_action() gets
701 * suspended in qede_tx_int() after the condition before
702 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
703 *
704 * stops the queue->sees fresh tx_bd_cons->releases the queue->
705 * sends some packets consuming the whole queue again->
706 * stops the queue
707 */
708
709 __netif_tx_lock(netdev_txq, smp_processor_id());
710
711 if ((netif_tx_queue_stopped(netdev_txq)) &&
712 (edev->state == QEDE_STATE_OPEN) &&
713 (qed_chain_get_elem_left(&txq->tx_pbl)
714 >= (MAX_SKB_FRAGS + 1))) {
715 netif_tx_wake_queue(netdev_txq);
716 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
717 "Wake queue was called\n");
718 }
719
720 __netif_tx_unlock(netdev_txq);
721 }
722
723 return 0;
724}
725
726static bool qede_has_rx_work(struct qede_rx_queue *rxq)
727{
728 u16 hw_comp_cons, sw_comp_cons;
729
730 /* Tell compiler that status block fields can change */
731 barrier();
732
733 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
734 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
735
736 return hw_comp_cons != sw_comp_cons;
737}
738
739static bool qede_has_tx_work(struct qede_fastpath *fp)
740{
741 u8 tc;
742
743 for (tc = 0; tc < fp->edev->num_tc; tc++)
744 if (qede_txq_has_work(&fp->txqs[tc]))
745 return true;
746 return false;
747}
748
fc48b7a6
YM		 749/* This function reuses the buffer(from an offset) from
750 * consumer index to producer index in the bd ring
2950219d 751 */
fc48b7a6
YM		 752static inline void qede_reuse_page(struct qede_dev *edev,
753 struct qede_rx_queue *rxq,
754 struct sw_rx_data *curr_cons)
2950219d 755{
2950219d 756 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 757 struct sw_rx_data *curr_prod;
758 dma_addr_t new_mapping;
2950219d 759
fc48b7a6
YM		 760 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
761 *curr_prod = *curr_cons;
2950219d 762
fc48b7a6
YM		 763 new_mapping = curr_prod->mapping + curr_prod->page_offset;
764
765 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
766 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 767
2950219d 768 rxq->sw_rx_prod++;
fc48b7a6
YM		 769 curr_cons->data = NULL;
770}
771
772static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
773 struct qede_rx_queue *rxq,
774 struct sw_rx_data *curr_cons)
775{
776 /* Move to the next segment in the page */
777 curr_cons->page_offset += rxq->rx_buf_seg_size;
778
779 if (curr_cons->page_offset == PAGE_SIZE) {
780 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
781 return -ENOMEM;
782
783 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
784 PAGE_SIZE, DMA_FROM_DEVICE);
785 } else {
786 /* Increment refcount of the page as we don't want
787 * network stack to take the ownership of the page
788 * which can be recycled multiple times by the driver.
789 */
790 atomic_inc(&curr_cons->data->_count);
791 qede_reuse_page(edev, rxq, curr_cons);
792 }
793
794 return 0;
2950219d
YM		 795}
796
797static inline void qede_update_rx_prod(struct qede_dev *edev,
798 struct qede_rx_queue *rxq)
799{
800 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
801 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
802 struct eth_rx_prod_data rx_prods = {0};
803
804 /* Update producers */
805 rx_prods.bd_prod = cpu_to_le16(bd_prod);
806 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
807
808 /* Make sure that the BD and SGE data is updated before updating the
809 * producers since FW might read the BD/SGE right after the producer
810 * is updated.
811 */
812 wmb();
813
814 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
815 (u32 *)&rx_prods);
816
817 /* mmiowb is needed to synchronize doorbell writes from more than one
818 * processor. It guarantees that the write arrives to the device before
819 * the napi lock is released and another qede_poll is called (possibly
820 * on another CPU). Without this barrier, the next doorbell can bypass
821 * this doorbell. This is applicable to IA64/Altix systems.
822 */
823 mmiowb();
824}
825
826static u32 qede_get_rxhash(struct qede_dev *edev,
827 u8 bitfields,
828 __le32 rss_hash,
829 enum pkt_hash_types *rxhash_type)
830{
831 enum rss_hash_type htype;
832
833 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
834
835 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
836 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
837 (htype == RSS_HASH_TYPE_IPV6)) ?
838 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
839 return le32_to_cpu(rss_hash);
840 }
841 *rxhash_type = PKT_HASH_TYPE_NONE;
842 return 0;
843}
844
845static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
846{
847 skb_checksum_none_assert(skb);
848
849 if (csum_flag & QEDE_CSUM_UNNECESSARY)
850 skb->ip_summed = CHECKSUM_UNNECESSARY;
851}
852
853static inline void qede_skb_receive(struct qede_dev *edev,
854 struct qede_fastpath *fp,
855 struct sk_buff *skb,
856 u16 vlan_tag)
857{
858 if (vlan_tag)
859 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
860 vlan_tag);
861
862 napi_gro_receive(&fp->napi, skb);
863}
864
55482edc
MC		 865static void qede_set_gro_params(struct qede_dev *edev,
866 struct sk_buff *skb,
867 struct eth_fast_path_rx_tpa_start_cqe *cqe)
868{
869 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
870
871 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
872 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
873 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
874 else
875 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
876
877 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
878 cqe->header_len;
879}
880
881static int qede_fill_frag_skb(struct qede_dev *edev,
882 struct qede_rx_queue *rxq,
883 u8 tpa_agg_index,
884 u16 len_on_bd)
885{
886 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
887 NUM_RX_BDS_MAX];
888 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
889 struct sk_buff *skb = tpa_info->skb;
890
891 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
892 goto out;
893
894 /* Add one frag and update the appropriate fields in the skb */
895 skb_fill_page_desc(skb, tpa_info->frag_id++,
896 current_bd->data, current_bd->page_offset,
897 len_on_bd);
898
899 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
900 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
901 goto out;
902 }
903
904 qed_chain_consume(&rxq->rx_bd_ring);
905 rxq->sw_rx_cons++;
906
907 skb->data_len += len_on_bd;
908 skb->truesize += rxq->rx_buf_seg_size;
909 skb->len += len_on_bd;
910
911 return 0;
912
913out:
914 return -ENOMEM;
915}
916
917static void qede_tpa_start(struct qede_dev *edev,
918 struct qede_rx_queue *rxq,
919 struct eth_fast_path_rx_tpa_start_cqe *cqe)
920{
921 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
922 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
923 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
924 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
925 dma_addr_t mapping = tpa_info->replace_buf_mapping;
926 struct sw_rx_data *sw_rx_data_cons;
927 struct sw_rx_data *sw_rx_data_prod;
928 enum pkt_hash_types rxhash_type;
929 u32 rxhash;
930
931 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
932 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
933
934 /* Use pre-allocated replacement buffer - we can't release the agg.
935 * start until its over and we don't want to risk allocation failing
936 * here, so re-allocate when aggregation will be over.
937 */
938 dma_unmap_addr_set(sw_rx_data_prod, mapping,
939 dma_unmap_addr(replace_buf, mapping));
940
941 sw_rx_data_prod->data = replace_buf->data;
942 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
943 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
944 sw_rx_data_prod->page_offset = replace_buf->page_offset;
945
946 rxq->sw_rx_prod++;
947
948 /* move partial skb from cons to pool (don't unmap yet)
949 * save mapping, incase we drop the packet later on.
950 */
951 tpa_info->start_buf = *sw_rx_data_cons;
952 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
953 le32_to_cpu(rx_bd_cons->addr.lo));
954
955 tpa_info->start_buf_mapping = mapping;
956 rxq->sw_rx_cons++;
957
958 /* set tpa state to start only if we are able to allocate skb
959 * for this aggregation, otherwise mark as error and aggregation will
960 * be dropped
961 */
962 tpa_info->skb = netdev_alloc_skb(edev->ndev,
963 le16_to_cpu(cqe->len_on_first_bd));
964 if (unlikely(!tpa_info->skb)) {
965 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
966 return;
967 }
968
969 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
970 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
971
972 /* Start filling in the aggregation info */
973 tpa_info->frag_id = 0;
974 tpa_info->agg_state = QEDE_AGG_STATE_START;
975
976 rxhash = qede_get_rxhash(edev, cqe->bitfields,
977 cqe->rss_hash, &rxhash_type);
978 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
979 if ((le16_to_cpu(cqe->pars_flags.flags) >>
980 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
981 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
982 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
983 else
984 tpa_info->vlan_tag = 0;
985
986 /* This is needed in order to enable forwarding support */
987 qede_set_gro_params(edev, tpa_info->skb, cqe);
988
989 if (likely(cqe->ext_bd_len_list[0]))
990 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
991 le16_to_cpu(cqe->ext_bd_len_list[0]));
992
993 if (unlikely(cqe->ext_bd_len_list[1])) {
994 DP_ERR(edev,
995 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
996 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
997 }
998}
999
88f09bd5 1000#ifdef CONFIG_INET
55482edc
MC		 1001static void qede_gro_ip_csum(struct sk_buff *skb)
1002{
1003 const struct iphdr *iph = ip_hdr(skb);
1004 struct tcphdr *th;
1005
1006 skb_set_network_header(skb, 0);
1007 skb_set_transport_header(skb, sizeof(struct iphdr));
1008 th = tcp_hdr(skb);
1009
1010 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1011 iph->saddr, iph->daddr, 0);
1012
1013 tcp_gro_complete(skb);
1014}
1015
1016static void qede_gro_ipv6_csum(struct sk_buff *skb)
1017{
1018 struct ipv6hdr *iph = ipv6_hdr(skb);
1019 struct tcphdr *th;
1020
1021 skb_set_network_header(skb, 0);
1022 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1023 th = tcp_hdr(skb);
1024
1025 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1026 &iph->saddr, &iph->daddr, 0);
1027 tcp_gro_complete(skb);
1028}
88f09bd5 1029#endif
55482edc
MC		 1030
1031static void qede_gro_receive(struct qede_dev *edev,
1032 struct qede_fastpath *fp,
1033 struct sk_buff *skb,
1034 u16 vlan_tag)
1035{
88f09bd5 1036#ifdef CONFIG_INET
55482edc
MC		 1037 if (skb_shinfo(skb)->gso_size) {
1038 switch (skb->protocol) {
1039 case htons(ETH_P_IP):
1040 qede_gro_ip_csum(skb);
1041 break;
1042 case htons(ETH_P_IPV6):
1043 qede_gro_ipv6_csum(skb);
1044 break;
1045 default:
1046 DP_ERR(edev,
1047 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1048 ntohs(skb->protocol));
1049 }
1050 }
88f09bd5 1051#endif
55482edc
MC		 1052 skb_record_rx_queue(skb, fp->rss_id);
1053 qede_skb_receive(edev, fp, skb, vlan_tag);
1054}
1055
1056static inline void qede_tpa_cont(struct qede_dev *edev,
1057 struct qede_rx_queue *rxq,
1058 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1059{
1060 int i;
1061
1062 for (i = 0; cqe->len_list[i]; i++)
1063 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1064 le16_to_cpu(cqe->len_list[i]));
1065
1066 if (unlikely(i > 1))
1067 DP_ERR(edev,
1068 "Strange - TPA cont with more than a single len_list entry\n");
1069}
1070
1071static void qede_tpa_end(struct qede_dev *edev,
1072 struct qede_fastpath *fp,
1073 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1074{
1075 struct qede_rx_queue *rxq = fp->rxq;
1076 struct qede_agg_info *tpa_info;
1077 struct sk_buff *skb;
1078 int i;
1079
1080 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1081 skb = tpa_info->skb;
1082
1083 for (i = 0; cqe->len_list[i]; i++)
1084 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1085 le16_to_cpu(cqe->len_list[i]));
1086 if (unlikely(i > 1))
1087 DP_ERR(edev,
1088 "Strange - TPA emd with more than a single len_list entry\n");
1089
1090 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1091 goto err;
1092
1093 /* Sanity */
1094 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1095 DP_ERR(edev,
1096 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1097 cqe->num_of_bds, tpa_info->frag_id);
1098 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1099 DP_ERR(edev,
1100 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1101 le16_to_cpu(cqe->total_packet_len), skb->len);
1102
1103 memcpy(skb->data,
1104 page_address(tpa_info->start_buf.data) +
1105 tpa_info->start_cqe.placement_offset +
1106 tpa_info->start_buf.page_offset,
1107 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1108
1109 /* Recycle [mapped] start buffer for the next replacement */
1110 tpa_info->replace_buf = tpa_info->start_buf;
1111 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1112
1113 /* Finalize the SKB */
1114 skb->protocol = eth_type_trans(skb, edev->ndev);
1115 skb->ip_summed = CHECKSUM_UNNECESSARY;
1116
1117 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1118 * to skb_shinfo(skb)->gso_segs
1119 */
1120 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1121
1122 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1123
1124 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1125
1126 return;
1127err:
1128 /* The BD starting the aggregation is still mapped; Re-use it for
1129 * future aggregations [as replacement buffer]
1130 */
1131 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1132 sizeof(struct sw_rx_data));
1133 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1134 tpa_info->start_buf.data = NULL;
1135 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1136 dev_kfree_skb_any(tpa_info->skb);
1137 tpa_info->skb = NULL;
1138}
1139
2950219d
YM		 1140static u8 qede_check_csum(u16 flag)
1141{
1142 u16 csum_flag = 0;
1143 u8 csum = 0;
1144
1145 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1146 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
1147 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1148 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1149 csum = QEDE_CSUM_UNNECESSARY;
1150 }
1151
1152 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1153 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1154
1155 if (csum_flag & flag)
1156 return QEDE_CSUM_ERROR;
1157
1158 return csum;
1159}
1160
1161static int qede_rx_int(struct qede_fastpath *fp, int budget)
1162{
1163 struct qede_dev *edev = fp->edev;
1164 struct qede_rx_queue *rxq = fp->rxq;
1165
1166 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1167 int rx_pkt = 0;
1168 u8 csum_flag;
1169
1170 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1171 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1172
1173 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1174 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1175 * read before it is written by FW, then FW writes CQE and SB, and then
1176 * the CPU reads the hw_comp_cons, it will use an old CQE.
1177 */
1178 rmb();
1179
1180 /* Loop to complete all indicated BDs */
1181 while (sw_comp_cons != hw_comp_cons) {
1182 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1183 enum pkt_hash_types rxhash_type;
1184 enum eth_rx_cqe_type cqe_type;
1185 struct sw_rx_data *sw_rx_data;
1186 union eth_rx_cqe *cqe;
1187 struct sk_buff *skb;
fc48b7a6
YM		 1188 struct page *data;
1189 __le16 flags;
2950219d
YM		 1190 u16 len, pad;
1191 u32 rx_hash;
2950219d
YM		 1192
1193 /* Get the CQE from the completion ring */
1194 cqe = (union eth_rx_cqe *)
1195 qed_chain_consume(&rxq->rx_comp_ring);
1196 cqe_type = cqe->fast_path_regular.type;
1197
1198 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1199 edev->ops->eth_cqe_completion(
1200 edev->cdev, fp->rss_id,
1201 (struct eth_slow_path_rx_cqe *)cqe);
1202 goto next_cqe;
1203 }
1204
55482edc
MC		 1205 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1206 switch (cqe_type) {
1207 case ETH_RX_CQE_TYPE_TPA_START:
1208 qede_tpa_start(edev, rxq,
1209 &cqe->fast_path_tpa_start);
1210 goto next_cqe;
1211 case ETH_RX_CQE_TYPE_TPA_CONT:
1212 qede_tpa_cont(edev, rxq,
1213 &cqe->fast_path_tpa_cont);
1214 goto next_cqe;
1215 case ETH_RX_CQE_TYPE_TPA_END:
1216 qede_tpa_end(edev, fp,
1217 &cqe->fast_path_tpa_end);
1218 goto next_rx_only;
1219 default:
1220 break;
1221 }
1222 }
1223
2950219d
YM		 1224 /* Get the data from the SW ring */
1225 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1226 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1227 data = sw_rx_data->data;
1228
1229 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1230 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1231 pad = fp_cqe->placement_offset;
fc48b7a6 1232 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1233
fc48b7a6
YM		 1234 /* If this is an error packet then drop it */
1235 parse_flag = le16_to_cpu(flags);
2950219d 1236
fc48b7a6
YM		 1237 csum_flag = qede_check_csum(parse_flag);
1238 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1239 DP_NOTICE(edev,
1240 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1241 sw_comp_cons, parse_flag);
1242 rxq->rx_hw_errors++;
1243 qede_reuse_page(edev, rxq, sw_rx_data);
1244 goto next_rx;
1245 }
2950219d 1246
fc48b7a6
YM		 1247 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1248 if (unlikely(!skb)) {
2950219d 1249 DP_NOTICE(edev,
fc48b7a6
YM		 1250 "Build_skb failed, dropping incoming packet\n");
1251 qede_reuse_page(edev, rxq, sw_rx_data);
2950219d 1252 rxq->rx_alloc_errors++;
fc48b7a6
YM		 1253 goto next_rx;
1254 }
1255
1256 /* Copy data into SKB */
1257 if (len + pad <= QEDE_RX_HDR_SIZE) {
1258 memcpy(skb_put(skb, len),
1259 page_address(data) + pad +
1260 sw_rx_data->page_offset, len);
1261 qede_reuse_page(edev, rxq, sw_rx_data);
1262 } else {
1263 struct skb_frag_struct *frag;
1264 unsigned int pull_len;
1265 unsigned char *va;
1266
1267 frag = &skb_shinfo(skb)->frags[0];
1268
1269 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1270 pad + sw_rx_data->page_offset,
1271 len, rxq->rx_buf_seg_size);
1272
1273 va = skb_frag_address(frag);
1274 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1275
1276 /* Align the pull_len to optimize memcpy */
1277 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1278
1279 skb_frag_size_sub(frag, pull_len);
1280 frag->page_offset += pull_len;
1281 skb->data_len -= pull_len;
1282 skb->tail += pull_len;
1283
1284 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1285 sw_rx_data))) {
1286 DP_ERR(edev, "Failed to allocate rx buffer\n");
1287 rxq->rx_alloc_errors++;
1288 goto next_cqe;
1289 }
2950219d
YM		 1290 }
1291
fc48b7a6
YM		 1292 if (fp_cqe->bd_num != 1) {
1293 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1294 u8 num_frags;
1295
1296 pkt_len -= len;
1297
1298 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1299 num_frags--) {
1300 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1301 rxq->rx_buf_size : pkt_len;
1302
1303 WARN_ONCE(!cur_size,
1304 "Still got %d BDs for mapping jumbo, but length became 0\n",
1305 num_frags);
1306
1307 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
1308 goto next_cqe;
1309
1310 rxq->sw_rx_cons++;
1311 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1312 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1313 qed_chain_consume(&rxq->rx_bd_ring);
1314 dma_unmap_page(&edev->pdev->dev,
1315 sw_rx_data->mapping,
1316 PAGE_SIZE, DMA_FROM_DEVICE);
1317
1318 skb_fill_page_desc(skb,
1319 skb_shinfo(skb)->nr_frags++,
1320 sw_rx_data->data, 0,
1321 cur_size);
1322
1323 skb->truesize += PAGE_SIZE;
1324 skb->data_len += cur_size;
1325 skb->len += cur_size;
1326 pkt_len -= cur_size;
1327 }
2950219d 1328
fc48b7a6
YM		 1329 if (pkt_len)
1330 DP_ERR(edev,
1331 "Mapped all BDs of jumbo, but still have %d bytes\n",
1332 pkt_len);
1333 }
2950219d
YM		 1334
1335 skb->protocol = eth_type_trans(skb, edev->ndev);
1336
1337 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1338 fp_cqe->rss_hash,
1339 &rxhash_type);
1340
1341 skb_set_hash(skb, rx_hash, rxhash_type);
1342
1343 qede_set_skb_csum(skb, csum_flag);
1344
1345 skb_record_rx_queue(skb, fp->rss_id);
1346
1347 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1348
1349 qed_chain_consume(&rxq->rx_bd_ring);
2950219d
YM		 1350next_rx:
1351 rxq->sw_rx_cons++;
55482edc 1352next_rx_only:
2950219d
YM		 1353 rx_pkt++;
1354
1355next_cqe: /* don't consume bd rx buffer */
1356 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1357 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1358 /* CR TPA - revisit how to handle budget in TPA perhaps
1359 * increase on "end"
1360 */
1361 if (rx_pkt == budget)
1362 break;
1363 } /* repeat while sw_comp_cons != hw_comp_cons... */
1364
1365 /* Update producers */
1366 qede_update_rx_prod(edev, rxq);
1367
1368 return rx_pkt;
1369}
1370
1371static int qede_poll(struct napi_struct *napi, int budget)
1372{
1373 int work_done = 0;
1374 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1375 napi);
1376 struct qede_dev *edev = fp->edev;
1377
1378 while (1) {
1379 u8 tc;
1380
1381 for (tc = 0; tc < edev->num_tc; tc++)
1382 if (qede_txq_has_work(&fp->txqs[tc]))
1383 qede_tx_int(edev, &fp->txqs[tc]);
1384
1385 if (qede_has_rx_work(fp->rxq)) {
1386 work_done += qede_rx_int(fp, budget - work_done);
1387
1388 /* must not complete if we consumed full budget */
1389 if (work_done >= budget)
1390 break;
1391 }
1392
1393 /* Fall out from the NAPI loop if needed */
1394 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1395 qed_sb_update_sb_idx(fp->sb_info);
1396 /* *_has_*_work() reads the status block,
1397 * thus we need to ensure that status block indices
1398 * have been actually read (qed_sb_update_sb_idx)
1399 * prior to this check (*_has_*_work) so that
1400 * we won't write the "newer" value of the status block
1401 * to HW (if there was a DMA right after
1402 * qede_has_rx_work and if there is no rmb, the memory
1403 * reading (qed_sb_update_sb_idx) may be postponed
1404 * to right before *_ack_sb). In this case there
1405 * will never be another interrupt until there is
1406 * another update of the status block, while there
1407 * is still unhandled work.
1408 */
1409 rmb();
1410
1411 if (!(qede_has_rx_work(fp->rxq) ||
1412 qede_has_tx_work(fp))) {
1413 napi_complete(napi);
1414 /* Update and reenable interrupts */
1415 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1416 1 /*update*/);
1417 break;
1418 }
1419 }
1420 }
1421
1422 return work_done;
1423}
1424
1425static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1426{
1427 struct qede_fastpath *fp = fp_cookie;
1428
1429 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1430
1431 napi_schedule_irqoff(&fp->napi);
1432 return IRQ_HANDLED;
1433}
1434
1435/* -------------------------------------------------------------------------
1436 * END OF FAST-PATH
1437 * -------------------------------------------------------------------------
1438 */
1439
1440static int qede_open(struct net_device *ndev);
1441static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1442static int qede_set_mac_addr(struct net_device *ndev, void *p);
1443static void qede_set_rx_mode(struct net_device *ndev);
1444static void qede_config_rx_mode(struct net_device *ndev);
1445
1446static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1447 enum qed_filter_xcast_params_type opcode,
1448 unsigned char mac[ETH_ALEN])
1449{
1450 struct qed_filter_params filter_cmd;
1451
1452 memset(&filter_cmd, 0, sizeof(filter_cmd));
1453 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1454 filter_cmd.filter.ucast.type = opcode;
1455 filter_cmd.filter.ucast.mac_valid = 1;
1456 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1457
1458 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1459}
1460
7c1bfcad
SRK		 1461static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1462 enum qed_filter_xcast_params_type opcode,
1463 u16 vid)
1464{
1465 struct qed_filter_params filter_cmd;
1466
1467 memset(&filter_cmd, 0, sizeof(filter_cmd));
1468 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1469 filter_cmd.filter.ucast.type = opcode;
1470 filter_cmd.filter.ucast.vlan_valid = 1;
1471 filter_cmd.filter.ucast.vlan = vid;
1472
1473 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1474}
1475
133fac0e
SK		 1476void qede_fill_by_demand_stats(struct qede_dev *edev)
1477{
1478 struct qed_eth_stats stats;
1479
1480 edev->ops->get_vport_stats(edev->cdev, &stats);
1481 edev->stats.no_buff_discards = stats.no_buff_discards;
1482 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1483 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1484 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1485 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1486 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1487 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1488 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1489 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1490
1491 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1492 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1493 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1494 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1495 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1496 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1497 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1498 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1499 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1500 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1501 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1502 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1503
1504 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1505 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1506 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1507 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1508 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1509 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1510 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1511 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1512 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1513 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1514 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1515 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1516 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1517 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1518 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1519 edev->stats.rx_align_errors = stats.rx_align_errors;
1520 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1521 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1522 edev->stats.rx_jabbers = stats.rx_jabbers;
1523 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1524 edev->stats.rx_fragments = stats.rx_fragments;
1525 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1526 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1527 edev->stats.tx_128_to_255_byte_packets =
1528 stats.tx_128_to_255_byte_packets;
1529 edev->stats.tx_256_to_511_byte_packets =
1530 stats.tx_256_to_511_byte_packets;
1531 edev->stats.tx_512_to_1023_byte_packets =
1532 stats.tx_512_to_1023_byte_packets;
1533 edev->stats.tx_1024_to_1518_byte_packets =
1534 stats.tx_1024_to_1518_byte_packets;
1535 edev->stats.tx_1519_to_2047_byte_packets =
1536 stats.tx_1519_to_2047_byte_packets;
1537 edev->stats.tx_2048_to_4095_byte_packets =
1538 stats.tx_2048_to_4095_byte_packets;
1539 edev->stats.tx_4096_to_9216_byte_packets =
1540 stats.tx_4096_to_9216_byte_packets;
1541 edev->stats.tx_9217_to_16383_byte_packets =
1542 stats.tx_9217_to_16383_byte_packets;
1543 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1544 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1545 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1546 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1547 edev->stats.brb_truncates = stats.brb_truncates;
1548 edev->stats.brb_discards = stats.brb_discards;
1549 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1550}
1551
1552static struct rtnl_link_stats64 *qede_get_stats64(
1553 struct net_device *dev,
1554 struct rtnl_link_stats64 *stats)
1555{
1556 struct qede_dev *edev = netdev_priv(dev);
1557
1558 qede_fill_by_demand_stats(edev);
1559
1560 stats->rx_packets = edev->stats.rx_ucast_pkts +
1561 edev->stats.rx_mcast_pkts +
1562 edev->stats.rx_bcast_pkts;
1563 stats->tx_packets = edev->stats.tx_ucast_pkts +
1564 edev->stats.tx_mcast_pkts +
1565 edev->stats.tx_bcast_pkts;
1566
1567 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1568 edev->stats.rx_mcast_bytes +
1569 edev->stats.rx_bcast_bytes;
1570
1571 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1572 edev->stats.tx_mcast_bytes +
1573 edev->stats.tx_bcast_bytes;
1574
1575 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1576 stats->multicast = edev->stats.rx_mcast_pkts +
1577 edev->stats.rx_bcast_pkts;
1578
1579 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1580
1581 stats->collisions = edev->stats.tx_total_collisions;
1582 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1583 stats->rx_frame_errors = edev->stats.rx_align_errors;
1584
1585 return stats;
1586}
1587
7c1bfcad
SRK		 1588static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1589{
1590 struct qed_update_vport_params params;
1591 int rc;
1592
1593 /* Proceed only if action actually needs to be performed */
1594 if (edev->accept_any_vlan == action)
1595 return;
1596
1597 memset(&params, 0, sizeof(params));
1598
1599 params.vport_id = 0;
1600 params.accept_any_vlan = action;
1601 params.update_accept_any_vlan_flg = 1;
1602
1603 rc = edev->ops->vport_update(edev->cdev, &params);
1604 if (rc) {
1605 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1606 action ? "enable" : "disable");
1607 } else {
1608 DP_INFO(edev, "%s accept-any-vlan\n",
1609 action ? "enabled" : "disabled");
1610 edev->accept_any_vlan = action;
1611 }
1612}
1613
1614static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1615{
1616 struct qede_dev *edev = netdev_priv(dev);
1617 struct qede_vlan *vlan, *tmp;
1618 int rc;
1619
1620 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1621
1622 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1623 if (!vlan) {
1624 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1625 return -ENOMEM;
1626 }
1627 INIT_LIST_HEAD(&vlan->list);
1628 vlan->vid = vid;
1629 vlan->configured = false;
1630
1631 /* Verify vlan isn't already configured */
1632 list_for_each_entry(tmp, &edev->vlan_list, list) {
1633 if (tmp->vid == vlan->vid) {
1634 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1635 "vlan already configured\n");
1636 kfree(vlan);
1637 return -EEXIST;
1638 }
1639 }
1640
1641 /* If interface is down, cache this VLAN ID and return */
1642 if (edev->state != QEDE_STATE_OPEN) {
1643 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1644 "Interface is down, VLAN %d will be configured when interface is up\n",
1645 vid);
1646 if (vid != 0)
1647 edev->non_configured_vlans++;
1648 list_add(&vlan->list, &edev->vlan_list);
1649
1650 return 0;
1651 }
1652
1653 /* Check for the filter limit.
1654 * Note - vlan0 has a reserved filter and can be added without
1655 * worrying about quota
1656 */
1657 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1658 (vlan->vid == 0)) {
1659 rc = qede_set_ucast_rx_vlan(edev,
1660 QED_FILTER_XCAST_TYPE_ADD,
1661 vlan->vid);
1662 if (rc) {
1663 DP_ERR(edev, "Failed to configure VLAN %d\n",
1664 vlan->vid);
1665 kfree(vlan);
1666 return -EINVAL;
1667 }
1668 vlan->configured = true;
1669
1670 /* vlan0 filter isn't consuming out of our quota */
1671 if (vlan->vid != 0)
1672 edev->configured_vlans++;
1673 } else {
1674 /* Out of quota; Activate accept-any-VLAN mode */
1675 if (!edev->non_configured_vlans)
1676 qede_config_accept_any_vlan(edev, true);
1677
1678 edev->non_configured_vlans++;
1679 }
1680
1681 list_add(&vlan->list, &edev->vlan_list);
1682
1683 return 0;
1684}
1685
1686static void qede_del_vlan_from_list(struct qede_dev *edev,
1687 struct qede_vlan *vlan)
1688{
1689 /* vlan0 filter isn't consuming out of our quota */
1690 if (vlan->vid != 0) {
1691 if (vlan->configured)
1692 edev->configured_vlans--;
1693 else
1694 edev->non_configured_vlans--;
1695 }
1696
1697 list_del(&vlan->list);
1698 kfree(vlan);
1699}
1700
1701static int qede_configure_vlan_filters(struct qede_dev *edev)
1702{
1703 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1704 struct qed_dev_eth_info *dev_info;
1705 struct qede_vlan *vlan = NULL;
1706
1707 if (list_empty(&edev->vlan_list))
1708 return 0;
1709
1710 dev_info = &edev->dev_info;
1711
1712 /* Configure non-configured vlans */
1713 list_for_each_entry(vlan, &edev->vlan_list, list) {
1714 if (vlan->configured)
1715 continue;
1716
1717 /* We have used all our credits, now enable accept_any_vlan */
1718 if ((vlan->vid != 0) &&
1719 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1720 accept_any_vlan = 1;
1721 continue;
1722 }
1723
1724 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1725
1726 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1727 vlan->vid);
1728 if (rc) {
1729 DP_ERR(edev, "Failed to configure VLAN %u\n",
1730 vlan->vid);
1731 real_rc = rc;
1732 continue;
1733 }
1734
1735 vlan->configured = true;
1736 /* vlan0 filter doesn't consume our VLAN filter's quota */
1737 if (vlan->vid != 0) {
1738 edev->non_configured_vlans--;
1739 edev->configured_vlans++;
1740 }
1741 }
1742
1743 /* enable accept_any_vlan mode if we have more VLANs than credits,
1744 * or remove accept_any_vlan mode if we've actually removed
1745 * a non-configured vlan, and all remaining vlans are truly configured.
1746 */
1747
1748 if (accept_any_vlan)
1749 qede_config_accept_any_vlan(edev, true);
1750 else if (!edev->non_configured_vlans)
1751 qede_config_accept_any_vlan(edev, false);
1752
1753 return real_rc;
1754}
1755
1756static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1757{
1758 struct qede_dev *edev = netdev_priv(dev);
1759 struct qede_vlan *vlan = NULL;
1760 int rc;
1761
1762 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1763
1764 /* Find whether entry exists */
1765 list_for_each_entry(vlan, &edev->vlan_list, list)
1766 if (vlan->vid == vid)
1767 break;
1768
1769 if (!vlan || (vlan->vid != vid)) {
1770 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1771 "Vlan isn't configured\n");
1772 return 0;
1773 }
1774
1775 if (edev->state != QEDE_STATE_OPEN) {
1776 /* As interface is already down, we don't have a VPORT
1777 * instance to remove vlan filter. So just update vlan list
1778 */
1779 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1780 "Interface is down, removing VLAN from list only\n");
1781 qede_del_vlan_from_list(edev, vlan);
1782 return 0;
1783 }
1784
1785 /* Remove vlan */
1786 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1787 if (rc) {
1788 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1789 return -EINVAL;
1790 }
1791
1792 qede_del_vlan_from_list(edev, vlan);
1793
1794 /* We have removed a VLAN - try to see if we can
1795 * configure non-configured VLAN from the list.
1796 */
1797 rc = qede_configure_vlan_filters(edev);
1798
1799 return rc;
1800}
1801
1802static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1803{
1804 struct qede_vlan *vlan = NULL;
1805
1806 if (list_empty(&edev->vlan_list))
1807 return;
1808
1809 list_for_each_entry(vlan, &edev->vlan_list, list) {
1810 if (!vlan->configured)
1811 continue;
1812
1813 vlan->configured = false;
1814
1815 /* vlan0 filter isn't consuming out of our quota */
1816 if (vlan->vid != 0) {
1817 edev->non_configured_vlans++;
1818 edev->configured_vlans--;
1819 }
1820
1821 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1822 "marked vlan %d as non-configured\n",
1823 vlan->vid);
1824 }
1825
1826 edev->accept_any_vlan = false;
1827}
1828
b18e170c
MC		 1829#ifdef CONFIG_QEDE_VXLAN
1830static void qede_add_vxlan_port(struct net_device *dev,
1831 sa_family_t sa_family, __be16 port)
1832{
1833 struct qede_dev *edev = netdev_priv(dev);
1834 u16 t_port = ntohs(port);
1835
1836 if (edev->vxlan_dst_port)
1837 return;
1838
1839 edev->vxlan_dst_port = t_port;
1840
1841 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d", t_port);
1842
1843 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
1844 schedule_delayed_work(&edev->sp_task, 0);
1845}
1846
1847static void qede_del_vxlan_port(struct net_device *dev,
1848 sa_family_t sa_family, __be16 port)
1849{
1850 struct qede_dev *edev = netdev_priv(dev);
1851 u16 t_port = ntohs(port);
1852
1853 if (t_port != edev->vxlan_dst_port)
1854 return;
1855
1856 edev->vxlan_dst_port = 0;
1857
1858 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d", t_port);
1859
1860 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
1861 schedule_delayed_work(&edev->sp_task, 0);
1862}
1863#endif
1864
9a109dd0
MC		 1865#ifdef CONFIG_QEDE_GENEVE
1866static void qede_add_geneve_port(struct net_device *dev,
1867 sa_family_t sa_family, __be16 port)
1868{
1869 struct qede_dev *edev = netdev_priv(dev);
1870 u16 t_port = ntohs(port);
1871
1872 if (edev->geneve_dst_port)
1873 return;
1874
1875 edev->geneve_dst_port = t_port;
1876
1877 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d", t_port);
1878 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
1879 schedule_delayed_work(&edev->sp_task, 0);
1880}
1881
1882static void qede_del_geneve_port(struct net_device *dev,
1883 sa_family_t sa_family, __be16 port)
1884{
1885 struct qede_dev *edev = netdev_priv(dev);
1886 u16 t_port = ntohs(port);
1887
1888 if (t_port != edev->geneve_dst_port)
1889 return;
1890
1891 edev->geneve_dst_port = 0;
1892
1893 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d", t_port);
1894 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
1895 schedule_delayed_work(&edev->sp_task, 0);
1896}
1897#endif
1898
2950219d
YM		 1899static const struct net_device_ops qede_netdev_ops = {
1900 .ndo_open = qede_open,
1901 .ndo_stop = qede_close,
1902 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1903 .ndo_set_rx_mode = qede_set_rx_mode,
1904 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1905 .ndo_validate_addr = eth_validate_addr,
133fac0e 1906 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 1907 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1908 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 1909 .ndo_get_stats64 = qede_get_stats64,
b18e170c
MC		 1910#ifdef CONFIG_QEDE_VXLAN
1911 .ndo_add_vxlan_port = qede_add_vxlan_port,
1912 .ndo_del_vxlan_port = qede_del_vxlan_port,
1913#endif
9a109dd0
MC		 1914#ifdef CONFIG_QEDE_GENEVE
1915 .ndo_add_geneve_port = qede_add_geneve_port,
1916 .ndo_del_geneve_port = qede_del_geneve_port,
1917#endif
2950219d
YM		 1918};
1919
e712d52b
YM		 1920/* -------------------------------------------------------------------------
1921 * START OF PROBE / REMOVE
1922 * -------------------------------------------------------------------------
1923 */
1924
1925static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1926 struct pci_dev *pdev,
1927 struct qed_dev_eth_info *info,
1928 u32 dp_module,
1929 u8 dp_level)
1930{
1931 struct net_device *ndev;
1932 struct qede_dev *edev;
1933
1934 ndev = alloc_etherdev_mqs(sizeof(*edev),
1935 info->num_queues,
1936 info->num_queues);
1937 if (!ndev) {
1938 pr_err("etherdev allocation failed\n");
1939 return NULL;
1940 }
1941
1942 edev = netdev_priv(ndev);
1943 edev->ndev = ndev;
1944 edev->cdev = cdev;
1945 edev->pdev = pdev;
1946 edev->dp_module = dp_module;
1947 edev->dp_level = dp_level;
1948 edev->ops = qed_ops;
2950219d
YM		 1949 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1950 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1951
1952 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1953
1954 SET_NETDEV_DEV(ndev, &pdev->dev);
1955
133fac0e 1956 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1957 memcpy(&edev->dev_info, info, sizeof(*info));
1958
1959 edev->num_tc = edev->dev_info.num_tc;
1960
7c1bfcad
SRK		 1961 INIT_LIST_HEAD(&edev->vlan_list);
1962
e712d52b
YM		 1963 return edev;
1964}
1965
1966static void qede_init_ndev(struct qede_dev *edev)
1967{
1968 struct net_device *ndev = edev->ndev;
1969 struct pci_dev *pdev = edev->pdev;
1970 u32 hw_features;
1971
1972 pci_set_drvdata(pdev, ndev);
1973
1974 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1975 ndev->base_addr = ndev->mem_start;
1976 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1977 ndev->irq = edev->dev_info.common.pci_irq;
1978
1979 ndev->watchdog_timeo = TX_TIMEOUT;
1980
2950219d
YM		 1981 ndev->netdev_ops = &qede_netdev_ops;
1982
133fac0e
SK		 1983 qede_set_ethtool_ops(ndev);
1984
e712d52b
YM		 1985 /* user-changeble features */
1986 hw_features = NETIF_F_GRO | NETIF_F_SG |
1987 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1988 NETIF_F_TSO | NETIF_F_TSO6;
1989
1990 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1991 NETIF_F_HIGHDMA;
1992 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1993 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 1994 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 1995
1996 ndev->hw_features = hw_features;
1997
1998 /* Set network device HW mac */
1999 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2000}
2001
2002/* This function converts from 32b param to two params of level and module
2003 * Input 32b decoding:
2004 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2005 * 'happy' flow, e.g. memory allocation failed.
2006 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2007 * and provide important parameters.
2008 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2009 * module. VERBOSE prints are for tracking the specific flow in low level.
2010 *
2011 * Notice that the level should be that of the lowest required logs.
2012 */
133fac0e 2013void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2014{
2015 *p_dp_level = QED_LEVEL_NOTICE;
2016 *p_dp_module = 0;
2017
2018 if (debug & QED_LOG_VERBOSE_MASK) {
2019 *p_dp_level = QED_LEVEL_VERBOSE;
2020 *p_dp_module = (debug & 0x3FFFFFFF);
2021 } else if (debug & QED_LOG_INFO_MASK) {
2022 *p_dp_level = QED_LEVEL_INFO;
2023 } else if (debug & QED_LOG_NOTICE_MASK) {
2024 *p_dp_level = QED_LEVEL_NOTICE;
2025 }
2026}
2027
2950219d
YM		 2028static void qede_free_fp_array(struct qede_dev *edev)
2029{
2030 if (edev->fp_array) {
2031 struct qede_fastpath *fp;
2032 int i;
2033
2034 for_each_rss(i) {
2035 fp = &edev->fp_array[i];
2036
2037 kfree(fp->sb_info);
2038 kfree(fp->rxq);
2039 kfree(fp->txqs);
2040 }
2041 kfree(edev->fp_array);
2042 }
2043 edev->num_rss = 0;
2044}
2045
2046static int qede_alloc_fp_array(struct qede_dev *edev)
2047{
2048 struct qede_fastpath *fp;
2049 int i;
2050
2051 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2052 sizeof(*edev->fp_array), GFP_KERNEL);
2053 if (!edev->fp_array) {
2054 DP_NOTICE(edev, "fp array allocation failed\n");
2055 goto err;
2056 }
2057
2058 for_each_rss(i) {
2059 fp = &edev->fp_array[i];
2060
2061 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2062 if (!fp->sb_info) {
2063 DP_NOTICE(edev, "sb info struct allocation failed\n");
2064 goto err;
2065 }
2066
2067 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2068 if (!fp->rxq) {
2069 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2070 goto err;
2071 }
2072
2073 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2074 if (!fp->txqs) {
2075 DP_NOTICE(edev, "TXQ array allocation failed\n");
2076 goto err;
2077 }
2078 }
2079
2080 return 0;
2081err:
2082 qede_free_fp_array(edev);
2083 return -ENOMEM;
2084}
2085
0d8e0aa0
SK		 2086static void qede_sp_task(struct work_struct *work)
2087{
2088 struct qede_dev *edev = container_of(work, struct qede_dev,
2089 sp_task.work);
b18e170c
MC		 2090 struct qed_dev *cdev = edev->cdev;
2091
0d8e0aa0
SK		 2092 mutex_lock(&edev->qede_lock);
2093
2094 if (edev->state == QEDE_STATE_OPEN) {
2095 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2096 qede_config_rx_mode(edev->ndev);
2097 }
2098
b18e170c
MC		 2099 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2100 struct qed_tunn_params tunn_params;
2101
2102 memset(&tunn_params, 0, sizeof(tunn_params));
2103 tunn_params.update_vxlan_port = 1;
2104 tunn_params.vxlan_port = edev->vxlan_dst_port;
2105 qed_ops->tunn_config(cdev, &tunn_params);
2106 }
2107
9a109dd0
MC		 2108 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2109 struct qed_tunn_params tunn_params;
2110
2111 memset(&tunn_params, 0, sizeof(tunn_params));
2112 tunn_params.update_geneve_port = 1;
2113 tunn_params.geneve_port = edev->geneve_dst_port;
2114 qed_ops->tunn_config(cdev, &tunn_params);
2115 }
2116
0d8e0aa0
SK		 2117 mutex_unlock(&edev->qede_lock);
2118}
2119
e712d52b
YM		 2120static void qede_update_pf_params(struct qed_dev *cdev)
2121{
2122 struct qed_pf_params pf_params;
2123
2124 /* 16 rx + 16 tx */
2125 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2126 pf_params.eth_pf_params.num_cons = 32;
2127 qed_ops->common->update_pf_params(cdev, &pf_params);
2128}
2129
2130enum qede_probe_mode {
2131 QEDE_PROBE_NORMAL,
2132};
2133
2134static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2135 enum qede_probe_mode mode)
2136{
2137 struct qed_slowpath_params params;
2138 struct qed_dev_eth_info dev_info;
2139 struct qede_dev *edev;
2140 struct qed_dev *cdev;
2141 int rc;
2142
2143 if (unlikely(dp_level & QED_LEVEL_INFO))
2144 pr_notice("Starting qede probe\n");
2145
2146 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2147 dp_module, dp_level);
2148 if (!cdev) {
2149 rc = -ENODEV;
2150 goto err0;
2151 }
2152
2153 qede_update_pf_params(cdev);
2154
2155 /* Start the Slowpath-process */
2156 memset(&params, 0, sizeof(struct qed_slowpath_params));
2157 params.int_mode = QED_INT_MODE_MSIX;
2158 params.drv_major = QEDE_MAJOR_VERSION;
2159 params.drv_minor = QEDE_MINOR_VERSION;
2160 params.drv_rev = QEDE_REVISION_VERSION;
2161 params.drv_eng = QEDE_ENGINEERING_VERSION;
2162 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2163 rc = qed_ops->common->slowpath_start(cdev, &params);
2164 if (rc) {
2165 pr_notice("Cannot start slowpath\n");
2166 goto err1;
2167 }
2168
2169 /* Learn information crucial for qede to progress */
2170 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2171 if (rc)
2172 goto err2;
2173
2174 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2175 dp_level);
2176 if (!edev) {
2177 rc = -ENOMEM;
2178 goto err2;
2179 }
2180
2181 qede_init_ndev(edev);
2182
2950219d
YM		 2183 rc = register_netdev(edev->ndev);
2184 if (rc) {
2185 DP_NOTICE(edev, "Cannot register net-device\n");
2186 goto err3;
2187 }
2188
e712d52b
YM		 2189 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2190
a2ec6172
SK		 2191 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2192
0d8e0aa0
SK		 2193 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2194 mutex_init(&edev->qede_lock);
2195
e712d52b
YM		 2196 DP_INFO(edev, "Ending successfully qede probe\n");
2197
2198 return 0;
2199
2950219d
YM		 2200err3:
2201 free_netdev(edev->ndev);
e712d52b
YM		 2202err2:
2203 qed_ops->common->slowpath_stop(cdev);
2204err1:
2205 qed_ops->common->remove(cdev);
2206err0:
2207 return rc;
2208}
2209
2210static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2211{
2212 u32 dp_module = 0;
2213 u8 dp_level = 0;
2214
2215 qede_config_debug(debug, &dp_module, &dp_level);
2216
2217 return __qede_probe(pdev, dp_module, dp_level,
2218 QEDE_PROBE_NORMAL);
2219}
2220
2221enum qede_remove_mode {
2222 QEDE_REMOVE_NORMAL,
2223};
2224
2225static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2226{
2227 struct net_device *ndev = pci_get_drvdata(pdev);
2228 struct qede_dev *edev = netdev_priv(ndev);
2229 struct qed_dev *cdev = edev->cdev;
2230
2231 DP_INFO(edev, "Starting qede_remove\n");
2232
0d8e0aa0 2233 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2234 unregister_netdev(ndev);
2235
e712d52b
YM		 2236 edev->ops->common->set_power_state(cdev, PCI_D0);
2237
2238 pci_set_drvdata(pdev, NULL);
2239
2240 free_netdev(ndev);
2241
2242 /* Use global ops since we've freed edev */
2243 qed_ops->common->slowpath_stop(cdev);
2244 qed_ops->common->remove(cdev);
2245
2246 pr_notice("Ending successfully qede_remove\n");
2247}
2248
2249static void qede_remove(struct pci_dev *pdev)
2250{
2251 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2252}
2950219d
YM		 2253
2254/* -------------------------------------------------------------------------
2255 * START OF LOAD / UNLOAD
2256 * -------------------------------------------------------------------------
2257 */
2258
2259static int qede_set_num_queues(struct qede_dev *edev)
2260{
2261 int rc;
2262 u16 rss_num;
2263
2264 /* Setup queues according to possible resources*/
8edf049d
SK		 2265 if (edev->req_rss)
2266 rss_num = edev->req_rss;
2267 else
2268 rss_num = netif_get_num_default_rss_queues() *
2269 edev->dev_info.common.num_hwfns;
2950219d
YM		 2270
2271 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2272
2273 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2274 if (rc > 0) {
2275 /* Managed to request interrupts for our queues */
2276 edev->num_rss = rc;
2277 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2278 QEDE_RSS_CNT(edev), rss_num);
2279 rc = 0;
2280 }
2281 return rc;
2282}
2283
2284static void qede_free_mem_sb(struct qede_dev *edev,
2285 struct qed_sb_info *sb_info)
2286{
2287 if (sb_info->sb_virt)
2288 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2289 (void *)sb_info->sb_virt, sb_info->sb_phys);
2290}
2291
2292/* This function allocates fast-path status block memory */
2293static int qede_alloc_mem_sb(struct qede_dev *edev,
2294 struct qed_sb_info *sb_info,
2295 u16 sb_id)
2296{
2297 struct status_block *sb_virt;
2298 dma_addr_t sb_phys;
2299 int rc;
2300
2301 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2302 sizeof(*sb_virt),
2303 &sb_phys, GFP_KERNEL);
2304 if (!sb_virt) {
2305 DP_ERR(edev, "Status block allocation failed\n");
2306 return -ENOMEM;
2307 }
2308
2309 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2310 sb_virt, sb_phys, sb_id,
2311 QED_SB_TYPE_L2_QUEUE);
2312 if (rc) {
2313 DP_ERR(edev, "Status block initialization failed\n");
2314 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2315 sb_virt, sb_phys);
2316 return rc;
2317 }
2318
2319 return 0;
2320}
2321
2322static void qede_free_rx_buffers(struct qede_dev *edev,
2323 struct qede_rx_queue *rxq)
2324{
2325 u16 i;
2326
2327 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2328 struct sw_rx_data *rx_buf;
fc48b7a6 2329 struct page *data;
2950219d
YM		 2330
2331 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2332 data = rx_buf->data;
2333
fc48b7a6
YM		 2334 dma_unmap_page(&edev->pdev->dev,
2335 rx_buf->mapping,
2336 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2337
2338 rx_buf->data = NULL;
fc48b7a6 2339 __free_page(data);
2950219d
YM		 2340 }
2341}
2342
55482edc
MC		 2343static void qede_free_sge_mem(struct qede_dev *edev,
2344 struct qede_rx_queue *rxq) {
2345 int i;
2346
2347 if (edev->gro_disable)
2348 return;
2349
2350 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2351 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2352 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2353
2354 if (replace_buf) {
2355 dma_unmap_page(&edev->pdev->dev,
2356 dma_unmap_addr(replace_buf, mapping),
2357 PAGE_SIZE, DMA_FROM_DEVICE);
2358 __free_page(replace_buf->data);
2359 }
2360 }
2361}
2362
2950219d
YM		 2363static void qede_free_mem_rxq(struct qede_dev *edev,
2364 struct qede_rx_queue *rxq)
2365{
55482edc
MC		 2366 qede_free_sge_mem(edev, rxq);
2367
2950219d
YM		 2368 /* Free rx buffers */
2369 qede_free_rx_buffers(edev, rxq);
2370
2371 /* Free the parallel SW ring */
2372 kfree(rxq->sw_rx_ring);
2373
2374 /* Free the real RQ ring used by FW */
2375 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2376 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2377}
2378
2379static int qede_alloc_rx_buffer(struct qede_dev *edev,
2380 struct qede_rx_queue *rxq)
2381{
2382 struct sw_rx_data *sw_rx_data;
2383 struct eth_rx_bd *rx_bd;
2384 dma_addr_t mapping;
fc48b7a6 2385 struct page *data;
2950219d 2386 u16 rx_buf_size;
2950219d
YM		 2387
2388 rx_buf_size = rxq->rx_buf_size;
2389
fc48b7a6 2390 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2391 if (unlikely(!data)) {
fc48b7a6 2392 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2393 return -ENOMEM;
2394 }
2395
fc48b7a6
YM		 2396 /* Map the entire page as it would be used
2397 * for multiple RX buffer segment size mapping.
2398 */
2399 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2400 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2401 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2402 __free_page(data);
2950219d
YM		 2403 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2404 return -ENOMEM;
2405 }
2406
2407 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2408 sw_rx_data->page_offset = 0;
2950219d 2409 sw_rx_data->data = data;
fc48b7a6 2410 sw_rx_data->mapping = mapping;
2950219d
YM		 2411
2412 /* Advance PROD and get BD pointer */
2413 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2414 WARN_ON(!rx_bd);
2415 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2416 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2417
2418 rxq->sw_rx_prod++;
2419
2420 return 0;
2421}
2422
55482edc
MC		 2423static int qede_alloc_sge_mem(struct qede_dev *edev,
2424 struct qede_rx_queue *rxq)
2425{
2426 dma_addr_t mapping;
2427 int i;
2428
2429 if (edev->gro_disable)
2430 return 0;
2431
2432 if (edev->ndev->mtu > PAGE_SIZE) {
2433 edev->gro_disable = 1;
2434 return 0;
2435 }
2436
2437 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2438 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2439 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2440
2441 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2442 if (unlikely(!replace_buf->data)) {
2443 DP_NOTICE(edev,
2444 "Failed to allocate TPA skb pool [replacement buffer]\n");
2445 goto err;
2446 }
2447
2448 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2449 rxq->rx_buf_size, DMA_FROM_DEVICE);
2450 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2451 DP_NOTICE(edev,
2452 "Failed to map TPA replacement buffer\n");
2453 goto err;
2454 }
2455
2456 dma_unmap_addr_set(replace_buf, mapping, mapping);
2457 tpa_info->replace_buf.page_offset = 0;
2458
2459 tpa_info->replace_buf_mapping = mapping;
2460 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2461 }
2462
2463 return 0;
2464err:
2465 qede_free_sge_mem(edev, rxq);
2466 edev->gro_disable = 1;
2467 return -ENOMEM;
2468}
2469
2950219d
YM		 2470/* This function allocates all memory needed per Rx queue */
2471static int qede_alloc_mem_rxq(struct qede_dev *edev,
2472 struct qede_rx_queue *rxq)
2473{
2474 int i, rc, size, num_allocated;
2475
2476 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2477
fc48b7a6
YM		 2478 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2479 edev->ndev->mtu;
2480 if (rxq->rx_buf_size > PAGE_SIZE)
2481 rxq->rx_buf_size = PAGE_SIZE;
2482
2483 /* Segment size to spilt a page in multiple equal parts */
2484 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2485
2486 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2487 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2488 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2489 if (!rxq->sw_rx_ring) {
2490 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2491 goto err;
2492 }
2493
2494 /* Allocate FW Rx ring */
2495 rc = edev->ops->common->chain_alloc(edev->cdev,
2496 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2497 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2498 RX_RING_SIZE,
2950219d
YM		 2499 sizeof(struct eth_rx_bd),
2500 &rxq->rx_bd_ring);
2501
2502 if (rc)
2503 goto err;
2504
2505 /* Allocate FW completion ring */
2506 rc = edev->ops->common->chain_alloc(edev->cdev,
2507 QED_CHAIN_USE_TO_CONSUME,
2508 QED_CHAIN_MODE_PBL,
fc48b7a6 2509 RX_RING_SIZE,
2950219d
YM		 2510 sizeof(union eth_rx_cqe),
2511 &rxq->rx_comp_ring);
2512 if (rc)
2513 goto err;
2514
2515 /* Allocate buffers for the Rx ring */
2516 for (i = 0; i < rxq->num_rx_buffers; i++) {
2517 rc = qede_alloc_rx_buffer(edev, rxq);
2518 if (rc)
2519 break;
2520 }
2521 num_allocated = i;
2522 if (!num_allocated) {
2523 DP_ERR(edev, "Rx buffers allocation failed\n");
2524 goto err;
2525 } else if (num_allocated < rxq->num_rx_buffers) {
2526 DP_NOTICE(edev,
2527 "Allocated less buffers than desired (%d allocated)\n",
2528 num_allocated);
2529 }
2530
55482edc
MC		 2531 qede_alloc_sge_mem(edev, rxq);
2532
2950219d
YM		 2533 return 0;
2534
2535err:
2536 qede_free_mem_rxq(edev, rxq);
2537 return -ENOMEM;
2538}
2539
2540static void qede_free_mem_txq(struct qede_dev *edev,
2541 struct qede_tx_queue *txq)
2542{
2543 /* Free the parallel SW ring */
2544 kfree(txq->sw_tx_ring);
2545
2546 /* Free the real RQ ring used by FW */
2547 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2548}
2549
2550/* This function allocates all memory needed per Tx queue */
2551static int qede_alloc_mem_txq(struct qede_dev *edev,
2552 struct qede_tx_queue *txq)
2553{
2554 int size, rc;
2555 union eth_tx_bd_types *p_virt;
2556
2557 txq->num_tx_buffers = edev->q_num_tx_buffers;
2558
2559 /* Allocate the parallel driver ring for Tx buffers */
2560 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2561 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2562 if (!txq->sw_tx_ring) {
2563 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2564 goto err;
2565 }
2566
2567 rc = edev->ops->common->chain_alloc(edev->cdev,
2568 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2569 QED_CHAIN_MODE_PBL,
2570 NUM_TX_BDS_MAX,
2571 sizeof(*p_virt),
2572 &txq->tx_pbl);
2573 if (rc)
2574 goto err;
2575
2576 return 0;
2577
2578err:
2579 qede_free_mem_txq(edev, txq);
2580 return -ENOMEM;
2581}
2582
2583/* This function frees all memory of a single fp */
2584static void qede_free_mem_fp(struct qede_dev *edev,
2585 struct qede_fastpath *fp)
2586{
2587 int tc;
2588
2589 qede_free_mem_sb(edev, fp->sb_info);
2590
2591 qede_free_mem_rxq(edev, fp->rxq);
2592
2593 for (tc = 0; tc < edev->num_tc; tc++)
2594 qede_free_mem_txq(edev, &fp->txqs[tc]);
2595}
2596
2597/* This function allocates all memory needed for a single fp (i.e. an entity
2598 * which contains status block, one rx queue and multiple per-TC tx queues.
2599 */
2600static int qede_alloc_mem_fp(struct qede_dev *edev,
2601 struct qede_fastpath *fp)
2602{
2603 int rc, tc;
2604
2605 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2606 if (rc)
2607 goto err;
2608
2609 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2610 if (rc)
2611 goto err;
2612
2613 for (tc = 0; tc < edev->num_tc; tc++) {
2614 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2615 if (rc)
2616 goto err;
2617 }
2618
2619 return 0;
2620
2621err:
2622 qede_free_mem_fp(edev, fp);
2623 return -ENOMEM;
2624}
2625
2626static void qede_free_mem_load(struct qede_dev *edev)
2627{
2628 int i;
2629
2630 for_each_rss(i) {
2631 struct qede_fastpath *fp = &edev->fp_array[i];
2632
2633 qede_free_mem_fp(edev, fp);
2634 }
2635}
2636
2637/* This function allocates all qede memory at NIC load. */
2638static int qede_alloc_mem_load(struct qede_dev *edev)
2639{
2640 int rc = 0, rss_id;
2641
2642 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2643 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2644
2645 rc = qede_alloc_mem_fp(edev, fp);
2646 if (rc)
2647 break;
2648 }
2649
2650 if (rss_id != QEDE_RSS_CNT(edev)) {
2651 /* Failed allocating memory for all the queues */
2652 if (!rss_id) {
2653 DP_ERR(edev,
2654 "Failed to allocate memory for the leading queue\n");
2655 rc = -ENOMEM;
2656 } else {
2657 DP_NOTICE(edev,
2658 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
2659 QEDE_RSS_CNT(edev), rss_id);
2660 }
2661 edev->num_rss = rss_id;
2662 }
2663
2664 return 0;
2665}
2666
2667/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2668static void qede_init_fp(struct qede_dev *edev)
2669{
2670 int rss_id, txq_index, tc;
2671 struct qede_fastpath *fp;
2672
2673 for_each_rss(rss_id) {
2674 fp = &edev->fp_array[rss_id];
2675
2676 fp->edev = edev;
2677 fp->rss_id = rss_id;
2678
2679 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2680
2681 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2682
2683 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2684 fp->rxq->rxq_id = rss_id;
2685
2686 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2687 for (tc = 0; tc < edev->num_tc; tc++) {
2688 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2689 fp->txqs[tc].index = txq_index;
2690 }
2691
2692 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2693 edev->ndev->name, rss_id);
2694 }
55482edc
MC		 2695
2696 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2697}
2698
2699static int qede_set_real_num_queues(struct qede_dev *edev)
2700{
2701 int rc = 0;
2702
2703 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2704 if (rc) {
2705 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2706 return rc;
2707 }
2708 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2709 if (rc) {
2710 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2711 return rc;
2712 }
2713
2714 return 0;
2715}
2716
2717static void qede_napi_disable_remove(struct qede_dev *edev)
2718{
2719 int i;
2720
2721 for_each_rss(i) {
2722 napi_disable(&edev->fp_array[i].napi);
2723
2724 netif_napi_del(&edev->fp_array[i].napi);
2725 }
2726}
2727
2728static void qede_napi_add_enable(struct qede_dev *edev)
2729{
2730 int i;
2731
2732 /* Add NAPI objects */
2733 for_each_rss(i) {
2734 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2735 qede_poll, NAPI_POLL_WEIGHT);
2736 napi_enable(&edev->fp_array[i].napi);
2737 }
2738}
2739
2740static void qede_sync_free_irqs(struct qede_dev *edev)
2741{
2742 int i;
2743
2744 for (i = 0; i < edev->int_info.used_cnt; i++) {
2745 if (edev->int_info.msix_cnt) {
2746 synchronize_irq(edev->int_info.msix[i].vector);
2747 free_irq(edev->int_info.msix[i].vector,
2748 &edev->fp_array[i]);
2749 } else {
2750 edev->ops->common->simd_handler_clean(edev->cdev, i);
2751 }
2752 }
2753
2754 edev->int_info.used_cnt = 0;
2755}
2756
2757static int qede_req_msix_irqs(struct qede_dev *edev)
2758{
2759 int i, rc;
2760
2761 /* Sanitize number of interrupts == number of prepared RSS queues */
2762 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2763 DP_ERR(edev,
2764 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2765 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2766 return -EINVAL;
2767 }
2768
2769 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2770 rc = request_irq(edev->int_info.msix[i].vector,
2771 qede_msix_fp_int, 0, edev->fp_array[i].name,
2772 &edev->fp_array[i]);
2773 if (rc) {
2774 DP_ERR(edev, "Request fp %d irq failed\n", i);
2775 qede_sync_free_irqs(edev);
2776 return rc;
2777 }
2778 DP_VERBOSE(edev, NETIF_MSG_INTR,
2779 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2780 edev->fp_array[i].name, i,
2781 &edev->fp_array[i]);
2782 edev->int_info.used_cnt++;
2783 }
2784
2785 return 0;
2786}
2787
2788static void qede_simd_fp_handler(void *cookie)
2789{
2790 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2791
2792 napi_schedule_irqoff(&fp->napi);
2793}
2794
2795static int qede_setup_irqs(struct qede_dev *edev)
2796{
2797 int i, rc = 0;
2798
2799 /* Learn Interrupt configuration */
2800 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2801 if (rc)
2802 return rc;
2803
2804 if (edev->int_info.msix_cnt) {
2805 rc = qede_req_msix_irqs(edev);
2806 if (rc)
2807 return rc;
2808 edev->ndev->irq = edev->int_info.msix[0].vector;
2809 } else {
2810 const struct qed_common_ops *ops;
2811
2812 /* qed should learn receive the RSS ids and callbacks */
2813 ops = edev->ops->common;
2814 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2815 ops->simd_handler_config(edev->cdev,
2816 &edev->fp_array[i], i,
2817 qede_simd_fp_handler);
2818 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2819 }
2820 return 0;
2821}
2822
2823static int qede_drain_txq(struct qede_dev *edev,
2824 struct qede_tx_queue *txq,
2825 bool allow_drain)
2826{
2827 int rc, cnt = 1000;
2828
2829 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2830 if (!cnt) {
2831 if (allow_drain) {
2832 DP_NOTICE(edev,
2833 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2834 txq->index);
2835 rc = edev->ops->common->drain(edev->cdev);
2836 if (rc)
2837 return rc;
2838 return qede_drain_txq(edev, txq, false);
2839 }
2840 DP_NOTICE(edev,
2841 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2842 txq->index, txq->sw_tx_prod,
2843 txq->sw_tx_cons);
2844 return -ENODEV;
2845 }
2846 cnt--;
2847 usleep_range(1000, 2000);
2848 barrier();
2849 }
2850
2851 /* FW finished processing, wait for HW to transmit all tx packets */
2852 usleep_range(1000, 2000);
2853
2854 return 0;
2855}
2856
2857static int qede_stop_queues(struct qede_dev *edev)
2858{
2859 struct qed_update_vport_params vport_update_params;
2860 struct qed_dev *cdev = edev->cdev;
2861 int rc, tc, i;
2862
2863 /* Disable the vport */
2864 memset(&vport_update_params, 0, sizeof(vport_update_params));
2865 vport_update_params.vport_id = 0;
2866 vport_update_params.update_vport_active_flg = 1;
2867 vport_update_params.vport_active_flg = 0;
2868 vport_update_params.update_rss_flg = 0;
2869
2870 rc = edev->ops->vport_update(cdev, &vport_update_params);
2871 if (rc) {
2872 DP_ERR(edev, "Failed to update vport\n");
2873 return rc;
2874 }
2875
2876 /* Flush Tx queues. If needed, request drain from MCP */
2877 for_each_rss(i) {
2878 struct qede_fastpath *fp = &edev->fp_array[i];
2879
2880 for (tc = 0; tc < edev->num_tc; tc++) {
2881 struct qede_tx_queue *txq = &fp->txqs[tc];
2882
2883 rc = qede_drain_txq(edev, txq, true);
2884 if (rc)
2885 return rc;
2886 }
2887 }
2888
2889 /* Stop all Queues in reverse order*/
2890 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2891 struct qed_stop_rxq_params rx_params;
2892
2893 /* Stop the Tx Queue(s)*/
2894 for (tc = 0; tc < edev->num_tc; tc++) {
2895 struct qed_stop_txq_params tx_params;
2896
2897 tx_params.rss_id = i;
2898 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2899 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2900 if (rc) {
2901 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2902 tx_params.tx_queue_id);
2903 return rc;
2904 }
2905 }
2906
2907 /* Stop the Rx Queue*/
2908 memset(&rx_params, 0, sizeof(rx_params));
2909 rx_params.rss_id = i;
2910 rx_params.rx_queue_id = i;
2911
2912 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2913 if (rc) {
2914 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2915 return rc;
2916 }
2917 }
2918
2919 /* Stop the vport */
2920 rc = edev->ops->vport_stop(cdev, 0);
2921 if (rc)
2922 DP_ERR(edev, "Failed to stop VPORT\n");
2923
2924 return rc;
2925}
2926
2927static int qede_start_queues(struct qede_dev *edev)
2928{
2929 int rc, tc, i;
088c8618 2930 int vlan_removal_en = 1;
2950219d 2931 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 2932 struct qed_update_vport_params vport_update_params;
2933 struct qed_queue_start_common_params q_params;
088c8618 2934 struct qed_start_vport_params start = {0};
961acdea 2935 bool reset_rss_indir = false;
2950219d
YM		 2936
2937 if (!edev->num_rss) {
2938 DP_ERR(edev,
2939 "Cannot update V-VPORT as active as there are no Rx queues\n");
2940 return -EINVAL;
2941 }
2942
55482edc 2943 start.gro_enable = !edev->gro_disable;
088c8618
MC		 2944 start.mtu = edev->ndev->mtu;
2945 start.vport_id = 0;
2946 start.drop_ttl0 = true;
2947 start.remove_inner_vlan = vlan_removal_en;
2948
2949 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 2950
2951 if (rc) {
2952 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2953 return rc;
2954 }
2955
2956 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2957 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 2958 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 2959
2960 for_each_rss(i) {
2961 struct qede_fastpath *fp = &edev->fp_array[i];
2962 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2963
2964 memset(&q_params, 0, sizeof(q_params));
2965 q_params.rss_id = i;
2966 q_params.queue_id = i;
2967 q_params.vport_id = 0;
2968 q_params.sb = fp->sb_info->igu_sb_id;
2969 q_params.sb_idx = RX_PI;
2970
2971 rc = edev->ops->q_rx_start(cdev, &q_params,
2972 fp->rxq->rx_buf_size,
2973 fp->rxq->rx_bd_ring.p_phys_addr,
2974 phys_table,
2975 fp->rxq->rx_comp_ring.page_cnt,
2976 &fp->rxq->hw_rxq_prod_addr);
2977 if (rc) {
2978 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2979 return rc;
2980 }
2981
2982 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2983
2984 qede_update_rx_prod(edev, fp->rxq);
2985
2986 for (tc = 0; tc < edev->num_tc; tc++) {
2987 struct qede_tx_queue *txq = &fp->txqs[tc];
2988 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2989
2990 memset(&q_params, 0, sizeof(q_params));
2991 q_params.rss_id = i;
2992 q_params.queue_id = txq_index;
2993 q_params.vport_id = 0;
2994 q_params.sb = fp->sb_info->igu_sb_id;
2995 q_params.sb_idx = TX_PI(tc);
2996
2997 rc = edev->ops->q_tx_start(cdev, &q_params,
2998 txq->tx_pbl.pbl.p_phys_table,
2999 txq->tx_pbl.page_cnt,
3000 &txq->doorbell_addr);
3001 if (rc) {
3002 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3003 txq_index, rc);
3004 return rc;
3005 }
3006
3007 txq->hw_cons_ptr =
3008 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3009 SET_FIELD(txq->tx_db.data.params,
3010 ETH_DB_DATA_DEST, DB_DEST_XCM);
3011 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3012 DB_AGG_CMD_SET);
3013 SET_FIELD(txq->tx_db.data.params,
3014 ETH_DB_DATA_AGG_VAL_SEL,
3015 DQ_XCM_ETH_TX_BD_PROD_CMD);
3016
3017 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3018 }
3019 }
3020
3021 /* Prepare and send the vport enable */
3022 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3023 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3024 vport_update_params.update_vport_active_flg = 1;
3025 vport_update_params.vport_active_flg = 1;
3026
3027 /* Fill struct with RSS params */
3028 if (QEDE_RSS_CNT(edev) > 1) {
3029 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3030
3031 /* Need to validate current RSS config uses valid entries */
3032 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3033 if (edev->rss_params.rss_ind_table[i] >=
3034 edev->num_rss) {
3035 reset_rss_indir = true;
3036 break;
3037 }
3038 }
3039
3040 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3041 reset_rss_indir) {
3042 u16 val;
3043
3044 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3045 u16 indir_val;
3046
3047 val = QEDE_RSS_CNT(edev);
3048 indir_val = ethtool_rxfh_indir_default(i, val);
3049 edev->rss_params.rss_ind_table[i] = indir_val;
3050 }
3051 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3052 }
3053
3054 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3055 netdev_rss_key_fill(edev->rss_params.rss_key,
3056 sizeof(edev->rss_params.rss_key));
3057 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3058 }
3059
3060 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3061 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3062 QED_RSS_IPV6 |
3063 QED_RSS_IPV4_TCP |
3064 QED_RSS_IPV6_TCP;
3065 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3066 }
3067
3068 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3069 sizeof(vport_update_params.rss_params));
2950219d 3070 } else {
961acdea
SRK		 3071 memset(&vport_update_params.rss_params, 0,
3072 sizeof(vport_update_params.rss_params));
2950219d 3073 }
2950219d
YM		 3074
3075 rc = edev->ops->vport_update(cdev, &vport_update_params);
3076 if (rc) {
3077 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3078 return rc;
3079 }
3080
3081 return 0;
3082}
3083
0d8e0aa0
SK		 3084static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3085 enum qed_filter_xcast_params_type opcode,
3086 unsigned char *mac, int num_macs)
3087{
3088 struct qed_filter_params filter_cmd;
3089 int i;
3090
3091 memset(&filter_cmd, 0, sizeof(filter_cmd));
3092 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3093 filter_cmd.filter.mcast.type = opcode;
3094 filter_cmd.filter.mcast.num = num_macs;
3095
3096 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3097 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3098
3099 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3100}
3101
2950219d
YM		 3102enum qede_unload_mode {
3103 QEDE_UNLOAD_NORMAL,
3104};
3105
3106static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3107{
a2ec6172 3108 struct qed_link_params link_params;
2950219d
YM		 3109 int rc;
3110
3111 DP_INFO(edev, "Starting qede unload\n");
3112
0d8e0aa0
SK		 3113 mutex_lock(&edev->qede_lock);
3114 edev->state = QEDE_STATE_CLOSED;
3115
2950219d
YM		 3116 /* Close OS Tx */
3117 netif_tx_disable(edev->ndev);
3118 netif_carrier_off(edev->ndev);
3119
a2ec6172
SK		 3120 /* Reset the link */
3121 memset(&link_params, 0, sizeof(link_params));
3122 link_params.link_up = false;
3123 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3124 rc = qede_stop_queues(edev);
3125 if (rc) {
3126 qede_sync_free_irqs(edev);
3127 goto out;
3128 }
3129
3130 DP_INFO(edev, "Stopped Queues\n");
3131
7c1bfcad 3132 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3133 edev->ops->fastpath_stop(edev->cdev);
3134
3135 /* Release the interrupts */
3136 qede_sync_free_irqs(edev);
3137 edev->ops->common->set_fp_int(edev->cdev, 0);
3138
3139 qede_napi_disable_remove(edev);
3140
3141 qede_free_mem_load(edev);
3142 qede_free_fp_array(edev);
3143
3144out:
3145 mutex_unlock(&edev->qede_lock);
3146 DP_INFO(edev, "Ending qede unload\n");
3147}
3148
3149enum qede_load_mode {
3150 QEDE_LOAD_NORMAL,
3151};
3152
3153static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3154{
a2ec6172
SK		 3155 struct qed_link_params link_params;
3156 struct qed_link_output link_output;
2950219d
YM		 3157 int rc;
3158
3159 DP_INFO(edev, "Starting qede load\n");
3160
3161 rc = qede_set_num_queues(edev);
3162 if (rc)
3163 goto err0;
3164
3165 rc = qede_alloc_fp_array(edev);
3166 if (rc)
3167 goto err0;
3168
3169 qede_init_fp(edev);
3170
3171 rc = qede_alloc_mem_load(edev);
3172 if (rc)
3173 goto err1;
3174 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3175 QEDE_RSS_CNT(edev), edev->num_tc);
3176
3177 rc = qede_set_real_num_queues(edev);
3178 if (rc)
3179 goto err2;
3180
3181 qede_napi_add_enable(edev);
3182 DP_INFO(edev, "Napi added and enabled\n");
3183
3184 rc = qede_setup_irqs(edev);
3185 if (rc)
3186 goto err3;
3187 DP_INFO(edev, "Setup IRQs succeeded\n");
3188
3189 rc = qede_start_queues(edev);
3190 if (rc)
3191 goto err4;
3192 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3193
3194 /* Add primary mac and set Rx filters */
3195 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3196
0d8e0aa0
SK		 3197 mutex_lock(&edev->qede_lock);
3198 edev->state = QEDE_STATE_OPEN;
3199 mutex_unlock(&edev->qede_lock);
a2ec6172 3200
7c1bfcad
SRK		 3201 /* Program un-configured VLANs */
3202 qede_configure_vlan_filters(edev);
3203
a2ec6172
SK		 3204 /* Ask for link-up using current configuration */
3205 memset(&link_params, 0, sizeof(link_params));
3206 link_params.link_up = true;
3207 edev->ops->common->set_link(edev->cdev, &link_params);
3208
3209 /* Query whether link is already-up */
3210 memset(&link_output, 0, sizeof(link_output));
3211 edev->ops->common->get_link(edev->cdev, &link_output);
3212 qede_link_update(edev, &link_output);
3213
2950219d
YM		 3214 DP_INFO(edev, "Ending successfully qede load\n");
3215
3216 return 0;
3217
3218err4:
3219 qede_sync_free_irqs(edev);
3220 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3221err3:
3222 qede_napi_disable_remove(edev);
3223err2:
3224 qede_free_mem_load(edev);
3225err1:
3226 edev->ops->common->set_fp_int(edev->cdev, 0);
3227 qede_free_fp_array(edev);
3228 edev->num_rss = 0;
3229err0:
3230 return rc;
3231}
3232
133fac0e
SK		 3233void qede_reload(struct qede_dev *edev,
3234 void (*func)(struct qede_dev *, union qede_reload_args *),
3235 union qede_reload_args *args)
3236{
3237 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3238 /* Call function handler to update parameters
3239 * needed for function load.
3240 */
3241 if (func)
3242 func(edev, args);
3243
3244 qede_load(edev, QEDE_LOAD_NORMAL);
3245
3246 mutex_lock(&edev->qede_lock);
3247 qede_config_rx_mode(edev->ndev);
3248 mutex_unlock(&edev->qede_lock);
3249}
3250
2950219d
YM		 3251/* called with rtnl_lock */
3252static int qede_open(struct net_device *ndev)
3253{
3254 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3255 int rc;
2950219d
YM		 3256
3257 netif_carrier_off(ndev);
3258
3259 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3260
b18e170c
MC		 3261 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3262
3263 if (rc)
3264 return rc;
3265
3266#ifdef CONFIG_QEDE_VXLAN
3267 vxlan_get_rx_port(ndev);
9a109dd0
MC		 3268#endif
3269#ifdef CONFIG_QEDE_GENEVE
3270 geneve_get_rx_port(ndev);
b18e170c
MC		 3271#endif
3272 return 0;
2950219d
YM		 3273}
3274
3275static int qede_close(struct net_device *ndev)
3276{
3277 struct qede_dev *edev = netdev_priv(ndev);
3278
3279 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3280
3281 return 0;
3282}
0d8e0aa0 3283
a2ec6172
SK		 3284static void qede_link_update(void *dev, struct qed_link_output *link)
3285{
3286 struct qede_dev *edev = dev;
3287
3288 if (!netif_running(edev->ndev)) {
3289 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3290 return;
3291 }
3292
3293 if (link->link_up) {
8e025ae2
YM		 3294 if (!netif_carrier_ok(edev->ndev)) {
3295 DP_NOTICE(edev, "Link is up\n");
3296 netif_tx_start_all_queues(edev->ndev);
3297 netif_carrier_on(edev->ndev);
3298 }
a2ec6172 3299 } else {
8e025ae2
YM		 3300 if (netif_carrier_ok(edev->ndev)) {
3301 DP_NOTICE(edev, "Link is down\n");
3302 netif_tx_disable(edev->ndev);
3303 netif_carrier_off(edev->ndev);
3304 }
a2ec6172
SK		 3305 }
3306}
3307
0d8e0aa0
SK		 3308static int qede_set_mac_addr(struct net_device *ndev, void *p)
3309{
3310 struct qede_dev *edev = netdev_priv(ndev);
3311 struct sockaddr *addr = p;
3312 int rc;
3313
3314 ASSERT_RTNL(); /* @@@TBD To be removed */
3315
3316 DP_INFO(edev, "Set_mac_addr called\n");
3317
3318 if (!is_valid_ether_addr(addr->sa_data)) {
3319 DP_NOTICE(edev, "The MAC address is not valid\n");
3320 return -EFAULT;
3321 }
3322
3323 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3324
3325 if (!netif_running(ndev)) {
3326 DP_NOTICE(edev, "The device is currently down\n");
3327 return 0;
3328 }
3329
3330 /* Remove the previous primary mac */
3331 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3332 edev->primary_mac);
3333 if (rc)
3334 return rc;
3335
3336 /* Add MAC filter according to the new unicast HW MAC address */
3337 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3338 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3339 edev->primary_mac);
3340}
3341
3342static int
3343qede_configure_mcast_filtering(struct net_device *ndev,
3344 enum qed_filter_rx_mode_type *accept_flags)
3345{
3346 struct qede_dev *edev = netdev_priv(ndev);
3347 unsigned char *mc_macs, *temp;
3348 struct netdev_hw_addr *ha;
3349 int rc = 0, mc_count;
3350 size_t size;
3351
3352 size = 64 * ETH_ALEN;
3353
3354 mc_macs = kzalloc(size, GFP_KERNEL);
3355 if (!mc_macs) {
3356 DP_NOTICE(edev,
3357 "Failed to allocate memory for multicast MACs\n");
3358 rc = -ENOMEM;
3359 goto exit;
3360 }
3361
3362 temp = mc_macs;
3363
3364 /* Remove all previously configured MAC filters */
3365 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3366 mc_macs, 1);
3367 if (rc)
3368 goto exit;
3369
3370 netif_addr_lock_bh(ndev);
3371
3372 mc_count = netdev_mc_count(ndev);
3373 if (mc_count < 64) {
3374 netdev_for_each_mc_addr(ha, ndev) {
3375 ether_addr_copy(temp, ha->addr);
3376 temp += ETH_ALEN;
3377 }
3378 }
3379
3380 netif_addr_unlock_bh(ndev);
3381
3382 /* Check for all multicast @@@TBD resource allocation */
3383 if ((ndev->flags & IFF_ALLMULTI) ||
3384 (mc_count > 64)) {
3385 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3386 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3387 } else {
3388 /* Add all multicast MAC filters */
3389 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3390 mc_macs, mc_count);
3391 }
3392
3393exit:
3394 kfree(mc_macs);
3395 return rc;
3396}
3397
3398static void qede_set_rx_mode(struct net_device *ndev)
3399{
3400 struct qede_dev *edev = netdev_priv(ndev);
3401
3402 DP_INFO(edev, "qede_set_rx_mode called\n");
3403
3404 if (edev->state != QEDE_STATE_OPEN) {
3405 DP_INFO(edev,
3406 "qede_set_rx_mode called while interface is down\n");
3407 } else {
3408 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3409 schedule_delayed_work(&edev->sp_task, 0);
3410 }
3411}
3412
3413/* Must be called with qede_lock held */
3414static void qede_config_rx_mode(struct net_device *ndev)
3415{
3416 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3417 struct qede_dev *edev = netdev_priv(ndev);
3418 struct qed_filter_params rx_mode;
3419 unsigned char *uc_macs, *temp;
3420 struct netdev_hw_addr *ha;
3421 int rc, uc_count;
3422 size_t size;
3423
3424 netif_addr_lock_bh(ndev);
3425
3426 uc_count = netdev_uc_count(ndev);
3427 size = uc_count * ETH_ALEN;
3428
3429 uc_macs = kzalloc(size, GFP_ATOMIC);
3430 if (!uc_macs) {
3431 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3432 netif_addr_unlock_bh(ndev);
3433 return;
3434 }
3435
3436 temp = uc_macs;
3437 netdev_for_each_uc_addr(ha, ndev) {
3438 ether_addr_copy(temp, ha->addr);
3439 temp += ETH_ALEN;
3440 }
3441
3442 netif_addr_unlock_bh(ndev);
3443
3444 /* Configure the struct for the Rx mode */
3445 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3446 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3447
3448 /* Remove all previous unicast secondary macs and multicast macs
3449 * (configrue / leave the primary mac)
3450 */
3451 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3452 edev->primary_mac);
3453 if (rc)
3454 goto out;
3455
3456 /* Check for promiscuous */
3457 if ((ndev->flags & IFF_PROMISC) ||
3458 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3459 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3460 } else {
3461 /* Add MAC filters according to the unicast secondary macs */
3462 int i;
3463
3464 temp = uc_macs;
3465 for (i = 0; i < uc_count; i++) {
3466 rc = qede_set_ucast_rx_mac(edev,
3467 QED_FILTER_XCAST_TYPE_ADD,
3468 temp);
3469 if (rc)
3470 goto out;
3471
3472 temp += ETH_ALEN;
3473 }
3474
3475 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3476 if (rc)
3477 goto out;
3478 }
3479
7c1bfcad
SRK		 3480 /* take care of VLAN mode */
3481 if (ndev->flags & IFF_PROMISC) {
3482 qede_config_accept_any_vlan(edev, true);
3483 } else if (!edev->non_configured_vlans) {
3484 /* It's possible that accept_any_vlan mode is set due to a
3485 * previous setting of IFF_PROMISC. If vlan credits are
3486 * sufficient, disable accept_any_vlan.
3487 */
3488 qede_config_accept_any_vlan(edev, false);
3489 }
3490
0d8e0aa0
SK		 3491 rx_mode.filter.accept_flags = accept_flags;
3492 edev->ops->filter_config(edev->cdev, &rx_mode);
3493out:
3494 kfree(uc_macs);
3495}
Linux kernel - Deliverables
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