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qede: Fix various memory allocation error flows for fastpath
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
5abd7e92
YM		 42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 44
5abd7e92 45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
0e7441d7 56#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
a2ec6172 90static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
a2ec6172
SK		 99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
2950219d
YM		 105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
e712d52b
YM		 140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
2950219d
YM		 162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
e712d52b
YM		 172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
2950219d 175 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
2950219d 187 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
2950219d
YM		 195/* -------------------------------------------------------------------------
196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
fc48b7a6 333 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 334
fc48b7a6 335 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 336
fc48b7a6 337 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
fc48b7a6 341 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
fc48b7a6 350 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 351
fc48b7a6 352 if (third_bd)
2950219d 353 third_bd->data.bitfields |=
fc48b7a6
YM		 354 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 357
fc48b7a6 358 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 359 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
360}
361
362static int map_frag_to_bd(struct qede_dev *edev,
363 skb_frag_t *frag,
364 struct eth_tx_bd *bd)
365{
366 dma_addr_t mapping;
367
368 /* Map skb non-linear frag data for DMA */
369 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
370 skb_frag_size(frag),
371 DMA_TO_DEVICE);
372 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
373 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
374 return -ENOMEM;
375 }
376
377 /* Setup the data pointer of the frag data */
378 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
379
380 return 0;
381}
382
b1199b10
YM		 383/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
384#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
385static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
386 u8 xmit_type)
387{
388 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
389
390 if (xmit_type & XMIT_LSO) {
391 int hlen;
392
393 hlen = skb_transport_header(skb) +
394 tcp_hdrlen(skb) - skb->data;
395
396 /* linear payload would require its own BD */
397 if (skb_headlen(skb) > hlen)
398 allowed_frags--;
399 }
400
401 return (skb_shinfo(skb)->nr_frags > allowed_frags);
402}
403#endif
404
2950219d
YM		 405/* Main transmit function */
406static
407netdev_tx_t qede_start_xmit(struct sk_buff *skb,
408 struct net_device *ndev)
409{
410 struct qede_dev *edev = netdev_priv(ndev);
411 struct netdev_queue *netdev_txq;
412 struct qede_tx_queue *txq;
413 struct eth_tx_1st_bd *first_bd;
414 struct eth_tx_2nd_bd *second_bd = NULL;
415 struct eth_tx_3rd_bd *third_bd = NULL;
416 struct eth_tx_bd *tx_data_bd = NULL;
417 u16 txq_index;
418 u8 nbd = 0;
419 dma_addr_t mapping;
420 int rc, frag_idx = 0, ipv6_ext = 0;
421 u8 xmit_type;
422 u16 idx;
423 u16 hlen;
424 bool data_split;
425
426 /* Get tx-queue context and netdev index */
427 txq_index = skb_get_queue_mapping(skb);
428 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
429 txq = QEDE_TX_QUEUE(edev, txq_index);
430 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
431
2950219d
YM		 432 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
433 (MAX_SKB_FRAGS + 1));
434
435 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
436
b1199b10
YM		 437#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
438 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
439 if (skb_linearize(skb)) {
440 DP_NOTICE(edev,
441 "SKB linearization failed - silently dropping this SKB\n");
442 dev_kfree_skb_any(skb);
443 return NETDEV_TX_OK;
444 }
445 }
446#endif
447
2950219d
YM		 448 /* Fill the entry in the SW ring and the BDs in the FW ring */
449 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
450 txq->sw_tx_ring[idx].skb = skb;
451 first_bd = (struct eth_tx_1st_bd *)
452 qed_chain_produce(&txq->tx_pbl);
453 memset(first_bd, 0, sizeof(*first_bd));
454 first_bd->data.bd_flags.bitfields =
455 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
456
457 /* Map skb linear data for DMA and set in the first BD */
458 mapping = dma_map_single(&edev->pdev->dev, skb->data,
459 skb_headlen(skb), DMA_TO_DEVICE);
460 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
461 DP_NOTICE(edev, "SKB mapping failed\n");
462 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
463 return NETDEV_TX_OK;
464 }
465 nbd++;
466 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
467
468 /* In case there is IPv6 with extension headers or LSO we need 2nd and
469 * 3rd BDs.
470 */
471 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
472 second_bd = (struct eth_tx_2nd_bd *)
473 qed_chain_produce(&txq->tx_pbl);
474 memset(second_bd, 0, sizeof(*second_bd));
475
476 nbd++;
477 third_bd = (struct eth_tx_3rd_bd *)
478 qed_chain_produce(&txq->tx_pbl);
479 memset(third_bd, 0, sizeof(*third_bd));
480
481 nbd++;
482 /* We need to fill in additional data in second_bd... */
483 tx_data_bd = (struct eth_tx_bd *)second_bd;
484 }
485
486 if (skb_vlan_tag_present(skb)) {
487 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
488 first_bd->data.bd_flags.bitfields |=
489 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
490 }
491
492 /* Fill the parsing flags & params according to the requested offload */
493 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 494 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
495
2950219d
YM		 496 /* We don't re-calculate IP checksum as it is already done by
497 * the upper stack
498 */
499 first_bd->data.bd_flags.bitfields |=
500 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
501
fc48b7a6
YM		 502 first_bd->data.bitfields |= cpu_to_le16(temp);
503
2950219d
YM		 504 /* If the packet is IPv6 with extension header, indicate that
505 * to FW and pass few params, since the device cracker doesn't
506 * support parsing IPv6 with extension header/s.
507 */
508 if (unlikely(ipv6_ext))
509 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
510 }
511
512 if (xmit_type & XMIT_LSO) {
513 first_bd->data.bd_flags.bitfields |=
514 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
515 third_bd->data.lso_mss =
516 cpu_to_le16(skb_shinfo(skb)->gso_size);
517
518 first_bd->data.bd_flags.bitfields |=
519 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
520 hlen = skb_transport_header(skb) +
521 tcp_hdrlen(skb) - skb->data;
522
523 /* @@@TBD - if will not be removed need to check */
524 third_bd->data.bitfields |=
fc48b7a6 525 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 526
527 /* Make life easier for FW guys who can't deal with header and
528 * data on same BD. If we need to split, use the second bd...
529 */
530 if (unlikely(skb_headlen(skb) > hlen)) {
531 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
532 "TSO split header size is %d (%x:%x)\n",
533 first_bd->nbytes, first_bd->addr.hi,
534 first_bd->addr.lo);
535
536 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
537 le32_to_cpu(first_bd->addr.lo)) +
538 hlen;
539
540 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
541 le16_to_cpu(first_bd->nbytes) -
542 hlen);
543
544 /* this marks the BD as one that has no
545 * individual mapping
546 */
547 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
548
549 first_bd->nbytes = cpu_to_le16(hlen);
550
551 tx_data_bd = (struct eth_tx_bd *)third_bd;
552 data_split = true;
553 }
554 }
555
556 /* Handle fragmented skb */
557 /* special handle for frags inside 2nd and 3rd bds.. */
558 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
559 rc = map_frag_to_bd(edev,
560 &skb_shinfo(skb)->frags[frag_idx],
561 tx_data_bd);
562 if (rc) {
563 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
564 data_split);
565 return NETDEV_TX_OK;
566 }
567
568 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
569 tx_data_bd = (struct eth_tx_bd *)third_bd;
570 else
571 tx_data_bd = NULL;
572
573 frag_idx++;
574 }
575
576 /* map last frags into 4th, 5th .... */
577 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
578 tx_data_bd = (struct eth_tx_bd *)
579 qed_chain_produce(&txq->tx_pbl);
580
581 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
582
583 rc = map_frag_to_bd(edev,
584 &skb_shinfo(skb)->frags[frag_idx],
585 tx_data_bd);
586 if (rc) {
587 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
588 data_split);
589 return NETDEV_TX_OK;
590 }
591 }
592
593 /* update the first BD with the actual num BDs */
594 first_bd->data.nbds = nbd;
595
596 netdev_tx_sent_queue(netdev_txq, skb->len);
597
598 skb_tx_timestamp(skb);
599
600 /* Advance packet producer only before sending the packet since mapping
601 * of pages may fail.
602 */
603 txq->sw_tx_prod++;
604
605 /* 'next page' entries are counted in the producer value */
606 txq->tx_db.data.bd_prod =
607 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
608
609 /* wmb makes sure that the BDs data is updated before updating the
610 * producer, otherwise FW may read old data from the BDs.
611 */
612 wmb();
613 barrier();
614 writel(txq->tx_db.raw, txq->doorbell_addr);
615
616 /* mmiowb is needed to synchronize doorbell writes from more than one
617 * processor. It guarantees that the write arrives to the device before
618 * the queue lock is released and another start_xmit is called (possibly
619 * on another CPU). Without this barrier, the next doorbell can bypass
620 * this doorbell. This is applicable to IA64/Altix systems.
621 */
622 mmiowb();
623
624 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
625 < (MAX_SKB_FRAGS + 1))) {
626 netif_tx_stop_queue(netdev_txq);
627 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
628 "Stop queue was called\n");
629 /* paired memory barrier is in qede_tx_int(), we have to keep
630 * ordering of set_bit() in netif_tx_stop_queue() and read of
631 * fp->bd_tx_cons
632 */
633 smp_mb();
634
635 if (qed_chain_get_elem_left(&txq->tx_pbl)
636 >= (MAX_SKB_FRAGS + 1) &&
637 (edev->state == QEDE_STATE_OPEN)) {
638 netif_tx_wake_queue(netdev_txq);
639 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
640 "Wake queue was called\n");
641 }
642 }
643
644 return NETDEV_TX_OK;
645}
646
647static int qede_txq_has_work(struct qede_tx_queue *txq)
648{
649 u16 hw_bd_cons;
650
651 /* Tell compiler that consumer and producer can change */
652 barrier();
653 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
654 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
655 return 0;
656
657 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
658}
659
660static int qede_tx_int(struct qede_dev *edev,
661 struct qede_tx_queue *txq)
662{
663 struct netdev_queue *netdev_txq;
664 u16 hw_bd_cons;
665 unsigned int pkts_compl = 0, bytes_compl = 0;
666 int rc;
667
668 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
669
670 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
671 barrier();
672
673 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
674 int len = 0;
675
676 rc = qede_free_tx_pkt(edev, txq, &len);
677 if (rc) {
678 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
679 hw_bd_cons,
680 qed_chain_get_cons_idx(&txq->tx_pbl));
681 break;
682 }
683
684 bytes_compl += len;
685 pkts_compl++;
686 txq->sw_tx_cons++;
687 }
688
689 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
690
691 /* Need to make the tx_bd_cons update visible to start_xmit()
692 * before checking for netif_tx_queue_stopped(). Without the
693 * memory barrier, there is a small possibility that
694 * start_xmit() will miss it and cause the queue to be stopped
695 * forever.
696 * On the other hand we need an rmb() here to ensure the proper
697 * ordering of bit testing in the following
698 * netif_tx_queue_stopped(txq) call.
699 */
700 smp_mb();
701
702 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
703 /* Taking tx_lock is needed to prevent reenabling the queue
704 * while it's empty. This could have happen if rx_action() gets
705 * suspended in qede_tx_int() after the condition before
706 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
707 *
708 * stops the queue->sees fresh tx_bd_cons->releases the queue->
709 * sends some packets consuming the whole queue again->
710 * stops the queue
711 */
712
713 __netif_tx_lock(netdev_txq, smp_processor_id());
714
715 if ((netif_tx_queue_stopped(netdev_txq)) &&
716 (edev->state == QEDE_STATE_OPEN) &&
717 (qed_chain_get_elem_left(&txq->tx_pbl)
718 >= (MAX_SKB_FRAGS + 1))) {
719 netif_tx_wake_queue(netdev_txq);
720 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
721 "Wake queue was called\n");
722 }
723
724 __netif_tx_unlock(netdev_txq);
725 }
726
727 return 0;
728}
729
730static bool qede_has_rx_work(struct qede_rx_queue *rxq)
731{
732 u16 hw_comp_cons, sw_comp_cons;
733
734 /* Tell compiler that status block fields can change */
735 barrier();
736
737 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
738 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
739
740 return hw_comp_cons != sw_comp_cons;
741}
742
743static bool qede_has_tx_work(struct qede_fastpath *fp)
744{
745 u8 tc;
746
747 for (tc = 0; tc < fp->edev->num_tc; tc++)
748 if (qede_txq_has_work(&fp->txqs[tc]))
749 return true;
750 return false;
751}
752
f86af2df
MC		 753static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
754{
755 qed_chain_consume(&rxq->rx_bd_ring);
756 rxq->sw_rx_cons++;
757}
758
fc48b7a6
YM		 759/* This function reuses the buffer(from an offset) from
760 * consumer index to producer index in the bd ring
2950219d 761 */
fc48b7a6
YM		 762static inline void qede_reuse_page(struct qede_dev *edev,
763 struct qede_rx_queue *rxq,
764 struct sw_rx_data *curr_cons)
2950219d 765{
2950219d 766 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 767 struct sw_rx_data *curr_prod;
768 dma_addr_t new_mapping;
2950219d 769
fc48b7a6
YM		 770 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
771 *curr_prod = *curr_cons;
2950219d 772
fc48b7a6
YM		 773 new_mapping = curr_prod->mapping + curr_prod->page_offset;
774
775 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
776 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 777
2950219d 778 rxq->sw_rx_prod++;
fc48b7a6
YM		 779 curr_cons->data = NULL;
780}
781
f86af2df
MC		 782/* In case of allocation failures reuse buffers
783 * from consumer index to produce buffers for firmware
784 */
785static void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
786 struct qede_dev *edev, u8 count)
787{
788 struct sw_rx_data *curr_cons;
789
790 for (; count > 0; count--) {
791 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
792 qede_reuse_page(edev, rxq, curr_cons);
793 qede_rx_bd_ring_consume(rxq);
794 }
795}
796
fc48b7a6
YM		 797static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
798 struct qede_rx_queue *rxq,
799 struct sw_rx_data *curr_cons)
800{
801 /* Move to the next segment in the page */
802 curr_cons->page_offset += rxq->rx_buf_seg_size;
803
804 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 805 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
806 /* Since we failed to allocate new buffer
807 * current buffer can be used again.
808 */
809 curr_cons->page_offset -= rxq->rx_buf_seg_size;
810
fc48b7a6 811 return -ENOMEM;
f86af2df 812 }
fc48b7a6
YM		 813
814 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
815 PAGE_SIZE, DMA_FROM_DEVICE);
816 } else {
817 /* Increment refcount of the page as we don't want
818 * network stack to take the ownership of the page
819 * which can be recycled multiple times by the driver.
820 */
821 atomic_inc(&curr_cons->data->_count);
822 qede_reuse_page(edev, rxq, curr_cons);
823 }
824
825 return 0;
2950219d
YM		 826}
827
828static inline void qede_update_rx_prod(struct qede_dev *edev,
829 struct qede_rx_queue *rxq)
830{
831 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
832 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
833 struct eth_rx_prod_data rx_prods = {0};
834
835 /* Update producers */
836 rx_prods.bd_prod = cpu_to_le16(bd_prod);
837 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
838
839 /* Make sure that the BD and SGE data is updated before updating the
840 * producers since FW might read the BD/SGE right after the producer
841 * is updated.
842 */
843 wmb();
844
845 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
846 (u32 *)&rx_prods);
847
848 /* mmiowb is needed to synchronize doorbell writes from more than one
849 * processor. It guarantees that the write arrives to the device before
850 * the napi lock is released and another qede_poll is called (possibly
851 * on another CPU). Without this barrier, the next doorbell can bypass
852 * this doorbell. This is applicable to IA64/Altix systems.
853 */
854 mmiowb();
855}
856
857static u32 qede_get_rxhash(struct qede_dev *edev,
858 u8 bitfields,
859 __le32 rss_hash,
860 enum pkt_hash_types *rxhash_type)
861{
862 enum rss_hash_type htype;
863
864 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
865
866 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
867 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
868 (htype == RSS_HASH_TYPE_IPV6)) ?
869 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
870 return le32_to_cpu(rss_hash);
871 }
872 *rxhash_type = PKT_HASH_TYPE_NONE;
873 return 0;
874}
875
876static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
877{
878 skb_checksum_none_assert(skb);
879
880 if (csum_flag & QEDE_CSUM_UNNECESSARY)
881 skb->ip_summed = CHECKSUM_UNNECESSARY;
882}
883
884static inline void qede_skb_receive(struct qede_dev *edev,
885 struct qede_fastpath *fp,
886 struct sk_buff *skb,
887 u16 vlan_tag)
888{
889 if (vlan_tag)
890 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
891 vlan_tag);
892
893 napi_gro_receive(&fp->napi, skb);
894}
895
55482edc
MC		 896static void qede_set_gro_params(struct qede_dev *edev,
897 struct sk_buff *skb,
898 struct eth_fast_path_rx_tpa_start_cqe *cqe)
899{
900 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
901
902 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
903 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
904 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
905 else
906 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
907
908 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
909 cqe->header_len;
910}
911
912static int qede_fill_frag_skb(struct qede_dev *edev,
913 struct qede_rx_queue *rxq,
914 u8 tpa_agg_index,
915 u16 len_on_bd)
916{
917 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
918 NUM_RX_BDS_MAX];
919 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
920 struct sk_buff *skb = tpa_info->skb;
921
922 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
923 goto out;
924
925 /* Add one frag and update the appropriate fields in the skb */
926 skb_fill_page_desc(skb, tpa_info->frag_id++,
927 current_bd->data, current_bd->page_offset,
928 len_on_bd);
929
930 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 931 /* Incr page ref count to reuse on allocation failure
932 * so that it doesn't get freed while freeing SKB.
933 */
934 atomic_inc(&current_bd->data->_count);
55482edc
MC		 935 goto out;
936 }
937
938 qed_chain_consume(&rxq->rx_bd_ring);
939 rxq->sw_rx_cons++;
940
941 skb->data_len += len_on_bd;
942 skb->truesize += rxq->rx_buf_seg_size;
943 skb->len += len_on_bd;
944
945 return 0;
946
947out:
f86af2df
MC		 948 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
949 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 950 return -ENOMEM;
951}
952
953static void qede_tpa_start(struct qede_dev *edev,
954 struct qede_rx_queue *rxq,
955 struct eth_fast_path_rx_tpa_start_cqe *cqe)
956{
957 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
958 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
959 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
960 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
961 dma_addr_t mapping = tpa_info->replace_buf_mapping;
962 struct sw_rx_data *sw_rx_data_cons;
963 struct sw_rx_data *sw_rx_data_prod;
964 enum pkt_hash_types rxhash_type;
965 u32 rxhash;
966
967 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
968 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
969
970 /* Use pre-allocated replacement buffer - we can't release the agg.
971 * start until its over and we don't want to risk allocation failing
972 * here, so re-allocate when aggregation will be over.
973 */
974 dma_unmap_addr_set(sw_rx_data_prod, mapping,
975 dma_unmap_addr(replace_buf, mapping));
976
977 sw_rx_data_prod->data = replace_buf->data;
978 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
979 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
980 sw_rx_data_prod->page_offset = replace_buf->page_offset;
981
982 rxq->sw_rx_prod++;
983
984 /* move partial skb from cons to pool (don't unmap yet)
985 * save mapping, incase we drop the packet later on.
986 */
987 tpa_info->start_buf = *sw_rx_data_cons;
988 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
989 le32_to_cpu(rx_bd_cons->addr.lo));
990
991 tpa_info->start_buf_mapping = mapping;
992 rxq->sw_rx_cons++;
993
994 /* set tpa state to start only if we are able to allocate skb
995 * for this aggregation, otherwise mark as error and aggregation will
996 * be dropped
997 */
998 tpa_info->skb = netdev_alloc_skb(edev->ndev,
999 le16_to_cpu(cqe->len_on_first_bd));
1000 if (unlikely(!tpa_info->skb)) {
f86af2df 1001 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1002 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1003 goto cons_buf;
55482edc
MC		 1004 }
1005
1006 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1007 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1008
1009 /* Start filling in the aggregation info */
1010 tpa_info->frag_id = 0;
1011 tpa_info->agg_state = QEDE_AGG_STATE_START;
1012
1013 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1014 cqe->rss_hash, &rxhash_type);
1015 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1016 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1017 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1018 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1019 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1020 else
1021 tpa_info->vlan_tag = 0;
1022
1023 /* This is needed in order to enable forwarding support */
1024 qede_set_gro_params(edev, tpa_info->skb, cqe);
1025
f86af2df 1026cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1027 if (likely(cqe->ext_bd_len_list[0]))
1028 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1029 le16_to_cpu(cqe->ext_bd_len_list[0]));
1030
1031 if (unlikely(cqe->ext_bd_len_list[1])) {
1032 DP_ERR(edev,
1033 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1034 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1035 }
1036}
1037
88f09bd5 1038#ifdef CONFIG_INET
55482edc
MC		 1039static void qede_gro_ip_csum(struct sk_buff *skb)
1040{
1041 const struct iphdr *iph = ip_hdr(skb);
1042 struct tcphdr *th;
1043
1044 skb_set_network_header(skb, 0);
1045 skb_set_transport_header(skb, sizeof(struct iphdr));
1046 th = tcp_hdr(skb);
1047
1048 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1049 iph->saddr, iph->daddr, 0);
1050
1051 tcp_gro_complete(skb);
1052}
1053
1054static void qede_gro_ipv6_csum(struct sk_buff *skb)
1055{
1056 struct ipv6hdr *iph = ipv6_hdr(skb);
1057 struct tcphdr *th;
1058
1059 skb_set_network_header(skb, 0);
1060 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1061 th = tcp_hdr(skb);
1062
1063 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1064 &iph->saddr, &iph->daddr, 0);
1065 tcp_gro_complete(skb);
1066}
88f09bd5 1067#endif
55482edc
MC		 1068
1069static void qede_gro_receive(struct qede_dev *edev,
1070 struct qede_fastpath *fp,
1071 struct sk_buff *skb,
1072 u16 vlan_tag)
1073{
88f09bd5 1074#ifdef CONFIG_INET
55482edc
MC		 1075 if (skb_shinfo(skb)->gso_size) {
1076 switch (skb->protocol) {
1077 case htons(ETH_P_IP):
1078 qede_gro_ip_csum(skb);
1079 break;
1080 case htons(ETH_P_IPV6):
1081 qede_gro_ipv6_csum(skb);
1082 break;
1083 default:
1084 DP_ERR(edev,
1085 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1086 ntohs(skb->protocol));
1087 }
1088 }
88f09bd5 1089#endif
55482edc
MC		 1090 skb_record_rx_queue(skb, fp->rss_id);
1091 qede_skb_receive(edev, fp, skb, vlan_tag);
1092}
1093
1094static inline void qede_tpa_cont(struct qede_dev *edev,
1095 struct qede_rx_queue *rxq,
1096 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1097{
1098 int i;
1099
1100 for (i = 0; cqe->len_list[i]; i++)
1101 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1102 le16_to_cpu(cqe->len_list[i]));
1103
1104 if (unlikely(i > 1))
1105 DP_ERR(edev,
1106 "Strange - TPA cont with more than a single len_list entry\n");
1107}
1108
1109static void qede_tpa_end(struct qede_dev *edev,
1110 struct qede_fastpath *fp,
1111 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1112{
1113 struct qede_rx_queue *rxq = fp->rxq;
1114 struct qede_agg_info *tpa_info;
1115 struct sk_buff *skb;
1116 int i;
1117
1118 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1119 skb = tpa_info->skb;
1120
1121 for (i = 0; cqe->len_list[i]; i++)
1122 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1123 le16_to_cpu(cqe->len_list[i]));
1124 if (unlikely(i > 1))
1125 DP_ERR(edev,
1126 "Strange - TPA emd with more than a single len_list entry\n");
1127
1128 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1129 goto err;
1130
1131 /* Sanity */
1132 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1133 DP_ERR(edev,
1134 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1135 cqe->num_of_bds, tpa_info->frag_id);
1136 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1137 DP_ERR(edev,
1138 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1139 le16_to_cpu(cqe->total_packet_len), skb->len);
1140
1141 memcpy(skb->data,
1142 page_address(tpa_info->start_buf.data) +
1143 tpa_info->start_cqe.placement_offset +
1144 tpa_info->start_buf.page_offset,
1145 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1146
1147 /* Recycle [mapped] start buffer for the next replacement */
1148 tpa_info->replace_buf = tpa_info->start_buf;
1149 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1150
1151 /* Finalize the SKB */
1152 skb->protocol = eth_type_trans(skb, edev->ndev);
1153 skb->ip_summed = CHECKSUM_UNNECESSARY;
1154
1155 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1156 * to skb_shinfo(skb)->gso_segs
1157 */
1158 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1159
1160 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1161
1162 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1163
1164 return;
1165err:
1166 /* The BD starting the aggregation is still mapped; Re-use it for
1167 * future aggregations [as replacement buffer]
1168 */
1169 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1170 sizeof(struct sw_rx_data));
1171 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1172 tpa_info->start_buf.data = NULL;
1173 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1174 dev_kfree_skb_any(tpa_info->skb);
1175 tpa_info->skb = NULL;
1176}
1177
2950219d
YM		 1178static u8 qede_check_csum(u16 flag)
1179{
1180 u16 csum_flag = 0;
1181 u8 csum = 0;
1182
1183 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1184 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
1185 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1186 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1187 csum = QEDE_CSUM_UNNECESSARY;
1188 }
1189
1190 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1191 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1192
1193 if (csum_flag & flag)
1194 return QEDE_CSUM_ERROR;
1195
1196 return csum;
1197}
1198
1199static int qede_rx_int(struct qede_fastpath *fp, int budget)
1200{
1201 struct qede_dev *edev = fp->edev;
1202 struct qede_rx_queue *rxq = fp->rxq;
1203
1204 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1205 int rx_pkt = 0;
1206 u8 csum_flag;
1207
1208 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1209 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1210
1211 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1212 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1213 * read before it is written by FW, then FW writes CQE and SB, and then
1214 * the CPU reads the hw_comp_cons, it will use an old CQE.
1215 */
1216 rmb();
1217
1218 /* Loop to complete all indicated BDs */
1219 while (sw_comp_cons != hw_comp_cons) {
1220 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1221 enum pkt_hash_types rxhash_type;
1222 enum eth_rx_cqe_type cqe_type;
1223 struct sw_rx_data *sw_rx_data;
1224 union eth_rx_cqe *cqe;
1225 struct sk_buff *skb;
fc48b7a6
YM		 1226 struct page *data;
1227 __le16 flags;
2950219d
YM		 1228 u16 len, pad;
1229 u32 rx_hash;
2950219d
YM		 1230
1231 /* Get the CQE from the completion ring */
1232 cqe = (union eth_rx_cqe *)
1233 qed_chain_consume(&rxq->rx_comp_ring);
1234 cqe_type = cqe->fast_path_regular.type;
1235
1236 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1237 edev->ops->eth_cqe_completion(
1238 edev->cdev, fp->rss_id,
1239 (struct eth_slow_path_rx_cqe *)cqe);
1240 goto next_cqe;
1241 }
1242
55482edc
MC		 1243 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1244 switch (cqe_type) {
1245 case ETH_RX_CQE_TYPE_TPA_START:
1246 qede_tpa_start(edev, rxq,
1247 &cqe->fast_path_tpa_start);
1248 goto next_cqe;
1249 case ETH_RX_CQE_TYPE_TPA_CONT:
1250 qede_tpa_cont(edev, rxq,
1251 &cqe->fast_path_tpa_cont);
1252 goto next_cqe;
1253 case ETH_RX_CQE_TYPE_TPA_END:
1254 qede_tpa_end(edev, fp,
1255 &cqe->fast_path_tpa_end);
1256 goto next_rx_only;
1257 default:
1258 break;
1259 }
1260 }
1261
2950219d
YM		 1262 /* Get the data from the SW ring */
1263 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1264 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1265 data = sw_rx_data->data;
1266
1267 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1268 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1269 pad = fp_cqe->placement_offset;
fc48b7a6 1270 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1271
fc48b7a6
YM		 1272 /* If this is an error packet then drop it */
1273 parse_flag = le16_to_cpu(flags);
2950219d 1274
fc48b7a6
YM		 1275 csum_flag = qede_check_csum(parse_flag);
1276 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1277 DP_NOTICE(edev,
1278 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1279 sw_comp_cons, parse_flag);
1280 rxq->rx_hw_errors++;
f86af2df
MC		 1281 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1282 goto next_cqe;
fc48b7a6 1283 }
2950219d 1284
fc48b7a6
YM		 1285 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1286 if (unlikely(!skb)) {
2950219d 1287 DP_NOTICE(edev,
fc48b7a6 1288 "Build_skb failed, dropping incoming packet\n");
f86af2df 1289 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1290 rxq->rx_alloc_errors++;
f86af2df 1291 goto next_cqe;
fc48b7a6
YM		 1292 }
1293
1294 /* Copy data into SKB */
1295 if (len + pad <= QEDE_RX_HDR_SIZE) {
1296 memcpy(skb_put(skb, len),
1297 page_address(data) + pad +
1298 sw_rx_data->page_offset, len);
1299 qede_reuse_page(edev, rxq, sw_rx_data);
1300 } else {
1301 struct skb_frag_struct *frag;
1302 unsigned int pull_len;
1303 unsigned char *va;
1304
1305 frag = &skb_shinfo(skb)->frags[0];
1306
1307 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1308 pad + sw_rx_data->page_offset,
1309 len, rxq->rx_buf_seg_size);
1310
1311 va = skb_frag_address(frag);
1312 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1313
1314 /* Align the pull_len to optimize memcpy */
1315 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1316
1317 skb_frag_size_sub(frag, pull_len);
1318 frag->page_offset += pull_len;
1319 skb->data_len -= pull_len;
1320 skb->tail += pull_len;
1321
1322 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1323 sw_rx_data))) {
1324 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1325 /* Incr page ref count to reuse on allocation
1326 * failure so that it doesn't get freed while
1327 * freeing SKB.
1328 */
1329
1330 atomic_inc(&sw_rx_data->data->_count);
fc48b7a6 1331 rxq->rx_alloc_errors++;
f86af2df
MC		 1332 qede_recycle_rx_bd_ring(rxq, edev,
1333 fp_cqe->bd_num);
1334 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1335 goto next_cqe;
1336 }
2950219d
YM		 1337 }
1338
f86af2df
MC		 1339 qede_rx_bd_ring_consume(rxq);
1340
fc48b7a6
YM		 1341 if (fp_cqe->bd_num != 1) {
1342 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1343 u8 num_frags;
1344
1345 pkt_len -= len;
1346
1347 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1348 num_frags--) {
1349 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1350 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1351 if (unlikely(!cur_size)) {
1352 DP_ERR(edev,
1353 "Still got %d BDs for mapping jumbo, but length became 0\n",
1354 num_frags);
1355 qede_recycle_rx_bd_ring(rxq, edev,
1356 num_frags);
1357 dev_kfree_skb_any(skb);
1358 goto next_cqe;
1359 }
fc48b7a6 1360
f86af2df
MC		 1361 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1362 qede_recycle_rx_bd_ring(rxq, edev,
1363 num_frags);
1364 dev_kfree_skb_any(skb);
fc48b7a6 1365 goto next_cqe;
f86af2df 1366 }
fc48b7a6 1367
fc48b7a6
YM		 1368 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1369 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1370 qede_rx_bd_ring_consume(rxq);
1371
fc48b7a6
YM		 1372 dma_unmap_page(&edev->pdev->dev,
1373 sw_rx_data->mapping,
1374 PAGE_SIZE, DMA_FROM_DEVICE);
1375
1376 skb_fill_page_desc(skb,
1377 skb_shinfo(skb)->nr_frags++,
1378 sw_rx_data->data, 0,
1379 cur_size);
1380
1381 skb->truesize += PAGE_SIZE;
1382 skb->data_len += cur_size;
1383 skb->len += cur_size;
1384 pkt_len -= cur_size;
1385 }
2950219d 1386
f86af2df 1387 if (unlikely(pkt_len))
fc48b7a6
YM		 1388 DP_ERR(edev,
1389 "Mapped all BDs of jumbo, but still have %d bytes\n",
1390 pkt_len);
1391 }
2950219d
YM		 1392
1393 skb->protocol = eth_type_trans(skb, edev->ndev);
1394
1395 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1396 fp_cqe->rss_hash,
1397 &rxhash_type);
1398
1399 skb_set_hash(skb, rx_hash, rxhash_type);
1400
1401 qede_set_skb_csum(skb, csum_flag);
1402
1403 skb_record_rx_queue(skb, fp->rss_id);
1404
1405 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1406next_rx_only:
2950219d
YM		 1407 rx_pkt++;
1408
1409next_cqe: /* don't consume bd rx buffer */
1410 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1411 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1412 /* CR TPA - revisit how to handle budget in TPA perhaps
1413 * increase on "end"
1414 */
1415 if (rx_pkt == budget)
1416 break;
1417 } /* repeat while sw_comp_cons != hw_comp_cons... */
1418
1419 /* Update producers */
1420 qede_update_rx_prod(edev, rxq);
1421
1422 return rx_pkt;
1423}
1424
1425static int qede_poll(struct napi_struct *napi, int budget)
1426{
1427 int work_done = 0;
1428 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1429 napi);
1430 struct qede_dev *edev = fp->edev;
1431
1432 while (1) {
1433 u8 tc;
1434
1435 for (tc = 0; tc < edev->num_tc; tc++)
1436 if (qede_txq_has_work(&fp->txqs[tc]))
1437 qede_tx_int(edev, &fp->txqs[tc]);
1438
1439 if (qede_has_rx_work(fp->rxq)) {
1440 work_done += qede_rx_int(fp, budget - work_done);
1441
1442 /* must not complete if we consumed full budget */
1443 if (work_done >= budget)
1444 break;
1445 }
1446
1447 /* Fall out from the NAPI loop if needed */
1448 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1449 qed_sb_update_sb_idx(fp->sb_info);
1450 /* *_has_*_work() reads the status block,
1451 * thus we need to ensure that status block indices
1452 * have been actually read (qed_sb_update_sb_idx)
1453 * prior to this check (*_has_*_work) so that
1454 * we won't write the "newer" value of the status block
1455 * to HW (if there was a DMA right after
1456 * qede_has_rx_work and if there is no rmb, the memory
1457 * reading (qed_sb_update_sb_idx) may be postponed
1458 * to right before *_ack_sb). In this case there
1459 * will never be another interrupt until there is
1460 * another update of the status block, while there
1461 * is still unhandled work.
1462 */
1463 rmb();
1464
1465 if (!(qede_has_rx_work(fp->rxq) ||
1466 qede_has_tx_work(fp))) {
1467 napi_complete(napi);
1468 /* Update and reenable interrupts */
1469 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1470 1 /*update*/);
1471 break;
1472 }
1473 }
1474 }
1475
1476 return work_done;
1477}
1478
1479static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1480{
1481 struct qede_fastpath *fp = fp_cookie;
1482
1483 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1484
1485 napi_schedule_irqoff(&fp->napi);
1486 return IRQ_HANDLED;
1487}
1488
1489/* -------------------------------------------------------------------------
1490 * END OF FAST-PATH
1491 * -------------------------------------------------------------------------
1492 */
1493
1494static int qede_open(struct net_device *ndev);
1495static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1496static int qede_set_mac_addr(struct net_device *ndev, void *p);
1497static void qede_set_rx_mode(struct net_device *ndev);
1498static void qede_config_rx_mode(struct net_device *ndev);
1499
1500static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1501 enum qed_filter_xcast_params_type opcode,
1502 unsigned char mac[ETH_ALEN])
1503{
1504 struct qed_filter_params filter_cmd;
1505
1506 memset(&filter_cmd, 0, sizeof(filter_cmd));
1507 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1508 filter_cmd.filter.ucast.type = opcode;
1509 filter_cmd.filter.ucast.mac_valid = 1;
1510 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1511
1512 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1513}
1514
7c1bfcad
SRK		 1515static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1516 enum qed_filter_xcast_params_type opcode,
1517 u16 vid)
1518{
1519 struct qed_filter_params filter_cmd;
1520
1521 memset(&filter_cmd, 0, sizeof(filter_cmd));
1522 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1523 filter_cmd.filter.ucast.type = opcode;
1524 filter_cmd.filter.ucast.vlan_valid = 1;
1525 filter_cmd.filter.ucast.vlan = vid;
1526
1527 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1528}
1529
133fac0e
SK		 1530void qede_fill_by_demand_stats(struct qede_dev *edev)
1531{
1532 struct qed_eth_stats stats;
1533
1534 edev->ops->get_vport_stats(edev->cdev, &stats);
1535 edev->stats.no_buff_discards = stats.no_buff_discards;
1536 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1537 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1538 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1539 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1540 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1541 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1542 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1543 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1544
1545 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1546 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1547 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1548 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1549 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1550 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1551 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1552 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1553 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1554 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1555 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1556 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1557
1558 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1559 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1560 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1561 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1562 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1563 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1564 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1565 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1566 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1567 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1568 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1569 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1570 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1571 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1572 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1573 edev->stats.rx_align_errors = stats.rx_align_errors;
1574 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1575 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1576 edev->stats.rx_jabbers = stats.rx_jabbers;
1577 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1578 edev->stats.rx_fragments = stats.rx_fragments;
1579 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1580 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1581 edev->stats.tx_128_to_255_byte_packets =
1582 stats.tx_128_to_255_byte_packets;
1583 edev->stats.tx_256_to_511_byte_packets =
1584 stats.tx_256_to_511_byte_packets;
1585 edev->stats.tx_512_to_1023_byte_packets =
1586 stats.tx_512_to_1023_byte_packets;
1587 edev->stats.tx_1024_to_1518_byte_packets =
1588 stats.tx_1024_to_1518_byte_packets;
1589 edev->stats.tx_1519_to_2047_byte_packets =
1590 stats.tx_1519_to_2047_byte_packets;
1591 edev->stats.tx_2048_to_4095_byte_packets =
1592 stats.tx_2048_to_4095_byte_packets;
1593 edev->stats.tx_4096_to_9216_byte_packets =
1594 stats.tx_4096_to_9216_byte_packets;
1595 edev->stats.tx_9217_to_16383_byte_packets =
1596 stats.tx_9217_to_16383_byte_packets;
1597 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1598 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1599 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1600 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1601 edev->stats.brb_truncates = stats.brb_truncates;
1602 edev->stats.brb_discards = stats.brb_discards;
1603 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1604}
1605
1606static struct rtnl_link_stats64 *qede_get_stats64(
1607 struct net_device *dev,
1608 struct rtnl_link_stats64 *stats)
1609{
1610 struct qede_dev *edev = netdev_priv(dev);
1611
1612 qede_fill_by_demand_stats(edev);
1613
1614 stats->rx_packets = edev->stats.rx_ucast_pkts +
1615 edev->stats.rx_mcast_pkts +
1616 edev->stats.rx_bcast_pkts;
1617 stats->tx_packets = edev->stats.tx_ucast_pkts +
1618 edev->stats.tx_mcast_pkts +
1619 edev->stats.tx_bcast_pkts;
1620
1621 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1622 edev->stats.rx_mcast_bytes +
1623 edev->stats.rx_bcast_bytes;
1624
1625 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1626 edev->stats.tx_mcast_bytes +
1627 edev->stats.tx_bcast_bytes;
1628
1629 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1630 stats->multicast = edev->stats.rx_mcast_pkts +
1631 edev->stats.rx_bcast_pkts;
1632
1633 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1634
1635 stats->collisions = edev->stats.tx_total_collisions;
1636 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1637 stats->rx_frame_errors = edev->stats.rx_align_errors;
1638
1639 return stats;
1640}
1641
7c1bfcad
SRK		 1642static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1643{
1644 struct qed_update_vport_params params;
1645 int rc;
1646
1647 /* Proceed only if action actually needs to be performed */
1648 if (edev->accept_any_vlan == action)
1649 return;
1650
1651 memset(&params, 0, sizeof(params));
1652
1653 params.vport_id = 0;
1654 params.accept_any_vlan = action;
1655 params.update_accept_any_vlan_flg = 1;
1656
1657 rc = edev->ops->vport_update(edev->cdev, &params);
1658 if (rc) {
1659 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1660 action ? "enable" : "disable");
1661 } else {
1662 DP_INFO(edev, "%s accept-any-vlan\n",
1663 action ? "enabled" : "disabled");
1664 edev->accept_any_vlan = action;
1665 }
1666}
1667
1668static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1669{
1670 struct qede_dev *edev = netdev_priv(dev);
1671 struct qede_vlan *vlan, *tmp;
1672 int rc;
1673
1674 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1675
1676 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1677 if (!vlan) {
1678 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1679 return -ENOMEM;
1680 }
1681 INIT_LIST_HEAD(&vlan->list);
1682 vlan->vid = vid;
1683 vlan->configured = false;
1684
1685 /* Verify vlan isn't already configured */
1686 list_for_each_entry(tmp, &edev->vlan_list, list) {
1687 if (tmp->vid == vlan->vid) {
1688 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1689 "vlan already configured\n");
1690 kfree(vlan);
1691 return -EEXIST;
1692 }
1693 }
1694
1695 /* If interface is down, cache this VLAN ID and return */
1696 if (edev->state != QEDE_STATE_OPEN) {
1697 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1698 "Interface is down, VLAN %d will be configured when interface is up\n",
1699 vid);
1700 if (vid != 0)
1701 edev->non_configured_vlans++;
1702 list_add(&vlan->list, &edev->vlan_list);
1703
1704 return 0;
1705 }
1706
1707 /* Check for the filter limit.
1708 * Note - vlan0 has a reserved filter and can be added without
1709 * worrying about quota
1710 */
1711 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1712 (vlan->vid == 0)) {
1713 rc = qede_set_ucast_rx_vlan(edev,
1714 QED_FILTER_XCAST_TYPE_ADD,
1715 vlan->vid);
1716 if (rc) {
1717 DP_ERR(edev, "Failed to configure VLAN %d\n",
1718 vlan->vid);
1719 kfree(vlan);
1720 return -EINVAL;
1721 }
1722 vlan->configured = true;
1723
1724 /* vlan0 filter isn't consuming out of our quota */
1725 if (vlan->vid != 0)
1726 edev->configured_vlans++;
1727 } else {
1728 /* Out of quota; Activate accept-any-VLAN mode */
1729 if (!edev->non_configured_vlans)
1730 qede_config_accept_any_vlan(edev, true);
1731
1732 edev->non_configured_vlans++;
1733 }
1734
1735 list_add(&vlan->list, &edev->vlan_list);
1736
1737 return 0;
1738}
1739
1740static void qede_del_vlan_from_list(struct qede_dev *edev,
1741 struct qede_vlan *vlan)
1742{
1743 /* vlan0 filter isn't consuming out of our quota */
1744 if (vlan->vid != 0) {
1745 if (vlan->configured)
1746 edev->configured_vlans--;
1747 else
1748 edev->non_configured_vlans--;
1749 }
1750
1751 list_del(&vlan->list);
1752 kfree(vlan);
1753}
1754
1755static int qede_configure_vlan_filters(struct qede_dev *edev)
1756{
1757 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1758 struct qed_dev_eth_info *dev_info;
1759 struct qede_vlan *vlan = NULL;
1760
1761 if (list_empty(&edev->vlan_list))
1762 return 0;
1763
1764 dev_info = &edev->dev_info;
1765
1766 /* Configure non-configured vlans */
1767 list_for_each_entry(vlan, &edev->vlan_list, list) {
1768 if (vlan->configured)
1769 continue;
1770
1771 /* We have used all our credits, now enable accept_any_vlan */
1772 if ((vlan->vid != 0) &&
1773 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1774 accept_any_vlan = 1;
1775 continue;
1776 }
1777
1778 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1779
1780 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1781 vlan->vid);
1782 if (rc) {
1783 DP_ERR(edev, "Failed to configure VLAN %u\n",
1784 vlan->vid);
1785 real_rc = rc;
1786 continue;
1787 }
1788
1789 vlan->configured = true;
1790 /* vlan0 filter doesn't consume our VLAN filter's quota */
1791 if (vlan->vid != 0) {
1792 edev->non_configured_vlans--;
1793 edev->configured_vlans++;
1794 }
1795 }
1796
1797 /* enable accept_any_vlan mode if we have more VLANs than credits,
1798 * or remove accept_any_vlan mode if we've actually removed
1799 * a non-configured vlan, and all remaining vlans are truly configured.
1800 */
1801
1802 if (accept_any_vlan)
1803 qede_config_accept_any_vlan(edev, true);
1804 else if (!edev->non_configured_vlans)
1805 qede_config_accept_any_vlan(edev, false);
1806
1807 return real_rc;
1808}
1809
1810static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
1811{
1812 struct qede_dev *edev = netdev_priv(dev);
1813 struct qede_vlan *vlan = NULL;
1814 int rc;
1815
1816 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
1817
1818 /* Find whether entry exists */
1819 list_for_each_entry(vlan, &edev->vlan_list, list)
1820 if (vlan->vid == vid)
1821 break;
1822
1823 if (!vlan || (vlan->vid != vid)) {
1824 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1825 "Vlan isn't configured\n");
1826 return 0;
1827 }
1828
1829 if (edev->state != QEDE_STATE_OPEN) {
1830 /* As interface is already down, we don't have a VPORT
1831 * instance to remove vlan filter. So just update vlan list
1832 */
1833 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1834 "Interface is down, removing VLAN from list only\n");
1835 qede_del_vlan_from_list(edev, vlan);
1836 return 0;
1837 }
1838
1839 /* Remove vlan */
1840 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL, vid);
1841 if (rc) {
1842 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
1843 return -EINVAL;
1844 }
1845
1846 qede_del_vlan_from_list(edev, vlan);
1847
1848 /* We have removed a VLAN - try to see if we can
1849 * configure non-configured VLAN from the list.
1850 */
1851 rc = qede_configure_vlan_filters(edev);
1852
1853 return rc;
1854}
1855
1856static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
1857{
1858 struct qede_vlan *vlan = NULL;
1859
1860 if (list_empty(&edev->vlan_list))
1861 return;
1862
1863 list_for_each_entry(vlan, &edev->vlan_list, list) {
1864 if (!vlan->configured)
1865 continue;
1866
1867 vlan->configured = false;
1868
1869 /* vlan0 filter isn't consuming out of our quota */
1870 if (vlan->vid != 0) {
1871 edev->non_configured_vlans++;
1872 edev->configured_vlans--;
1873 }
1874
1875 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1876 "marked vlan %d as non-configured\n",
1877 vlan->vid);
1878 }
1879
1880 edev->accept_any_vlan = false;
1881}
1882
2950219d
YM		 1883static const struct net_device_ops qede_netdev_ops = {
1884 .ndo_open = qede_open,
1885 .ndo_stop = qede_close,
1886 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1887 .ndo_set_rx_mode = qede_set_rx_mode,
1888 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1889 .ndo_validate_addr = eth_validate_addr,
133fac0e 1890 .ndo_change_mtu = qede_change_mtu,
7c1bfcad
SRK		 1891 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
1892 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
133fac0e 1893 .ndo_get_stats64 = qede_get_stats64,
2950219d
YM		 1894};
1895
e712d52b
YM		 1896/* -------------------------------------------------------------------------
1897 * START OF PROBE / REMOVE
1898 * -------------------------------------------------------------------------
1899 */
1900
1901static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1902 struct pci_dev *pdev,
1903 struct qed_dev_eth_info *info,
1904 u32 dp_module,
1905 u8 dp_level)
1906{
1907 struct net_device *ndev;
1908 struct qede_dev *edev;
1909
1910 ndev = alloc_etherdev_mqs(sizeof(*edev),
1911 info->num_queues,
1912 info->num_queues);
1913 if (!ndev) {
1914 pr_err("etherdev allocation failed\n");
1915 return NULL;
1916 }
1917
1918 edev = netdev_priv(ndev);
1919 edev->ndev = ndev;
1920 edev->cdev = cdev;
1921 edev->pdev = pdev;
1922 edev->dp_module = dp_module;
1923 edev->dp_level = dp_level;
1924 edev->ops = qed_ops;
2950219d
YM		 1925 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1926 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1927
1928 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1929
1930 SET_NETDEV_DEV(ndev, &pdev->dev);
1931
133fac0e 1932 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1933 memcpy(&edev->dev_info, info, sizeof(*info));
1934
1935 edev->num_tc = edev->dev_info.num_tc;
1936
7c1bfcad
SRK		 1937 INIT_LIST_HEAD(&edev->vlan_list);
1938
e712d52b
YM		 1939 return edev;
1940}
1941
1942static void qede_init_ndev(struct qede_dev *edev)
1943{
1944 struct net_device *ndev = edev->ndev;
1945 struct pci_dev *pdev = edev->pdev;
1946 u32 hw_features;
1947
1948 pci_set_drvdata(pdev, ndev);
1949
1950 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1951 ndev->base_addr = ndev->mem_start;
1952 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1953 ndev->irq = edev->dev_info.common.pci_irq;
1954
1955 ndev->watchdog_timeo = TX_TIMEOUT;
1956
2950219d
YM		 1957 ndev->netdev_ops = &qede_netdev_ops;
1958
133fac0e
SK		 1959 qede_set_ethtool_ops(ndev);
1960
e712d52b
YM		 1961 /* user-changeble features */
1962 hw_features = NETIF_F_GRO | NETIF_F_SG |
1963 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1964 NETIF_F_TSO | NETIF_F_TSO6;
1965
1966 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1967 NETIF_F_HIGHDMA;
1968 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1969 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 1970 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 1971
1972 ndev->hw_features = hw_features;
1973
1974 /* Set network device HW mac */
1975 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1976}
1977
1978/* This function converts from 32b param to two params of level and module
1979 * Input 32b decoding:
1980 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1981 * 'happy' flow, e.g. memory allocation failed.
1982 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1983 * and provide important parameters.
1984 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1985 * module. VERBOSE prints are for tracking the specific flow in low level.
1986 *
1987 * Notice that the level should be that of the lowest required logs.
1988 */
133fac0e 1989void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 1990{
1991 *p_dp_level = QED_LEVEL_NOTICE;
1992 *p_dp_module = 0;
1993
1994 if (debug & QED_LOG_VERBOSE_MASK) {
1995 *p_dp_level = QED_LEVEL_VERBOSE;
1996 *p_dp_module = (debug & 0x3FFFFFFF);
1997 } else if (debug & QED_LOG_INFO_MASK) {
1998 *p_dp_level = QED_LEVEL_INFO;
1999 } else if (debug & QED_LOG_NOTICE_MASK) {
2000 *p_dp_level = QED_LEVEL_NOTICE;
2001 }
2002}
2003
2950219d
YM		 2004static void qede_free_fp_array(struct qede_dev *edev)
2005{
2006 if (edev->fp_array) {
2007 struct qede_fastpath *fp;
2008 int i;
2009
2010 for_each_rss(i) {
2011 fp = &edev->fp_array[i];
2012
2013 kfree(fp->sb_info);
2014 kfree(fp->rxq);
2015 kfree(fp->txqs);
2016 }
2017 kfree(edev->fp_array);
2018 }
2019 edev->num_rss = 0;
2020}
2021
2022static int qede_alloc_fp_array(struct qede_dev *edev)
2023{
2024 struct qede_fastpath *fp;
2025 int i;
2026
2027 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2028 sizeof(*edev->fp_array), GFP_KERNEL);
2029 if (!edev->fp_array) {
2030 DP_NOTICE(edev, "fp array allocation failed\n");
2031 goto err;
2032 }
2033
2034 for_each_rss(i) {
2035 fp = &edev->fp_array[i];
2036
2037 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2038 if (!fp->sb_info) {
2039 DP_NOTICE(edev, "sb info struct allocation failed\n");
2040 goto err;
2041 }
2042
2043 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2044 if (!fp->rxq) {
2045 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2046 goto err;
2047 }
2048
2049 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2050 if (!fp->txqs) {
2051 DP_NOTICE(edev, "TXQ array allocation failed\n");
2052 goto err;
2053 }
2054 }
2055
2056 return 0;
2057err:
2058 qede_free_fp_array(edev);
2059 return -ENOMEM;
2060}
2061
0d8e0aa0
SK		 2062static void qede_sp_task(struct work_struct *work)
2063{
2064 struct qede_dev *edev = container_of(work, struct qede_dev,
2065 sp_task.work);
2066 mutex_lock(&edev->qede_lock);
2067
2068 if (edev->state == QEDE_STATE_OPEN) {
2069 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2070 qede_config_rx_mode(edev->ndev);
2071 }
2072
2073 mutex_unlock(&edev->qede_lock);
2074}
2075
e712d52b
YM		 2076static void qede_update_pf_params(struct qed_dev *cdev)
2077{
2078 struct qed_pf_params pf_params;
2079
2080 /* 16 rx + 16 tx */
2081 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2082 pf_params.eth_pf_params.num_cons = 32;
2083 qed_ops->common->update_pf_params(cdev, &pf_params);
2084}
2085
2086enum qede_probe_mode {
2087 QEDE_PROBE_NORMAL,
2088};
2089
2090static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2091 enum qede_probe_mode mode)
2092{
2093 struct qed_slowpath_params params;
2094 struct qed_dev_eth_info dev_info;
2095 struct qede_dev *edev;
2096 struct qed_dev *cdev;
2097 int rc;
2098
2099 if (unlikely(dp_level & QED_LEVEL_INFO))
2100 pr_notice("Starting qede probe\n");
2101
2102 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
2103 dp_module, dp_level);
2104 if (!cdev) {
2105 rc = -ENODEV;
2106 goto err0;
2107 }
2108
2109 qede_update_pf_params(cdev);
2110
2111 /* Start the Slowpath-process */
2112 memset(&params, 0, sizeof(struct qed_slowpath_params));
2113 params.int_mode = QED_INT_MODE_MSIX;
2114 params.drv_major = QEDE_MAJOR_VERSION;
2115 params.drv_minor = QEDE_MINOR_VERSION;
2116 params.drv_rev = QEDE_REVISION_VERSION;
2117 params.drv_eng = QEDE_ENGINEERING_VERSION;
2118 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2119 rc = qed_ops->common->slowpath_start(cdev, &params);
2120 if (rc) {
2121 pr_notice("Cannot start slowpath\n");
2122 goto err1;
2123 }
2124
2125 /* Learn information crucial for qede to progress */
2126 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2127 if (rc)
2128 goto err2;
2129
2130 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2131 dp_level);
2132 if (!edev) {
2133 rc = -ENOMEM;
2134 goto err2;
2135 }
2136
2137 qede_init_ndev(edev);
2138
2950219d
YM		 2139 rc = register_netdev(edev->ndev);
2140 if (rc) {
2141 DP_NOTICE(edev, "Cannot register net-device\n");
2142 goto err3;
2143 }
2144
e712d52b
YM		 2145 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2146
a2ec6172
SK		 2147 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2148
0d8e0aa0
SK		 2149 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2150 mutex_init(&edev->qede_lock);
2151
e712d52b
YM		 2152 DP_INFO(edev, "Ending successfully qede probe\n");
2153
2154 return 0;
2155
2950219d
YM		 2156err3:
2157 free_netdev(edev->ndev);
e712d52b
YM		 2158err2:
2159 qed_ops->common->slowpath_stop(cdev);
2160err1:
2161 qed_ops->common->remove(cdev);
2162err0:
2163 return rc;
2164}
2165
2166static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2167{
2168 u32 dp_module = 0;
2169 u8 dp_level = 0;
2170
2171 qede_config_debug(debug, &dp_module, &dp_level);
2172
2173 return __qede_probe(pdev, dp_module, dp_level,
2174 QEDE_PROBE_NORMAL);
2175}
2176
2177enum qede_remove_mode {
2178 QEDE_REMOVE_NORMAL,
2179};
2180
2181static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2182{
2183 struct net_device *ndev = pci_get_drvdata(pdev);
2184 struct qede_dev *edev = netdev_priv(ndev);
2185 struct qed_dev *cdev = edev->cdev;
2186
2187 DP_INFO(edev, "Starting qede_remove\n");
2188
0d8e0aa0 2189 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2190 unregister_netdev(ndev);
2191
e712d52b
YM		 2192 edev->ops->common->set_power_state(cdev, PCI_D0);
2193
2194 pci_set_drvdata(pdev, NULL);
2195
2196 free_netdev(ndev);
2197
2198 /* Use global ops since we've freed edev */
2199 qed_ops->common->slowpath_stop(cdev);
2200 qed_ops->common->remove(cdev);
2201
2202 pr_notice("Ending successfully qede_remove\n");
2203}
2204
2205static void qede_remove(struct pci_dev *pdev)
2206{
2207 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2208}
2950219d
YM		 2209
2210/* -------------------------------------------------------------------------
2211 * START OF LOAD / UNLOAD
2212 * -------------------------------------------------------------------------
2213 */
2214
2215static int qede_set_num_queues(struct qede_dev *edev)
2216{
2217 int rc;
2218 u16 rss_num;
2219
2220 /* Setup queues according to possible resources*/
8edf049d
SK		 2221 if (edev->req_rss)
2222 rss_num = edev->req_rss;
2223 else
2224 rss_num = netif_get_num_default_rss_queues() *
2225 edev->dev_info.common.num_hwfns;
2950219d
YM		 2226
2227 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2228
2229 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2230 if (rc > 0) {
2231 /* Managed to request interrupts for our queues */
2232 edev->num_rss = rc;
2233 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2234 QEDE_RSS_CNT(edev), rss_num);
2235 rc = 0;
2236 }
2237 return rc;
2238}
2239
2240static void qede_free_mem_sb(struct qede_dev *edev,
2241 struct qed_sb_info *sb_info)
2242{
2243 if (sb_info->sb_virt)
2244 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2245 (void *)sb_info->sb_virt, sb_info->sb_phys);
2246}
2247
2248/* This function allocates fast-path status block memory */
2249static int qede_alloc_mem_sb(struct qede_dev *edev,
2250 struct qed_sb_info *sb_info,
2251 u16 sb_id)
2252{
2253 struct status_block *sb_virt;
2254 dma_addr_t sb_phys;
2255 int rc;
2256
2257 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2258 sizeof(*sb_virt),
2259 &sb_phys, GFP_KERNEL);
2260 if (!sb_virt) {
2261 DP_ERR(edev, "Status block allocation failed\n");
2262 return -ENOMEM;
2263 }
2264
2265 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2266 sb_virt, sb_phys, sb_id,
2267 QED_SB_TYPE_L2_QUEUE);
2268 if (rc) {
2269 DP_ERR(edev, "Status block initialization failed\n");
2270 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2271 sb_virt, sb_phys);
2272 return rc;
2273 }
2274
2275 return 0;
2276}
2277
2278static void qede_free_rx_buffers(struct qede_dev *edev,
2279 struct qede_rx_queue *rxq)
2280{
2281 u16 i;
2282
2283 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2284 struct sw_rx_data *rx_buf;
fc48b7a6 2285 struct page *data;
2950219d
YM		 2286
2287 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2288 data = rx_buf->data;
2289
fc48b7a6
YM		 2290 dma_unmap_page(&edev->pdev->dev,
2291 rx_buf->mapping,
2292 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2293
2294 rx_buf->data = NULL;
fc48b7a6 2295 __free_page(data);
2950219d
YM		 2296 }
2297}
2298
55482edc
MC		 2299static void qede_free_sge_mem(struct qede_dev *edev,
2300 struct qede_rx_queue *rxq) {
2301 int i;
2302
2303 if (edev->gro_disable)
2304 return;
2305
2306 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2307 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2308 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2309
f86af2df 2310 if (replace_buf->data) {
55482edc
MC		 2311 dma_unmap_page(&edev->pdev->dev,
2312 dma_unmap_addr(replace_buf, mapping),
2313 PAGE_SIZE, DMA_FROM_DEVICE);
2314 __free_page(replace_buf->data);
2315 }
2316 }
2317}
2318
2950219d
YM		 2319static void qede_free_mem_rxq(struct qede_dev *edev,
2320 struct qede_rx_queue *rxq)
2321{
55482edc
MC		 2322 qede_free_sge_mem(edev, rxq);
2323
2950219d
YM		 2324 /* Free rx buffers */
2325 qede_free_rx_buffers(edev, rxq);
2326
2327 /* Free the parallel SW ring */
2328 kfree(rxq->sw_rx_ring);
2329
2330 /* Free the real RQ ring used by FW */
2331 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2332 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2333}
2334
2335static int qede_alloc_rx_buffer(struct qede_dev *edev,
2336 struct qede_rx_queue *rxq)
2337{
2338 struct sw_rx_data *sw_rx_data;
2339 struct eth_rx_bd *rx_bd;
2340 dma_addr_t mapping;
fc48b7a6 2341 struct page *data;
2950219d 2342 u16 rx_buf_size;
2950219d
YM		 2343
2344 rx_buf_size = rxq->rx_buf_size;
2345
fc48b7a6 2346 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2347 if (unlikely(!data)) {
fc48b7a6 2348 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2349 return -ENOMEM;
2350 }
2351
fc48b7a6
YM		 2352 /* Map the entire page as it would be used
2353 * for multiple RX buffer segment size mapping.
2354 */
2355 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2356 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2357 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2358 __free_page(data);
2950219d
YM		 2359 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2360 return -ENOMEM;
2361 }
2362
2363 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2364 sw_rx_data->page_offset = 0;
2950219d 2365 sw_rx_data->data = data;
fc48b7a6 2366 sw_rx_data->mapping = mapping;
2950219d
YM		 2367
2368 /* Advance PROD and get BD pointer */
2369 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2370 WARN_ON(!rx_bd);
2371 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2372 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2373
2374 rxq->sw_rx_prod++;
2375
2376 return 0;
2377}
2378
55482edc
MC		 2379static int qede_alloc_sge_mem(struct qede_dev *edev,
2380 struct qede_rx_queue *rxq)
2381{
2382 dma_addr_t mapping;
2383 int i;
2384
2385 if (edev->gro_disable)
2386 return 0;
2387
2388 if (edev->ndev->mtu > PAGE_SIZE) {
2389 edev->gro_disable = 1;
2390 return 0;
2391 }
2392
2393 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2394 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2395 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2396
2397 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2398 if (unlikely(!replace_buf->data)) {
2399 DP_NOTICE(edev,
2400 "Failed to allocate TPA skb pool [replacement buffer]\n");
2401 goto err;
2402 }
2403
2404 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2405 rxq->rx_buf_size, DMA_FROM_DEVICE);
2406 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2407 DP_NOTICE(edev,
2408 "Failed to map TPA replacement buffer\n");
2409 goto err;
2410 }
2411
2412 dma_unmap_addr_set(replace_buf, mapping, mapping);
2413 tpa_info->replace_buf.page_offset = 0;
2414
2415 tpa_info->replace_buf_mapping = mapping;
2416 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2417 }
2418
2419 return 0;
2420err:
2421 qede_free_sge_mem(edev, rxq);
2422 edev->gro_disable = 1;
2423 return -ENOMEM;
2424}
2425
2950219d
YM		 2426/* This function allocates all memory needed per Rx queue */
2427static int qede_alloc_mem_rxq(struct qede_dev *edev,
2428 struct qede_rx_queue *rxq)
2429{
f86af2df 2430 int i, rc, size;
2950219d
YM		 2431
2432 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2433
fc48b7a6
YM		 2434 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
2435 edev->ndev->mtu;
2436 if (rxq->rx_buf_size > PAGE_SIZE)
2437 rxq->rx_buf_size = PAGE_SIZE;
2438
2439 /* Segment size to spilt a page in multiple equal parts */
2440 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2441
2442 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2443 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2444 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2445 if (!rxq->sw_rx_ring) {
2446 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2447 rc = -ENOMEM;
2950219d
YM		 2448 goto err;
2449 }
2450
2451 /* Allocate FW Rx ring */
2452 rc = edev->ops->common->chain_alloc(edev->cdev,
2453 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2454 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 2455 RX_RING_SIZE,
2950219d
YM		 2456 sizeof(struct eth_rx_bd),
2457 &rxq->rx_bd_ring);
2458
2459 if (rc)
2460 goto err;
2461
2462 /* Allocate FW completion ring */
2463 rc = edev->ops->common->chain_alloc(edev->cdev,
2464 QED_CHAIN_USE_TO_CONSUME,
2465 QED_CHAIN_MODE_PBL,
fc48b7a6 2466 RX_RING_SIZE,
2950219d
YM		 2467 sizeof(union eth_rx_cqe),
2468 &rxq->rx_comp_ring);
2469 if (rc)
2470 goto err;
2471
2472 /* Allocate buffers for the Rx ring */
2473 for (i = 0; i < rxq->num_rx_buffers; i++) {
2474 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2475 if (rc) {
2476 DP_ERR(edev,
2477 "Rx buffers allocation failed at index %d\n", i);
2478 goto err;
2479 }
2950219d
YM		 2480 }
2481
f86af2df 2482 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2483err:
f86af2df 2484 return rc;
2950219d
YM		 2485}
2486
2487static void qede_free_mem_txq(struct qede_dev *edev,
2488 struct qede_tx_queue *txq)
2489{
2490 /* Free the parallel SW ring */
2491 kfree(txq->sw_tx_ring);
2492
2493 /* Free the real RQ ring used by FW */
2494 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2495}
2496
2497/* This function allocates all memory needed per Tx queue */
2498static int qede_alloc_mem_txq(struct qede_dev *edev,
2499 struct qede_tx_queue *txq)
2500{
2501 int size, rc;
2502 union eth_tx_bd_types *p_virt;
2503
2504 txq->num_tx_buffers = edev->q_num_tx_buffers;
2505
2506 /* Allocate the parallel driver ring for Tx buffers */
2507 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2508 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2509 if (!txq->sw_tx_ring) {
2510 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2511 goto err;
2512 }
2513
2514 rc = edev->ops->common->chain_alloc(edev->cdev,
2515 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2516 QED_CHAIN_MODE_PBL,
2517 NUM_TX_BDS_MAX,
2518 sizeof(*p_virt),
2519 &txq->tx_pbl);
2520 if (rc)
2521 goto err;
2522
2523 return 0;
2524
2525err:
2526 qede_free_mem_txq(edev, txq);
2527 return -ENOMEM;
2528}
2529
2530/* This function frees all memory of a single fp */
2531static void qede_free_mem_fp(struct qede_dev *edev,
2532 struct qede_fastpath *fp)
2533{
2534 int tc;
2535
2536 qede_free_mem_sb(edev, fp->sb_info);
2537
2538 qede_free_mem_rxq(edev, fp->rxq);
2539
2540 for (tc = 0; tc < edev->num_tc; tc++)
2541 qede_free_mem_txq(edev, &fp->txqs[tc]);
2542}
2543
2544/* This function allocates all memory needed for a single fp (i.e. an entity
2545 * which contains status block, one rx queue and multiple per-TC tx queues.
2546 */
2547static int qede_alloc_mem_fp(struct qede_dev *edev,
2548 struct qede_fastpath *fp)
2549{
2550 int rc, tc;
2551
2552 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2553 if (rc)
2554 goto err;
2555
2556 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2557 if (rc)
2558 goto err;
2559
2560 for (tc = 0; tc < edev->num_tc; tc++) {
2561 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2562 if (rc)
2563 goto err;
2564 }
2565
2566 return 0;
2950219d 2567err:
f86af2df 2568 return rc;
2950219d
YM		 2569}
2570
2571static void qede_free_mem_load(struct qede_dev *edev)
2572{
2573 int i;
2574
2575 for_each_rss(i) {
2576 struct qede_fastpath *fp = &edev->fp_array[i];
2577
2578 qede_free_mem_fp(edev, fp);
2579 }
2580}
2581
2582/* This function allocates all qede memory at NIC load. */
2583static int qede_alloc_mem_load(struct qede_dev *edev)
2584{
2585 int rc = 0, rss_id;
2586
2587 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2588 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2589
2590 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 2591 if (rc) {
2950219d 2592 DP_ERR(edev,
f86af2df
MC		 2593 "Failed to allocate memory for fastpath - rss id = %d\n",
2594 rss_id);
2595 qede_free_mem_load(edev);
2596 return rc;
2950219d 2597 }
2950219d
YM		 2598 }
2599
2600 return 0;
2601}
2602
2603/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2604static void qede_init_fp(struct qede_dev *edev)
2605{
2606 int rss_id, txq_index, tc;
2607 struct qede_fastpath *fp;
2608
2609 for_each_rss(rss_id) {
2610 fp = &edev->fp_array[rss_id];
2611
2612 fp->edev = edev;
2613 fp->rss_id = rss_id;
2614
2615 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2616
2617 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2618
2619 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2620 fp->rxq->rxq_id = rss_id;
2621
2622 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2623 for (tc = 0; tc < edev->num_tc; tc++) {
2624 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2625 fp->txqs[tc].index = txq_index;
2626 }
2627
2628 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2629 edev->ndev->name, rss_id);
2630 }
55482edc
MC		 2631
2632 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 2633}
2634
2635static int qede_set_real_num_queues(struct qede_dev *edev)
2636{
2637 int rc = 0;
2638
2639 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
2640 if (rc) {
2641 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
2642 return rc;
2643 }
2644 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
2645 if (rc) {
2646 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
2647 return rc;
2648 }
2649
2650 return 0;
2651}
2652
2653static void qede_napi_disable_remove(struct qede_dev *edev)
2654{
2655 int i;
2656
2657 for_each_rss(i) {
2658 napi_disable(&edev->fp_array[i].napi);
2659
2660 netif_napi_del(&edev->fp_array[i].napi);
2661 }
2662}
2663
2664static void qede_napi_add_enable(struct qede_dev *edev)
2665{
2666 int i;
2667
2668 /* Add NAPI objects */
2669 for_each_rss(i) {
2670 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
2671 qede_poll, NAPI_POLL_WEIGHT);
2672 napi_enable(&edev->fp_array[i].napi);
2673 }
2674}
2675
2676static void qede_sync_free_irqs(struct qede_dev *edev)
2677{
2678 int i;
2679
2680 for (i = 0; i < edev->int_info.used_cnt; i++) {
2681 if (edev->int_info.msix_cnt) {
2682 synchronize_irq(edev->int_info.msix[i].vector);
2683 free_irq(edev->int_info.msix[i].vector,
2684 &edev->fp_array[i]);
2685 } else {
2686 edev->ops->common->simd_handler_clean(edev->cdev, i);
2687 }
2688 }
2689
2690 edev->int_info.used_cnt = 0;
2691}
2692
2693static int qede_req_msix_irqs(struct qede_dev *edev)
2694{
2695 int i, rc;
2696
2697 /* Sanitize number of interrupts == number of prepared RSS queues */
2698 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2699 DP_ERR(edev,
2700 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2701 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2702 return -EINVAL;
2703 }
2704
2705 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2706 rc = request_irq(edev->int_info.msix[i].vector,
2707 qede_msix_fp_int, 0, edev->fp_array[i].name,
2708 &edev->fp_array[i]);
2709 if (rc) {
2710 DP_ERR(edev, "Request fp %d irq failed\n", i);
2711 qede_sync_free_irqs(edev);
2712 return rc;
2713 }
2714 DP_VERBOSE(edev, NETIF_MSG_INTR,
2715 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2716 edev->fp_array[i].name, i,
2717 &edev->fp_array[i]);
2718 edev->int_info.used_cnt++;
2719 }
2720
2721 return 0;
2722}
2723
2724static void qede_simd_fp_handler(void *cookie)
2725{
2726 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2727
2728 napi_schedule_irqoff(&fp->napi);
2729}
2730
2731static int qede_setup_irqs(struct qede_dev *edev)
2732{
2733 int i, rc = 0;
2734
2735 /* Learn Interrupt configuration */
2736 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2737 if (rc)
2738 return rc;
2739
2740 if (edev->int_info.msix_cnt) {
2741 rc = qede_req_msix_irqs(edev);
2742 if (rc)
2743 return rc;
2744 edev->ndev->irq = edev->int_info.msix[0].vector;
2745 } else {
2746 const struct qed_common_ops *ops;
2747
2748 /* qed should learn receive the RSS ids and callbacks */
2749 ops = edev->ops->common;
2750 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2751 ops->simd_handler_config(edev->cdev,
2752 &edev->fp_array[i], i,
2753 qede_simd_fp_handler);
2754 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2755 }
2756 return 0;
2757}
2758
2759static int qede_drain_txq(struct qede_dev *edev,
2760 struct qede_tx_queue *txq,
2761 bool allow_drain)
2762{
2763 int rc, cnt = 1000;
2764
2765 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2766 if (!cnt) {
2767 if (allow_drain) {
2768 DP_NOTICE(edev,
2769 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2770 txq->index);
2771 rc = edev->ops->common->drain(edev->cdev);
2772 if (rc)
2773 return rc;
2774 return qede_drain_txq(edev, txq, false);
2775 }
2776 DP_NOTICE(edev,
2777 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2778 txq->index, txq->sw_tx_prod,
2779 txq->sw_tx_cons);
2780 return -ENODEV;
2781 }
2782 cnt--;
2783 usleep_range(1000, 2000);
2784 barrier();
2785 }
2786
2787 /* FW finished processing, wait for HW to transmit all tx packets */
2788 usleep_range(1000, 2000);
2789
2790 return 0;
2791}
2792
2793static int qede_stop_queues(struct qede_dev *edev)
2794{
2795 struct qed_update_vport_params vport_update_params;
2796 struct qed_dev *cdev = edev->cdev;
2797 int rc, tc, i;
2798
2799 /* Disable the vport */
2800 memset(&vport_update_params, 0, sizeof(vport_update_params));
2801 vport_update_params.vport_id = 0;
2802 vport_update_params.update_vport_active_flg = 1;
2803 vport_update_params.vport_active_flg = 0;
2804 vport_update_params.update_rss_flg = 0;
2805
2806 rc = edev->ops->vport_update(cdev, &vport_update_params);
2807 if (rc) {
2808 DP_ERR(edev, "Failed to update vport\n");
2809 return rc;
2810 }
2811
2812 /* Flush Tx queues. If needed, request drain from MCP */
2813 for_each_rss(i) {
2814 struct qede_fastpath *fp = &edev->fp_array[i];
2815
2816 for (tc = 0; tc < edev->num_tc; tc++) {
2817 struct qede_tx_queue *txq = &fp->txqs[tc];
2818
2819 rc = qede_drain_txq(edev, txq, true);
2820 if (rc)
2821 return rc;
2822 }
2823 }
2824
2825 /* Stop all Queues in reverse order*/
2826 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2827 struct qed_stop_rxq_params rx_params;
2828
2829 /* Stop the Tx Queue(s)*/
2830 for (tc = 0; tc < edev->num_tc; tc++) {
2831 struct qed_stop_txq_params tx_params;
2832
2833 tx_params.rss_id = i;
2834 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2835 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2836 if (rc) {
2837 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2838 tx_params.tx_queue_id);
2839 return rc;
2840 }
2841 }
2842
2843 /* Stop the Rx Queue*/
2844 memset(&rx_params, 0, sizeof(rx_params));
2845 rx_params.rss_id = i;
2846 rx_params.rx_queue_id = i;
2847
2848 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2849 if (rc) {
2850 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2851 return rc;
2852 }
2853 }
2854
2855 /* Stop the vport */
2856 rc = edev->ops->vport_stop(cdev, 0);
2857 if (rc)
2858 DP_ERR(edev, "Failed to stop VPORT\n");
2859
2860 return rc;
2861}
2862
2863static int qede_start_queues(struct qede_dev *edev)
2864{
2865 int rc, tc, i;
088c8618 2866 int vlan_removal_en = 1;
2950219d
YM		 2867 struct qed_dev *cdev = edev->cdev;
2868 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
2869 struct qed_update_vport_params vport_update_params;
2870 struct qed_queue_start_common_params q_params;
088c8618 2871 struct qed_start_vport_params start = {0};
2950219d
YM		 2872
2873 if (!edev->num_rss) {
2874 DP_ERR(edev,
2875 "Cannot update V-VPORT as active as there are no Rx queues\n");
2876 return -EINVAL;
2877 }
2878
55482edc 2879 start.gro_enable = !edev->gro_disable;
088c8618
MC		 2880 start.mtu = edev->ndev->mtu;
2881 start.vport_id = 0;
2882 start.drop_ttl0 = true;
2883 start.remove_inner_vlan = vlan_removal_en;
2884
2885 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 2886
2887 if (rc) {
2888 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2889 return rc;
2890 }
2891
2892 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2893 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 2894 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 2895
2896 for_each_rss(i) {
2897 struct qede_fastpath *fp = &edev->fp_array[i];
2898 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2899
2900 memset(&q_params, 0, sizeof(q_params));
2901 q_params.rss_id = i;
2902 q_params.queue_id = i;
2903 q_params.vport_id = 0;
2904 q_params.sb = fp->sb_info->igu_sb_id;
2905 q_params.sb_idx = RX_PI;
2906
2907 rc = edev->ops->q_rx_start(cdev, &q_params,
2908 fp->rxq->rx_buf_size,
2909 fp->rxq->rx_bd_ring.p_phys_addr,
2910 phys_table,
2911 fp->rxq->rx_comp_ring.page_cnt,
2912 &fp->rxq->hw_rxq_prod_addr);
2913 if (rc) {
2914 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2915 return rc;
2916 }
2917
2918 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2919
2920 qede_update_rx_prod(edev, fp->rxq);
2921
2922 for (tc = 0; tc < edev->num_tc; tc++) {
2923 struct qede_tx_queue *txq = &fp->txqs[tc];
2924 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2925
2926 memset(&q_params, 0, sizeof(q_params));
2927 q_params.rss_id = i;
2928 q_params.queue_id = txq_index;
2929 q_params.vport_id = 0;
2930 q_params.sb = fp->sb_info->igu_sb_id;
2931 q_params.sb_idx = TX_PI(tc);
2932
2933 rc = edev->ops->q_tx_start(cdev, &q_params,
2934 txq->tx_pbl.pbl.p_phys_table,
2935 txq->tx_pbl.page_cnt,
2936 &txq->doorbell_addr);
2937 if (rc) {
2938 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2939 txq_index, rc);
2940 return rc;
2941 }
2942
2943 txq->hw_cons_ptr =
2944 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2945 SET_FIELD(txq->tx_db.data.params,
2946 ETH_DB_DATA_DEST, DB_DEST_XCM);
2947 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2948 DB_AGG_CMD_SET);
2949 SET_FIELD(txq->tx_db.data.params,
2950 ETH_DB_DATA_AGG_VAL_SEL,
2951 DQ_XCM_ETH_TX_BD_PROD_CMD);
2952
2953 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2954 }
2955 }
2956
2957 /* Prepare and send the vport enable */
2958 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 2959 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 2960 vport_update_params.update_vport_active_flg = 1;
2961 vport_update_params.vport_active_flg = 1;
2962
2963 /* Fill struct with RSS params */
2964 if (QEDE_RSS_CNT(edev) > 1) {
2965 vport_update_params.update_rss_flg = 1;
2966 for (i = 0; i < 128; i++)
2967 rss_params->rss_ind_table[i] =
2968 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2969 netdev_rss_key_fill(rss_params->rss_key,
2970 sizeof(rss_params->rss_key));
2971 } else {
2972 memset(rss_params, 0, sizeof(*rss_params));
2973 }
2974 memcpy(&vport_update_params.rss_params, rss_params,
2975 sizeof(*rss_params));
2976
2977 rc = edev->ops->vport_update(cdev, &vport_update_params);
2978 if (rc) {
2979 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2980 return rc;
2981 }
2982
2983 return 0;
2984}
2985
0d8e0aa0
SK		 2986static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2987 enum qed_filter_xcast_params_type opcode,
2988 unsigned char *mac, int num_macs)
2989{
2990 struct qed_filter_params filter_cmd;
2991 int i;
2992
2993 memset(&filter_cmd, 0, sizeof(filter_cmd));
2994 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2995 filter_cmd.filter.mcast.type = opcode;
2996 filter_cmd.filter.mcast.num = num_macs;
2997
2998 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2999 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3000
3001 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3002}
3003
2950219d
YM		 3004enum qede_unload_mode {
3005 QEDE_UNLOAD_NORMAL,
3006};
3007
3008static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3009{
a2ec6172 3010 struct qed_link_params link_params;
2950219d
YM		 3011 int rc;
3012
3013 DP_INFO(edev, "Starting qede unload\n");
3014
0d8e0aa0
SK		 3015 mutex_lock(&edev->qede_lock);
3016 edev->state = QEDE_STATE_CLOSED;
3017
2950219d
YM		 3018 /* Close OS Tx */
3019 netif_tx_disable(edev->ndev);
3020 netif_carrier_off(edev->ndev);
3021
a2ec6172
SK		 3022 /* Reset the link */
3023 memset(&link_params, 0, sizeof(link_params));
3024 link_params.link_up = false;
3025 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3026 rc = qede_stop_queues(edev);
3027 if (rc) {
3028 qede_sync_free_irqs(edev);
3029 goto out;
3030 }
3031
3032 DP_INFO(edev, "Stopped Queues\n");
3033
7c1bfcad 3034 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3035 edev->ops->fastpath_stop(edev->cdev);
3036
3037 /* Release the interrupts */
3038 qede_sync_free_irqs(edev);
3039 edev->ops->common->set_fp_int(edev->cdev, 0);
3040
3041 qede_napi_disable_remove(edev);
3042
3043 qede_free_mem_load(edev);
3044 qede_free_fp_array(edev);
3045
3046out:
3047 mutex_unlock(&edev->qede_lock);
3048 DP_INFO(edev, "Ending qede unload\n");
3049}
3050
3051enum qede_load_mode {
3052 QEDE_LOAD_NORMAL,
3053};
3054
3055static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3056{
a2ec6172
SK		 3057 struct qed_link_params link_params;
3058 struct qed_link_output link_output;
2950219d
YM		 3059 int rc;
3060
3061 DP_INFO(edev, "Starting qede load\n");
3062
3063 rc = qede_set_num_queues(edev);
3064 if (rc)
3065 goto err0;
3066
3067 rc = qede_alloc_fp_array(edev);
3068 if (rc)
3069 goto err0;
3070
3071 qede_init_fp(edev);
3072
3073 rc = qede_alloc_mem_load(edev);
3074 if (rc)
3075 goto err1;
3076 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3077 QEDE_RSS_CNT(edev), edev->num_tc);
3078
3079 rc = qede_set_real_num_queues(edev);
3080 if (rc)
3081 goto err2;
3082
3083 qede_napi_add_enable(edev);
3084 DP_INFO(edev, "Napi added and enabled\n");
3085
3086 rc = qede_setup_irqs(edev);
3087 if (rc)
3088 goto err3;
3089 DP_INFO(edev, "Setup IRQs succeeded\n");
3090
3091 rc = qede_start_queues(edev);
3092 if (rc)
3093 goto err4;
3094 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3095
3096 /* Add primary mac and set Rx filters */
3097 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3098
0d8e0aa0
SK		 3099 mutex_lock(&edev->qede_lock);
3100 edev->state = QEDE_STATE_OPEN;
3101 mutex_unlock(&edev->qede_lock);
a2ec6172 3102
7c1bfcad
SRK		 3103 /* Program un-configured VLANs */
3104 qede_configure_vlan_filters(edev);
3105
a2ec6172
SK		 3106 /* Ask for link-up using current configuration */
3107 memset(&link_params, 0, sizeof(link_params));
3108 link_params.link_up = true;
3109 edev->ops->common->set_link(edev->cdev, &link_params);
3110
3111 /* Query whether link is already-up */
3112 memset(&link_output, 0, sizeof(link_output));
3113 edev->ops->common->get_link(edev->cdev, &link_output);
3114 qede_link_update(edev, &link_output);
3115
2950219d
YM		 3116 DP_INFO(edev, "Ending successfully qede load\n");
3117
3118 return 0;
3119
3120err4:
3121 qede_sync_free_irqs(edev);
3122 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3123err3:
3124 qede_napi_disable_remove(edev);
3125err2:
3126 qede_free_mem_load(edev);
3127err1:
3128 edev->ops->common->set_fp_int(edev->cdev, 0);
3129 qede_free_fp_array(edev);
3130 edev->num_rss = 0;
3131err0:
3132 return rc;
3133}
3134
133fac0e
SK		 3135void qede_reload(struct qede_dev *edev,
3136 void (*func)(struct qede_dev *, union qede_reload_args *),
3137 union qede_reload_args *args)
3138{
3139 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3140 /* Call function handler to update parameters
3141 * needed for function load.
3142 */
3143 if (func)
3144 func(edev, args);
3145
3146 qede_load(edev, QEDE_LOAD_NORMAL);
3147
3148 mutex_lock(&edev->qede_lock);
3149 qede_config_rx_mode(edev->ndev);
3150 mutex_unlock(&edev->qede_lock);
3151}
3152
2950219d
YM		 3153/* called with rtnl_lock */
3154static int qede_open(struct net_device *ndev)
3155{
3156 struct qede_dev *edev = netdev_priv(ndev);
3157
3158 netif_carrier_off(ndev);
3159
3160 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3161
3162 return qede_load(edev, QEDE_LOAD_NORMAL);
3163}
3164
3165static int qede_close(struct net_device *ndev)
3166{
3167 struct qede_dev *edev = netdev_priv(ndev);
3168
3169 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3170
3171 return 0;
3172}
0d8e0aa0 3173
a2ec6172
SK		 3174static void qede_link_update(void *dev, struct qed_link_output *link)
3175{
3176 struct qede_dev *edev = dev;
3177
3178 if (!netif_running(edev->ndev)) {
3179 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3180 return;
3181 }
3182
3183 if (link->link_up) {
8e025ae2
YM		 3184 if (!netif_carrier_ok(edev->ndev)) {
3185 DP_NOTICE(edev, "Link is up\n");
3186 netif_tx_start_all_queues(edev->ndev);
3187 netif_carrier_on(edev->ndev);
3188 }
a2ec6172 3189 } else {
8e025ae2
YM		 3190 if (netif_carrier_ok(edev->ndev)) {
3191 DP_NOTICE(edev, "Link is down\n");
3192 netif_tx_disable(edev->ndev);
3193 netif_carrier_off(edev->ndev);
3194 }
a2ec6172
SK		 3195 }
3196}
3197
0d8e0aa0
SK		 3198static int qede_set_mac_addr(struct net_device *ndev, void *p)
3199{
3200 struct qede_dev *edev = netdev_priv(ndev);
3201 struct sockaddr *addr = p;
3202 int rc;
3203
3204 ASSERT_RTNL(); /* @@@TBD To be removed */
3205
3206 DP_INFO(edev, "Set_mac_addr called\n");
3207
3208 if (!is_valid_ether_addr(addr->sa_data)) {
3209 DP_NOTICE(edev, "The MAC address is not valid\n");
3210 return -EFAULT;
3211 }
3212
3213 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3214
3215 if (!netif_running(ndev)) {
3216 DP_NOTICE(edev, "The device is currently down\n");
3217 return 0;
3218 }
3219
3220 /* Remove the previous primary mac */
3221 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3222 edev->primary_mac);
3223 if (rc)
3224 return rc;
3225
3226 /* Add MAC filter according to the new unicast HW MAC address */
3227 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3228 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3229 edev->primary_mac);
3230}
3231
3232static int
3233qede_configure_mcast_filtering(struct net_device *ndev,
3234 enum qed_filter_rx_mode_type *accept_flags)
3235{
3236 struct qede_dev *edev = netdev_priv(ndev);
3237 unsigned char *mc_macs, *temp;
3238 struct netdev_hw_addr *ha;
3239 int rc = 0, mc_count;
3240 size_t size;
3241
3242 size = 64 * ETH_ALEN;
3243
3244 mc_macs = kzalloc(size, GFP_KERNEL);
3245 if (!mc_macs) {
3246 DP_NOTICE(edev,
3247 "Failed to allocate memory for multicast MACs\n");
3248 rc = -ENOMEM;
3249 goto exit;
3250 }
3251
3252 temp = mc_macs;
3253
3254 /* Remove all previously configured MAC filters */
3255 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3256 mc_macs, 1);
3257 if (rc)
3258 goto exit;
3259
3260 netif_addr_lock_bh(ndev);
3261
3262 mc_count = netdev_mc_count(ndev);
3263 if (mc_count < 64) {
3264 netdev_for_each_mc_addr(ha, ndev) {
3265 ether_addr_copy(temp, ha->addr);
3266 temp += ETH_ALEN;
3267 }
3268 }
3269
3270 netif_addr_unlock_bh(ndev);
3271
3272 /* Check for all multicast @@@TBD resource allocation */
3273 if ((ndev->flags & IFF_ALLMULTI) ||
3274 (mc_count > 64)) {
3275 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3276 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3277 } else {
3278 /* Add all multicast MAC filters */
3279 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3280 mc_macs, mc_count);
3281 }
3282
3283exit:
3284 kfree(mc_macs);
3285 return rc;
3286}
3287
3288static void qede_set_rx_mode(struct net_device *ndev)
3289{
3290 struct qede_dev *edev = netdev_priv(ndev);
3291
3292 DP_INFO(edev, "qede_set_rx_mode called\n");
3293
3294 if (edev->state != QEDE_STATE_OPEN) {
3295 DP_INFO(edev,
3296 "qede_set_rx_mode called while interface is down\n");
3297 } else {
3298 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3299 schedule_delayed_work(&edev->sp_task, 0);
3300 }
3301}
3302
3303/* Must be called with qede_lock held */
3304static void qede_config_rx_mode(struct net_device *ndev)
3305{
3306 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3307 struct qede_dev *edev = netdev_priv(ndev);
3308 struct qed_filter_params rx_mode;
3309 unsigned char *uc_macs, *temp;
3310 struct netdev_hw_addr *ha;
3311 int rc, uc_count;
3312 size_t size;
3313
3314 netif_addr_lock_bh(ndev);
3315
3316 uc_count = netdev_uc_count(ndev);
3317 size = uc_count * ETH_ALEN;
3318
3319 uc_macs = kzalloc(size, GFP_ATOMIC);
3320 if (!uc_macs) {
3321 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3322 netif_addr_unlock_bh(ndev);
3323 return;
3324 }
3325
3326 temp = uc_macs;
3327 netdev_for_each_uc_addr(ha, ndev) {
3328 ether_addr_copy(temp, ha->addr);
3329 temp += ETH_ALEN;
3330 }
3331
3332 netif_addr_unlock_bh(ndev);
3333
3334 /* Configure the struct for the Rx mode */
3335 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3336 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3337
3338 /* Remove all previous unicast secondary macs and multicast macs
3339 * (configrue / leave the primary mac)
3340 */
3341 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3342 edev->primary_mac);
3343 if (rc)
3344 goto out;
3345
3346 /* Check for promiscuous */
3347 if ((ndev->flags & IFF_PROMISC) ||
3348 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3349 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3350 } else {
3351 /* Add MAC filters according to the unicast secondary macs */
3352 int i;
3353
3354 temp = uc_macs;
3355 for (i = 0; i < uc_count; i++) {
3356 rc = qede_set_ucast_rx_mac(edev,
3357 QED_FILTER_XCAST_TYPE_ADD,
3358 temp);
3359 if (rc)
3360 goto out;
3361
3362 temp += ETH_ALEN;
3363 }
3364
3365 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3366 if (rc)
3367 goto out;
3368 }
3369
7c1bfcad
SRK		 3370 /* take care of VLAN mode */
3371 if (ndev->flags & IFF_PROMISC) {
3372 qede_config_accept_any_vlan(edev, true);
3373 } else if (!edev->non_configured_vlans) {
3374 /* It's possible that accept_any_vlan mode is set due to a
3375 * previous setting of IFF_PROMISC. If vlan credits are
3376 * sufficient, disable accept_any_vlan.
3377 */
3378 qede_config_accept_any_vlan(edev, false);
3379 }
3380
0d8e0aa0
SK		 3381 rx_mode.filter.accept_flags = accept_flags;
3382 edev->ops->filter_config(edev->cdev, &rx_mode);
3383out:
3384 kfree(uc_macs);
3385}
Linux kernel - Deliverables
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