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net: rtnetlink: Don't export empty RTAX_FEATURES
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
f9f082a9 27#include <net/udp_tunnel.h>
e712d52b
YM		 28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
5abd7e92
YM		 42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 44
5abd7e92 45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
0e7441d7 56#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
fefb0202 61#define CHIP_NUM_57980S_IOV 0x1664
e712d52b
YM		 62
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
fefb0202 70#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
e712d52b
YM		 71#endif
72
fefb0202
YM		 73enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
e712d52b 78static const struct pci_device_id qede_pci_tbl[] = {
fefb0202
YM		 79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
14b84e86 85#ifdef CONFIG_QED_SRIOV
fefb0202 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
14b84e86 87#endif
e712d52b
YM		 88 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 98static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
a2ec6172 100static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b 101
fefb0202 102#ifdef CONFIG_QED_SRIOV
08feecd7
YM		 103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
104{
105 struct qede_dev *edev = netdev_priv(ndev);
106
107 if (vlan > 4095) {
108 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
109 return -EINVAL;
110 }
111
112 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
113 vlan, vf);
114
115 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
116}
117
eff16960
YM		 118static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
119{
120 struct qede_dev *edev = netdev_priv(ndev);
121
122 DP_VERBOSE(edev, QED_MSG_IOV,
123 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
124 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
125
126 if (!is_valid_ether_addr(mac)) {
127 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
128 return -EINVAL;
129 }
130
131 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
132}
133
fefb0202
YM		 134static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
135{
136 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
831bfb0e
YM		 137 struct qed_dev_info *qed_info = &edev->dev_info.common;
138 int rc;
fefb0202
YM		 139
140 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
141
831bfb0e
YM		 142 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
143
144 /* Enable/Disable Tx switching for PF */
145 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
146 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
147 struct qed_update_vport_params params;
148
149 memset(&params, 0, sizeof(params));
150 params.vport_id = 0;
151 params.update_tx_switching_flg = 1;
152 params.tx_switching_flg = num_vfs_param ? 1 : 0;
153 edev->ops->vport_update(edev->cdev, &params);
154 }
155
156 return rc;
fefb0202
YM		 157}
158#endif
159
e712d52b
YM		 160static struct pci_driver qede_pci_driver = {
161 .name = "qede",
162 .id_table = qede_pci_tbl,
163 .probe = qede_probe,
164 .remove = qede_remove,
fefb0202
YM		 165#ifdef CONFIG_QED_SRIOV
166 .sriov_configure = qede_sriov_configure,
167#endif
e712d52b
YM		 168};
169
eff16960
YM		 170static void qede_force_mac(void *dev, u8 *mac)
171{
172 struct qede_dev *edev = dev;
173
174 ether_addr_copy(edev->ndev->dev_addr, mac);
175 ether_addr_copy(edev->primary_mac, mac);
176}
177
a2ec6172
SK		 178static struct qed_eth_cb_ops qede_ll_ops = {
179 {
180 .link_update = qede_link_update,
181 },
eff16960 182 .force_mac = qede_force_mac,
a2ec6172
SK		 183};
184
2950219d
YM		 185static int qede_netdev_event(struct notifier_block *this, unsigned long event,
186 void *ptr)
187{
188 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
189 struct ethtool_drvinfo drvinfo;
190 struct qede_dev *edev;
191
192 /* Currently only support name change */
193 if (event != NETDEV_CHANGENAME)
194 goto done;
195
196 /* Check whether this is a qede device */
197 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
198 goto done;
199
200 memset(&drvinfo, 0, sizeof(drvinfo));
201 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
202 if (strcmp(drvinfo.driver, "qede"))
203 goto done;
204 edev = netdev_priv(ndev);
205
206 /* Notify qed of the name change */
207 if (!edev->ops || !edev->ops->common)
208 goto done;
209 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
210 "qede");
211
212done:
213 return NOTIFY_DONE;
214}
215
216static struct notifier_block qede_netdev_notifier = {
217 .notifier_call = qede_netdev_event,
218};
219
e712d52b
YM		 220static
221int __init qede_init(void)
222{
223 int ret;
e712d52b 224
525ef5c0 225 pr_info("qede_init: %s\n", version);
e712d52b 226
95114344 227 qed_ops = qed_get_eth_ops();
e712d52b
YM		 228 if (!qed_ops) {
229 pr_notice("Failed to get qed ethtool operations\n");
230 return -EINVAL;
231 }
232
2950219d
YM		 233 /* Must register notifier before pci ops, since we might miss
234 * interface rename after pci probe and netdev registeration.
235 */
236 ret = register_netdevice_notifier(&qede_netdev_notifier);
237 if (ret) {
238 pr_notice("Failed to register netdevice_notifier\n");
239 qed_put_eth_ops();
240 return -EINVAL;
241 }
242
e712d52b
YM		 243 ret = pci_register_driver(&qede_pci_driver);
244 if (ret) {
245 pr_notice("Failed to register driver\n");
2950219d 246 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 247 qed_put_eth_ops();
248 return -EINVAL;
249 }
250
251 return 0;
252}
253
254static void __exit qede_cleanup(void)
255{
525ef5c0
YM		 256 if (debug & QED_LOG_INFO_MASK)
257 pr_info("qede_cleanup called\n");
e712d52b 258
2950219d 259 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 260 pci_unregister_driver(&qede_pci_driver);
261 qed_put_eth_ops();
262}
263
264module_init(qede_init);
265module_exit(qede_cleanup);
266
2950219d
YM		 267/* -------------------------------------------------------------------------
268 * START OF FAST-PATH
269 * -------------------------------------------------------------------------
270 */
271
272/* Unmap the data and free skb */
273static int qede_free_tx_pkt(struct qede_dev *edev,
1a635e48 274 struct qede_tx_queue *txq, int *len)
2950219d
YM		 275{
276 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
277 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
278 struct eth_tx_1st_bd *first_bd;
279 struct eth_tx_bd *tx_data_bd;
280 int bds_consumed = 0;
281 int nbds;
282 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
283 int i, split_bd_len = 0;
284
285 if (unlikely(!skb)) {
286 DP_ERR(edev,
287 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
288 idx, txq->sw_tx_cons, txq->sw_tx_prod);
289 return -1;
290 }
291
292 *len = skb->len;
293
294 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
295
296 bds_consumed++;
297
298 nbds = first_bd->data.nbds;
299
300 if (data_split) {
301 struct eth_tx_bd *split = (struct eth_tx_bd *)
302 qed_chain_consume(&txq->tx_pbl);
303 split_bd_len = BD_UNMAP_LEN(split);
304 bds_consumed++;
305 }
306 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
307 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
308
309 /* Unmap the data of the skb frags */
310 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
311 tx_data_bd = (struct eth_tx_bd *)
312 qed_chain_consume(&txq->tx_pbl);
313 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
314 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
315 }
316
317 while (bds_consumed++ < nbds)
318 qed_chain_consume(&txq->tx_pbl);
319
320 /* Free skb */
321 dev_kfree_skb_any(skb);
322 txq->sw_tx_ring[idx].skb = NULL;
323 txq->sw_tx_ring[idx].flags = 0;
324
325 return 0;
326}
327
328/* Unmap the data and free skb when mapping failed during start_xmit */
329static void qede_free_failed_tx_pkt(struct qede_dev *edev,
330 struct qede_tx_queue *txq,
331 struct eth_tx_1st_bd *first_bd,
1a635e48 332 int nbd, bool data_split)
2950219d
YM		 333{
334 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
335 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
336 struct eth_tx_bd *tx_data_bd;
337 int i, split_bd_len = 0;
338
339 /* Return prod to its position before this skb was handled */
340 qed_chain_set_prod(&txq->tx_pbl,
1a635e48 341 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
2950219d
YM		 342
343 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
344
345 if (data_split) {
346 struct eth_tx_bd *split = (struct eth_tx_bd *)
347 qed_chain_produce(&txq->tx_pbl);
348 split_bd_len = BD_UNMAP_LEN(split);
349 nbd--;
350 }
351
352 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
353 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
354
355 /* Unmap the data of the skb frags */
356 for (i = 0; i < nbd; i++) {
357 tx_data_bd = (struct eth_tx_bd *)
358 qed_chain_produce(&txq->tx_pbl);
359 if (tx_data_bd->nbytes)
360 dma_unmap_page(&edev->pdev->dev,
361 BD_UNMAP_ADDR(tx_data_bd),
362 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
363 }
364
365 /* Return again prod to its position before this skb was handled */
366 qed_chain_set_prod(&txq->tx_pbl,
1a635e48 367 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
2950219d
YM		 368
369 /* Free skb */
370 dev_kfree_skb_any(skb);
371 txq->sw_tx_ring[idx].skb = NULL;
372 txq->sw_tx_ring[idx].flags = 0;
373}
374
375static u32 qede_xmit_type(struct qede_dev *edev,
1a635e48 376 struct sk_buff *skb, int *ipv6_ext)
2950219d
YM		 377{
378 u32 rc = XMIT_L4_CSUM;
379 __be16 l3_proto;
380
381 if (skb->ip_summed != CHECKSUM_PARTIAL)
382 return XMIT_PLAIN;
383
384 l3_proto = vlan_get_protocol(skb);
385 if (l3_proto == htons(ETH_P_IPV6) &&
386 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
387 *ipv6_ext = 1;
388
14db81de
MC		 389 if (skb->encapsulation)
390 rc |= XMIT_ENC;
391
2950219d
YM		 392 if (skb_is_gso(skb))
393 rc |= XMIT_LSO;
394
395 return rc;
396}
397
398static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
399 struct eth_tx_2nd_bd *second_bd,
400 struct eth_tx_3rd_bd *third_bd)
401{
402 u8 l4_proto;
fc48b7a6 403 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 404
fc48b7a6 405 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 406
fc48b7a6 407 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 408 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
409 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
410
fc48b7a6 411 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 412 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
413
414 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
415 l4_proto = ipv6_hdr(skb)->nexthdr;
416 else
417 l4_proto = ip_hdr(skb)->protocol;
418
419 if (l4_proto == IPPROTO_UDP)
fc48b7a6 420 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 421
fc48b7a6 422 if (third_bd)
2950219d 423 third_bd->data.bitfields |=
fc48b7a6
YM		 424 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
425 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
426 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 427
fc48b7a6 428 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 429 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
430}
431
432static int map_frag_to_bd(struct qede_dev *edev,
1a635e48 433 skb_frag_t *frag, struct eth_tx_bd *bd)
2950219d
YM		 434{
435 dma_addr_t mapping;
436
437 /* Map skb non-linear frag data for DMA */
438 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
1a635e48 439 skb_frag_size(frag), DMA_TO_DEVICE);
2950219d
YM		 440 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
441 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
442 return -ENOMEM;
443 }
444
445 /* Setup the data pointer of the frag data */
446 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
447
448 return 0;
449}
450
14db81de
MC		 451static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
452{
453 if (is_encap_pkt)
454 return (skb_inner_transport_header(skb) +
455 inner_tcp_hdrlen(skb) - skb->data);
456 else
457 return (skb_transport_header(skb) +
458 tcp_hdrlen(skb) - skb->data);
459}
460
b1199b10
YM		 461/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
462#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
463static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
464 u8 xmit_type)
465{
466 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
467
468 if (xmit_type & XMIT_LSO) {
469 int hlen;
470
14db81de 471 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
b1199b10
YM		 472
473 /* linear payload would require its own BD */
474 if (skb_headlen(skb) > hlen)
475 allowed_frags--;
476 }
477
478 return (skb_shinfo(skb)->nr_frags > allowed_frags);
479}
480#endif
481
312e0676
MC		 482static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
483{
484 /* wmb makes sure that the BDs data is updated before updating the
485 * producer, otherwise FW may read old data from the BDs.
486 */
487 wmb();
488 barrier();
489 writel(txq->tx_db.raw, txq->doorbell_addr);
490
491 /* mmiowb is needed to synchronize doorbell writes from more than one
492 * processor. It guarantees that the write arrives to the device before
493 * the queue lock is released and another start_xmit is called (possibly
494 * on another CPU). Without this barrier, the next doorbell can bypass
495 * this doorbell. This is applicable to IA64/Altix systems.
496 */
497 mmiowb();
498}
499
2950219d 500/* Main transmit function */
1a635e48
YM		 501static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
502 struct net_device *ndev)
2950219d
YM		 503{
504 struct qede_dev *edev = netdev_priv(ndev);
505 struct netdev_queue *netdev_txq;
506 struct qede_tx_queue *txq;
507 struct eth_tx_1st_bd *first_bd;
508 struct eth_tx_2nd_bd *second_bd = NULL;
509 struct eth_tx_3rd_bd *third_bd = NULL;
510 struct eth_tx_bd *tx_data_bd = NULL;
511 u16 txq_index;
512 u8 nbd = 0;
513 dma_addr_t mapping;
514 int rc, frag_idx = 0, ipv6_ext = 0;
515 u8 xmit_type;
516 u16 idx;
517 u16 hlen;
810810ff 518 bool data_split = false;
2950219d
YM		 519
520 /* Get tx-queue context and netdev index */
521 txq_index = skb_get_queue_mapping(skb);
522 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
523 txq = QEDE_TX_QUEUE(edev, txq_index);
524 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
525
1a635e48 526 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
2950219d
YM		 527
528 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
529
b1199b10
YM		 530#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
531 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
532 if (skb_linearize(skb)) {
533 DP_NOTICE(edev,
534 "SKB linearization failed - silently dropping this SKB\n");
535 dev_kfree_skb_any(skb);
536 return NETDEV_TX_OK;
537 }
538 }
539#endif
540
2950219d
YM		 541 /* Fill the entry in the SW ring and the BDs in the FW ring */
542 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
543 txq->sw_tx_ring[idx].skb = skb;
544 first_bd = (struct eth_tx_1st_bd *)
545 qed_chain_produce(&txq->tx_pbl);
546 memset(first_bd, 0, sizeof(*first_bd));
547 first_bd->data.bd_flags.bitfields =
548 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
549
550 /* Map skb linear data for DMA and set in the first BD */
551 mapping = dma_map_single(&edev->pdev->dev, skb->data,
552 skb_headlen(skb), DMA_TO_DEVICE);
553 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
554 DP_NOTICE(edev, "SKB mapping failed\n");
555 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
312e0676 556 qede_update_tx_producer(txq);
2950219d
YM		 557 return NETDEV_TX_OK;
558 }
559 nbd++;
560 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
561
562 /* In case there is IPv6 with extension headers or LSO we need 2nd and
563 * 3rd BDs.
564 */
565 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
566 second_bd = (struct eth_tx_2nd_bd *)
567 qed_chain_produce(&txq->tx_pbl);
568 memset(second_bd, 0, sizeof(*second_bd));
569
570 nbd++;
571 third_bd = (struct eth_tx_3rd_bd *)
572 qed_chain_produce(&txq->tx_pbl);
573 memset(third_bd, 0, sizeof(*third_bd));
574
575 nbd++;
576 /* We need to fill in additional data in second_bd... */
577 tx_data_bd = (struct eth_tx_bd *)second_bd;
578 }
579
580 if (skb_vlan_tag_present(skb)) {
581 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
582 first_bd->data.bd_flags.bitfields |=
583 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
584 }
585
586 /* Fill the parsing flags & params according to the requested offload */
587 if (xmit_type & XMIT_L4_CSUM) {
588 /* We don't re-calculate IP checksum as it is already done by
589 * the upper stack
590 */
591 first_bd->data.bd_flags.bitfields |=
592 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
593
14db81de
MC		 594 if (xmit_type & XMIT_ENC) {
595 first_bd->data.bd_flags.bitfields |=
596 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
351a4ded
YM		 597 first_bd->data.bitfields |=
598 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
14db81de 599 }
fc48b7a6 600
d8c2c7e3
YM		 601 /* Legacy FW had flipped behavior in regard to this bit -
602 * I.e., needed to set to prevent FW from touching encapsulated
603 * packets when it didn't need to.
604 */
605 if (unlikely(txq->is_legacy))
606 first_bd->data.bitfields ^=
607 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
608
2950219d
YM		 609 /* If the packet is IPv6 with extension header, indicate that
610 * to FW and pass few params, since the device cracker doesn't
611 * support parsing IPv6 with extension header/s.
612 */
613 if (unlikely(ipv6_ext))
614 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
615 }
616
617 if (xmit_type & XMIT_LSO) {
618 first_bd->data.bd_flags.bitfields |=
619 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
620 third_bd->data.lso_mss =
621 cpu_to_le16(skb_shinfo(skb)->gso_size);
622
14db81de
MC		 623 if (unlikely(xmit_type & XMIT_ENC)) {
624 first_bd->data.bd_flags.bitfields |=
625 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
626 hlen = qede_get_skb_hlen(skb, true);
627 } else {
628 first_bd->data.bd_flags.bitfields |=
629 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
630 hlen = qede_get_skb_hlen(skb, false);
631 }
2950219d
YM		 632
633 /* @@@TBD - if will not be removed need to check */
634 third_bd->data.bitfields |=
fc48b7a6 635 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 636
637 /* Make life easier for FW guys who can't deal with header and
638 * data on same BD. If we need to split, use the second bd...
639 */
640 if (unlikely(skb_headlen(skb) > hlen)) {
641 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
642 "TSO split header size is %d (%x:%x)\n",
643 first_bd->nbytes, first_bd->addr.hi,
644 first_bd->addr.lo);
645
646 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
647 le32_to_cpu(first_bd->addr.lo)) +
648 hlen;
649
650 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
651 le16_to_cpu(first_bd->nbytes) -
652 hlen);
653
654 /* this marks the BD as one that has no
655 * individual mapping
656 */
657 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
658
659 first_bd->nbytes = cpu_to_le16(hlen);
660
661 tx_data_bd = (struct eth_tx_bd *)third_bd;
662 data_split = true;
663 }
351a4ded
YM		 664 } else {
665 first_bd->data.bitfields |=
666 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
667 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
2950219d
YM		 668 }
669
670 /* Handle fragmented skb */
671 /* special handle for frags inside 2nd and 3rd bds.. */
672 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
673 rc = map_frag_to_bd(edev,
674 &skb_shinfo(skb)->frags[frag_idx],
675 tx_data_bd);
676 if (rc) {
677 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
678 data_split);
312e0676 679 qede_update_tx_producer(txq);
2950219d
YM		 680 return NETDEV_TX_OK;
681 }
682
683 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
684 tx_data_bd = (struct eth_tx_bd *)third_bd;
685 else
686 tx_data_bd = NULL;
687
688 frag_idx++;
689 }
690
691 /* map last frags into 4th, 5th .... */
692 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
693 tx_data_bd = (struct eth_tx_bd *)
694 qed_chain_produce(&txq->tx_pbl);
695
696 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
697
698 rc = map_frag_to_bd(edev,
699 &skb_shinfo(skb)->frags[frag_idx],
700 tx_data_bd);
701 if (rc) {
702 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
703 data_split);
312e0676 704 qede_update_tx_producer(txq);
2950219d
YM		 705 return NETDEV_TX_OK;
706 }
707 }
708
709 /* update the first BD with the actual num BDs */
710 first_bd->data.nbds = nbd;
711
712 netdev_tx_sent_queue(netdev_txq, skb->len);
713
714 skb_tx_timestamp(skb);
715
716 /* Advance packet producer only before sending the packet since mapping
717 * of pages may fail.
718 */
719 txq->sw_tx_prod++;
720
721 /* 'next page' entries are counted in the producer value */
722 txq->tx_db.data.bd_prod =
723 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
724
312e0676
MC		 725 if (!skb->xmit_more || netif_tx_queue_stopped(netdev_txq))
726 qede_update_tx_producer(txq);
2950219d
YM		 727
728 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
729 < (MAX_SKB_FRAGS + 1))) {
730 netif_tx_stop_queue(netdev_txq);
68db9ec2 731 txq->stopped_cnt++;
2950219d
YM		 732 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
733 "Stop queue was called\n");
734 /* paired memory barrier is in qede_tx_int(), we have to keep
735 * ordering of set_bit() in netif_tx_stop_queue() and read of
736 * fp->bd_tx_cons
737 */
738 smp_mb();
739
740 if (qed_chain_get_elem_left(&txq->tx_pbl)
741 >= (MAX_SKB_FRAGS + 1) &&
742 (edev->state == QEDE_STATE_OPEN)) {
743 netif_tx_wake_queue(netdev_txq);
744 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
745 "Wake queue was called\n");
746 }
747 }
748
749 return NETDEV_TX_OK;
750}
751
16f46bf0 752int qede_txq_has_work(struct qede_tx_queue *txq)
2950219d
YM		 753{
754 u16 hw_bd_cons;
755
756 /* Tell compiler that consumer and producer can change */
757 barrier();
758 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
759 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
760 return 0;
761
762 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
763}
764
1a635e48 765static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
2950219d
YM		 766{
767 struct netdev_queue *netdev_txq;
768 u16 hw_bd_cons;
769 unsigned int pkts_compl = 0, bytes_compl = 0;
770 int rc;
771
772 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
773
774 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
775 barrier();
776
777 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
778 int len = 0;
779
780 rc = qede_free_tx_pkt(edev, txq, &len);
781 if (rc) {
782 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
783 hw_bd_cons,
784 qed_chain_get_cons_idx(&txq->tx_pbl));
785 break;
786 }
787
788 bytes_compl += len;
789 pkts_compl++;
790 txq->sw_tx_cons++;
68db9ec2 791 txq->xmit_pkts++;
2950219d
YM		 792 }
793
794 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
795
796 /* Need to make the tx_bd_cons update visible to start_xmit()
797 * before checking for netif_tx_queue_stopped(). Without the
798 * memory barrier, there is a small possibility that
799 * start_xmit() will miss it and cause the queue to be stopped
800 * forever.
801 * On the other hand we need an rmb() here to ensure the proper
802 * ordering of bit testing in the following
803 * netif_tx_queue_stopped(txq) call.
804 */
805 smp_mb();
806
807 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
808 /* Taking tx_lock is needed to prevent reenabling the queue
809 * while it's empty. This could have happen if rx_action() gets
810 * suspended in qede_tx_int() after the condition before
811 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
812 *
813 * stops the queue->sees fresh tx_bd_cons->releases the queue->
814 * sends some packets consuming the whole queue again->
815 * stops the queue
816 */
817
818 __netif_tx_lock(netdev_txq, smp_processor_id());
819
820 if ((netif_tx_queue_stopped(netdev_txq)) &&
821 (edev->state == QEDE_STATE_OPEN) &&
822 (qed_chain_get_elem_left(&txq->tx_pbl)
823 >= (MAX_SKB_FRAGS + 1))) {
824 netif_tx_wake_queue(netdev_txq);
825 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
826 "Wake queue was called\n");
827 }
828
829 __netif_tx_unlock(netdev_txq);
830 }
831
832 return 0;
833}
834
16f46bf0 835bool qede_has_rx_work(struct qede_rx_queue *rxq)
2950219d
YM		 836{
837 u16 hw_comp_cons, sw_comp_cons;
838
839 /* Tell compiler that status block fields can change */
840 barrier();
841
842 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
843 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
844
845 return hw_comp_cons != sw_comp_cons;
846}
847
848static bool qede_has_tx_work(struct qede_fastpath *fp)
849{
850 u8 tc;
851
852 for (tc = 0; tc < fp->edev->num_tc; tc++)
853 if (qede_txq_has_work(&fp->txqs[tc]))
854 return true;
855 return false;
856}
857
f86af2df
MC		 858static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
859{
860 qed_chain_consume(&rxq->rx_bd_ring);
861 rxq->sw_rx_cons++;
862}
863
fc48b7a6
YM		 864/* This function reuses the buffer(from an offset) from
865 * consumer index to producer index in the bd ring
2950219d 866 */
fc48b7a6
YM		 867static inline void qede_reuse_page(struct qede_dev *edev,
868 struct qede_rx_queue *rxq,
869 struct sw_rx_data *curr_cons)
2950219d 870{
2950219d 871 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 872 struct sw_rx_data *curr_prod;
873 dma_addr_t new_mapping;
2950219d 874
fc48b7a6
YM		 875 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
876 *curr_prod = *curr_cons;
2950219d 877
fc48b7a6
YM		 878 new_mapping = curr_prod->mapping + curr_prod->page_offset;
879
880 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
881 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 882
2950219d 883 rxq->sw_rx_prod++;
fc48b7a6
YM		 884 curr_cons->data = NULL;
885}
886
f86af2df
MC		 887/* In case of allocation failures reuse buffers
888 * from consumer index to produce buffers for firmware
889 */
16f46bf0
SRK		 890void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
891 struct qede_dev *edev, u8 count)
f86af2df
MC		 892{
893 struct sw_rx_data *curr_cons;
894
895 for (; count > 0; count--) {
896 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
897 qede_reuse_page(edev, rxq, curr_cons);
898 qede_rx_bd_ring_consume(rxq);
899 }
900}
901
fc48b7a6
YM		 902static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
903 struct qede_rx_queue *rxq,
904 struct sw_rx_data *curr_cons)
905{
906 /* Move to the next segment in the page */
907 curr_cons->page_offset += rxq->rx_buf_seg_size;
908
909 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 910 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
911 /* Since we failed to allocate new buffer
912 * current buffer can be used again.
913 */
914 curr_cons->page_offset -= rxq->rx_buf_seg_size;
915
fc48b7a6 916 return -ENOMEM;
f86af2df 917 }
fc48b7a6
YM		 918
919 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
920 PAGE_SIZE, DMA_FROM_DEVICE);
921 } else {
922 /* Increment refcount of the page as we don't want
923 * network stack to take the ownership of the page
924 * which can be recycled multiple times by the driver.
925 */
6d061f9f 926 page_ref_inc(curr_cons->data);
fc48b7a6
YM		 927 qede_reuse_page(edev, rxq, curr_cons);
928 }
929
930 return 0;
2950219d
YM		 931}
932
933static inline void qede_update_rx_prod(struct qede_dev *edev,
934 struct qede_rx_queue *rxq)
935{
936 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
937 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
938 struct eth_rx_prod_data rx_prods = {0};
939
940 /* Update producers */
941 rx_prods.bd_prod = cpu_to_le16(bd_prod);
942 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
943
944 /* Make sure that the BD and SGE data is updated before updating the
945 * producers since FW might read the BD/SGE right after the producer
946 * is updated.
947 */
948 wmb();
949
950 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
951 (u32 *)&rx_prods);
952
953 /* mmiowb is needed to synchronize doorbell writes from more than one
954 * processor. It guarantees that the write arrives to the device before
955 * the napi lock is released and another qede_poll is called (possibly
956 * on another CPU). Without this barrier, the next doorbell can bypass
957 * this doorbell. This is applicable to IA64/Altix systems.
958 */
959 mmiowb();
960}
961
962static u32 qede_get_rxhash(struct qede_dev *edev,
963 u8 bitfields,
1a635e48 964 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
2950219d
YM		 965{
966 enum rss_hash_type htype;
967
968 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
969
970 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
971 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
972 (htype == RSS_HASH_TYPE_IPV6)) ?
973 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
974 return le32_to_cpu(rss_hash);
975 }
976 *rxhash_type = PKT_HASH_TYPE_NONE;
977 return 0;
978}
979
980static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
981{
982 skb_checksum_none_assert(skb);
983
984 if (csum_flag & QEDE_CSUM_UNNECESSARY)
985 skb->ip_summed = CHECKSUM_UNNECESSARY;
14db81de
MC		 986
987 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
988 skb->csum_level = 1;
2950219d
YM		 989}
990
991static inline void qede_skb_receive(struct qede_dev *edev,
992 struct qede_fastpath *fp,
1a635e48 993 struct sk_buff *skb, u16 vlan_tag)
2950219d
YM		 994{
995 if (vlan_tag)
1a635e48 996 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
2950219d
YM		 997
998 napi_gro_receive(&fp->napi, skb);
999}
1000
55482edc
MC		 1001static void qede_set_gro_params(struct qede_dev *edev,
1002 struct sk_buff *skb,
1003 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1004{
1005 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1006
1007 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1008 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1009 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1010 else
1011 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1012
1013 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1014 cqe->header_len;
1015}
1016
1017static int qede_fill_frag_skb(struct qede_dev *edev,
1018 struct qede_rx_queue *rxq,
1a635e48 1019 u8 tpa_agg_index, u16 len_on_bd)
55482edc
MC		 1020{
1021 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1022 NUM_RX_BDS_MAX];
1023 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1024 struct sk_buff *skb = tpa_info->skb;
1025
1026 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1027 goto out;
1028
1029 /* Add one frag and update the appropriate fields in the skb */
1030 skb_fill_page_desc(skb, tpa_info->frag_id++,
1031 current_bd->data, current_bd->page_offset,
1032 len_on_bd);
1033
1034 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 1035 /* Incr page ref count to reuse on allocation failure
1036 * so that it doesn't get freed while freeing SKB.
1037 */
0139aa7b 1038 page_ref_inc(current_bd->data);
55482edc
MC		 1039 goto out;
1040 }
1041
1042 qed_chain_consume(&rxq->rx_bd_ring);
1043 rxq->sw_rx_cons++;
1044
1045 skb->data_len += len_on_bd;
1046 skb->truesize += rxq->rx_buf_seg_size;
1047 skb->len += len_on_bd;
1048
1049 return 0;
1050
1051out:
f86af2df
MC		 1052 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1053 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 1054 return -ENOMEM;
1055}
1056
1057static void qede_tpa_start(struct qede_dev *edev,
1058 struct qede_rx_queue *rxq,
1059 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1060{
1061 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1062 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1063 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1064 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1065 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1066 struct sw_rx_data *sw_rx_data_cons;
1067 struct sw_rx_data *sw_rx_data_prod;
1068 enum pkt_hash_types rxhash_type;
1069 u32 rxhash;
1070
1071 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1072 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1073
1074 /* Use pre-allocated replacement buffer - we can't release the agg.
1075 * start until its over and we don't want to risk allocation failing
1076 * here, so re-allocate when aggregation will be over.
1077 */
09ec8e7f 1078 sw_rx_data_prod->mapping = replace_buf->mapping;
55482edc
MC		 1079
1080 sw_rx_data_prod->data = replace_buf->data;
1081 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1082 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1083 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1084
1085 rxq->sw_rx_prod++;
1086
1087 /* move partial skb from cons to pool (don't unmap yet)
1088 * save mapping, incase we drop the packet later on.
1089 */
1090 tpa_info->start_buf = *sw_rx_data_cons;
1091 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1092 le32_to_cpu(rx_bd_cons->addr.lo));
1093
1094 tpa_info->start_buf_mapping = mapping;
1095 rxq->sw_rx_cons++;
1096
1097 /* set tpa state to start only if we are able to allocate skb
1098 * for this aggregation, otherwise mark as error and aggregation will
1099 * be dropped
1100 */
1101 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1102 le16_to_cpu(cqe->len_on_first_bd));
1103 if (unlikely(!tpa_info->skb)) {
f86af2df 1104 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1105 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1106 goto cons_buf;
55482edc
MC		 1107 }
1108
1109 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1110 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1111
1112 /* Start filling in the aggregation info */
1113 tpa_info->frag_id = 0;
1114 tpa_info->agg_state = QEDE_AGG_STATE_START;
1115
1116 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1117 cqe->rss_hash, &rxhash_type);
1118 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1119 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1120 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1121 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1122 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1123 else
1124 tpa_info->vlan_tag = 0;
1125
1126 /* This is needed in order to enable forwarding support */
1127 qede_set_gro_params(edev, tpa_info->skb, cqe);
1128
f86af2df 1129cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1130 if (likely(cqe->ext_bd_len_list[0]))
1131 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1132 le16_to_cpu(cqe->ext_bd_len_list[0]));
1133
1134 if (unlikely(cqe->ext_bd_len_list[1])) {
1135 DP_ERR(edev,
1136 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1137 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1138 }
1139}
1140
88f09bd5 1141#ifdef CONFIG_INET
55482edc
MC		 1142static void qede_gro_ip_csum(struct sk_buff *skb)
1143{
1144 const struct iphdr *iph = ip_hdr(skb);
1145 struct tcphdr *th;
1146
55482edc
MC		 1147 skb_set_transport_header(skb, sizeof(struct iphdr));
1148 th = tcp_hdr(skb);
1149
1150 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1151 iph->saddr, iph->daddr, 0);
1152
1153 tcp_gro_complete(skb);
1154}
1155
1156static void qede_gro_ipv6_csum(struct sk_buff *skb)
1157{
1158 struct ipv6hdr *iph = ipv6_hdr(skb);
1159 struct tcphdr *th;
1160
55482edc
MC		 1161 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1162 th = tcp_hdr(skb);
1163
1164 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1165 &iph->saddr, &iph->daddr, 0);
1166 tcp_gro_complete(skb);
1167}
88f09bd5 1168#endif
55482edc
MC		 1169
1170static void qede_gro_receive(struct qede_dev *edev,
1171 struct qede_fastpath *fp,
1172 struct sk_buff *skb,
1173 u16 vlan_tag)
1174{
ee2fa8e6
MC		 1175 /* FW can send a single MTU sized packet from gro flow
1176 * due to aggregation timeout/last segment etc. which
1177 * is not expected to be a gro packet. If a skb has zero
1178 * frags then simply push it in the stack as non gso skb.
1179 */
1180 if (unlikely(!skb->data_len)) {
1181 skb_shinfo(skb)->gso_type = 0;
1182 skb_shinfo(skb)->gso_size = 0;
1183 goto send_skb;
1184 }
1185
88f09bd5 1186#ifdef CONFIG_INET
55482edc 1187 if (skb_shinfo(skb)->gso_size) {
aad94c04
MC		 1188 skb_set_network_header(skb, 0);
1189
55482edc
MC		 1190 switch (skb->protocol) {
1191 case htons(ETH_P_IP):
1192 qede_gro_ip_csum(skb);
1193 break;
1194 case htons(ETH_P_IPV6):
1195 qede_gro_ipv6_csum(skb);
1196 break;
1197 default:
1198 DP_ERR(edev,
1199 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1200 ntohs(skb->protocol));
1201 }
1202 }
88f09bd5 1203#endif
ee2fa8e6
MC		 1204
1205send_skb:
55482edc
MC		 1206 skb_record_rx_queue(skb, fp->rss_id);
1207 qede_skb_receive(edev, fp, skb, vlan_tag);
1208}
1209
1210static inline void qede_tpa_cont(struct qede_dev *edev,
1211 struct qede_rx_queue *rxq,
1212 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1213{
1214 int i;
1215
1216 for (i = 0; cqe->len_list[i]; i++)
1217 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1218 le16_to_cpu(cqe->len_list[i]));
1219
1220 if (unlikely(i > 1))
1221 DP_ERR(edev,
1222 "Strange - TPA cont with more than a single len_list entry\n");
1223}
1224
1225static void qede_tpa_end(struct qede_dev *edev,
1226 struct qede_fastpath *fp,
1227 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1228{
1229 struct qede_rx_queue *rxq = fp->rxq;
1230 struct qede_agg_info *tpa_info;
1231 struct sk_buff *skb;
1232 int i;
1233
1234 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1235 skb = tpa_info->skb;
1236
1237 for (i = 0; cqe->len_list[i]; i++)
1238 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1239 le16_to_cpu(cqe->len_list[i]));
1240 if (unlikely(i > 1))
1241 DP_ERR(edev,
1242 "Strange - TPA emd with more than a single len_list entry\n");
1243
1244 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1245 goto err;
1246
1247 /* Sanity */
1248 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1249 DP_ERR(edev,
1250 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1251 cqe->num_of_bds, tpa_info->frag_id);
1252 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1253 DP_ERR(edev,
1254 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1255 le16_to_cpu(cqe->total_packet_len), skb->len);
1256
1257 memcpy(skb->data,
1258 page_address(tpa_info->start_buf.data) +
1259 tpa_info->start_cqe.placement_offset +
1260 tpa_info->start_buf.page_offset,
1261 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1262
1263 /* Recycle [mapped] start buffer for the next replacement */
1264 tpa_info->replace_buf = tpa_info->start_buf;
1265 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1266
1267 /* Finalize the SKB */
1268 skb->protocol = eth_type_trans(skb, edev->ndev);
1269 skb->ip_summed = CHECKSUM_UNNECESSARY;
1270
1271 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1272 * to skb_shinfo(skb)->gso_segs
1273 */
1274 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1275
1276 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1277
1278 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1279
1280 return;
1281err:
1282 /* The BD starting the aggregation is still mapped; Re-use it for
1283 * future aggregations [as replacement buffer]
1284 */
1285 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1286 sizeof(struct sw_rx_data));
1287 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1288 tpa_info->start_buf.data = NULL;
1289 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1290 dev_kfree_skb_any(tpa_info->skb);
1291 tpa_info->skb = NULL;
1292}
1293
14db81de
MC		 1294static bool qede_tunn_exist(u16 flag)
1295{
1296 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1297 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1298}
1299
1300static u8 qede_check_tunn_csum(u16 flag)
1301{
1302 u16 csum_flag = 0;
1303 u8 tcsum = 0;
1304
1305 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1306 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1307 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1308 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1309
1310 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1311 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1312 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1313 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1314 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1315 }
1316
1317 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1318 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1319 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1320 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1321
1322 if (csum_flag & flag)
1323 return QEDE_CSUM_ERROR;
1324
1325 return QEDE_CSUM_UNNECESSARY | tcsum;
1326}
1327
1328static u8 qede_check_notunn_csum(u16 flag)
2950219d
YM		 1329{
1330 u16 csum_flag = 0;
1331 u8 csum = 0;
1332
14db81de
MC		 1333 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1334 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
2950219d
YM		 1335 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1336 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1337 csum = QEDE_CSUM_UNNECESSARY;
1338 }
1339
1340 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1341 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1342
1343 if (csum_flag & flag)
1344 return QEDE_CSUM_ERROR;
1345
1346 return csum;
1347}
1348
14db81de
MC		 1349static u8 qede_check_csum(u16 flag)
1350{
1351 if (!qede_tunn_exist(flag))
1352 return qede_check_notunn_csum(flag);
1353 else
1354 return qede_check_tunn_csum(flag);
1355}
1356
c72a6125
MC		 1357static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1358 u16 flag)
1359{
1360 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1361
1362 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1363 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1364 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1365 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1366 return true;
1367
1368 return false;
1369}
1370
2950219d
YM		 1371static int qede_rx_int(struct qede_fastpath *fp, int budget)
1372{
1373 struct qede_dev *edev = fp->edev;
1374 struct qede_rx_queue *rxq = fp->rxq;
1375
1376 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1377 int rx_pkt = 0;
1378 u8 csum_flag;
1379
1380 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1381 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1382
1383 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1384 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1385 * read before it is written by FW, then FW writes CQE and SB, and then
1386 * the CPU reads the hw_comp_cons, it will use an old CQE.
1387 */
1388 rmb();
1389
1390 /* Loop to complete all indicated BDs */
1391 while (sw_comp_cons != hw_comp_cons) {
1392 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1393 enum pkt_hash_types rxhash_type;
1394 enum eth_rx_cqe_type cqe_type;
1395 struct sw_rx_data *sw_rx_data;
1396 union eth_rx_cqe *cqe;
1397 struct sk_buff *skb;
fc48b7a6
YM		 1398 struct page *data;
1399 __le16 flags;
2950219d
YM		 1400 u16 len, pad;
1401 u32 rx_hash;
2950219d
YM		 1402
1403 /* Get the CQE from the completion ring */
1404 cqe = (union eth_rx_cqe *)
1405 qed_chain_consume(&rxq->rx_comp_ring);
1406 cqe_type = cqe->fast_path_regular.type;
1407
1408 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1409 edev->ops->eth_cqe_completion(
1410 edev->cdev, fp->rss_id,
1411 (struct eth_slow_path_rx_cqe *)cqe);
1412 goto next_cqe;
1413 }
1414
55482edc
MC		 1415 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1416 switch (cqe_type) {
1417 case ETH_RX_CQE_TYPE_TPA_START:
1418 qede_tpa_start(edev, rxq,
1419 &cqe->fast_path_tpa_start);
1420 goto next_cqe;
1421 case ETH_RX_CQE_TYPE_TPA_CONT:
1422 qede_tpa_cont(edev, rxq,
1423 &cqe->fast_path_tpa_cont);
1424 goto next_cqe;
1425 case ETH_RX_CQE_TYPE_TPA_END:
1426 qede_tpa_end(edev, fp,
1427 &cqe->fast_path_tpa_end);
1428 goto next_rx_only;
1429 default:
1430 break;
1431 }
1432 }
1433
2950219d
YM		 1434 /* Get the data from the SW ring */
1435 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1436 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1437 data = sw_rx_data->data;
1438
1439 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1440 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1441 pad = fp_cqe->placement_offset;
fc48b7a6 1442 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1443
fc48b7a6
YM		 1444 /* If this is an error packet then drop it */
1445 parse_flag = le16_to_cpu(flags);
2950219d 1446
fc48b7a6
YM		 1447 csum_flag = qede_check_csum(parse_flag);
1448 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
c72a6125
MC		 1449 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1450 parse_flag)) {
1451 rxq->rx_ip_frags++;
1452 goto alloc_skb;
1453 }
1454
fc48b7a6
YM		 1455 DP_NOTICE(edev,
1456 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1457 sw_comp_cons, parse_flag);
1458 rxq->rx_hw_errors++;
f86af2df
MC		 1459 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1460 goto next_cqe;
fc48b7a6 1461 }
2950219d 1462
c72a6125 1463alloc_skb:
fc48b7a6
YM		 1464 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1465 if (unlikely(!skb)) {
2950219d 1466 DP_NOTICE(edev,
525ef5c0 1467 "skb allocation failed, dropping incoming packet\n");
f86af2df 1468 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1469 rxq->rx_alloc_errors++;
f86af2df 1470 goto next_cqe;
fc48b7a6
YM		 1471 }
1472
1473 /* Copy data into SKB */
3d789994 1474 if (len + pad <= edev->rx_copybreak) {
fc48b7a6
YM		 1475 memcpy(skb_put(skb, len),
1476 page_address(data) + pad +
1477 sw_rx_data->page_offset, len);
1478 qede_reuse_page(edev, rxq, sw_rx_data);
1479 } else {
1480 struct skb_frag_struct *frag;
1481 unsigned int pull_len;
1482 unsigned char *va;
1483
1484 frag = &skb_shinfo(skb)->frags[0];
1485
1486 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1487 pad + sw_rx_data->page_offset,
1488 len, rxq->rx_buf_seg_size);
1489
1490 va = skb_frag_address(frag);
1491 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1492
1493 /* Align the pull_len to optimize memcpy */
1494 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1495
1496 skb_frag_size_sub(frag, pull_len);
1497 frag->page_offset += pull_len;
1498 skb->data_len -= pull_len;
1499 skb->tail += pull_len;
1500
1501 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1502 sw_rx_data))) {
1503 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1504 /* Incr page ref count to reuse on allocation
1505 * failure so that it doesn't get freed while
1506 * freeing SKB.
1507 */
1508
0139aa7b 1509 page_ref_inc(sw_rx_data->data);
fc48b7a6 1510 rxq->rx_alloc_errors++;
f86af2df
MC		 1511 qede_recycle_rx_bd_ring(rxq, edev,
1512 fp_cqe->bd_num);
1513 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1514 goto next_cqe;
1515 }
2950219d
YM		 1516 }
1517
f86af2df
MC		 1518 qede_rx_bd_ring_consume(rxq);
1519
fc48b7a6
YM		 1520 if (fp_cqe->bd_num != 1) {
1521 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1522 u8 num_frags;
1523
1524 pkt_len -= len;
1525
1526 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1527 num_frags--) {
1528 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1529 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1530 if (unlikely(!cur_size)) {
1531 DP_ERR(edev,
1532 "Still got %d BDs for mapping jumbo, but length became 0\n",
1533 num_frags);
1534 qede_recycle_rx_bd_ring(rxq, edev,
1535 num_frags);
1536 dev_kfree_skb_any(skb);
1537 goto next_cqe;
1538 }
fc48b7a6 1539
f86af2df
MC		 1540 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1541 qede_recycle_rx_bd_ring(rxq, edev,
1542 num_frags);
1543 dev_kfree_skb_any(skb);
fc48b7a6 1544 goto next_cqe;
f86af2df 1545 }
fc48b7a6 1546
fc48b7a6
YM		 1547 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1548 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1549 qede_rx_bd_ring_consume(rxq);
1550
fc48b7a6
YM		 1551 dma_unmap_page(&edev->pdev->dev,
1552 sw_rx_data->mapping,
1553 PAGE_SIZE, DMA_FROM_DEVICE);
1554
1555 skb_fill_page_desc(skb,
1556 skb_shinfo(skb)->nr_frags++,
1557 sw_rx_data->data, 0,
1558 cur_size);
1559
1560 skb->truesize += PAGE_SIZE;
1561 skb->data_len += cur_size;
1562 skb->len += cur_size;
1563 pkt_len -= cur_size;
1564 }
2950219d 1565
f86af2df 1566 if (unlikely(pkt_len))
fc48b7a6
YM		 1567 DP_ERR(edev,
1568 "Mapped all BDs of jumbo, but still have %d bytes\n",
1569 pkt_len);
1570 }
2950219d
YM		 1571
1572 skb->protocol = eth_type_trans(skb, edev->ndev);
1573
1574 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1a635e48 1575 fp_cqe->rss_hash, &rxhash_type);
2950219d
YM		 1576
1577 skb_set_hash(skb, rx_hash, rxhash_type);
1578
1579 qede_set_skb_csum(skb, csum_flag);
1580
1581 skb_record_rx_queue(skb, fp->rss_id);
1582
1583 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1584next_rx_only:
2950219d
YM		 1585 rx_pkt++;
1586
1587next_cqe: /* don't consume bd rx buffer */
1588 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1589 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1590 /* CR TPA - revisit how to handle budget in TPA perhaps
1591 * increase on "end"
1592 */
1593 if (rx_pkt == budget)
1594 break;
1595 } /* repeat while sw_comp_cons != hw_comp_cons... */
1596
1597 /* Update producers */
1598 qede_update_rx_prod(edev, rxq);
1599
68db9ec2
SRK		 1600 rxq->rcv_pkts += rx_pkt;
1601
2950219d
YM		 1602 return rx_pkt;
1603}
1604
1605static int qede_poll(struct napi_struct *napi, int budget)
1606{
2950219d 1607 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
c774169d 1608 napi);
2950219d 1609 struct qede_dev *edev = fp->edev;
c774169d
MC		 1610 int rx_work_done = 0;
1611 u8 tc;
2950219d 1612
c774169d
MC		 1613 for (tc = 0; tc < edev->num_tc; tc++)
1614 if (qede_txq_has_work(&fp->txqs[tc]))
1615 qede_tx_int(edev, &fp->txqs[tc]);
1616
1617 rx_work_done = qede_has_rx_work(fp->rxq) ?
1618 qede_rx_int(fp, budget) : 0;
1619 if (rx_work_done < budget) {
1620 qed_sb_update_sb_idx(fp->sb_info);
1621 /* *_has_*_work() reads the status block,
1622 * thus we need to ensure that status block indices
1623 * have been actually read (qed_sb_update_sb_idx)
1624 * prior to this check (*_has_*_work) so that
1625 * we won't write the "newer" value of the status block
1626 * to HW (if there was a DMA right after
1627 * qede_has_rx_work and if there is no rmb, the memory
1628 * reading (qed_sb_update_sb_idx) may be postponed
1629 * to right before *_ack_sb). In this case there
1630 * will never be another interrupt until there is
1631 * another update of the status block, while there
1632 * is still unhandled work.
1633 */
1634 rmb();
2950219d
YM		 1635
1636 /* Fall out from the NAPI loop if needed */
c774169d
MC		 1637 if (!(qede_has_rx_work(fp->rxq) ||
1638 qede_has_tx_work(fp))) {
1639 napi_complete(napi);
1640
1641 /* Update and reenable interrupts */
1642 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1643 1 /*update*/);
1644 } else {
1645 rx_work_done = budget;
2950219d
YM		 1646 }
1647 }
1648
c774169d 1649 return rx_work_done;
2950219d
YM		 1650}
1651
1652static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1653{
1654 struct qede_fastpath *fp = fp_cookie;
1655
1656 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1657
1658 napi_schedule_irqoff(&fp->napi);
1659 return IRQ_HANDLED;
1660}
1661
1662/* -------------------------------------------------------------------------
1663 * END OF FAST-PATH
1664 * -------------------------------------------------------------------------
1665 */
1666
1667static int qede_open(struct net_device *ndev);
1668static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1669static int qede_set_mac_addr(struct net_device *ndev, void *p);
1670static void qede_set_rx_mode(struct net_device *ndev);
1671static void qede_config_rx_mode(struct net_device *ndev);
1672
1673static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1674 enum qed_filter_xcast_params_type opcode,
1675 unsigned char mac[ETH_ALEN])
1676{
1677 struct qed_filter_params filter_cmd;
1678
1679 memset(&filter_cmd, 0, sizeof(filter_cmd));
1680 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1681 filter_cmd.filter.ucast.type = opcode;
1682 filter_cmd.filter.ucast.mac_valid = 1;
1683 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1684
1685 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1686}
1687
7c1bfcad
SRK		 1688static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1689 enum qed_filter_xcast_params_type opcode,
1690 u16 vid)
1691{
1692 struct qed_filter_params filter_cmd;
1693
1694 memset(&filter_cmd, 0, sizeof(filter_cmd));
1695 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1696 filter_cmd.filter.ucast.type = opcode;
1697 filter_cmd.filter.ucast.vlan_valid = 1;
1698 filter_cmd.filter.ucast.vlan = vid;
1699
1700 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1701}
1702
133fac0e
SK		 1703void qede_fill_by_demand_stats(struct qede_dev *edev)
1704{
1705 struct qed_eth_stats stats;
1706
1707 edev->ops->get_vport_stats(edev->cdev, &stats);
1708 edev->stats.no_buff_discards = stats.no_buff_discards;
1a5a366f
SRK		 1709 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1710 edev->stats.ttl0_discard = stats.ttl0_discard;
133fac0e
SK		 1711 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1712 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1713 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1714 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1715 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1716 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1717 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1718 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1719
1720 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1721 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1722 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1723 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1724 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1725 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1726 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1727 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1728 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1729 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1730 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1731 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1732
1733 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
d4967cf3
YM		 1734 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1735 edev->stats.rx_128_to_255_byte_packets =
1736 stats.rx_128_to_255_byte_packets;
1737 edev->stats.rx_256_to_511_byte_packets =
1738 stats.rx_256_to_511_byte_packets;
1739 edev->stats.rx_512_to_1023_byte_packets =
1740 stats.rx_512_to_1023_byte_packets;
1741 edev->stats.rx_1024_to_1518_byte_packets =
1742 stats.rx_1024_to_1518_byte_packets;
1743 edev->stats.rx_1519_to_1522_byte_packets =
1744 stats.rx_1519_to_1522_byte_packets;
1745 edev->stats.rx_1519_to_2047_byte_packets =
1746 stats.rx_1519_to_2047_byte_packets;
1747 edev->stats.rx_2048_to_4095_byte_packets =
1748 stats.rx_2048_to_4095_byte_packets;
1749 edev->stats.rx_4096_to_9216_byte_packets =
1750 stats.rx_4096_to_9216_byte_packets;
1751 edev->stats.rx_9217_to_16383_byte_packets =
1752 stats.rx_9217_to_16383_byte_packets;
133fac0e
SK		 1753 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1754 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1755 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1756 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1757 edev->stats.rx_align_errors = stats.rx_align_errors;
1758 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1759 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1760 edev->stats.rx_jabbers = stats.rx_jabbers;
1761 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1762 edev->stats.rx_fragments = stats.rx_fragments;
1763 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1764 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1765 edev->stats.tx_128_to_255_byte_packets =
1766 stats.tx_128_to_255_byte_packets;
1767 edev->stats.tx_256_to_511_byte_packets =
1768 stats.tx_256_to_511_byte_packets;
1769 edev->stats.tx_512_to_1023_byte_packets =
1770 stats.tx_512_to_1023_byte_packets;
1771 edev->stats.tx_1024_to_1518_byte_packets =
1772 stats.tx_1024_to_1518_byte_packets;
1773 edev->stats.tx_1519_to_2047_byte_packets =
1774 stats.tx_1519_to_2047_byte_packets;
1775 edev->stats.tx_2048_to_4095_byte_packets =
1776 stats.tx_2048_to_4095_byte_packets;
1777 edev->stats.tx_4096_to_9216_byte_packets =
1778 stats.tx_4096_to_9216_byte_packets;
1779 edev->stats.tx_9217_to_16383_byte_packets =
1780 stats.tx_9217_to_16383_byte_packets;
1781 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1782 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1783 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1784 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1785 edev->stats.brb_truncates = stats.brb_truncates;
1786 edev->stats.brb_discards = stats.brb_discards;
1787 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1788}
1789
1a635e48
YM		 1790static
1791struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1792 struct rtnl_link_stats64 *stats)
133fac0e
SK		 1793{
1794 struct qede_dev *edev = netdev_priv(dev);
1795
1796 qede_fill_by_demand_stats(edev);
1797
1798 stats->rx_packets = edev->stats.rx_ucast_pkts +
1799 edev->stats.rx_mcast_pkts +
1800 edev->stats.rx_bcast_pkts;
1801 stats->tx_packets = edev->stats.tx_ucast_pkts +
1802 edev->stats.tx_mcast_pkts +
1803 edev->stats.tx_bcast_pkts;
1804
1805 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1806 edev->stats.rx_mcast_bytes +
1807 edev->stats.rx_bcast_bytes;
1808
1809 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1810 edev->stats.tx_mcast_bytes +
1811 edev->stats.tx_bcast_bytes;
1812
1813 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1814 stats->multicast = edev->stats.rx_mcast_pkts +
1815 edev->stats.rx_bcast_pkts;
1816
1817 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1818
1819 stats->collisions = edev->stats.tx_total_collisions;
1820 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1821 stats->rx_frame_errors = edev->stats.rx_align_errors;
1822
1823 return stats;
1824}
1825
733def6a 1826#ifdef CONFIG_QED_SRIOV
73390ac9
YM		 1827static int qede_get_vf_config(struct net_device *dev, int vfidx,
1828 struct ifla_vf_info *ivi)
1829{
1830 struct qede_dev *edev = netdev_priv(dev);
1831
1832 if (!edev->ops)
1833 return -EINVAL;
1834
1835 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1836}
1837
733def6a
YM		 1838static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1839 int min_tx_rate, int max_tx_rate)
1840{
1841 struct qede_dev *edev = netdev_priv(dev);
1842
be7b6d64 1843 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
733def6a
YM		 1844 max_tx_rate);
1845}
1846
6ddc7608
YM		 1847static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1848{
1849 struct qede_dev *edev = netdev_priv(dev);
1850
1851 if (!edev->ops)
1852 return -EINVAL;
1853
1854 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1855}
1856
733def6a
YM		 1857static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1858 int link_state)
1859{
1860 struct qede_dev *edev = netdev_priv(dev);
1861
1862 if (!edev->ops)
1863 return -EINVAL;
1864
1865 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1866}
1867#endif
1868
7c1bfcad
SRK		 1869static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1870{
1871 struct qed_update_vport_params params;
1872 int rc;
1873
1874 /* Proceed only if action actually needs to be performed */
1875 if (edev->accept_any_vlan == action)
1876 return;
1877
1878 memset(&params, 0, sizeof(params));
1879
1880 params.vport_id = 0;
1881 params.accept_any_vlan = action;
1882 params.update_accept_any_vlan_flg = 1;
1883
1884 rc = edev->ops->vport_update(edev->cdev, &params);
1885 if (rc) {
1886 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1887 action ? "enable" : "disable");
1888 } else {
1889 DP_INFO(edev, "%s accept-any-vlan\n",
1890 action ? "enabled" : "disabled");
1891 edev->accept_any_vlan = action;
1892 }
1893}
1894
1895static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1896{
1897 struct qede_dev *edev = netdev_priv(dev);
1898 struct qede_vlan *vlan, *tmp;
1899 int rc;
1900
1901 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1902
1903 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1904 if (!vlan) {
1905 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1906 return -ENOMEM;
1907 }
1908 INIT_LIST_HEAD(&vlan->list);
1909 vlan->vid = vid;
1910 vlan->configured = false;
1911
1912 /* Verify vlan isn't already configured */
1913 list_for_each_entry(tmp, &edev->vlan_list, list) {
1914 if (tmp->vid == vlan->vid) {
1915 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1916 "vlan already configured\n");
1917 kfree(vlan);
1918 return -EEXIST;
1919 }
1920 }
1921
1922 /* If interface is down, cache this VLAN ID and return */
1923 if (edev->state != QEDE_STATE_OPEN) {
1924 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1925 "Interface is down, VLAN %d will be configured when interface is up\n",
1926 vid);
1927 if (vid != 0)
1928 edev->non_configured_vlans++;
1929 list_add(&vlan->list, &edev->vlan_list);
1930
1931 return 0;
1932 }
1933
1934 /* Check for the filter limit.
1935 * Note - vlan0 has a reserved filter and can be added without
1936 * worrying about quota
1937 */
1938 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1939 (vlan->vid == 0)) {
1940 rc = qede_set_ucast_rx_vlan(edev,
1941 QED_FILTER_XCAST_TYPE_ADD,
1942 vlan->vid);
1943 if (rc) {
1944 DP_ERR(edev, "Failed to configure VLAN %d\n",
1945 vlan->vid);
1946 kfree(vlan);
1947 return -EINVAL;
1948 }
1949 vlan->configured = true;
1950
1951 /* vlan0 filter isn't consuming out of our quota */
1952 if (vlan->vid != 0)
1953 edev->configured_vlans++;
1954 } else {
1955 /* Out of quota; Activate accept-any-VLAN mode */
1956 if (!edev->non_configured_vlans)
1957 qede_config_accept_any_vlan(edev, true);
1958
1959 edev->non_configured_vlans++;
1960 }
1961
1962 list_add(&vlan->list, &edev->vlan_list);
1963
1964 return 0;
1965}
1966
1967static void qede_del_vlan_from_list(struct qede_dev *edev,
1968 struct qede_vlan *vlan)
1969{
1970 /* vlan0 filter isn't consuming out of our quota */
1971 if (vlan->vid != 0) {
1972 if (vlan->configured)
1973 edev->configured_vlans--;
1974 else
1975 edev->non_configured_vlans--;
1976 }
1977
1978 list_del(&vlan->list);
1979 kfree(vlan);
1980}
1981
1982static int qede_configure_vlan_filters(struct qede_dev *edev)
1983{
1984 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1985 struct qed_dev_eth_info *dev_info;
1986 struct qede_vlan *vlan = NULL;
1987
1988 if (list_empty(&edev->vlan_list))
1989 return 0;
1990
1991 dev_info = &edev->dev_info;
1992
1993 /* Configure non-configured vlans */
1994 list_for_each_entry(vlan, &edev->vlan_list, list) {
1995 if (vlan->configured)
1996 continue;
1997
1998 /* We have used all our credits, now enable accept_any_vlan */
1999 if ((vlan->vid != 0) &&
2000 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2001 accept_any_vlan = 1;
2002 continue;
2003 }
2004
2005 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2006
2007 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2008 vlan->vid);
2009 if (rc) {
2010 DP_ERR(edev, "Failed to configure VLAN %u\n",
2011 vlan->vid);
2012 real_rc = rc;
2013 continue;
2014 }
2015
2016 vlan->configured = true;
2017 /* vlan0 filter doesn't consume our VLAN filter's quota */
2018 if (vlan->vid != 0) {
2019 edev->non_configured_vlans--;
2020 edev->configured_vlans++;
2021 }
2022 }
2023
2024 /* enable accept_any_vlan mode if we have more VLANs than credits,
2025 * or remove accept_any_vlan mode if we've actually removed
2026 * a non-configured vlan, and all remaining vlans are truly configured.
2027 */
2028
2029 if (accept_any_vlan)
2030 qede_config_accept_any_vlan(edev, true);
2031 else if (!edev->non_configured_vlans)
2032 qede_config_accept_any_vlan(edev, false);
2033
2034 return real_rc;
2035}
2036
2037static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2038{
2039 struct qede_dev *edev = netdev_priv(dev);
2040 struct qede_vlan *vlan = NULL;
2041 int rc;
2042
2043 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2044
2045 /* Find whether entry exists */
2046 list_for_each_entry(vlan, &edev->vlan_list, list)
2047 if (vlan->vid == vid)
2048 break;
2049
2050 if (!vlan || (vlan->vid != vid)) {
2051 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2052 "Vlan isn't configured\n");
2053 return 0;
2054 }
2055
2056 if (edev->state != QEDE_STATE_OPEN) {
2057 /* As interface is already down, we don't have a VPORT
2058 * instance to remove vlan filter. So just update vlan list
2059 */
2060 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2061 "Interface is down, removing VLAN from list only\n");
2062 qede_del_vlan_from_list(edev, vlan);
2063 return 0;
2064 }
2065
2066 /* Remove vlan */
c524e2f5
YM		 2067 if (vlan->configured) {
2068 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2069 vid);
2070 if (rc) {
2071 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2072 return -EINVAL;
2073 }
7c1bfcad
SRK		 2074 }
2075
2076 qede_del_vlan_from_list(edev, vlan);
2077
2078 /* We have removed a VLAN - try to see if we can
2079 * configure non-configured VLAN from the list.
2080 */
2081 rc = qede_configure_vlan_filters(edev);
2082
2083 return rc;
2084}
2085
2086static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2087{
2088 struct qede_vlan *vlan = NULL;
2089
2090 if (list_empty(&edev->vlan_list))
2091 return;
2092
2093 list_for_each_entry(vlan, &edev->vlan_list, list) {
2094 if (!vlan->configured)
2095 continue;
2096
2097 vlan->configured = false;
2098
2099 /* vlan0 filter isn't consuming out of our quota */
2100 if (vlan->vid != 0) {
2101 edev->non_configured_vlans++;
2102 edev->configured_vlans--;
2103 }
2104
2105 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1a635e48 2106 "marked vlan %d as non-configured\n", vlan->vid);
7c1bfcad
SRK		 2107 }
2108
2109 edev->accept_any_vlan = false;
2110}
2111
ce2b885c
YM		 2112int qede_set_features(struct net_device *dev, netdev_features_t features)
2113{
2114 struct qede_dev *edev = netdev_priv(dev);
2115 netdev_features_t changes = features ^ dev->features;
2116 bool need_reload = false;
2117
2118 /* No action needed if hardware GRO is disabled during driver load */
2119 if (changes & NETIF_F_GRO) {
2120 if (dev->features & NETIF_F_GRO)
2121 need_reload = !edev->gro_disable;
2122 else
2123 need_reload = edev->gro_disable;
2124 }
2125
2126 if (need_reload && netif_running(edev->ndev)) {
2127 dev->features = features;
2128 qede_reload(edev, NULL, NULL);
2129 return 1;
2130 }
2131
2132 return 0;
2133}
2134
f9f082a9
AD		 2135static void qede_udp_tunnel_add(struct net_device *dev,
2136 struct udp_tunnel_info *ti)
b18e170c
MC		 2137{
2138 struct qede_dev *edev = netdev_priv(dev);
f9f082a9 2139 u16 t_port = ntohs(ti->port);
b18e170c 2140
f9f082a9
AD		 2141 switch (ti->type) {
2142 case UDP_TUNNEL_TYPE_VXLAN:
2143 if (edev->vxlan_dst_port)
2144 return;
b18e170c 2145
f9f082a9 2146 edev->vxlan_dst_port = t_port;
b18e170c 2147
525ef5c0 2148 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
f9f082a9 2149 t_port);
b18e170c 2150
f9f082a9
AD		 2151 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2152 break;
2153 case UDP_TUNNEL_TYPE_GENEVE:
2154 if (edev->geneve_dst_port)
2155 return;
b18e170c 2156
f9f082a9 2157 edev->geneve_dst_port = t_port;
b18e170c 2158
525ef5c0 2159 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
f9f082a9
AD		 2160 t_port);
2161 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2162 break;
2163 default:
b18e170c 2164 return;
f9f082a9 2165 }
b18e170c 2166
b18e170c
MC		 2167 schedule_delayed_work(&edev->sp_task, 0);
2168}
b18e170c 2169
f9f082a9
AD		 2170static void qede_udp_tunnel_del(struct net_device *dev,
2171 struct udp_tunnel_info *ti)
9a109dd0
MC		 2172{
2173 struct qede_dev *edev = netdev_priv(dev);
f9f082a9 2174 u16 t_port = ntohs(ti->port);
9a109dd0 2175
f9f082a9
AD		 2176 switch (ti->type) {
2177 case UDP_TUNNEL_TYPE_VXLAN:
2178 if (t_port != edev->vxlan_dst_port)
2179 return;
9a109dd0 2180
f9f082a9 2181 edev->vxlan_dst_port = 0;
9a109dd0 2182
525ef5c0 2183 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
f9f082a9 2184 t_port);
9a109dd0 2185
f9f082a9
AD		 2186 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2187 break;
2188 case UDP_TUNNEL_TYPE_GENEVE:
2189 if (t_port != edev->geneve_dst_port)
2190 return;
9a109dd0 2191
f9f082a9 2192 edev->geneve_dst_port = 0;
9a109dd0 2193
525ef5c0 2194 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
f9f082a9
AD		 2195 t_port);
2196 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2197 break;
2198 default:
2199 return;
2200 }
9a109dd0 2201
9a109dd0
MC		 2202 schedule_delayed_work(&edev->sp_task, 0);
2203}
9a109dd0 2204
2950219d
YM		 2205static const struct net_device_ops qede_netdev_ops = {
2206 .ndo_open = qede_open,
2207 .ndo_stop = qede_close,
2208 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 2209 .ndo_set_rx_mode = qede_set_rx_mode,
2210 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 2211 .ndo_validate_addr = eth_validate_addr,
133fac0e 2212 .ndo_change_mtu = qede_change_mtu,
08feecd7 2213#ifdef CONFIG_QED_SRIOV
eff16960 2214 .ndo_set_vf_mac = qede_set_vf_mac,
08feecd7
YM		 2215 .ndo_set_vf_vlan = qede_set_vf_vlan,
2216#endif
7c1bfcad
SRK		 2217 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2218 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
ce2b885c 2219 .ndo_set_features = qede_set_features,
133fac0e 2220 .ndo_get_stats64 = qede_get_stats64,
733def6a
YM		 2221#ifdef CONFIG_QED_SRIOV
2222 .ndo_set_vf_link_state = qede_set_vf_link_state,
6ddc7608 2223 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
73390ac9 2224 .ndo_get_vf_config = qede_get_vf_config,
733def6a
YM		 2225 .ndo_set_vf_rate = qede_set_vf_rate,
2226#endif
f9f082a9
AD		 2227 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2228 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
2950219d
YM		 2229};
2230
e712d52b
YM		 2231/* -------------------------------------------------------------------------
2232 * START OF PROBE / REMOVE
2233 * -------------------------------------------------------------------------
2234 */
2235
2236static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2237 struct pci_dev *pdev,
2238 struct qed_dev_eth_info *info,
1a635e48 2239 u32 dp_module, u8 dp_level)
e712d52b
YM		 2240{
2241 struct net_device *ndev;
2242 struct qede_dev *edev;
2243
2244 ndev = alloc_etherdev_mqs(sizeof(*edev),
1a635e48 2245 info->num_queues, info->num_queues);
e712d52b
YM		 2246 if (!ndev) {
2247 pr_err("etherdev allocation failed\n");
2248 return NULL;
2249 }
2250
2251 edev = netdev_priv(ndev);
2252 edev->ndev = ndev;
2253 edev->cdev = cdev;
2254 edev->pdev = pdev;
2255 edev->dp_module = dp_module;
2256 edev->dp_level = dp_level;
2257 edev->ops = qed_ops;
2950219d
YM		 2258 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2259 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b 2260
525ef5c0
YM		 2261 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2262 info->num_queues, info->num_queues);
2263
e712d52b
YM		 2264 SET_NETDEV_DEV(ndev, &pdev->dev);
2265
133fac0e 2266 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 2267 memcpy(&edev->dev_info, info, sizeof(*info));
2268
2269 edev->num_tc = edev->dev_info.num_tc;
2270
7c1bfcad
SRK		 2271 INIT_LIST_HEAD(&edev->vlan_list);
2272
e712d52b
YM		 2273 return edev;
2274}
2275
2276static void qede_init_ndev(struct qede_dev *edev)
2277{
2278 struct net_device *ndev = edev->ndev;
2279 struct pci_dev *pdev = edev->pdev;
2280 u32 hw_features;
2281
2282 pci_set_drvdata(pdev, ndev);
2283
2284 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2285 ndev->base_addr = ndev->mem_start;
2286 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2287 ndev->irq = edev->dev_info.common.pci_irq;
2288
2289 ndev->watchdog_timeo = TX_TIMEOUT;
2290
2950219d
YM		 2291 ndev->netdev_ops = &qede_netdev_ops;
2292
133fac0e
SK		 2293 qede_set_ethtool_ops(ndev);
2294
e712d52b
YM		 2295 /* user-changeble features */
2296 hw_features = NETIF_F_GRO | NETIF_F_SG |
2297 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2298 NETIF_F_TSO | NETIF_F_TSO6;
2299
14db81de
MC		 2300 /* Encap features*/
2301 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2302 NETIF_F_TSO_ECN;
2303 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2304 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2305 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2306 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2307
e712d52b
YM		 2308 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2309 NETIF_F_HIGHDMA;
2310 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2311 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 2312 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 2313
2314 ndev->hw_features = hw_features;
2315
2316 /* Set network device HW mac */
2317 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2318}
2319
2320/* This function converts from 32b param to two params of level and module
2321 * Input 32b decoding:
2322 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2323 * 'happy' flow, e.g. memory allocation failed.
2324 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2325 * and provide important parameters.
2326 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2327 * module. VERBOSE prints are for tracking the specific flow in low level.
2328 *
2329 * Notice that the level should be that of the lowest required logs.
2330 */
133fac0e 2331void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2332{
2333 *p_dp_level = QED_LEVEL_NOTICE;
2334 *p_dp_module = 0;
2335
2336 if (debug & QED_LOG_VERBOSE_MASK) {
2337 *p_dp_level = QED_LEVEL_VERBOSE;
2338 *p_dp_module = (debug & 0x3FFFFFFF);
2339 } else if (debug & QED_LOG_INFO_MASK) {
2340 *p_dp_level = QED_LEVEL_INFO;
2341 } else if (debug & QED_LOG_NOTICE_MASK) {
2342 *p_dp_level = QED_LEVEL_NOTICE;
2343 }
2344}
2345
2950219d
YM		 2346static void qede_free_fp_array(struct qede_dev *edev)
2347{
2348 if (edev->fp_array) {
2349 struct qede_fastpath *fp;
2350 int i;
2351
2352 for_each_rss(i) {
2353 fp = &edev->fp_array[i];
2354
2355 kfree(fp->sb_info);
2356 kfree(fp->rxq);
2357 kfree(fp->txqs);
2358 }
2359 kfree(edev->fp_array);
2360 }
2361 edev->num_rss = 0;
2362}
2363
2364static int qede_alloc_fp_array(struct qede_dev *edev)
2365{
2366 struct qede_fastpath *fp;
2367 int i;
2368
2369 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2370 sizeof(*edev->fp_array), GFP_KERNEL);
2371 if (!edev->fp_array) {
2372 DP_NOTICE(edev, "fp array allocation failed\n");
2373 goto err;
2374 }
2375
2376 for_each_rss(i) {
2377 fp = &edev->fp_array[i];
2378
2379 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2380 if (!fp->sb_info) {
2381 DP_NOTICE(edev, "sb info struct allocation failed\n");
2382 goto err;
2383 }
2384
2385 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2386 if (!fp->rxq) {
2387 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2388 goto err;
2389 }
2390
2391 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2392 if (!fp->txqs) {
2393 DP_NOTICE(edev, "TXQ array allocation failed\n");
2394 goto err;
2395 }
2396 }
2397
2398 return 0;
2399err:
2400 qede_free_fp_array(edev);
2401 return -ENOMEM;
2402}
2403
0d8e0aa0
SK		 2404static void qede_sp_task(struct work_struct *work)
2405{
2406 struct qede_dev *edev = container_of(work, struct qede_dev,
2407 sp_task.work);
b18e170c
MC		 2408 struct qed_dev *cdev = edev->cdev;
2409
0d8e0aa0
SK		 2410 mutex_lock(&edev->qede_lock);
2411
2412 if (edev->state == QEDE_STATE_OPEN) {
2413 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2414 qede_config_rx_mode(edev->ndev);
2415 }
2416
b18e170c
MC		 2417 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2418 struct qed_tunn_params tunn_params;
2419
2420 memset(&tunn_params, 0, sizeof(tunn_params));
2421 tunn_params.update_vxlan_port = 1;
2422 tunn_params.vxlan_port = edev->vxlan_dst_port;
2423 qed_ops->tunn_config(cdev, &tunn_params);
2424 }
2425
9a109dd0
MC		 2426 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2427 struct qed_tunn_params tunn_params;
2428
2429 memset(&tunn_params, 0, sizeof(tunn_params));
2430 tunn_params.update_geneve_port = 1;
2431 tunn_params.geneve_port = edev->geneve_dst_port;
2432 qed_ops->tunn_config(cdev, &tunn_params);
2433 }
2434
0d8e0aa0
SK		 2435 mutex_unlock(&edev->qede_lock);
2436}
2437
e712d52b
YM		 2438static void qede_update_pf_params(struct qed_dev *cdev)
2439{
2440 struct qed_pf_params pf_params;
2441
8e0ddc04 2442 /* 64 rx + 64 tx */
e712d52b 2443 memset(&pf_params, 0, sizeof(struct qed_pf_params));
8e0ddc04 2444 pf_params.eth_pf_params.num_cons = 128;
e712d52b
YM		 2445 qed_ops->common->update_pf_params(cdev, &pf_params);
2446}
2447
2448enum qede_probe_mode {
2449 QEDE_PROBE_NORMAL,
2450};
2451
2452static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1408cc1f 2453 bool is_vf, enum qede_probe_mode mode)
e712d52b 2454{
1408cc1f 2455 struct qed_probe_params probe_params;
1a635e48 2456 struct qed_slowpath_params sp_params;
e712d52b
YM		 2457 struct qed_dev_eth_info dev_info;
2458 struct qede_dev *edev;
2459 struct qed_dev *cdev;
2460 int rc;
2461
2462 if (unlikely(dp_level & QED_LEVEL_INFO))
2463 pr_notice("Starting qede probe\n");
2464
1408cc1f
YM		 2465 memset(&probe_params, 0, sizeof(probe_params));
2466 probe_params.protocol = QED_PROTOCOL_ETH;
2467 probe_params.dp_module = dp_module;
2468 probe_params.dp_level = dp_level;
2469 probe_params.is_vf = is_vf;
2470 cdev = qed_ops->common->probe(pdev, &probe_params);
e712d52b
YM		 2471 if (!cdev) {
2472 rc = -ENODEV;
2473 goto err0;
2474 }
2475
2476 qede_update_pf_params(cdev);
2477
2478 /* Start the Slowpath-process */
1a635e48
YM		 2479 memset(&sp_params, 0, sizeof(sp_params));
2480 sp_params.int_mode = QED_INT_MODE_MSIX;
2481 sp_params.drv_major = QEDE_MAJOR_VERSION;
2482 sp_params.drv_minor = QEDE_MINOR_VERSION;
2483 sp_params.drv_rev = QEDE_REVISION_VERSION;
2484 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2485 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2486 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
e712d52b
YM		 2487 if (rc) {
2488 pr_notice("Cannot start slowpath\n");
2489 goto err1;
2490 }
2491
2492 /* Learn information crucial for qede to progress */
2493 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2494 if (rc)
2495 goto err2;
2496
2497 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2498 dp_level);
2499 if (!edev) {
2500 rc = -ENOMEM;
2501 goto err2;
2502 }
2503
fefb0202
YM		 2504 if (is_vf)
2505 edev->flags |= QEDE_FLAG_IS_VF;
2506
e712d52b
YM		 2507 qede_init_ndev(edev);
2508
2950219d
YM		 2509 rc = register_netdev(edev->ndev);
2510 if (rc) {
2511 DP_NOTICE(edev, "Cannot register net-device\n");
2512 goto err3;
2513 }
2514
e712d52b
YM		 2515 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2516
a2ec6172
SK		 2517 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2518
489e45ae
SRK		 2519#ifdef CONFIG_DCB
2520 qede_set_dcbnl_ops(edev->ndev);
2521#endif
2522
0d8e0aa0
SK		 2523 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2524 mutex_init(&edev->qede_lock);
3d789994 2525 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
0d8e0aa0 2526
e712d52b
YM		 2527 DP_INFO(edev, "Ending successfully qede probe\n");
2528
2529 return 0;
2530
2950219d
YM		 2531err3:
2532 free_netdev(edev->ndev);
e712d52b
YM		 2533err2:
2534 qed_ops->common->slowpath_stop(cdev);
2535err1:
2536 qed_ops->common->remove(cdev);
2537err0:
2538 return rc;
2539}
2540
2541static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2542{
fefb0202 2543 bool is_vf = false;
e712d52b
YM		 2544 u32 dp_module = 0;
2545 u8 dp_level = 0;
2546
fefb0202
YM		 2547 switch ((enum qede_pci_private)id->driver_data) {
2548 case QEDE_PRIVATE_VF:
2549 if (debug & QED_LOG_VERBOSE_MASK)
2550 dev_err(&pdev->dev, "Probing a VF\n");
2551 is_vf = true;
2552 break;
2553 default:
2554 if (debug & QED_LOG_VERBOSE_MASK)
2555 dev_err(&pdev->dev, "Probing a PF\n");
2556 }
2557
e712d52b
YM		 2558 qede_config_debug(debug, &dp_module, &dp_level);
2559
fefb0202 2560 return __qede_probe(pdev, dp_module, dp_level, is_vf,
e712d52b
YM		 2561 QEDE_PROBE_NORMAL);
2562}
2563
2564enum qede_remove_mode {
2565 QEDE_REMOVE_NORMAL,
2566};
2567
2568static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2569{
2570 struct net_device *ndev = pci_get_drvdata(pdev);
2571 struct qede_dev *edev = netdev_priv(ndev);
2572 struct qed_dev *cdev = edev->cdev;
2573
2574 DP_INFO(edev, "Starting qede_remove\n");
2575
0d8e0aa0 2576 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2577 unregister_netdev(ndev);
2578
e712d52b
YM		 2579 edev->ops->common->set_power_state(cdev, PCI_D0);
2580
2581 pci_set_drvdata(pdev, NULL);
2582
2583 free_netdev(ndev);
2584
2585 /* Use global ops since we've freed edev */
2586 qed_ops->common->slowpath_stop(cdev);
2587 qed_ops->common->remove(cdev);
2588
525ef5c0 2589 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
e712d52b
YM		 2590}
2591
2592static void qede_remove(struct pci_dev *pdev)
2593{
2594 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2595}
2950219d
YM		 2596
2597/* -------------------------------------------------------------------------
2598 * START OF LOAD / UNLOAD
2599 * -------------------------------------------------------------------------
2600 */
2601
2602static int qede_set_num_queues(struct qede_dev *edev)
2603{
2604 int rc;
2605 u16 rss_num;
2606
2607 /* Setup queues according to possible resources*/
8edf049d
SK		 2608 if (edev->req_rss)
2609 rss_num = edev->req_rss;
2610 else
2611 rss_num = netif_get_num_default_rss_queues() *
2612 edev->dev_info.common.num_hwfns;
2950219d
YM		 2613
2614 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2615
2616 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2617 if (rc > 0) {
2618 /* Managed to request interrupts for our queues */
2619 edev->num_rss = rc;
2620 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2621 QEDE_RSS_CNT(edev), rss_num);
2622 rc = 0;
2623 }
2624 return rc;
2625}
2626
2627static void qede_free_mem_sb(struct qede_dev *edev,
2628 struct qed_sb_info *sb_info)
2629{
2630 if (sb_info->sb_virt)
2631 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2632 (void *)sb_info->sb_virt, sb_info->sb_phys);
2633}
2634
2635/* This function allocates fast-path status block memory */
2636static int qede_alloc_mem_sb(struct qede_dev *edev,
1a635e48 2637 struct qed_sb_info *sb_info, u16 sb_id)
2950219d
YM		 2638{
2639 struct status_block *sb_virt;
2640 dma_addr_t sb_phys;
2641 int rc;
2642
2643 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1a635e48 2644 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
2950219d
YM		 2645 if (!sb_virt) {
2646 DP_ERR(edev, "Status block allocation failed\n");
2647 return -ENOMEM;
2648 }
2649
2650 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2651 sb_virt, sb_phys, sb_id,
2652 QED_SB_TYPE_L2_QUEUE);
2653 if (rc) {
2654 DP_ERR(edev, "Status block initialization failed\n");
2655 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2656 sb_virt, sb_phys);
2657 return rc;
2658 }
2659
2660 return 0;
2661}
2662
2663static void qede_free_rx_buffers(struct qede_dev *edev,
2664 struct qede_rx_queue *rxq)
2665{
2666 u16 i;
2667
2668 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2669 struct sw_rx_data *rx_buf;
fc48b7a6 2670 struct page *data;
2950219d
YM		 2671
2672 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2673 data = rx_buf->data;
2674
fc48b7a6 2675 dma_unmap_page(&edev->pdev->dev,
1a635e48 2676 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2677
2678 rx_buf->data = NULL;
fc48b7a6 2679 __free_page(data);
2950219d
YM		 2680 }
2681}
2682
1a635e48
YM		 2683static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2684{
55482edc
MC		 2685 int i;
2686
2687 if (edev->gro_disable)
2688 return;
2689
2690 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2691 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2692 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2693
f86af2df 2694 if (replace_buf->data) {
55482edc 2695 dma_unmap_page(&edev->pdev->dev,
09ec8e7f 2696 replace_buf->mapping,
55482edc
MC		 2697 PAGE_SIZE, DMA_FROM_DEVICE);
2698 __free_page(replace_buf->data);
2699 }
2700 }
2701}
2702
1a635e48 2703static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
2950219d 2704{
55482edc
MC		 2705 qede_free_sge_mem(edev, rxq);
2706
2950219d
YM		 2707 /* Free rx buffers */
2708 qede_free_rx_buffers(edev, rxq);
2709
2710 /* Free the parallel SW ring */
2711 kfree(rxq->sw_rx_ring);
2712
2713 /* Free the real RQ ring used by FW */
2714 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2715 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2716}
2717
2718static int qede_alloc_rx_buffer(struct qede_dev *edev,
2719 struct qede_rx_queue *rxq)
2720{
2721 struct sw_rx_data *sw_rx_data;
2722 struct eth_rx_bd *rx_bd;
2723 dma_addr_t mapping;
fc48b7a6 2724 struct page *data;
2950219d 2725
fc48b7a6 2726 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2727 if (unlikely(!data)) {
fc48b7a6 2728 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2729 return -ENOMEM;
2730 }
2731
fc48b7a6
YM		 2732 /* Map the entire page as it would be used
2733 * for multiple RX buffer segment size mapping.
2734 */
2735 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2736 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2737 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2738 __free_page(data);
2950219d
YM		 2739 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2740 return -ENOMEM;
2741 }
2742
2743 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2744 sw_rx_data->page_offset = 0;
2950219d 2745 sw_rx_data->data = data;
fc48b7a6 2746 sw_rx_data->mapping = mapping;
2950219d
YM		 2747
2748 /* Advance PROD and get BD pointer */
2749 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2750 WARN_ON(!rx_bd);
2751 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2752 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2753
2754 rxq->sw_rx_prod++;
2755
2756 return 0;
2757}
2758
1a635e48 2759static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
55482edc
MC		 2760{
2761 dma_addr_t mapping;
2762 int i;
2763
2764 if (edev->gro_disable)
2765 return 0;
2766
2767 if (edev->ndev->mtu > PAGE_SIZE) {
2768 edev->gro_disable = 1;
2769 return 0;
2770 }
2771
2772 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2773 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2774 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2775
2776 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2777 if (unlikely(!replace_buf->data)) {
2778 DP_NOTICE(edev,
2779 "Failed to allocate TPA skb pool [replacement buffer]\n");
2780 goto err;
2781 }
2782
2783 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2784 rxq->rx_buf_size, DMA_FROM_DEVICE);
2785 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2786 DP_NOTICE(edev,
2787 "Failed to map TPA replacement buffer\n");
2788 goto err;
2789 }
2790
09ec8e7f 2791 replace_buf->mapping = mapping;
55482edc
MC		 2792 tpa_info->replace_buf.page_offset = 0;
2793
2794 tpa_info->replace_buf_mapping = mapping;
2795 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2796 }
2797
2798 return 0;
2799err:
2800 qede_free_sge_mem(edev, rxq);
2801 edev->gro_disable = 1;
2802 return -ENOMEM;
2803}
2804
2950219d 2805/* This function allocates all memory needed per Rx queue */
1a635e48 2806static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
2950219d 2807{
f86af2df 2808 int i, rc, size;
2950219d
YM		 2809
2810 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2811
1a635e48
YM		 2812 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2813
fc48b7a6
YM		 2814 if (rxq->rx_buf_size > PAGE_SIZE)
2815 rxq->rx_buf_size = PAGE_SIZE;
2816
2817 /* Segment size to spilt a page in multiple equal parts */
2818 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2819
2820 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2821 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2822 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2823 if (!rxq->sw_rx_ring) {
2824 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2825 rc = -ENOMEM;
2950219d
YM		 2826 goto err;
2827 }
2828
2829 /* Allocate FW Rx ring */
2830 rc = edev->ops->common->chain_alloc(edev->cdev,
2831 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2832 QED_CHAIN_MODE_NEXT_PTR,
a91eb52a 2833 QED_CHAIN_CNT_TYPE_U16,
fc48b7a6 2834 RX_RING_SIZE,
2950219d
YM		 2835 sizeof(struct eth_rx_bd),
2836 &rxq->rx_bd_ring);
2837
2838 if (rc)
2839 goto err;
2840
2841 /* Allocate FW completion ring */
2842 rc = edev->ops->common->chain_alloc(edev->cdev,
2843 QED_CHAIN_USE_TO_CONSUME,
2844 QED_CHAIN_MODE_PBL,
a91eb52a 2845 QED_CHAIN_CNT_TYPE_U16,
fc48b7a6 2846 RX_RING_SIZE,
2950219d
YM		 2847 sizeof(union eth_rx_cqe),
2848 &rxq->rx_comp_ring);
2849 if (rc)
2850 goto err;
2851
2852 /* Allocate buffers for the Rx ring */
2853 for (i = 0; i < rxq->num_rx_buffers; i++) {
2854 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2855 if (rc) {
2856 DP_ERR(edev,
2857 "Rx buffers allocation failed at index %d\n", i);
2858 goto err;
2859 }
2950219d
YM		 2860 }
2861
f86af2df 2862 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2863err:
f86af2df 2864 return rc;
2950219d
YM		 2865}
2866
1a635e48 2867static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
2950219d
YM		 2868{
2869 /* Free the parallel SW ring */
2870 kfree(txq->sw_tx_ring);
2871
2872 /* Free the real RQ ring used by FW */
2873 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2874}
2875
2876/* This function allocates all memory needed per Tx queue */
1a635e48 2877static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
2950219d
YM		 2878{
2879 int size, rc;
2880 union eth_tx_bd_types *p_virt;
2881
2882 txq->num_tx_buffers = edev->q_num_tx_buffers;
2883
2884 /* Allocate the parallel driver ring for Tx buffers */
2885 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2886 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2887 if (!txq->sw_tx_ring) {
2888 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2889 goto err;
2890 }
2891
2892 rc = edev->ops->common->chain_alloc(edev->cdev,
2893 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2894 QED_CHAIN_MODE_PBL,
a91eb52a 2895 QED_CHAIN_CNT_TYPE_U16,
2950219d 2896 NUM_TX_BDS_MAX,
a91eb52a 2897 sizeof(*p_virt), &txq->tx_pbl);
2950219d
YM		 2898 if (rc)
2899 goto err;
2900
2901 return 0;
2902
2903err:
2904 qede_free_mem_txq(edev, txq);
2905 return -ENOMEM;
2906}
2907
2908/* This function frees all memory of a single fp */
1a635e48 2909static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
2950219d
YM		 2910{
2911 int tc;
2912
2913 qede_free_mem_sb(edev, fp->sb_info);
2914
2915 qede_free_mem_rxq(edev, fp->rxq);
2916
2917 for (tc = 0; tc < edev->num_tc; tc++)
2918 qede_free_mem_txq(edev, &fp->txqs[tc]);
2919}
2920
2921/* This function allocates all memory needed for a single fp (i.e. an entity
2922 * which contains status block, one rx queue and multiple per-TC tx queues.
2923 */
1a635e48 2924static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
2950219d
YM		 2925{
2926 int rc, tc;
2927
2928 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2929 if (rc)
2930 goto err;
2931
2932 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2933 if (rc)
2934 goto err;
2935
2936 for (tc = 0; tc < edev->num_tc; tc++) {
2937 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2938 if (rc)
2939 goto err;
2940 }
2941
2942 return 0;
2950219d 2943err:
f86af2df 2944 return rc;
2950219d
YM		 2945}
2946
2947static void qede_free_mem_load(struct qede_dev *edev)
2948{
2949 int i;
2950
2951 for_each_rss(i) {
2952 struct qede_fastpath *fp = &edev->fp_array[i];
2953
2954 qede_free_mem_fp(edev, fp);
2955 }
2956}
2957
2958/* This function allocates all qede memory at NIC load. */
2959static int qede_alloc_mem_load(struct qede_dev *edev)
2960{
2961 int rc = 0, rss_id;
2962
2963 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2964 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2965
2966 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 2967 if (rc) {
2950219d 2968 DP_ERR(edev,
f86af2df
MC		 2969 "Failed to allocate memory for fastpath - rss id = %d\n",
2970 rss_id);
2971 qede_free_mem_load(edev);
2972 return rc;
2950219d 2973 }
2950219d
YM		 2974 }
2975
2976 return 0;
2977}
2978
2979/* This function inits fp content and resets the SB, RXQ and TXQ structures */
2980static void qede_init_fp(struct qede_dev *edev)
2981{
2982 int rss_id, txq_index, tc;
2983 struct qede_fastpath *fp;
2984
2985 for_each_rss(rss_id) {
2986 fp = &edev->fp_array[rss_id];
2987
2988 fp->edev = edev;
2989 fp->rss_id = rss_id;
2990
2991 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2992
2993 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2994
2995 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2996 fp->rxq->rxq_id = rss_id;
2997
2998 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2999 for (tc = 0; tc < edev->num_tc; tc++) {
3000 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
3001 fp->txqs[tc].index = txq_index;
d8c2c7e3
YM		 3002 if (edev->dev_info.is_legacy)
3003 fp->txqs[tc].is_legacy = true;
2950219d
YM		 3004 }
3005
3006 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
3007 edev->ndev->name, rss_id);
3008 }
55482edc
MC		 3009
3010 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 3011}
3012
3013static int qede_set_real_num_queues(struct qede_dev *edev)
3014{
3015 int rc = 0;
3016
3017 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3018 if (rc) {
3019 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3020 return rc;
3021 }
3022 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3023 if (rc) {
3024 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3025 return rc;
3026 }
3027
3028 return 0;
3029}
3030
3031static void qede_napi_disable_remove(struct qede_dev *edev)
3032{
3033 int i;
3034
3035 for_each_rss(i) {
3036 napi_disable(&edev->fp_array[i].napi);
3037
3038 netif_napi_del(&edev->fp_array[i].napi);
3039 }
3040}
3041
3042static void qede_napi_add_enable(struct qede_dev *edev)
3043{
3044 int i;
3045
3046 /* Add NAPI objects */
3047 for_each_rss(i) {
3048 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3049 qede_poll, NAPI_POLL_WEIGHT);
3050 napi_enable(&edev->fp_array[i].napi);
3051 }
3052}
3053
3054static void qede_sync_free_irqs(struct qede_dev *edev)
3055{
3056 int i;
3057
3058 for (i = 0; i < edev->int_info.used_cnt; i++) {
3059 if (edev->int_info.msix_cnt) {
3060 synchronize_irq(edev->int_info.msix[i].vector);
3061 free_irq(edev->int_info.msix[i].vector,
3062 &edev->fp_array[i]);
3063 } else {
3064 edev->ops->common->simd_handler_clean(edev->cdev, i);
3065 }
3066 }
3067
3068 edev->int_info.used_cnt = 0;
3069}
3070
3071static int qede_req_msix_irqs(struct qede_dev *edev)
3072{
3073 int i, rc;
3074
3075 /* Sanitize number of interrupts == number of prepared RSS queues */
3076 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3077 DP_ERR(edev,
3078 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3079 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3080 return -EINVAL;
3081 }
3082
3083 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3084 rc = request_irq(edev->int_info.msix[i].vector,
3085 qede_msix_fp_int, 0, edev->fp_array[i].name,
3086 &edev->fp_array[i]);
3087 if (rc) {
3088 DP_ERR(edev, "Request fp %d irq failed\n", i);
3089 qede_sync_free_irqs(edev);
3090 return rc;
3091 }
3092 DP_VERBOSE(edev, NETIF_MSG_INTR,
3093 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3094 edev->fp_array[i].name, i,
3095 &edev->fp_array[i]);
3096 edev->int_info.used_cnt++;
3097 }
3098
3099 return 0;
3100}
3101
3102static void qede_simd_fp_handler(void *cookie)
3103{
3104 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3105
3106 napi_schedule_irqoff(&fp->napi);
3107}
3108
3109static int qede_setup_irqs(struct qede_dev *edev)
3110{
3111 int i, rc = 0;
3112
3113 /* Learn Interrupt configuration */
3114 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3115 if (rc)
3116 return rc;
3117
3118 if (edev->int_info.msix_cnt) {
3119 rc = qede_req_msix_irqs(edev);
3120 if (rc)
3121 return rc;
3122 edev->ndev->irq = edev->int_info.msix[0].vector;
3123 } else {
3124 const struct qed_common_ops *ops;
3125
3126 /* qed should learn receive the RSS ids and callbacks */
3127 ops = edev->ops->common;
3128 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3129 ops->simd_handler_config(edev->cdev,
3130 &edev->fp_array[i], i,
3131 qede_simd_fp_handler);
3132 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3133 }
3134 return 0;
3135}
3136
3137static int qede_drain_txq(struct qede_dev *edev,
1a635e48 3138 struct qede_tx_queue *txq, bool allow_drain)
2950219d
YM		 3139{
3140 int rc, cnt = 1000;
3141
3142 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3143 if (!cnt) {
3144 if (allow_drain) {
3145 DP_NOTICE(edev,
3146 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3147 txq->index);
3148 rc = edev->ops->common->drain(edev->cdev);
3149 if (rc)
3150 return rc;
3151 return qede_drain_txq(edev, txq, false);
3152 }
3153 DP_NOTICE(edev,
3154 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3155 txq->index, txq->sw_tx_prod,
3156 txq->sw_tx_cons);
3157 return -ENODEV;
3158 }
3159 cnt--;
3160 usleep_range(1000, 2000);
3161 barrier();
3162 }
3163
3164 /* FW finished processing, wait for HW to transmit all tx packets */
3165 usleep_range(1000, 2000);
3166
3167 return 0;
3168}
3169
3170static int qede_stop_queues(struct qede_dev *edev)
3171{
3172 struct qed_update_vport_params vport_update_params;
3173 struct qed_dev *cdev = edev->cdev;
3174 int rc, tc, i;
3175
3176 /* Disable the vport */
3177 memset(&vport_update_params, 0, sizeof(vport_update_params));
3178 vport_update_params.vport_id = 0;
3179 vport_update_params.update_vport_active_flg = 1;
3180 vport_update_params.vport_active_flg = 0;
3181 vport_update_params.update_rss_flg = 0;
3182
3183 rc = edev->ops->vport_update(cdev, &vport_update_params);
3184 if (rc) {
3185 DP_ERR(edev, "Failed to update vport\n");
3186 return rc;
3187 }
3188
3189 /* Flush Tx queues. If needed, request drain from MCP */
3190 for_each_rss(i) {
3191 struct qede_fastpath *fp = &edev->fp_array[i];
3192
3193 for (tc = 0; tc < edev->num_tc; tc++) {
3194 struct qede_tx_queue *txq = &fp->txqs[tc];
3195
3196 rc = qede_drain_txq(edev, txq, true);
3197 if (rc)
3198 return rc;
3199 }
3200 }
3201
3202 /* Stop all Queues in reverse order*/
3203 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3204 struct qed_stop_rxq_params rx_params;
3205
3206 /* Stop the Tx Queue(s)*/
3207 for (tc = 0; tc < edev->num_tc; tc++) {
3208 struct qed_stop_txq_params tx_params;
3209
3210 tx_params.rss_id = i;
3211 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3212 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3213 if (rc) {
3214 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3215 tx_params.tx_queue_id);
3216 return rc;
3217 }
3218 }
3219
3220 /* Stop the Rx Queue*/
3221 memset(&rx_params, 0, sizeof(rx_params));
3222 rx_params.rss_id = i;
3223 rx_params.rx_queue_id = i;
3224
3225 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3226 if (rc) {
3227 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3228 return rc;
3229 }
3230 }
3231
3232 /* Stop the vport */
3233 rc = edev->ops->vport_stop(cdev, 0);
3234 if (rc)
3235 DP_ERR(edev, "Failed to stop VPORT\n");
3236
3237 return rc;
3238}
3239
a0d26d5a 3240static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2950219d
YM		 3241{
3242 int rc, tc, i;
088c8618 3243 int vlan_removal_en = 1;
2950219d 3244 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 3245 struct qed_update_vport_params vport_update_params;
3246 struct qed_queue_start_common_params q_params;
fefb0202 3247 struct qed_dev_info *qed_info = &edev->dev_info.common;
088c8618 3248 struct qed_start_vport_params start = {0};
961acdea 3249 bool reset_rss_indir = false;
2950219d
YM		 3250
3251 if (!edev->num_rss) {
3252 DP_ERR(edev,
3253 "Cannot update V-VPORT as active as there are no Rx queues\n");
3254 return -EINVAL;
3255 }
3256
55482edc 3257 start.gro_enable = !edev->gro_disable;
088c8618
MC		 3258 start.mtu = edev->ndev->mtu;
3259 start.vport_id = 0;
3260 start.drop_ttl0 = true;
3261 start.remove_inner_vlan = vlan_removal_en;
7f7a144f 3262 start.clear_stats = clear_stats;
088c8618
MC		 3263
3264 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 3265
3266 if (rc) {
3267 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3268 return rc;
3269 }
3270
3271 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3272 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 3273 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d
YM		 3274
3275 for_each_rss(i) {
3276 struct qede_fastpath *fp = &edev->fp_array[i];
3277 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3278
3279 memset(&q_params, 0, sizeof(q_params));
3280 q_params.rss_id = i;
3281 q_params.queue_id = i;
3282 q_params.vport_id = 0;
3283 q_params.sb = fp->sb_info->igu_sb_id;
3284 q_params.sb_idx = RX_PI;
3285
3286 rc = edev->ops->q_rx_start(cdev, &q_params,
3287 fp->rxq->rx_buf_size,
3288 fp->rxq->rx_bd_ring.p_phys_addr,
3289 phys_table,
3290 fp->rxq->rx_comp_ring.page_cnt,
3291 &fp->rxq->hw_rxq_prod_addr);
3292 if (rc) {
3293 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3294 return rc;
3295 }
3296
3297 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3298
3299 qede_update_rx_prod(edev, fp->rxq);
3300
3301 for (tc = 0; tc < edev->num_tc; tc++) {
3302 struct qede_tx_queue *txq = &fp->txqs[tc];
3303 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3304
3305 memset(&q_params, 0, sizeof(q_params));
3306 q_params.rss_id = i;
3307 q_params.queue_id = txq_index;
3308 q_params.vport_id = 0;
3309 q_params.sb = fp->sb_info->igu_sb_id;
3310 q_params.sb_idx = TX_PI(tc);
3311
3312 rc = edev->ops->q_tx_start(cdev, &q_params,
3313 txq->tx_pbl.pbl.p_phys_table,
3314 txq->tx_pbl.page_cnt,
3315 &txq->doorbell_addr);
3316 if (rc) {
3317 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3318 txq_index, rc);
3319 return rc;
3320 }
3321
3322 txq->hw_cons_ptr =
3323 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3324 SET_FIELD(txq->tx_db.data.params,
3325 ETH_DB_DATA_DEST, DB_DEST_XCM);
3326 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3327 DB_AGG_CMD_SET);
3328 SET_FIELD(txq->tx_db.data.params,
3329 ETH_DB_DATA_AGG_VAL_SEL,
3330 DQ_XCM_ETH_TX_BD_PROD_CMD);
3331
3332 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3333 }
3334 }
3335
3336 /* Prepare and send the vport enable */
3337 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3338 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3339 vport_update_params.update_vport_active_flg = 1;
3340 vport_update_params.vport_active_flg = 1;
3341
831bfb0e
YM		 3342 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3343 qed_info->tx_switching) {
3344 vport_update_params.update_tx_switching_flg = 1;
3345 vport_update_params.tx_switching_flg = 1;
3346 }
3347
2950219d
YM		 3348 /* Fill struct with RSS params */
3349 if (QEDE_RSS_CNT(edev) > 1) {
3350 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3351
3352 /* Need to validate current RSS config uses valid entries */
3353 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3354 if (edev->rss_params.rss_ind_table[i] >=
3355 edev->num_rss) {
3356 reset_rss_indir = true;
3357 break;
3358 }
3359 }
3360
3361 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3362 reset_rss_indir) {
3363 u16 val;
3364
3365 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3366 u16 indir_val;
3367
3368 val = QEDE_RSS_CNT(edev);
3369 indir_val = ethtool_rxfh_indir_default(i, val);
3370 edev->rss_params.rss_ind_table[i] = indir_val;
3371 }
3372 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3373 }
3374
3375 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3376 netdev_rss_key_fill(edev->rss_params.rss_key,
3377 sizeof(edev->rss_params.rss_key));
3378 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3379 }
3380
3381 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3382 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3383 QED_RSS_IPV6 |
3384 QED_RSS_IPV4_TCP |
3385 QED_RSS_IPV6_TCP;
3386 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3387 }
3388
3389 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3390 sizeof(vport_update_params.rss_params));
2950219d 3391 } else {
961acdea
SRK		 3392 memset(&vport_update_params.rss_params, 0,
3393 sizeof(vport_update_params.rss_params));
2950219d 3394 }
2950219d
YM		 3395
3396 rc = edev->ops->vport_update(cdev, &vport_update_params);
3397 if (rc) {
3398 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3399 return rc;
3400 }
3401
3402 return 0;
3403}
3404
0d8e0aa0
SK		 3405static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3406 enum qed_filter_xcast_params_type opcode,
3407 unsigned char *mac, int num_macs)
3408{
3409 struct qed_filter_params filter_cmd;
3410 int i;
3411
3412 memset(&filter_cmd, 0, sizeof(filter_cmd));
3413 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3414 filter_cmd.filter.mcast.type = opcode;
3415 filter_cmd.filter.mcast.num = num_macs;
3416
3417 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3418 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3419
3420 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3421}
3422
2950219d
YM		 3423enum qede_unload_mode {
3424 QEDE_UNLOAD_NORMAL,
3425};
3426
3427static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3428{
a2ec6172 3429 struct qed_link_params link_params;
2950219d
YM		 3430 int rc;
3431
3432 DP_INFO(edev, "Starting qede unload\n");
3433
0d8e0aa0
SK		 3434 mutex_lock(&edev->qede_lock);
3435 edev->state = QEDE_STATE_CLOSED;
3436
2950219d
YM		 3437 /* Close OS Tx */
3438 netif_tx_disable(edev->ndev);
3439 netif_carrier_off(edev->ndev);
3440
a2ec6172
SK		 3441 /* Reset the link */
3442 memset(&link_params, 0, sizeof(link_params));
3443 link_params.link_up = false;
3444 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3445 rc = qede_stop_queues(edev);
3446 if (rc) {
3447 qede_sync_free_irqs(edev);
3448 goto out;
3449 }
3450
3451 DP_INFO(edev, "Stopped Queues\n");
3452
7c1bfcad 3453 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3454 edev->ops->fastpath_stop(edev->cdev);
3455
3456 /* Release the interrupts */
3457 qede_sync_free_irqs(edev);
3458 edev->ops->common->set_fp_int(edev->cdev, 0);
3459
3460 qede_napi_disable_remove(edev);
3461
3462 qede_free_mem_load(edev);
3463 qede_free_fp_array(edev);
3464
3465out:
3466 mutex_unlock(&edev->qede_lock);
3467 DP_INFO(edev, "Ending qede unload\n");
3468}
3469
3470enum qede_load_mode {
3471 QEDE_LOAD_NORMAL,
a0d26d5a 3472 QEDE_LOAD_RELOAD,
2950219d
YM		 3473};
3474
3475static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3476{
a2ec6172
SK		 3477 struct qed_link_params link_params;
3478 struct qed_link_output link_output;
2950219d
YM		 3479 int rc;
3480
3481 DP_INFO(edev, "Starting qede load\n");
3482
3483 rc = qede_set_num_queues(edev);
3484 if (rc)
3485 goto err0;
3486
3487 rc = qede_alloc_fp_array(edev);
3488 if (rc)
3489 goto err0;
3490
3491 qede_init_fp(edev);
3492
3493 rc = qede_alloc_mem_load(edev);
3494 if (rc)
3495 goto err1;
3496 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3497 QEDE_RSS_CNT(edev), edev->num_tc);
3498
3499 rc = qede_set_real_num_queues(edev);
3500 if (rc)
3501 goto err2;
3502
3503 qede_napi_add_enable(edev);
3504 DP_INFO(edev, "Napi added and enabled\n");
3505
3506 rc = qede_setup_irqs(edev);
3507 if (rc)
3508 goto err3;
3509 DP_INFO(edev, "Setup IRQs succeeded\n");
3510
a0d26d5a 3511 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2950219d
YM		 3512 if (rc)
3513 goto err4;
3514 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3515
3516 /* Add primary mac and set Rx filters */
3517 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3518
0d8e0aa0
SK		 3519 mutex_lock(&edev->qede_lock);
3520 edev->state = QEDE_STATE_OPEN;
3521 mutex_unlock(&edev->qede_lock);
a2ec6172 3522
7c1bfcad
SRK		 3523 /* Program un-configured VLANs */
3524 qede_configure_vlan_filters(edev);
3525
a2ec6172
SK		 3526 /* Ask for link-up using current configuration */
3527 memset(&link_params, 0, sizeof(link_params));
3528 link_params.link_up = true;
3529 edev->ops->common->set_link(edev->cdev, &link_params);
3530
3531 /* Query whether link is already-up */
3532 memset(&link_output, 0, sizeof(link_output));
3533 edev->ops->common->get_link(edev->cdev, &link_output);
3534 qede_link_update(edev, &link_output);
3535
2950219d
YM		 3536 DP_INFO(edev, "Ending successfully qede load\n");
3537
3538 return 0;
3539
3540err4:
3541 qede_sync_free_irqs(edev);
3542 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3543err3:
3544 qede_napi_disable_remove(edev);
3545err2:
3546 qede_free_mem_load(edev);
3547err1:
3548 edev->ops->common->set_fp_int(edev->cdev, 0);
3549 qede_free_fp_array(edev);
3550 edev->num_rss = 0;
3551err0:
3552 return rc;
3553}
3554
133fac0e
SK		 3555void qede_reload(struct qede_dev *edev,
3556 void (*func)(struct qede_dev *, union qede_reload_args *),
3557 union qede_reload_args *args)
3558{
3559 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3560 /* Call function handler to update parameters
3561 * needed for function load.
3562 */
3563 if (func)
3564 func(edev, args);
3565
a0d26d5a 3566 qede_load(edev, QEDE_LOAD_RELOAD);
133fac0e
SK		 3567
3568 mutex_lock(&edev->qede_lock);
3569 qede_config_rx_mode(edev->ndev);
3570 mutex_unlock(&edev->qede_lock);
3571}
3572
2950219d
YM		 3573/* called with rtnl_lock */
3574static int qede_open(struct net_device *ndev)
3575{
3576 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3577 int rc;
2950219d
YM		 3578
3579 netif_carrier_off(ndev);
3580
3581 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3582
b18e170c
MC		 3583 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3584
3585 if (rc)
3586 return rc;
3587
f9f082a9
AD		 3588 udp_tunnel_get_rx_info(ndev);
3589
b18e170c 3590 return 0;
2950219d
YM		 3591}
3592
3593static int qede_close(struct net_device *ndev)
3594{
3595 struct qede_dev *edev = netdev_priv(ndev);
3596
3597 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3598
3599 return 0;
3600}
0d8e0aa0 3601
a2ec6172
SK		 3602static void qede_link_update(void *dev, struct qed_link_output *link)
3603{
3604 struct qede_dev *edev = dev;
3605
3606 if (!netif_running(edev->ndev)) {
3607 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3608 return;
3609 }
3610
3611 if (link->link_up) {
8e025ae2
YM		 3612 if (!netif_carrier_ok(edev->ndev)) {
3613 DP_NOTICE(edev, "Link is up\n");
3614 netif_tx_start_all_queues(edev->ndev);
3615 netif_carrier_on(edev->ndev);
3616 }
a2ec6172 3617 } else {
8e025ae2
YM		 3618 if (netif_carrier_ok(edev->ndev)) {
3619 DP_NOTICE(edev, "Link is down\n");
3620 netif_tx_disable(edev->ndev);
3621 netif_carrier_off(edev->ndev);
3622 }
a2ec6172
SK		 3623 }
3624}
3625
0d8e0aa0
SK		 3626static int qede_set_mac_addr(struct net_device *ndev, void *p)
3627{
3628 struct qede_dev *edev = netdev_priv(ndev);
3629 struct sockaddr *addr = p;
3630 int rc;
3631
3632 ASSERT_RTNL(); /* @@@TBD To be removed */
3633
3634 DP_INFO(edev, "Set_mac_addr called\n");
3635
3636 if (!is_valid_ether_addr(addr->sa_data)) {
3637 DP_NOTICE(edev, "The MAC address is not valid\n");
3638 return -EFAULT;
3639 }
3640
eff16960
YM		 3641 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3642 DP_NOTICE(edev, "qed prevents setting MAC\n");
3643 return -EINVAL;
3644 }
3645
0d8e0aa0
SK		 3646 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3647
3648 if (!netif_running(ndev)) {
3649 DP_NOTICE(edev, "The device is currently down\n");
3650 return 0;
3651 }
3652
3653 /* Remove the previous primary mac */
3654 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3655 edev->primary_mac);
3656 if (rc)
3657 return rc;
3658
3659 /* Add MAC filter according to the new unicast HW MAC address */
3660 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3661 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3662 edev->primary_mac);
3663}
3664
3665static int
3666qede_configure_mcast_filtering(struct net_device *ndev,
3667 enum qed_filter_rx_mode_type *accept_flags)
3668{
3669 struct qede_dev *edev = netdev_priv(ndev);
3670 unsigned char *mc_macs, *temp;
3671 struct netdev_hw_addr *ha;
3672 int rc = 0, mc_count;
3673 size_t size;
3674
3675 size = 64 * ETH_ALEN;
3676
3677 mc_macs = kzalloc(size, GFP_KERNEL);
3678 if (!mc_macs) {
3679 DP_NOTICE(edev,
3680 "Failed to allocate memory for multicast MACs\n");
3681 rc = -ENOMEM;
3682 goto exit;
3683 }
3684
3685 temp = mc_macs;
3686
3687 /* Remove all previously configured MAC filters */
3688 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3689 mc_macs, 1);
3690 if (rc)
3691 goto exit;
3692
3693 netif_addr_lock_bh(ndev);
3694
3695 mc_count = netdev_mc_count(ndev);
3696 if (mc_count < 64) {
3697 netdev_for_each_mc_addr(ha, ndev) {
3698 ether_addr_copy(temp, ha->addr);
3699 temp += ETH_ALEN;
3700 }
3701 }
3702
3703 netif_addr_unlock_bh(ndev);
3704
3705 /* Check for all multicast @@@TBD resource allocation */
3706 if ((ndev->flags & IFF_ALLMULTI) ||
3707 (mc_count > 64)) {
3708 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3709 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3710 } else {
3711 /* Add all multicast MAC filters */
3712 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3713 mc_macs, mc_count);
3714 }
3715
3716exit:
3717 kfree(mc_macs);
3718 return rc;
3719}
3720
3721static void qede_set_rx_mode(struct net_device *ndev)
3722{
3723 struct qede_dev *edev = netdev_priv(ndev);
3724
3725 DP_INFO(edev, "qede_set_rx_mode called\n");
3726
3727 if (edev->state != QEDE_STATE_OPEN) {
3728 DP_INFO(edev,
3729 "qede_set_rx_mode called while interface is down\n");
3730 } else {
3731 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3732 schedule_delayed_work(&edev->sp_task, 0);
3733 }
3734}
3735
3736/* Must be called with qede_lock held */
3737static void qede_config_rx_mode(struct net_device *ndev)
3738{
3739 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3740 struct qede_dev *edev = netdev_priv(ndev);
3741 struct qed_filter_params rx_mode;
3742 unsigned char *uc_macs, *temp;
3743 struct netdev_hw_addr *ha;
3744 int rc, uc_count;
3745 size_t size;
3746
3747 netif_addr_lock_bh(ndev);
3748
3749 uc_count = netdev_uc_count(ndev);
3750 size = uc_count * ETH_ALEN;
3751
3752 uc_macs = kzalloc(size, GFP_ATOMIC);
3753 if (!uc_macs) {
3754 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3755 netif_addr_unlock_bh(ndev);
3756 return;
3757 }
3758
3759 temp = uc_macs;
3760 netdev_for_each_uc_addr(ha, ndev) {
3761 ether_addr_copy(temp, ha->addr);
3762 temp += ETH_ALEN;
3763 }
3764
3765 netif_addr_unlock_bh(ndev);
3766
3767 /* Configure the struct for the Rx mode */
3768 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3769 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3770
3771 /* Remove all previous unicast secondary macs and multicast macs
3772 * (configrue / leave the primary mac)
3773 */
3774 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3775 edev->primary_mac);
3776 if (rc)
3777 goto out;
3778
3779 /* Check for promiscuous */
3780 if ((ndev->flags & IFF_PROMISC) ||
3781 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3782 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3783 } else {
3784 /* Add MAC filters according to the unicast secondary macs */
3785 int i;
3786
3787 temp = uc_macs;
3788 for (i = 0; i < uc_count; i++) {
3789 rc = qede_set_ucast_rx_mac(edev,
3790 QED_FILTER_XCAST_TYPE_ADD,
3791 temp);
3792 if (rc)
3793 goto out;
3794
3795 temp += ETH_ALEN;
3796 }
3797
3798 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3799 if (rc)
3800 goto out;
3801 }
3802
7c1bfcad
SRK		 3803 /* take care of VLAN mode */
3804 if (ndev->flags & IFF_PROMISC) {
3805 qede_config_accept_any_vlan(edev, true);
3806 } else if (!edev->non_configured_vlans) {
3807 /* It's possible that accept_any_vlan mode is set due to a
3808 * previous setting of IFF_PROMISC. If vlan credits are
3809 * sufficient, disable accept_any_vlan.
3810 */
3811 qede_config_accept_any_vlan(edev, false);
3812 }
3813
0d8e0aa0
SK		 3814 rx_mode.filter.accept_flags = accept_flags;
3815 edev->ops->filter_config(edev->cdev, &rx_mode);
3816out:
3817 kfree(uc_macs);
3818}
Linux kernel - Deliverables
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