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qlcnic: dcb: Add support for CEE Netlink interface.
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_dcb.c
CommitLineData
14d385b9
SC		 1/*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
fb859ed6 8#include <linux/types.h>
14d385b9
SC		 9#include "qlcnic.h"
10
fb859ed6 11#define QLC_DCB_NUM_PARAM 3
48365e48
SC		 12#define QLC_DCB_LOCAL_IDX 0
13#define QLC_DCB_OPER_IDX 1
14#define QLC_DCB_PEER_IDX 2
15
16#define QLC_DCB_GET_MAP(V) (1 << V)
fb859ed6 17
2d8ebcab 18#define QLC_DCB_AEN_BIT 0x2
fb859ed6 19#define QLC_DCB_FW_VER 0x2
14d385b9 20#define QLC_DCB_MAX_TC 0x8
fb859ed6 21#define QLC_DCB_MAX_APP 0x8
48365e48
SC		 22#define QLC_DCB_MAX_PRIO QLC_DCB_MAX_TC
23#define QLC_DCB_MAX_PG QLC_DCB_MAX_TC
14d385b9
SC		 24
25#define QLC_DCB_TSA_SUPPORT(V) (V & 0x1)
26#define QLC_DCB_ETS_SUPPORT(V) ((V >> 1) & 0x1)
27#define QLC_DCB_VERSION_SUPPORT(V) ((V >> 2) & 0xf)
28#define QLC_DCB_MAX_NUM_TC(V) ((V >> 20) & 0xf)
29#define QLC_DCB_MAX_NUM_ETS_TC(V) ((V >> 24) & 0xf)
30#define QLC_DCB_MAX_NUM_PFC_TC(V) ((V >> 28) & 0xf)
fb859ed6
SC		 31#define QLC_DCB_GET_TC_PRIO(X, P) ((X >> (P * 3)) & 0x7)
32#define QLC_DCB_GET_PGID_PRIO(X, P) ((X >> (P * 8)) & 0xff)
33#define QLC_DCB_GET_BWPER_PG(X, P) ((X >> (P * 8)) & 0xff)
34#define QLC_DCB_GET_TSA_PG(X, P) ((X >> (P * 8)) & 0xff)
35#define QLC_DCB_GET_PFC_PRIO(X, P) (((X >> 24) >> P) & 0x1)
36#define QLC_DCB_GET_PROTO_ID_APP(X) ((X >> 8) & 0xffff)
37#define QLC_DCB_GET_SELECTOR_APP(X) (X & 0xff)
38
39#define QLC_DCB_LOCAL_PARAM_FWID 0x3
40#define QLC_DCB_OPER_PARAM_FWID 0x1
41#define QLC_DCB_PEER_PARAM_FWID 0x2
42
43#define QLC_83XX_DCB_GET_NUMAPP(X) ((X >> 2) & 0xf)
44#define QLC_83XX_DCB_TSA_VALID(X) (X & 0x1)
45#define QLC_83XX_DCB_PFC_VALID(X) ((X >> 1) & 0x1)
46#define QLC_83XX_DCB_GET_PRIOMAP_APP(X) (X >> 24)
47
48#define QLC_82XX_DCB_GET_NUMAPP(X) ((X >> 12) & 0xf)
49#define QLC_82XX_DCB_TSA_VALID(X) ((X >> 4) & 0x1)
50#define QLC_82XX_DCB_PFC_VALID(X) ((X >> 5) & 0x1)
51#define QLC_82XX_DCB_GET_PRIOVAL_APP(X) ((X >> 24) & 0x7)
52#define QLC_82XX_DCB_GET_PRIOMAP_APP(X) (1 << X)
53#define QLC_82XX_DCB_PRIO_TC_MAP (0x76543210)
14d385b9 54
48365e48
SC		 55static const struct dcbnl_rtnl_ops qlcnic_dcbnl_ops;
56
2d8ebcab 57static void qlcnic_dcb_aen_work(struct work_struct *);
48365e48 58static void qlcnic_dcb_data_cee_param_map(struct qlcnic_adapter *);
2d8ebcab 59
48365e48 60static inline void __qlcnic_init_dcbnl_ops(struct qlcnic_adapter *);
14d385b9
SC		 61static void __qlcnic_dcb_free(struct qlcnic_adapter *);
62static int __qlcnic_dcb_attach(struct qlcnic_adapter *);
63static int __qlcnic_dcb_query_hw_capability(struct qlcnic_adapter *, char *);
64static void __qlcnic_dcb_get_info(struct qlcnic_adapter *);
65
66static int qlcnic_82xx_dcb_get_hw_capability(struct qlcnic_adapter *);
fb859ed6
SC		 67static int qlcnic_82xx_dcb_query_cee_param(struct qlcnic_adapter *, char *, u8);
68static int qlcnic_82xx_dcb_get_cee_cfg(struct qlcnic_adapter *);
2d8ebcab 69static void qlcnic_82xx_dcb_handle_aen(struct qlcnic_adapter *, void *);
14d385b9
SC		 70
71static int qlcnic_83xx_dcb_get_hw_capability(struct qlcnic_adapter *);
fb859ed6
SC		 72static int qlcnic_83xx_dcb_query_cee_param(struct qlcnic_adapter *, char *, u8);
73static int qlcnic_83xx_dcb_get_cee_cfg(struct qlcnic_adapter *);
2d8ebcab
SC		 74static int qlcnic_83xx_dcb_register_aen(struct qlcnic_adapter *, bool);
75static void qlcnic_83xx_dcb_handle_aen(struct qlcnic_adapter *, void *);
14d385b9
SC		 76
77struct qlcnic_dcb_capability {
78 bool tsa_capability;
79 bool ets_capability;
80 u8 max_num_tc;
81 u8 max_ets_tc;
82 u8 max_pfc_tc;
83 u8 dcb_capability;
84};
85
fb859ed6
SC		 86struct qlcnic_dcb_param {
87 u32 hdr_prio_pfc_map[2];
88 u32 prio_pg_map[2];
89 u32 pg_bw_map[2];
90 u32 pg_tsa_map[2];
91 u32 app[QLC_DCB_MAX_APP];
92};
93
94struct qlcnic_dcb_mbx_params {
95 /* 1st local, 2nd operational 3rd remote */
96 struct qlcnic_dcb_param type[3];
97 u32 prio_tc_map;
98};
99
100struct qlcnic_82xx_dcb_param_mbx_le {
101 __le32 hdr_prio_pfc_map[2];
102 __le32 prio_pg_map[2];
103 __le32 pg_bw_map[2];
104 __le32 pg_tsa_map[2];
105 __le32 app[QLC_DCB_MAX_APP];
106};
107
48365e48
SC		 108enum qlcnic_dcb_selector {
109 QLC_SELECTOR_DEF = 0x0,
110 QLC_SELECTOR_ETHER,
111 QLC_SELECTOR_TCP,
112 QLC_SELECTOR_UDP,
113};
114
115enum qlcnic_dcb_prio_type {
116 QLC_PRIO_NONE = 0,
117 QLC_PRIO_GROUP,
118 QLC_PRIO_LINK,
119};
120
121enum qlcnic_dcb_pfc_type {
122 QLC_PFC_DISABLED = 0,
123 QLC_PFC_FULL,
124 QLC_PFC_TX,
125 QLC_PFC_RX
126};
127
128struct qlcnic_dcb_prio_cfg {
129 bool valid;
130 enum qlcnic_dcb_pfc_type pfc_type;
131};
132
133struct qlcnic_dcb_pg_cfg {
134 bool valid;
135 u8 total_bw_percent; /* of Link/ port BW */
136 u8 prio_count;
137 u8 tsa_type;
138};
139
140struct qlcnic_dcb_tc_cfg {
141 bool valid;
142 struct qlcnic_dcb_prio_cfg prio_cfg[QLC_DCB_MAX_PRIO];
143 enum qlcnic_dcb_prio_type prio_type; /* always prio_link */
144 u8 link_percent; /* % of link bandwidth */
145 u8 bwg_percent; /* % of BWG's bandwidth */
146 u8 up_tc_map;
147 u8 pgid;
148};
149
150struct qlcnic_dcb_app {
151 bool valid;
152 enum qlcnic_dcb_selector selector;
153 u16 protocol;
154 u8 priority;
155};
156
157struct qlcnic_dcb_cee {
158 struct qlcnic_dcb_tc_cfg tc_cfg[QLC_DCB_MAX_TC];
159 struct qlcnic_dcb_pg_cfg pg_cfg[QLC_DCB_MAX_PG];
160 struct qlcnic_dcb_app app[QLC_DCB_MAX_APP];
161 bool tc_param_valid;
162 bool pfc_mode_enable;
163};
164
14d385b9 165struct qlcnic_dcb_cfg {
48365e48
SC		 166 /* 0 - local, 1 - operational, 2 - remote */
167 struct qlcnic_dcb_cee type[QLC_DCB_NUM_PARAM];
14d385b9
SC		 168 struct qlcnic_dcb_capability capability;
169 u32 version;
170};
171
172static struct qlcnic_dcb_ops qlcnic_83xx_dcb_ops = {
48365e48 173 .init_dcbnl_ops = __qlcnic_init_dcbnl_ops,
14d385b9
SC		 174 .free = __qlcnic_dcb_free,
175 .attach = __qlcnic_dcb_attach,
176 .query_hw_capability = __qlcnic_dcb_query_hw_capability,
177 .get_info = __qlcnic_dcb_get_info,
178
179 .get_hw_capability = qlcnic_83xx_dcb_get_hw_capability,
fb859ed6
SC		 180 .query_cee_param = qlcnic_83xx_dcb_query_cee_param,
181 .get_cee_cfg = qlcnic_83xx_dcb_get_cee_cfg,
2d8ebcab
SC		 182 .register_aen = qlcnic_83xx_dcb_register_aen,
183 .handle_aen = qlcnic_83xx_dcb_handle_aen,
14d385b9
SC		 184};
185
186static struct qlcnic_dcb_ops qlcnic_82xx_dcb_ops = {
48365e48 187 .init_dcbnl_ops = __qlcnic_init_dcbnl_ops,
14d385b9
SC		 188 .free = __qlcnic_dcb_free,
189 .attach = __qlcnic_dcb_attach,
190 .query_hw_capability = __qlcnic_dcb_query_hw_capability,
191 .get_info = __qlcnic_dcb_get_info,
192
193 .get_hw_capability = qlcnic_82xx_dcb_get_hw_capability,
fb859ed6
SC		 194 .query_cee_param = qlcnic_82xx_dcb_query_cee_param,
195 .get_cee_cfg = qlcnic_82xx_dcb_get_cee_cfg,
2d8ebcab 196 .handle_aen = qlcnic_82xx_dcb_handle_aen,
14d385b9
SC		 197};
198
fb859ed6
SC		 199static u8 qlcnic_dcb_get_num_app(struct qlcnic_adapter *adapter, u32 val)
200{
201 if (qlcnic_82xx_check(adapter))
202 return QLC_82XX_DCB_GET_NUMAPP(val);
203 else
204 return QLC_83XX_DCB_GET_NUMAPP(val);
205}
206
48365e48
SC		 207static inline u8 qlcnic_dcb_pfc_hdr_valid(struct qlcnic_adapter *adapter,
208 u32 val)
209{
210 if (qlcnic_82xx_check(adapter))
211 return QLC_82XX_DCB_PFC_VALID(val);
212 else
213 return QLC_83XX_DCB_PFC_VALID(val);
214}
215
216static inline u8 qlcnic_dcb_tsa_hdr_valid(struct qlcnic_adapter *adapter,
217 u32 val)
218{
219 if (qlcnic_82xx_check(adapter))
220 return QLC_82XX_DCB_TSA_VALID(val);
221 else
222 return QLC_83XX_DCB_TSA_VALID(val);
223}
224
225static inline u8 qlcnic_dcb_get_prio_map_app(struct qlcnic_adapter *adapter,
226 u32 val)
227{
228 if (qlcnic_82xx_check(adapter))
229 return QLC_82XX_DCB_GET_PRIOMAP_APP(val);
230 else
231 return QLC_83XX_DCB_GET_PRIOMAP_APP(val);
232}
233
234static int qlcnic_dcb_prio_count(u8 up_tc_map)
235{
236 int j;
237
238 for (j = 0; j < QLC_DCB_MAX_TC; j++)
239 if (up_tc_map & QLC_DCB_GET_MAP(j))
240 break;
241
242 return j;
243}
244
245static inline void __qlcnic_init_dcbnl_ops(struct qlcnic_adapter *adapter)
246{
247 if (test_bit(__QLCNIC_DCB_STATE, &adapter->state))
248 adapter->netdev->dcbnl_ops = &qlcnic_dcbnl_ops;
249}
250
14d385b9
SC		 251void qlcnic_set_dcb_ops(struct qlcnic_adapter *adapter)
252{
253 if (qlcnic_82xx_check(adapter))
254 adapter->dcb->ops = &qlcnic_82xx_dcb_ops;
255 else if (qlcnic_83xx_check(adapter))
256 adapter->dcb->ops = &qlcnic_83xx_dcb_ops;
257}
258
259int __qlcnic_register_dcb(struct qlcnic_adapter *adapter)
260{
261 struct qlcnic_dcb *dcb;
262
263 dcb = kzalloc(sizeof(struct qlcnic_dcb), GFP_ATOMIC);
264 if (!dcb)
265 return -ENOMEM;
266
267 adapter->dcb = dcb;
2d8ebcab 268 dcb->adapter = adapter;
14d385b9
SC		 269 qlcnic_set_dcb_ops(adapter);
270
271 return 0;
272}
273
274static void __qlcnic_dcb_free(struct qlcnic_adapter *adapter)
275{
276 struct qlcnic_dcb *dcb = adapter->dcb;
277
278 if (!dcb)
279 return;
280
2d8ebcab
SC		 281 qlcnic_dcb_register_aen(adapter, 0);
282
283 while (test_bit(__QLCNIC_DCB_IN_AEN, &adapter->state))
284 usleep_range(10000, 11000);
285
286 cancel_delayed_work_sync(&dcb->aen_work);
287
288 if (dcb->wq) {
289 destroy_workqueue(dcb->wq);
290 dcb->wq = NULL;
291 }
292
14d385b9
SC		 293 kfree(dcb->cfg);
294 dcb->cfg = NULL;
fb859ed6
SC		 295 kfree(dcb->param);
296 dcb->param = NULL;
14d385b9
SC		 297 kfree(dcb);
298 adapter->dcb = NULL;
299}
300
301static void __qlcnic_dcb_get_info(struct qlcnic_adapter *adapter)
302{
303 qlcnic_dcb_get_hw_capability(adapter);
fb859ed6 304 qlcnic_dcb_get_cee_cfg(adapter);
2d8ebcab 305 qlcnic_dcb_register_aen(adapter, 1);
14d385b9
SC		 306}
307
308static int __qlcnic_dcb_attach(struct qlcnic_adapter *adapter)
309{
310 struct qlcnic_dcb *dcb = adapter->dcb;
fb859ed6 311 int err = 0;
14d385b9 312
2d8ebcab
SC		 313 INIT_DELAYED_WORK(&dcb->aen_work, qlcnic_dcb_aen_work);
314
315 dcb->wq = create_singlethread_workqueue("qlcnic-dcb");
316 if (!dcb->wq) {
317 dev_err(&adapter->pdev->dev,
318 "DCB workqueue allocation failed. DCB will be disabled\n");
319 return -1;
320 }
321
14d385b9 322 dcb->cfg = kzalloc(sizeof(struct qlcnic_dcb_cfg), GFP_ATOMIC);
2d8ebcab
SC		 323 if (!dcb->cfg) {
324 err = -ENOMEM;
325 goto out_free_wq;
326 }
14d385b9 327
fb859ed6
SC		 328 dcb->param = kzalloc(sizeof(struct qlcnic_dcb_mbx_params), GFP_ATOMIC);
329 if (!dcb->param) {
330 err = -ENOMEM;
331 goto out_free_cfg;
332 }
333
14d385b9
SC		 334 qlcnic_dcb_get_info(adapter);
335
336 return 0;
fb859ed6
SC		 337out_free_cfg:
338 kfree(dcb->cfg);
339 dcb->cfg = NULL;
340
2d8ebcab
SC		 341out_free_wq:
342 destroy_workqueue(dcb->wq);
343 dcb->wq = NULL;
344
fb859ed6 345 return err;
14d385b9
SC		 346}
347
348static int __qlcnic_dcb_query_hw_capability(struct qlcnic_adapter *adapter,
349 char *buf)
350{
351 struct qlcnic_cmd_args cmd;
352 u32 mbx_out;
353 int err;
354
355 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_CAP);
356 if (err)
357 return err;
358
359 err = qlcnic_issue_cmd(adapter, &cmd);
360 if (err) {
361 dev_err(&adapter->pdev->dev,
362 "Failed to query DCBX capability, err %d\n", err);
363 } else {
364 mbx_out = cmd.rsp.arg[1];
365 if (buf)
366 memcpy(buf, &mbx_out, sizeof(u32));
367 }
368
369 qlcnic_free_mbx_args(&cmd);
370
371 return err;
372}
373
374static int __qlcnic_dcb_get_capability(struct qlcnic_adapter *adapter, u32 *val)
375{
376 struct qlcnic_dcb_capability *cap = &adapter->dcb->cfg->capability;
377 u32 mbx_out;
378 int err;
379
380 memset(cap, 0, sizeof(struct qlcnic_dcb_capability));
381
382 err = qlcnic_dcb_query_hw_capability(adapter, (char *)val);
383 if (err)
384 return err;
385
386 mbx_out = *val;
387 if (QLC_DCB_TSA_SUPPORT(mbx_out))
388 cap->tsa_capability = true;
389
390 if (QLC_DCB_ETS_SUPPORT(mbx_out))
391 cap->ets_capability = true;
392
393 cap->max_num_tc = QLC_DCB_MAX_NUM_TC(mbx_out);
394 cap->max_ets_tc = QLC_DCB_MAX_NUM_ETS_TC(mbx_out);
395 cap->max_pfc_tc = QLC_DCB_MAX_NUM_PFC_TC(mbx_out);
396
397 if (cap->max_num_tc > QLC_DCB_MAX_TC ||
398 cap->max_ets_tc > cap->max_num_tc ||
399 cap->max_pfc_tc > cap->max_num_tc) {
400 dev_err(&adapter->pdev->dev, "Invalid DCB configuration\n");
401 return -EINVAL;
402 }
403
404 return err;
405}
406
407static int qlcnic_82xx_dcb_get_hw_capability(struct qlcnic_adapter *adapter)
408{
409 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
410 struct qlcnic_dcb_capability *cap;
411 u32 mbx_out;
412 int err;
413
414 err = __qlcnic_dcb_get_capability(adapter, &mbx_out);
415 if (err)
416 return err;
417
418 cap = &cfg->capability;
419 cap->dcb_capability = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_LLD_MANAGED;
420
421 if (cap->dcb_capability && cap->tsa_capability && cap->ets_capability)
422 set_bit(__QLCNIC_DCB_STATE, &adapter->state);
423
424 return err;
425}
426
fb859ed6
SC		 427static int qlcnic_82xx_dcb_query_cee_param(struct qlcnic_adapter *adapter,
428 char *buf, u8 type)
429{
430 u16 size = sizeof(struct qlcnic_82xx_dcb_param_mbx_le);
431 struct qlcnic_82xx_dcb_param_mbx_le *prsp_le;
432 struct device *dev = &adapter->pdev->dev;
433 dma_addr_t cardrsp_phys_addr;
434 struct qlcnic_dcb_param rsp;
435 struct qlcnic_cmd_args cmd;
436 u64 phys_addr;
437 void *addr;
438 int err, i;
439
440 switch (type) {
441 case QLC_DCB_LOCAL_PARAM_FWID:
442 case QLC_DCB_OPER_PARAM_FWID:
443 case QLC_DCB_PEER_PARAM_FWID:
444 break;
445 default:
446 dev_err(dev, "Invalid parameter type %d\n", type);
447 return -EINVAL;
448 }
449
450 addr = dma_alloc_coherent(&adapter->pdev->dev, size, &cardrsp_phys_addr,
451 GFP_KERNEL);
452 if (addr == NULL)
453 return -ENOMEM;
454
455 prsp_le = addr;
456
457 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_PARAM);
458 if (err)
459 goto out_free_rsp;
460
461 phys_addr = cardrsp_phys_addr;
462 cmd.req.arg[1] = size | (type << 16);
463 cmd.req.arg[2] = MSD(phys_addr);
464 cmd.req.arg[3] = LSD(phys_addr);
465
466 err = qlcnic_issue_cmd(adapter, &cmd);
467 if (err) {
468 dev_err(dev, "Failed to query DCBX parameter, err %d\n", err);
469 goto out;
470 }
471
472 memset(&rsp, 0, sizeof(struct qlcnic_dcb_param));
473 rsp.hdr_prio_pfc_map[0] = le32_to_cpu(prsp_le->hdr_prio_pfc_map[0]);
474 rsp.hdr_prio_pfc_map[1] = le32_to_cpu(prsp_le->hdr_prio_pfc_map[1]);
475 rsp.prio_pg_map[0] = le32_to_cpu(prsp_le->prio_pg_map[0]);
476 rsp.prio_pg_map[1] = le32_to_cpu(prsp_le->prio_pg_map[1]);
477 rsp.pg_bw_map[0] = le32_to_cpu(prsp_le->pg_bw_map[0]);
478 rsp.pg_bw_map[1] = le32_to_cpu(prsp_le->pg_bw_map[1]);
479 rsp.pg_tsa_map[0] = le32_to_cpu(prsp_le->pg_tsa_map[0]);
480 rsp.pg_tsa_map[1] = le32_to_cpu(prsp_le->pg_tsa_map[1]);
481
482 for (i = 0; i < QLC_DCB_MAX_APP; i++)
483 rsp.app[i] = le32_to_cpu(prsp_le->app[i]);
484
485 if (buf)
486 memcpy(buf, &rsp, size);
487out:
488 qlcnic_free_mbx_args(&cmd);
489
490out_free_rsp:
491 dma_free_coherent(&adapter->pdev->dev, size, addr, cardrsp_phys_addr);
492
493 return err;
494}
495
496static int qlcnic_82xx_dcb_get_cee_cfg(struct qlcnic_adapter *adapter)
497{
498 struct qlcnic_dcb_mbx_params *mbx;
499 int err;
500
501 mbx = adapter->dcb->param;
502 if (!mbx)
503 return 0;
504
505 err = qlcnic_dcb_query_cee_param(adapter, (char *)&mbx->type[0],
506 QLC_DCB_LOCAL_PARAM_FWID);
507 if (err)
508 return err;
509
510 err = qlcnic_dcb_query_cee_param(adapter, (char *)&mbx->type[1],
511 QLC_DCB_OPER_PARAM_FWID);
512 if (err)
513 return err;
514
515 err = qlcnic_dcb_query_cee_param(adapter, (char *)&mbx->type[2],
516 QLC_DCB_PEER_PARAM_FWID);
517 if (err)
518 return err;
519
520 mbx->prio_tc_map = QLC_82XX_DCB_PRIO_TC_MAP;
521
48365e48
SC		 522 qlcnic_dcb_data_cee_param_map(adapter);
523
fb859ed6
SC		 524 return err;
525}
526
2d8ebcab
SC		 527static void qlcnic_dcb_aen_work(struct work_struct *work)
528{
529 struct qlcnic_adapter *adapter;
530 struct qlcnic_dcb *dcb;
531
532 dcb = container_of(work, struct qlcnic_dcb, aen_work.work);
533 adapter = dcb->adapter;
534
535 qlcnic_dcb_get_cee_cfg(adapter);
536 clear_bit(__QLCNIC_DCB_IN_AEN, &adapter->state);
537}
538
539static void qlcnic_82xx_dcb_handle_aen(struct qlcnic_adapter *adapter,
540 void *data)
541{
542 struct qlcnic_dcb *dcb = adapter->dcb;
543
544 if (test_and_set_bit(__QLCNIC_DCB_IN_AEN, &adapter->state))
545 return;
546
547 queue_delayed_work(dcb->wq, &dcb->aen_work, 0);
548}
549
14d385b9
SC		 550static int qlcnic_83xx_dcb_get_hw_capability(struct qlcnic_adapter *adapter)
551{
552 struct qlcnic_dcb_capability *cap = &adapter->dcb->cfg->capability;
553 u32 mbx_out;
554 int err;
555
556 err = __qlcnic_dcb_get_capability(adapter, &mbx_out);
557 if (err)
558 return err;
559
560 if (mbx_out & BIT_2)
561 cap->dcb_capability = DCB_CAP_DCBX_VER_CEE;
562 if (mbx_out & BIT_3)
563 cap->dcb_capability |= DCB_CAP_DCBX_VER_IEEE;
564 if (cap->dcb_capability)
565 cap->dcb_capability |= DCB_CAP_DCBX_LLD_MANAGED;
566
567 if (cap->dcb_capability && cap->tsa_capability && cap->ets_capability)
568 set_bit(__QLCNIC_DCB_STATE, &adapter->state);
569
570 return err;
571}
fb859ed6
SC		 572
573static int qlcnic_83xx_dcb_query_cee_param(struct qlcnic_adapter *adapter,
574 char *buf, u8 idx)
575{
576 struct qlcnic_dcb_mbx_params mbx_out;
577 int err, i, j, k, max_app, size;
578 struct qlcnic_dcb_param *each;
579 struct qlcnic_cmd_args cmd;
580 u32 val;
581 char *p;
582
583 size = 0;
584 memset(&mbx_out, 0, sizeof(struct qlcnic_dcb_mbx_params));
585 memset(buf, 0, sizeof(struct qlcnic_dcb_mbx_params));
586
587 err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_DCB_QUERY_PARAM);
588 if (err)
589 return err;
590
591 cmd.req.arg[0] |= QLC_DCB_FW_VER << 29;
592 err = qlcnic_issue_cmd(adapter, &cmd);
593 if (err) {
594 dev_err(&adapter->pdev->dev,
595 "Failed to query DCBX param, err %d\n", err);
596 goto out;
597 }
598
599 mbx_out.prio_tc_map = cmd.rsp.arg[1];
600 p = memcpy(buf, &mbx_out, sizeof(u32));
601 k = 2;
602 p += sizeof(u32);
603
604 for (j = 0; j < QLC_DCB_NUM_PARAM; j++) {
605 each = &mbx_out.type[j];
606
607 each->hdr_prio_pfc_map[0] = cmd.rsp.arg[k++];
608 each->hdr_prio_pfc_map[1] = cmd.rsp.arg[k++];
609 each->prio_pg_map[0] = cmd.rsp.arg[k++];
610 each->prio_pg_map[1] = cmd.rsp.arg[k++];
611 each->pg_bw_map[0] = cmd.rsp.arg[k++];
612 each->pg_bw_map[1] = cmd.rsp.arg[k++];
613 each->pg_tsa_map[0] = cmd.rsp.arg[k++];
614 each->pg_tsa_map[1] = cmd.rsp.arg[k++];
615 val = each->hdr_prio_pfc_map[0];
616
617 max_app = qlcnic_dcb_get_num_app(adapter, val);
618 for (i = 0; i < max_app; i++)
619 each->app[i] = cmd.rsp.arg[i + k];
620
621 size = 16 * sizeof(u32);
622 memcpy(p, &each->hdr_prio_pfc_map[0], size);
623 p += size;
624 if (j == 0)
625 k = 18;
626 else
627 k = 34;
628 }
629out:
630 qlcnic_free_mbx_args(&cmd);
631
632 return err;
633}
634
635static int qlcnic_83xx_dcb_get_cee_cfg(struct qlcnic_adapter *adapter)
636{
637 struct qlcnic_dcb *dcb = adapter->dcb;
48365e48 638 int err;
fb859ed6 639
48365e48
SC		 640 err = qlcnic_dcb_query_cee_param(adapter, (char *)dcb->param, 0);
641 if (err)
642 return err;
643
644 qlcnic_dcb_data_cee_param_map(adapter);
645
646 return err;
fb859ed6 647}
2d8ebcab
SC		 648
649static int qlcnic_83xx_dcb_register_aen(struct qlcnic_adapter *adapter,
650 bool flag)
651{
652 u8 val = (flag ? QLCNIC_CMD_INIT_NIC_FUNC : QLCNIC_CMD_STOP_NIC_FUNC);
653 struct qlcnic_cmd_args cmd;
654 int err;
655
656 err = qlcnic_alloc_mbx_args(&cmd, adapter, val);
657 if (err)
658 return err;
659
660 cmd.req.arg[1] = QLC_DCB_AEN_BIT;
661
662 err = qlcnic_issue_cmd(adapter, &cmd);
663 if (err)
664 dev_err(&adapter->pdev->dev, "Failed to %s DCBX AEN, err %d\n",
665 (flag ? "register" : "unregister"), err);
666
667 qlcnic_free_mbx_args(&cmd);
668
669 return err;
670}
671
672static void qlcnic_83xx_dcb_handle_aen(struct qlcnic_adapter *adapter,
673 void *data)
674{
675 struct qlcnic_dcb *dcb = adapter->dcb;
676 u32 *val = data;
677
678 if (test_and_set_bit(__QLCNIC_DCB_IN_AEN, &adapter->state))
679 return;
680
681 if (*val & BIT_8)
682 set_bit(__QLCNIC_DCB_STATE, &adapter->state);
683 else
684 clear_bit(__QLCNIC_DCB_STATE, &adapter->state);
685
686 queue_delayed_work(dcb->wq, &dcb->aen_work, 0);
687}
48365e48
SC		 688
689static void qlcnic_dcb_fill_cee_tc_params(struct qlcnic_dcb_mbx_params *mbx,
690 struct qlcnic_dcb_param *each,
691 struct qlcnic_dcb_cee *type)
692{
693 struct qlcnic_dcb_tc_cfg *tc_cfg;
694 u8 i, tc, pgid;
695
696 for (i = 0; i < QLC_DCB_MAX_PRIO; i++) {
697 tc = QLC_DCB_GET_TC_PRIO(mbx->prio_tc_map, i);
698 tc_cfg = &type->tc_cfg[tc];
699 tc_cfg->valid = true;
700 tc_cfg->up_tc_map |= QLC_DCB_GET_MAP(i);
701
702 if (QLC_DCB_GET_PFC_PRIO(each->hdr_prio_pfc_map[1], i) &&
703 type->pfc_mode_enable) {
704 tc_cfg->prio_cfg[i].valid = true;
705 tc_cfg->prio_cfg[i].pfc_type = QLC_PFC_FULL;
706 }
707
708 if (i < 4)
709 pgid = QLC_DCB_GET_PGID_PRIO(each->prio_pg_map[0], i);
710 else
711 pgid = QLC_DCB_GET_PGID_PRIO(each->prio_pg_map[1], i);
712
713 tc_cfg->pgid = pgid;
714
715 tc_cfg->prio_type = QLC_PRIO_LINK;
716 type->pg_cfg[tc_cfg->pgid].prio_count++;
717 }
718}
719
720static void qlcnic_dcb_fill_cee_pg_params(struct qlcnic_dcb_param *each,
721 struct qlcnic_dcb_cee *type)
722{
723 struct qlcnic_dcb_pg_cfg *pg_cfg;
724 u8 i, tsa, bw_per;
725
726 for (i = 0; i < QLC_DCB_MAX_PG; i++) {
727 pg_cfg = &type->pg_cfg[i];
728 pg_cfg->valid = true;
729
730 if (i < 4) {
731 bw_per = QLC_DCB_GET_BWPER_PG(each->pg_bw_map[0], i);
732 tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[0], i);
733 } else {
734 bw_per = QLC_DCB_GET_BWPER_PG(each->pg_bw_map[1], i);
735 tsa = QLC_DCB_GET_TSA_PG(each->pg_tsa_map[1], i);
736 }
737
738 pg_cfg->total_bw_percent = bw_per;
739 pg_cfg->tsa_type = tsa;
740 }
741}
742
743static void
744qlcnic_dcb_fill_cee_app_params(struct qlcnic_adapter *adapter, u8 idx,
745 struct qlcnic_dcb_param *each,
746 struct qlcnic_dcb_cee *type)
747{
748 struct qlcnic_dcb_app *app;
749 u8 i, num_app, map, cnt;
750 struct dcb_app new_app;
751
752 num_app = qlcnic_dcb_get_num_app(adapter, each->hdr_prio_pfc_map[0]);
753 for (i = 0; i < num_app; i++) {
754 app = &type->app[i];
755 app->valid = true;
756
757 /* Only for CEE (-1) */
758 app->selector = QLC_DCB_GET_SELECTOR_APP(each->app[i]) - 1;
759 new_app.selector = app->selector;
760 app->protocol = QLC_DCB_GET_PROTO_ID_APP(each->app[i]);
761 new_app.protocol = app->protocol;
762 map = qlcnic_dcb_get_prio_map_app(adapter, each->app[i]);
763 cnt = qlcnic_dcb_prio_count(map);
764
765 if (cnt >= QLC_DCB_MAX_TC)
766 cnt = 0;
767
768 app->priority = cnt;
769 new_app.priority = cnt;
770
771 if (idx == QLC_DCB_OPER_IDX && adapter->netdev->dcbnl_ops)
772 dcb_setapp(adapter->netdev, &new_app);
773 }
774}
775
776static void qlcnic_dcb_map_cee_params(struct qlcnic_adapter *adapter, u8 idx)
777{
778 struct qlcnic_dcb_mbx_params *mbx = adapter->dcb->param;
779 struct qlcnic_dcb_param *each = &mbx->type[idx];
780 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
781 struct qlcnic_dcb_cee *type = &cfg->type[idx];
782
783 type->tc_param_valid = false;
784 type->pfc_mode_enable = false;
785 memset(type->tc_cfg, 0,
786 sizeof(struct qlcnic_dcb_tc_cfg) * QLC_DCB_MAX_TC);
787 memset(type->pg_cfg, 0,
788 sizeof(struct qlcnic_dcb_pg_cfg) * QLC_DCB_MAX_TC);
789
790 if (qlcnic_dcb_pfc_hdr_valid(adapter, each->hdr_prio_pfc_map[0]) &&
791 cfg->capability.max_pfc_tc)
792 type->pfc_mode_enable = true;
793
794 if (qlcnic_dcb_tsa_hdr_valid(adapter, each->hdr_prio_pfc_map[0]) &&
795 cfg->capability.max_ets_tc)
796 type->tc_param_valid = true;
797
798 qlcnic_dcb_fill_cee_tc_params(mbx, each, type);
799 qlcnic_dcb_fill_cee_pg_params(each, type);
800 qlcnic_dcb_fill_cee_app_params(adapter, idx, each, type);
801}
802
803static void qlcnic_dcb_data_cee_param_map(struct qlcnic_adapter *adapter)
804{
805 int i;
806
807 for (i = 0; i < QLC_DCB_NUM_PARAM; i++)
808 qlcnic_dcb_map_cee_params(adapter, i);
809
810 dcbnl_cee_notify(adapter->netdev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
811}
812
813static u8 qlcnic_dcb_get_state(struct net_device *netdev)
814{
815 struct qlcnic_adapter *adapter = netdev_priv(netdev);
816
817 return test_bit(__QLCNIC_DCB_STATE, &adapter->state);
818}
819
820static void qlcnic_dcb_get_perm_hw_addr(struct net_device *netdev, u8 *addr)
821{
822 memcpy(addr, netdev->dev_addr, netdev->addr_len);
823}
824
825static void
826qlcnic_dcb_get_pg_tc_cfg_tx(struct net_device *netdev, int tc, u8 *prio,
827 u8 *pgid, u8 *bw_per, u8 *up_tc_map)
828{
829 struct qlcnic_adapter *adapter = netdev_priv(netdev);
830 struct qlcnic_dcb_tc_cfg *tc_cfg, *temp;
831 struct qlcnic_dcb_cee *type;
832 u8 i, cnt, pg;
833
834 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
835 *prio = *pgid = *bw_per = *up_tc_map = 0;
836
837 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state) ||
838 !type->tc_param_valid)
839 return;
840
841 if (tc < 0 || (tc > QLC_DCB_MAX_TC))
842 return;
843
844 tc_cfg = &type->tc_cfg[tc];
845 if (!tc_cfg->valid)
846 return;
847
848 *pgid = tc_cfg->pgid;
849 *prio = tc_cfg->prio_type;
850 *up_tc_map = tc_cfg->up_tc_map;
851 pg = *pgid;
852
853 for (i = 0, cnt = 0; i < QLC_DCB_MAX_TC; i++) {
854 temp = &type->tc_cfg[i];
855 if (temp->valid && (pg == temp->pgid))
856 cnt++;
857 }
858
859 tc_cfg->bwg_percent = (100 / cnt);
860 *bw_per = tc_cfg->bwg_percent;
861}
862
863static void qlcnic_dcb_get_pg_bwg_cfg_tx(struct net_device *netdev, int pgid,
864 u8 *bw_pct)
865{
866 struct qlcnic_adapter *adapter = netdev_priv(netdev);
867 struct qlcnic_dcb_pg_cfg *pgcfg;
868 struct qlcnic_dcb_cee *type;
869
870 *bw_pct = 0;
871 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
872
873 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state) ||
874 !type->tc_param_valid)
875 return;
876
877 if (pgid < 0 || pgid > QLC_DCB_MAX_PG)
878 return;
879
880 pgcfg = &type->pg_cfg[pgid];
881 if (!pgcfg->valid)
882 return;
883
884 *bw_pct = pgcfg->total_bw_percent;
885}
886
887static void qlcnic_dcb_get_pfc_cfg(struct net_device *netdev, int prio,
888 u8 *setting)
889{
890 struct qlcnic_adapter *adapter = netdev_priv(netdev);
891 struct qlcnic_dcb_tc_cfg *tc_cfg;
892 u8 val = QLC_DCB_GET_MAP(prio);
893 struct qlcnic_dcb_cee *type;
894 u8 i;
895
896 *setting = 0;
897 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
898
899 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state) ||
900 !type->pfc_mode_enable)
901 return;
902
903 for (i = 0; i < QLC_DCB_MAX_TC; i++) {
904 tc_cfg = &type->tc_cfg[i];
905 if (!tc_cfg->valid)
906 continue;
907
908 if ((val & tc_cfg->up_tc_map) && (tc_cfg->prio_cfg[prio].valid))
909 *setting = tc_cfg->prio_cfg[prio].pfc_type;
910 }
911}
912
913static u8 qlcnic_dcb_get_capability(struct net_device *netdev, int capid,
914 u8 *cap)
915{
916 struct qlcnic_adapter *adapter = netdev_priv(netdev);
917
918 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
919 return 0;
920
921 switch (capid) {
922 case DCB_CAP_ATTR_PG:
923 case DCB_CAP_ATTR_UP2TC:
924 case DCB_CAP_ATTR_PFC:
925 case DCB_CAP_ATTR_GSP:
926 *cap = true;
927 break;
928 case DCB_CAP_ATTR_PG_TCS:
929 case DCB_CAP_ATTR_PFC_TCS:
930 *cap = 0x80; /* 8 priorities for PGs */
931 break;
932 case DCB_CAP_ATTR_DCBX:
933 *cap = adapter->dcb->cfg->capability.dcb_capability;
934 break;
935 default:
936 *cap = false;
937 }
938
939 return 0;
940}
941
942static int qlcnic_dcb_get_num_tcs(struct net_device *netdev, int attr, u8 *num)
943{
944 struct qlcnic_adapter *adapter = netdev_priv(netdev);
945 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
946
947 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
948 return -EINVAL;
949
950 switch (attr) {
951 case DCB_NUMTCS_ATTR_PG:
952 *num = cfg->capability.max_ets_tc;
953 return 0;
954 case DCB_NUMTCS_ATTR_PFC:
955 *num = cfg->capability.max_pfc_tc;
956 return 0;
957 default:
958 return -EINVAL;
959 }
960}
961
962static u8 qlcnic_dcb_get_app(struct net_device *netdev, u8 idtype, u16 id)
963{
964 struct qlcnic_adapter *adapter = netdev_priv(netdev);
965 struct dcb_app app = {
966 .selector = idtype,
967 .protocol = id,
968 };
969
970 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
971 return 0;
972
973 return dcb_getapp(netdev, &app);
974}
975
976static u8 qlcnic_dcb_get_pfc_state(struct net_device *netdev)
977{
978 struct qlcnic_adapter *adapter = netdev_priv(netdev);
979 struct qlcnic_dcb *dcb = adapter->dcb;
980
981 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
982 return 0;
983
984 return dcb->cfg->type[QLC_DCB_OPER_IDX].pfc_mode_enable;
985}
986
987static u8 qlcnic_dcb_get_dcbx(struct net_device *netdev)
988{
989 struct qlcnic_adapter *adapter = netdev_priv(netdev);
990 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
991
992 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
993 return 0;
994
995 return cfg->capability.dcb_capability;
996}
997
998static u8 qlcnic_dcb_get_feat_cfg(struct net_device *netdev, int fid, u8 *flag)
999{
1000 struct qlcnic_adapter *adapter = netdev_priv(netdev);
1001 struct qlcnic_dcb_cee *type;
1002
1003 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
1004 return 1;
1005
1006 type = &adapter->dcb->cfg->type[QLC_DCB_OPER_IDX];
1007 *flag = 0;
1008
1009 switch (fid) {
1010 case DCB_FEATCFG_ATTR_PG:
1011 if (type->tc_param_valid)
1012 *flag |= DCB_FEATCFG_ENABLE;
1013 else
1014 *flag |= DCB_FEATCFG_ERROR;
1015 break;
1016 case DCB_FEATCFG_ATTR_PFC:
1017 if (type->pfc_mode_enable) {
1018 if (type->tc_cfg[0].prio_cfg[0].pfc_type)
1019 *flag |= DCB_FEATCFG_ENABLE;
1020 } else {
1021 *flag |= DCB_FEATCFG_ERROR;
1022 }
1023 break;
1024 case DCB_FEATCFG_ATTR_APP:
1025 *flag |= DCB_FEATCFG_ENABLE;
1026 break;
1027 default:
1028 netdev_err(netdev, "Invalid Feature ID %d\n", fid);
1029 return 1;
1030 }
1031
1032 return 0;
1033}
1034
1035static inline void
1036qlcnic_dcb_get_pg_tc_cfg_rx(struct net_device *netdev, int prio, u8 *prio_type,
1037 u8 *pgid, u8 *bw_pct, u8 *up_map)
1038{
1039 *prio_type = *pgid = *bw_pct = *up_map = 0;
1040}
1041
1042static inline void
1043qlcnic_dcb_get_pg_bwg_cfg_rx(struct net_device *netdev, int pgid, u8 *bw_pct)
1044{
1045 *bw_pct = 0;
1046}
1047
1048static int qlcnic_dcb_peer_app_info(struct net_device *netdev,
1049 struct dcb_peer_app_info *info,
1050 u16 *app_count)
1051{
1052 struct qlcnic_adapter *adapter = netdev_priv(netdev);
1053 struct qlcnic_dcb_cee *peer;
1054 int i;
1055
1056 *app_count = 0;
1057
1058 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
1059 return 0;
1060
1061 peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1062
1063 for (i = 0; i < QLC_DCB_MAX_APP; i++) {
1064 if (peer->app[i].valid)
1065 (*app_count)++;
1066 }
1067
1068 return 0;
1069}
1070
1071static int qlcnic_dcb_peer_app_table(struct net_device *netdev,
1072 struct dcb_app *table)
1073{
1074 struct qlcnic_adapter *adapter = netdev_priv(netdev);
1075 struct qlcnic_dcb_cee *peer;
1076 struct qlcnic_dcb_app *app;
1077 int i, j;
1078
1079 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
1080 return 0;
1081
1082 peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1083
1084 for (i = 0, j = 0; i < QLC_DCB_MAX_APP; i++) {
1085 app = &peer->app[i];
1086 if (!app->valid)
1087 continue;
1088
1089 table[j].selector = app->selector;
1090 table[j].priority = app->priority;
1091 table[j++].protocol = app->protocol;
1092 }
1093
1094 return 0;
1095}
1096
1097static int qlcnic_dcb_cee_peer_get_pg(struct net_device *netdev,
1098 struct cee_pg *pg)
1099{
1100 struct qlcnic_adapter *adapter = netdev_priv(netdev);
1101 struct qlcnic_dcb_cee *peer;
1102 u8 i, j, k, map;
1103
1104 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
1105 return 0;
1106
1107 peer = &adapter->dcb->cfg->type[QLC_DCB_PEER_IDX];
1108
1109 for (i = 0, j = 0; i < QLC_DCB_MAX_PG; i++) {
1110 if (!peer->pg_cfg[i].valid)
1111 continue;
1112
1113 pg->pg_bw[j] = peer->pg_cfg[i].total_bw_percent;
1114
1115 for (k = 0; k < QLC_DCB_MAX_TC; k++) {
1116 if (peer->tc_cfg[i].valid &&
1117 (peer->tc_cfg[i].pgid == i)) {
1118 map = peer->tc_cfg[i].up_tc_map;
1119 pg->prio_pg[j++] = map;
1120 break;
1121 }
1122 }
1123 }
1124
1125 return 0;
1126}
1127
1128static int qlcnic_dcb_cee_peer_get_pfc(struct net_device *netdev,
1129 struct cee_pfc *pfc)
1130{
1131 struct qlcnic_adapter *adapter = netdev_priv(netdev);
1132 struct qlcnic_dcb_cfg *cfg = adapter->dcb->cfg;
1133 struct qlcnic_dcb_tc_cfg *tc;
1134 struct qlcnic_dcb_cee *peer;
1135 u8 i, setting, prio;
1136
1137 pfc->pfc_en = 0;
1138
1139 if (!test_bit(__QLCNIC_DCB_STATE, &adapter->state))
1140 return 0;
1141
1142 peer = &cfg->type[QLC_DCB_PEER_IDX];
1143
1144 for (i = 0; i < QLC_DCB_MAX_TC; i++) {
1145 tc = &peer->tc_cfg[i];
1146 prio = qlcnic_dcb_prio_count(tc->up_tc_map);
1147
1148 setting = 0;
1149 qlcnic_dcb_get_pfc_cfg(netdev, prio, &setting);
1150 if (setting)
1151 pfc->pfc_en |= QLC_DCB_GET_MAP(i);
1152 }
1153
1154 pfc->tcs_supported = cfg->capability.max_pfc_tc;
1155
1156 return 0;
1157}
1158
1159static const struct dcbnl_rtnl_ops qlcnic_dcbnl_ops = {
1160 .getstate = qlcnic_dcb_get_state,
1161 .getpermhwaddr = qlcnic_dcb_get_perm_hw_addr,
1162 .getpgtccfgtx = qlcnic_dcb_get_pg_tc_cfg_tx,
1163 .getpgbwgcfgtx = qlcnic_dcb_get_pg_bwg_cfg_tx,
1164 .getpfccfg = qlcnic_dcb_get_pfc_cfg,
1165 .getcap = qlcnic_dcb_get_capability,
1166 .getnumtcs = qlcnic_dcb_get_num_tcs,
1167 .getapp = qlcnic_dcb_get_app,
1168 .getpfcstate = qlcnic_dcb_get_pfc_state,
1169 .getdcbx = qlcnic_dcb_get_dcbx,
1170 .getfeatcfg = qlcnic_dcb_get_feat_cfg,
1171
1172 .getpgtccfgrx = qlcnic_dcb_get_pg_tc_cfg_rx,
1173 .getpgbwgcfgrx = qlcnic_dcb_get_pg_bwg_cfg_rx,
1174
1175 .peer_getappinfo = qlcnic_dcb_peer_app_info,
1176 .peer_getapptable = qlcnic_dcb_peer_app_table,
1177 .cee_peer_getpg = qlcnic_dcb_cee_peer_get_pg,
1178 .cee_peer_getpfc = qlcnic_dcb_cee_peer_get_pfc,
1179};
Linux kernel - Deliverables
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