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sfc: Consistently test DEBUG macro, not EFX_ENABLE_DEBUG
[deliverable/linux.git] / drivers / net / ethernet / sfc / mcdi.c
CommitLineData
afd4aea0
BH		 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
0a6f40c6 3 * Copyright 2008-2011 Solarflare Communications Inc.
afd4aea0
BH		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
11#include "net_driver.h"
12#include "nic.h"
13#include "io.h"
14#include "regs.h"
15#include "mcdi_pcol.h"
16#include "phy.h"
17
18/**************************************************************************
19 *
20 * Management-Controller-to-Driver Interface
21 *
22 **************************************************************************
23 */
24
afd4aea0
BH		 25#define MCDI_RPC_TIMEOUT 10 /*seconds */
26
27#define MCDI_PDU(efx) \
788ec41c 28 (efx_port_num(efx) ? MC_SMEM_P1_PDU_OFST : MC_SMEM_P0_PDU_OFST)
afd4aea0 29#define MCDI_DOORBELL(efx) \
788ec41c 30 (efx_port_num(efx) ? MC_SMEM_P1_DOORBELL_OFST : MC_SMEM_P0_DOORBELL_OFST)
3f713bf4
BH		 31#define MCDI_STATUS(efx) \
32 (efx_port_num(efx) ? MC_SMEM_P1_STATUS_OFST : MC_SMEM_P0_STATUS_OFST)
33
34/* A reboot/assertion causes the MCDI status word to be set after the
35 * command word is set or a REBOOT event is sent. If we notice a reboot
36 * via these mechanisms then wait 10ms for the status word to be set. */
37#define MCDI_STATUS_DELAY_US 100
38#define MCDI_STATUS_DELAY_COUNT 100
39#define MCDI_STATUS_SLEEP_MS \
40 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
afd4aea0
BH		 41
42#define SEQ_MASK \
43 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
44
45static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
46{
47 struct siena_nic_data *nic_data;
48 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
49 nic_data = efx->nic_data;
50 return &nic_data->mcdi;
51}
52
53void efx_mcdi_init(struct efx_nic *efx)
54{
55 struct efx_mcdi_iface *mcdi;
56
57 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
58 return;
59
60 mcdi = efx_mcdi(efx);
61 init_waitqueue_head(&mcdi->wq);
62 spin_lock_init(&mcdi->iface_lock);
63 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
64 mcdi->mode = MCDI_MODE_POLL;
65
66 (void) efx_mcdi_poll_reboot(efx);
67}
68
69static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
70 const u8 *inbuf, size_t inlen)
71{
72 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
86c432ca
BH		 73 unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
74 unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
afd4aea0
BH		 75 unsigned int i;
76 efx_dword_t hdr;
77 u32 xflags, seqno;
78
79 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
788ec41c 80 BUG_ON(inlen & 3 || inlen >= MC_SMEM_PDU_LEN);
afd4aea0
BH		 81
82 seqno = mcdi->seqno & SEQ_MASK;
83 xflags = 0;
84 if (mcdi->mode == MCDI_MODE_EVENTS)
85 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
86
87 EFX_POPULATE_DWORD_6(hdr,
88 MCDI_HEADER_RESPONSE, 0,
89 MCDI_HEADER_RESYNC, 1,
90 MCDI_HEADER_CODE, cmd,
91 MCDI_HEADER_DATALEN, inlen,
92 MCDI_HEADER_SEQ, seqno,
93 MCDI_HEADER_XFLAGS, xflags);
94
86c432ca 95 efx_writed(efx, &hdr, pdu);
afd4aea0 96
747df225 97 for (i = 0; i < inlen; i += 4)
86c432ca
BH		 98 _efx_writed(efx, *((__le32 *)(inbuf + i)), pdu + 4 + i);
99
100 /* Ensure the payload is written out before the header */
101 wmb();
afd4aea0
BH		 102
103 /* ring the doorbell with a distinctive value */
86c432ca 104 _efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
afd4aea0
BH		 105}
106
107static void efx_mcdi_copyout(struct efx_nic *efx, u8 *outbuf, size_t outlen)
108{
109 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
86c432ca 110 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
afd4aea0
BH		 111 int i;
112
113 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
788ec41c 114 BUG_ON(outlen & 3 || outlen >= MC_SMEM_PDU_LEN);
afd4aea0
BH		 115
116 for (i = 0; i < outlen; i += 4)
86c432ca 117 *((__le32 *)(outbuf + i)) = _efx_readd(efx, pdu + 4 + i);
afd4aea0
BH		 118}
119
120static int efx_mcdi_poll(struct efx_nic *efx)
121{
122 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
123 unsigned int time, finish;
124 unsigned int respseq, respcmd, error;
86c432ca 125 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
afd4aea0
BH		 126 unsigned int rc, spins;
127 efx_dword_t reg;
128
129 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
e0bf54c9 130 rc = -efx_mcdi_poll_reboot(efx);
afd4aea0
BH		 131 if (rc)
132 goto out;
133
134 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
135 * because generally mcdi responses are fast. After that, back off
136 * and poll once a jiffy (approximately)
137 */
138 spins = TICK_USEC;
139 finish = get_seconds() + MCDI_RPC_TIMEOUT;
140
141 while (1) {
142 if (spins != 0) {
143 --spins;
144 udelay(1);
55029c1d
BH		 145 } else {
146 schedule_timeout_uninterruptible(1);
147 }
afd4aea0
BH		 148
149 time = get_seconds();
150
86c432ca
BH		 151 rmb();
152 efx_readd(efx, &reg, pdu);
afd4aea0
BH		 153
154 /* All 1's indicates that shared memory is in reset (and is
155 * not a valid header). Wait for it to come out reset before
156 * completing the command */
157 if (EFX_DWORD_FIELD(reg, EFX_DWORD_0) != 0xffffffff &&
158 EFX_DWORD_FIELD(reg, MCDI_HEADER_RESPONSE))
159 break;
160
161 if (time >= finish)
162 return -ETIMEDOUT;
163 }
164
165 mcdi->resplen = EFX_DWORD_FIELD(reg, MCDI_HEADER_DATALEN);
166 respseq = EFX_DWORD_FIELD(reg, MCDI_HEADER_SEQ);
167 respcmd = EFX_DWORD_FIELD(reg, MCDI_HEADER_CODE);
168 error = EFX_DWORD_FIELD(reg, MCDI_HEADER_ERROR);
169
170 if (error && mcdi->resplen == 0) {
62776d03 171 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
afd4aea0
BH		 172 rc = EIO;
173 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
62776d03
BH		 174 netif_err(efx, hw, efx->net_dev,
175 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
176 respseq, mcdi->seqno);
afd4aea0
BH		 177 rc = EIO;
178 } else if (error) {
86c432ca 179 efx_readd(efx, &reg, pdu + 4);
afd4aea0
BH		 180 switch (EFX_DWORD_FIELD(reg, EFX_DWORD_0)) {
181#define TRANSLATE_ERROR(name) \
182 case MC_CMD_ERR_ ## name: \
183 rc = name; \
184 break
185 TRANSLATE_ERROR(ENOENT);
186 TRANSLATE_ERROR(EINTR);
187 TRANSLATE_ERROR(EACCES);
188 TRANSLATE_ERROR(EBUSY);
189 TRANSLATE_ERROR(EINVAL);
190 TRANSLATE_ERROR(EDEADLK);
191 TRANSLATE_ERROR(ENOSYS);
192 TRANSLATE_ERROR(ETIME);
193#undef TRANSLATE_ERROR
194 default:
195 rc = EIO;
196 break;
197 }
198 } else
199 rc = 0;
200
201out:
202 mcdi->resprc = rc;
203 if (rc)
204 mcdi->resplen = 0;
205
206 /* Return rc=0 like wait_event_timeout() */
207 return 0;
208}
209
210/* Test and clear MC-rebooted flag for this port/function */
211int efx_mcdi_poll_reboot(struct efx_nic *efx)
212{
3f713bf4 213 unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_STATUS(efx);
afd4aea0
BH		 214 efx_dword_t reg;
215 uint32_t value;
216
217 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
218 return false;
219
86c432ca 220 efx_readd(efx, &reg, addr);
afd4aea0
BH		 221 value = EFX_DWORD_FIELD(reg, EFX_DWORD_0);
222
223 if (value == 0)
224 return 0;
225
226 EFX_ZERO_DWORD(reg);
86c432ca 227 efx_writed(efx, &reg, addr);
afd4aea0
BH		 228
229 if (value == MC_STATUS_DWORD_ASSERT)
230 return -EINTR;
231 else
232 return -EIO;
233}
234
235static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
236{
237 /* Wait until the interface becomes QUIESCENT and we win the race
238 * to mark it RUNNING. */
239 wait_event(mcdi->wq,
240 atomic_cmpxchg(&mcdi->state,
241 MCDI_STATE_QUIESCENT,
242 MCDI_STATE_RUNNING)
243 == MCDI_STATE_QUIESCENT);
244}
245
246static int efx_mcdi_await_completion(struct efx_nic *efx)
247{
248 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
249
250 if (wait_event_timeout(
251 mcdi->wq,
252 atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
253 msecs_to_jiffies(MCDI_RPC_TIMEOUT * 1000)) == 0)
254 return -ETIMEDOUT;
255
256 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
257 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
258 * completed the request first, then we'll just end up completing the
259 * request again, which is safe.
260 *
261 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
262 * wait_event_timeout() implicitly provides.
263 */
264 if (mcdi->mode == MCDI_MODE_POLL)
265 return efx_mcdi_poll(efx);
266
267 return 0;
268}
269
270static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
271{
272 /* If the interface is RUNNING, then move to COMPLETED and wake any
273 * waiters. If the interface isn't in RUNNING then we've received a
274 * duplicate completion after we've already transitioned back to
275 * QUIESCENT. [A subsequent invocation would increment seqno, so would
276 * have failed the seqno check].
277 */
278 if (atomic_cmpxchg(&mcdi->state,
279 MCDI_STATE_RUNNING,
280 MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
281 wake_up(&mcdi->wq);
282 return true;
283 }
284
285 return false;
286}
287
288static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
289{
290 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
291 wake_up(&mcdi->wq);
292}
293
294static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
295 unsigned int datalen, unsigned int errno)
296{
297 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
298 bool wake = false;
299
300 spin_lock(&mcdi->iface_lock);
301
302 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
303 if (mcdi->credits)
304 /* The request has been cancelled */
305 --mcdi->credits;
306 else
62776d03
BH		 307 netif_err(efx, hw, efx->net_dev,
308 "MC response mismatch tx seq 0x%x rx "
309 "seq 0x%x\n", seqno, mcdi->seqno);
afd4aea0
BH		 310 } else {
311 mcdi->resprc = errno;
312 mcdi->resplen = datalen;
313
314 wake = true;
315 }
316
317 spin_unlock(&mcdi->iface_lock);
318
319 if (wake)
320 efx_mcdi_complete(mcdi);
321}
322
323/* Issue the given command by writing the data into the shared memory PDU,
324 * ring the doorbell and wait for completion. Copyout the result. */
325int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
326 const u8 *inbuf, size_t inlen, u8 *outbuf, size_t outlen,
327 size_t *outlen_actual)
328{
329 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
330 int rc;
331 BUG_ON(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
332
333 efx_mcdi_acquire(mcdi);
334
335 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
336 spin_lock_bh(&mcdi->iface_lock);
337 ++mcdi->seqno;
338 spin_unlock_bh(&mcdi->iface_lock);
339
340 efx_mcdi_copyin(efx, cmd, inbuf, inlen);
341
342 if (mcdi->mode == MCDI_MODE_POLL)
343 rc = efx_mcdi_poll(efx);
344 else
345 rc = efx_mcdi_await_completion(efx);
346
347 if (rc != 0) {
348 /* Close the race with efx_mcdi_ev_cpl() executing just too late
349 * and completing a request we've just cancelled, by ensuring
350 * that the seqno check therein fails.
351 */
352 spin_lock_bh(&mcdi->iface_lock);
353 ++mcdi->seqno;
354 ++mcdi->credits;
355 spin_unlock_bh(&mcdi->iface_lock);
356
62776d03
BH		 357 netif_err(efx, hw, efx->net_dev,
358 "MC command 0x%x inlen %d mode %d timed out\n",
359 cmd, (int)inlen, mcdi->mode);
afd4aea0
BH		 360 } else {
361 size_t resplen;
362
363 /* At the very least we need a memory barrier here to ensure
364 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
365 * a spurious efx_mcdi_ev_cpl() running concurrently by
366 * acquiring the iface_lock. */
367 spin_lock_bh(&mcdi->iface_lock);
368 rc = -mcdi->resprc;
369 resplen = mcdi->resplen;
370 spin_unlock_bh(&mcdi->iface_lock);
371
372 if (rc == 0) {
373 efx_mcdi_copyout(efx, outbuf,
374 min(outlen, mcdi->resplen + 3) & ~0x3);
375 if (outlen_actual != NULL)
376 *outlen_actual = resplen;
377 } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
378 ; /* Don't reset if MC_CMD_REBOOT returns EIO */
379 else if (rc == -EIO || rc == -EINTR) {
62776d03
BH		 380 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
381 -rc);
afd4aea0
BH		 382 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
383 } else
f18ca364 384 netif_dbg(efx, hw, efx->net_dev,
62776d03
BH		 385 "MC command 0x%x inlen %d failed rc=%d\n",
386 cmd, (int)inlen, -rc);
3f713bf4
BH		 387
388 if (rc == -EIO || rc == -EINTR) {
389 msleep(MCDI_STATUS_SLEEP_MS);
390 efx_mcdi_poll_reboot(efx);
391 }
afd4aea0
BH		 392 }
393
394 efx_mcdi_release(mcdi);
395 return rc;
396}
397
398void efx_mcdi_mode_poll(struct efx_nic *efx)
399{
400 struct efx_mcdi_iface *mcdi;
401
402 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
403 return;
404
405 mcdi = efx_mcdi(efx);
406 if (mcdi->mode == MCDI_MODE_POLL)
407 return;
408
409 /* We can switch from event completion to polled completion, because
410 * mcdi requests are always completed in shared memory. We do this by
411 * switching the mode to POLL'd then completing the request.
412 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
413 *
414 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
415 * which efx_mcdi_complete() provides for us.
416 */
417 mcdi->mode = MCDI_MODE_POLL;
418
419 efx_mcdi_complete(mcdi);
420}
421
422void efx_mcdi_mode_event(struct efx_nic *efx)
423{
424 struct efx_mcdi_iface *mcdi;
425
426 if (efx_nic_rev(efx) < EFX_REV_SIENA_A0)
427 return;
428
429 mcdi = efx_mcdi(efx);
430
431 if (mcdi->mode == MCDI_MODE_EVENTS)
432 return;
433
434 /* We can't switch from polled to event completion in the middle of a
435 * request, because the completion method is specified in the request.
436 * So acquire the interface to serialise the requestors. We don't need
437 * to acquire the iface_lock to change the mode here, but we do need a
438 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
439 * efx_mcdi_acquire() provides.
440 */
441 efx_mcdi_acquire(mcdi);
442 mcdi->mode = MCDI_MODE_EVENTS;
443 efx_mcdi_release(mcdi);
444}
445
446static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
447{
448 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
449
450 /* If there is an outstanding MCDI request, it has been terminated
451 * either by a BADASSERT or REBOOT event. If the mcdi interface is
452 * in polled mode, then do nothing because the MC reboot handler will
453 * set the header correctly. However, if the mcdi interface is waiting
454 * for a CMDDONE event it won't receive it [and since all MCDI events
455 * are sent to the same queue, we can't be racing with
456 * efx_mcdi_ev_cpl()]
457 *
458 * There's a race here with efx_mcdi_rpc(), because we might receive
459 * a REBOOT event *before* the request has been copied out. In polled
25985edc 460 * mode (during startup) this is irrelevant, because efx_mcdi_complete()
afd4aea0
BH		 461 * is ignored. In event mode, this condition is just an edge-case of
462 * receiving a REBOOT event after posting the MCDI request. Did the mc
463 * reboot before or after the copyout? The best we can do always is
464 * just return failure.
465 */
466 spin_lock(&mcdi->iface_lock);
467 if (efx_mcdi_complete(mcdi)) {
468 if (mcdi->mode == MCDI_MODE_EVENTS) {
469 mcdi->resprc = rc;
470 mcdi->resplen = 0;
18e3ee2c 471 ++mcdi->credits;
afd4aea0 472 }
3f713bf4
BH		 473 } else {
474 int count;
475
afd4aea0
BH		 476 /* Nobody was waiting for an MCDI request, so trigger a reset */
477 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
478
3f713bf4
BH		 479 /* Consume the status word since efx_mcdi_rpc_finish() won't */
480 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
481 if (efx_mcdi_poll_reboot(efx))
482 break;
483 udelay(MCDI_STATUS_DELAY_US);
484 }
485 }
486
afd4aea0
BH		 487 spin_unlock(&mcdi->iface_lock);
488}
489
490static unsigned int efx_mcdi_event_link_speed[] = {
491 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
492 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
493 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
494};
495
496
497static void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
498{
499 u32 flags, fcntl, speed, lpa;
500
501 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
502 EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
503 speed = efx_mcdi_event_link_speed[speed];
504
505 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
506 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
507 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
508
509 /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
510 * which is only run after flushing the event queues. Therefore, it
511 * is safe to modify the link state outside of the mac_lock here.
512 */
513 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
514
515 efx_mcdi_phy_check_fcntl(efx, lpa);
516
517 efx_link_status_changed(efx);
518}
519
18e83e4c 520static const char *const sensor_names[] = {
afd4aea0
BH		 521 [MC_CMD_SENSOR_CONTROLLER_TEMP] = "Controller temp. sensor",
522 [MC_CMD_SENSOR_PHY_COMMON_TEMP] = "PHY shared temp. sensor",
523 [MC_CMD_SENSOR_CONTROLLER_COOLING] = "Controller cooling",
524 [MC_CMD_SENSOR_PHY0_TEMP] = "PHY 0 temp. sensor",
525 [MC_CMD_SENSOR_PHY0_COOLING] = "PHY 0 cooling",
526 [MC_CMD_SENSOR_PHY1_TEMP] = "PHY 1 temp. sensor",
527 [MC_CMD_SENSOR_PHY1_COOLING] = "PHY 1 cooling",
528 [MC_CMD_SENSOR_IN_1V0] = "1.0V supply sensor",
529 [MC_CMD_SENSOR_IN_1V2] = "1.2V supply sensor",
530 [MC_CMD_SENSOR_IN_1V8] = "1.8V supply sensor",
531 [MC_CMD_SENSOR_IN_2V5] = "2.5V supply sensor",
532 [MC_CMD_SENSOR_IN_3V3] = "3.3V supply sensor",
533 [MC_CMD_SENSOR_IN_12V0] = "12V supply sensor"
534};
535
18e83e4c 536static const char *const sensor_status_names[] = {
afd4aea0
BH		 537 [MC_CMD_SENSOR_STATE_OK] = "OK",
538 [MC_CMD_SENSOR_STATE_WARNING] = "Warning",
539 [MC_CMD_SENSOR_STATE_FATAL] = "Fatal",
540 [MC_CMD_SENSOR_STATE_BROKEN] = "Device failure",
541};
542
543static void efx_mcdi_sensor_event(struct efx_nic *efx, efx_qword_t *ev)
544{
545 unsigned int monitor, state, value;
546 const char *name, *state_txt;
547 monitor = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_MONITOR);
548 state = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_STATE);
549 value = EFX_QWORD_FIELD(*ev, MCDI_EVENT_SENSOREVT_VALUE);
550 /* Deal gracefully with the board having more drivers than we
551 * know about, but do not expect new sensor states. */
552 name = (monitor >= ARRAY_SIZE(sensor_names))
553 ? "No sensor name available" :
554 sensor_names[monitor];
555 EFX_BUG_ON_PARANOID(state >= ARRAY_SIZE(sensor_status_names));
556 state_txt = sensor_status_names[state];
557
62776d03
BH		 558 netif_err(efx, hw, efx->net_dev,
559 "Sensor %d (%s) reports condition '%s' for raw value %d\n",
560 monitor, name, state_txt, value);
afd4aea0
BH		 561}
562
563/* Called from falcon_process_eventq for MCDI events */
564void efx_mcdi_process_event(struct efx_channel *channel,
565 efx_qword_t *event)
566{
567 struct efx_nic *efx = channel->efx;
568 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
569 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
570
571 switch (code) {
572 case MCDI_EVENT_CODE_BADSSERT:
62776d03
BH		 573 netif_err(efx, hw, efx->net_dev,
574 "MC watchdog or assertion failure at 0x%x\n", data);
afd4aea0
BH		 575 efx_mcdi_ev_death(efx, EINTR);
576 break;
577
578 case MCDI_EVENT_CODE_PMNOTICE:
62776d03 579 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
afd4aea0
BH		 580 break;
581
582 case MCDI_EVENT_CODE_CMDDONE:
583 efx_mcdi_ev_cpl(efx,
584 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
585 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
586 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
587 break;
588
589 case MCDI_EVENT_CODE_LINKCHANGE:
590 efx_mcdi_process_link_change(efx, event);
591 break;
592 case MCDI_EVENT_CODE_SENSOREVT:
593 efx_mcdi_sensor_event(efx, event);
594 break;
595 case MCDI_EVENT_CODE_SCHEDERR:
62776d03
BH		 596 netif_info(efx, hw, efx->net_dev,
597 "MC Scheduler error address=0x%x\n", data);
afd4aea0
BH		 598 break;
599 case MCDI_EVENT_CODE_REBOOT:
62776d03 600 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
afd4aea0
BH		 601 efx_mcdi_ev_death(efx, EIO);
602 break;
603 case MCDI_EVENT_CODE_MAC_STATS_DMA:
604 /* MAC stats are gather lazily. We can ignore this. */
605 break;
606
607 default:
62776d03
BH		 608 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
609 code);
afd4aea0
BH		 610 }
611}
612
613/**************************************************************************
614 *
615 * Specific request functions
616 *
617 **************************************************************************
618 */
619
e5f0fd27 620void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
afd4aea0 621{
05a9320f 622 u8 outbuf[ALIGN(MC_CMD_GET_VERSION_OUT_LEN, 4)];
afd4aea0
BH		 623 size_t outlength;
624 const __le16 *ver_words;
625 int rc;
626
627 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
628
629 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
630 outbuf, sizeof(outbuf), &outlength);
631 if (rc)
632 goto fail;
633
05a9320f 634 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
00bbb4a5 635 rc = -EIO;
afd4aea0
BH		 636 goto fail;
637 }
638
639 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
e5f0fd27
BH		 640 snprintf(buf, len, "%u.%u.%u.%u",
641 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
642 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
643 return;
afd4aea0
BH		 644
645fail:
62776d03 646 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
e5f0fd27 647 buf[0] = 0;
afd4aea0
BH		 648}
649
650int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
651 bool *was_attached)
652{
653 u8 inbuf[MC_CMD_DRV_ATTACH_IN_LEN];
654 u8 outbuf[MC_CMD_DRV_ATTACH_OUT_LEN];
655 size_t outlen;
656 int rc;
657
658 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
659 driver_operating ? 1 : 0);
660 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
661
662 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
663 outbuf, sizeof(outbuf), &outlen);
664 if (rc)
665 goto fail;
00bbb4a5
BH		 666 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
667 rc = -EIO;
afd4aea0 668 goto fail;
00bbb4a5 669 }
afd4aea0
BH		 670
671 if (was_attached != NULL)
672 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
673 return 0;
674
675fail:
62776d03 676 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 677 return rc;
678}
679
680int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
681 u16 *fw_subtype_list)
682{
05a9320f 683 uint8_t outbuf[MC_CMD_GET_BOARD_CFG_OUT_LENMIN];
afd4aea0
BH		 684 size_t outlen;
685 int port_num = efx_port_num(efx);
686 int offset;
687 int rc;
688
689 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
690
691 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
692 outbuf, sizeof(outbuf), &outlen);
693 if (rc)
694 goto fail;
695
05a9320f 696 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
00bbb4a5 697 rc = -EIO;
afd4aea0
BH		 698 goto fail;
699 }
700
701 offset = (port_num)
702 ? MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST
703 : MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST;
704 if (mac_address)
705 memcpy(mac_address, outbuf + offset, ETH_ALEN);
706 if (fw_subtype_list)
707 memcpy(fw_subtype_list,
708 outbuf + MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST,
05a9320f
BH		 709 MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MINNUM *
710 sizeof(fw_subtype_list[0]));
afd4aea0
BH		 711
712 return 0;
713
714fail:
62776d03
BH		 715 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
716 __func__, rc, (int)outlen);
afd4aea0
BH		 717
718 return rc;
719}
720
721int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
722{
723 u8 inbuf[MC_CMD_LOG_CTRL_IN_LEN];
724 u32 dest = 0;
725 int rc;
726
727 if (uart)
728 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
729 if (evq)
730 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
731
732 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
733 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
734
735 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
736
737 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
738 NULL, 0, NULL);
739 if (rc)
740 goto fail;
741
742 return 0;
743
744fail:
62776d03 745 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 746 return rc;
747}
748
749int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
750{
751 u8 outbuf[MC_CMD_NVRAM_TYPES_OUT_LEN];
752 size_t outlen;
753 int rc;
754
755 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
756
757 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
758 outbuf, sizeof(outbuf), &outlen);
759 if (rc)
760 goto fail;
00bbb4a5
BH		 761 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
762 rc = -EIO;
afd4aea0 763 goto fail;
00bbb4a5 764 }
afd4aea0
BH		 765
766 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
767 return 0;
768
769fail:
62776d03
BH		 770 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
771 __func__, rc);
afd4aea0
BH		 772 return rc;
773}
774
775int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
776 size_t *size_out, size_t *erase_size_out,
777 bool *protected_out)
778{
779 u8 inbuf[MC_CMD_NVRAM_INFO_IN_LEN];
780 u8 outbuf[MC_CMD_NVRAM_INFO_OUT_LEN];
781 size_t outlen;
782 int rc;
783
784 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
785
786 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
787 outbuf, sizeof(outbuf), &outlen);
788 if (rc)
789 goto fail;
00bbb4a5
BH		 790 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
791 rc = -EIO;
afd4aea0 792 goto fail;
00bbb4a5 793 }
afd4aea0
BH		 794
795 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
796 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
797 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
05a9320f 798 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
afd4aea0
BH		 799 return 0;
800
801fail:
62776d03 802 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 803 return rc;
804}
805
806int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
807{
808 u8 inbuf[MC_CMD_NVRAM_UPDATE_START_IN_LEN];
809 int rc;
810
811 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
812
813 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
814
815 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
816 NULL, 0, NULL);
817 if (rc)
818 goto fail;
819
820 return 0;
821
822fail:
62776d03 823 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 824 return rc;
825}
826
827int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
828 loff_t offset, u8 *buffer, size_t length)
829{
830 u8 inbuf[MC_CMD_NVRAM_READ_IN_LEN];
5a27e86b 831 u8 outbuf[MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
afd4aea0
BH		 832 size_t outlen;
833 int rc;
834
835 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
836 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
837 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
838
839 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
840 outbuf, sizeof(outbuf), &outlen);
841 if (rc)
842 goto fail;
843
844 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
845 return 0;
846
847fail:
62776d03 848 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 849 return rc;
850}
851
852int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
853 loff_t offset, const u8 *buffer, size_t length)
854{
5a27e86b 855 u8 inbuf[MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)];
afd4aea0
BH		 856 int rc;
857
858 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
859 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
860 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
861 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
862
863 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
864
5a27e86b
BH		 865 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
866 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
afd4aea0
BH		 867 NULL, 0, NULL);
868 if (rc)
869 goto fail;
870
871 return 0;
872
873fail:
62776d03 874 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 875 return rc;
876}
877
878int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
879 loff_t offset, size_t length)
880{
881 u8 inbuf[MC_CMD_NVRAM_ERASE_IN_LEN];
882 int rc;
883
884 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
885 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
886 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
887
888 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
889
890 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
891 NULL, 0, NULL);
892 if (rc)
893 goto fail;
894
895 return 0;
896
897fail:
62776d03 898 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 899 return rc;
900}
901
902int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
903{
904 u8 inbuf[MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN];
905 int rc;
906
907 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
908
909 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
910
911 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
912 NULL, 0, NULL);
913 if (rc)
914 goto fail;
915
916 return 0;
917
918fail:
62776d03 919 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 920 return rc;
921}
922
2e803407
BH		 923static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
924{
925 u8 inbuf[MC_CMD_NVRAM_TEST_IN_LEN];
926 u8 outbuf[MC_CMD_NVRAM_TEST_OUT_LEN];
927 int rc;
928
929 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
930
931 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
932 outbuf, sizeof(outbuf), NULL);
933 if (rc)
934 return rc;
935
936 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
937 case MC_CMD_NVRAM_TEST_PASS:
938 case MC_CMD_NVRAM_TEST_NOTSUPP:
939 return 0;
940 default:
941 return -EIO;
942 }
943}
944
945int efx_mcdi_nvram_test_all(struct efx_nic *efx)
946{
947 u32 nvram_types;
948 unsigned int type;
949 int rc;
950
951 rc = efx_mcdi_nvram_types(efx, &nvram_types);
952 if (rc)
b548a988 953 goto fail1;
2e803407
BH		 954
955 type = 0;
956 while (nvram_types != 0) {
957 if (nvram_types & 1) {
958 rc = efx_mcdi_nvram_test(efx, type);
959 if (rc)
b548a988 960 goto fail2;
2e803407
BH		 961 }
962 type++;
963 nvram_types >>= 1;
964 }
965
966 return 0;
b548a988
BH		 967
968fail2:
62776d03
BH		 969 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
970 __func__, type);
b548a988 971fail1:
62776d03 972 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
b548a988 973 return rc;
2e803407
BH		 974}
975
8b2103ad 976static int efx_mcdi_read_assertion(struct efx_nic *efx)
afd4aea0 977{
8b2103ad
SH		 978 u8 inbuf[MC_CMD_GET_ASSERTS_IN_LEN];
979 u8 outbuf[MC_CMD_GET_ASSERTS_OUT_LEN];
afd4aea0
BH		 980 unsigned int flags, index, ofst;
981 const char *reason;
982 size_t outlen;
983 int retry;
984 int rc;
985
8b2103ad
SH		 986 /* Attempt to read any stored assertion state before we reboot
987 * the mcfw out of the assertion handler. Retry twice, once
afd4aea0
BH		 988 * because a boot-time assertion might cause this command to fail
989 * with EINTR. And once again because GET_ASSERTS can race with
990 * MC_CMD_REBOOT running on the other port. */
991 retry = 2;
992 do {
8b2103ad 993 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
afd4aea0 994 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
8b2103ad
SH		 995 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
996 outbuf, sizeof(outbuf), &outlen);
afd4aea0
BH		 997 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
998
999 if (rc)
1000 return rc;
1001 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
00bbb4a5 1002 return -EIO;
afd4aea0 1003
8b2103ad
SH		 1004 /* Print out any recorded assertion state */
1005 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
afd4aea0
BH		 1006 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
1007 return 0;
1008
afd4aea0
BH		 1009 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
1010 ? "system-level assertion"
1011 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
1012 ? "thread-level assertion"
1013 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
1014 ? "watchdog reset"
1015 : "unknown assertion";
62776d03
BH		 1016 netif_err(efx, hw, efx->net_dev,
1017 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
1018 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
1019 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
afd4aea0
BH		 1020
1021 /* Print out the registers */
1022 ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
1023 for (index = 1; index < 32; index++) {
62776d03 1024 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", index,
8b2103ad 1025 MCDI_DWORD2(outbuf, ofst));
afd4aea0
BH		 1026 ofst += sizeof(efx_dword_t);
1027 }
1028
1029 return 0;
1030}
1031
8b2103ad
SH		 1032static void efx_mcdi_exit_assertion(struct efx_nic *efx)
1033{
1034 u8 inbuf[MC_CMD_REBOOT_IN_LEN];
1035
1036 /* Atomically reboot the mcfw out of the assertion handler */
1037 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1038 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
1039 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
1040 efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
1041 NULL, 0, NULL);
1042}
1043
1044int efx_mcdi_handle_assertion(struct efx_nic *efx)
1045{
1046 int rc;
1047
1048 rc = efx_mcdi_read_assertion(efx);
1049 if (rc)
1050 return rc;
1051
1052 efx_mcdi_exit_assertion(efx);
1053
1054 return 0;
1055}
1056
afd4aea0
BH		 1057void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1058{
1059 u8 inbuf[MC_CMD_SET_ID_LED_IN_LEN];
1060 int rc;
1061
1062 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
1063 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
1064 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
1065
1066 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
1067
1068 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
1069
1070 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
1071 NULL, 0, NULL);
1072 if (rc)
62776d03
BH		 1073 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1074 __func__, rc);
afd4aea0
BH		 1075}
1076
1077int efx_mcdi_reset_port(struct efx_nic *efx)
1078{
05a9320f 1079 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
afd4aea0 1080 if (rc)
62776d03
BH		 1081 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
1082 __func__, rc);
afd4aea0
BH		 1083 return rc;
1084}
1085
1086int efx_mcdi_reset_mc(struct efx_nic *efx)
1087{
1088 u8 inbuf[MC_CMD_REBOOT_IN_LEN];
1089 int rc;
1090
1091 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
1092 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
1093 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
1094 NULL, 0, NULL);
1095 /* White is black, and up is down */
1096 if (rc == -EIO)
1097 return 0;
1098 if (rc == 0)
1099 rc = -EIO;
62776d03 1100 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1101 return rc;
1102}
1103
d215697f 1104static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1105 const u8 *mac, int *id_out)
afd4aea0
BH		 1106{
1107 u8 inbuf[MC_CMD_WOL_FILTER_SET_IN_LEN];
1108 u8 outbuf[MC_CMD_WOL_FILTER_SET_OUT_LEN];
1109 size_t outlen;
1110 int rc;
1111
1112 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1113 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1114 MC_CMD_FILTER_MODE_SIMPLE);
1115 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1116
1117 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1118 outbuf, sizeof(outbuf), &outlen);
1119 if (rc)
1120 goto fail;
1121
1122 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
00bbb4a5 1123 rc = -EIO;
afd4aea0
BH		 1124 goto fail;
1125 }
1126
1127 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1128
1129 return 0;
1130
1131fail:
1132 *id_out = -1;
62776d03 1133 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1134 return rc;
1135
1136}
1137
1138
1139int
1140efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1141{
1142 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1143}
1144
1145
1146int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1147{
1148 u8 outbuf[MC_CMD_WOL_FILTER_GET_OUT_LEN];
1149 size_t outlen;
1150 int rc;
1151
1152 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1153 outbuf, sizeof(outbuf), &outlen);
1154 if (rc)
1155 goto fail;
1156
1157 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
00bbb4a5 1158 rc = -EIO;
afd4aea0
BH		 1159 goto fail;
1160 }
1161
1162 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1163
1164 return 0;
1165
1166fail:
1167 *id_out = -1;
62776d03 1168 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1169 return rc;
1170}
1171
1172
1173int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1174{
1175 u8 inbuf[MC_CMD_WOL_FILTER_REMOVE_IN_LEN];
1176 int rc;
1177
1178 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1179
1180 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1181 NULL, 0, NULL);
1182 if (rc)
1183 goto fail;
1184
1185 return 0;
1186
1187fail:
62776d03 1188 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1189 return rc;
1190}
1191
1192
1193int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1194{
1195 int rc;
1196
1197 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1198 if (rc)
1199 goto fail;
1200
1201 return 0;
1202
1203fail:
62776d03 1204 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1205 return rc;
1206}
1207
Linux kernel - Deliverables
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