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sfc: Remove driver-local struct ethtool_string
[deliverable/linux.git] / drivers / net / ethernet / sfc / mcdi.c
CommitLineData
afd4aea0
BH		 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
0a6f40c6 3 * Copyright 2008-2011 Solarflare Communications Inc.
afd4aea0
BH		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10#include <linux/delay.h>
11#include "net_driver.h"
12#include "nic.h"
13#include "io.h"
8b8a95a1 14#include "farch_regs.h"
afd4aea0
BH		 15#include "mcdi_pcol.h"
16#include "phy.h"
17
18/**************************************************************************
19 *
20 * Management-Controller-to-Driver Interface
21 *
22 **************************************************************************
23 */
24
ebf98e79 25#define MCDI_RPC_TIMEOUT (10 * HZ)
afd4aea0 26
3f713bf4
BH		 27/* A reboot/assertion causes the MCDI status word to be set after the
28 * command word is set or a REBOOT event is sent. If we notice a reboot
29 * via these mechanisms then wait 10ms for the status word to be set. */
30#define MCDI_STATUS_DELAY_US 100
31#define MCDI_STATUS_DELAY_COUNT 100
32#define MCDI_STATUS_SLEEP_MS \
33 (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
afd4aea0
BH		 34
35#define SEQ_MASK \
36 EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
37
38static inline struct efx_mcdi_iface *efx_mcdi(struct efx_nic *efx)
39{
f3ad5003
BH		 40 EFX_BUG_ON_PARANOID(!efx->mcdi);
41 return &efx->mcdi->iface;
afd4aea0
BH		 42}
43
f073dde0 44int efx_mcdi_init(struct efx_nic *efx)
afd4aea0
BH		 45{
46 struct efx_mcdi_iface *mcdi;
47
f3ad5003
BH		 48 efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
49 if (!efx->mcdi)
50 return -ENOMEM;
51
afd4aea0
BH		 52 mcdi = efx_mcdi(efx);
53 init_waitqueue_head(&mcdi->wq);
54 spin_lock_init(&mcdi->iface_lock);
55 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
56 mcdi->mode = MCDI_MODE_POLL;
57
58 (void) efx_mcdi_poll_reboot(efx);
f073dde0
BH		 59
60 /* Recover from a failed assertion before probing */
61 return efx_mcdi_handle_assertion(efx);
afd4aea0
BH		 62}
63
f3ad5003
BH		 64void efx_mcdi_fini(struct efx_nic *efx)
65{
66 BUG_ON(efx->mcdi &&
67 atomic_read(&efx->mcdi->iface.state) != MCDI_STATE_QUIESCENT);
68 kfree(efx->mcdi);
69}
70
afd4aea0 71static void efx_mcdi_copyin(struct efx_nic *efx, unsigned cmd,
9528b921 72 const efx_dword_t *inbuf, size_t inlen)
afd4aea0
BH		 73{
74 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
df2cd8af
BH		 75 efx_dword_t hdr[2];
76 size_t hdr_len;
afd4aea0
BH		 77 u32 xflags, seqno;
78
79 BUG_ON(atomic_read(&mcdi->state) == MCDI_STATE_QUIESCENT);
afd4aea0
BH		 80
81 seqno = mcdi->seqno & SEQ_MASK;
82 xflags = 0;
83 if (mcdi->mode == MCDI_MODE_EVENTS)
84 xflags |= MCDI_HEADER_XFLAGS_EVREQ;
85
df2cd8af
BH		 86 if (efx->type->mcdi_max_ver == 1) {
87 /* MCDI v1 */
88 EFX_POPULATE_DWORD_6(hdr[0],
89 MCDI_HEADER_RESPONSE, 0,
90 MCDI_HEADER_RESYNC, 1,
91 MCDI_HEADER_CODE, cmd,
92 MCDI_HEADER_DATALEN, inlen,
93 MCDI_HEADER_SEQ, seqno,
94 MCDI_HEADER_XFLAGS, xflags);
95 hdr_len = 4;
96 } else {
97 /* MCDI v2 */
98 BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
99 EFX_POPULATE_DWORD_6(hdr[0],
100 MCDI_HEADER_RESPONSE, 0,
101 MCDI_HEADER_RESYNC, 1,
102 MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
103 MCDI_HEADER_DATALEN, 0,
104 MCDI_HEADER_SEQ, seqno,
105 MCDI_HEADER_XFLAGS, xflags);
106 EFX_POPULATE_DWORD_2(hdr[1],
107 MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
108 MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
109 hdr_len = 8;
110 }
afd4aea0 111
df2cd8af 112 efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
afd4aea0
BH		 113}
114
5bc283e5
BH		 115static int efx_mcdi_errno(unsigned int mcdi_err)
116{
117 switch (mcdi_err) {
118 case 0:
119 return 0;
120#define TRANSLATE_ERROR(name) \
121 case MC_CMD_ERR_ ## name: \
122 return -name;
df2cd8af 123 TRANSLATE_ERROR(EPERM);
5bc283e5
BH		 124 TRANSLATE_ERROR(ENOENT);
125 TRANSLATE_ERROR(EINTR);
df2cd8af 126 TRANSLATE_ERROR(EAGAIN);
5bc283e5
BH		 127 TRANSLATE_ERROR(EACCES);
128 TRANSLATE_ERROR(EBUSY);
129 TRANSLATE_ERROR(EINVAL);
130 TRANSLATE_ERROR(EDEADLK);
131 TRANSLATE_ERROR(ENOSYS);
132 TRANSLATE_ERROR(ETIME);
df2cd8af
BH		 133 TRANSLATE_ERROR(EALREADY);
134 TRANSLATE_ERROR(ENOSPC);
5bc283e5 135#undef TRANSLATE_ERROR
df2cd8af
BH		 136 case MC_CMD_ERR_ALLOC_FAIL:
137 return -ENOBUFS;
138 case MC_CMD_ERR_MAC_EXIST:
139 return -EADDRINUSE;
5bc283e5 140 default:
df2cd8af
BH		 141 return -EPROTO;
142 }
143}
144
145static void efx_mcdi_read_response_header(struct efx_nic *efx)
146{
147 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
148 unsigned int respseq, respcmd, error;
149 efx_dword_t hdr;
150
151 efx->type->mcdi_read_response(efx, &hdr, 0, 4);
152 respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
153 respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
154 error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
155
156 if (respcmd != MC_CMD_V2_EXTN) {
157 mcdi->resp_hdr_len = 4;
158 mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
159 } else {
160 efx->type->mcdi_read_response(efx, &hdr, 4, 4);
161 mcdi->resp_hdr_len = 8;
162 mcdi->resp_data_len =
163 EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
164 }
165
166 if (error && mcdi->resp_data_len == 0) {
167 netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
168 mcdi->resprc = -EIO;
169 } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
170 netif_err(efx, hw, efx->net_dev,
171 "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
172 respseq, mcdi->seqno);
173 mcdi->resprc = -EIO;
174 } else if (error) {
175 efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
176 mcdi->resprc =
177 efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
178 } else {
179 mcdi->resprc = 0;
5bc283e5
BH		 180 }
181}
182
afd4aea0
BH		 183static int efx_mcdi_poll(struct efx_nic *efx)
184{
185 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
ebf98e79 186 unsigned long time, finish;
5bc283e5 187 unsigned int spins;
5bc283e5 188 int rc;
afd4aea0
BH		 189
190 /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
5bc283e5 191 rc = efx_mcdi_poll_reboot(efx);
df2cd8af 192 if (rc) {
369327fa 193 spin_lock_bh(&mcdi->iface_lock);
df2cd8af
BH		 194 mcdi->resprc = rc;
195 mcdi->resp_hdr_len = 0;
196 mcdi->resp_data_len = 0;
369327fa 197 spin_unlock_bh(&mcdi->iface_lock);
df2cd8af
BH		 198 return 0;
199 }
afd4aea0
BH		 200
201 /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
202 * because generally mcdi responses are fast. After that, back off
203 * and poll once a jiffy (approximately)
204 */
205 spins = TICK_USEC;
ebf98e79 206 finish = jiffies + MCDI_RPC_TIMEOUT;
afd4aea0
BH		 207
208 while (1) {
209 if (spins != 0) {
210 --spins;
211 udelay(1);
55029c1d
BH		 212 } else {
213 schedule_timeout_uninterruptible(1);
214 }
afd4aea0 215
ebf98e79 216 time = jiffies;
afd4aea0 217
86c432ca 218 rmb();
f3ad5003 219 if (efx->type->mcdi_poll_response(efx))
afd4aea0
BH		 220 break;
221
ebf98e79 222 if (time_after(time, finish))
afd4aea0
BH		 223 return -ETIMEDOUT;
224 }
225
369327fa 226 spin_lock_bh(&mcdi->iface_lock);
df2cd8af 227 efx_mcdi_read_response_header(efx);
369327fa 228 spin_unlock_bh(&mcdi->iface_lock);
afd4aea0
BH		 229
230 /* Return rc=0 like wait_event_timeout() */
231 return 0;
232}
233
876be083
BH		 234/* Test and clear MC-rebooted flag for this port/function; reset
235 * software state as necessary.
236 */
afd4aea0
BH		 237int efx_mcdi_poll_reboot(struct efx_nic *efx)
238{
f3ad5003 239 int rc;
afd4aea0 240
f3ad5003
BH		 241 if (!efx->mcdi)
242 return 0;
afd4aea0 243
f3ad5003
BH		 244 rc = efx->type->mcdi_poll_reboot(efx);
245 if (!rc)
afd4aea0
BH		 246 return 0;
247
876be083
BH		 248 /* MAC statistics have been cleared on the NIC; clear our copy
249 * so that efx_update_diff_stat() can continue to work.
250 */
251 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
252
f3ad5003 253 return rc;
afd4aea0
BH		 254}
255
256static void efx_mcdi_acquire(struct efx_mcdi_iface *mcdi)
257{
258 /* Wait until the interface becomes QUIESCENT and we win the race
259 * to mark it RUNNING. */
260 wait_event(mcdi->wq,
261 atomic_cmpxchg(&mcdi->state,
262 MCDI_STATE_QUIESCENT,
263 MCDI_STATE_RUNNING)
264 == MCDI_STATE_QUIESCENT);
265}
266
267static int efx_mcdi_await_completion(struct efx_nic *efx)
268{
269 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
270
271 if (wait_event_timeout(
272 mcdi->wq,
273 atomic_read(&mcdi->state) == MCDI_STATE_COMPLETED,
ebf98e79 274 MCDI_RPC_TIMEOUT) == 0)
afd4aea0
BH		 275 return -ETIMEDOUT;
276
277 /* Check if efx_mcdi_set_mode() switched us back to polled completions.
278 * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
279 * completed the request first, then we'll just end up completing the
280 * request again, which is safe.
281 *
282 * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
283 * wait_event_timeout() implicitly provides.
284 */
285 if (mcdi->mode == MCDI_MODE_POLL)
286 return efx_mcdi_poll(efx);
287
288 return 0;
289}
290
291static bool efx_mcdi_complete(struct efx_mcdi_iface *mcdi)
292{
293 /* If the interface is RUNNING, then move to COMPLETED and wake any
294 * waiters. If the interface isn't in RUNNING then we've received a
295 * duplicate completion after we've already transitioned back to
296 * QUIESCENT. [A subsequent invocation would increment seqno, so would
297 * have failed the seqno check].
298 */
299 if (atomic_cmpxchg(&mcdi->state,
300 MCDI_STATE_RUNNING,
301 MCDI_STATE_COMPLETED) == MCDI_STATE_RUNNING) {
302 wake_up(&mcdi->wq);
303 return true;
304 }
305
306 return false;
307}
308
309static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
310{
311 atomic_set(&mcdi->state, MCDI_STATE_QUIESCENT);
312 wake_up(&mcdi->wq);
313}
314
315static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
5bc283e5 316 unsigned int datalen, unsigned int mcdi_err)
afd4aea0
BH		 317{
318 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
319 bool wake = false;
320
321 spin_lock(&mcdi->iface_lock);
322
323 if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
324 if (mcdi->credits)
325 /* The request has been cancelled */
326 --mcdi->credits;
327 else
62776d03
BH		 328 netif_err(efx, hw, efx->net_dev,
329 "MC response mismatch tx seq 0x%x rx "
330 "seq 0x%x\n", seqno, mcdi->seqno);
afd4aea0 331 } else {
df2cd8af
BH		 332 if (efx->type->mcdi_max_ver >= 2) {
333 /* MCDI v2 responses don't fit in an event */
334 efx_mcdi_read_response_header(efx);
335 } else {
336 mcdi->resprc = efx_mcdi_errno(mcdi_err);
337 mcdi->resp_hdr_len = 4;
338 mcdi->resp_data_len = datalen;
339 }
afd4aea0
BH		 340
341 wake = true;
342 }
343
344 spin_unlock(&mcdi->iface_lock);
345
346 if (wake)
347 efx_mcdi_complete(mcdi);
348}
349
afd4aea0 350int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
9528b921
BH		 351 const efx_dword_t *inbuf, size_t inlen,
352 efx_dword_t *outbuf, size_t outlen,
afd4aea0 353 size_t *outlen_actual)
c3cba721 354{
df2cd8af
BH		 355 int rc;
356
357 rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
358 if (rc)
359 return rc;
c3cba721
SH		 360 return efx_mcdi_rpc_finish(efx, cmd, inlen,
361 outbuf, outlen, outlen_actual);
362}
363
df2cd8af
BH		 364int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
365 const efx_dword_t *inbuf, size_t inlen)
afd4aea0
BH		 366{
367 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
c3cba721 368
df2cd8af
BH		 369 if (efx->type->mcdi_max_ver < 0 ||
370 (efx->type->mcdi_max_ver < 2 &&
371 cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
372 return -EINVAL;
373
374 if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
375 (efx->type->mcdi_max_ver < 2 &&
376 inlen > MCDI_CTL_SDU_LEN_MAX_V1))
377 return -EMSGSIZE;
378
afd4aea0
BH		 379 efx_mcdi_acquire(mcdi);
380
381 /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
382 spin_lock_bh(&mcdi->iface_lock);
383 ++mcdi->seqno;
384 spin_unlock_bh(&mcdi->iface_lock);
385
386 efx_mcdi_copyin(efx, cmd, inbuf, inlen);
df2cd8af 387 return 0;
c3cba721
SH		 388}
389
390int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
9528b921
BH		 391 efx_dword_t *outbuf, size_t outlen,
392 size_t *outlen_actual)
c3cba721
SH		 393{
394 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
395 int rc;
396
afd4aea0
BH		 397 if (mcdi->mode == MCDI_MODE_POLL)
398 rc = efx_mcdi_poll(efx);
399 else
400 rc = efx_mcdi_await_completion(efx);
401
402 if (rc != 0) {
403 /* Close the race with efx_mcdi_ev_cpl() executing just too late
404 * and completing a request we've just cancelled, by ensuring
405 * that the seqno check therein fails.
406 */
407 spin_lock_bh(&mcdi->iface_lock);
408 ++mcdi->seqno;
409 ++mcdi->credits;
410 spin_unlock_bh(&mcdi->iface_lock);
411
62776d03
BH		 412 netif_err(efx, hw, efx->net_dev,
413 "MC command 0x%x inlen %d mode %d timed out\n",
414 cmd, (int)inlen, mcdi->mode);
afd4aea0 415 } else {
369327fa 416 size_t hdr_len, data_len;
afd4aea0
BH		 417
418 /* At the very least we need a memory barrier here to ensure
419 * we pick up changes from efx_mcdi_ev_cpl(). Protect against
420 * a spurious efx_mcdi_ev_cpl() running concurrently by
421 * acquiring the iface_lock. */
422 spin_lock_bh(&mcdi->iface_lock);
5bc283e5 423 rc = mcdi->resprc;
369327fa
BH		 424 hdr_len = mcdi->resp_hdr_len;
425 data_len = mcdi->resp_data_len;
afd4aea0
BH		 426 spin_unlock_bh(&mcdi->iface_lock);
427
5bc283e5
BH		 428 BUG_ON(rc > 0);
429
afd4aea0 430 if (rc == 0) {
369327fa
BH		 431 efx->type->mcdi_read_response(efx, outbuf, hdr_len,
432 min(outlen, data_len));
afd4aea0 433 if (outlen_actual != NULL)
369327fa 434 *outlen_actual = data_len;
afd4aea0
BH		 435 } else if (cmd == MC_CMD_REBOOT && rc == -EIO)
436 ; /* Don't reset if MC_CMD_REBOOT returns EIO */
437 else if (rc == -EIO || rc == -EINTR) {
62776d03
BH		 438 netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
439 -rc);
afd4aea0
BH		 440 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
441 } else
f18ca364 442 netif_dbg(efx, hw, efx->net_dev,
62776d03
BH		 443 "MC command 0x%x inlen %d failed rc=%d\n",
444 cmd, (int)inlen, -rc);
3f713bf4
BH		 445
446 if (rc == -EIO || rc == -EINTR) {
447 msleep(MCDI_STATUS_SLEEP_MS);
448 efx_mcdi_poll_reboot(efx);
449 }
afd4aea0
BH		 450 }
451
452 efx_mcdi_release(mcdi);
453 return rc;
454}
455
456void efx_mcdi_mode_poll(struct efx_nic *efx)
457{
458 struct efx_mcdi_iface *mcdi;
459
f3ad5003 460 if (!efx->mcdi)
afd4aea0
BH		 461 return;
462
463 mcdi = efx_mcdi(efx);
464 if (mcdi->mode == MCDI_MODE_POLL)
465 return;
466
467 /* We can switch from event completion to polled completion, because
468 * mcdi requests are always completed in shared memory. We do this by
469 * switching the mode to POLL'd then completing the request.
470 * efx_mcdi_await_completion() will then call efx_mcdi_poll().
471 *
472 * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
473 * which efx_mcdi_complete() provides for us.
474 */
475 mcdi->mode = MCDI_MODE_POLL;
476
477 efx_mcdi_complete(mcdi);
478}
479
480void efx_mcdi_mode_event(struct efx_nic *efx)
481{
482 struct efx_mcdi_iface *mcdi;
483
f3ad5003 484 if (!efx->mcdi)
afd4aea0
BH		 485 return;
486
487 mcdi = efx_mcdi(efx);
488
489 if (mcdi->mode == MCDI_MODE_EVENTS)
490 return;
491
492 /* We can't switch from polled to event completion in the middle of a
493 * request, because the completion method is specified in the request.
494 * So acquire the interface to serialise the requestors. We don't need
495 * to acquire the iface_lock to change the mode here, but we do need a
496 * write memory barrier ensure that efx_mcdi_rpc() sees it, which
497 * efx_mcdi_acquire() provides.
498 */
499 efx_mcdi_acquire(mcdi);
500 mcdi->mode = MCDI_MODE_EVENTS;
501 efx_mcdi_release(mcdi);
502}
503
504static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
505{
506 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
507
508 /* If there is an outstanding MCDI request, it has been terminated
509 * either by a BADASSERT or REBOOT event. If the mcdi interface is
510 * in polled mode, then do nothing because the MC reboot handler will
511 * set the header correctly. However, if the mcdi interface is waiting
512 * for a CMDDONE event it won't receive it [and since all MCDI events
513 * are sent to the same queue, we can't be racing with
514 * efx_mcdi_ev_cpl()]
515 *
516 * There's a race here with efx_mcdi_rpc(), because we might receive
517 * a REBOOT event *before* the request has been copied out. In polled
25985edc 518 * mode (during startup) this is irrelevant, because efx_mcdi_complete()
afd4aea0
BH		 519 * is ignored. In event mode, this condition is just an edge-case of
520 * receiving a REBOOT event after posting the MCDI request. Did the mc
521 * reboot before or after the copyout? The best we can do always is
522 * just return failure.
523 */
524 spin_lock(&mcdi->iface_lock);
525 if (efx_mcdi_complete(mcdi)) {
526 if (mcdi->mode == MCDI_MODE_EVENTS) {
527 mcdi->resprc = rc;
df2cd8af
BH		 528 mcdi->resp_hdr_len = 0;
529 mcdi->resp_data_len = 0;
18e3ee2c 530 ++mcdi->credits;
afd4aea0 531 }
3f713bf4
BH		 532 } else {
533 int count;
534
afd4aea0
BH		 535 /* Nobody was waiting for an MCDI request, so trigger a reset */
536 efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
537
3f713bf4
BH		 538 /* Consume the status word since efx_mcdi_rpc_finish() won't */
539 for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
540 if (efx_mcdi_poll_reboot(efx))
541 break;
542 udelay(MCDI_STATUS_DELAY_US);
543 }
544 }
545
afd4aea0
BH		 546 spin_unlock(&mcdi->iface_lock);
547}
548
afd4aea0
BH		 549/* Called from falcon_process_eventq for MCDI events */
550void efx_mcdi_process_event(struct efx_channel *channel,
551 efx_qword_t *event)
552{
553 struct efx_nic *efx = channel->efx;
554 int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
555 u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
556
557 switch (code) {
558 case MCDI_EVENT_CODE_BADSSERT:
62776d03
BH		 559 netif_err(efx, hw, efx->net_dev,
560 "MC watchdog or assertion failure at 0x%x\n", data);
5bc283e5 561 efx_mcdi_ev_death(efx, -EINTR);
afd4aea0
BH		 562 break;
563
564 case MCDI_EVENT_CODE_PMNOTICE:
62776d03 565 netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
afd4aea0
BH		 566 break;
567
568 case MCDI_EVENT_CODE_CMDDONE:
569 efx_mcdi_ev_cpl(efx,
570 MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
571 MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
572 MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
573 break;
574
575 case MCDI_EVENT_CODE_LINKCHANGE:
576 efx_mcdi_process_link_change(efx, event);
577 break;
578 case MCDI_EVENT_CODE_SENSOREVT:
579 efx_mcdi_sensor_event(efx, event);
580 break;
581 case MCDI_EVENT_CODE_SCHEDERR:
62776d03
BH		 582 netif_info(efx, hw, efx->net_dev,
583 "MC Scheduler error address=0x%x\n", data);
afd4aea0
BH		 584 break;
585 case MCDI_EVENT_CODE_REBOOT:
62776d03 586 netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
5bc283e5 587 efx_mcdi_ev_death(efx, -EIO);
afd4aea0
BH		 588 break;
589 case MCDI_EVENT_CODE_MAC_STATS_DMA:
590 /* MAC stats are gather lazily. We can ignore this. */
591 break;
cd2d5b52
BH		 592 case MCDI_EVENT_CODE_FLR:
593 efx_sriov_flr(efx, MCDI_EVENT_FIELD(*event, FLR_VF));
594 break;
7c236c43
SH		 595 case MCDI_EVENT_CODE_PTP_RX:
596 case MCDI_EVENT_CODE_PTP_FAULT:
597 case MCDI_EVENT_CODE_PTP_PPS:
598 efx_ptp_event(efx, event);
599 break;
afd4aea0
BH		 600
601 default:
62776d03
BH		 602 netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
603 code);
afd4aea0
BH		 604 }
605}
606
607/**************************************************************************
608 *
609 * Specific request functions
610 *
611 **************************************************************************
612 */
613
e5f0fd27 614void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
afd4aea0 615{
59cfc479 616 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
afd4aea0
BH		 617 size_t outlength;
618 const __le16 *ver_words;
619 int rc;
620
621 BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
622
623 rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
624 outbuf, sizeof(outbuf), &outlength);
625 if (rc)
626 goto fail;
627
05a9320f 628 if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
00bbb4a5 629 rc = -EIO;
afd4aea0
BH		 630 goto fail;
631 }
632
633 ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
e5f0fd27
BH		 634 snprintf(buf, len, "%u.%u.%u.%u",
635 le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
636 le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
637 return;
afd4aea0
BH		 638
639fail:
62776d03 640 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
e5f0fd27 641 buf[0] = 0;
afd4aea0
BH		 642}
643
644int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
645 bool *was_attached)
646{
59cfc479
BH		 647 MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
648 MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_OUT_LEN);
afd4aea0
BH		 649 size_t outlen;
650 int rc;
651
652 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
653 driver_operating ? 1 : 0);
654 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
f2b0befd 655 MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
afd4aea0
BH		 656
657 rc = efx_mcdi_rpc(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
658 outbuf, sizeof(outbuf), &outlen);
659 if (rc)
660 goto fail;
00bbb4a5
BH		 661 if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
662 rc = -EIO;
afd4aea0 663 goto fail;
00bbb4a5 664 }
afd4aea0
BH		 665
666 if (was_attached != NULL)
667 *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
668 return 0;
669
670fail:
62776d03 671 netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 672 return rc;
673}
674
675int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
6aa9c7f6 676 u16 *fw_subtype_list, u32 *capabilities)
afd4aea0 677{
59cfc479 678 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
c5bb0e98 679 size_t outlen, i;
afd4aea0 680 int port_num = efx_port_num(efx);
afd4aea0
BH		 681 int rc;
682
683 BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
684
685 rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
686 outbuf, sizeof(outbuf), &outlen);
687 if (rc)
688 goto fail;
689
05a9320f 690 if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
00bbb4a5 691 rc = -EIO;
afd4aea0
BH		 692 goto fail;
693 }
694
afd4aea0 695 if (mac_address)
c5bb0e98
BH		 696 memcpy(mac_address,
697 port_num ?
698 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
699 MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0),
700 ETH_ALEN);
bfeed902 701 if (fw_subtype_list) {
bfeed902 702 for (i = 0;
c5bb0e98
BH		 703 i < MCDI_VAR_ARRAY_LEN(outlen,
704 GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
705 i++)
706 fw_subtype_list[i] = MCDI_ARRAY_WORD(
707 outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
708 for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
709 fw_subtype_list[i] = 0;
bfeed902 710 }
6aa9c7f6
MS		 711 if (capabilities) {
712 if (port_num)
713 *capabilities = MCDI_DWORD(outbuf,
714 GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
715 else
716 *capabilities = MCDI_DWORD(outbuf,
717 GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
718 }
afd4aea0
BH		 719
720 return 0;
721
722fail:
62776d03
BH		 723 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
724 __func__, rc, (int)outlen);
afd4aea0
BH		 725
726 return rc;
727}
728
729int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
730{
59cfc479 731 MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
afd4aea0
BH		 732 u32 dest = 0;
733 int rc;
734
735 if (uart)
736 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
737 if (evq)
738 dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
739
740 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
741 MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
742
743 BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
744
745 rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
746 NULL, 0, NULL);
747 if (rc)
748 goto fail;
749
750 return 0;
751
752fail:
62776d03 753 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 754 return rc;
755}
756
757int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
758{
59cfc479 759 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
afd4aea0
BH		 760 size_t outlen;
761 int rc;
762
763 BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
764
765 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
766 outbuf, sizeof(outbuf), &outlen);
767 if (rc)
768 goto fail;
00bbb4a5
BH		 769 if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
770 rc = -EIO;
afd4aea0 771 goto fail;
00bbb4a5 772 }
afd4aea0
BH		 773
774 *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
775 return 0;
776
777fail:
62776d03
BH		 778 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
779 __func__, rc);
afd4aea0
BH		 780 return rc;
781}
782
783int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
784 size_t *size_out, size_t *erase_size_out,
785 bool *protected_out)
786{
59cfc479
BH		 787 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
788 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
afd4aea0
BH		 789 size_t outlen;
790 int rc;
791
792 MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
793
794 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
795 outbuf, sizeof(outbuf), &outlen);
796 if (rc)
797 goto fail;
00bbb4a5
BH		 798 if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
799 rc = -EIO;
afd4aea0 800 goto fail;
00bbb4a5 801 }
afd4aea0
BH		 802
803 *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
804 *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
805 *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
05a9320f 806 (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
afd4aea0
BH		 807 return 0;
808
809fail:
62776d03 810 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 811 return rc;
812}
813
2e803407
BH		 814static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
815{
59cfc479
BH		 816 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
817 MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
2e803407
BH		 818 int rc;
819
820 MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
821
822 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
823 outbuf, sizeof(outbuf), NULL);
824 if (rc)
825 return rc;
826
827 switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
828 case MC_CMD_NVRAM_TEST_PASS:
829 case MC_CMD_NVRAM_TEST_NOTSUPP:
830 return 0;
831 default:
832 return -EIO;
833 }
834}
835
836int efx_mcdi_nvram_test_all(struct efx_nic *efx)
837{
838 u32 nvram_types;
839 unsigned int type;
840 int rc;
841
842 rc = efx_mcdi_nvram_types(efx, &nvram_types);
843 if (rc)
b548a988 844 goto fail1;
2e803407
BH		 845
846 type = 0;
847 while (nvram_types != 0) {
848 if (nvram_types & 1) {
849 rc = efx_mcdi_nvram_test(efx, type);
850 if (rc)
b548a988 851 goto fail2;
2e803407
BH		 852 }
853 type++;
854 nvram_types >>= 1;
855 }
856
857 return 0;
b548a988
BH		 858
859fail2:
62776d03
BH		 860 netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
861 __func__, type);
b548a988 862fail1:
62776d03 863 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
b548a988 864 return rc;
2e803407
BH		 865}
866
8b2103ad 867static int efx_mcdi_read_assertion(struct efx_nic *efx)
afd4aea0 868{
59cfc479
BH		 869 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
870 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
c5bb0e98 871 unsigned int flags, index;
afd4aea0
BH		 872 const char *reason;
873 size_t outlen;
874 int retry;
875 int rc;
876
8b2103ad
SH		 877 /* Attempt to read any stored assertion state before we reboot
878 * the mcfw out of the assertion handler. Retry twice, once
afd4aea0
BH		 879 * because a boot-time assertion might cause this command to fail
880 * with EINTR. And once again because GET_ASSERTS can race with
881 * MC_CMD_REBOOT running on the other port. */
882 retry = 2;
883 do {
8b2103ad 884 MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
afd4aea0 885 rc = efx_mcdi_rpc(efx, MC_CMD_GET_ASSERTS,
8b2103ad
SH		 886 inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
887 outbuf, sizeof(outbuf), &outlen);
afd4aea0
BH		 888 } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
889
890 if (rc)
891 return rc;
892 if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
00bbb4a5 893 return -EIO;
afd4aea0 894
8b2103ad
SH		 895 /* Print out any recorded assertion state */
896 flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
afd4aea0
BH		 897 if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
898 return 0;
899
afd4aea0
BH		 900 reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
901 ? "system-level assertion"
902 : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
903 ? "thread-level assertion"
904 : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
905 ? "watchdog reset"
906 : "unknown assertion";
62776d03
BH		 907 netif_err(efx, hw, efx->net_dev,
908 "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
909 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
910 MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
afd4aea0
BH		 911
912 /* Print out the registers */
c5bb0e98
BH		 913 for (index = 0;
914 index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
915 index++)
916 netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
917 1 + index,
918 MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
919 index));
afd4aea0
BH		 920
921 return 0;
922}
923
8b2103ad
SH		 924static void efx_mcdi_exit_assertion(struct efx_nic *efx)
925{
59cfc479 926 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
8b2103ad 927
0f1e54ae
BH		 928 /* If the MC is running debug firmware, it might now be
929 * waiting for a debugger to attach, but we just want it to
930 * reboot. We set a flag that makes the command a no-op if it
931 * has already done so. We don't know what return code to
932 * expect (0 or -EIO), so ignore it.
933 */
8b2103ad
SH		 934 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
935 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
936 MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
0f1e54ae
BH		 937 (void) efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
938 NULL, 0, NULL);
8b2103ad
SH		 939}
940
941int efx_mcdi_handle_assertion(struct efx_nic *efx)
942{
943 int rc;
944
945 rc = efx_mcdi_read_assertion(efx);
946 if (rc)
947 return rc;
948
949 efx_mcdi_exit_assertion(efx);
950
951 return 0;
952}
953
afd4aea0
BH		 954void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
955{
59cfc479 956 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
afd4aea0
BH		 957 int rc;
958
959 BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
960 BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
961 BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
962
963 BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
964
965 MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
966
967 rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
968 NULL, 0, NULL);
969 if (rc)
62776d03
BH		 970 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
971 __func__, rc);
afd4aea0
BH		 972}
973
6bff861d 974static int efx_mcdi_reset_port(struct efx_nic *efx)
afd4aea0 975{
05a9320f 976 int rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, NULL, 0, NULL, 0, NULL);
afd4aea0 977 if (rc)
62776d03
BH		 978 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
979 __func__, rc);
afd4aea0
BH		 980 return rc;
981}
982
6bff861d 983static int efx_mcdi_reset_mc(struct efx_nic *efx)
afd4aea0 984{
59cfc479 985 MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
afd4aea0
BH		 986 int rc;
987
988 BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
989 MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
990 rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
991 NULL, 0, NULL);
992 /* White is black, and up is down */
993 if (rc == -EIO)
994 return 0;
995 if (rc == 0)
996 rc = -EIO;
62776d03 997 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 998 return rc;
999}
1000
6bff861d
BH		 1001enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
1002{
1003 return RESET_TYPE_RECOVER_OR_ALL;
1004}
1005
1006int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
1007{
1008 int rc;
1009
1010 /* Recover from a failed assertion pre-reset */
1011 rc = efx_mcdi_handle_assertion(efx);
1012 if (rc)
1013 return rc;
1014
1015 if (method == RESET_TYPE_WORLD)
1016 return efx_mcdi_reset_mc(efx);
1017 else
1018 return efx_mcdi_reset_port(efx);
1019}
1020
d215697f 1021static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
1022 const u8 *mac, int *id_out)
afd4aea0 1023{
59cfc479
BH		 1024 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
1025 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
afd4aea0
BH		 1026 size_t outlen;
1027 int rc;
1028
1029 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
1030 MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
1031 MC_CMD_FILTER_MODE_SIMPLE);
1032 memcpy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac, ETH_ALEN);
1033
1034 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
1035 outbuf, sizeof(outbuf), &outlen);
1036 if (rc)
1037 goto fail;
1038
1039 if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
00bbb4a5 1040 rc = -EIO;
afd4aea0
BH		 1041 goto fail;
1042 }
1043
1044 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
1045
1046 return 0;
1047
1048fail:
1049 *id_out = -1;
62776d03 1050 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1051 return rc;
1052
1053}
1054
1055
1056int
1057efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
1058{
1059 return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
1060}
1061
1062
1063int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
1064{
59cfc479 1065 MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
afd4aea0
BH		 1066 size_t outlen;
1067 int rc;
1068
1069 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
1070 outbuf, sizeof(outbuf), &outlen);
1071 if (rc)
1072 goto fail;
1073
1074 if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
00bbb4a5 1075 rc = -EIO;
afd4aea0
BH		 1076 goto fail;
1077 }
1078
1079 *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
1080
1081 return 0;
1082
1083fail:
1084 *id_out = -1;
62776d03 1085 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1086 return rc;
1087}
1088
1089
1090int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
1091{
59cfc479 1092 MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
afd4aea0
BH		 1093 int rc;
1094
1095 MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
1096
1097 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
1098 NULL, 0, NULL);
1099 if (rc)
1100 goto fail;
1101
1102 return 0;
1103
1104fail:
62776d03 1105 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1106 return rc;
1107}
1108
cd2d5b52
BH		 1109int efx_mcdi_flush_rxqs(struct efx_nic *efx)
1110{
1111 struct efx_channel *channel;
1112 struct efx_rx_queue *rx_queue;
c5bb0e98
BH		 1113 MCDI_DECLARE_BUF(inbuf,
1114 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
cd2d5b52
BH		 1115 int rc, count;
1116
45078374
BH		 1117 BUILD_BUG_ON(EFX_MAX_CHANNELS >
1118 MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
1119
cd2d5b52
BH		 1120 count = 0;
1121 efx_for_each_channel(channel, efx) {
1122 efx_for_each_channel_rx_queue(rx_queue, channel) {
1123 if (rx_queue->flush_pending) {
1124 rx_queue->flush_pending = false;
1125 atomic_dec(&efx->rxq_flush_pending);
c5bb0e98
BH		 1126 MCDI_SET_ARRAY_DWORD(
1127 inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
1128 count, efx_rx_queue_index(rx_queue));
1129 count++;
cd2d5b52
BH		 1130 }
1131 }
1132 }
1133
c5bb0e98
BH		 1134 rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
1135 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
bbec969b 1136 WARN_ON(rc < 0);
cd2d5b52 1137
cd2d5b52
BH		 1138 return rc;
1139}
afd4aea0
BH		 1140
1141int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
1142{
1143 int rc;
1144
1145 rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
1146 if (rc)
1147 goto fail;
1148
1149 return 0;
1150
1151fail:
62776d03 1152 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 1153 return rc;
1154}
1155
45a3fd55
BH		 1156#ifdef CONFIG_SFC_MTD
1157
1158#define EFX_MCDI_NVRAM_LEN_MAX 128
1159
1160static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
1161{
1162 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
1163 int rc;
1164
1165 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
1166
1167 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
1168
1169 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
1170 NULL, 0, NULL);
1171 if (rc)
1172 goto fail;
1173
1174 return 0;
1175
1176fail:
1177 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1178 return rc;
1179}
1180
1181static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
1182 loff_t offset, u8 *buffer, size_t length)
1183{
1184 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
1185 MCDI_DECLARE_BUF(outbuf,
1186 MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1187 size_t outlen;
1188 int rc;
1189
1190 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
1191 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
1192 MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
1193
1194 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
1195 outbuf, sizeof(outbuf), &outlen);
1196 if (rc)
1197 goto fail;
1198
1199 memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
1200 return 0;
1201
1202fail:
1203 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1204 return rc;
1205}
1206
1207static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
1208 loff_t offset, const u8 *buffer, size_t length)
1209{
1210 MCDI_DECLARE_BUF(inbuf,
1211 MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
1212 int rc;
1213
1214 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
1215 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
1216 MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
1217 memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
1218
1219 BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
1220
1221 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
1222 ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
1223 NULL, 0, NULL);
1224 if (rc)
1225 goto fail;
1226
1227 return 0;
1228
1229fail:
1230 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1231 return rc;
1232}
1233
1234static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
1235 loff_t offset, size_t length)
1236{
1237 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
1238 int rc;
1239
1240 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
1241 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
1242 MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
1243
1244 BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
1245
1246 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
1247 NULL, 0, NULL);
1248 if (rc)
1249 goto fail;
1250
1251 return 0;
1252
1253fail:
1254 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1255 return rc;
1256}
1257
1258static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
1259{
1260 MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
1261 int rc;
1262
1263 MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
1264
1265 BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
1266
1267 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
1268 NULL, 0, NULL);
1269 if (rc)
1270 goto fail;
1271
1272 return 0;
1273
1274fail:
1275 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
1276 return rc;
1277}
1278
1279int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
1280 size_t len, size_t *retlen, u8 *buffer)
1281{
1282 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1283 struct efx_nic *efx = mtd->priv;
1284 loff_t offset = start;
1285 loff_t end = min_t(loff_t, start + len, mtd->size);
1286 size_t chunk;
1287 int rc = 0;
1288
1289 while (offset < end) {
1290 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1291 rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
1292 buffer, chunk);
1293 if (rc)
1294 goto out;
1295 offset += chunk;
1296 buffer += chunk;
1297 }
1298out:
1299 *retlen = offset - start;
1300 return rc;
1301}
1302
1303int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
1304{
1305 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1306 struct efx_nic *efx = mtd->priv;
1307 loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
1308 loff_t end = min_t(loff_t, start + len, mtd->size);
1309 size_t chunk = part->common.mtd.erasesize;
1310 int rc = 0;
1311
1312 if (!part->updating) {
1313 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1314 if (rc)
1315 goto out;
1316 part->updating = true;
1317 }
1318
1319 /* The MCDI interface can in fact do multiple erase blocks at once;
1320 * but erasing may be slow, so we make multiple calls here to avoid
1321 * tripping the MCDI RPC timeout. */
1322 while (offset < end) {
1323 rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
1324 chunk);
1325 if (rc)
1326 goto out;
1327 offset += chunk;
1328 }
1329out:
1330 return rc;
1331}
1332
1333int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
1334 size_t len, size_t *retlen, const u8 *buffer)
1335{
1336 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1337 struct efx_nic *efx = mtd->priv;
1338 loff_t offset = start;
1339 loff_t end = min_t(loff_t, start + len, mtd->size);
1340 size_t chunk;
1341 int rc = 0;
1342
1343 if (!part->updating) {
1344 rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
1345 if (rc)
1346 goto out;
1347 part->updating = true;
1348 }
1349
1350 while (offset < end) {
1351 chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
1352 rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
1353 buffer, chunk);
1354 if (rc)
1355 goto out;
1356 offset += chunk;
1357 buffer += chunk;
1358 }
1359out:
1360 *retlen = offset - start;
1361 return rc;
1362}
1363
1364int efx_mcdi_mtd_sync(struct mtd_info *mtd)
1365{
1366 struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
1367 struct efx_nic *efx = mtd->priv;
1368 int rc = 0;
1369
1370 if (part->updating) {
1371 part->updating = false;
1372 rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
1373 }
1374
1375 return rc;
1376}
1377
1378void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
1379{
1380 struct efx_mcdi_mtd_partition *mcdi_part =
1381 container_of(part, struct efx_mcdi_mtd_partition, common);
1382 struct efx_nic *efx = part->mtd.priv;
1383
1384 snprintf(part->name, sizeof(part->name), "%s %s:%02x",
1385 efx->name, part->type_name, mcdi_part->fw_subtype);
1386}
1387
1388#endif /* CONFIG_SFC_MTD */
Linux kernel - Deliverables
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