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afd4aea0 | 1 | /**************************************************************************** |
f7a6d2c4 BH |
2 | * Driver for Solarflare network controllers and boards |
3 | * Copyright 2009-2013 Solarflare Communications Inc. | |
afd4aea0 BH |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | /* | |
11 | * Driver for PHY related operations via MCDI. | |
12 | */ | |
13 | ||
5a0e3ad6 | 14 | #include <linux/slab.h> |
afd4aea0 BH |
15 | #include "efx.h" |
16 | #include "phy.h" | |
17 | #include "mcdi.h" | |
18 | #include "mcdi_pcol.h" | |
affaf485 SH |
19 | #include "nic.h" |
20 | #include "selftest.h" | |
afd4aea0 | 21 | |
3bd93035 | 22 | struct efx_mcdi_phy_data { |
afd4aea0 BH |
23 | u32 flags; |
24 | u32 type; | |
25 | u32 supported_cap; | |
26 | u32 channel; | |
27 | u32 port; | |
28 | u32 stats_mask; | |
29 | u8 name[20]; | |
30 | u32 media; | |
31 | u32 mmd_mask; | |
32 | u8 revision[20]; | |
33 | u32 forced_cap; | |
34 | }; | |
35 | ||
36 | static int | |
3bd93035 | 37 | efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_data *cfg) |
afd4aea0 | 38 | { |
59cfc479 | 39 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_CFG_OUT_LEN); |
afd4aea0 BH |
40 | size_t outlen; |
41 | int rc; | |
42 | ||
43 | BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_IN_LEN != 0); | |
44 | BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); | |
45 | ||
46 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_CFG, NULL, 0, | |
47 | outbuf, sizeof(outbuf), &outlen); | |
48 | if (rc) | |
49 | goto fail; | |
50 | ||
51 | if (outlen < MC_CMD_GET_PHY_CFG_OUT_LEN) { | |
00bbb4a5 | 52 | rc = -EIO; |
afd4aea0 BH |
53 | goto fail; |
54 | } | |
55 | ||
56 | cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); | |
57 | cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); | |
58 | cfg->supported_cap = | |
59 | MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_SUPPORTED_CAP); | |
60 | cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); | |
61 | cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); | |
62 | cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); | |
63 | memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), | |
64 | sizeof(cfg->name)); | |
65 | cfg->media = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MEDIA_TYPE); | |
66 | cfg->mmd_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MMD_MASK); | |
67 | memcpy(cfg->revision, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_REVISION), | |
68 | sizeof(cfg->revision)); | |
69 | ||
70 | return 0; | |
71 | ||
72 | fail: | |
62776d03 | 73 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
74 | return rc; |
75 | } | |
76 | ||
77 | static int efx_mcdi_set_link(struct efx_nic *efx, u32 capabilities, | |
78 | u32 flags, u32 loopback_mode, | |
79 | u32 loopback_speed) | |
80 | { | |
59cfc479 | 81 | MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_LINK_IN_LEN); |
afd4aea0 BH |
82 | int rc; |
83 | ||
84 | BUILD_BUG_ON(MC_CMD_SET_LINK_OUT_LEN != 0); | |
85 | ||
86 | MCDI_SET_DWORD(inbuf, SET_LINK_IN_CAP, capabilities); | |
87 | MCDI_SET_DWORD(inbuf, SET_LINK_IN_FLAGS, flags); | |
88 | MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_MODE, loopback_mode); | |
89 | MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_SPEED, loopback_speed); | |
90 | ||
91 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_LINK, inbuf, sizeof(inbuf), | |
92 | NULL, 0, NULL); | |
afd4aea0 BH |
93 | return rc; |
94 | } | |
95 | ||
96 | static int efx_mcdi_loopback_modes(struct efx_nic *efx, u64 *loopback_modes) | |
97 | { | |
59cfc479 | 98 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LOOPBACK_MODES_OUT_LEN); |
afd4aea0 BH |
99 | size_t outlen; |
100 | int rc; | |
101 | ||
102 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_LOOPBACK_MODES, NULL, 0, | |
103 | outbuf, sizeof(outbuf), &outlen); | |
104 | if (rc) | |
105 | goto fail; | |
106 | ||
f2b0befd BH |
107 | if (outlen < (MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST + |
108 | MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN)) { | |
00bbb4a5 | 109 | rc = -EIO; |
afd4aea0 BH |
110 | goto fail; |
111 | } | |
112 | ||
05a9320f | 113 | *loopback_modes = MCDI_QWORD(outbuf, GET_LOOPBACK_MODES_OUT_SUGGESTED); |
afd4aea0 BH |
114 | |
115 | return 0; | |
116 | ||
117 | fail: | |
62776d03 | 118 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
119 | return rc; |
120 | } | |
121 | ||
43f775b2 BH |
122 | static int efx_mcdi_mdio_read(struct net_device *net_dev, |
123 | int prtad, int devad, u16 addr) | |
afd4aea0 | 124 | { |
43f775b2 | 125 | struct efx_nic *efx = netdev_priv(net_dev); |
59cfc479 BH |
126 | MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_READ_IN_LEN); |
127 | MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_READ_OUT_LEN); | |
afd4aea0 BH |
128 | size_t outlen; |
129 | int rc; | |
130 | ||
43f775b2 | 131 | MCDI_SET_DWORD(inbuf, MDIO_READ_IN_BUS, efx->mdio_bus); |
afd4aea0 BH |
132 | MCDI_SET_DWORD(inbuf, MDIO_READ_IN_PRTAD, prtad); |
133 | MCDI_SET_DWORD(inbuf, MDIO_READ_IN_DEVAD, devad); | |
134 | MCDI_SET_DWORD(inbuf, MDIO_READ_IN_ADDR, addr); | |
135 | ||
136 | rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_READ, inbuf, sizeof(inbuf), | |
137 | outbuf, sizeof(outbuf), &outlen); | |
138 | if (rc) | |
1e0b8120 | 139 | return rc; |
afd4aea0 | 140 | |
43f775b2 BH |
141 | if (MCDI_DWORD(outbuf, MDIO_READ_OUT_STATUS) != |
142 | MC_CMD_MDIO_STATUS_GOOD) | |
143 | return -EIO; | |
144 | ||
145 | return (u16)MCDI_DWORD(outbuf, MDIO_READ_OUT_VALUE); | |
afd4aea0 BH |
146 | } |
147 | ||
43f775b2 BH |
148 | static int efx_mcdi_mdio_write(struct net_device *net_dev, |
149 | int prtad, int devad, u16 addr, u16 value) | |
afd4aea0 | 150 | { |
43f775b2 | 151 | struct efx_nic *efx = netdev_priv(net_dev); |
59cfc479 BH |
152 | MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_WRITE_IN_LEN); |
153 | MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_WRITE_OUT_LEN); | |
afd4aea0 BH |
154 | size_t outlen; |
155 | int rc; | |
156 | ||
43f775b2 | 157 | MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_BUS, efx->mdio_bus); |
afd4aea0 BH |
158 | MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_PRTAD, prtad); |
159 | MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_DEVAD, devad); | |
160 | MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_ADDR, addr); | |
161 | MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_VALUE, value); | |
162 | ||
163 | rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_WRITE, inbuf, sizeof(inbuf), | |
164 | outbuf, sizeof(outbuf), &outlen); | |
165 | if (rc) | |
1e0b8120 | 166 | return rc; |
afd4aea0 | 167 | |
43f775b2 BH |
168 | if (MCDI_DWORD(outbuf, MDIO_WRITE_OUT_STATUS) != |
169 | MC_CMD_MDIO_STATUS_GOOD) | |
170 | return -EIO; | |
171 | ||
afd4aea0 | 172 | return 0; |
afd4aea0 BH |
173 | } |
174 | ||
175 | static u32 mcdi_to_ethtool_cap(u32 media, u32 cap) | |
176 | { | |
177 | u32 result = 0; | |
178 | ||
179 | switch (media) { | |
180 | case MC_CMD_MEDIA_KX4: | |
181 | result |= SUPPORTED_Backplane; | |
182 | if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN)) | |
183 | result |= SUPPORTED_1000baseKX_Full; | |
184 | if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN)) | |
185 | result |= SUPPORTED_10000baseKX4_Full; | |
ac331e94 EC |
186 | if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) |
187 | result |= SUPPORTED_40000baseKR4_Full; | |
afd4aea0 BH |
188 | break; |
189 | ||
190 | case MC_CMD_MEDIA_XFP: | |
191 | case MC_CMD_MEDIA_SFP_PLUS: | |
ac331e94 EC |
192 | case MC_CMD_MEDIA_QSFP_PLUS: |
193 | result |= SUPPORTED_FIBRE; | |
3497ed8c BK |
194 | if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN)) |
195 | result |= SUPPORTED_1000baseT_Full; | |
196 | if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN)) | |
197 | result |= SUPPORTED_10000baseT_Full; | |
ac331e94 EC |
198 | if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) |
199 | result |= SUPPORTED_40000baseCR4_Full; | |
200 | break; | |
201 | ||
afd4aea0 BH |
202 | case MC_CMD_MEDIA_BASE_T: |
203 | result |= SUPPORTED_TP; | |
204 | if (cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN)) | |
205 | result |= SUPPORTED_10baseT_Half; | |
206 | if (cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN)) | |
207 | result |= SUPPORTED_10baseT_Full; | |
208 | if (cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN)) | |
209 | result |= SUPPORTED_100baseT_Half; | |
210 | if (cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN)) | |
211 | result |= SUPPORTED_100baseT_Full; | |
212 | if (cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN)) | |
213 | result |= SUPPORTED_1000baseT_Half; | |
214 | if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN)) | |
215 | result |= SUPPORTED_1000baseT_Full; | |
216 | if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN)) | |
217 | result |= SUPPORTED_10000baseT_Full; | |
218 | break; | |
219 | } | |
220 | ||
221 | if (cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN)) | |
222 | result |= SUPPORTED_Pause; | |
223 | if (cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN)) | |
224 | result |= SUPPORTED_Asym_Pause; | |
225 | if (cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) | |
226 | result |= SUPPORTED_Autoneg; | |
227 | ||
228 | return result; | |
229 | } | |
230 | ||
231 | static u32 ethtool_to_mcdi_cap(u32 cap) | |
232 | { | |
233 | u32 result = 0; | |
234 | ||
235 | if (cap & SUPPORTED_10baseT_Half) | |
236 | result |= (1 << MC_CMD_PHY_CAP_10HDX_LBN); | |
237 | if (cap & SUPPORTED_10baseT_Full) | |
238 | result |= (1 << MC_CMD_PHY_CAP_10FDX_LBN); | |
239 | if (cap & SUPPORTED_100baseT_Half) | |
240 | result |= (1 << MC_CMD_PHY_CAP_100HDX_LBN); | |
241 | if (cap & SUPPORTED_100baseT_Full) | |
242 | result |= (1 << MC_CMD_PHY_CAP_100FDX_LBN); | |
243 | if (cap & SUPPORTED_1000baseT_Half) | |
244 | result |= (1 << MC_CMD_PHY_CAP_1000HDX_LBN); | |
245 | if (cap & (SUPPORTED_1000baseT_Full | SUPPORTED_1000baseKX_Full)) | |
246 | result |= (1 << MC_CMD_PHY_CAP_1000FDX_LBN); | |
247 | if (cap & (SUPPORTED_10000baseT_Full | SUPPORTED_10000baseKX4_Full)) | |
248 | result |= (1 << MC_CMD_PHY_CAP_10000FDX_LBN); | |
ac331e94 EC |
249 | if (cap & (SUPPORTED_40000baseCR4_Full | SUPPORTED_40000baseKR4_Full)) |
250 | result |= (1 << MC_CMD_PHY_CAP_40000FDX_LBN); | |
afd4aea0 BH |
251 | if (cap & SUPPORTED_Pause) |
252 | result |= (1 << MC_CMD_PHY_CAP_PAUSE_LBN); | |
253 | if (cap & SUPPORTED_Asym_Pause) | |
254 | result |= (1 << MC_CMD_PHY_CAP_ASYM_LBN); | |
255 | if (cap & SUPPORTED_Autoneg) | |
256 | result |= (1 << MC_CMD_PHY_CAP_AN_LBN); | |
257 | ||
258 | return result; | |
259 | } | |
260 | ||
261 | static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx) | |
262 | { | |
3bd93035 | 263 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
afd4aea0 BH |
264 | enum efx_phy_mode mode, supported; |
265 | u32 flags; | |
266 | ||
267 | /* TODO: Advertise the capabilities supported by this PHY */ | |
268 | supported = 0; | |
05a9320f | 269 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN)) |
afd4aea0 | 270 | supported |= PHY_MODE_TX_DISABLED; |
05a9320f | 271 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN)) |
afd4aea0 | 272 | supported |= PHY_MODE_LOW_POWER; |
05a9320f | 273 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN)) |
afd4aea0 BH |
274 | supported |= PHY_MODE_OFF; |
275 | ||
276 | mode = efx->phy_mode & supported; | |
277 | ||
278 | flags = 0; | |
279 | if (mode & PHY_MODE_TX_DISABLED) | |
05a9320f | 280 | flags |= (1 << MC_CMD_SET_LINK_IN_TXDIS_LBN); |
afd4aea0 | 281 | if (mode & PHY_MODE_LOW_POWER) |
05a9320f | 282 | flags |= (1 << MC_CMD_SET_LINK_IN_LOWPOWER_LBN); |
afd4aea0 | 283 | if (mode & PHY_MODE_OFF) |
05a9320f | 284 | flags |= (1 << MC_CMD_SET_LINK_IN_POWEROFF_LBN); |
afd4aea0 BH |
285 | |
286 | return flags; | |
287 | } | |
288 | ||
289 | static u32 mcdi_to_ethtool_media(u32 media) | |
290 | { | |
291 | switch (media) { | |
292 | case MC_CMD_MEDIA_XAUI: | |
293 | case MC_CMD_MEDIA_CX4: | |
294 | case MC_CMD_MEDIA_KX4: | |
295 | return PORT_OTHER; | |
296 | ||
297 | case MC_CMD_MEDIA_XFP: | |
298 | case MC_CMD_MEDIA_SFP_PLUS: | |
ac331e94 | 299 | case MC_CMD_MEDIA_QSFP_PLUS: |
afd4aea0 BH |
300 | return PORT_FIBRE; |
301 | ||
302 | case MC_CMD_MEDIA_BASE_T: | |
303 | return PORT_TP; | |
304 | ||
305 | default: | |
306 | return PORT_OTHER; | |
307 | } | |
308 | } | |
309 | ||
43f775b2 BH |
310 | static void efx_mcdi_phy_decode_link(struct efx_nic *efx, |
311 | struct efx_link_state *link_state, | |
312 | u32 speed, u32 flags, u32 fcntl) | |
313 | { | |
314 | switch (fcntl) { | |
315 | case MC_CMD_FCNTL_AUTO: | |
316 | WARN_ON(1); /* This is not a link mode */ | |
317 | link_state->fc = EFX_FC_AUTO | EFX_FC_TX | EFX_FC_RX; | |
318 | break; | |
319 | case MC_CMD_FCNTL_BIDIR: | |
320 | link_state->fc = EFX_FC_TX | EFX_FC_RX; | |
321 | break; | |
322 | case MC_CMD_FCNTL_RESPOND: | |
323 | link_state->fc = EFX_FC_RX; | |
324 | break; | |
325 | default: | |
326 | WARN_ON(1); | |
327 | case MC_CMD_FCNTL_OFF: | |
328 | link_state->fc = 0; | |
329 | break; | |
330 | } | |
331 | ||
332 | link_state->up = !!(flags & (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN)); | |
333 | link_state->fd = !!(flags & (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN)); | |
334 | link_state->speed = speed; | |
335 | } | |
336 | ||
afd4aea0 BH |
337 | static int efx_mcdi_phy_probe(struct efx_nic *efx) |
338 | { | |
3bd93035 | 339 | struct efx_mcdi_phy_data *phy_data; |
59cfc479 | 340 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN); |
ff3b00a0 | 341 | u32 caps; |
afd4aea0 BH |
342 | int rc; |
343 | ||
ff3b00a0 SH |
344 | /* Initialise and populate phy_data */ |
345 | phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL); | |
346 | if (phy_data == NULL) | |
347 | return -ENOMEM; | |
348 | ||
349 | rc = efx_mcdi_get_phy_cfg(efx, phy_data); | |
afd4aea0 BH |
350 | if (rc != 0) |
351 | goto fail; | |
352 | ||
ff3b00a0 SH |
353 | /* Read initial link advertisement */ |
354 | BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0); | |
355 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0, | |
356 | outbuf, sizeof(outbuf), NULL); | |
357 | if (rc) | |
358 | goto fail; | |
359 | ||
360 | /* Fill out nic state */ | |
361 | efx->phy_data = phy_data; | |
362 | efx->phy_type = phy_data->type; | |
afd4aea0 | 363 | |
ff3b00a0 SH |
364 | efx->mdio_bus = phy_data->channel; |
365 | efx->mdio.prtad = phy_data->port; | |
366 | efx->mdio.mmds = phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22); | |
afd4aea0 | 367 | efx->mdio.mode_support = 0; |
ff3b00a0 | 368 | if (phy_data->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22)) |
afd4aea0 | 369 | efx->mdio.mode_support |= MDIO_SUPPORTS_C22; |
ff3b00a0 | 370 | if (phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22)) |
afd4aea0 BH |
371 | efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; |
372 | ||
ff3b00a0 SH |
373 | caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP); |
374 | if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN)) | |
375 | efx->link_advertising = | |
376 | mcdi_to_ethtool_cap(phy_data->media, caps); | |
377 | else | |
378 | phy_data->forced_cap = caps; | |
379 | ||
afd4aea0 BH |
380 | /* Assert that we can map efx -> mcdi loopback modes */ |
381 | BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE); | |
382 | BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA); | |
383 | BUILD_BUG_ON(LOOPBACK_GMAC != MC_CMD_LOOPBACK_GMAC); | |
384 | BUILD_BUG_ON(LOOPBACK_XGMII != MC_CMD_LOOPBACK_XGMII); | |
385 | BUILD_BUG_ON(LOOPBACK_XGXS != MC_CMD_LOOPBACK_XGXS); | |
386 | BUILD_BUG_ON(LOOPBACK_XAUI != MC_CMD_LOOPBACK_XAUI); | |
387 | BUILD_BUG_ON(LOOPBACK_GMII != MC_CMD_LOOPBACK_GMII); | |
388 | BUILD_BUG_ON(LOOPBACK_SGMII != MC_CMD_LOOPBACK_SGMII); | |
389 | BUILD_BUG_ON(LOOPBACK_XGBR != MC_CMD_LOOPBACK_XGBR); | |
390 | BUILD_BUG_ON(LOOPBACK_XFI != MC_CMD_LOOPBACK_XFI); | |
391 | BUILD_BUG_ON(LOOPBACK_XAUI_FAR != MC_CMD_LOOPBACK_XAUI_FAR); | |
392 | BUILD_BUG_ON(LOOPBACK_GMII_FAR != MC_CMD_LOOPBACK_GMII_FAR); | |
393 | BUILD_BUG_ON(LOOPBACK_SGMII_FAR != MC_CMD_LOOPBACK_SGMII_FAR); | |
394 | BUILD_BUG_ON(LOOPBACK_XFI_FAR != MC_CMD_LOOPBACK_XFI_FAR); | |
395 | BUILD_BUG_ON(LOOPBACK_GPHY != MC_CMD_LOOPBACK_GPHY); | |
396 | BUILD_BUG_ON(LOOPBACK_PHYXS != MC_CMD_LOOPBACK_PHYXS); | |
397 | BUILD_BUG_ON(LOOPBACK_PCS != MC_CMD_LOOPBACK_PCS); | |
398 | BUILD_BUG_ON(LOOPBACK_PMAPMD != MC_CMD_LOOPBACK_PMAPMD); | |
399 | BUILD_BUG_ON(LOOPBACK_XPORT != MC_CMD_LOOPBACK_XPORT); | |
400 | BUILD_BUG_ON(LOOPBACK_XGMII_WS != MC_CMD_LOOPBACK_XGMII_WS); | |
401 | BUILD_BUG_ON(LOOPBACK_XAUI_WS != MC_CMD_LOOPBACK_XAUI_WS); | |
402 | BUILD_BUG_ON(LOOPBACK_XAUI_WS_FAR != MC_CMD_LOOPBACK_XAUI_WS_FAR); | |
403 | BUILD_BUG_ON(LOOPBACK_XAUI_WS_NEAR != MC_CMD_LOOPBACK_XAUI_WS_NEAR); | |
404 | BUILD_BUG_ON(LOOPBACK_GMII_WS != MC_CMD_LOOPBACK_GMII_WS); | |
405 | BUILD_BUG_ON(LOOPBACK_XFI_WS != MC_CMD_LOOPBACK_XFI_WS); | |
406 | BUILD_BUG_ON(LOOPBACK_XFI_WS_FAR != MC_CMD_LOOPBACK_XFI_WS_FAR); | |
407 | BUILD_BUG_ON(LOOPBACK_PHYXS_WS != MC_CMD_LOOPBACK_PHYXS_WS); | |
408 | ||
409 | rc = efx_mcdi_loopback_modes(efx, &efx->loopback_modes); | |
410 | if (rc != 0) | |
411 | goto fail; | |
412 | /* The MC indicates that LOOPBACK_NONE is a valid loopback mode, | |
413 | * but by convention we don't */ | |
414 | efx->loopback_modes &= ~(1 << LOOPBACK_NONE); | |
415 | ||
7a6b8f6f SH |
416 | /* Set the initial link mode */ |
417 | efx_mcdi_phy_decode_link( | |
418 | efx, &efx->link_state, | |
419 | MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED), | |
420 | MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS), | |
421 | MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL)); | |
422 | ||
423 | /* Default to Autonegotiated flow control if the PHY supports it */ | |
424 | efx->wanted_fc = EFX_FC_RX | EFX_FC_TX; | |
425 | if (phy_data->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) | |
426 | efx->wanted_fc |= EFX_FC_AUTO; | |
cffe9d4c | 427 | efx_link_set_wanted_fc(efx, efx->wanted_fc); |
7a6b8f6f | 428 | |
afd4aea0 BH |
429 | return 0; |
430 | ||
431 | fail: | |
432 | kfree(phy_data); | |
433 | return rc; | |
434 | } | |
435 | ||
43f775b2 | 436 | int efx_mcdi_port_reconfigure(struct efx_nic *efx) |
afd4aea0 | 437 | { |
3bd93035 | 438 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
afd4aea0 BH |
439 | u32 caps = (efx->link_advertising ? |
440 | ethtool_to_mcdi_cap(efx->link_advertising) : | |
441 | phy_cfg->forced_cap); | |
442 | ||
443 | return efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx), | |
444 | efx->loopback_mode, 0); | |
445 | } | |
446 | ||
afd4aea0 BH |
447 | /* Verify that the forced flow control settings (!EFX_FC_AUTO) are |
448 | * supported by the link partner. Warn the user if this isn't the case | |
449 | */ | |
43f775b2 | 450 | static void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa) |
afd4aea0 | 451 | { |
3bd93035 | 452 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
afd4aea0 BH |
453 | u32 rmtadv; |
454 | ||
25985edc | 455 | /* The link partner capabilities are only relevant if the |
afd4aea0 | 456 | * link supports flow control autonegotiation */ |
7a6b8f6f | 457 | if (~phy_cfg->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN)) |
afd4aea0 BH |
458 | return; |
459 | ||
460 | /* If flow control autoneg is supported and enabled, then fine */ | |
461 | if (efx->wanted_fc & EFX_FC_AUTO) | |
462 | return; | |
463 | ||
464 | rmtadv = 0; | |
465 | if (lpa & (1 << MC_CMD_PHY_CAP_PAUSE_LBN)) | |
466 | rmtadv |= ADVERTISED_Pause; | |
467 | if (lpa & (1 << MC_CMD_PHY_CAP_ASYM_LBN)) | |
468 | rmtadv |= ADVERTISED_Asym_Pause; | |
469 | ||
470 | if ((efx->wanted_fc & EFX_FC_TX) && rmtadv == ADVERTISED_Asym_Pause) | |
62776d03 BH |
471 | netif_err(efx, link, efx->net_dev, |
472 | "warning: link partner doesn't support pause frames"); | |
afd4aea0 BH |
473 | } |
474 | ||
475 | static bool efx_mcdi_phy_poll(struct efx_nic *efx) | |
476 | { | |
477 | struct efx_link_state old_state = efx->link_state; | |
59cfc479 | 478 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN); |
afd4aea0 BH |
479 | int rc; |
480 | ||
481 | WARN_ON(!mutex_is_locked(&efx->mac_lock)); | |
482 | ||
483 | BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0); | |
484 | ||
485 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0, | |
486 | outbuf, sizeof(outbuf), NULL); | |
1e0b8120 | 487 | if (rc) |
afd4aea0 | 488 | efx->link_state.up = false; |
1e0b8120 | 489 | else |
afd4aea0 BH |
490 | efx_mcdi_phy_decode_link( |
491 | efx, &efx->link_state, | |
492 | MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED), | |
493 | MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS), | |
494 | MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL)); | |
afd4aea0 BH |
495 | |
496 | return !efx_link_state_equal(&efx->link_state, &old_state); | |
497 | } | |
498 | ||
ff3b00a0 | 499 | static void efx_mcdi_phy_remove(struct efx_nic *efx) |
afd4aea0 BH |
500 | { |
501 | struct efx_mcdi_phy_data *phy_data = efx->phy_data; | |
502 | ||
503 | efx->phy_data = NULL; | |
504 | kfree(phy_data); | |
505 | } | |
506 | ||
507 | static void efx_mcdi_phy_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) | |
508 | { | |
3bd93035 | 509 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
59cfc479 | 510 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN); |
afd4aea0 BH |
511 | int rc; |
512 | ||
513 | ecmd->supported = | |
514 | mcdi_to_ethtool_cap(phy_cfg->media, phy_cfg->supported_cap); | |
515 | ecmd->advertising = efx->link_advertising; | |
70739497 | 516 | ethtool_cmd_speed_set(ecmd, efx->link_state.speed); |
afd4aea0 BH |
517 | ecmd->duplex = efx->link_state.fd; |
518 | ecmd->port = mcdi_to_ethtool_media(phy_cfg->media); | |
519 | ecmd->phy_address = phy_cfg->port; | |
520 | ecmd->transceiver = XCVR_INTERNAL; | |
521 | ecmd->autoneg = !!(efx->link_advertising & ADVERTISED_Autoneg); | |
522 | ecmd->mdio_support = (efx->mdio.mode_support & | |
523 | (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22)); | |
524 | ||
525 | BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0); | |
526 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0, | |
527 | outbuf, sizeof(outbuf), NULL); | |
1e0b8120 | 528 | if (rc) |
afd4aea0 | 529 | return; |
afd4aea0 BH |
530 | ecmd->lp_advertising = |
531 | mcdi_to_ethtool_cap(phy_cfg->media, | |
532 | MCDI_DWORD(outbuf, GET_LINK_OUT_LP_CAP)); | |
533 | } | |
534 | ||
535 | static int efx_mcdi_phy_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd) | |
536 | { | |
3bd93035 | 537 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
afd4aea0 BH |
538 | u32 caps; |
539 | int rc; | |
540 | ||
541 | if (ecmd->autoneg) { | |
542 | caps = (ethtool_to_mcdi_cap(ecmd->advertising) | | |
543 | 1 << MC_CMD_PHY_CAP_AN_LBN); | |
544 | } else if (ecmd->duplex) { | |
25db0338 | 545 | switch (ethtool_cmd_speed(ecmd)) { |
afd4aea0 BH |
546 | case 10: caps = 1 << MC_CMD_PHY_CAP_10FDX_LBN; break; |
547 | case 100: caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN; break; | |
548 | case 1000: caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN; break; | |
549 | case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break; | |
9a12a306 | 550 | case 40000: caps = 1 << MC_CMD_PHY_CAP_40000FDX_LBN; break; |
afd4aea0 BH |
551 | default: return -EINVAL; |
552 | } | |
553 | } else { | |
25db0338 | 554 | switch (ethtool_cmd_speed(ecmd)) { |
afd4aea0 BH |
555 | case 10: caps = 1 << MC_CMD_PHY_CAP_10HDX_LBN; break; |
556 | case 100: caps = 1 << MC_CMD_PHY_CAP_100HDX_LBN; break; | |
557 | case 1000: caps = 1 << MC_CMD_PHY_CAP_1000HDX_LBN; break; | |
558 | default: return -EINVAL; | |
559 | } | |
560 | } | |
561 | ||
562 | rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx), | |
563 | efx->loopback_mode, 0); | |
564 | if (rc) | |
565 | return rc; | |
566 | ||
567 | if (ecmd->autoneg) { | |
568 | efx_link_set_advertising( | |
569 | efx, ecmd->advertising | ADVERTISED_Autoneg); | |
570 | phy_cfg->forced_cap = 0; | |
571 | } else { | |
572 | efx_link_set_advertising(efx, 0); | |
573 | phy_cfg->forced_cap = caps; | |
574 | } | |
575 | return 0; | |
576 | } | |
577 | ||
4f16c073 BH |
578 | static int efx_mcdi_phy_test_alive(struct efx_nic *efx) |
579 | { | |
59cfc479 | 580 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_STATE_OUT_LEN); |
4f16c073 BH |
581 | size_t outlen; |
582 | int rc; | |
583 | ||
584 | BUILD_BUG_ON(MC_CMD_GET_PHY_STATE_IN_LEN != 0); | |
585 | ||
586 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_STATE, NULL, 0, | |
587 | outbuf, sizeof(outbuf), &outlen); | |
588 | if (rc) | |
589 | return rc; | |
590 | ||
591 | if (outlen < MC_CMD_GET_PHY_STATE_OUT_LEN) | |
00bbb4a5 | 592 | return -EIO; |
05a9320f | 593 | if (MCDI_DWORD(outbuf, GET_PHY_STATE_OUT_STATE) != MC_CMD_PHY_STATE_OK) |
4f16c073 BH |
594 | return -EINVAL; |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
affaf485 SH |
599 | static const char *const mcdi_sft9001_cable_diag_names[] = { |
600 | "cable.pairA.length", | |
601 | "cable.pairB.length", | |
602 | "cable.pairC.length", | |
603 | "cable.pairD.length", | |
604 | "cable.pairA.status", | |
605 | "cable.pairB.status", | |
606 | "cable.pairC.status", | |
607 | "cable.pairD.status", | |
608 | }; | |
609 | ||
610 | static int efx_mcdi_bist(struct efx_nic *efx, unsigned int bist_mode, | |
611 | int *results) | |
612 | { | |
613 | unsigned int retry, i, count = 0; | |
614 | size_t outlen; | |
615 | u32 status; | |
c5bb0e98 BH |
616 | MCDI_DECLARE_BUF(inbuf, MC_CMD_START_BIST_IN_LEN); |
617 | MCDI_DECLARE_BUF(outbuf, MC_CMD_POLL_BIST_OUT_SFT9001_LEN); | |
618 | u8 *ptr; | |
affaf485 SH |
619 | int rc; |
620 | ||
affaf485 | 621 | BUILD_BUG_ON(MC_CMD_START_BIST_OUT_LEN != 0); |
c5bb0e98 BH |
622 | MCDI_SET_DWORD(inbuf, START_BIST_IN_TYPE, bist_mode); |
623 | rc = efx_mcdi_rpc(efx, MC_CMD_START_BIST, | |
624 | inbuf, MC_CMD_START_BIST_IN_LEN, NULL, 0, NULL); | |
affaf485 SH |
625 | if (rc) |
626 | goto out; | |
627 | ||
628 | /* Wait up to 10s for BIST to finish */ | |
629 | for (retry = 0; retry < 100; ++retry) { | |
630 | BUILD_BUG_ON(MC_CMD_POLL_BIST_IN_LEN != 0); | |
631 | rc = efx_mcdi_rpc(efx, MC_CMD_POLL_BIST, NULL, 0, | |
c5bb0e98 | 632 | outbuf, sizeof(outbuf), &outlen); |
affaf485 SH |
633 | if (rc) |
634 | goto out; | |
635 | ||
c5bb0e98 | 636 | status = MCDI_DWORD(outbuf, POLL_BIST_OUT_RESULT); |
affaf485 SH |
637 | if (status != MC_CMD_POLL_BIST_RUNNING) |
638 | goto finished; | |
639 | ||
640 | msleep(100); | |
641 | } | |
642 | ||
643 | rc = -ETIMEDOUT; | |
644 | goto out; | |
645 | ||
646 | finished: | |
647 | results[count++] = (status == MC_CMD_POLL_BIST_PASSED) ? 1 : -1; | |
648 | ||
649 | /* SFT9001 specific cable diagnostics output */ | |
650 | if (efx->phy_type == PHY_TYPE_SFT9001B && | |
651 | (bist_mode == MC_CMD_PHY_BIST_CABLE_SHORT || | |
652 | bist_mode == MC_CMD_PHY_BIST_CABLE_LONG)) { | |
c5bb0e98 | 653 | ptr = MCDI_PTR(outbuf, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A); |
affaf485 SH |
654 | if (status == MC_CMD_POLL_BIST_PASSED && |
655 | outlen >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN) { | |
656 | for (i = 0; i < 8; i++) { | |
657 | results[count + i] = | |
658 | EFX_DWORD_FIELD(((efx_dword_t *)ptr)[i], | |
659 | EFX_DWORD_0); | |
660 | } | |
661 | } | |
662 | count += 8; | |
663 | } | |
664 | rc = count; | |
665 | ||
666 | out: | |
affaf485 SH |
667 | return rc; |
668 | } | |
669 | ||
670 | static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results, | |
671 | unsigned flags) | |
672 | { | |
3bd93035 | 673 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
affaf485 SH |
674 | u32 mode; |
675 | int rc; | |
676 | ||
05a9320f | 677 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) { |
affaf485 SH |
678 | rc = efx_mcdi_bist(efx, MC_CMD_PHY_BIST, results); |
679 | if (rc < 0) | |
680 | return rc; | |
681 | ||
682 | results += rc; | |
683 | } | |
684 | ||
685 | /* If we support both LONG and SHORT, then run each in response to | |
686 | * break or not. Otherwise, run the one we support */ | |
687 | mode = 0; | |
05a9320f | 688 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN)) { |
affaf485 SH |
689 | if ((flags & ETH_TEST_FL_OFFLINE) && |
690 | (phy_cfg->flags & | |
05a9320f | 691 | (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))) |
affaf485 SH |
692 | mode = MC_CMD_PHY_BIST_CABLE_LONG; |
693 | else | |
694 | mode = MC_CMD_PHY_BIST_CABLE_SHORT; | |
695 | } else if (phy_cfg->flags & | |
05a9320f | 696 | (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN)) |
affaf485 SH |
697 | mode = MC_CMD_PHY_BIST_CABLE_LONG; |
698 | ||
699 | if (mode != 0) { | |
700 | rc = efx_mcdi_bist(efx, mode, results); | |
701 | if (rc < 0) | |
702 | return rc; | |
703 | results += rc; | |
704 | } | |
705 | ||
706 | return 0; | |
707 | } | |
708 | ||
d215697f | 709 | static const char *efx_mcdi_phy_test_name(struct efx_nic *efx, |
710 | unsigned int index) | |
affaf485 | 711 | { |
3bd93035 | 712 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; |
affaf485 | 713 | |
05a9320f | 714 | if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) { |
affaf485 SH |
715 | if (index == 0) |
716 | return "bist"; | |
717 | --index; | |
718 | } | |
719 | ||
05a9320f BH |
720 | if (phy_cfg->flags & ((1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN) | |
721 | (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))) { | |
affaf485 SH |
722 | if (index == 0) |
723 | return "cable"; | |
724 | --index; | |
725 | ||
726 | if (efx->phy_type == PHY_TYPE_SFT9001B) { | |
727 | if (index < ARRAY_SIZE(mcdi_sft9001_cable_diag_names)) | |
728 | return mcdi_sft9001_cable_diag_names[index]; | |
729 | index -= ARRAY_SIZE(mcdi_sft9001_cable_diag_names); | |
730 | } | |
731 | } | |
732 | ||
733 | return NULL; | |
734 | } | |
735 | ||
c087bd2c SH |
736 | #define SFP_PAGE_SIZE 128 |
737 | #define SFP_NUM_PAGES 2 | |
738 | static int efx_mcdi_phy_get_module_eeprom(struct efx_nic *efx, | |
739 | struct ethtool_eeprom *ee, u8 *data) | |
740 | { | |
59cfc479 BH |
741 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX); |
742 | MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN); | |
c087bd2c SH |
743 | size_t outlen; |
744 | int rc; | |
745 | unsigned int payload_len; | |
746 | unsigned int space_remaining = ee->len; | |
747 | unsigned int page; | |
748 | unsigned int page_off; | |
749 | unsigned int to_copy; | |
750 | u8 *user_data = data; | |
751 | ||
752 | BUILD_BUG_ON(SFP_PAGE_SIZE * SFP_NUM_PAGES != ETH_MODULE_SFF_8079_LEN); | |
753 | ||
754 | page_off = ee->offset % SFP_PAGE_SIZE; | |
755 | page = ee->offset / SFP_PAGE_SIZE; | |
756 | ||
757 | while (space_remaining && (page < SFP_NUM_PAGES)) { | |
758 | MCDI_SET_DWORD(inbuf, GET_PHY_MEDIA_INFO_IN_PAGE, page); | |
759 | ||
760 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_MEDIA_INFO, | |
761 | inbuf, sizeof(inbuf), | |
762 | outbuf, sizeof(outbuf), | |
763 | &outlen); | |
764 | if (rc) | |
765 | return rc; | |
766 | ||
767 | if (outlen < (MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST + | |
768 | SFP_PAGE_SIZE)) | |
769 | return -EIO; | |
770 | ||
771 | payload_len = MCDI_DWORD(outbuf, | |
772 | GET_PHY_MEDIA_INFO_OUT_DATALEN); | |
773 | if (payload_len != SFP_PAGE_SIZE) | |
774 | return -EIO; | |
775 | ||
776 | /* Copy as much as we can into data */ | |
777 | payload_len -= page_off; | |
778 | to_copy = (space_remaining < payload_len) ? | |
779 | space_remaining : payload_len; | |
780 | ||
781 | memcpy(user_data, | |
c5bb0e98 | 782 | MCDI_PTR(outbuf, GET_PHY_MEDIA_INFO_OUT_DATA) + page_off, |
c087bd2c SH |
783 | to_copy); |
784 | ||
785 | space_remaining -= to_copy; | |
786 | user_data += to_copy; | |
787 | page_off = 0; | |
788 | page++; | |
789 | } | |
790 | ||
791 | return 0; | |
792 | } | |
793 | ||
794 | static int efx_mcdi_phy_get_module_info(struct efx_nic *efx, | |
795 | struct ethtool_modinfo *modinfo) | |
796 | { | |
797 | struct efx_mcdi_phy_data *phy_cfg = efx->phy_data; | |
798 | ||
799 | switch (phy_cfg->media) { | |
800 | case MC_CMD_MEDIA_SFP_PLUS: | |
801 | modinfo->type = ETH_MODULE_SFF_8079; | |
802 | modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; | |
803 | return 0; | |
804 | default: | |
805 | return -EOPNOTSUPP; | |
806 | } | |
807 | } | |
808 | ||
43f775b2 | 809 | static const struct efx_phy_operations efx_mcdi_phy_ops = { |
afd4aea0 | 810 | .probe = efx_mcdi_phy_probe, |
9c636baf | 811 | .init = efx_port_dummy_op_int, |
43f775b2 | 812 | .reconfigure = efx_mcdi_port_reconfigure, |
afd4aea0 | 813 | .poll = efx_mcdi_phy_poll, |
ff3b00a0 SH |
814 | .fini = efx_port_dummy_op_void, |
815 | .remove = efx_mcdi_phy_remove, | |
afd4aea0 BH |
816 | .get_settings = efx_mcdi_phy_get_settings, |
817 | .set_settings = efx_mcdi_phy_set_settings, | |
4f16c073 | 818 | .test_alive = efx_mcdi_phy_test_alive, |
affaf485 SH |
819 | .run_tests = efx_mcdi_phy_run_tests, |
820 | .test_name = efx_mcdi_phy_test_name, | |
c087bd2c SH |
821 | .get_module_eeprom = efx_mcdi_phy_get_module_eeprom, |
822 | .get_module_info = efx_mcdi_phy_get_module_info, | |
afd4aea0 | 823 | }; |
43f775b2 | 824 | |
8127d661 BH |
825 | u32 efx_mcdi_phy_get_caps(struct efx_nic *efx) |
826 | { | |
827 | struct efx_mcdi_phy_data *phy_data = efx->phy_data; | |
828 | ||
829 | return phy_data->supported_cap; | |
830 | } | |
831 | ||
43f775b2 BH |
832 | static unsigned int efx_mcdi_event_link_speed[] = { |
833 | [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100, | |
834 | [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000, | |
835 | [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000, | |
9a12a306 | 836 | [MCDI_EVENT_LINKCHANGE_SPEED_40G] = 40000, |
43f775b2 BH |
837 | }; |
838 | ||
839 | void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev) | |
840 | { | |
841 | u32 flags, fcntl, speed, lpa; | |
842 | ||
843 | speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED); | |
844 | EFX_BUG_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed)); | |
845 | speed = efx_mcdi_event_link_speed[speed]; | |
846 | ||
847 | flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS); | |
848 | fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL); | |
849 | lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP); | |
850 | ||
851 | /* efx->link_state is only modified by efx_mcdi_phy_get_link(), | |
852 | * which is only run after flushing the event queues. Therefore, it | |
853 | * is safe to modify the link state outside of the mac_lock here. | |
854 | */ | |
855 | efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl); | |
856 | ||
857 | efx_mcdi_phy_check_fcntl(efx, lpa); | |
858 | ||
859 | efx_link_status_changed(efx); | |
860 | } | |
861 | ||
862 | int efx_mcdi_set_mac(struct efx_nic *efx) | |
863 | { | |
964e6135 | 864 | u32 fcntl; |
43f775b2 BH |
865 | MCDI_DECLARE_BUF(cmdbytes, MC_CMD_SET_MAC_IN_LEN); |
866 | ||
867 | BUILD_BUG_ON(MC_CMD_SET_MAC_OUT_LEN != 0); | |
868 | ||
910c8789 | 869 | /* This has no effect on EF10 */ |
cd84ff4d EC |
870 | ether_addr_copy(MCDI_PTR(cmdbytes, SET_MAC_IN_ADDR), |
871 | efx->net_dev->dev_addr); | |
43f775b2 BH |
872 | |
873 | MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_MTU, | |
874 | EFX_MAX_FRAME_LEN(efx->net_dev->mtu)); | |
875 | MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_DRAIN, 0); | |
876 | ||
964e6135 BH |
877 | /* Set simple MAC filter for Siena */ |
878 | MCDI_POPULATE_DWORD_1(cmdbytes, SET_MAC_IN_REJECT, | |
879 | SET_MAC_IN_REJECT_UNCST, efx->unicast_filter); | |
43f775b2 BH |
880 | |
881 | switch (efx->wanted_fc) { | |
882 | case EFX_FC_RX | EFX_FC_TX: | |
883 | fcntl = MC_CMD_FCNTL_BIDIR; | |
884 | break; | |
885 | case EFX_FC_RX: | |
886 | fcntl = MC_CMD_FCNTL_RESPOND; | |
887 | break; | |
888 | default: | |
889 | fcntl = MC_CMD_FCNTL_OFF; | |
890 | break; | |
891 | } | |
892 | if (efx->wanted_fc & EFX_FC_AUTO) | |
893 | fcntl = MC_CMD_FCNTL_AUTO; | |
894 | if (efx->fc_disable) | |
895 | fcntl = MC_CMD_FCNTL_OFF; | |
896 | ||
897 | MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_FCNTL, fcntl); | |
898 | ||
899 | return efx_mcdi_rpc(efx, MC_CMD_SET_MAC, cmdbytes, sizeof(cmdbytes), | |
900 | NULL, 0, NULL); | |
901 | } | |
902 | ||
903 | bool efx_mcdi_mac_check_fault(struct efx_nic *efx) | |
904 | { | |
905 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN); | |
906 | size_t outlength; | |
907 | int rc; | |
908 | ||
909 | BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0); | |
910 | ||
911 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0, | |
912 | outbuf, sizeof(outbuf), &outlength); | |
1e0b8120 | 913 | if (rc) |
43f775b2 | 914 | return true; |
43f775b2 BH |
915 | |
916 | return MCDI_DWORD(outbuf, GET_LINK_OUT_MAC_FAULT) != 0; | |
917 | } | |
918 | ||
f8f3b5ae JC |
919 | enum efx_stats_action { |
920 | EFX_STATS_ENABLE, | |
921 | EFX_STATS_DISABLE, | |
922 | EFX_STATS_PULL, | |
923 | }; | |
924 | ||
925 | static int efx_mcdi_mac_stats(struct efx_nic *efx, | |
926 | enum efx_stats_action action, int clear) | |
43f775b2 | 927 | { |
0a2ab4d9 | 928 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
43f775b2 BH |
929 | MCDI_DECLARE_BUF(inbuf, MC_CMD_MAC_STATS_IN_LEN); |
930 | int rc; | |
f8f3b5ae JC |
931 | int change = action == EFX_STATS_PULL ? 0 : 1; |
932 | int enable = action == EFX_STATS_ENABLE ? 1 : 0; | |
933 | int period = action == EFX_STATS_ENABLE ? 1000 : 0; | |
934 | dma_addr_t dma_addr = efx->stats_buffer.dma_addr; | |
935 | u32 dma_len = action != EFX_STATS_DISABLE ? | |
936 | MC_CMD_MAC_NSTATS * sizeof(u64) : 0; | |
43f775b2 BH |
937 | |
938 | BUILD_BUG_ON(MC_CMD_MAC_STATS_OUT_DMA_LEN != 0); | |
939 | ||
940 | MCDI_SET_QWORD(inbuf, MAC_STATS_IN_DMA_ADDR, dma_addr); | |
f5253d92 BH |
941 | MCDI_POPULATE_DWORD_7(inbuf, MAC_STATS_IN_CMD, |
942 | MAC_STATS_IN_DMA, !!enable, | |
943 | MAC_STATS_IN_CLEAR, clear, | |
f8f3b5ae JC |
944 | MAC_STATS_IN_PERIODIC_CHANGE, change, |
945 | MAC_STATS_IN_PERIODIC_ENABLE, enable, | |
f5253d92 BH |
946 | MAC_STATS_IN_PERIODIC_CLEAR, 0, |
947 | MAC_STATS_IN_PERIODIC_NOEVENT, 1, | |
948 | MAC_STATS_IN_PERIOD_MS, period); | |
43f775b2 | 949 | MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_LEN, dma_len); |
0a2ab4d9 | 950 | MCDI_SET_DWORD(inbuf, MAC_STATS_IN_PORT_ID, nic_data->vport_id); |
43f775b2 | 951 | |
6dd4859b DP |
952 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf), |
953 | NULL, 0, NULL); | |
954 | /* Expect ENOENT if DMA queues have not been set up */ | |
955 | if (rc && (rc != -ENOENT || atomic_read(&efx->active_queues))) | |
956 | efx_mcdi_display_error(efx, MC_CMD_MAC_STATS, sizeof(inbuf), | |
957 | NULL, 0, rc); | |
43f775b2 BH |
958 | return rc; |
959 | } | |
960 | ||
961 | void efx_mcdi_mac_start_stats(struct efx_nic *efx) | |
962 | { | |
963 | __le64 *dma_stats = efx->stats_buffer.addr; | |
964 | ||
965 | dma_stats[MC_CMD_MAC_GENERATION_END] = EFX_MC_STATS_GENERATION_INVALID; | |
966 | ||
f8f3b5ae | 967 | efx_mcdi_mac_stats(efx, EFX_STATS_ENABLE, 0); |
43f775b2 BH |
968 | } |
969 | ||
970 | void efx_mcdi_mac_stop_stats(struct efx_nic *efx) | |
971 | { | |
f8f3b5ae JC |
972 | efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 0); |
973 | } | |
974 | ||
975 | #define EFX_MAC_STATS_WAIT_US 100 | |
976 | #define EFX_MAC_STATS_WAIT_ATTEMPTS 10 | |
977 | ||
978 | void efx_mcdi_mac_pull_stats(struct efx_nic *efx) | |
979 | { | |
980 | __le64 *dma_stats = efx->stats_buffer.addr; | |
981 | int attempts = EFX_MAC_STATS_WAIT_ATTEMPTS; | |
982 | ||
983 | dma_stats[MC_CMD_MAC_GENERATION_END] = EFX_MC_STATS_GENERATION_INVALID; | |
984 | efx_mcdi_mac_stats(efx, EFX_STATS_PULL, 0); | |
985 | ||
986 | while (dma_stats[MC_CMD_MAC_GENERATION_END] == | |
987 | EFX_MC_STATS_GENERATION_INVALID && | |
988 | attempts-- != 0) | |
989 | udelay(EFX_MAC_STATS_WAIT_US); | |
43f775b2 BH |
990 | } |
991 | ||
992 | int efx_mcdi_port_probe(struct efx_nic *efx) | |
993 | { | |
994 | int rc; | |
995 | ||
996 | /* Hook in PHY operations table */ | |
997 | efx->phy_op = &efx_mcdi_phy_ops; | |
998 | ||
999 | /* Set up MDIO structure for PHY */ | |
1000 | efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22; | |
1001 | efx->mdio.mdio_read = efx_mcdi_mdio_read; | |
1002 | efx->mdio.mdio_write = efx_mcdi_mdio_write; | |
1003 | ||
1004 | /* Fill out MDIO structure, loopback modes, and initial link state */ | |
1005 | rc = efx->phy_op->probe(efx); | |
1006 | if (rc != 0) | |
1007 | return rc; | |
1008 | ||
1009 | /* Allocate buffer for stats */ | |
1010 | rc = efx_nic_alloc_buffer(efx, &efx->stats_buffer, | |
0d19a540 | 1011 | MC_CMD_MAC_NSTATS * sizeof(u64), GFP_KERNEL); |
43f775b2 BH |
1012 | if (rc) |
1013 | return rc; | |
1014 | netif_dbg(efx, probe, efx->net_dev, | |
1015 | "stats buffer at %llx (virt %p phys %llx)\n", | |
1016 | (u64)efx->stats_buffer.dma_addr, | |
1017 | efx->stats_buffer.addr, | |
1018 | (u64)virt_to_phys(efx->stats_buffer.addr)); | |
1019 | ||
f8f3b5ae | 1020 | efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 1); |
43f775b2 BH |
1021 | |
1022 | return 0; | |
1023 | } | |
1024 | ||
1025 | void efx_mcdi_port_remove(struct efx_nic *efx) | |
1026 | { | |
1027 | efx->phy_op->remove(efx); | |
1028 | efx_nic_free_buffer(efx, &efx->stats_buffer); | |
1029 | } | |
8127d661 BH |
1030 | |
1031 | /* Get physical port number (EF10 only; on Siena it is same as PF number) */ | |
1032 | int efx_mcdi_port_get_number(struct efx_nic *efx) | |
1033 | { | |
1034 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN); | |
1035 | int rc; | |
1036 | ||
1037 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_PORT_ASSIGNMENT, NULL, 0, | |
1038 | outbuf, sizeof(outbuf), NULL); | |
1039 | if (rc) | |
1040 | return rc; | |
1041 | ||
1042 | return MCDI_DWORD(outbuf, GET_PORT_ASSIGNMENT_OUT_PORT); | |
1043 | } |