[deliverable/linux.git] / drivers / net / ethernet / sfc / mtd.c

/****************************************************************************
 * Driver for Solarflare Solarstorm network controllers and boards
 * Copyright 2005-2006 Fen Systems Ltd.
 * Copyright 2006-2010 Solarflare Communications Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation, incorporated herein by reference.
 */

#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/rtnetlink.h>

#include "net_driver.h"
#include "spi.h"
#include "efx.h"
#include "nic.h"
#include "mcdi.h"
#include "mcdi_pcol.h"

#define EFX_SPI_VERIFY_BUF_LEN 16

struct efx_mtd_partition {
	struct mtd_info mtd;
	union {
		struct {
			bool updating;
			u8 nvram_type;
			u16 fw_subtype;
		} mcdi;
		size_t offset;
	};
	const char *type_name;
	char name[IFNAMSIZ + 20];
};

struct efx_mtd_ops {
	int (*read)(struct mtd_info *mtd, loff_t start, size_t len,
		    size_t *retlen, u8 *buffer);
	int (*erase)(struct mtd_info *mtd, loff_t start, size_t len);
	int (*write)(struct mtd_info *mtd, loff_t start, size_t len,
		     size_t *retlen, const u8 *buffer);
	int (*sync)(struct mtd_info *mtd);
};

struct efx_mtd {
	struct list_head node;
	struct efx_nic *efx;
	const struct efx_spi_device *spi;
	const char *name;
	const struct efx_mtd_ops *ops;
	size_t n_parts;
	struct efx_mtd_partition part[0];
};

#define efx_for_each_partition(part, efx_mtd)			\
	for ((part) = &(efx_mtd)->part[0];			\
	     (part) != &(efx_mtd)->part[(efx_mtd)->n_parts];	\
	     (part)++)

#define to_efx_mtd_partition(mtd)				\
	container_of(mtd, struct efx_mtd_partition, mtd)

static int falcon_mtd_probe(struct efx_nic *efx);
static int siena_mtd_probe(struct efx_nic *efx);

/* SPI utilities */

static int
efx_spi_slow_wait(struct efx_mtd_partition *part, bool uninterruptible)
{
	struct efx_mtd *efx_mtd = part->mtd.priv;
	const struct efx_spi_device *spi = efx_mtd->spi;
	struct efx_nic *efx = efx_mtd->efx;
	u8 status;
	int rc, i;

	/* Wait up to 4s for flash/EEPROM to finish a slow operation. */
	for (i = 0; i < 40; i++) {
		__set_current_state(uninterruptible ?
				    TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
		schedule_timeout(HZ / 10);
		rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
				    &status, sizeof(status));
		if (rc)
			return rc;
		if (!(status & SPI_STATUS_NRDY))
			return 0;
		if (signal_pending(current))
			return -EINTR;
	}
	pr_err("%s: timed out waiting for %s\n", part->name, efx_mtd->name);
	return -ETIMEDOUT;
}

static int
efx_spi_unlock(struct efx_nic *efx, const struct efx_spi_device *spi)
{
	const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 |
				SPI_STATUS_BP0);
	u8 status;
	int rc;

	rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
			    &status, sizeof(status));
	if (rc)
		return rc;

	if (!(status & unlock_mask))
		return 0; /* already unlocked */

	rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
	if (rc)
		return rc;
	rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
	if (rc)
		return rc;

	status &= ~unlock_mask;
	rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
			    NULL, sizeof(status));
	if (rc)
		return rc;
	rc = falcon_spi_wait_write(efx, spi);
	if (rc)
		return rc;

	return 0;
}

static int
efx_spi_erase(struct efx_mtd_partition *part, loff_t start, size_t len)
{
	struct efx_mtd *efx_mtd = part->mtd.priv;
	const struct efx_spi_device *spi = efx_mtd->spi;
	struct efx_nic *efx = efx_mtd->efx;
	unsigned pos, block_len;
	u8 empty[EFX_SPI_VERIFY_BUF_LEN];
	u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
	int rc;

	if (len != spi->erase_size)
		return -EINVAL;

	if (spi->erase_command == 0)
		return -EOPNOTSUPP;

	rc = efx_spi_unlock(efx, spi);
	if (rc)
		return rc;
	rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
	if (rc)
		return rc;
	rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
			    NULL, 0);
	if (rc)
		return rc;
	rc = efx_spi_slow_wait(part, false);

	/* Verify the entire region has been wiped */
	memset(empty, 0xff, sizeof(empty));
	for (pos = 0; pos < len; pos += block_len) {
		block_len = min(len - pos, sizeof(buffer));
		rc = falcon_spi_read(efx, spi, start + pos, block_len,
				     NULL, buffer);
		if (rc)
			return rc;
		if (memcmp(empty, buffer, block_len))
			return -EIO;

		/* Avoid locking up the system */
		cond_resched();
		if (signal_pending(current))
			return -EINTR;
	}

	return rc;
}

/* MTD interface */

static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
{
	struct efx_mtd *efx_mtd = mtd->priv;
	int rc;

	rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
	if (rc == 0) {
		erase->state = MTD_ERASE_DONE;
	} else {
		erase->state = MTD_ERASE_FAILED;
		erase->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
	}
	mtd_erase_callback(erase);
	return rc;
}

static void efx_mtd_sync(struct mtd_info *mtd)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	int rc;

	rc = efx_mtd->ops->sync(mtd);
	if (rc)
		pr_err("%s: %s sync failed (%d)\n",
		       part->name, efx_mtd->name, rc);
}

static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
{
	int rc;

	for (;;) {
		rc = mtd_device_unregister(&part->mtd);
		if (rc != -EBUSY)
			break;
		ssleep(1);
	}
	WARN_ON(rc);
}

static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
{
	struct efx_mtd_partition *part;

	efx_for_each_partition(part, efx_mtd)
		efx_mtd_remove_partition(part);
	list_del(&efx_mtd->node);
	kfree(efx_mtd);
}

static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
{
	struct efx_mtd_partition *part;

	efx_for_each_partition(part, efx_mtd)
		if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
			snprintf(part->name, sizeof(part->name),
				 "%s %s:%02x", efx_mtd->efx->name,
				 part->type_name, part->mcdi.fw_subtype);
		else
			snprintf(part->name, sizeof(part->name),
				 "%s %s", efx_mtd->efx->name,
				 part->type_name);
}

static int efx_mtd_probe_device(struct efx_nic *efx, struct efx_mtd *efx_mtd)
{
	struct efx_mtd_partition *part;

	efx_mtd->efx = efx;

	efx_mtd_rename_device(efx_mtd);

	efx_for_each_partition(part, efx_mtd) {
		part->mtd.writesize = 1;

		part->mtd.owner = THIS_MODULE;
		part->mtd.priv = efx_mtd;
		part->mtd.name = part->name;
		part->mtd._erase = efx_mtd_erase;
		part->mtd._read = efx_mtd->ops->read;
		part->mtd._write = efx_mtd->ops->write;
		part->mtd._sync = efx_mtd_sync;

		if (mtd_device_register(&part->mtd, NULL, 0))
			goto fail;
	}

	list_add(&efx_mtd->node, &efx->mtd_list);
	return 0;

fail:
	while (part != &efx_mtd->part[0]) {
		--part;
		efx_mtd_remove_partition(part);
	}
	/* Failure is unlikely here, but probably means we're out of memory */
	return -ENOMEM;
}

void efx_mtd_remove(struct efx_nic *efx)
{
	struct efx_mtd *efx_mtd, *next;

	WARN_ON(efx_dev_registered(efx));

	list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
		efx_mtd_remove_device(efx_mtd);
}

void efx_mtd_rename(struct efx_nic *efx)
{
	struct efx_mtd *efx_mtd;

	ASSERT_RTNL();

	list_for_each_entry(efx_mtd, &efx->mtd_list, node)
		efx_mtd_rename_device(efx_mtd);
}

int efx_mtd_probe(struct efx_nic *efx)
{
	if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
		return siena_mtd_probe(efx);
	else
		return falcon_mtd_probe(efx);
}

/* Implementation of MTD operations for Falcon */

static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
			   size_t len, size_t *retlen, u8 *buffer)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	const struct efx_spi_device *spi = efx_mtd->spi;
	struct efx_nic *efx = efx_mtd->efx;
	struct falcon_nic_data *nic_data = efx->nic_data;
	int rc;

	rc = mutex_lock_interruptible(&nic_data->spi_lock);
	if (rc)
		return rc;
	rc = falcon_spi_read(efx, spi, part->offset + start, len,
			     retlen, buffer);
	mutex_unlock(&nic_data->spi_lock);
	return rc;
}

static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	struct efx_nic *efx = efx_mtd->efx;
	struct falcon_nic_data *nic_data = efx->nic_data;
	int rc;

	rc = mutex_lock_interruptible(&nic_data->spi_lock);
	if (rc)
		return rc;
	rc = efx_spi_erase(part, part->offset + start, len);
	mutex_unlock(&nic_data->spi_lock);
	return rc;
}

static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
			    size_t len, size_t *retlen, const u8 *buffer)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	const struct efx_spi_device *spi = efx_mtd->spi;
	struct efx_nic *efx = efx_mtd->efx;
	struct falcon_nic_data *nic_data = efx->nic_data;
	int rc;

	rc = mutex_lock_interruptible(&nic_data->spi_lock);
	if (rc)
		return rc;
	rc = falcon_spi_write(efx, spi, part->offset + start, len,
			      retlen, buffer);
	mutex_unlock(&nic_data->spi_lock);
	return rc;
}

static int falcon_mtd_sync(struct mtd_info *mtd)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	struct efx_nic *efx = efx_mtd->efx;
	struct falcon_nic_data *nic_data = efx->nic_data;
	int rc;

	mutex_lock(&nic_data->spi_lock);
	rc = efx_spi_slow_wait(part, true);
	mutex_unlock(&nic_data->spi_lock);
	return rc;
}

static const struct efx_mtd_ops falcon_mtd_ops = {
	.read	= falcon_mtd_read,
	.erase	= falcon_mtd_erase,
	.write	= falcon_mtd_write,
	.sync	= falcon_mtd_sync,
};

static int falcon_mtd_probe(struct efx_nic *efx)
{
	struct falcon_nic_data *nic_data = efx->nic_data;
	struct efx_spi_device *spi;
	struct efx_mtd *efx_mtd;
	int rc = -ENODEV;

	ASSERT_RTNL();

	spi = &nic_data->spi_flash;
	if (efx_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) {
		efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
				  GFP_KERNEL);
		if (!efx_mtd)
			return -ENOMEM;

		efx_mtd->spi = spi;
		efx_mtd->name = "flash";
		efx_mtd->ops = &falcon_mtd_ops;

		efx_mtd->n_parts = 1;
		efx_mtd->part[0].mtd.type = MTD_NORFLASH;
		efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
		efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
		efx_mtd->part[0].mtd.erasesize = spi->erase_size;
		efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
		efx_mtd->part[0].type_name = "sfc_flash_bootrom";

		rc = efx_mtd_probe_device(efx, efx_mtd);
		if (rc) {
			kfree(efx_mtd);
			return rc;
		}
	}

	spi = &nic_data->spi_eeprom;
	if (efx_spi_present(spi) && spi->size > EFX_EEPROM_BOOTCONFIG_START) {
		efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
				  GFP_KERNEL);
		if (!efx_mtd)
			return -ENOMEM;

		efx_mtd->spi = spi;
		efx_mtd->name = "EEPROM";
		efx_mtd->ops = &falcon_mtd_ops;

		efx_mtd->n_parts = 1;
		efx_mtd->part[0].mtd.type = MTD_RAM;
		efx_mtd->part[0].mtd.flags = MTD_CAP_RAM;
		efx_mtd->part[0].mtd.size =
			min(spi->size, EFX_EEPROM_BOOTCONFIG_END) -
			EFX_EEPROM_BOOTCONFIG_START;
		efx_mtd->part[0].mtd.erasesize = spi->erase_size;
		efx_mtd->part[0].offset = EFX_EEPROM_BOOTCONFIG_START;
		efx_mtd->part[0].type_name = "sfc_bootconfig";

		rc = efx_mtd_probe_device(efx, efx_mtd);
		if (rc) {
			kfree(efx_mtd);
			return rc;
		}
	}

	return rc;
}

/* Implementation of MTD operations for Siena */

static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
			  size_t len, size_t *retlen, u8 *buffer)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	struct efx_nic *efx = efx_mtd->efx;
	loff_t offset = start;
	loff_t end = min_t(loff_t, start + len, mtd->size);
	size_t chunk;
	int rc = 0;

	while (offset < end) {
		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
		rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
					 buffer, chunk);
		if (rc)
			goto out;
		offset += chunk;
		buffer += chunk;
	}
out:
	*retlen = offset - start;
	return rc;
}

static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	struct efx_nic *efx = efx_mtd->efx;
	loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
	loff_t end = min_t(loff_t, start + len, mtd->size);
	size_t chunk = part->mtd.erasesize;
	int rc = 0;

	if (!part->mcdi.updating) {
		rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
		if (rc)
			goto out;
		part->mcdi.updating = true;
	}

	/* The MCDI interface can in fact do multiple erase blocks at once;
	 * but erasing may be slow, so we make multiple calls here to avoid
	 * tripping the MCDI RPC timeout. */
	while (offset < end) {
		rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
					  chunk);
		if (rc)
			goto out;
		offset += chunk;
	}
out:
	return rc;
}

static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
			   size_t len, size_t *retlen, const u8 *buffer)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	struct efx_nic *efx = efx_mtd->efx;
	loff_t offset = start;
	loff_t end = min_t(loff_t, start + len, mtd->size);
	size_t chunk;
	int rc = 0;

	if (!part->mcdi.updating) {
		rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
		if (rc)
			goto out;
		part->mcdi.updating = true;
	}

	while (offset < end) {
		chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
		rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
					  buffer, chunk);
		if (rc)
			goto out;
		offset += chunk;
		buffer += chunk;
	}
out:
	*retlen = offset - start;
	return rc;
}

static int siena_mtd_sync(struct mtd_info *mtd)
{
	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	struct efx_mtd *efx_mtd = mtd->priv;
	struct efx_nic *efx = efx_mtd->efx;
	int rc = 0;

	if (part->mcdi.updating) {
		part->mcdi.updating = false;
		rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
	}

	return rc;
}

static const struct efx_mtd_ops siena_mtd_ops = {
	.read	= siena_mtd_read,
	.erase	= siena_mtd_erase,
	.write	= siena_mtd_write,
	.sync	= siena_mtd_sync,
};

struct siena_nvram_type_info {
	int port;
	const char *name;
};

static const struct siena_nvram_type_info siena_nvram_types[] = {
	[MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO]	= { 0, "sfc_dummy_phy" },
	[MC_CMD_NVRAM_TYPE_MC_FW]		= { 0, "sfc_mcfw" },
	[MC_CMD_NVRAM_TYPE_MC_FW_BACKUP]	= { 0, "sfc_mcfw_backup" },
	[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0]	= { 0, "sfc_static_cfg" },
	[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1]	= { 1, "sfc_static_cfg" },
	[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0]	= { 0, "sfc_dynamic_cfg" },
	[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1]	= { 1, "sfc_dynamic_cfg" },
	[MC_CMD_NVRAM_TYPE_EXP_ROM]		= { 0, "sfc_exp_rom" },
	[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0]	= { 0, "sfc_exp_rom_cfg" },
	[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1]	= { 1, "sfc_exp_rom_cfg" },
	[MC_CMD_NVRAM_TYPE_PHY_PORT0]		= { 0, "sfc_phy_fw" },
	[MC_CMD_NVRAM_TYPE_PHY_PORT1]		= { 1, "sfc_phy_fw" },
	[MC_CMD_NVRAM_TYPE_FPGA]		= { 0, "sfc_fpga" },
};

static int siena_mtd_probe_partition(struct efx_nic *efx,
				     struct efx_mtd *efx_mtd,
				     unsigned int part_id,
				     unsigned int type)
{
	struct efx_mtd_partition *part = &efx_mtd->part[part_id];
	const struct siena_nvram_type_info *info;
	size_t size, erase_size;
	bool protected;
	int rc;

	if (type >= ARRAY_SIZE(siena_nvram_types) ||
	    siena_nvram_types[type].name == NULL)
		return -ENODEV;

	info = &siena_nvram_types[type];

	if (info->port != efx_port_num(efx))
		return -ENODEV;

	rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
	if (rc)
		return rc;
	if (protected)
		return -ENODEV; /* hide it */

	part->mcdi.nvram_type = type;
	part->type_name = info->name;

	part->mtd.type = MTD_NORFLASH;
	part->mtd.flags = MTD_CAP_NORFLASH;
	part->mtd.size = size;
	part->mtd.erasesize = erase_size;

	return 0;
}

static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
				     struct efx_mtd *efx_mtd)
{
	struct efx_mtd_partition *part;
	uint16_t fw_subtype_list[
		MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM];
	int rc;

	rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list, NULL);
	if (rc)
		return rc;

	efx_for_each_partition(part, efx_mtd)
		part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];

	return 0;
}

static int siena_mtd_probe(struct efx_nic *efx)
{
	struct efx_mtd *efx_mtd;
	int rc = -ENODEV;
	u32 nvram_types;
	unsigned int type;

	ASSERT_RTNL();

	rc = efx_mcdi_nvram_types(efx, &nvram_types);
	if (rc)
		return rc;

	efx_mtd = kzalloc(sizeof(*efx_mtd) +
			  hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
			  GFP_KERNEL);
	if (!efx_mtd)
		return -ENOMEM;

	efx_mtd->name = "Siena NVRAM manager";

	efx_mtd->ops = &siena_mtd_ops;

	type = 0;
	efx_mtd->n_parts = 0;

	while (nvram_types != 0) {
		if (nvram_types & 1) {
			rc = siena_mtd_probe_partition(efx, efx_mtd,
						       efx_mtd->n_parts, type);
			if (rc == 0)
				efx_mtd->n_parts++;
			else if (rc != -ENODEV)
				goto fail;
		}
		type++;
		nvram_types >>= 1;
	}

	rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
	if (rc)
		goto fail;

	rc = efx_mtd_probe_device(efx, efx_mtd);
fail:
	if (rc)
		kfree(efx_mtd);
	return rc;
}
Commit	Line	Data
f4150724 BH	1	/****************************************************************************
	2	* Driver for Solarflare Solarstorm network controllers and boards
	3	* Copyright 2005-2006 Fen Systems Ltd.
0a6f40c6	4	* Copyright 2006-2010 Solarflare Communications Inc.
f4150724 BH	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License version 2 as published
	8	* by the Free Software Foundation, incorporated herein by reference.
	9	*/
	10
8880f4ec	11	#include <linux/bitops.h>
f4150724 BH	12	#include <linux/module.h>
	13	#include <linux/mtd/mtd.h>
	14	#include <linux/delay.h>
5a0e3ad6	15	#include <linux/slab.h>
76884835	16	#include <linux/rtnetlink.h>
f4150724	17
f4150724 BH	18	#include "net_driver.h"
f4150724 BH	19	#include "spi.h"
ff2ef902	20	#include "efx.h"
744093c9	21	#include "nic.h"
8880f4ec BH	22	#include "mcdi.h"
8880f4ec BH	23	#include "mcdi_pcol.h"
f4150724 BH	24
	25	#define EFX_SPI_VERIFY_BUF_LEN 16
	26
76884835	27	struct efx_mtd_partition {
f4150724	28	struct mtd_info mtd;
8880f4ec BH	29	union {
	30	struct {
	31	bool updating;
	32	u8 nvram_type;
	33	u16 fw_subtype;
	34	} mcdi;
	35	size_t offset;
	36	};
76884835	37	const char *type_name;
f4150724 BH	38	char name[IFNAMSIZ + 20];
	39	};
	40
76884835 BH	41	struct efx_mtd_ops {
	42	int (read)(struct mtd_info mtd, loff_t start, size_t len,
	43	size_t retlen, u8 buffer);
	44	int (erase)(struct mtd_info mtd, loff_t start, size_t len);
	45	int (write)(struct mtd_info mtd, loff_t start, size_t len,
	46	size_t retlen, const u8 buffer);
	47	int (sync)(struct mtd_info mtd);
	48	};
	49
	50	struct efx_mtd {
	51	struct list_head node;
	52	struct efx_nic *efx;
	53	const struct efx_spi_device *spi;
	54	const char *name;
	55	const struct efx_mtd_ops *ops;
	56	size_t n_parts;
	57	struct efx_mtd_partition part[0];
	58	};
	59
	60	#define efx_for_each_partition(part, efx_mtd) \
	61	for ((part) = &(efx_mtd)->part[0]; \
	62	(part) != &(efx_mtd)->part[(efx_mtd)->n_parts]; \
	63	(part)++)
	64
	65	#define to_efx_mtd_partition(mtd) \
	66	container_of(mtd, struct efx_mtd_partition, mtd)
	67
	68	static int falcon_mtd_probe(struct efx_nic *efx);
8880f4ec	69	static int siena_mtd_probe(struct efx_nic *efx);
76884835	70
f4150724 BH	71	/* SPI utilities */
f4150724 BH	72
0c605a20 BH	73	static int
0c605a20 BH	74	efx_spi_slow_wait(struct efx_mtd_partition *part, bool uninterruptible)
f4150724	75	{
0c605a20	76	struct efx_mtd *efx_mtd = part->mtd.priv;
f4150724	77	const struct efx_spi_device *spi = efx_mtd->spi;
76884835	78	struct efx_nic *efx = efx_mtd->efx;
f4150724 BH	79	u8 status;
	80	int rc, i;
	81
	82	/* Wait up to 4s for flash/EEPROM to finish a slow operation. */
	83	for (i = 0; i < 40; i++) {
	84	__set_current_state(uninterruptible ?
	85	TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE);
	86	schedule_timeout(HZ / 10);
76884835	87	rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
f4150724 BH	88	&status, sizeof(status));
	89	if (rc)
	90	return rc;
	91	if (!(status & SPI_STATUS_NRDY))
	92	return 0;
	93	if (signal_pending(current))
	94	return -EINTR;
	95	}
0c605a20	96	pr_err("%s: timed out waiting for %s\n", part->name, efx_mtd->name);
f4150724 BH	97	return -ETIMEDOUT;
	98	}
	99
76884835 BH	100	static int
76884835 BH	101	efx_spi_unlock(struct efx_nic efx, const struct efx_spi_device spi)
f4150724 BH	102	{
	103	const u8 unlock_mask = (SPI_STATUS_BP2 \| SPI_STATUS_BP1 \|
	104	SPI_STATUS_BP0);
	105	u8 status;
	106	int rc;
	107
76884835 BH	108	rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL,
76884835 BH	109	&status, sizeof(status));
f4150724 BH	110	if (rc)
	111	return rc;
	112
	113	if (!(status & unlock_mask))
	114	return 0; /* already unlocked */
	115
76884835	116	rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
f4150724 BH	117	if (rc)
f4150724 BH	118	return rc;
76884835	119	rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0);
f4150724 BH	120	if (rc)
	121	return rc;
	122
	123	status &= ~unlock_mask;
76884835 BH	124	rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status,
76884835 BH	125	NULL, sizeof(status));
f4150724 BH	126	if (rc)
f4150724 BH	127	return rc;
76884835	128	rc = falcon_spi_wait_write(efx, spi);
f4150724 BH	129	if (rc)
	130	return rc;
	131
	132	return 0;
	133	}
	134
0c605a20 BH	135	static int
0c605a20 BH	136	efx_spi_erase(struct efx_mtd_partition *part, loff_t start, size_t len)
f4150724	137	{
0c605a20	138	struct efx_mtd *efx_mtd = part->mtd.priv;
f4150724	139	const struct efx_spi_device *spi = efx_mtd->spi;
76884835	140	struct efx_nic *efx = efx_mtd->efx;
f4150724 BH	141	unsigned pos, block_len;
	142	u8 empty[EFX_SPI_VERIFY_BUF_LEN];
	143	u8 buffer[EFX_SPI_VERIFY_BUF_LEN];
	144	int rc;
	145
	146	if (len != spi->erase_size)
	147	return -EINVAL;
	148
	149	if (spi->erase_command == 0)
	150	return -EOPNOTSUPP;
	151
76884835	152	rc = efx_spi_unlock(efx, spi);
f4150724 BH	153	if (rc)
f4150724 BH	154	return rc;
76884835	155	rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0);
f4150724 BH	156	if (rc)
f4150724 BH	157	return rc;
76884835 BH	158	rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL,
76884835 BH	159	NULL, 0);
f4150724 BH	160	if (rc)
f4150724 BH	161	return rc;
0c605a20	162	rc = efx_spi_slow_wait(part, false);
f4150724 BH	163
	164	/* Verify the entire region has been wiped */
	165	memset(empty, 0xff, sizeof(empty));
	166	for (pos = 0; pos < len; pos += block_len) {
	167	block_len = min(len - pos, sizeof(buffer));
76884835 BH	168	rc = falcon_spi_read(efx, spi, start + pos, block_len,
76884835 BH	169	NULL, buffer);
f4150724 BH	170	if (rc)
	171	return rc;
	172	if (memcmp(empty, buffer, block_len))
	173	return -EIO;
	174
	175	/* Avoid locking up the system */
	176	cond_resched();
	177	if (signal_pending(current))
	178	return -EINTR;
	179	}
	180
	181	return rc;
	182	}
	183
	184	/* MTD interface */
	185
76884835 BH	186	static int efx_mtd_erase(struct mtd_info mtd, struct erase_info erase)
	187	{
	188	struct efx_mtd *efx_mtd = mtd->priv;
	189	int rc;
	190
	191	rc = efx_mtd->ops->erase(mtd, erase->addr, erase->len);
	192	if (rc == 0) {
	193	erase->state = MTD_ERASE_DONE;
	194	} else {
	195	erase->state = MTD_ERASE_FAILED;
88dfda5f	196	erase->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
76884835 BH	197	}
	198	mtd_erase_callback(erase);
	199	return rc;
	200	}
	201
	202	static void efx_mtd_sync(struct mtd_info *mtd)
	203	{
0c605a20	204	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
76884835	205	struct efx_mtd *efx_mtd = mtd->priv;
76884835 BH	206	int rc;
	207
	208	rc = efx_mtd->ops->sync(mtd);
	209	if (rc)
0c605a20 BH	210	pr_err("%s: %s sync failed (%d)\n",
0c605a20 BH	211	part->name, efx_mtd->name, rc);
76884835 BH	212	}
	213
	214	static void efx_mtd_remove_partition(struct efx_mtd_partition *part)
	215	{
	216	int rc;
	217
	218	for (;;) {
ee0e87b1	219	rc = mtd_device_unregister(&part->mtd);
76884835 BH	220	if (rc != -EBUSY)
	221	break;
	222	ssleep(1);
	223	}
	224	WARN_ON(rc);
	225	}
	226
	227	static void efx_mtd_remove_device(struct efx_mtd *efx_mtd)
	228	{
	229	struct efx_mtd_partition *part;
	230
	231	efx_for_each_partition(part, efx_mtd)
	232	efx_mtd_remove_partition(part);
	233	list_del(&efx_mtd->node);
	234	kfree(efx_mtd);
	235	}
	236
	237	static void efx_mtd_rename_device(struct efx_mtd *efx_mtd)
	238	{
	239	struct efx_mtd_partition *part;
	240
	241	efx_for_each_partition(part, efx_mtd)
8880f4ec BH	242	if (efx_nic_rev(efx_mtd->efx) >= EFX_REV_SIENA_A0)
	243	snprintf(part->name, sizeof(part->name),
	244	"%s %s:%02x", efx_mtd->efx->name,
	245	part->type_name, part->mcdi.fw_subtype);
	246	else
	247	snprintf(part->name, sizeof(part->name),
	248	"%s %s", efx_mtd->efx->name,
	249	part->type_name);
76884835 BH	250	}
	251
	252	static int efx_mtd_probe_device(struct efx_nic efx, struct efx_mtd efx_mtd)
	253	{
	254	struct efx_mtd_partition *part;
	255
	256	efx_mtd->efx = efx;
	257
	258	efx_mtd_rename_device(efx_mtd);
	259
	260	efx_for_each_partition(part, efx_mtd) {
	261	part->mtd.writesize = 1;
	262
	263	part->mtd.owner = THIS_MODULE;
	264	part->mtd.priv = efx_mtd;
	265	part->mtd.name = part->name;
3c3c10bb AB	266	part->mtd._erase = efx_mtd_erase;
	267	part->mtd._read = efx_mtd->ops->read;
	268	part->mtd._write = efx_mtd->ops->write;
	269	part->mtd._sync = efx_mtd_sync;
76884835	270
ee0e87b1	271	if (mtd_device_register(&part->mtd, NULL, 0))
76884835 BH	272	goto fail;
	273	}
	274
	275	list_add(&efx_mtd->node, &efx->mtd_list);
	276	return 0;
	277
	278	fail:
	279	while (part != &efx_mtd->part[0]) {
	280	--part;
	281	efx_mtd_remove_partition(part);
	282	}
7c43161c	283	/* Failure is unlikely here, but probably means we're out of memory */
76884835 BH	284	return -ENOMEM;
	285	}
	286
	287	void efx_mtd_remove(struct efx_nic *efx)
f4150724	288	{
76884835 BH	289	struct efx_mtd efx_mtd, next;
	290
	291	WARN_ON(efx_dev_registered(efx));
	292
	293	list_for_each_entry_safe(efx_mtd, next, &efx->mtd_list, node)
	294	efx_mtd_remove_device(efx_mtd);
	295	}
	296
	297	void efx_mtd_rename(struct efx_nic *efx)
	298	{
	299	struct efx_mtd *efx_mtd;
	300
	301	ASSERT_RTNL();
	302
	303	list_for_each_entry(efx_mtd, &efx->mtd_list, node)
	304	efx_mtd_rename_device(efx_mtd);
	305	}
	306
	307	int efx_mtd_probe(struct efx_nic *efx)
	308	{
8880f4ec BH	309	if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0)
	310	return siena_mtd_probe(efx);
	311	else
	312	return falcon_mtd_probe(efx);
76884835 BH	313	}
	314
	315	/* Implementation of MTD operations for Falcon */
	316
	317	static int falcon_mtd_read(struct mtd_info *mtd, loff_t start,
	318	size_t len, size_t retlen, u8 buffer)
	319	{
	320	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
f4150724 BH	321	struct efx_mtd *efx_mtd = mtd->priv;
f4150724 BH	322	const struct efx_spi_device *spi = efx_mtd->spi;
76884835	323	struct efx_nic *efx = efx_mtd->efx;
4de92180	324	struct falcon_nic_data *nic_data = efx->nic_data;
f4150724 BH	325	int rc;
f4150724 BH	326
4de92180	327	rc = mutex_lock_interruptible(&nic_data->spi_lock);
f4150724 BH	328	if (rc)
f4150724 BH	329	return rc;
76884835 BH	330	rc = falcon_spi_read(efx, spi, part->offset + start, len,
76884835 BH	331	retlen, buffer);
4de92180	332	mutex_unlock(&nic_data->spi_lock);
f4150724 BH	333	return rc;
	334	}
	335
76884835	336	static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
f4150724	337	{
76884835	338	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
f4150724	339	struct efx_mtd *efx_mtd = mtd->priv;
76884835	340	struct efx_nic *efx = efx_mtd->efx;
4de92180	341	struct falcon_nic_data *nic_data = efx->nic_data;
f4150724 BH	342	int rc;
f4150724 BH	343
4de92180	344	rc = mutex_lock_interruptible(&nic_data->spi_lock);
f4150724 BH	345	if (rc)
f4150724 BH	346	return rc;
0c605a20	347	rc = efx_spi_erase(part, part->offset + start, len);
4de92180	348	mutex_unlock(&nic_data->spi_lock);
f4150724 BH	349	return rc;
	350	}
	351
76884835 BH	352	static int falcon_mtd_write(struct mtd_info *mtd, loff_t start,
76884835 BH	353	size_t len, size_t retlen, const u8 buffer)
f4150724	354	{
76884835	355	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
f4150724 BH	356	struct efx_mtd *efx_mtd = mtd->priv;
f4150724 BH	357	const struct efx_spi_device *spi = efx_mtd->spi;
76884835	358	struct efx_nic *efx = efx_mtd->efx;
4de92180	359	struct falcon_nic_data *nic_data = efx->nic_data;
f4150724 BH	360	int rc;
f4150724 BH	361
4de92180	362	rc = mutex_lock_interruptible(&nic_data->spi_lock);
f4150724 BH	363	if (rc)
f4150724 BH	364	return rc;
76884835 BH	365	rc = falcon_spi_write(efx, spi, part->offset + start, len,
76884835 BH	366	retlen, buffer);
4de92180	367	mutex_unlock(&nic_data->spi_lock);
f4150724 BH	368	return rc;
	369	}
	370
76884835	371	static int falcon_mtd_sync(struct mtd_info *mtd)
f4150724	372	{
0c605a20	373	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
f4150724	374	struct efx_mtd *efx_mtd = mtd->priv;
76884835	375	struct efx_nic *efx = efx_mtd->efx;
4de92180	376	struct falcon_nic_data *nic_data = efx->nic_data;
f4150724 BH	377	int rc;
f4150724 BH	378
4de92180	379	mutex_lock(&nic_data->spi_lock);
0c605a20	380	rc = efx_spi_slow_wait(part, true);
4de92180	381	mutex_unlock(&nic_data->spi_lock);
76884835	382	return rc;
f4150724 BH	383	}
f4150724 BH	384
18e83e4c	385	static const struct efx_mtd_ops falcon_mtd_ops = {
76884835 BH	386	.read = falcon_mtd_read,
	387	.erase = falcon_mtd_erase,
	388	.write = falcon_mtd_write,
	389	.sync = falcon_mtd_sync,
	390	};
f4150724	391
76884835	392	static int falcon_mtd_probe(struct efx_nic *efx)
f4150724	393	{
4de92180	394	struct falcon_nic_data *nic_data = efx->nic_data;
6a8872c5	395	struct efx_spi_device *spi;
f4150724	396	struct efx_mtd *efx_mtd;
6a8872c5	397	int rc = -ENODEV;
76884835 BH	398
76884835 BH	399	ASSERT_RTNL();
f4150724	400
4de92180 BH	401	spi = &nic_data->spi_flash;
4de92180 BH	402	if (efx_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) {
6a8872c5 BH	403	efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
	404	GFP_KERNEL);
	405	if (!efx_mtd)
	406	return -ENOMEM;
	407
	408	efx_mtd->spi = spi;
	409	efx_mtd->name = "flash";
	410	efx_mtd->ops = &falcon_mtd_ops;
	411
	412	efx_mtd->n_parts = 1;
	413	efx_mtd->part[0].mtd.type = MTD_NORFLASH;
	414	efx_mtd->part[0].mtd.flags = MTD_CAP_NORFLASH;
	415	efx_mtd->part[0].mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START;
	416	efx_mtd->part[0].mtd.erasesize = spi->erase_size;
	417	efx_mtd->part[0].offset = FALCON_FLASH_BOOTCODE_START;
	418	efx_mtd->part[0].type_name = "sfc_flash_bootrom";
	419
	420	rc = efx_mtd_probe_device(efx, efx_mtd);
	421	if (rc) {
	422	kfree(efx_mtd);
	423	return rc;
	424	}
	425	}
76884835	426
4de92180 BH	427	spi = &nic_data->spi_eeprom;
4de92180 BH	428	if (efx_spi_present(spi) && spi->size > EFX_EEPROM_BOOTCONFIG_START) {
6a8872c5 BH	429	efx_mtd = kzalloc(sizeof(*efx_mtd) + sizeof(efx_mtd->part[0]),
	430	GFP_KERNEL);
	431	if (!efx_mtd)
	432	return -ENOMEM;
	433
	434	efx_mtd->spi = spi;
	435	efx_mtd->name = "EEPROM";
	436	efx_mtd->ops = &falcon_mtd_ops;
	437
	438	efx_mtd->n_parts = 1;
	439	efx_mtd->part[0].mtd.type = MTD_RAM;
	440	efx_mtd->part[0].mtd.flags = MTD_CAP_RAM;
	441	efx_mtd->part[0].mtd.size =
	442	min(spi->size, EFX_EEPROM_BOOTCONFIG_END) -
	443	EFX_EEPROM_BOOTCONFIG_START;
	444	efx_mtd->part[0].mtd.erasesize = spi->erase_size;
	445	efx_mtd->part[0].offset = EFX_EEPROM_BOOTCONFIG_START;
	446	efx_mtd->part[0].type_name = "sfc_bootconfig";
	447
	448	rc = efx_mtd_probe_device(efx, efx_mtd);
	449	if (rc) {
	450	kfree(efx_mtd);
	451	return rc;
	452	}
	453	}
76884835	454
76884835	455	return rc;
f4150724	456	}
8880f4ec BH	457
	458	/* Implementation of MTD operations for Siena */
	459
	460	static int siena_mtd_read(struct mtd_info *mtd, loff_t start,
	461	size_t len, size_t retlen, u8 buffer)
	462	{
	463	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	464	struct efx_mtd *efx_mtd = mtd->priv;
	465	struct efx_nic *efx = efx_mtd->efx;
	466	loff_t offset = start;
	467	loff_t end = min_t(loff_t, start + len, mtd->size);
	468	size_t chunk;
	469	int rc = 0;
	470
	471	while (offset < end) {
5a27e86b	472	chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
8880f4ec BH	473	rc = efx_mcdi_nvram_read(efx, part->mcdi.nvram_type, offset,
	474	buffer, chunk);
	475	if (rc)
	476	goto out;
	477	offset += chunk;
	478	buffer += chunk;
	479	}
	480	out:
	481	*retlen = offset - start;
	482	return rc;
	483	}
	484
	485	static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
	486	{
	487	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	488	struct efx_mtd *efx_mtd = mtd->priv;
	489	struct efx_nic *efx = efx_mtd->efx;
	490	loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
	491	loff_t end = min_t(loff_t, start + len, mtd->size);
	492	size_t chunk = part->mtd.erasesize;
	493	int rc = 0;
	494
	495	if (!part->mcdi.updating) {
	496	rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
	497	if (rc)
	498	goto out;
3db1cd5c	499	part->mcdi.updating = true;
8880f4ec BH	500	}
	501
	502	/* The MCDI interface can in fact do multiple erase blocks at once;
	503	* but erasing may be slow, so we make multiple calls here to avoid
	504	* tripping the MCDI RPC timeout. */
	505	while (offset < end) {
	506	rc = efx_mcdi_nvram_erase(efx, part->mcdi.nvram_type, offset,
	507	chunk);
	508	if (rc)
	509	goto out;
	510	offset += chunk;
	511	}
	512	out:
	513	return rc;
	514	}
	515
	516	static int siena_mtd_write(struct mtd_info *mtd, loff_t start,
	517	size_t len, size_t retlen, const u8 buffer)
	518	{
	519	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	520	struct efx_mtd *efx_mtd = mtd->priv;
	521	struct efx_nic *efx = efx_mtd->efx;
	522	loff_t offset = start;
	523	loff_t end = min_t(loff_t, start + len, mtd->size);
	524	size_t chunk;
	525	int rc = 0;
	526
	527	if (!part->mcdi.updating) {
	528	rc = efx_mcdi_nvram_update_start(efx, part->mcdi.nvram_type);
	529	if (rc)
	530	goto out;
3db1cd5c	531	part->mcdi.updating = true;
8880f4ec BH	532	}
	533
	534	while (offset < end) {
5a27e86b	535	chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
8880f4ec BH	536	rc = efx_mcdi_nvram_write(efx, part->mcdi.nvram_type, offset,
	537	buffer, chunk);
	538	if (rc)
	539	goto out;
	540	offset += chunk;
	541	buffer += chunk;
	542	}
	543	out:
	544	*retlen = offset - start;
	545	return rc;
	546	}
	547
	548	static int siena_mtd_sync(struct mtd_info *mtd)
	549	{
	550	struct efx_mtd_partition *part = to_efx_mtd_partition(mtd);
	551	struct efx_mtd *efx_mtd = mtd->priv;
	552	struct efx_nic *efx = efx_mtd->efx;
	553	int rc = 0;
	554
	555	if (part->mcdi.updating) {
3db1cd5c	556	part->mcdi.updating = false;
8880f4ec BH	557	rc = efx_mcdi_nvram_update_finish(efx, part->mcdi.nvram_type);
	558	}
	559
	560	return rc;
	561	}
	562
18e83e4c	563	static const struct efx_mtd_ops siena_mtd_ops = {
8880f4ec BH	564	.read = siena_mtd_read,
	565	.erase = siena_mtd_erase,
	566	.write = siena_mtd_write,
	567	.sync = siena_mtd_sync,
	568	};
	569
	570	struct siena_nvram_type_info {
	571	int port;
	572	const char *name;
	573	};
	574
18e83e4c	575	static const struct siena_nvram_type_info siena_nvram_types[] = {
8880f4ec BH	576	[MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" },
	577	[MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" },
	578	[MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" },
	579	[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" },
	580	[MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" },
	581	[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" },
	582	[MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" },
	583	[MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" },
	584	[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" },
	585	[MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" },
	586	[MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" },
	587	[MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" },
e5621545	588	[MC_CMD_NVRAM_TYPE_FPGA] = { 0, "sfc_fpga" },
8880f4ec BH	589	};
	590
	591	static int siena_mtd_probe_partition(struct efx_nic *efx,
	592	struct efx_mtd *efx_mtd,
	593	unsigned int part_id,
	594	unsigned int type)
	595	{
	596	struct efx_mtd_partition *part = &efx_mtd->part[part_id];
18e83e4c	597	const struct siena_nvram_type_info *info;
8880f4ec BH	598	size_t size, erase_size;
	599	bool protected;
	600	int rc;
	601
e5621545 BH	602	if (type >= ARRAY_SIZE(siena_nvram_types) \|\|
e5621545 BH	603	siena_nvram_types[type].name == NULL)
8880f4ec BH	604	return -ENODEV;
	605
	606	info = &siena_nvram_types[type];
	607
	608	if (info->port != efx_port_num(efx))
	609	return -ENODEV;
	610
	611	rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
	612	if (rc)
	613	return rc;
	614	if (protected)
	615	return -ENODEV; /* hide it */
	616
	617	part->mcdi.nvram_type = type;
	618	part->type_name = info->name;
	619
	620	part->mtd.type = MTD_NORFLASH;
	621	part->mtd.flags = MTD_CAP_NORFLASH;
	622	part->mtd.size = size;
	623	part->mtd.erasesize = erase_size;
	624
	625	return 0;
	626	}
	627
	628	static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
	629	struct efx_mtd *efx_mtd)
	630	{
	631	struct efx_mtd_partition *part;
e3f5ec11 BH	632	uint16_t fw_subtype_list[
e3f5ec11 BH	633	MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM];
8880f4ec BH	634	int rc;
8880f4ec BH	635
6aa9c7f6	636	rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list, NULL);
8880f4ec BH	637	if (rc)
	638	return rc;
	639
	640	efx_for_each_partition(part, efx_mtd)
	641	part->mcdi.fw_subtype = fw_subtype_list[part->mcdi.nvram_type];
	642
	643	return 0;
	644	}
	645
	646	static int siena_mtd_probe(struct efx_nic *efx)
	647	{
	648	struct efx_mtd *efx_mtd;
	649	int rc = -ENODEV;
	650	u32 nvram_types;
	651	unsigned int type;
	652
	653	ASSERT_RTNL();
	654
	655	rc = efx_mcdi_nvram_types(efx, &nvram_types);
	656	if (rc)
	657	return rc;
	658
	659	efx_mtd = kzalloc(sizeof(*efx_mtd) +
	660	hweight32(nvram_types) * sizeof(efx_mtd->part[0]),
	661	GFP_KERNEL);
	662	if (!efx_mtd)
	663	return -ENOMEM;
	664
	665	efx_mtd->name = "Siena NVRAM manager";
	666
	667	efx_mtd->ops = &siena_mtd_ops;
	668
	669	type = 0;
	670	efx_mtd->n_parts = 0;
	671
	672	while (nvram_types != 0) {
	673	if (nvram_types & 1) {
	674	rc = siena_mtd_probe_partition(efx, efx_mtd,
	675	efx_mtd->n_parts, type);
	676	if (rc == 0)
	677	efx_mtd->n_parts++;
	678	else if (rc != -ENODEV)
	679	goto fail;
	680	}
	681	type++;
	682	nvram_types >>= 1;
	683	}
	684
	685	rc = siena_mtd_get_fw_subtypes(efx, efx_mtd);
	686	if (rc)
	687	goto fail;
	688
	689	rc = efx_mtd_probe_device(efx, efx_mtd);
	690	fail:
	691	if (rc)
	692	kfree(efx_mtd);
	693	return rc;
	694	}
	695