[deliverable/linux.git] / drivers / net / ethernet / sfc / nic.h

/****************************************************************************
 * Driver for Solarflare Solarstorm network controllers and boards
 * Copyright 2005-2006 Fen Systems Ltd.
 * Copyright 2006-2011 Solarflare Communications Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation, incorporated herein by reference.
 */

#ifndef EFX_NIC_H
#define EFX_NIC_H

#include <linux/net_tstamp.h>
#include <linux/i2c-algo-bit.h>
#include "net_driver.h"
#include "efx.h"
#include "mcdi.h"
#include "spi.h"

/*
 * Falcon hardware control
 */

enum {
	EFX_REV_FALCON_A0 = 0,
	EFX_REV_FALCON_A1 = 1,
	EFX_REV_FALCON_B0 = 2,
	EFX_REV_SIENA_A0 = 3,
};

static inline int efx_nic_rev(struct efx_nic *efx)
{
	return efx->type->revision;
}

extern u32 efx_nic_fpga_ver(struct efx_nic *efx);

/* NIC has two interlinked PCI functions for the same port. */
static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
{
	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
}

enum {
	PHY_TYPE_NONE = 0,
	PHY_TYPE_TXC43128 = 1,
	PHY_TYPE_88E1111 = 2,
	PHY_TYPE_SFX7101 = 3,
	PHY_TYPE_QT2022C2 = 4,
	PHY_TYPE_PM8358 = 6,
	PHY_TYPE_SFT9001A = 8,
	PHY_TYPE_QT2025C = 9,
	PHY_TYPE_SFT9001B = 10,
};

#define FALCON_XMAC_LOOPBACKS			\
	((1 << LOOPBACK_XGMII) |		\
	 (1 << LOOPBACK_XGXS) |			\
	 (1 << LOOPBACK_XAUI))

#define FALCON_GMAC_LOOPBACKS			\
	(1 << LOOPBACK_GMAC)

/* Alignment of PCIe DMA boundaries (4KB) */
#define EFX_PAGE_SIZE	4096
/* Size and alignment of buffer table entries (same) */
#define EFX_BUF_SIZE	EFX_PAGE_SIZE

/**
 * struct falcon_board_type - board operations and type information
 * @id: Board type id, as found in NVRAM
 * @init: Allocate resources and initialise peripheral hardware
 * @init_phy: Do board-specific PHY initialisation
 * @fini: Shut down hardware and free resources
 * @set_id_led: Set state of identifying LED or revert to automatic function
 * @monitor: Board-specific health check function
 */
struct falcon_board_type {
	u8 id;
	int (*init) (struct efx_nic *nic);
	void (*init_phy) (struct efx_nic *efx);
	void (*fini) (struct efx_nic *nic);
	void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
	int (*monitor) (struct efx_nic *nic);
};

/**
 * struct falcon_board - board information
 * @type: Type of board
 * @major: Major rev. ('A', 'B' ...)
 * @minor: Minor rev. (0, 1, ...)
 * @i2c_adap: I2C adapter for on-board peripherals
 * @i2c_data: Data for bit-banging algorithm
 * @hwmon_client: I2C client for hardware monitor
 * @ioexp_client: I2C client for power/port control
 */
struct falcon_board {
	const struct falcon_board_type *type;
	int major;
	int minor;
	struct i2c_adapter i2c_adap;
	struct i2c_algo_bit_data i2c_data;
	struct i2c_client *hwmon_client, *ioexp_client;
};

/**
 * struct falcon_nic_data - Falcon NIC state
 * @pci_dev2: Secondary function of Falcon A
 * @board: Board state and functions
 * @stats_disable_count: Nest count for disabling statistics fetches
 * @stats_pending: Is there a pending DMA of MAC statistics.
 * @stats_timer: A timer for regularly fetching MAC statistics.
 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
 * @spi_flash: SPI flash device
 * @spi_eeprom: SPI EEPROM device
 * @spi_lock: SPI bus lock
 * @mdio_lock: MDIO bus lock
 * @xmac_poll_required: XMAC link state needs polling
 */
struct falcon_nic_data {
	struct pci_dev *pci_dev2;
	struct falcon_board board;
	unsigned int stats_disable_count;
	bool stats_pending;
	struct timer_list stats_timer;
	u32 *stats_dma_done;
	struct efx_spi_device spi_flash;
	struct efx_spi_device spi_eeprom;
	struct mutex spi_lock;
	struct mutex mdio_lock;
	bool xmac_poll_required;
};

static inline struct falcon_board *falcon_board(struct efx_nic *efx)
{
	struct falcon_nic_data *data = efx->nic_data;
	return &data->board;
}

/**
 * struct siena_nic_data - Siena NIC state
 * @mcdi: Management-Controller-to-Driver Interface
 * @wol_filter_id: Wake-on-LAN packet filter id
 * @hwmon: Hardware monitor state
 */
struct siena_nic_data {
	struct efx_mcdi_iface mcdi;
	int wol_filter_id;
#ifdef CONFIG_SFC_MCDI_MON
	struct efx_mcdi_mon hwmon;
#endif
};

#ifdef CONFIG_SFC_MCDI_MON
static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
{
	struct siena_nic_data *nic_data;
	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
	nic_data = efx->nic_data;
	return &nic_data->hwmon;
}
#endif

/*
 * On the SFC9000 family each port is associated with 1 PCI physical
 * function (PF) handled by sfc and a configurable number of virtual
 * functions (VFs) that may be handled by some other driver, often in
 * a VM guest.  The queue pointer registers are mapped in both PF and
 * VF BARs such that an 8K region provides access to a single RX, TX
 * and event queue (collectively a Virtual Interface, VI or VNIC).
 *
 * The PF has access to all 1024 VIs while VFs are mapped to VIs
 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
 * The number of VIs and the VI_SCALE value are configurable but must
 * be established at boot time by firmware.
 */

/* Maximum VI_SCALE parameter supported by Siena */
#define EFX_VI_SCALE_MAX 6
/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
 * so this is the smallest allowed value. */
#define EFX_VI_BASE 128U
/* Maximum number of VFs allowed */
#define EFX_VF_COUNT_MAX 127
/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
#define EFX_MAX_VF_EVQ_SIZE 8192UL
/* The number of buffer table entries reserved for each VI on a VF */
#define EFX_VF_BUFTBL_PER_VI					\
	((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) *	\
	 sizeof(efx_qword_t) / EFX_BUF_SIZE)

#ifdef CONFIG_SFC_SRIOV

static inline bool efx_sriov_wanted(struct efx_nic *efx)
{
	return efx->vf_count != 0;
}
static inline bool efx_sriov_enabled(struct efx_nic *efx)
{
	return efx->vf_init_count != 0;
}
static inline unsigned int efx_vf_size(struct efx_nic *efx)
{
	return 1 << efx->vi_scale;
}

extern int efx_init_sriov(void);
extern void efx_sriov_probe(struct efx_nic *efx);
extern int efx_sriov_init(struct efx_nic *efx);
extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
extern void efx_sriov_reset(struct efx_nic *efx);
extern void efx_sriov_fini(struct efx_nic *efx);
extern void efx_fini_sriov(void);

#else

static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }

static inline int efx_init_sriov(void) { return 0; }
static inline void efx_sriov_probe(struct efx_nic *efx) {}
static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
					   efx_qword_t *event) {}
static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
					   efx_qword_t *event) {}
static inline void efx_sriov_event(struct efx_channel *channel,
				   efx_qword_t *event) {}
static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
static inline void efx_sriov_reset(struct efx_nic *efx) {}
static inline void efx_sriov_fini(struct efx_nic *efx) {}
static inline void efx_fini_sriov(void) {}

#endif

extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
				 u16 vlan, u8 qos);
extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
				   struct ifla_vf_info *ivf);
extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
				     bool spoofchk);

struct ethtool_ts_info;
extern void efx_ptp_probe(struct efx_nic *efx);
extern int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd);
extern void efx_ptp_get_ts_info(struct efx_nic *efx,
				struct ethtool_ts_info *ts_info);
extern bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
extern int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
extern void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);

extern const struct efx_nic_type falcon_a1_nic_type;
extern const struct efx_nic_type falcon_b0_nic_type;
extern const struct efx_nic_type siena_a0_nic_type;

/**************************************************************************
 *
 * Externs
 *
 **************************************************************************
 */

extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);

/* TX data path */
extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);

/* RX data path */
extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);

/* Event data path */
extern int efx_nic_probe_eventq(struct efx_channel *channel);
extern void efx_nic_init_eventq(struct efx_channel *channel);
extern void efx_nic_fini_eventq(struct efx_channel *channel);
extern void efx_nic_remove_eventq(struct efx_channel *channel);
extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
extern bool efx_nic_event_present(struct efx_channel *channel);

/* MAC/PHY */
extern void falcon_drain_tx_fifo(struct efx_nic *efx);
extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
extern bool falcon_xmac_check_fault(struct efx_nic *efx);
extern int falcon_reconfigure_xmac(struct efx_nic *efx);
extern void falcon_update_stats_xmac(struct efx_nic *efx);

/* Some statistics are computed as A - B where A and B each increase
 * linearly with some hardware counter(s) and the counters are read
 * asynchronously.  If the counters contributing to B are always read
 * after those contributing to A, the computed value may be lower than
 * the true value by some variable amount, and may decrease between
 * subsequent computations.
 *
 * We should never allow statistics to decrease or to exceed the true
 * value.  Since the computed value will never be greater than the
 * true value, we can achieve this by only storing the computed value
 * when it increases.
 */
static inline void efx_update_diff_stat(u64 *stat, u64 diff)
{
	if ((s64)(diff - *stat) > 0)
		*stat = diff;
}

/* Interrupts and test events */
extern int efx_nic_init_interrupt(struct efx_nic *efx);
extern void efx_nic_enable_interrupts(struct efx_nic *efx);
extern void efx_nic_event_test_start(struct efx_channel *channel);
extern void efx_nic_irq_test_start(struct efx_nic *efx);
extern void efx_nic_disable_interrupts(struct efx_nic *efx);
extern void efx_nic_fini_interrupt(struct efx_nic *efx);
extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
extern void falcon_irq_ack_a1(struct efx_nic *efx);

static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
{
	return ACCESS_ONCE(channel->event_test_cpu);
}
static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
{
	return ACCESS_ONCE(efx->last_irq_cpu);
}

/* Global Resources */
extern int efx_nic_flush_queues(struct efx_nic *efx);
extern void siena_prepare_flush(struct efx_nic *efx);
extern void siena_finish_flush(struct efx_nic *efx);
extern void falcon_start_nic_stats(struct efx_nic *efx);
extern void falcon_stop_nic_stats(struct efx_nic *efx);
extern void falcon_setup_xaui(struct efx_nic *efx);
extern int falcon_reset_xaui(struct efx_nic *efx);
extern void
efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
extern void efx_nic_init_common(struct efx_nic *efx);
extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);

int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
			 unsigned int len);
void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);

/* Tests */
struct efx_nic_register_test {
	unsigned address;
	efx_oword_t mask;
};
extern int efx_nic_test_registers(struct efx_nic *efx,
				  const struct efx_nic_register_test *regs,
				  size_t n_regs);

extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);

/**************************************************************************
 *
 * Falcon MAC stats
 *
 **************************************************************************
 */

#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)

/* Retrieve statistic from statistics block */
#define FALCON_STAT(efx, falcon_stat, efx_stat) do {		\
	if (FALCON_STAT_WIDTH(falcon_stat) == 16)		\
		(efx)->mac_stats.efx_stat += le16_to_cpu(	\
			*((__force __le16 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	else if (FALCON_STAT_WIDTH(falcon_stat) == 32)		\
		(efx)->mac_stats.efx_stat += le32_to_cpu(	\
			*((__force __le32 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	else							\
		(efx)->mac_stats.efx_stat += le64_to_cpu(	\
			*((__force __le64 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	} while (0)

#define FALCON_MAC_STATS_SIZE 0x100

#define MAC_DATA_LBN 0
#define MAC_DATA_WIDTH 32

extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
			       efx_qword_t *event);

extern void falcon_poll_xmac(struct efx_nic *efx);

#endif /* EFX_NIC_H */
Commit	Line	Data
8ceee660 BH	1	/****************************************************************************
	2	* Driver for Solarflare Solarstorm network controllers and boards
	3	* Copyright 2005-2006 Fen Systems Ltd.
0a6f40c6	4	* Copyright 2006-2011 Solarflare Communications Inc.
8ceee660 BH	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License version 2 as published
	8	* by the Free Software Foundation, incorporated herein by reference.
	9	*/
	10
744093c9 BH	11	#ifndef EFX_NIC_H
744093c9 BH	12	#define EFX_NIC_H
8ceee660	13
7c236c43	14	#include <linux/net_tstamp.h>
5c16a96c	15	#include <linux/i2c-algo-bit.h>
8ceee660	16	#include "net_driver.h"
177dfcd8	17	#include "efx.h"
8880f4ec	18	#include "mcdi.h"
4de92180	19	#include "spi.h"
8ceee660 BH	20
	21	/*
	22	* Falcon hardware control
	23	*/
	24
daeda630 BH	25	enum {
	26	EFX_REV_FALCON_A0 = 0,
	27	EFX_REV_FALCON_A1 = 1,
	28	EFX_REV_FALCON_B0 = 2,
8880f4ec	29	EFX_REV_SIENA_A0 = 3,
8ceee660 BH	30	};
8ceee660 BH	31
daeda630	32	static inline int efx_nic_rev(struct efx_nic *efx)
55668611	33	{
daeda630	34	return efx->type->revision;
55668611	35	}
8ceee660	36
152b6a62 BH	37	extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
	38
	39	/* NIC has two interlinked PCI functions for the same port. */
	40	static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
	41	{
	42	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
	43	}
	44
c1c4f453 BH	45	enum {
	46	PHY_TYPE_NONE = 0,
	47	PHY_TYPE_TXC43128 = 1,
	48	PHY_TYPE_88E1111 = 2,
	49	PHY_TYPE_SFX7101 = 3,
	50	PHY_TYPE_QT2022C2 = 4,
	51	PHY_TYPE_PM8358 = 6,
	52	PHY_TYPE_SFT9001A = 8,
	53	PHY_TYPE_QT2025C = 9,
	54	PHY_TYPE_SFT9001B = 10,
	55	};
	56
	57	#define FALCON_XMAC_LOOPBACKS \
	58	((1 << LOOPBACK_XGMII) \| \
	59	(1 << LOOPBACK_XGXS) \| \
	60	(1 << LOOPBACK_XAUI))
	61
	62	#define FALCON_GMAC_LOOPBACKS \
	63	(1 << LOOPBACK_GMAC)
	64
5b6262d0 BH	65	/* Alignment of PCIe DMA boundaries (4KB) */
	66	#define EFX_PAGE_SIZE 4096
	67	/* Size and alignment of buffer table entries (same) */
	68	#define EFX_BUF_SIZE EFX_PAGE_SIZE
	69
3759433d	70	/**
44838a44 BH	71	* struct falcon_board_type - board operations and type information
44838a44 BH	72	* @id: Board type id, as found in NVRAM
3759433d BH	73	* @init: Allocate resources and initialise peripheral hardware
3759433d BH	74	* @init_phy: Do board-specific PHY initialisation
44838a44	75	* @fini: Shut down hardware and free resources
3759433d BH	76	* @set_id_led: Set state of identifying LED or revert to automatic function
3759433d BH	77	* @monitor: Board-specific health check function
44838a44 BH	78	*/
	79	struct falcon_board_type {
	80	u8 id;
44838a44 BH	81	int (init) (struct efx_nic nic);
	82	void (init_phy) (struct efx_nic efx);
	83	void (fini) (struct efx_nic nic);
	84	void (set_id_led) (struct efx_nic efx, enum efx_led_mode mode);
	85	int (monitor) (struct efx_nic nic);
	86	};
	87
	88	/**
	89	* struct falcon_board - board information
	90	* @type: Type of board
	91	* @major: Major rev. ('A', 'B' ...)
	92	* @minor: Minor rev. (0, 1, ...)
e775fb93 BH	93	* @i2c_adap: I2C adapter for on-board peripherals
e775fb93 BH	94	* @i2c_data: Data for bit-banging algorithm
3759433d BH	95	* @hwmon_client: I2C client for hardware monitor
	96	* @ioexp_client: I2C client for power/port control
	97	*/
	98	struct falcon_board {
44838a44	99	const struct falcon_board_type *type;
3759433d BH	100	int major;
3759433d BH	101	int minor;
e775fb93 BH	102	struct i2c_adapter i2c_adap;
e775fb93 BH	103	struct i2c_algo_bit_data i2c_data;
3759433d BH	104	struct i2c_client hwmon_client, ioexp_client;
	105	};
	106
5c16a96c BH	107	/**
5c16a96c BH	108	* struct falcon_nic_data - Falcon NIC state
8986352a	109	* @pci_dev2: Secondary function of Falcon A
3759433d	110	* @board: Board state and functions
55edc6e6 BH	111	* @stats_disable_count: Nest count for disabling statistics fetches
	112	* @stats_pending: Is there a pending DMA of MAC statistics.
	113	* @stats_timer: A timer for regularly fetching MAC statistics.
	114	* @stats_dma_done: Pointer to the flag which indicates DMA completion.
4de92180 BH	115	* @spi_flash: SPI flash device
	116	* @spi_eeprom: SPI EEPROM device
	117	* @spi_lock: SPI bus lock
4833f02a	118	* @mdio_lock: MDIO bus lock
cef68bde	119	* @xmac_poll_required: XMAC link state needs polling
5c16a96c BH	120	*/
	121	struct falcon_nic_data {
	122	struct pci_dev *pci_dev2;
3759433d	123	struct falcon_board board;
55edc6e6 BH	124	unsigned int stats_disable_count;
	125	bool stats_pending;
	126	struct timer_list stats_timer;
	127	u32 *stats_dma_done;
4de92180 BH	128	struct efx_spi_device spi_flash;
	129	struct efx_spi_device spi_eeprom;
	130	struct mutex spi_lock;
4833f02a	131	struct mutex mdio_lock;
cef68bde	132	bool xmac_poll_required;
5c16a96c BH	133	};
5c16a96c BH	134
278c0621 BH	135	static inline struct falcon_board falcon_board(struct efx_nic efx)
278c0621 BH	136	{
3759433d BH	137	struct falcon_nic_data *data = efx->nic_data;
3759433d BH	138	return &data->board;
278c0621 BH	139	}
278c0621 BH	140
8880f4ec BH	141	/**
8880f4ec BH	142	* struct siena_nic_data - Siena NIC state
8880f4ec BH	143	* @mcdi: Management-Controller-to-Driver Interface
8880f4ec BH	144	* @wol_filter_id: Wake-on-LAN packet filter id
55c5e0f8	145	* @hwmon: Hardware monitor state
8880f4ec BH	146	*/
8880f4ec BH	147	struct siena_nic_data {
8880f4ec BH	148	struct efx_mcdi_iface mcdi;
8880f4ec BH	149	int wol_filter_id;
55c5e0f8 BH	150	#ifdef CONFIG_SFC_MCDI_MON
	151	struct efx_mcdi_mon hwmon;
	152	#endif
8880f4ec BH	153	};
8880f4ec BH	154
55c5e0f8 BH	155	#ifdef CONFIG_SFC_MCDI_MON
	156	static inline struct efx_mcdi_mon efx_mcdi_mon(struct efx_nic efx)
	157	{
	158	struct siena_nic_data *nic_data;
	159	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
	160	nic_data = efx->nic_data;
	161	return &nic_data->hwmon;
	162	}
	163	#endif
	164
cd2d5b52 BH	165	/*
	166	* On the SFC9000 family each port is associated with 1 PCI physical
	167	* function (PF) handled by sfc and a configurable number of virtual
	168	* functions (VFs) that may be handled by some other driver, often in
	169	* a VM guest. The queue pointer registers are mapped in both PF and
	170	* VF BARs such that an 8K region provides access to a single RX, TX
	171	* and event queue (collectively a Virtual Interface, VI or VNIC).
	172	*
	173	* The PF has access to all 1024 VIs while VFs are mapped to VIs
	174	* according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
	175	* in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
	176	* The number of VIs and the VI_SCALE value are configurable but must
	177	* be established at boot time by firmware.
	178	*/
	179
	180	/* Maximum VI_SCALE parameter supported by Siena */
	181	#define EFX_VI_SCALE_MAX 6
	182	/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
	183	* so this is the smallest allowed value. */
	184	#define EFX_VI_BASE 128U
	185	/* Maximum number of VFs allowed */
	186	#define EFX_VF_COUNT_MAX 127
	187	/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
	188	#define EFX_MAX_VF_EVQ_SIZE 8192UL
	189	/* The number of buffer table entries reserved for each VI on a VF */
	190	#define EFX_VF_BUFTBL_PER_VI \
	191	((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
	192	sizeof(efx_qword_t) / EFX_BUF_SIZE)
	193
	194	#ifdef CONFIG_SFC_SRIOV
	195
	196	static inline bool efx_sriov_wanted(struct efx_nic *efx)
	197	{
	198	return efx->vf_count != 0;
	199	}
	200	static inline bool efx_sriov_enabled(struct efx_nic *efx)
	201	{
	202	return efx->vf_init_count != 0;
	203	}
	204	static inline unsigned int efx_vf_size(struct efx_nic *efx)
	205	{
	206	return 1 << efx->vi_scale;
	207	}
	208
	209	extern int efx_init_sriov(void);
	210	extern void efx_sriov_probe(struct efx_nic *efx);
	211	extern int efx_sriov_init(struct efx_nic *efx);
	212	extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
	213	extern void efx_sriov_tx_flush_done(struct efx_nic efx, efx_qword_t event);
	214	extern void efx_sriov_rx_flush_done(struct efx_nic efx, efx_qword_t event);
	215	extern void efx_sriov_event(struct efx_channel channel, efx_qword_t event);
	216	extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
	217	extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
	218	extern void efx_sriov_reset(struct efx_nic *efx);
	219	extern void efx_sriov_fini(struct efx_nic *efx);
	220	extern void efx_fini_sriov(void);
	221
	222	#else
	223
	224	static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
	225	static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
	226	static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
	227
	228	static inline int efx_init_sriov(void) { return 0; }
229	static inline void efx_sriov_probe(struct efx_nic *efx) {}
230	static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
231	static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
232	static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
233	efx_qword_t *event) {}
234	static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
235	efx_qword_t *event) {}
236	static inline void efx_sriov_event(struct efx_channel *channel,
237	efx_qword_t *event) {}
238	static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
239	static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
240	static inline void efx_sriov_reset(struct efx_nic *efx) {}
241	static inline void efx_sriov_fini(struct efx_nic *efx) {}
242	static inline void efx_fini_sriov(void) {}
243
244	#endif
245
246	extern int efx_sriov_set_vf_mac(struct net_device dev, int vf, u8 mac);
247	extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
248	u16 vlan, u8 qos);
249	extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
250	struct ifla_vf_info *ivf);
251	extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
252	bool spoofchk);
253
7c236c43	254	struct ethtool_ts_info;
7c236c43 SH	255	extern void efx_ptp_probe(struct efx_nic *efx);
7c236c43 SH	256	extern int efx_ptp_ioctl(struct efx_nic efx, struct ifreq ifr, int cmd);
62ebac92 BH	257	extern void efx_ptp_get_ts_info(struct efx_nic *efx,
62ebac92 BH	258	struct ethtool_ts_info *ts_info);
7c236c43 SH	259	extern bool efx_ptp_is_ptp_tx(struct efx_nic efx, struct sk_buff skb);
	260	extern int efx_ptp_tx(struct efx_nic efx, struct sk_buff skb);
	261	extern void efx_ptp_event(struct efx_nic efx, efx_qword_t ev);
7c236c43	262
6c8c2513	263	extern const struct efx_nic_type falcon_a1_nic_type;
	264	extern const struct efx_nic_type falcon_b0_nic_type;
	265	extern const struct efx_nic_type siena_a0_nic_type;
8ceee660 BH	266
	267	/**************************************************************************
	268	*
	269	* Externs
	270	*
	271	**************************************************************************
	272	*/
	273
e41c11ee	274	extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
5087b54d	275
8ceee660	276	/* TX data path */
152b6a62 BH	277	extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
	278	extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
	279	extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
	280	extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
	281	extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
8ceee660 BH	282
8ceee660 BH	283	/* RX data path */
152b6a62 BH	284	extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
	285	extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
	286	extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
	287	extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
	288	extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
2ae75dac	289	extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
8ceee660 BH	290
8ceee660 BH	291	/* Event data path */
152b6a62 BH	292	extern int efx_nic_probe_eventq(struct efx_channel *channel);
	293	extern void efx_nic_init_eventq(struct efx_channel *channel);
	294	extern void efx_nic_fini_eventq(struct efx_channel *channel);
	295	extern void efx_nic_remove_eventq(struct efx_channel *channel);
	296	extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
	297	extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
d4fabcc8	298	extern bool efx_nic_event_present(struct efx_channel *channel);
8ceee660	299
8ceee660	300	/* MAC/PHY */
8ceee660	301	extern void falcon_drain_tx_fifo(struct efx_nic *efx);
8ceee660	302	extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
710b208d BH	303	extern bool falcon_xmac_check_fault(struct efx_nic *efx);
	304	extern int falcon_reconfigure_xmac(struct efx_nic *efx);
	305	extern void falcon_update_stats_xmac(struct efx_nic *efx);
8ceee660	306
b7f514af BH	307	/* Some statistics are computed as A - B where A and B each increase
	308	* linearly with some hardware counter(s) and the counters are read
	309	* asynchronously. If the counters contributing to B are always read
	310	* after those contributing to A, the computed value may be lower than
	311	* the true value by some variable amount, and may decrease between
	312	* subsequent computations.
	313	*
	314	* We should never allow statistics to decrease or to exceed the true
	315	* value. Since the computed value will never be greater than the
	316	* true value, we can achieve this by only storing the computed value
	317	* when it increases.
	318	*/
	319	static inline void efx_update_diff_stat(u64 *stat, u64 diff)
	320	{
	321	if ((s64)(diff - *stat) > 0)
	322	*stat = diff;
	323	}
	324
8ceee660	325	/* Interrupts and test events */
152b6a62 BH	326	extern int efx_nic_init_interrupt(struct efx_nic *efx);
152b6a62 BH	327	extern void efx_nic_enable_interrupts(struct efx_nic *efx);
eee6f6a9 BH	328	extern void efx_nic_event_test_start(struct efx_channel *channel);
eee6f6a9 BH	329	extern void efx_nic_irq_test_start(struct efx_nic *efx);
152b6a62 BH	330	extern void efx_nic_disable_interrupts(struct efx_nic *efx);
	331	extern void efx_nic_fini_interrupt(struct efx_nic *efx);
	332	extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
	333	extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
	334	extern void falcon_irq_ack_a1(struct efx_nic *efx);
	335
eee6f6a9 BH	336	static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
eee6f6a9 BH	337	{
dd40781e	338	return ACCESS_ONCE(channel->event_test_cpu);
eee6f6a9 BH	339	}
	340	static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
	341	{
	342	return ACCESS_ONCE(efx->last_irq_cpu);
	343	}
	344
8ceee660	345	/* Global Resources */
152b6a62	346	extern int efx_nic_flush_queues(struct efx_nic *efx);
d5e8cc6c BH	347	extern void siena_prepare_flush(struct efx_nic *efx);
d5e8cc6c BH	348	extern void siena_finish_flush(struct efx_nic *efx);
55edc6e6 BH	349	extern void falcon_start_nic_stats(struct efx_nic *efx);
55edc6e6 BH	350	extern void falcon_stop_nic_stats(struct efx_nic *efx);
b7b40eeb	351	extern void falcon_setup_xaui(struct efx_nic *efx);
8ceee660	352	extern int falcon_reset_xaui(struct efx_nic *efx);
28e47c49 BH	353	extern void
28e47c49 BH	354	efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
152b6a62	355	extern void efx_nic_init_common(struct efx_nic *efx);
765c9f46	356	extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
152b6a62 BH	357
	358	int efx_nic_alloc_buffer(struct efx_nic efx, struct efx_buffer buffer,
	359	unsigned int len);
	360	void efx_nic_free_buffer(struct efx_nic efx, struct efx_buffer buffer);
8ceee660	361
8c8661e4	362	/* Tests */
152b6a62 BH	363	struct efx_nic_register_test {
	364	unsigned address;
	365	efx_oword_t mask;
	366	};
	367	extern int efx_nic_test_registers(struct efx_nic *efx,
	368	const struct efx_nic_register_test *regs,
	369	size_t n_regs);
8c8661e4	370
5b98c1bf BH	371	extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
	372	extern void efx_nic_get_regs(struct efx_nic efx, void buf);
	373
8ceee660 BH	374	/**************************************************************************
	375	*
	376	* Falcon MAC stats
	377	*
	378	**************************************************************************
	379	*/
	380
	381	#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
	382	#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
	383
	384	/* Retrieve statistic from statistics block */
	385	#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
	386	if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
	387	(efx)->mac_stats.efx_stat += le16_to_cpu( \
	388	((__force __le16 ) \
	389	(efx->stats_buffer.addr + \
	390	FALCON_STAT_OFFSET(falcon_stat)))); \
	391	else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
	392	(efx)->mac_stats.efx_stat += le32_to_cpu( \
	393	((__force __le32 ) \
	394	(efx->stats_buffer.addr + \
	395	FALCON_STAT_OFFSET(falcon_stat)))); \
	396	else \
	397	(efx)->mac_stats.efx_stat += le64_to_cpu( \
	398	((__force __le64 ) \
	399	(efx->stats_buffer.addr + \
	400	FALCON_STAT_OFFSET(falcon_stat)))); \
	401	} while (0)
	402
	403	#define FALCON_MAC_STATS_SIZE 0x100
	404
	405	#define MAC_DATA_LBN 0
	406	#define MAC_DATA_WIDTH 32
	407
90893000 BH	408	extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
90893000 BH	409	efx_qword_t *event);
8ceee660	410
9007b9fa BH	411	extern void falcon_poll_xmac(struct efx_nic *efx);
9007b9fa BH	412
744093c9	413	#endif /* EFX_NIC_H */