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7c236c43 | 1 | /**************************************************************************** |
f7a6d2c4 BH |
2 | * Driver for Solarflare network controllers and boards |
3 | * Copyright 2011-2013 Solarflare Communications Inc. | |
7c236c43 SH |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | /* Theory of operation: | |
11 | * | |
12 | * PTP support is assisted by firmware running on the MC, which provides | |
13 | * the hardware timestamping capabilities. Both transmitted and received | |
14 | * PTP event packets are queued onto internal queues for subsequent processing; | |
15 | * this is because the MC operations are relatively long and would block | |
16 | * block NAPI/interrupt operation. | |
17 | * | |
18 | * Receive event processing: | |
19 | * The event contains the packet's UUID and sequence number, together | |
20 | * with the hardware timestamp. The PTP receive packet queue is searched | |
21 | * for this UUID/sequence number and, if found, put on a pending queue. | |
22 | * Packets not matching are delivered without timestamps (MCDI events will | |
23 | * always arrive after the actual packet). | |
24 | * It is important for the operation of the PTP protocol that the ordering | |
25 | * of packets between the event and general port is maintained. | |
26 | * | |
27 | * Work queue processing: | |
28 | * If work waiting, synchronise host/hardware time | |
29 | * | |
30 | * Transmit: send packet through MC, which returns the transmission time | |
31 | * that is converted to an appropriate timestamp. | |
32 | * | |
33 | * Receive: the packet's reception time is converted to an appropriate | |
34 | * timestamp. | |
35 | */ | |
36 | #include <linux/ip.h> | |
37 | #include <linux/udp.h> | |
38 | #include <linux/time.h> | |
39 | #include <linux/ktime.h> | |
40 | #include <linux/module.h> | |
41 | #include <linux/net_tstamp.h> | |
42 | #include <linux/pps_kernel.h> | |
43 | #include <linux/ptp_clock_kernel.h> | |
44 | #include "net_driver.h" | |
45 | #include "efx.h" | |
46 | #include "mcdi.h" | |
47 | #include "mcdi_pcol.h" | |
48 | #include "io.h" | |
8b8a95a1 | 49 | #include "farch_regs.h" |
7c236c43 SH |
50 | #include "nic.h" |
51 | ||
52 | /* Maximum number of events expected to make up a PTP event */ | |
53 | #define MAX_EVENT_FRAGS 3 | |
54 | ||
55 | /* Maximum delay, ms, to begin synchronisation */ | |
56 | #define MAX_SYNCHRONISE_WAIT_MS 2 | |
57 | ||
58 | /* How long, at most, to spend synchronising */ | |
59 | #define SYNCHRONISE_PERIOD_NS 250000 | |
60 | ||
61 | /* How often to update the shared memory time */ | |
62 | #define SYNCHRONISATION_GRANULARITY_NS 200 | |
63 | ||
64 | /* Minimum permitted length of a (corrected) synchronisation time */ | |
65 | #define MIN_SYNCHRONISATION_NS 120 | |
66 | ||
67 | /* Maximum permitted length of a (corrected) synchronisation time */ | |
68 | #define MAX_SYNCHRONISATION_NS 1000 | |
69 | ||
70 | /* How many (MC) receive events that can be queued */ | |
71 | #define MAX_RECEIVE_EVENTS 8 | |
72 | ||
73 | /* Length of (modified) moving average. */ | |
74 | #define AVERAGE_LENGTH 16 | |
75 | ||
76 | /* How long an unmatched event or packet can be held */ | |
77 | #define PKT_EVENT_LIFETIME_MS 10 | |
78 | ||
79 | /* Offsets into PTP packet for identification. These offsets are from the | |
80 | * start of the IP header, not the MAC header. Note that neither PTP V1 nor | |
81 | * PTP V2 permit the use of IPV4 options. | |
82 | */ | |
83 | #define PTP_DPORT_OFFSET 22 | |
84 | ||
85 | #define PTP_V1_VERSION_LENGTH 2 | |
86 | #define PTP_V1_VERSION_OFFSET 28 | |
87 | ||
88 | #define PTP_V1_UUID_LENGTH 6 | |
89 | #define PTP_V1_UUID_OFFSET 50 | |
90 | ||
91 | #define PTP_V1_SEQUENCE_LENGTH 2 | |
92 | #define PTP_V1_SEQUENCE_OFFSET 58 | |
93 | ||
94 | /* The minimum length of a PTP V1 packet for offsets, etc. to be valid: | |
95 | * includes IP header. | |
96 | */ | |
97 | #define PTP_V1_MIN_LENGTH 64 | |
98 | ||
99 | #define PTP_V2_VERSION_LENGTH 1 | |
100 | #define PTP_V2_VERSION_OFFSET 29 | |
101 | ||
c939a316 LE |
102 | #define PTP_V2_UUID_LENGTH 8 |
103 | #define PTP_V2_UUID_OFFSET 48 | |
104 | ||
7c236c43 SH |
105 | /* Although PTP V2 UUIDs are comprised a ClockIdentity (8) and PortNumber (2), |
106 | * the MC only captures the last six bytes of the clock identity. These values | |
107 | * reflect those, not the ones used in the standard. The standard permits | |
108 | * mapping of V1 UUIDs to V2 UUIDs with these same values. | |
109 | */ | |
110 | #define PTP_V2_MC_UUID_LENGTH 6 | |
111 | #define PTP_V2_MC_UUID_OFFSET 50 | |
112 | ||
113 | #define PTP_V2_SEQUENCE_LENGTH 2 | |
114 | #define PTP_V2_SEQUENCE_OFFSET 58 | |
115 | ||
116 | /* The minimum length of a PTP V2 packet for offsets, etc. to be valid: | |
117 | * includes IP header. | |
118 | */ | |
119 | #define PTP_V2_MIN_LENGTH 63 | |
120 | ||
121 | #define PTP_MIN_LENGTH 63 | |
122 | ||
123 | #define PTP_ADDRESS 0xe0000181 /* 224.0.1.129 */ | |
124 | #define PTP_EVENT_PORT 319 | |
125 | #define PTP_GENERAL_PORT 320 | |
126 | ||
127 | /* Annoyingly the format of the version numbers are different between | |
128 | * versions 1 and 2 so it isn't possible to simply look for 1 or 2. | |
129 | */ | |
130 | #define PTP_VERSION_V1 1 | |
131 | ||
132 | #define PTP_VERSION_V2 2 | |
133 | #define PTP_VERSION_V2_MASK 0x0f | |
134 | ||
135 | enum ptp_packet_state { | |
136 | PTP_PACKET_STATE_UNMATCHED = 0, | |
137 | PTP_PACKET_STATE_MATCHED, | |
138 | PTP_PACKET_STATE_TIMED_OUT, | |
139 | PTP_PACKET_STATE_MATCH_UNWANTED | |
140 | }; | |
141 | ||
142 | /* NIC synchronised with single word of time only comprising | |
143 | * partial seconds and full nanoseconds: 10^9 ~ 2^30 so 2 bits for seconds. | |
144 | */ | |
145 | #define MC_NANOSECOND_BITS 30 | |
146 | #define MC_NANOSECOND_MASK ((1 << MC_NANOSECOND_BITS) - 1) | |
147 | #define MC_SECOND_MASK ((1 << (32 - MC_NANOSECOND_BITS)) - 1) | |
148 | ||
149 | /* Maximum parts-per-billion adjustment that is acceptable */ | |
150 | #define MAX_PPB 1000000 | |
151 | ||
152 | /* Number of bits required to hold the above */ | |
153 | #define MAX_PPB_BITS 20 | |
154 | ||
155 | /* Number of extra bits allowed when calculating fractional ns. | |
156 | * EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS + MAX_PPB_BITS should | |
157 | * be less than 63. | |
158 | */ | |
159 | #define PPB_EXTRA_BITS 2 | |
160 | ||
161 | /* Precalculate scale word to avoid long long division at runtime */ | |
162 | #define PPB_SCALE_WORD ((1LL << (PPB_EXTRA_BITS + MC_CMD_PTP_IN_ADJUST_BITS +\ | |
163 | MAX_PPB_BITS)) / 1000000000LL) | |
164 | ||
165 | #define PTP_SYNC_ATTEMPTS 4 | |
166 | ||
167 | /** | |
168 | * struct efx_ptp_match - Matching structure, stored in sk_buff's cb area. | |
169 | * @words: UUID and (partial) sequence number | |
170 | * @expiry: Time after which the packet should be delivered irrespective of | |
171 | * event arrival. | |
172 | * @state: The state of the packet - whether it is ready for processing or | |
173 | * whether that is of no interest. | |
174 | */ | |
175 | struct efx_ptp_match { | |
176 | u32 words[DIV_ROUND_UP(PTP_V1_UUID_LENGTH, 4)]; | |
177 | unsigned long expiry; | |
178 | enum ptp_packet_state state; | |
179 | }; | |
180 | ||
181 | /** | |
182 | * struct efx_ptp_event_rx - A PTP receive event (from MC) | |
183 | * @seq0: First part of (PTP) UUID | |
184 | * @seq1: Second part of (PTP) UUID and sequence number | |
185 | * @hwtimestamp: Event timestamp | |
186 | */ | |
187 | struct efx_ptp_event_rx { | |
188 | struct list_head link; | |
189 | u32 seq0; | |
190 | u32 seq1; | |
191 | ktime_t hwtimestamp; | |
192 | unsigned long expiry; | |
193 | }; | |
194 | ||
195 | /** | |
196 | * struct efx_ptp_timeset - Synchronisation between host and MC | |
197 | * @host_start: Host time immediately before hardware timestamp taken | |
198 | * @seconds: Hardware timestamp, seconds | |
199 | * @nanoseconds: Hardware timestamp, nanoseconds | |
200 | * @host_end: Host time immediately after hardware timestamp taken | |
201 | * @waitns: Number of nanoseconds between hardware timestamp being read and | |
202 | * host end time being seen | |
203 | * @window: Difference of host_end and host_start | |
204 | * @valid: Whether this timeset is valid | |
205 | */ | |
206 | struct efx_ptp_timeset { | |
207 | u32 host_start; | |
208 | u32 seconds; | |
209 | u32 nanoseconds; | |
210 | u32 host_end; | |
211 | u32 waitns; | |
212 | u32 window; /* Derived: end - start, allowing for wrap */ | |
213 | }; | |
214 | ||
215 | /** | |
216 | * struct efx_ptp_data - Precision Time Protocol (PTP) state | |
ac36baf8 BH |
217 | * @efx: The NIC context |
218 | * @channel: The PTP channel (Siena only) | |
7c236c43 SH |
219 | * @rxq: Receive queue (awaiting timestamps) |
220 | * @txq: Transmit queue | |
221 | * @evt_list: List of MC receive events awaiting packets | |
222 | * @evt_free_list: List of free events | |
223 | * @evt_lock: Lock for manipulating evt_list and evt_free_list | |
f3211600 | 224 | * @evt_overflow: Boolean indicating that event list has overflowed |
7c236c43 SH |
225 | * @rx_evts: Instantiated events (on evt_list and evt_free_list) |
226 | * @workwq: Work queue for processing pending PTP operations | |
227 | * @work: Work task | |
228 | * @reset_required: A serious error has occurred and the PTP task needs to be | |
229 | * reset (disable, enable). | |
230 | * @rxfilter_event: Receive filter when operating | |
231 | * @rxfilter_general: Receive filter when operating | |
232 | * @config: Current timestamp configuration | |
233 | * @enabled: PTP operation enabled | |
234 | * @mode: Mode in which PTP operating (PTP version) | |
235 | * @evt_frags: Partly assembled PTP events | |
236 | * @evt_frag_idx: Current fragment number | |
237 | * @evt_code: Last event code | |
238 | * @start: Address at which MC indicates ready for synchronisation | |
239 | * @host_time_pps: Host time at last PPS | |
7c236c43 SH |
240 | * @current_adjfreq: Current ppb adjustment. |
241 | * @phc_clock: Pointer to registered phc device | |
242 | * @phc_clock_info: Registration structure for phc device | |
243 | * @pps_work: pps work task for handling pps events | |
244 | * @pps_workwq: pps work queue | |
245 | * @nic_ts_enabled: Flag indicating if NIC generated TS events are handled | |
246 | * @txbuf: Buffer for use when transmitting (PTP) packets to MC (avoids | |
247 | * allocations in main data path). | |
7c236c43 SH |
248 | * @timeset: Last set of synchronisation statistics. |
249 | */ | |
250 | struct efx_ptp_data { | |
ac36baf8 | 251 | struct efx_nic *efx; |
7c236c43 SH |
252 | struct efx_channel *channel; |
253 | struct sk_buff_head rxq; | |
254 | struct sk_buff_head txq; | |
255 | struct list_head evt_list; | |
256 | struct list_head evt_free_list; | |
257 | spinlock_t evt_lock; | |
f3211600 | 258 | bool evt_overflow; |
7c236c43 SH |
259 | struct efx_ptp_event_rx rx_evts[MAX_RECEIVE_EVENTS]; |
260 | struct workqueue_struct *workwq; | |
261 | struct work_struct work; | |
262 | bool reset_required; | |
263 | u32 rxfilter_event; | |
264 | u32 rxfilter_general; | |
265 | bool rxfilter_installed; | |
266 | struct hwtstamp_config config; | |
267 | bool enabled; | |
268 | unsigned int mode; | |
269 | efx_qword_t evt_frags[MAX_EVENT_FRAGS]; | |
270 | int evt_frag_idx; | |
271 | int evt_code; | |
272 | struct efx_buffer start; | |
273 | struct pps_event_time host_time_pps; | |
7c236c43 SH |
274 | s64 current_adjfreq; |
275 | struct ptp_clock *phc_clock; | |
276 | struct ptp_clock_info phc_clock_info; | |
277 | struct work_struct pps_work; | |
278 | struct workqueue_struct *pps_workwq; | |
279 | bool nic_ts_enabled; | |
c5bb0e98 | 280 | MCDI_DECLARE_BUF(txbuf, MC_CMD_PTP_IN_TRANSMIT_LENMAX); |
7c236c43 SH |
281 | struct efx_ptp_timeset |
282 | timeset[MC_CMD_PTP_OUT_SYNCHRONIZE_TIMESET_MAXNUM]; | |
283 | }; | |
284 | ||
285 | static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta); | |
286 | static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta); | |
287 | static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts); | |
288 | static int efx_phc_settime(struct ptp_clock_info *ptp, | |
289 | const struct timespec *e_ts); | |
290 | static int efx_phc_enable(struct ptp_clock_info *ptp, | |
291 | struct ptp_clock_request *request, int on); | |
292 | ||
293 | /* Enable MCDI PTP support. */ | |
294 | static int efx_ptp_enable(struct efx_nic *efx) | |
295 | { | |
59cfc479 | 296 | MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ENABLE_LEN); |
1e0b8120 EC |
297 | MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, 0); |
298 | int rc; | |
7c236c43 SH |
299 | |
300 | MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ENABLE); | |
c1d828bd | 301 | MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); |
7c236c43 | 302 | MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_QUEUE, |
ac36baf8 BH |
303 | efx->ptp_data->channel ? |
304 | efx->ptp_data->channel->channel : 0); | |
7c236c43 SH |
305 | MCDI_SET_DWORD(inbuf, PTP_IN_ENABLE_MODE, efx->ptp_data->mode); |
306 | ||
1e0b8120 EC |
307 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), |
308 | outbuf, sizeof(outbuf), NULL); | |
309 | rc = (rc == -EALREADY) ? 0 : rc; | |
310 | if (rc) | |
311 | efx_mcdi_display_error(efx, MC_CMD_PTP, | |
312 | MC_CMD_PTP_IN_ENABLE_LEN, | |
313 | outbuf, sizeof(outbuf), rc); | |
314 | return rc; | |
7c236c43 SH |
315 | } |
316 | ||
317 | /* Disable MCDI PTP support. | |
318 | * | |
319 | * Note that this function should never rely on the presence of ptp_data - | |
320 | * may be called before that exists. | |
321 | */ | |
322 | static int efx_ptp_disable(struct efx_nic *efx) | |
323 | { | |
59cfc479 | 324 | MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_DISABLE_LEN); |
1e0b8120 EC |
325 | MCDI_DECLARE_BUF_OUT_OR_ERR(outbuf, 0); |
326 | int rc; | |
7c236c43 SH |
327 | |
328 | MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_DISABLE); | |
c1d828bd | 329 | MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); |
1e0b8120 EC |
330 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), |
331 | outbuf, sizeof(outbuf), NULL); | |
332 | rc = (rc == -EALREADY) ? 0 : rc; | |
333 | if (rc) | |
334 | efx_mcdi_display_error(efx, MC_CMD_PTP, | |
335 | MC_CMD_PTP_IN_DISABLE_LEN, | |
336 | outbuf, sizeof(outbuf), rc); | |
337 | return rc; | |
7c236c43 SH |
338 | } |
339 | ||
340 | static void efx_ptp_deliver_rx_queue(struct sk_buff_head *q) | |
341 | { | |
342 | struct sk_buff *skb; | |
343 | ||
344 | while ((skb = skb_dequeue(q))) { | |
345 | local_bh_disable(); | |
346 | netif_receive_skb(skb); | |
347 | local_bh_enable(); | |
348 | } | |
349 | } | |
350 | ||
351 | static void efx_ptp_handle_no_channel(struct efx_nic *efx) | |
352 | { | |
353 | netif_err(efx, drv, efx->net_dev, | |
354 | "ERROR: PTP requires MSI-X and 1 additional interrupt" | |
355 | "vector. PTP disabled\n"); | |
356 | } | |
357 | ||
358 | /* Repeatedly send the host time to the MC which will capture the hardware | |
359 | * time. | |
360 | */ | |
361 | static void efx_ptp_send_times(struct efx_nic *efx, | |
362 | struct pps_event_time *last_time) | |
363 | { | |
364 | struct pps_event_time now; | |
365 | struct timespec limit; | |
366 | struct efx_ptp_data *ptp = efx->ptp_data; | |
367 | struct timespec start; | |
368 | int *mc_running = ptp->start.addr; | |
369 | ||
370 | pps_get_ts(&now); | |
371 | start = now.ts_real; | |
372 | limit = now.ts_real; | |
373 | timespec_add_ns(&limit, SYNCHRONISE_PERIOD_NS); | |
374 | ||
375 | /* Write host time for specified period or until MC is done */ | |
376 | while ((timespec_compare(&now.ts_real, &limit) < 0) && | |
377 | ACCESS_ONCE(*mc_running)) { | |
378 | struct timespec update_time; | |
379 | unsigned int host_time; | |
380 | ||
381 | /* Don't update continuously to avoid saturating the PCIe bus */ | |
382 | update_time = now.ts_real; | |
383 | timespec_add_ns(&update_time, SYNCHRONISATION_GRANULARITY_NS); | |
384 | do { | |
385 | pps_get_ts(&now); | |
386 | } while ((timespec_compare(&now.ts_real, &update_time) < 0) && | |
387 | ACCESS_ONCE(*mc_running)); | |
388 | ||
389 | /* Synchronise NIC with single word of time only */ | |
390 | host_time = (now.ts_real.tv_sec << MC_NANOSECOND_BITS | | |
391 | now.ts_real.tv_nsec); | |
392 | /* Update host time in NIC memory */ | |
977a5d5d | 393 | efx->type->ptp_write_host_time(efx, host_time); |
7c236c43 SH |
394 | } |
395 | *last_time = now; | |
396 | } | |
397 | ||
398 | /* Read a timeset from the MC's results and partial process. */ | |
c5bb0e98 BH |
399 | static void efx_ptp_read_timeset(MCDI_DECLARE_STRUCT_PTR(data), |
400 | struct efx_ptp_timeset *timeset) | |
7c236c43 SH |
401 | { |
402 | unsigned start_ns, end_ns; | |
403 | ||
404 | timeset->host_start = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTSTART); | |
405 | timeset->seconds = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_SECONDS); | |
406 | timeset->nanoseconds = MCDI_DWORD(data, | |
407 | PTP_OUT_SYNCHRONIZE_NANOSECONDS); | |
408 | timeset->host_end = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_HOSTEND), | |
409 | timeset->waitns = MCDI_DWORD(data, PTP_OUT_SYNCHRONIZE_WAITNS); | |
410 | ||
411 | /* Ignore seconds */ | |
412 | start_ns = timeset->host_start & MC_NANOSECOND_MASK; | |
413 | end_ns = timeset->host_end & MC_NANOSECOND_MASK; | |
414 | /* Allow for rollover */ | |
415 | if (end_ns < start_ns) | |
416 | end_ns += NSEC_PER_SEC; | |
417 | /* Determine duration of operation */ | |
418 | timeset->window = end_ns - start_ns; | |
419 | } | |
420 | ||
421 | /* Process times received from MC. | |
422 | * | |
423 | * Extract times from returned results, and establish the minimum value | |
424 | * seen. The minimum value represents the "best" possible time and events | |
425 | * too much greater than this are rejected - the machine is, perhaps, too | |
426 | * busy. A number of readings are taken so that, hopefully, at least one good | |
427 | * synchronisation will be seen in the results. | |
428 | */ | |
c5bb0e98 BH |
429 | static int |
430 | efx_ptp_process_times(struct efx_nic *efx, MCDI_DECLARE_STRUCT_PTR(synch_buf), | |
431 | size_t response_length, | |
432 | const struct pps_event_time *last_time) | |
7c236c43 | 433 | { |
c5bb0e98 BH |
434 | unsigned number_readings = |
435 | MCDI_VAR_ARRAY_LEN(response_length, | |
436 | PTP_OUT_SYNCHRONIZE_TIMESET); | |
7c236c43 | 437 | unsigned i; |
7c236c43 SH |
438 | unsigned ngood = 0; |
439 | unsigned last_good = 0; | |
440 | struct efx_ptp_data *ptp = efx->ptp_data; | |
7c236c43 SH |
441 | u32 last_sec; |
442 | u32 start_sec; | |
443 | struct timespec delta; | |
444 | ||
445 | if (number_readings == 0) | |
446 | return -EAGAIN; | |
447 | ||
dfd8d581 LE |
448 | /* Read the set of results and find the last good host-MC |
449 | * synchronization result. The MC times when it finishes reading the | |
450 | * host time so the corrected window time should be fairly constant | |
451 | * for a given platform. | |
7c236c43 SH |
452 | */ |
453 | for (i = 0; i < number_readings; i++) { | |
dfd8d581 LE |
454 | s32 window, corrected; |
455 | ||
c5bb0e98 BH |
456 | efx_ptp_read_timeset( |
457 | MCDI_ARRAY_STRUCT_PTR(synch_buf, | |
458 | PTP_OUT_SYNCHRONIZE_TIMESET, i), | |
459 | &ptp->timeset[i]); | |
7c236c43 | 460 | |
dfd8d581 LE |
461 | window = ptp->timeset[i].window; |
462 | corrected = window - ptp->timeset[i].waitns; | |
463 | ||
464 | /* We expect the uncorrected synchronization window to be at | |
465 | * least as large as the interval between host start and end | |
466 | * times. If it is smaller than this then this is mostly likely | |
467 | * to be a consequence of the host's time being adjusted. | |
468 | * Check that the corrected sync window is in a reasonable | |
469 | * range. If it is out of range it is likely to be because an | |
470 | * interrupt or other delay occurred between reading the system | |
471 | * time and writing it to MC memory. | |
472 | */ | |
473 | if (window >= SYNCHRONISATION_GRANULARITY_NS && | |
474 | corrected < MAX_SYNCHRONISATION_NS && | |
475 | corrected >= MIN_SYNCHRONISATION_NS) { | |
476 | ngood++; | |
477 | last_good = i; | |
7c236c43 | 478 | } |
dfd8d581 | 479 | } |
7c236c43 SH |
480 | |
481 | if (ngood == 0) { | |
482 | netif_warn(efx, drv, efx->net_dev, | |
94cd60d0 | 483 | "PTP no suitable synchronisations\n"); |
7c236c43 SH |
484 | return -EAGAIN; |
485 | } | |
486 | ||
7c236c43 SH |
487 | /* Calculate delay from actual PPS to last_time */ |
488 | delta.tv_nsec = | |
489 | ptp->timeset[last_good].nanoseconds + | |
490 | last_time->ts_real.tv_nsec - | |
491 | (ptp->timeset[last_good].host_start & MC_NANOSECOND_MASK); | |
492 | ||
493 | /* It is possible that the seconds rolled over between taking | |
494 | * the start reading and the last value written by the host. The | |
495 | * timescales are such that a gap of more than one second is never | |
496 | * expected. | |
497 | */ | |
498 | start_sec = ptp->timeset[last_good].host_start >> MC_NANOSECOND_BITS; | |
499 | last_sec = last_time->ts_real.tv_sec & MC_SECOND_MASK; | |
500 | if (start_sec != last_sec) { | |
501 | if (((start_sec + 1) & MC_SECOND_MASK) != last_sec) { | |
502 | netif_warn(efx, hw, efx->net_dev, | |
503 | "PTP bad synchronisation seconds\n"); | |
504 | return -EAGAIN; | |
505 | } else { | |
506 | delta.tv_sec = 1; | |
507 | } | |
508 | } else { | |
509 | delta.tv_sec = 0; | |
510 | } | |
511 | ||
512 | ptp->host_time_pps = *last_time; | |
513 | pps_sub_ts(&ptp->host_time_pps, delta); | |
514 | ||
515 | return 0; | |
516 | } | |
517 | ||
518 | /* Synchronize times between the host and the MC */ | |
519 | static int efx_ptp_synchronize(struct efx_nic *efx, unsigned int num_readings) | |
520 | { | |
521 | struct efx_ptp_data *ptp = efx->ptp_data; | |
59cfc479 | 522 | MCDI_DECLARE_BUF(synch_buf, MC_CMD_PTP_OUT_SYNCHRONIZE_LENMAX); |
7c236c43 SH |
523 | size_t response_length; |
524 | int rc; | |
525 | unsigned long timeout; | |
526 | struct pps_event_time last_time = {}; | |
527 | unsigned int loops = 0; | |
528 | int *start = ptp->start.addr; | |
529 | ||
530 | MCDI_SET_DWORD(synch_buf, PTP_IN_OP, MC_CMD_PTP_OP_SYNCHRONIZE); | |
c1d828bd | 531 | MCDI_SET_DWORD(synch_buf, PTP_IN_PERIPH_ID, 0); |
7c236c43 SH |
532 | MCDI_SET_DWORD(synch_buf, PTP_IN_SYNCHRONIZE_NUMTIMESETS, |
533 | num_readings); | |
338f74df BH |
534 | MCDI_SET_QWORD(synch_buf, PTP_IN_SYNCHRONIZE_START_ADDR, |
535 | ptp->start.dma_addr); | |
7c236c43 SH |
536 | |
537 | /* Clear flag that signals MC ready */ | |
538 | ACCESS_ONCE(*start) = 0; | |
df2cd8af BH |
539 | rc = efx_mcdi_rpc_start(efx, MC_CMD_PTP, synch_buf, |
540 | MC_CMD_PTP_IN_SYNCHRONIZE_LEN); | |
541 | EFX_BUG_ON_PARANOID(rc); | |
7c236c43 SH |
542 | |
543 | /* Wait for start from MCDI (or timeout) */ | |
544 | timeout = jiffies + msecs_to_jiffies(MAX_SYNCHRONISE_WAIT_MS); | |
545 | while (!ACCESS_ONCE(*start) && (time_before(jiffies, timeout))) { | |
546 | udelay(20); /* Usually start MCDI execution quickly */ | |
547 | loops++; | |
548 | } | |
549 | ||
550 | if (ACCESS_ONCE(*start)) | |
551 | efx_ptp_send_times(efx, &last_time); | |
552 | ||
553 | /* Collect results */ | |
554 | rc = efx_mcdi_rpc_finish(efx, MC_CMD_PTP, | |
555 | MC_CMD_PTP_IN_SYNCHRONIZE_LEN, | |
556 | synch_buf, sizeof(synch_buf), | |
557 | &response_length); | |
558 | if (rc == 0) | |
559 | rc = efx_ptp_process_times(efx, synch_buf, response_length, | |
560 | &last_time); | |
561 | ||
562 | return rc; | |
563 | } | |
564 | ||
565 | /* Transmit a PTP packet, via the MCDI interface, to the wire. */ | |
566 | static int efx_ptp_xmit_skb(struct efx_nic *efx, struct sk_buff *skb) | |
567 | { | |
c5bb0e98 | 568 | struct efx_ptp_data *ptp_data = efx->ptp_data; |
7c236c43 SH |
569 | struct skb_shared_hwtstamps timestamps; |
570 | int rc = -EIO; | |
59cfc479 | 571 | MCDI_DECLARE_BUF(txtime, MC_CMD_PTP_OUT_TRANSMIT_LEN); |
9528b921 | 572 | size_t len; |
7c236c43 | 573 | |
c5bb0e98 | 574 | MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_OP, MC_CMD_PTP_OP_TRANSMIT); |
c1d828bd | 575 | MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_PERIPH_ID, 0); |
c5bb0e98 | 576 | MCDI_SET_DWORD(ptp_data->txbuf, PTP_IN_TRANSMIT_LENGTH, skb->len); |
7c236c43 SH |
577 | if (skb_shinfo(skb)->nr_frags != 0) { |
578 | rc = skb_linearize(skb); | |
579 | if (rc != 0) | |
580 | goto fail; | |
581 | } | |
582 | ||
583 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
584 | rc = skb_checksum_help(skb); | |
585 | if (rc != 0) | |
586 | goto fail; | |
587 | } | |
588 | skb_copy_from_linear_data(skb, | |
c5bb0e98 BH |
589 | MCDI_PTR(ptp_data->txbuf, |
590 | PTP_IN_TRANSMIT_PACKET), | |
9528b921 BH |
591 | skb->len); |
592 | rc = efx_mcdi_rpc(efx, MC_CMD_PTP, | |
593 | ptp_data->txbuf, MC_CMD_PTP_IN_TRANSMIT_LEN(skb->len), | |
594 | txtime, sizeof(txtime), &len); | |
7c236c43 SH |
595 | if (rc != 0) |
596 | goto fail; | |
597 | ||
598 | memset(×tamps, 0, sizeof(timestamps)); | |
599 | timestamps.hwtstamp = ktime_set( | |
600 | MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_SECONDS), | |
601 | MCDI_DWORD(txtime, PTP_OUT_TRANSMIT_NANOSECONDS)); | |
602 | ||
603 | skb_tstamp_tx(skb, ×tamps); | |
604 | ||
605 | rc = 0; | |
606 | ||
607 | fail: | |
608 | dev_kfree_skb(skb); | |
609 | ||
610 | return rc; | |
611 | } | |
612 | ||
613 | static void efx_ptp_drop_time_expired_events(struct efx_nic *efx) | |
614 | { | |
615 | struct efx_ptp_data *ptp = efx->ptp_data; | |
616 | struct list_head *cursor; | |
617 | struct list_head *next; | |
618 | ||
619 | /* Drop time-expired events */ | |
620 | spin_lock_bh(&ptp->evt_lock); | |
621 | if (!list_empty(&ptp->evt_list)) { | |
622 | list_for_each_safe(cursor, next, &ptp->evt_list) { | |
623 | struct efx_ptp_event_rx *evt; | |
624 | ||
625 | evt = list_entry(cursor, struct efx_ptp_event_rx, | |
626 | link); | |
627 | if (time_after(jiffies, evt->expiry)) { | |
9545f4e2 | 628 | list_move(&evt->link, &ptp->evt_free_list); |
7c236c43 SH |
629 | netif_warn(efx, hw, efx->net_dev, |
630 | "PTP rx event dropped\n"); | |
631 | } | |
632 | } | |
633 | } | |
f3211600 LE |
634 | /* If the event overflow flag is set and the event list is now empty |
635 | * clear the flag to re-enable the overflow warning message. | |
636 | */ | |
637 | if (ptp->evt_overflow && list_empty(&ptp->evt_list)) | |
638 | ptp->evt_overflow = false; | |
7c236c43 SH |
639 | spin_unlock_bh(&ptp->evt_lock); |
640 | } | |
641 | ||
642 | static enum ptp_packet_state efx_ptp_match_rx(struct efx_nic *efx, | |
643 | struct sk_buff *skb) | |
644 | { | |
645 | struct efx_ptp_data *ptp = efx->ptp_data; | |
646 | bool evts_waiting; | |
647 | struct list_head *cursor; | |
648 | struct list_head *next; | |
649 | struct efx_ptp_match *match; | |
650 | enum ptp_packet_state rc = PTP_PACKET_STATE_UNMATCHED; | |
651 | ||
652 | spin_lock_bh(&ptp->evt_lock); | |
653 | evts_waiting = !list_empty(&ptp->evt_list); | |
654 | spin_unlock_bh(&ptp->evt_lock); | |
655 | ||
656 | if (!evts_waiting) | |
657 | return PTP_PACKET_STATE_UNMATCHED; | |
658 | ||
659 | match = (struct efx_ptp_match *)skb->cb; | |
660 | /* Look for a matching timestamp in the event queue */ | |
661 | spin_lock_bh(&ptp->evt_lock); | |
662 | list_for_each_safe(cursor, next, &ptp->evt_list) { | |
663 | struct efx_ptp_event_rx *evt; | |
664 | ||
665 | evt = list_entry(cursor, struct efx_ptp_event_rx, link); | |
666 | if ((evt->seq0 == match->words[0]) && | |
667 | (evt->seq1 == match->words[1])) { | |
668 | struct skb_shared_hwtstamps *timestamps; | |
669 | ||
670 | /* Match - add in hardware timestamp */ | |
671 | timestamps = skb_hwtstamps(skb); | |
672 | timestamps->hwtstamp = evt->hwtimestamp; | |
673 | ||
674 | match->state = PTP_PACKET_STATE_MATCHED; | |
675 | rc = PTP_PACKET_STATE_MATCHED; | |
9545f4e2 | 676 | list_move(&evt->link, &ptp->evt_free_list); |
7c236c43 SH |
677 | break; |
678 | } | |
679 | } | |
f3211600 LE |
680 | /* If the event overflow flag is set and the event list is now empty |
681 | * clear the flag to re-enable the overflow warning message. | |
682 | */ | |
683 | if (ptp->evt_overflow && list_empty(&ptp->evt_list)) | |
684 | ptp->evt_overflow = false; | |
7c236c43 SH |
685 | spin_unlock_bh(&ptp->evt_lock); |
686 | ||
687 | return rc; | |
688 | } | |
689 | ||
690 | /* Process any queued receive events and corresponding packets | |
691 | * | |
692 | * q is returned with all the packets that are ready for delivery. | |
693 | * true is returned if at least one of those packets requires | |
694 | * synchronisation. | |
695 | */ | |
696 | static bool efx_ptp_process_events(struct efx_nic *efx, struct sk_buff_head *q) | |
697 | { | |
698 | struct efx_ptp_data *ptp = efx->ptp_data; | |
699 | bool rc = false; | |
700 | struct sk_buff *skb; | |
701 | ||
702 | while ((skb = skb_dequeue(&ptp->rxq))) { | |
703 | struct efx_ptp_match *match; | |
704 | ||
705 | match = (struct efx_ptp_match *)skb->cb; | |
706 | if (match->state == PTP_PACKET_STATE_MATCH_UNWANTED) { | |
707 | __skb_queue_tail(q, skb); | |
708 | } else if (efx_ptp_match_rx(efx, skb) == | |
709 | PTP_PACKET_STATE_MATCHED) { | |
710 | rc = true; | |
711 | __skb_queue_tail(q, skb); | |
712 | } else if (time_after(jiffies, match->expiry)) { | |
713 | match->state = PTP_PACKET_STATE_TIMED_OUT; | |
35f9a7a3 BH |
714 | if (net_ratelimit()) |
715 | netif_warn(efx, rx_err, efx->net_dev, | |
716 | "PTP packet - no timestamp seen\n"); | |
7c236c43 SH |
717 | __skb_queue_tail(q, skb); |
718 | } else { | |
719 | /* Replace unprocessed entry and stop */ | |
720 | skb_queue_head(&ptp->rxq, skb); | |
721 | break; | |
722 | } | |
723 | } | |
724 | ||
725 | return rc; | |
726 | } | |
727 | ||
728 | /* Complete processing of a received packet */ | |
729 | static inline void efx_ptp_process_rx(struct efx_nic *efx, struct sk_buff *skb) | |
730 | { | |
731 | local_bh_disable(); | |
732 | netif_receive_skb(skb); | |
733 | local_bh_enable(); | |
734 | } | |
735 | ||
62a1c703 BH |
736 | static void efx_ptp_remove_multicast_filters(struct efx_nic *efx) |
737 | { | |
738 | struct efx_ptp_data *ptp = efx->ptp_data; | |
739 | ||
740 | if (ptp->rxfilter_installed) { | |
741 | efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, | |
742 | ptp->rxfilter_general); | |
743 | efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, | |
744 | ptp->rxfilter_event); | |
745 | ptp->rxfilter_installed = false; | |
746 | } | |
747 | } | |
748 | ||
749 | static int efx_ptp_insert_multicast_filters(struct efx_nic *efx) | |
7c236c43 SH |
750 | { |
751 | struct efx_ptp_data *ptp = efx->ptp_data; | |
752 | struct efx_filter_spec rxfilter; | |
753 | int rc; | |
754 | ||
ac36baf8 | 755 | if (!ptp->channel || ptp->rxfilter_installed) |
62a1c703 | 756 | return 0; |
7c236c43 SH |
757 | |
758 | /* Must filter on both event and general ports to ensure | |
759 | * that there is no packet re-ordering. | |
760 | */ | |
761 | efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0, | |
762 | efx_rx_queue_index( | |
763 | efx_channel_get_rx_queue(ptp->channel))); | |
764 | rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP, | |
765 | htonl(PTP_ADDRESS), | |
766 | htons(PTP_EVENT_PORT)); | |
767 | if (rc != 0) | |
768 | return rc; | |
769 | ||
770 | rc = efx_filter_insert_filter(efx, &rxfilter, true); | |
771 | if (rc < 0) | |
772 | return rc; | |
773 | ptp->rxfilter_event = rc; | |
774 | ||
775 | efx_filter_init_rx(&rxfilter, EFX_FILTER_PRI_REQUIRED, 0, | |
776 | efx_rx_queue_index( | |
777 | efx_channel_get_rx_queue(ptp->channel))); | |
778 | rc = efx_filter_set_ipv4_local(&rxfilter, IPPROTO_UDP, | |
779 | htonl(PTP_ADDRESS), | |
780 | htons(PTP_GENERAL_PORT)); | |
781 | if (rc != 0) | |
782 | goto fail; | |
783 | ||
784 | rc = efx_filter_insert_filter(efx, &rxfilter, true); | |
785 | if (rc < 0) | |
786 | goto fail; | |
787 | ptp->rxfilter_general = rc; | |
788 | ||
62a1c703 BH |
789 | ptp->rxfilter_installed = true; |
790 | return 0; | |
791 | ||
792 | fail: | |
793 | efx_filter_remove_id_safe(efx, EFX_FILTER_PRI_REQUIRED, | |
794 | ptp->rxfilter_event); | |
795 | return rc; | |
796 | } | |
797 | ||
798 | static int efx_ptp_start(struct efx_nic *efx) | |
799 | { | |
800 | struct efx_ptp_data *ptp = efx->ptp_data; | |
801 | int rc; | |
802 | ||
803 | ptp->reset_required = false; | |
804 | ||
805 | rc = efx_ptp_insert_multicast_filters(efx); | |
806 | if (rc) | |
807 | return rc; | |
808 | ||
7c236c43 SH |
809 | rc = efx_ptp_enable(efx); |
810 | if (rc != 0) | |
62a1c703 | 811 | goto fail; |
7c236c43 SH |
812 | |
813 | ptp->evt_frag_idx = 0; | |
814 | ptp->current_adjfreq = 0; | |
7c236c43 SH |
815 | |
816 | return 0; | |
817 | ||
7c236c43 | 818 | fail: |
62a1c703 | 819 | efx_ptp_remove_multicast_filters(efx); |
7c236c43 SH |
820 | return rc; |
821 | } | |
822 | ||
823 | static int efx_ptp_stop(struct efx_nic *efx) | |
824 | { | |
825 | struct efx_ptp_data *ptp = efx->ptp_data; | |
7c236c43 SH |
826 | struct list_head *cursor; |
827 | struct list_head *next; | |
2ea4dc28 AR |
828 | int rc; |
829 | ||
830 | if (ptp == NULL) | |
831 | return 0; | |
832 | ||
833 | rc = efx_ptp_disable(efx); | |
7c236c43 | 834 | |
62a1c703 | 835 | efx_ptp_remove_multicast_filters(efx); |
7c236c43 SH |
836 | |
837 | /* Make sure RX packets are really delivered */ | |
838 | efx_ptp_deliver_rx_queue(&efx->ptp_data->rxq); | |
839 | skb_queue_purge(&efx->ptp_data->txq); | |
840 | ||
841 | /* Drop any pending receive events */ | |
842 | spin_lock_bh(&efx->ptp_data->evt_lock); | |
843 | list_for_each_safe(cursor, next, &efx->ptp_data->evt_list) { | |
9545f4e2 | 844 | list_move(cursor, &efx->ptp_data->evt_free_list); |
7c236c43 | 845 | } |
f3211600 | 846 | ptp->evt_overflow = false; |
7c236c43 SH |
847 | spin_unlock_bh(&efx->ptp_data->evt_lock); |
848 | ||
849 | return rc; | |
850 | } | |
851 | ||
2ea4dc28 AR |
852 | static int efx_ptp_restart(struct efx_nic *efx) |
853 | { | |
854 | if (efx->ptp_data && efx->ptp_data->enabled) | |
855 | return efx_ptp_start(efx); | |
856 | return 0; | |
857 | } | |
858 | ||
7c236c43 SH |
859 | static void efx_ptp_pps_worker(struct work_struct *work) |
860 | { | |
861 | struct efx_ptp_data *ptp = | |
862 | container_of(work, struct efx_ptp_data, pps_work); | |
ac36baf8 | 863 | struct efx_nic *efx = ptp->efx; |
7c236c43 SH |
864 | struct ptp_clock_event ptp_evt; |
865 | ||
866 | if (efx_ptp_synchronize(efx, PTP_SYNC_ATTEMPTS)) | |
867 | return; | |
868 | ||
869 | ptp_evt.type = PTP_CLOCK_PPSUSR; | |
870 | ptp_evt.pps_times = ptp->host_time_pps; | |
871 | ptp_clock_event(ptp->phc_clock, &ptp_evt); | |
872 | } | |
873 | ||
874 | /* Process any pending transmissions and timestamp any received packets. | |
875 | */ | |
876 | static void efx_ptp_worker(struct work_struct *work) | |
877 | { | |
878 | struct efx_ptp_data *ptp_data = | |
879 | container_of(work, struct efx_ptp_data, work); | |
ac36baf8 | 880 | struct efx_nic *efx = ptp_data->efx; |
7c236c43 SH |
881 | struct sk_buff *skb; |
882 | struct sk_buff_head tempq; | |
883 | ||
884 | if (ptp_data->reset_required) { | |
885 | efx_ptp_stop(efx); | |
886 | efx_ptp_start(efx); | |
887 | return; | |
888 | } | |
889 | ||
890 | efx_ptp_drop_time_expired_events(efx); | |
891 | ||
892 | __skb_queue_head_init(&tempq); | |
893 | if (efx_ptp_process_events(efx, &tempq) || | |
894 | !skb_queue_empty(&ptp_data->txq)) { | |
895 | ||
896 | while ((skb = skb_dequeue(&ptp_data->txq))) | |
897 | efx_ptp_xmit_skb(efx, skb); | |
898 | } | |
899 | ||
900 | while ((skb = __skb_dequeue(&tempq))) | |
901 | efx_ptp_process_rx(efx, skb); | |
902 | } | |
903 | ||
5d0dab01 BH |
904 | static const struct ptp_clock_info efx_phc_clock_info = { |
905 | .owner = THIS_MODULE, | |
906 | .name = "sfc", | |
907 | .max_adj = MAX_PPB, | |
908 | .n_alarm = 0, | |
909 | .n_ext_ts = 0, | |
910 | .n_per_out = 0, | |
911 | .pps = 1, | |
912 | .adjfreq = efx_phc_adjfreq, | |
913 | .adjtime = efx_phc_adjtime, | |
914 | .gettime = efx_phc_gettime, | |
915 | .settime = efx_phc_settime, | |
916 | .enable = efx_phc_enable, | |
917 | }; | |
918 | ||
ac36baf8 BH |
919 | /* Initialise PTP state. */ |
920 | int efx_ptp_probe(struct efx_nic *efx, struct efx_channel *channel) | |
7c236c43 | 921 | { |
7c236c43 SH |
922 | struct efx_ptp_data *ptp; |
923 | int rc = 0; | |
924 | unsigned int pos; | |
925 | ||
7c236c43 SH |
926 | ptp = kzalloc(sizeof(struct efx_ptp_data), GFP_KERNEL); |
927 | efx->ptp_data = ptp; | |
928 | if (!efx->ptp_data) | |
929 | return -ENOMEM; | |
930 | ||
ac36baf8 BH |
931 | ptp->efx = efx; |
932 | ptp->channel = channel; | |
933 | ||
0d19a540 | 934 | rc = efx_nic_alloc_buffer(efx, &ptp->start, sizeof(int), GFP_KERNEL); |
7c236c43 SH |
935 | if (rc != 0) |
936 | goto fail1; | |
937 | ||
7c236c43 SH |
938 | skb_queue_head_init(&ptp->rxq); |
939 | skb_queue_head_init(&ptp->txq); | |
940 | ptp->workwq = create_singlethread_workqueue("sfc_ptp"); | |
941 | if (!ptp->workwq) { | |
942 | rc = -ENOMEM; | |
943 | goto fail2; | |
944 | } | |
945 | ||
946 | INIT_WORK(&ptp->work, efx_ptp_worker); | |
947 | ptp->config.flags = 0; | |
948 | ptp->config.tx_type = HWTSTAMP_TX_OFF; | |
949 | ptp->config.rx_filter = HWTSTAMP_FILTER_NONE; | |
950 | INIT_LIST_HEAD(&ptp->evt_list); | |
951 | INIT_LIST_HEAD(&ptp->evt_free_list); | |
952 | spin_lock_init(&ptp->evt_lock); | |
953 | for (pos = 0; pos < MAX_RECEIVE_EVENTS; pos++) | |
954 | list_add(&ptp->rx_evts[pos].link, &ptp->evt_free_list); | |
f3211600 | 955 | ptp->evt_overflow = false; |
7c236c43 | 956 | |
5d0dab01 | 957 | ptp->phc_clock_info = efx_phc_clock_info; |
1ef76158 RC |
958 | ptp->phc_clock = ptp_clock_register(&ptp->phc_clock_info, |
959 | &efx->pci_dev->dev); | |
155d940a WY |
960 | if (IS_ERR(ptp->phc_clock)) { |
961 | rc = PTR_ERR(ptp->phc_clock); | |
7c236c43 | 962 | goto fail3; |
155d940a | 963 | } |
7c236c43 SH |
964 | |
965 | INIT_WORK(&ptp->pps_work, efx_ptp_pps_worker); | |
966 | ptp->pps_workwq = create_singlethread_workqueue("sfc_pps"); | |
967 | if (!ptp->pps_workwq) { | |
968 | rc = -ENOMEM; | |
969 | goto fail4; | |
970 | } | |
971 | ptp->nic_ts_enabled = false; | |
972 | ||
973 | return 0; | |
974 | fail4: | |
975 | ptp_clock_unregister(efx->ptp_data->phc_clock); | |
976 | ||
977 | fail3: | |
978 | destroy_workqueue(efx->ptp_data->workwq); | |
979 | ||
980 | fail2: | |
981 | efx_nic_free_buffer(efx, &ptp->start); | |
982 | ||
983 | fail1: | |
984 | kfree(efx->ptp_data); | |
985 | efx->ptp_data = NULL; | |
986 | ||
987 | return rc; | |
988 | } | |
989 | ||
ac36baf8 BH |
990 | /* Initialise PTP channel. |
991 | * | |
992 | * Setting core_index to zero causes the queue to be initialised and doesn't | |
993 | * overlap with 'rxq0' because ptp.c doesn't use skb_record_rx_queue. | |
994 | */ | |
995 | static int efx_ptp_probe_channel(struct efx_channel *channel) | |
7c236c43 SH |
996 | { |
997 | struct efx_nic *efx = channel->efx; | |
998 | ||
ac36baf8 BH |
999 | channel->irq_moderation = 0; |
1000 | channel->rx_queue.core_index = 0; | |
1001 | ||
1002 | return efx_ptp_probe(efx, channel); | |
1003 | } | |
1004 | ||
1005 | void efx_ptp_remove(struct efx_nic *efx) | |
1006 | { | |
7c236c43 SH |
1007 | if (!efx->ptp_data) |
1008 | return; | |
1009 | ||
ac36baf8 | 1010 | (void)efx_ptp_disable(efx); |
7c236c43 SH |
1011 | |
1012 | cancel_work_sync(&efx->ptp_data->work); | |
1013 | cancel_work_sync(&efx->ptp_data->pps_work); | |
1014 | ||
1015 | skb_queue_purge(&efx->ptp_data->rxq); | |
1016 | skb_queue_purge(&efx->ptp_data->txq); | |
1017 | ||
1018 | ptp_clock_unregister(efx->ptp_data->phc_clock); | |
1019 | ||
1020 | destroy_workqueue(efx->ptp_data->workwq); | |
1021 | destroy_workqueue(efx->ptp_data->pps_workwq); | |
1022 | ||
1023 | efx_nic_free_buffer(efx, &efx->ptp_data->start); | |
1024 | kfree(efx->ptp_data); | |
1025 | } | |
1026 | ||
ac36baf8 BH |
1027 | static void efx_ptp_remove_channel(struct efx_channel *channel) |
1028 | { | |
1029 | efx_ptp_remove(channel->efx); | |
1030 | } | |
1031 | ||
7c236c43 SH |
1032 | static void efx_ptp_get_channel_name(struct efx_channel *channel, |
1033 | char *buf, size_t len) | |
1034 | { | |
1035 | snprintf(buf, len, "%s-ptp", channel->efx->name); | |
1036 | } | |
1037 | ||
1038 | /* Determine whether this packet should be processed by the PTP module | |
1039 | * or transmitted conventionally. | |
1040 | */ | |
1041 | bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb) | |
1042 | { | |
1043 | return efx->ptp_data && | |
1044 | efx->ptp_data->enabled && | |
1045 | skb->len >= PTP_MIN_LENGTH && | |
1046 | skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM && | |
1047 | likely(skb->protocol == htons(ETH_P_IP)) && | |
e5a498e9 BH |
1048 | skb_transport_header_was_set(skb) && |
1049 | skb_network_header_len(skb) >= sizeof(struct iphdr) && | |
7c236c43 | 1050 | ip_hdr(skb)->protocol == IPPROTO_UDP && |
e5a498e9 BH |
1051 | skb_headlen(skb) >= |
1052 | skb_transport_offset(skb) + sizeof(struct udphdr) && | |
7c236c43 SH |
1053 | udp_hdr(skb)->dest == htons(PTP_EVENT_PORT); |
1054 | } | |
1055 | ||
1056 | /* Receive a PTP packet. Packets are queued until the arrival of | |
1057 | * the receive timestamp from the MC - this will probably occur after the | |
1058 | * packet arrival because of the processing in the MC. | |
1059 | */ | |
4a74dc65 | 1060 | static bool efx_ptp_rx(struct efx_channel *channel, struct sk_buff *skb) |
7c236c43 SH |
1061 | { |
1062 | struct efx_nic *efx = channel->efx; | |
1063 | struct efx_ptp_data *ptp = efx->ptp_data; | |
1064 | struct efx_ptp_match *match = (struct efx_ptp_match *)skb->cb; | |
c939a316 | 1065 | u8 *match_data_012, *match_data_345; |
7c236c43 SH |
1066 | unsigned int version; |
1067 | ||
1068 | match->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS); | |
1069 | ||
1070 | /* Correct version? */ | |
1071 | if (ptp->mode == MC_CMD_PTP_MODE_V1) { | |
97d48a10 | 1072 | if (!pskb_may_pull(skb, PTP_V1_MIN_LENGTH)) { |
4a74dc65 | 1073 | return false; |
7c236c43 SH |
1074 | } |
1075 | version = ntohs(*(__be16 *)&skb->data[PTP_V1_VERSION_OFFSET]); | |
1076 | if (version != PTP_VERSION_V1) { | |
4a74dc65 | 1077 | return false; |
7c236c43 | 1078 | } |
c939a316 LE |
1079 | |
1080 | /* PTP V1 uses all six bytes of the UUID to match the packet | |
1081 | * to the timestamp | |
1082 | */ | |
1083 | match_data_012 = skb->data + PTP_V1_UUID_OFFSET; | |
1084 | match_data_345 = skb->data + PTP_V1_UUID_OFFSET + 3; | |
7c236c43 | 1085 | } else { |
97d48a10 | 1086 | if (!pskb_may_pull(skb, PTP_V2_MIN_LENGTH)) { |
4a74dc65 | 1087 | return false; |
7c236c43 SH |
1088 | } |
1089 | version = skb->data[PTP_V2_VERSION_OFFSET]; | |
7c236c43 | 1090 | if ((version & PTP_VERSION_V2_MASK) != PTP_VERSION_V2) { |
4a74dc65 | 1091 | return false; |
7c236c43 | 1092 | } |
c939a316 LE |
1093 | |
1094 | /* The original V2 implementation uses bytes 2-7 of | |
1095 | * the UUID to match the packet to the timestamp. This | |
1096 | * discards two of the bytes of the MAC address used | |
1097 | * to create the UUID (SF bug 33070). The PTP V2 | |
1098 | * enhanced mode fixes this issue and uses bytes 0-2 | |
1099 | * and byte 5-7 of the UUID. | |
1100 | */ | |
1101 | match_data_345 = skb->data + PTP_V2_UUID_OFFSET + 5; | |
1102 | if (ptp->mode == MC_CMD_PTP_MODE_V2) { | |
1103 | match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 2; | |
1104 | } else { | |
1105 | match_data_012 = skb->data + PTP_V2_UUID_OFFSET + 0; | |
1106 | BUG_ON(ptp->mode != MC_CMD_PTP_MODE_V2_ENHANCED); | |
1107 | } | |
7c236c43 SH |
1108 | } |
1109 | ||
1110 | /* Does this packet require timestamping? */ | |
1111 | if (ntohs(*(__be16 *)&skb->data[PTP_DPORT_OFFSET]) == PTP_EVENT_PORT) { | |
1112 | struct skb_shared_hwtstamps *timestamps; | |
1113 | ||
1114 | match->state = PTP_PACKET_STATE_UNMATCHED; | |
1115 | ||
1116 | /* Clear all timestamps held: filled in later */ | |
1117 | timestamps = skb_hwtstamps(skb); | |
1118 | memset(timestamps, 0, sizeof(*timestamps)); | |
1119 | ||
c939a316 LE |
1120 | /* We expect the sequence number to be in the same position in |
1121 | * the packet for PTP V1 and V2 | |
1122 | */ | |
1123 | BUILD_BUG_ON(PTP_V1_SEQUENCE_OFFSET != PTP_V2_SEQUENCE_OFFSET); | |
1124 | BUILD_BUG_ON(PTP_V1_SEQUENCE_LENGTH != PTP_V2_SEQUENCE_LENGTH); | |
1125 | ||
7c236c43 | 1126 | /* Extract UUID/Sequence information */ |
c939a316 LE |
1127 | match->words[0] = (match_data_012[0] | |
1128 | (match_data_012[1] << 8) | | |
1129 | (match_data_012[2] << 16) | | |
1130 | (match_data_345[0] << 24)); | |
1131 | match->words[1] = (match_data_345[1] | | |
1132 | (match_data_345[2] << 8) | | |
7c236c43 SH |
1133 | (skb->data[PTP_V1_SEQUENCE_OFFSET + |
1134 | PTP_V1_SEQUENCE_LENGTH - 1] << | |
1135 | 16)); | |
1136 | } else { | |
1137 | match->state = PTP_PACKET_STATE_MATCH_UNWANTED; | |
1138 | } | |
1139 | ||
1140 | skb_queue_tail(&ptp->rxq, skb); | |
1141 | queue_work(ptp->workwq, &ptp->work); | |
4a74dc65 BH |
1142 | |
1143 | return true; | |
7c236c43 SH |
1144 | } |
1145 | ||
1146 | /* Transmit a PTP packet. This has to be transmitted by the MC | |
1147 | * itself, through an MCDI call. MCDI calls aren't permitted | |
1148 | * in the transmit path so defer the actual transmission to a suitable worker. | |
1149 | */ | |
1150 | int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb) | |
1151 | { | |
1152 | struct efx_ptp_data *ptp = efx->ptp_data; | |
1153 | ||
1154 | skb_queue_tail(&ptp->txq, skb); | |
1155 | ||
1156 | if ((udp_hdr(skb)->dest == htons(PTP_EVENT_PORT)) && | |
1157 | (skb->len <= MC_CMD_PTP_IN_TRANSMIT_PACKET_MAXNUM)) | |
1158 | efx_xmit_hwtstamp_pending(skb); | |
1159 | queue_work(ptp->workwq, &ptp->work); | |
1160 | ||
1161 | return NETDEV_TX_OK; | |
1162 | } | |
1163 | ||
1164 | static int efx_ptp_change_mode(struct efx_nic *efx, bool enable_wanted, | |
1165 | unsigned int new_mode) | |
1166 | { | |
1167 | if ((enable_wanted != efx->ptp_data->enabled) || | |
1168 | (enable_wanted && (efx->ptp_data->mode != new_mode))) { | |
2ea4dc28 | 1169 | int rc = 0; |
7c236c43 SH |
1170 | |
1171 | if (enable_wanted) { | |
1172 | /* Change of mode requires disable */ | |
1173 | if (efx->ptp_data->enabled && | |
1174 | (efx->ptp_data->mode != new_mode)) { | |
1175 | efx->ptp_data->enabled = false; | |
1176 | rc = efx_ptp_stop(efx); | |
1177 | if (rc != 0) | |
1178 | return rc; | |
1179 | } | |
1180 | ||
1181 | /* Set new operating mode and establish | |
1182 | * baseline synchronisation, which must | |
1183 | * succeed. | |
1184 | */ | |
1185 | efx->ptp_data->mode = new_mode; | |
2ea4dc28 AR |
1186 | if (netif_running(efx->net_dev)) |
1187 | rc = efx_ptp_start(efx); | |
7c236c43 SH |
1188 | if (rc == 0) { |
1189 | rc = efx_ptp_synchronize(efx, | |
1190 | PTP_SYNC_ATTEMPTS * 2); | |
1191 | if (rc != 0) | |
1192 | efx_ptp_stop(efx); | |
1193 | } | |
1194 | } else { | |
1195 | rc = efx_ptp_stop(efx); | |
1196 | } | |
1197 | ||
1198 | if (rc != 0) | |
1199 | return rc; | |
1200 | ||
1201 | efx->ptp_data->enabled = enable_wanted; | |
1202 | } | |
1203 | ||
1204 | return 0; | |
1205 | } | |
1206 | ||
1207 | static int efx_ptp_ts_init(struct efx_nic *efx, struct hwtstamp_config *init) | |
1208 | { | |
1209 | bool enable_wanted = false; | |
1210 | unsigned int new_mode; | |
1211 | int rc; | |
1212 | ||
1213 | if (init->flags) | |
1214 | return -EINVAL; | |
1215 | ||
1216 | if ((init->tx_type != HWTSTAMP_TX_OFF) && | |
1217 | (init->tx_type != HWTSTAMP_TX_ON)) | |
1218 | return -ERANGE; | |
1219 | ||
1220 | new_mode = efx->ptp_data->mode; | |
1221 | /* Determine whether any PTP HW operations are required */ | |
1222 | switch (init->rx_filter) { | |
1223 | case HWTSTAMP_FILTER_NONE: | |
1224 | break; | |
1225 | case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: | |
1226 | case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: | |
1227 | case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: | |
1228 | init->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; | |
1229 | new_mode = MC_CMD_PTP_MODE_V1; | |
1230 | enable_wanted = true; | |
1231 | break; | |
1232 | case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: | |
1233 | case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: | |
1234 | case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: | |
1235 | /* Although these three are accepted only IPV4 packets will be | |
1236 | * timestamped | |
1237 | */ | |
1238 | init->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; | |
c939a316 | 1239 | new_mode = MC_CMD_PTP_MODE_V2_ENHANCED; |
7c236c43 SH |
1240 | enable_wanted = true; |
1241 | break; | |
1242 | case HWTSTAMP_FILTER_PTP_V2_EVENT: | |
1243 | case HWTSTAMP_FILTER_PTP_V2_SYNC: | |
1244 | case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: | |
1245 | case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: | |
1246 | case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: | |
1247 | case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: | |
1248 | /* Non-IP + IPv6 timestamping not supported */ | |
1249 | return -ERANGE; | |
1250 | break; | |
1251 | default: | |
1252 | return -ERANGE; | |
1253 | } | |
1254 | ||
1255 | if (init->tx_type != HWTSTAMP_TX_OFF) | |
1256 | enable_wanted = true; | |
1257 | ||
c939a316 LE |
1258 | /* Old versions of the firmware do not support the improved |
1259 | * UUID filtering option (SF bug 33070). If the firmware does | |
1260 | * not accept the enhanced mode, fall back to the standard PTP | |
1261 | * v2 UUID filtering. | |
1262 | */ | |
7c236c43 | 1263 | rc = efx_ptp_change_mode(efx, enable_wanted, new_mode); |
c939a316 LE |
1264 | if ((rc != 0) && (new_mode == MC_CMD_PTP_MODE_V2_ENHANCED)) |
1265 | rc = efx_ptp_change_mode(efx, enable_wanted, MC_CMD_PTP_MODE_V2); | |
7c236c43 SH |
1266 | if (rc != 0) |
1267 | return rc; | |
1268 | ||
1269 | efx->ptp_data->config = *init; | |
1270 | ||
1271 | return 0; | |
1272 | } | |
1273 | ||
62ebac92 | 1274 | void efx_ptp_get_ts_info(struct efx_nic *efx, struct ethtool_ts_info *ts_info) |
7c236c43 | 1275 | { |
7c236c43 SH |
1276 | struct efx_ptp_data *ptp = efx->ptp_data; |
1277 | ||
1278 | if (!ptp) | |
62ebac92 | 1279 | return; |
7c236c43 | 1280 | |
62ebac92 BH |
1281 | ts_info->so_timestamping |= (SOF_TIMESTAMPING_TX_HARDWARE | |
1282 | SOF_TIMESTAMPING_RX_HARDWARE | | |
1283 | SOF_TIMESTAMPING_RAW_HARDWARE); | |
7c236c43 SH |
1284 | ts_info->phc_index = ptp_clock_index(ptp->phc_clock); |
1285 | ts_info->tx_types = 1 << HWTSTAMP_TX_OFF | 1 << HWTSTAMP_TX_ON; | |
1286 | ts_info->rx_filters = (1 << HWTSTAMP_FILTER_NONE | | |
1287 | 1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT | | |
1288 | 1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC | | |
1289 | 1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ | | |
1290 | 1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT | | |
1291 | 1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC | | |
1292 | 1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); | |
7c236c43 SH |
1293 | } |
1294 | ||
433dc9b3 | 1295 | int efx_ptp_set_ts_config(struct efx_nic *efx, struct ifreq *ifr) |
7c236c43 SH |
1296 | { |
1297 | struct hwtstamp_config config; | |
1298 | int rc; | |
1299 | ||
1300 | /* Not a PTP enabled port */ | |
1301 | if (!efx->ptp_data) | |
1302 | return -EOPNOTSUPP; | |
1303 | ||
1304 | if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) | |
1305 | return -EFAULT; | |
1306 | ||
1307 | rc = efx_ptp_ts_init(efx, &config); | |
1308 | if (rc != 0) | |
1309 | return rc; | |
1310 | ||
1311 | return copy_to_user(ifr->ifr_data, &config, sizeof(config)) | |
1312 | ? -EFAULT : 0; | |
1313 | } | |
1314 | ||
433dc9b3 BH |
1315 | int efx_ptp_get_ts_config(struct efx_nic *efx, struct ifreq *ifr) |
1316 | { | |
1317 | if (!efx->ptp_data) | |
1318 | return -EOPNOTSUPP; | |
1319 | ||
1320 | return copy_to_user(ifr->ifr_data, &efx->ptp_data->config, | |
1321 | sizeof(efx->ptp_data->config)) ? -EFAULT : 0; | |
1322 | } | |
1323 | ||
7c236c43 SH |
1324 | static void ptp_event_failure(struct efx_nic *efx, int expected_frag_len) |
1325 | { | |
1326 | struct efx_ptp_data *ptp = efx->ptp_data; | |
1327 | ||
1328 | netif_err(efx, hw, efx->net_dev, | |
1329 | "PTP unexpected event length: got %d expected %d\n", | |
1330 | ptp->evt_frag_idx, expected_frag_len); | |
1331 | ptp->reset_required = true; | |
1332 | queue_work(ptp->workwq, &ptp->work); | |
1333 | } | |
1334 | ||
1335 | /* Process a completed receive event. Put it on the event queue and | |
1336 | * start worker thread. This is required because event and their | |
1337 | * correspoding packets may come in either order. | |
1338 | */ | |
1339 | static void ptp_event_rx(struct efx_nic *efx, struct efx_ptp_data *ptp) | |
1340 | { | |
1341 | struct efx_ptp_event_rx *evt = NULL; | |
1342 | ||
1343 | if (ptp->evt_frag_idx != 3) { | |
1344 | ptp_event_failure(efx, 3); | |
1345 | return; | |
1346 | } | |
1347 | ||
1348 | spin_lock_bh(&ptp->evt_lock); | |
1349 | if (!list_empty(&ptp->evt_free_list)) { | |
1350 | evt = list_first_entry(&ptp->evt_free_list, | |
1351 | struct efx_ptp_event_rx, link); | |
1352 | list_del(&evt->link); | |
1353 | ||
1354 | evt->seq0 = EFX_QWORD_FIELD(ptp->evt_frags[2], MCDI_EVENT_DATA); | |
1355 | evt->seq1 = (EFX_QWORD_FIELD(ptp->evt_frags[2], | |
1356 | MCDI_EVENT_SRC) | | |
1357 | (EFX_QWORD_FIELD(ptp->evt_frags[1], | |
1358 | MCDI_EVENT_SRC) << 8) | | |
1359 | (EFX_QWORD_FIELD(ptp->evt_frags[0], | |
1360 | MCDI_EVENT_SRC) << 16)); | |
1361 | evt->hwtimestamp = ktime_set( | |
1362 | EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA), | |
1363 | EFX_QWORD_FIELD(ptp->evt_frags[1], MCDI_EVENT_DATA)); | |
1364 | evt->expiry = jiffies + msecs_to_jiffies(PKT_EVENT_LIFETIME_MS); | |
1365 | list_add_tail(&evt->link, &ptp->evt_list); | |
1366 | ||
1367 | queue_work(ptp->workwq, &ptp->work); | |
f3211600 LE |
1368 | } else if (!ptp->evt_overflow) { |
1369 | /* Log a warning message and set the event overflow flag. | |
1370 | * The message won't be logged again until the event queue | |
1371 | * becomes empty. | |
1372 | */ | |
1373 | netif_err(efx, rx_err, efx->net_dev, "PTP event queue overflow\n"); | |
1374 | ptp->evt_overflow = true; | |
7c236c43 SH |
1375 | } |
1376 | spin_unlock_bh(&ptp->evt_lock); | |
1377 | } | |
1378 | ||
1379 | static void ptp_event_fault(struct efx_nic *efx, struct efx_ptp_data *ptp) | |
1380 | { | |
1381 | int code = EFX_QWORD_FIELD(ptp->evt_frags[0], MCDI_EVENT_DATA); | |
1382 | if (ptp->evt_frag_idx != 1) { | |
1383 | ptp_event_failure(efx, 1); | |
1384 | return; | |
1385 | } | |
1386 | ||
1387 | netif_err(efx, hw, efx->net_dev, "PTP error %d\n", code); | |
1388 | } | |
1389 | ||
1390 | static void ptp_event_pps(struct efx_nic *efx, struct efx_ptp_data *ptp) | |
1391 | { | |
1392 | if (ptp->nic_ts_enabled) | |
1393 | queue_work(ptp->pps_workwq, &ptp->pps_work); | |
1394 | } | |
1395 | ||
1396 | void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev) | |
1397 | { | |
1398 | struct efx_ptp_data *ptp = efx->ptp_data; | |
1399 | int code = EFX_QWORD_FIELD(*ev, MCDI_EVENT_CODE); | |
1400 | ||
1401 | if (!ptp->enabled) | |
1402 | return; | |
1403 | ||
1404 | if (ptp->evt_frag_idx == 0) { | |
1405 | ptp->evt_code = code; | |
1406 | } else if (ptp->evt_code != code) { | |
1407 | netif_err(efx, hw, efx->net_dev, | |
1408 | "PTP out of sequence event %d\n", code); | |
1409 | ptp->evt_frag_idx = 0; | |
1410 | } | |
1411 | ||
1412 | ptp->evt_frags[ptp->evt_frag_idx++] = *ev; | |
1413 | if (!MCDI_EVENT_FIELD(*ev, CONT)) { | |
1414 | /* Process resulting event */ | |
1415 | switch (code) { | |
1416 | case MCDI_EVENT_CODE_PTP_RX: | |
1417 | ptp_event_rx(efx, ptp); | |
1418 | break; | |
1419 | case MCDI_EVENT_CODE_PTP_FAULT: | |
1420 | ptp_event_fault(efx, ptp); | |
1421 | break; | |
1422 | case MCDI_EVENT_CODE_PTP_PPS: | |
1423 | ptp_event_pps(efx, ptp); | |
1424 | break; | |
1425 | default: | |
1426 | netif_err(efx, hw, efx->net_dev, | |
1427 | "PTP unknown event %d\n", code); | |
1428 | break; | |
1429 | } | |
1430 | ptp->evt_frag_idx = 0; | |
1431 | } else if (MAX_EVENT_FRAGS == ptp->evt_frag_idx) { | |
1432 | netif_err(efx, hw, efx->net_dev, | |
1433 | "PTP too many event fragments\n"); | |
1434 | ptp->evt_frag_idx = 0; | |
1435 | } | |
1436 | } | |
1437 | ||
1438 | static int efx_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) | |
1439 | { | |
1440 | struct efx_ptp_data *ptp_data = container_of(ptp, | |
1441 | struct efx_ptp_data, | |
1442 | phc_clock_info); | |
ac36baf8 | 1443 | struct efx_nic *efx = ptp_data->efx; |
59cfc479 | 1444 | MCDI_DECLARE_BUF(inadj, MC_CMD_PTP_IN_ADJUST_LEN); |
7c236c43 SH |
1445 | s64 adjustment_ns; |
1446 | int rc; | |
1447 | ||
1448 | if (delta > MAX_PPB) | |
1449 | delta = MAX_PPB; | |
1450 | else if (delta < -MAX_PPB) | |
1451 | delta = -MAX_PPB; | |
1452 | ||
1453 | /* Convert ppb to fixed point ns. */ | |
1454 | adjustment_ns = (((s64)delta * PPB_SCALE_WORD) >> | |
1455 | (PPB_EXTRA_BITS + MAX_PPB_BITS)); | |
1456 | ||
1457 | MCDI_SET_DWORD(inadj, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST); | |
c1d828bd | 1458 | MCDI_SET_DWORD(inadj, PTP_IN_PERIPH_ID, 0); |
338f74df | 1459 | MCDI_SET_QWORD(inadj, PTP_IN_ADJUST_FREQ, adjustment_ns); |
7c236c43 SH |
1460 | MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_SECONDS, 0); |
1461 | MCDI_SET_DWORD(inadj, PTP_IN_ADJUST_NANOSECONDS, 0); | |
1462 | rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inadj, sizeof(inadj), | |
1463 | NULL, 0, NULL); | |
1464 | if (rc != 0) | |
1465 | return rc; | |
1466 | ||
cd6fe65e | 1467 | ptp_data->current_adjfreq = adjustment_ns; |
7c236c43 SH |
1468 | return 0; |
1469 | } | |
1470 | ||
1471 | static int efx_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) | |
1472 | { | |
1473 | struct efx_ptp_data *ptp_data = container_of(ptp, | |
1474 | struct efx_ptp_data, | |
1475 | phc_clock_info); | |
ac36baf8 | 1476 | struct efx_nic *efx = ptp_data->efx; |
7c236c43 | 1477 | struct timespec delta_ts = ns_to_timespec(delta); |
59cfc479 | 1478 | MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_ADJUST_LEN); |
7c236c43 SH |
1479 | |
1480 | MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_ADJUST); | |
c1d828bd | 1481 | MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); |
cd6fe65e | 1482 | MCDI_SET_QWORD(inbuf, PTP_IN_ADJUST_FREQ, ptp_data->current_adjfreq); |
7c236c43 SH |
1483 | MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_SECONDS, (u32)delta_ts.tv_sec); |
1484 | MCDI_SET_DWORD(inbuf, PTP_IN_ADJUST_NANOSECONDS, (u32)delta_ts.tv_nsec); | |
1485 | return efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), | |
1486 | NULL, 0, NULL); | |
1487 | } | |
1488 | ||
1489 | static int efx_phc_gettime(struct ptp_clock_info *ptp, struct timespec *ts) | |
1490 | { | |
1491 | struct efx_ptp_data *ptp_data = container_of(ptp, | |
1492 | struct efx_ptp_data, | |
1493 | phc_clock_info); | |
ac36baf8 | 1494 | struct efx_nic *efx = ptp_data->efx; |
59cfc479 BH |
1495 | MCDI_DECLARE_BUF(inbuf, MC_CMD_PTP_IN_READ_NIC_TIME_LEN); |
1496 | MCDI_DECLARE_BUF(outbuf, MC_CMD_PTP_OUT_READ_NIC_TIME_LEN); | |
7c236c43 SH |
1497 | int rc; |
1498 | ||
1499 | MCDI_SET_DWORD(inbuf, PTP_IN_OP, MC_CMD_PTP_OP_READ_NIC_TIME); | |
c1d828bd | 1500 | MCDI_SET_DWORD(inbuf, PTP_IN_PERIPH_ID, 0); |
7c236c43 SH |
1501 | |
1502 | rc = efx_mcdi_rpc(efx, MC_CMD_PTP, inbuf, sizeof(inbuf), | |
1503 | outbuf, sizeof(outbuf), NULL); | |
1504 | if (rc != 0) | |
1505 | return rc; | |
1506 | ||
1507 | ts->tv_sec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_SECONDS); | |
1508 | ts->tv_nsec = MCDI_DWORD(outbuf, PTP_OUT_READ_NIC_TIME_NANOSECONDS); | |
1509 | return 0; | |
1510 | } | |
1511 | ||
1512 | static int efx_phc_settime(struct ptp_clock_info *ptp, | |
1513 | const struct timespec *e_ts) | |
1514 | { | |
1515 | /* Get the current NIC time, efx_phc_gettime. | |
1516 | * Subtract from the desired time to get the offset | |
1517 | * call efx_phc_adjtime with the offset | |
1518 | */ | |
1519 | int rc; | |
1520 | struct timespec time_now; | |
1521 | struct timespec delta; | |
1522 | ||
1523 | rc = efx_phc_gettime(ptp, &time_now); | |
1524 | if (rc != 0) | |
1525 | return rc; | |
1526 | ||
1527 | delta = timespec_sub(*e_ts, time_now); | |
1528 | ||
56567c6f | 1529 | rc = efx_phc_adjtime(ptp, timespec_to_ns(&delta)); |
7c236c43 SH |
1530 | if (rc != 0) |
1531 | return rc; | |
1532 | ||
1533 | return 0; | |
1534 | } | |
1535 | ||
1536 | static int efx_phc_enable(struct ptp_clock_info *ptp, | |
1537 | struct ptp_clock_request *request, | |
1538 | int enable) | |
1539 | { | |
1540 | struct efx_ptp_data *ptp_data = container_of(ptp, | |
1541 | struct efx_ptp_data, | |
1542 | phc_clock_info); | |
1543 | if (request->type != PTP_CLK_REQ_PPS) | |
1544 | return -EOPNOTSUPP; | |
1545 | ||
1546 | ptp_data->nic_ts_enabled = !!enable; | |
1547 | return 0; | |
1548 | } | |
1549 | ||
1550 | static const struct efx_channel_type efx_ptp_channel_type = { | |
1551 | .handle_no_channel = efx_ptp_handle_no_channel, | |
1552 | .pre_probe = efx_ptp_probe_channel, | |
1553 | .post_remove = efx_ptp_remove_channel, | |
1554 | .get_name = efx_ptp_get_channel_name, | |
1555 | /* no copy operation; there is no need to reallocate this channel */ | |
1556 | .receive_skb = efx_ptp_rx, | |
1557 | .keep_eventq = false, | |
1558 | }; | |
1559 | ||
ac36baf8 | 1560 | void efx_ptp_defer_probe_with_channel(struct efx_nic *efx) |
7c236c43 SH |
1561 | { |
1562 | /* Check whether PTP is implemented on this NIC. The DISABLE | |
1563 | * operation will succeed if and only if it is implemented. | |
1564 | */ | |
1565 | if (efx_ptp_disable(efx) == 0) | |
1566 | efx->extra_channel_type[EFX_EXTRA_CHANNEL_PTP] = | |
1567 | &efx_ptp_channel_type; | |
1568 | } | |
2ea4dc28 AR |
1569 | |
1570 | void efx_ptp_start_datapath(struct efx_nic *efx) | |
1571 | { | |
1572 | if (efx_ptp_restart(efx)) | |
1573 | netif_err(efx, drv, efx->net_dev, "Failed to restart PTP.\n"); | |
1574 | } | |
1575 | ||
1576 | void efx_ptp_stop_datapath(struct efx_nic *efx) | |
1577 | { | |
1578 | efx_ptp_stop(efx); | |
1579 | } |