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47dd7a54 GC |
1 | /******************************************************************************* |
2 | Copyright (C) 2007-2009 STMicroelectronics Ltd | |
3 | ||
4 | This program is free software; you can redistribute it and/or modify it | |
5 | under the terms and conditions of the GNU General Public License, | |
6 | version 2, as published by the Free Software Foundation. | |
7 | ||
8 | This program is distributed in the hope it will be useful, but WITHOUT | |
9 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | more details. | |
12 | ||
13 | You should have received a copy of the GNU General Public License along with | |
14 | this program; if not, write to the Free Software Foundation, Inc., | |
15 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
16 | ||
17 | The full GNU General Public License is included in this distribution in | |
18 | the file called "COPYING". | |
19 | ||
20 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> | |
21 | *******************************************************************************/ | |
22 | ||
bd4242df RK |
23 | #ifndef __STMMAC_H__ |
24 | #define __STMMAC_H__ | |
25 | ||
bfab27a1 | 26 | #define STMMAC_RESOURCE_NAME "stmmaceth" |
94fbbbf8 | 27 | #define DRV_MODULE_VERSION "March_2013" |
ba1377ff GC |
28 | |
29 | #include <linux/clk.h> | |
ee7946a7 | 30 | #include <linux/stmmac.h> |
286a8372 | 31 | #include <linux/phy.h> |
33d5e332 | 32 | #include <linux/pci.h> |
47dd7a54 | 33 | #include "common.h" |
92ba6888 | 34 | #include <linux/ptp_clock_kernel.h> |
c5e4ddbd | 35 | #include <linux/reset.h> |
47dd7a54 GC |
36 | |
37 | struct stmmac_priv { | |
38 | /* Frequently used values are kept adjacent for cache effect */ | |
1bb6dea8 GC |
39 | struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; |
40 | struct dma_desc *dma_tx; | |
47dd7a54 GC |
41 | struct sk_buff **tx_skbuff; |
42 | unsigned int cur_tx; | |
43 | unsigned int dirty_tx; | |
44 | unsigned int dma_tx_size; | |
1bb6dea8 GC |
45 | u32 tx_count_frames; |
46 | u32 tx_coal_frames; | |
47 | u32 tx_coal_timer; | |
48 | dma_addr_t *tx_skbuff_dma; | |
49 | dma_addr_t dma_tx_phy; | |
47dd7a54 | 50 | int tx_coalesce; |
1bb6dea8 GC |
51 | int hwts_tx_en; |
52 | spinlock_t tx_lock; | |
53 | bool tx_path_in_lpi_mode; | |
54 | struct timer_list txtimer; | |
47dd7a54 | 55 | |
1bb6dea8 GC |
56 | struct dma_desc *dma_rx ____cacheline_aligned_in_smp; |
57 | struct dma_extended_desc *dma_erx; | |
58 | struct sk_buff **rx_skbuff; | |
47dd7a54 GC |
59 | unsigned int cur_rx; |
60 | unsigned int dirty_rx; | |
1bb6dea8 GC |
61 | unsigned int dma_rx_size; |
62 | unsigned int dma_buf_sz; | |
63 | u32 rx_riwt; | |
64 | int hwts_rx_en; | |
47dd7a54 | 65 | dma_addr_t *rx_skbuff_dma; |
1bb6dea8 | 66 | dma_addr_t dma_rx_phy; |
47dd7a54 | 67 | |
1bb6dea8 GC |
68 | struct napi_struct napi ____cacheline_aligned_in_smp; |
69 | ||
70 | void __iomem *ioaddr; | |
47dd7a54 | 71 | struct net_device *dev; |
47dd7a54 | 72 | struct device *device; |
db98a0b0 | 73 | struct mac_device_info *hw; |
1bb6dea8 | 74 | spinlock_t lock; |
47dd7a54 | 75 | |
1bb6dea8 | 76 | struct phy_device *phydev ____cacheline_aligned_in_smp; |
47dd7a54 GC |
77 | int oldlink; |
78 | int speed; | |
79 | int oldduplex; | |
80 | unsigned int flow_ctrl; | |
81 | unsigned int pause; | |
82 | struct mii_bus *mii; | |
36bcfe7d | 83 | int mii_irq[PHY_MAX_ADDR]; |
47dd7a54 | 84 | |
1bb6dea8 | 85 | struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; |
9dfeb4d9 | 86 | struct plat_stmmacenet_data *plat; |
e7434821 | 87 | struct dma_features dma_cap; |
1bb6dea8 | 88 | struct stmmac_counters mmc; |
19e30c14 | 89 | int hw_cap_support; |
1bb6dea8 GC |
90 | int synopsys_id; |
91 | u32 msg_enable; | |
92 | int wolopts; | |
93 | int wol_irq; | |
ba1377ff | 94 | struct clk *stmmac_clk; |
c5e4ddbd | 95 | struct reset_control *stmmac_rst; |
cd7201f4 | 96 | int clk_csr; |
d765955d | 97 | struct timer_list eee_ctrl_timer; |
d765955d GC |
98 | int lpi_irq; |
99 | int eee_enabled; | |
100 | int eee_active; | |
101 | int tx_lpi_timer; | |
1bb6dea8 | 102 | int pcs; |
4a7d666a | 103 | unsigned int mode; |
c24602ef | 104 | int extend_desc; |
92ba6888 RK |
105 | struct ptp_clock *ptp_clock; |
106 | struct ptp_clock_info ptp_clock_ops; | |
1bb6dea8 GC |
107 | unsigned int default_addend; |
108 | u32 adv_ts; | |
109 | int use_riwt; | |
89f7f2cf | 110 | int irq_wake; |
92ba6888 | 111 | spinlock_t ptp_lock; |
47dd7a54 GC |
112 | }; |
113 | ||
d6cc64ef JP |
114 | int stmmac_mdio_unregister(struct net_device *ndev); |
115 | int stmmac_mdio_register(struct net_device *ndev); | |
073752aa | 116 | int stmmac_mdio_reset(struct mii_bus *mii); |
d6cc64ef | 117 | void stmmac_set_ethtool_ops(struct net_device *netdev); |
cadb7924 | 118 | extern const struct stmmac_desc_ops enh_desc_ops; |
119 | extern const struct stmmac_desc_ops ndesc_ops; | |
891434b1 | 120 | extern const struct stmmac_hwtimestamp stmmac_ptp; |
d6cc64ef JP |
121 | int stmmac_ptp_register(struct stmmac_priv *priv); |
122 | void stmmac_ptp_unregister(struct stmmac_priv *priv); | |
bfab27a1 GC |
123 | int stmmac_resume(struct net_device *ndev); |
124 | int stmmac_suspend(struct net_device *ndev); | |
125 | int stmmac_dvr_remove(struct net_device *ndev); | |
126 | struct stmmac_priv *stmmac_dvr_probe(struct device *device, | |
cf3f047b GC |
127 | struct plat_stmmacenet_data *plat_dat, |
128 | void __iomem *addr); | |
d765955d GC |
129 | void stmmac_disable_eee_mode(struct stmmac_priv *priv); |
130 | bool stmmac_eee_init(struct stmmac_priv *priv); | |
ba1377ff | 131 | |
33d5e332 | 132 | #ifdef CONFIG_STMMAC_PLATFORM |
af0bd4e9 CYT |
133 | #ifdef CONFIG_DWMAC_SUNXI |
134 | extern const struct stmmac_of_data sun7i_gmac_data; | |
135 | #endif | |
d15891ca SK |
136 | #ifdef CONFIG_DWMAC_STI |
137 | extern const struct stmmac_of_data sti_gmac_data; | |
138 | #endif | |
801d233b DN |
139 | #ifdef CONFIG_DWMAC_SOCFPGA |
140 | extern const struct stmmac_of_data socfpga_gmac_data; | |
141 | #endif | |
33d5e332 GC |
142 | extern struct platform_driver stmmac_pltfr_driver; |
143 | static inline int stmmac_register_platform(void) | |
144 | { | |
145 | int err; | |
146 | ||
147 | err = platform_driver_register(&stmmac_pltfr_driver); | |
148 | if (err) | |
149 | pr_err("stmmac: failed to register the platform driver\n"); | |
150 | ||
151 | return err; | |
152 | } | |
ceb69499 | 153 | |
33d5e332 GC |
154 | static inline void stmmac_unregister_platform(void) |
155 | { | |
493682b8 | 156 | platform_driver_unregister(&stmmac_pltfr_driver); |
33d5e332 GC |
157 | } |
158 | #else | |
159 | static inline int stmmac_register_platform(void) | |
160 | { | |
161 | pr_debug("stmmac: do not register the platf driver\n"); | |
162 | ||
493682b8 | 163 | return 0; |
33d5e332 | 164 | } |
ceb69499 | 165 | |
33d5e332 GC |
166 | static inline void stmmac_unregister_platform(void) |
167 | { | |
168 | } | |
169 | #endif /* CONFIG_STMMAC_PLATFORM */ | |
170 | ||
171 | #ifdef CONFIG_STMMAC_PCI | |
172 | extern struct pci_driver stmmac_pci_driver; | |
173 | static inline int stmmac_register_pci(void) | |
174 | { | |
175 | int err; | |
176 | ||
177 | err = pci_register_driver(&stmmac_pci_driver); | |
178 | if (err) | |
179 | pr_err("stmmac: failed to register the PCI driver\n"); | |
180 | ||
181 | return err; | |
182 | } | |
ceb69499 | 183 | |
33d5e332 GC |
184 | static inline void stmmac_unregister_pci(void) |
185 | { | |
186 | pci_unregister_driver(&stmmac_pci_driver); | |
187 | } | |
188 | #else | |
189 | static inline int stmmac_register_pci(void) | |
190 | { | |
191 | pr_debug("stmmac: do not register the PCI driver\n"); | |
192 | ||
493682b8 | 193 | return 0; |
33d5e332 | 194 | } |
ceb69499 | 195 | |
33d5e332 GC |
196 | static inline void stmmac_unregister_pci(void) |
197 | { | |
198 | } | |
199 | #endif /* CONFIG_STMMAC_PCI */ | |
bd4242df RK |
200 | |
201 | #endif /* __STMMAC_H__ */ |