Commit | Line | Data |
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5d031e9e DP |
1 | /* |
2 | * Driver for the MPC5200 Fast Ethernet Controller | |
3 | * | |
4 | * Originally written by Dale Farnsworth <dfarnsworth@mvista.com> and | |
5 | * now maintained by Sylvain Munaut <tnt@246tNt.com> | |
6 | * | |
7 | * Copyright (C) 2007 Domen Puncer, Telargo, Inc. | |
8 | * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com> | |
9 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | |
10 | * | |
11 | * This file is licensed under the terms of the GNU General Public License | |
12 | * version 2. This program is licensed "as is" without any warranty of any | |
13 | * kind, whether express or implied. | |
14 | * | |
15 | */ | |
16 | ||
b7f080cf | 17 | #include <linux/dma-mapping.h> |
5d031e9e DP |
18 | #include <linux/module.h> |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/types.h> | |
22 | #include <linux/spinlock.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
5d031e9e DP |
24 | #include <linux/errno.h> |
25 | #include <linux/init.h> | |
a6b7a407 | 26 | #include <linux/interrupt.h> |
5d031e9e DP |
27 | #include <linux/crc32.h> |
28 | #include <linux/hardirq.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/of_device.h> | |
ca816d98 | 31 | #include <linux/of_mdio.h> |
5d031e9e DP |
32 | #include <linux/of_platform.h> |
33 | ||
34 | #include <linux/netdevice.h> | |
35 | #include <linux/etherdevice.h> | |
36 | #include <linux/ethtool.h> | |
37 | #include <linux/skbuff.h> | |
38 | ||
39 | #include <asm/io.h> | |
40 | #include <asm/delay.h> | |
41 | #include <asm/mpc52xx.h> | |
42 | ||
43 | #include <sysdev/bestcomm/bestcomm.h> | |
44 | #include <sysdev/bestcomm/fec.h> | |
45 | ||
46 | #include "fec_mpc52xx.h" | |
47 | ||
48 | #define DRIVER_NAME "mpc52xx-fec" | |
49 | ||
80791be1 GL |
50 | /* Private driver data structure */ |
51 | struct mpc52xx_fec_priv { | |
ca816d98 | 52 | struct net_device *ndev; |
80791be1 GL |
53 | int duplex; |
54 | int speed; | |
55 | int r_irq; | |
56 | int t_irq; | |
57 | struct mpc52xx_fec __iomem *fec; | |
58 | struct bcom_task *rx_dmatsk; | |
59 | struct bcom_task *tx_dmatsk; | |
60 | spinlock_t lock; | |
61 | int msg_enable; | |
62 | ||
63 | /* MDIO link details */ | |
ca816d98 GL |
64 | unsigned int mdio_speed; |
65 | struct device_node *phy_node; | |
80791be1 GL |
66 | struct phy_device *phydev; |
67 | enum phy_state link; | |
ca816d98 | 68 | int seven_wire_mode; |
80791be1 GL |
69 | }; |
70 | ||
71 | ||
5d031e9e DP |
72 | static irqreturn_t mpc52xx_fec_interrupt(int, void *); |
73 | static irqreturn_t mpc52xx_fec_rx_interrupt(int, void *); | |
74 | static irqreturn_t mpc52xx_fec_tx_interrupt(int, void *); | |
75 | static void mpc52xx_fec_stop(struct net_device *dev); | |
76 | static void mpc52xx_fec_start(struct net_device *dev); | |
77 | static void mpc52xx_fec_reset(struct net_device *dev); | |
78 | ||
79 | static u8 mpc52xx_fec_mac_addr[6]; | |
80 | module_param_array_named(mac, mpc52xx_fec_mac_addr, byte, NULL, 0); | |
81 | MODULE_PARM_DESC(mac, "six hex digits, ie. 0x1,0x2,0xc0,0x01,0xba,0xbe"); | |
82 | ||
83 | #define MPC52xx_MESSAGES_DEFAULT ( NETIF_MSG_DRV | NETIF_MSG_PROBE | \ | |
8b983510 | 84 | NETIF_MSG_LINK | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP) |
5d031e9e DP |
85 | static int debug = -1; /* the above default */ |
86 | module_param(debug, int, 0); | |
87 | MODULE_PARM_DESC(debug, "debugging messages level"); | |
88 | ||
89 | static void mpc52xx_fec_tx_timeout(struct net_device *dev) | |
90 | { | |
1e4e0767 AL |
91 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
92 | unsigned long flags; | |
93 | ||
5d031e9e DP |
94 | dev_warn(&dev->dev, "transmit timed out\n"); |
95 | ||
1e4e0767 | 96 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e | 97 | mpc52xx_fec_reset(dev); |
5d031e9e | 98 | dev->stats.tx_errors++; |
1e4e0767 | 99 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
100 | |
101 | netif_wake_queue(dev); | |
102 | } | |
103 | ||
104 | static void mpc52xx_fec_set_paddr(struct net_device *dev, u8 *mac) | |
105 | { | |
106 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
107 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
108 | ||
109 | out_be32(&fec->paddr1, *(u32 *)(&mac[0])); | |
110 | out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE); | |
111 | } | |
112 | ||
113 | static void mpc52xx_fec_get_paddr(struct net_device *dev, u8 *mac) | |
114 | { | |
115 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
116 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
117 | ||
118 | *(u32 *)(&mac[0]) = in_be32(&fec->paddr1); | |
119 | *(u16 *)(&mac[4]) = in_be32(&fec->paddr2) >> 16; | |
120 | } | |
121 | ||
122 | static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr) | |
123 | { | |
124 | struct sockaddr *sock = addr; | |
125 | ||
126 | memcpy(dev->dev_addr, sock->sa_data, dev->addr_len); | |
127 | ||
128 | mpc52xx_fec_set_paddr(dev, sock->sa_data); | |
129 | return 0; | |
130 | } | |
131 | ||
132 | static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct bcom_task *s) | |
133 | { | |
134 | while (!bcom_queue_empty(s)) { | |
135 | struct bcom_fec_bd *bd; | |
136 | struct sk_buff *skb; | |
137 | ||
138 | skb = bcom_retrieve_buffer(s, NULL, (struct bcom_bd **)&bd); | |
461cadbc GL |
139 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
140 | DMA_FROM_DEVICE); | |
5d031e9e DP |
141 | kfree_skb(skb); |
142 | } | |
143 | } | |
144 | ||
1e4e0767 AL |
145 | static void |
146 | mpc52xx_fec_rx_submit(struct net_device *dev, struct sk_buff *rskb) | |
147 | { | |
148 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
149 | struct bcom_fec_bd *bd; | |
150 | ||
151 | bd = (struct bcom_fec_bd *) bcom_prepare_next_buffer(priv->rx_dmatsk); | |
152 | bd->status = FEC_RX_BUFFER_SIZE; | |
153 | bd->skb_pa = dma_map_single(dev->dev.parent, rskb->data, | |
154 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | |
155 | bcom_submit_next_buffer(priv->rx_dmatsk, rskb); | |
156 | } | |
157 | ||
5d031e9e DP |
158 | static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task *rxtsk) |
159 | { | |
1e4e0767 | 160 | struct sk_buff *skb; |
5d031e9e | 161 | |
1e4e0767 | 162 | while (!bcom_queue_full(rxtsk)) { |
5d031e9e | 163 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); |
1e4e0767 | 164 | if (!skb) |
5d031e9e DP |
165 | return -EAGAIN; |
166 | ||
167 | /* zero out the initial receive buffers to aid debugging */ | |
168 | memset(skb->data, 0, FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 169 | mpc52xx_fec_rx_submit(dev, skb); |
5d031e9e | 170 | } |
5d031e9e DP |
171 | return 0; |
172 | } | |
173 | ||
174 | /* based on generic_adjust_link from fs_enet-main.c */ | |
175 | static void mpc52xx_fec_adjust_link(struct net_device *dev) | |
176 | { | |
177 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
178 | struct phy_device *phydev = priv->phydev; | |
179 | int new_state = 0; | |
180 | ||
181 | if (phydev->link != PHY_DOWN) { | |
182 | if (phydev->duplex != priv->duplex) { | |
183 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
184 | u32 rcntrl; | |
185 | u32 tcntrl; | |
186 | ||
187 | new_state = 1; | |
188 | priv->duplex = phydev->duplex; | |
189 | ||
190 | rcntrl = in_be32(&fec->r_cntrl); | |
191 | tcntrl = in_be32(&fec->x_cntrl); | |
192 | ||
193 | rcntrl &= ~FEC_RCNTRL_DRT; | |
194 | tcntrl &= ~FEC_TCNTRL_FDEN; | |
195 | if (phydev->duplex == DUPLEX_FULL) | |
196 | tcntrl |= FEC_TCNTRL_FDEN; /* FD enable */ | |
197 | else | |
198 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
199 | ||
200 | out_be32(&fec->r_cntrl, rcntrl); | |
201 | out_be32(&fec->x_cntrl, tcntrl); | |
202 | } | |
203 | ||
204 | if (phydev->speed != priv->speed) { | |
205 | new_state = 1; | |
206 | priv->speed = phydev->speed; | |
207 | } | |
208 | ||
209 | if (priv->link == PHY_DOWN) { | |
210 | new_state = 1; | |
211 | priv->link = phydev->link; | |
5d031e9e DP |
212 | } |
213 | ||
214 | } else if (priv->link) { | |
215 | new_state = 1; | |
216 | priv->link = PHY_DOWN; | |
217 | priv->speed = 0; | |
218 | priv->duplex = -1; | |
5d031e9e DP |
219 | } |
220 | ||
221 | if (new_state && netif_msg_link(priv)) | |
222 | phy_print_status(phydev); | |
223 | } | |
224 | ||
5d031e9e DP |
225 | static int mpc52xx_fec_open(struct net_device *dev) |
226 | { | |
227 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
228 | int err = -EBUSY; | |
229 | ||
ca816d98 GL |
230 | if (priv->phy_node) { |
231 | priv->phydev = of_phy_connect(priv->ndev, priv->phy_node, | |
232 | mpc52xx_fec_adjust_link, 0, 0); | |
233 | if (!priv->phydev) { | |
234 | dev_err(&dev->dev, "of_phy_connect failed\n"); | |
235 | return -ENODEV; | |
236 | } | |
237 | phy_start(priv->phydev); | |
238 | } | |
239 | ||
a0607fd3 | 240 | if (request_irq(dev->irq, mpc52xx_fec_interrupt, IRQF_SHARED, |
5d031e9e DP |
241 | DRIVER_NAME "_ctrl", dev)) { |
242 | dev_err(&dev->dev, "ctrl interrupt request failed\n"); | |
ca816d98 | 243 | goto free_phy; |
5d031e9e | 244 | } |
a0607fd3 | 245 | if (request_irq(priv->r_irq, mpc52xx_fec_rx_interrupt, 0, |
5d031e9e DP |
246 | DRIVER_NAME "_rx", dev)) { |
247 | dev_err(&dev->dev, "rx interrupt request failed\n"); | |
248 | goto free_ctrl_irq; | |
249 | } | |
a0607fd3 | 250 | if (request_irq(priv->t_irq, mpc52xx_fec_tx_interrupt, 0, |
5d031e9e DP |
251 | DRIVER_NAME "_tx", dev)) { |
252 | dev_err(&dev->dev, "tx interrupt request failed\n"); | |
253 | goto free_2irqs; | |
254 | } | |
255 | ||
256 | bcom_fec_rx_reset(priv->rx_dmatsk); | |
257 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
258 | ||
259 | err = mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
260 | if (err) { | |
261 | dev_err(&dev->dev, "mpc52xx_fec_alloc_rx_buffers failed\n"); | |
262 | goto free_irqs; | |
263 | } | |
264 | ||
5d031e9e DP |
265 | bcom_enable(priv->rx_dmatsk); |
266 | bcom_enable(priv->tx_dmatsk); | |
267 | ||
268 | mpc52xx_fec_start(dev); | |
269 | ||
270 | netif_start_queue(dev); | |
271 | ||
272 | return 0; | |
273 | ||
5d031e9e DP |
274 | free_irqs: |
275 | free_irq(priv->t_irq, dev); | |
276 | free_2irqs: | |
277 | free_irq(priv->r_irq, dev); | |
278 | free_ctrl_irq: | |
279 | free_irq(dev->irq, dev); | |
ca816d98 GL |
280 | free_phy: |
281 | if (priv->phydev) { | |
282 | phy_stop(priv->phydev); | |
283 | phy_disconnect(priv->phydev); | |
284 | priv->phydev = NULL; | |
285 | } | |
5d031e9e DP |
286 | |
287 | return err; | |
288 | } | |
289 | ||
290 | static int mpc52xx_fec_close(struct net_device *dev) | |
291 | { | |
292 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
293 | ||
294 | netif_stop_queue(dev); | |
295 | ||
296 | mpc52xx_fec_stop(dev); | |
297 | ||
298 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
299 | ||
300 | free_irq(dev->irq, dev); | |
301 | free_irq(priv->r_irq, dev); | |
302 | free_irq(priv->t_irq, dev); | |
303 | ||
ca816d98 GL |
304 | if (priv->phydev) { |
305 | /* power down phy */ | |
306 | phy_stop(priv->phydev); | |
307 | phy_disconnect(priv->phydev); | |
308 | priv->phydev = NULL; | |
309 | } | |
5d031e9e DP |
310 | |
311 | return 0; | |
312 | } | |
313 | ||
314 | /* This will only be invoked if your driver is _not_ in XOFF state. | |
315 | * What this means is that you need not check it, and that this | |
316 | * invariant will hold if you make sure that the netif_*_queue() | |
317 | * calls are done at the proper times. | |
318 | */ | |
d360009c | 319 | static int mpc52xx_fec_start_xmit(struct sk_buff *skb, struct net_device *dev) |
5d031e9e DP |
320 | { |
321 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
322 | struct bcom_fec_bd *bd; | |
4871953c | 323 | unsigned long flags; |
5d031e9e DP |
324 | |
325 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
326 | if (net_ratelimit()) | |
327 | dev_err(&dev->dev, "transmit queue overrun\n"); | |
d360009c | 328 | return NETDEV_TX_BUSY; |
5d031e9e DP |
329 | } |
330 | ||
4871953c | 331 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e DP |
332 | |
333 | bd = (struct bcom_fec_bd *) | |
334 | bcom_prepare_next_buffer(priv->tx_dmatsk); | |
335 | ||
336 | bd->status = skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX_BD_TC; | |
461cadbc GL |
337 | bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, skb->len, |
338 | DMA_TO_DEVICE); | |
5d031e9e | 339 | |
d6cf0732 | 340 | skb_tx_timestamp(skb); |
5d031e9e | 341 | bcom_submit_next_buffer(priv->tx_dmatsk, skb); |
1e4e0767 | 342 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
343 | |
344 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
345 | netif_stop_queue(dev); | |
346 | } | |
347 | ||
d360009c | 348 | return NETDEV_TX_OK; |
5d031e9e DP |
349 | } |
350 | ||
bd28bdb1 JS |
351 | #ifdef CONFIG_NET_POLL_CONTROLLER |
352 | static void mpc52xx_fec_poll_controller(struct net_device *dev) | |
353 | { | |
354 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
355 | ||
356 | disable_irq(priv->t_irq); | |
357 | mpc52xx_fec_tx_interrupt(priv->t_irq, dev); | |
358 | enable_irq(priv->t_irq); | |
359 | disable_irq(priv->r_irq); | |
360 | mpc52xx_fec_rx_interrupt(priv->r_irq, dev); | |
361 | enable_irq(priv->r_irq); | |
362 | } | |
363 | #endif | |
364 | ||
365 | ||
5d031e9e DP |
366 | /* This handles BestComm transmit task interrupts |
367 | */ | |
368 | static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id) | |
369 | { | |
370 | struct net_device *dev = dev_id; | |
371 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
372 | ||
9d1e5e40 | 373 | spin_lock(&priv->lock); |
5d031e9e DP |
374 | while (bcom_buffer_done(priv->tx_dmatsk)) { |
375 | struct sk_buff *skb; | |
376 | struct bcom_fec_bd *bd; | |
377 | skb = bcom_retrieve_buffer(priv->tx_dmatsk, NULL, | |
378 | (struct bcom_bd **)&bd); | |
461cadbc GL |
379 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
380 | DMA_TO_DEVICE); | |
5d031e9e DP |
381 | |
382 | dev_kfree_skb_irq(skb); | |
383 | } | |
9d1e5e40 | 384 | spin_unlock(&priv->lock); |
5d031e9e DP |
385 | |
386 | netif_wake_queue(dev); | |
387 | ||
5d031e9e DP |
388 | return IRQ_HANDLED; |
389 | } | |
390 | ||
391 | static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |
392 | { | |
393 | struct net_device *dev = dev_id; | |
394 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
1e4e0767 AL |
395 | struct sk_buff *rskb; /* received sk_buff */ |
396 | struct sk_buff *skb; /* new sk_buff to enqueue in its place */ | |
397 | struct bcom_fec_bd *bd; | |
398 | u32 status, physaddr; | |
399 | int length; | |
1e4e0767 | 400 | |
9d1e5e40 | 401 | spin_lock(&priv->lock); |
5d031e9e DP |
402 | |
403 | while (bcom_buffer_done(priv->rx_dmatsk)) { | |
5d031e9e DP |
404 | |
405 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, | |
1e4e0767 AL |
406 | (struct bcom_bd **)&bd); |
407 | physaddr = bd->skb_pa; | |
5d031e9e DP |
408 | |
409 | /* Test for errors in received frame */ | |
410 | if (status & BCOM_FEC_RX_BD_ERRORS) { | |
411 | /* Drop packet and reuse the buffer */ | |
1e4e0767 | 412 | mpc52xx_fec_rx_submit(dev, rskb); |
5d031e9e | 413 | dev->stats.rx_dropped++; |
5d031e9e DP |
414 | continue; |
415 | } | |
416 | ||
417 | /* skbs are allocated on open, so now we allocate a new one, | |
418 | * and remove the old (with the packet) */ | |
419 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 420 | if (!skb) { |
5d031e9e | 421 | /* Can't get a new one : reuse the same & drop pkt */ |
1e4e0767 AL |
422 | dev_notice(&dev->dev, "Low memory - dropped packet.\n"); |
423 | mpc52xx_fec_rx_submit(dev, rskb); | |
5d031e9e | 424 | dev->stats.rx_dropped++; |
1e4e0767 | 425 | continue; |
5d031e9e DP |
426 | } |
427 | ||
1e4e0767 AL |
428 | /* Enqueue the new sk_buff back on the hardware */ |
429 | mpc52xx_fec_rx_submit(dev, skb); | |
5d031e9e | 430 | |
1e4e0767 AL |
431 | /* Process the received skb - Drop the spin lock while |
432 | * calling into the network stack */ | |
9d1e5e40 | 433 | spin_unlock(&priv->lock); |
5d031e9e | 434 | |
1e4e0767 AL |
435 | dma_unmap_single(dev->dev.parent, physaddr, rskb->len, |
436 | DMA_FROM_DEVICE); | |
437 | length = status & BCOM_FEC_RX_BD_LEN_MASK; | |
438 | skb_put(rskb, length - 4); /* length without CRC32 */ | |
1e4e0767 | 439 | rskb->protocol = eth_type_trans(rskb, dev); |
d6cf0732 RC |
440 | if (!skb_defer_rx_timestamp(skb)) |
441 | netif_rx(rskb); | |
1e4e0767 | 442 | |
9d1e5e40 | 443 | spin_lock(&priv->lock); |
5d031e9e DP |
444 | } |
445 | ||
9d1e5e40 | 446 | spin_unlock(&priv->lock); |
1e4e0767 | 447 | |
5d031e9e DP |
448 | return IRQ_HANDLED; |
449 | } | |
450 | ||
451 | static irqreturn_t mpc52xx_fec_interrupt(int irq, void *dev_id) | |
452 | { | |
453 | struct net_device *dev = dev_id; | |
454 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
455 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
456 | u32 ievent; | |
457 | ||
458 | ievent = in_be32(&fec->ievent); | |
459 | ||
460 | ievent &= ~FEC_IEVENT_MII; /* mii is handled separately */ | |
461 | if (!ievent) | |
462 | return IRQ_NONE; | |
463 | ||
464 | out_be32(&fec->ievent, ievent); /* clear pending events */ | |
465 | ||
8f3ba2dc SH |
466 | /* on fifo error, soft-reset fec */ |
467 | if (ievent & (FEC_IEVENT_RFIFO_ERROR | FEC_IEVENT_XFIFO_ERROR)) { | |
468 | ||
469 | if (net_ratelimit() && (ievent & FEC_IEVENT_RFIFO_ERROR)) | |
470 | dev_warn(&dev->dev, "FEC_IEVENT_RFIFO_ERROR\n"); | |
471 | if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR)) | |
472 | dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n"); | |
473 | ||
9d1e5e40 | 474 | spin_lock(&priv->lock); |
8f3ba2dc | 475 | mpc52xx_fec_reset(dev); |
9d1e5e40 | 476 | spin_unlock(&priv->lock); |
8f3ba2dc | 477 | |
5d031e9e DP |
478 | return IRQ_HANDLED; |
479 | } | |
480 | ||
8f3ba2dc SH |
481 | if (ievent & ~FEC_IEVENT_TFINT) |
482 | dev_dbg(&dev->dev, "ievent: %08x\n", ievent); | |
5d031e9e | 483 | |
5d031e9e DP |
484 | return IRQ_HANDLED; |
485 | } | |
486 | ||
487 | /* | |
488 | * Get the current statistics. | |
489 | * This may be called with the card open or closed. | |
490 | */ | |
491 | static struct net_device_stats *mpc52xx_fec_get_stats(struct net_device *dev) | |
492 | { | |
493 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
494 | struct net_device_stats *stats = &dev->stats; | |
495 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
496 | ||
497 | stats->rx_bytes = in_be32(&fec->rmon_r_octets); | |
498 | stats->rx_packets = in_be32(&fec->rmon_r_packets); | |
499 | stats->rx_errors = in_be32(&fec->rmon_r_crc_align) + | |
500 | in_be32(&fec->rmon_r_undersize) + | |
501 | in_be32(&fec->rmon_r_oversize) + | |
502 | in_be32(&fec->rmon_r_frag) + | |
503 | in_be32(&fec->rmon_r_jab); | |
504 | ||
505 | stats->tx_bytes = in_be32(&fec->rmon_t_octets); | |
506 | stats->tx_packets = in_be32(&fec->rmon_t_packets); | |
507 | stats->tx_errors = in_be32(&fec->rmon_t_crc_align) + | |
508 | in_be32(&fec->rmon_t_undersize) + | |
509 | in_be32(&fec->rmon_t_oversize) + | |
510 | in_be32(&fec->rmon_t_frag) + | |
511 | in_be32(&fec->rmon_t_jab); | |
512 | ||
513 | stats->multicast = in_be32(&fec->rmon_r_mc_pkt); | |
514 | stats->collisions = in_be32(&fec->rmon_t_col); | |
515 | ||
516 | /* detailed rx_errors: */ | |
517 | stats->rx_length_errors = in_be32(&fec->rmon_r_undersize) | |
518 | + in_be32(&fec->rmon_r_oversize) | |
519 | + in_be32(&fec->rmon_r_frag) | |
520 | + in_be32(&fec->rmon_r_jab); | |
521 | stats->rx_over_errors = in_be32(&fec->r_macerr); | |
522 | stats->rx_crc_errors = in_be32(&fec->ieee_r_crc); | |
523 | stats->rx_frame_errors = in_be32(&fec->ieee_r_align); | |
524 | stats->rx_fifo_errors = in_be32(&fec->rmon_r_drop); | |
525 | stats->rx_missed_errors = in_be32(&fec->rmon_r_drop); | |
526 | ||
527 | /* detailed tx_errors: */ | |
528 | stats->tx_aborted_errors = 0; | |
529 | stats->tx_carrier_errors = in_be32(&fec->ieee_t_cserr); | |
530 | stats->tx_fifo_errors = in_be32(&fec->rmon_t_drop); | |
531 | stats->tx_heartbeat_errors = in_be32(&fec->ieee_t_sqe); | |
532 | stats->tx_window_errors = in_be32(&fec->ieee_t_lcol); | |
533 | ||
534 | return stats; | |
535 | } | |
536 | ||
537 | /* | |
538 | * Read MIB counters in order to reset them, | |
539 | * then zero all the stats fields in memory | |
540 | */ | |
541 | static void mpc52xx_fec_reset_stats(struct net_device *dev) | |
542 | { | |
543 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
544 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
545 | ||
546 | out_be32(&fec->mib_control, FEC_MIB_DISABLE); | |
cc154ac6 AV |
547 | memset_io(&fec->rmon_t_drop, 0, |
548 | offsetof(struct mpc52xx_fec, reserved10) - | |
549 | offsetof(struct mpc52xx_fec, rmon_t_drop)); | |
5d031e9e DP |
550 | out_be32(&fec->mib_control, 0); |
551 | ||
552 | memset(&dev->stats, 0, sizeof(dev->stats)); | |
553 | } | |
554 | ||
555 | /* | |
556 | * Set or clear the multicast filter for this adaptor. | |
557 | */ | |
558 | static void mpc52xx_fec_set_multicast_list(struct net_device *dev) | |
559 | { | |
560 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
561 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
562 | u32 rx_control; | |
563 | ||
564 | rx_control = in_be32(&fec->r_cntrl); | |
565 | ||
566 | if (dev->flags & IFF_PROMISC) { | |
567 | rx_control |= FEC_RCNTRL_PROM; | |
568 | out_be32(&fec->r_cntrl, rx_control); | |
569 | } else { | |
570 | rx_control &= ~FEC_RCNTRL_PROM; | |
571 | out_be32(&fec->r_cntrl, rx_control); | |
572 | ||
573 | if (dev->flags & IFF_ALLMULTI) { | |
574 | out_be32(&fec->gaddr1, 0xffffffff); | |
575 | out_be32(&fec->gaddr2, 0xffffffff); | |
576 | } else { | |
577 | u32 crc; | |
22bedad3 | 578 | struct netdev_hw_addr *ha; |
5d031e9e DP |
579 | u32 gaddr1 = 0x00000000; |
580 | u32 gaddr2 = 0x00000000; | |
581 | ||
22bedad3 JP |
582 | netdev_for_each_mc_addr(ha, dev) { |
583 | crc = ether_crc_le(6, ha->addr) >> 26; | |
5d031e9e DP |
584 | if (crc >= 32) |
585 | gaddr1 |= 1 << (crc-32); | |
586 | else | |
587 | gaddr2 |= 1 << crc; | |
5d031e9e DP |
588 | } |
589 | out_be32(&fec->gaddr1, gaddr1); | |
590 | out_be32(&fec->gaddr2, gaddr2); | |
591 | } | |
592 | } | |
593 | } | |
594 | ||
595 | /** | |
596 | * mpc52xx_fec_hw_init | |
597 | * @dev: network device | |
598 | * | |
599 | * Setup various hardware setting, only needed once on start | |
600 | */ | |
601 | static void mpc52xx_fec_hw_init(struct net_device *dev) | |
602 | { | |
603 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
604 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
605 | int i; | |
606 | ||
607 | /* Whack a reset. We should wait for this. */ | |
608 | out_be32(&fec->ecntrl, FEC_ECNTRL_RESET); | |
609 | for (i = 0; i < FEC_RESET_DELAY; ++i) { | |
610 | if ((in_be32(&fec->ecntrl) & FEC_ECNTRL_RESET) == 0) | |
611 | break; | |
612 | udelay(1); | |
613 | } | |
614 | if (i == FEC_RESET_DELAY) | |
615 | dev_err(&dev->dev, "FEC Reset timeout!\n"); | |
616 | ||
617 | /* set pause to 0x20 frames */ | |
618 | out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20); | |
619 | ||
620 | /* high service request will be deasserted when there's < 7 bytes in fifo | |
621 | * low service request will be deasserted when there's < 4*7 bytes in fifo | |
622 | */ | |
623 | out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
624 | out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
625 | ||
626 | /* alarm when <= x bytes in FIFO */ | |
627 | out_be32(&fec->rfifo_alarm, 0x0000030c); | |
628 | out_be32(&fec->tfifo_alarm, 0x00000100); | |
629 | ||
630 | /* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */ | |
631 | out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B); | |
632 | ||
633 | /* enable crc generation */ | |
634 | out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC); | |
635 | out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */ | |
636 | out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */ | |
637 | ||
638 | /* set phy speed. | |
639 | * this can't be done in phy driver, since it needs to be called | |
640 | * before fec stuff (even on resume) */ | |
ca816d98 | 641 | out_be32(&fec->mii_speed, priv->mdio_speed); |
5d031e9e DP |
642 | } |
643 | ||
644 | /** | |
645 | * mpc52xx_fec_start | |
646 | * @dev: network device | |
647 | * | |
648 | * This function is called to start or restart the FEC during a link | |
649 | * change. This happens on fifo errors or when switching between half | |
650 | * and full duplex. | |
651 | */ | |
652 | static void mpc52xx_fec_start(struct net_device *dev) | |
653 | { | |
654 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
655 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
656 | u32 rcntrl; | |
657 | u32 tcntrl; | |
658 | u32 tmp; | |
659 | ||
660 | /* clear sticky error bits */ | |
661 | tmp = FEC_FIFO_STATUS_ERR | FEC_FIFO_STATUS_UF | FEC_FIFO_STATUS_OF; | |
662 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp); | |
663 | out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp); | |
664 | ||
665 | /* FIFOs will reset on mpc52xx_fec_enable */ | |
666 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET); | |
667 | ||
668 | /* Set station address. */ | |
669 | mpc52xx_fec_set_paddr(dev, dev->dev_addr); | |
670 | ||
671 | mpc52xx_fec_set_multicast_list(dev); | |
672 | ||
673 | /* set max frame len, enable flow control, select mii mode */ | |
674 | rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */ | |
675 | rcntrl |= FEC_RCNTRL_FCE; | |
676 | ||
ca816d98 | 677 | if (!priv->seven_wire_mode) |
5d031e9e DP |
678 | rcntrl |= FEC_RCNTRL_MII_MODE; |
679 | ||
680 | if (priv->duplex == DUPLEX_FULL) | |
681 | tcntrl = FEC_TCNTRL_FDEN; /* FD enable */ | |
682 | else { | |
683 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
684 | tcntrl = 0; | |
685 | } | |
686 | out_be32(&fec->r_cntrl, rcntrl); | |
687 | out_be32(&fec->x_cntrl, tcntrl); | |
688 | ||
689 | /* Clear any outstanding interrupt. */ | |
690 | out_be32(&fec->ievent, 0xffffffff); | |
691 | ||
692 | /* Enable interrupts we wish to service. */ | |
693 | out_be32(&fec->imask, FEC_IMASK_ENABLE); | |
694 | ||
695 | /* And last, enable the transmit and receive processing. */ | |
696 | out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN); | |
697 | out_be32(&fec->r_des_active, 0x01000000); | |
698 | } | |
699 | ||
700 | /** | |
701 | * mpc52xx_fec_stop | |
702 | * @dev: network device | |
703 | * | |
704 | * stop all activity on fec and empty dma buffers | |
705 | */ | |
706 | static void mpc52xx_fec_stop(struct net_device *dev) | |
707 | { | |
708 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
709 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
710 | unsigned long timeout; | |
711 | ||
712 | /* disable all interrupts */ | |
713 | out_be32(&fec->imask, 0); | |
714 | ||
715 | /* Disable the rx task. */ | |
716 | bcom_disable(priv->rx_dmatsk); | |
717 | ||
718 | /* Wait for tx queue to drain, but only if we're in process context */ | |
719 | if (!in_interrupt()) { | |
720 | timeout = jiffies + msecs_to_jiffies(2000); | |
721 | while (time_before(jiffies, timeout) && | |
722 | !bcom_queue_empty(priv->tx_dmatsk)) | |
723 | msleep(100); | |
724 | ||
725 | if (time_after_eq(jiffies, timeout)) | |
726 | dev_err(&dev->dev, "queues didn't drain\n"); | |
727 | #if 1 | |
728 | if (time_after_eq(jiffies, timeout)) { | |
729 | dev_err(&dev->dev, " tx: index: %i, outdex: %i\n", | |
730 | priv->tx_dmatsk->index, | |
731 | priv->tx_dmatsk->outdex); | |
732 | dev_err(&dev->dev, " rx: index: %i, outdex: %i\n", | |
733 | priv->rx_dmatsk->index, | |
734 | priv->rx_dmatsk->outdex); | |
735 | } | |
736 | #endif | |
737 | } | |
738 | ||
739 | bcom_disable(priv->tx_dmatsk); | |
740 | ||
741 | /* Stop FEC */ | |
742 | out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN); | |
5d031e9e DP |
743 | } |
744 | ||
745 | /* reset fec and bestcomm tasks */ | |
746 | static void mpc52xx_fec_reset(struct net_device *dev) | |
747 | { | |
748 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
749 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
750 | ||
751 | mpc52xx_fec_stop(dev); | |
752 | ||
753 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status)); | |
754 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO); | |
755 | ||
756 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
757 | ||
758 | mpc52xx_fec_hw_init(dev); | |
759 | ||
5d031e9e DP |
760 | bcom_fec_rx_reset(priv->rx_dmatsk); |
761 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
762 | ||
763 | mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
764 | ||
765 | bcom_enable(priv->rx_dmatsk); | |
766 | bcom_enable(priv->tx_dmatsk); | |
767 | ||
768 | mpc52xx_fec_start(dev); | |
1e4e0767 AL |
769 | |
770 | netif_wake_queue(dev); | |
5d031e9e DP |
771 | } |
772 | ||
773 | ||
774 | /* ethtool interface */ | |
5d031e9e DP |
775 | |
776 | static int mpc52xx_fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
777 | { | |
778 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
779 | |
780 | if (!priv->phydev) | |
781 | return -ENODEV; | |
782 | ||
5d031e9e DP |
783 | return phy_ethtool_gset(priv->phydev, cmd); |
784 | } | |
785 | ||
786 | static int mpc52xx_fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
787 | { | |
788 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
789 | |
790 | if (!priv->phydev) | |
791 | return -ENODEV; | |
792 | ||
5d031e9e DP |
793 | return phy_ethtool_sset(priv->phydev, cmd); |
794 | } | |
795 | ||
796 | static u32 mpc52xx_fec_get_msglevel(struct net_device *dev) | |
797 | { | |
798 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
799 | return priv->msg_enable; | |
800 | } | |
801 | ||
802 | static void mpc52xx_fec_set_msglevel(struct net_device *dev, u32 level) | |
803 | { | |
804 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
805 | priv->msg_enable = level; | |
806 | } | |
807 | ||
808 | static const struct ethtool_ops mpc52xx_fec_ethtool_ops = { | |
5d031e9e DP |
809 | .get_settings = mpc52xx_fec_get_settings, |
810 | .set_settings = mpc52xx_fec_set_settings, | |
811 | .get_link = ethtool_op_get_link, | |
812 | .get_msglevel = mpc52xx_fec_get_msglevel, | |
813 | .set_msglevel = mpc52xx_fec_set_msglevel, | |
814 | }; | |
815 | ||
816 | ||
817 | static int mpc52xx_fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
818 | { | |
819 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
820 | ||
9404c82b GL |
821 | if (!priv->phydev) |
822 | return -ENOTSUPP; | |
823 | ||
28b04113 | 824 | return phy_mii_ioctl(priv->phydev, rq, cmd); |
5d031e9e DP |
825 | } |
826 | ||
d360009c HS |
827 | static const struct net_device_ops mpc52xx_fec_netdev_ops = { |
828 | .ndo_open = mpc52xx_fec_open, | |
829 | .ndo_stop = mpc52xx_fec_close, | |
830 | .ndo_start_xmit = mpc52xx_fec_start_xmit, | |
831 | .ndo_set_multicast_list = mpc52xx_fec_set_multicast_list, | |
832 | .ndo_set_mac_address = mpc52xx_fec_set_mac_address, | |
833 | .ndo_validate_addr = eth_validate_addr, | |
834 | .ndo_do_ioctl = mpc52xx_fec_ioctl, | |
835 | .ndo_change_mtu = eth_change_mtu, | |
836 | .ndo_tx_timeout = mpc52xx_fec_tx_timeout, | |
837 | .ndo_get_stats = mpc52xx_fec_get_stats, | |
838 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
839 | .ndo_poll_controller = mpc52xx_fec_poll_controller, | |
840 | #endif | |
841 | }; | |
842 | ||
5d031e9e DP |
843 | /* ======================================================================== */ |
844 | /* OF Driver */ | |
845 | /* ======================================================================== */ | |
846 | ||
74888760 | 847 | static int __devinit mpc52xx_fec_probe(struct platform_device *op) |
5d031e9e DP |
848 | { |
849 | int rv; | |
850 | struct net_device *ndev; | |
851 | struct mpc52xx_fec_priv *priv = NULL; | |
852 | struct resource mem; | |
80791be1 GL |
853 | const u32 *prop; |
854 | int prop_size; | |
5d031e9e DP |
855 | |
856 | phys_addr_t rx_fifo; | |
857 | phys_addr_t tx_fifo; | |
858 | ||
859 | /* Get the ether ndev & it's private zone */ | |
860 | ndev = alloc_etherdev(sizeof(struct mpc52xx_fec_priv)); | |
861 | if (!ndev) | |
862 | return -ENOMEM; | |
863 | ||
864 | priv = netdev_priv(ndev); | |
ca816d98 | 865 | priv->ndev = ndev; |
5d031e9e DP |
866 | |
867 | /* Reserve FEC control zone */ | |
61c7a080 | 868 | rv = of_address_to_resource(op->dev.of_node, 0, &mem); |
5d031e9e DP |
869 | if (rv) { |
870 | printk(KERN_ERR DRIVER_NAME ": " | |
871 | "Error while parsing device node resource\n" ); | |
fabc51a6 | 872 | goto err_netdev; |
5d031e9e | 873 | } |
28f65c11 | 874 | if (resource_size(&mem) < sizeof(struct mpc52xx_fec)) { |
5d031e9e | 875 | printk(KERN_ERR DRIVER_NAME |
28f65c11 JP |
876 | " - invalid resource size (%lx < %x), check mpc52xx_devices.c\n", |
877 | (unsigned long)resource_size(&mem), | |
878 | sizeof(struct mpc52xx_fec)); | |
fabc51a6 KV |
879 | rv = -EINVAL; |
880 | goto err_netdev; | |
5d031e9e DP |
881 | } |
882 | ||
fabc51a6 KV |
883 | if (!request_mem_region(mem.start, sizeof(struct mpc52xx_fec), |
884 | DRIVER_NAME)) { | |
885 | rv = -EBUSY; | |
886 | goto err_netdev; | |
887 | } | |
5d031e9e DP |
888 | |
889 | /* Init ether ndev with what we have */ | |
d360009c | 890 | ndev->netdev_ops = &mpc52xx_fec_netdev_ops; |
5d031e9e | 891 | ndev->ethtool_ops = &mpc52xx_fec_ethtool_ops; |
5d031e9e DP |
892 | ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT; |
893 | ndev->base_addr = mem.start; | |
ca816d98 | 894 | SET_NETDEV_DEV(ndev, &op->dev); |
5d031e9e DP |
895 | |
896 | spin_lock_init(&priv->lock); | |
897 | ||
898 | /* ioremap the zones */ | |
899 | priv->fec = ioremap(mem.start, sizeof(struct mpc52xx_fec)); | |
900 | ||
901 | if (!priv->fec) { | |
902 | rv = -ENOMEM; | |
fabc51a6 | 903 | goto err_mem_region; |
5d031e9e DP |
904 | } |
905 | ||
906 | /* Bestcomm init */ | |
907 | rx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, rfifo_data); | |
908 | tx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, tfifo_data); | |
909 | ||
910 | priv->rx_dmatsk = bcom_fec_rx_init(FEC_RX_NUM_BD, rx_fifo, FEC_RX_BUFFER_SIZE); | |
911 | priv->tx_dmatsk = bcom_fec_tx_init(FEC_TX_NUM_BD, tx_fifo); | |
912 | ||
913 | if (!priv->rx_dmatsk || !priv->tx_dmatsk) { | |
914 | printk(KERN_ERR DRIVER_NAME ": Can not init SDMA tasks\n" ); | |
915 | rv = -ENOMEM; | |
fabc51a6 | 916 | goto err_rx_tx_dmatsk; |
5d031e9e DP |
917 | } |
918 | ||
919 | /* Get the IRQ we need one by one */ | |
920 | /* Control */ | |
61c7a080 | 921 | ndev->irq = irq_of_parse_and_map(op->dev.of_node, 0); |
5d031e9e DP |
922 | |
923 | /* RX */ | |
924 | priv->r_irq = bcom_get_task_irq(priv->rx_dmatsk); | |
925 | ||
926 | /* TX */ | |
927 | priv->t_irq = bcom_get_task_irq(priv->tx_dmatsk); | |
928 | ||
929 | /* MAC address init */ | |
930 | if (!is_zero_ether_addr(mpc52xx_fec_mac_addr)) | |
931 | memcpy(ndev->dev_addr, mpc52xx_fec_mac_addr, 6); | |
932 | else | |
933 | mpc52xx_fec_get_paddr(ndev, ndev->dev_addr); | |
934 | ||
935 | priv->msg_enable = netif_msg_init(debug, MPC52xx_MESSAGES_DEFAULT); | |
5d031e9e | 936 | |
80791be1 GL |
937 | /* |
938 | * Link mode configuration | |
939 | */ | |
5d031e9e | 940 | |
80791be1 | 941 | /* Start with safe defaults for link connection */ |
80791be1 GL |
942 | priv->speed = 100; |
943 | priv->duplex = DUPLEX_HALF; | |
61c7a080 | 944 | priv->mdio_speed = ((mpc5xxx_get_bus_frequency(op->dev.of_node) >> 20) / 5) << 1; |
80791be1 GL |
945 | |
946 | /* The current speed preconfigures the speed of the MII link */ | |
61c7a080 | 947 | prop = of_get_property(op->dev.of_node, "current-speed", &prop_size); |
80791be1 GL |
948 | if (prop && (prop_size >= sizeof(u32) * 2)) { |
949 | priv->speed = prop[0]; | |
950 | priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF; | |
951 | } | |
5d031e9e | 952 | |
ca816d98 | 953 | /* If there is a phy handle, then get the PHY node */ |
61c7a080 | 954 | priv->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0); |
ca816d98 GL |
955 | |
956 | /* the 7-wire property means don't use MII mode */ | |
61c7a080 | 957 | if (of_find_property(op->dev.of_node, "fsl,7-wire-mode", NULL)) { |
ca816d98 GL |
958 | priv->seven_wire_mode = 1; |
959 | dev_info(&ndev->dev, "using 7-wire PHY mode\n"); | |
5d031e9e DP |
960 | } |
961 | ||
962 | /* Hardware init */ | |
963 | mpc52xx_fec_hw_init(ndev); | |
5d031e9e DP |
964 | mpc52xx_fec_reset_stats(ndev); |
965 | ||
5d031e9e DP |
966 | rv = register_netdev(ndev); |
967 | if (rv < 0) | |
fabc51a6 | 968 | goto err_node; |
5d031e9e DP |
969 | |
970 | /* We're done ! */ | |
971 | dev_set_drvdata(&op->dev, ndev); | |
972 | ||
973 | return 0; | |
974 | ||
fabc51a6 KV |
975 | err_node: |
976 | of_node_put(priv->phy_node); | |
5d031e9e | 977 | irq_dispose_mapping(ndev->irq); |
fabc51a6 | 978 | err_rx_tx_dmatsk: |
5d031e9e DP |
979 | if (priv->rx_dmatsk) |
980 | bcom_fec_rx_release(priv->rx_dmatsk); | |
981 | if (priv->tx_dmatsk) | |
982 | bcom_fec_tx_release(priv->tx_dmatsk); | |
fabc51a6 KV |
983 | iounmap(priv->fec); |
984 | err_mem_region: | |
5d031e9e | 985 | release_mem_region(mem.start, sizeof(struct mpc52xx_fec)); |
fabc51a6 | 986 | err_netdev: |
5d031e9e DP |
987 | free_netdev(ndev); |
988 | ||
989 | return rv; | |
990 | } | |
991 | ||
992 | static int | |
2dc11581 | 993 | mpc52xx_fec_remove(struct platform_device *op) |
5d031e9e DP |
994 | { |
995 | struct net_device *ndev; | |
996 | struct mpc52xx_fec_priv *priv; | |
997 | ||
998 | ndev = dev_get_drvdata(&op->dev); | |
999 | priv = netdev_priv(ndev); | |
1000 | ||
1001 | unregister_netdev(ndev); | |
1002 | ||
ca816d98 GL |
1003 | if (priv->phy_node) |
1004 | of_node_put(priv->phy_node); | |
1005 | priv->phy_node = NULL; | |
1006 | ||
5d031e9e DP |
1007 | irq_dispose_mapping(ndev->irq); |
1008 | ||
1009 | bcom_fec_rx_release(priv->rx_dmatsk); | |
1010 | bcom_fec_tx_release(priv->tx_dmatsk); | |
1011 | ||
1012 | iounmap(priv->fec); | |
1013 | ||
1014 | release_mem_region(ndev->base_addr, sizeof(struct mpc52xx_fec)); | |
1015 | ||
1016 | free_netdev(ndev); | |
1017 | ||
1018 | dev_set_drvdata(&op->dev, NULL); | |
1019 | return 0; | |
1020 | } | |
1021 | ||
1022 | #ifdef CONFIG_PM | |
2dc11581 | 1023 | static int mpc52xx_fec_of_suspend(struct platform_device *op, pm_message_t state) |
5d031e9e DP |
1024 | { |
1025 | struct net_device *dev = dev_get_drvdata(&op->dev); | |
1026 | ||
1027 | if (netif_running(dev)) | |
1028 | mpc52xx_fec_close(dev); | |
1029 | ||
1030 | return 0; | |
1031 | } | |
1032 | ||
2dc11581 | 1033 | static int mpc52xx_fec_of_resume(struct platform_device *op) |
5d031e9e DP |
1034 | { |
1035 | struct net_device *dev = dev_get_drvdata(&op->dev); | |
1036 | ||
1037 | mpc52xx_fec_hw_init(dev); | |
1038 | mpc52xx_fec_reset_stats(dev); | |
1039 | ||
1040 | if (netif_running(dev)) | |
1041 | mpc52xx_fec_open(dev); | |
1042 | ||
1043 | return 0; | |
1044 | } | |
1045 | #endif | |
1046 | ||
1047 | static struct of_device_id mpc52xx_fec_match[] = { | |
3b5ebf8e GL |
1048 | { .compatible = "fsl,mpc5200b-fec", }, |
1049 | { .compatible = "fsl,mpc5200-fec", }, | |
1050 | { .compatible = "mpc5200-fec", }, | |
5d031e9e DP |
1051 | { } |
1052 | }; | |
1053 | ||
1054 | MODULE_DEVICE_TABLE(of, mpc52xx_fec_match); | |
1055 | ||
74888760 | 1056 | static struct platform_driver mpc52xx_fec_driver = { |
4018294b GL |
1057 | .driver = { |
1058 | .name = DRIVER_NAME, | |
1059 | .owner = THIS_MODULE, | |
1060 | .of_match_table = mpc52xx_fec_match, | |
1061 | }, | |
5d031e9e DP |
1062 | .probe = mpc52xx_fec_probe, |
1063 | .remove = mpc52xx_fec_remove, | |
1064 | #ifdef CONFIG_PM | |
1065 | .suspend = mpc52xx_fec_of_suspend, | |
1066 | .resume = mpc52xx_fec_of_resume, | |
1067 | #endif | |
1068 | }; | |
1069 | ||
1070 | ||
1071 | /* ======================================================================== */ | |
1072 | /* Module */ | |
1073 | /* ======================================================================== */ | |
1074 | ||
1075 | static int __init | |
1076 | mpc52xx_fec_init(void) | |
1077 | { | |
1078 | #ifdef CONFIG_FEC_MPC52xx_MDIO | |
1079 | int ret; | |
74888760 | 1080 | ret = platform_driver_register(&mpc52xx_fec_mdio_driver); |
5d031e9e DP |
1081 | if (ret) { |
1082 | printk(KERN_ERR DRIVER_NAME ": failed to register mdio driver\n"); | |
1083 | return ret; | |
1084 | } | |
1085 | #endif | |
74888760 | 1086 | return platform_driver_register(&mpc52xx_fec_driver); |
5d031e9e DP |
1087 | } |
1088 | ||
1089 | static void __exit | |
1090 | mpc52xx_fec_exit(void) | |
1091 | { | |
74888760 | 1092 | platform_driver_unregister(&mpc52xx_fec_driver); |
5d031e9e | 1093 | #ifdef CONFIG_FEC_MPC52xx_MDIO |
74888760 | 1094 | platform_driver_unregister(&mpc52xx_fec_mdio_driver); |
5d031e9e DP |
1095 | #endif |
1096 | } | |
1097 | ||
1098 | ||
1099 | module_init(mpc52xx_fec_init); | |
1100 | module_exit(mpc52xx_fec_exit); | |
1101 | ||
1102 | MODULE_LICENSE("GPL"); | |
1103 | MODULE_AUTHOR("Dale Farnsworth"); | |
1104 | MODULE_DESCRIPTION("Ethernet driver for the Freescale MPC52xx FEC"); |