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48257c4f PA |
1 | /* |
2 | * Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx. | |
3 | * | |
4 | * Copyright (c) 2003 Intracom S.A. | |
5 | * by Pantelis Antoniou <panto@intracom.gr> | |
6 | * | |
7 | * 2005 (c) MontaVista Software, Inc. | |
8 | * Vitaly Bordug <vbordug@ru.mvista.com> | |
9 | * | |
10 | * This file is licensed under the terms of the GNU General Public License | |
11 | * version 2. This program is licensed "as is" without any warranty of any | |
12 | * kind, whether express or implied. | |
13 | */ | |
14 | ||
15 | #include <linux/config.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/types.h> | |
19 | #include <linux/sched.h> | |
20 | #include <linux/string.h> | |
21 | #include <linux/ptrace.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <linux/pci.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/etherdevice.h> | |
31 | #include <linux/skbuff.h> | |
32 | #include <linux/spinlock.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/ethtool.h> | |
35 | #include <linux/bitops.h> | |
36 | #include <linux/fs.h> | |
f7b99969 | 37 | #include <linux/platform_device.h> |
48257c4f PA |
38 | |
39 | #include <asm/irq.h> | |
40 | #include <asm/uaccess.h> | |
41 | ||
42 | #ifdef CONFIG_8xx | |
43 | #include <asm/8xx_immap.h> | |
44 | #include <asm/pgtable.h> | |
45 | #include <asm/mpc8xx.h> | |
46 | #include <asm/commproc.h> | |
47 | #endif | |
48 | ||
49 | #include "fs_enet.h" | |
50 | ||
51 | /*************************************************/ | |
52 | ||
53 | #if defined(CONFIG_CPM1) | |
54 | /* for a 8xx __raw_xxx's are sufficient */ | |
55 | #define __fs_out32(addr, x) __raw_writel(x, addr) | |
56 | #define __fs_out16(addr, x) __raw_writew(x, addr) | |
57 | #define __fs_out8(addr, x) __raw_writeb(x, addr) | |
58 | #define __fs_in32(addr) __raw_readl(addr) | |
59 | #define __fs_in16(addr) __raw_readw(addr) | |
60 | #define __fs_in8(addr) __raw_readb(addr) | |
61 | #else | |
62 | /* for others play it safe */ | |
63 | #define __fs_out32(addr, x) out_be32(addr, x) | |
64 | #define __fs_out16(addr, x) out_be16(addr, x) | |
65 | #define __fs_in32(addr) in_be32(addr) | |
66 | #define __fs_in16(addr) in_be16(addr) | |
67 | #endif | |
68 | ||
69 | /* write, read, set bits, clear bits */ | |
70 | #define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v)) | |
71 | #define R32(_p, _m) __fs_in32(&(_p)->_m) | |
72 | #define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v)) | |
73 | #define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v)) | |
74 | ||
75 | #define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v)) | |
76 | #define R16(_p, _m) __fs_in16(&(_p)->_m) | |
77 | #define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v)) | |
78 | #define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v)) | |
79 | ||
80 | #define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v)) | |
81 | #define R8(_p, _m) __fs_in8(&(_p)->_m) | |
82 | #define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v)) | |
83 | #define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v)) | |
84 | ||
85 | #define SCC_MAX_MULTICAST_ADDRS 64 | |
86 | ||
87 | /* | |
88 | * Delay to wait for SCC reset command to complete (in us) | |
89 | */ | |
90 | #define SCC_RESET_DELAY 50 | |
91 | #define MAX_CR_CMD_LOOPS 10000 | |
92 | ||
93 | static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op) | |
94 | { | |
95 | cpm8xx_t *cpmp = &((immap_t *)fs_enet_immap)->im_cpm; | |
96 | u32 v, ch; | |
97 | int i = 0; | |
98 | ||
99 | ch = fep->scc.idx << 2; | |
100 | v = mk_cr_cmd(ch, op); | |
101 | W16(cpmp, cp_cpcr, v | CPM_CR_FLG); | |
102 | for (i = 0; i < MAX_CR_CMD_LOOPS; i++) | |
103 | if ((R16(cpmp, cp_cpcr) & CPM_CR_FLG) == 0) | |
104 | break; | |
105 | ||
106 | if (i >= MAX_CR_CMD_LOOPS) { | |
107 | printk(KERN_ERR "%s(): Not able to issue CPM command\n", | |
108 | __FUNCTION__); | |
109 | return 1; | |
110 | } | |
111 | return 0; | |
112 | } | |
113 | ||
114 | static int do_pd_setup(struct fs_enet_private *fep) | |
115 | { | |
116 | struct platform_device *pdev = to_platform_device(fep->dev); | |
117 | struct resource *r; | |
118 | ||
119 | /* Fill out IRQ field */ | |
120 | fep->interrupt = platform_get_irq_byname(pdev, "interrupt"); | |
48944738 DV |
121 | if (fep->interrupt < 0) |
122 | return -EINVAL; | |
48257c4f PA |
123 | |
124 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); | |
125 | fep->scc.sccp = (void *)r->start; | |
126 | ||
127 | if (fep->scc.sccp == NULL) | |
128 | return -EINVAL; | |
129 | ||
130 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram"); | |
131 | fep->scc.ep = (void *)r->start; | |
132 | ||
133 | if (fep->scc.ep == NULL) | |
134 | return -EINVAL; | |
135 | ||
136 | return 0; | |
137 | } | |
138 | ||
139 | #define SCC_NAPI_RX_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB) | |
140 | #define SCC_RX_EVENT (SCCE_ENET_RXF) | |
141 | #define SCC_TX_EVENT (SCCE_ENET_TXB) | |
142 | #define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY) | |
143 | ||
144 | static int setup_data(struct net_device *dev) | |
145 | { | |
146 | struct fs_enet_private *fep = netdev_priv(dev); | |
147 | const struct fs_platform_info *fpi = fep->fpi; | |
148 | ||
149 | fep->scc.idx = fs_get_scc_index(fpi->fs_no); | |
150 | if ((unsigned int)fep->fcc.idx > 4) /* max 4 SCCs */ | |
151 | return -EINVAL; | |
152 | ||
153 | do_pd_setup(fep); | |
154 | ||
155 | fep->scc.hthi = 0; | |
156 | fep->scc.htlo = 0; | |
157 | ||
158 | fep->ev_napi_rx = SCC_NAPI_RX_EVENT_MSK; | |
159 | fep->ev_rx = SCC_RX_EVENT; | |
160 | fep->ev_tx = SCC_TX_EVENT; | |
161 | fep->ev_err = SCC_ERR_EVENT_MSK; | |
162 | ||
163 | return 0; | |
164 | } | |
165 | ||
166 | static int allocate_bd(struct net_device *dev) | |
167 | { | |
168 | struct fs_enet_private *fep = netdev_priv(dev); | |
169 | const struct fs_platform_info *fpi = fep->fpi; | |
170 | ||
171 | fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) * | |
172 | sizeof(cbd_t), 8); | |
173 | if (IS_DPERR(fep->ring_mem_addr)) | |
174 | return -ENOMEM; | |
175 | ||
176 | fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr); | |
177 | ||
178 | return 0; | |
179 | } | |
180 | ||
181 | static void free_bd(struct net_device *dev) | |
182 | { | |
183 | struct fs_enet_private *fep = netdev_priv(dev); | |
184 | ||
185 | if (fep->ring_base) | |
186 | cpm_dpfree(fep->ring_mem_addr); | |
187 | } | |
188 | ||
189 | static void cleanup_data(struct net_device *dev) | |
190 | { | |
191 | /* nothing */ | |
192 | } | |
193 | ||
194 | static void set_promiscuous_mode(struct net_device *dev) | |
195 | { | |
196 | struct fs_enet_private *fep = netdev_priv(dev); | |
197 | scc_t *sccp = fep->scc.sccp; | |
198 | ||
199 | S16(sccp, scc_psmr, SCC_PSMR_PRO); | |
200 | } | |
201 | ||
202 | static void set_multicast_start(struct net_device *dev) | |
203 | { | |
204 | struct fs_enet_private *fep = netdev_priv(dev); | |
205 | scc_enet_t *ep = fep->scc.ep; | |
206 | ||
207 | W16(ep, sen_gaddr1, 0); | |
208 | W16(ep, sen_gaddr2, 0); | |
209 | W16(ep, sen_gaddr3, 0); | |
210 | W16(ep, sen_gaddr4, 0); | |
211 | } | |
212 | ||
213 | static void set_multicast_one(struct net_device *dev, const u8 * mac) | |
214 | { | |
215 | struct fs_enet_private *fep = netdev_priv(dev); | |
216 | scc_enet_t *ep = fep->scc.ep; | |
217 | u16 taddrh, taddrm, taddrl; | |
218 | ||
219 | taddrh = ((u16) mac[5] << 8) | mac[4]; | |
220 | taddrm = ((u16) mac[3] << 8) | mac[2]; | |
221 | taddrl = ((u16) mac[1] << 8) | mac[0]; | |
222 | ||
223 | W16(ep, sen_taddrh, taddrh); | |
224 | W16(ep, sen_taddrm, taddrm); | |
225 | W16(ep, sen_taddrl, taddrl); | |
226 | scc_cr_cmd(fep, CPM_CR_SET_GADDR); | |
227 | } | |
228 | ||
229 | static void set_multicast_finish(struct net_device *dev) | |
230 | { | |
231 | struct fs_enet_private *fep = netdev_priv(dev); | |
232 | scc_t *sccp = fep->scc.sccp; | |
233 | scc_enet_t *ep = fep->scc.ep; | |
234 | ||
235 | /* clear promiscuous always */ | |
236 | C16(sccp, scc_psmr, SCC_PSMR_PRO); | |
237 | ||
238 | /* if all multi or too many multicasts; just enable all */ | |
239 | if ((dev->flags & IFF_ALLMULTI) != 0 || | |
240 | dev->mc_count > SCC_MAX_MULTICAST_ADDRS) { | |
241 | ||
242 | W16(ep, sen_gaddr1, 0xffff); | |
243 | W16(ep, sen_gaddr2, 0xffff); | |
244 | W16(ep, sen_gaddr3, 0xffff); | |
245 | W16(ep, sen_gaddr4, 0xffff); | |
246 | } | |
247 | } | |
248 | ||
249 | static void set_multicast_list(struct net_device *dev) | |
250 | { | |
251 | struct dev_mc_list *pmc; | |
252 | ||
253 | if ((dev->flags & IFF_PROMISC) == 0) { | |
254 | set_multicast_start(dev); | |
255 | for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) | |
256 | set_multicast_one(dev, pmc->dmi_addr); | |
257 | set_multicast_finish(dev); | |
258 | } else | |
259 | set_promiscuous_mode(dev); | |
260 | } | |
261 | ||
262 | /* | |
263 | * This function is called to start or restart the FEC during a link | |
264 | * change. This only happens when switching between half and full | |
265 | * duplex. | |
266 | */ | |
267 | static void restart(struct net_device *dev) | |
268 | { | |
269 | struct fs_enet_private *fep = netdev_priv(dev); | |
270 | scc_t *sccp = fep->scc.sccp; | |
271 | scc_enet_t *ep = fep->scc.ep; | |
272 | const struct fs_platform_info *fpi = fep->fpi; | |
273 | u16 paddrh, paddrm, paddrl; | |
274 | const unsigned char *mac; | |
275 | int i; | |
276 | ||
277 | C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
278 | ||
279 | /* clear everything (slow & steady does it) */ | |
280 | for (i = 0; i < sizeof(*ep); i++) | |
281 | __fs_out8((char *)ep + i, 0); | |
282 | ||
283 | /* point to bds */ | |
284 | W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr); | |
285 | W16(ep, sen_genscc.scc_tbase, | |
286 | fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring); | |
287 | ||
288 | /* Initialize function code registers for big-endian. | |
289 | */ | |
290 | W8(ep, sen_genscc.scc_rfcr, SCC_EB); | |
291 | W8(ep, sen_genscc.scc_tfcr, SCC_EB); | |
292 | ||
293 | /* Set maximum bytes per receive buffer. | |
294 | * This appears to be an Ethernet frame size, not the buffer | |
295 | * fragment size. It must be a multiple of four. | |
296 | */ | |
297 | W16(ep, sen_genscc.scc_mrblr, 0x5f0); | |
298 | ||
299 | /* Set CRC preset and mask. | |
300 | */ | |
301 | W32(ep, sen_cpres, 0xffffffff); | |
302 | W32(ep, sen_cmask, 0xdebb20e3); | |
303 | ||
304 | W32(ep, sen_crcec, 0); /* CRC Error counter */ | |
305 | W32(ep, sen_alec, 0); /* alignment error counter */ | |
306 | W32(ep, sen_disfc, 0); /* discard frame counter */ | |
307 | ||
308 | W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */ | |
309 | W16(ep, sen_retlim, 15); /* Retry limit threshold */ | |
310 | ||
311 | W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */ | |
312 | ||
313 | W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */ | |
314 | ||
315 | W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */ | |
316 | W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */ | |
317 | ||
318 | /* Clear hash tables. | |
319 | */ | |
320 | W16(ep, sen_gaddr1, 0); | |
321 | W16(ep, sen_gaddr2, 0); | |
322 | W16(ep, sen_gaddr3, 0); | |
323 | W16(ep, sen_gaddr4, 0); | |
324 | W16(ep, sen_iaddr1, 0); | |
325 | W16(ep, sen_iaddr2, 0); | |
326 | W16(ep, sen_iaddr3, 0); | |
327 | W16(ep, sen_iaddr4, 0); | |
328 | ||
329 | /* set address | |
330 | */ | |
331 | mac = dev->dev_addr; | |
332 | paddrh = ((u16) mac[5] << 8) | mac[4]; | |
333 | paddrm = ((u16) mac[3] << 8) | mac[2]; | |
334 | paddrl = ((u16) mac[1] << 8) | mac[0]; | |
335 | ||
336 | W16(ep, sen_paddrh, paddrh); | |
337 | W16(ep, sen_paddrm, paddrm); | |
338 | W16(ep, sen_paddrl, paddrl); | |
339 | ||
340 | W16(ep, sen_pper, 0); | |
341 | W16(ep, sen_taddrl, 0); | |
342 | W16(ep, sen_taddrm, 0); | |
343 | W16(ep, sen_taddrh, 0); | |
344 | ||
345 | fs_init_bds(dev); | |
346 | ||
347 | scc_cr_cmd(fep, CPM_CR_INIT_TRX); | |
348 | ||
349 | W16(sccp, scc_scce, 0xffff); | |
350 | ||
351 | /* Enable interrupts we wish to service. | |
352 | */ | |
353 | W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB); | |
354 | ||
355 | /* Set GSMR_H to enable all normal operating modes. | |
356 | * Set GSMR_L to enable Ethernet to MC68160. | |
357 | */ | |
358 | W32(sccp, scc_gsmrh, 0); | |
359 | W32(sccp, scc_gsmrl, | |
360 | SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | | |
361 | SCC_GSMRL_MODE_ENET); | |
362 | ||
363 | /* Set sync/delimiters. | |
364 | */ | |
365 | W16(sccp, scc_dsr, 0xd555); | |
366 | ||
367 | /* Set processing mode. Use Ethernet CRC, catch broadcast, and | |
368 | * start frame search 22 bit times after RENA. | |
369 | */ | |
370 | W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22); | |
371 | ||
372 | /* Set full duplex mode if needed */ | |
373 | if (fep->duplex) | |
374 | S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE); | |
375 | ||
376 | S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
377 | } | |
378 | ||
379 | static void stop(struct net_device *dev) | |
380 | { | |
381 | struct fs_enet_private *fep = netdev_priv(dev); | |
382 | scc_t *sccp = fep->scc.sccp; | |
383 | int i; | |
384 | ||
385 | for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++) | |
386 | udelay(1); | |
387 | ||
388 | if (i == SCC_RESET_DELAY) | |
389 | printk(KERN_WARNING DRV_MODULE_NAME | |
390 | ": %s SCC timeout on graceful transmit stop\n", | |
391 | dev->name); | |
392 | ||
393 | W16(sccp, scc_sccm, 0); | |
394 | C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); | |
395 | ||
396 | fs_cleanup_bds(dev); | |
397 | } | |
398 | ||
399 | static void pre_request_irq(struct net_device *dev, int irq) | |
400 | { | |
401 | immap_t *immap = fs_enet_immap; | |
402 | u32 siel; | |
403 | ||
404 | /* SIU interrupt */ | |
405 | if (irq >= SIU_IRQ0 && irq < SIU_LEVEL7) { | |
406 | ||
407 | siel = in_be32(&immap->im_siu_conf.sc_siel); | |
408 | if ((irq & 1) == 0) | |
409 | siel |= (0x80000000 >> irq); | |
410 | else | |
411 | siel &= ~(0x80000000 >> (irq & ~1)); | |
412 | out_be32(&immap->im_siu_conf.sc_siel, siel); | |
413 | } | |
414 | } | |
415 | ||
416 | static void post_free_irq(struct net_device *dev, int irq) | |
417 | { | |
418 | /* nothing */ | |
419 | } | |
420 | ||
421 | static void napi_clear_rx_event(struct net_device *dev) | |
422 | { | |
423 | struct fs_enet_private *fep = netdev_priv(dev); | |
424 | scc_t *sccp = fep->scc.sccp; | |
425 | ||
426 | W16(sccp, scc_scce, SCC_NAPI_RX_EVENT_MSK); | |
427 | } | |
428 | ||
429 | static void napi_enable_rx(struct net_device *dev) | |
430 | { | |
431 | struct fs_enet_private *fep = netdev_priv(dev); | |
432 | scc_t *sccp = fep->scc.sccp; | |
433 | ||
434 | S16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK); | |
435 | } | |
436 | ||
437 | static void napi_disable_rx(struct net_device *dev) | |
438 | { | |
439 | struct fs_enet_private *fep = netdev_priv(dev); | |
440 | scc_t *sccp = fep->scc.sccp; | |
441 | ||
442 | C16(sccp, scc_sccm, SCC_NAPI_RX_EVENT_MSK); | |
443 | } | |
444 | ||
445 | static void rx_bd_done(struct net_device *dev) | |
446 | { | |
447 | /* nothing */ | |
448 | } | |
449 | ||
450 | static void tx_kickstart(struct net_device *dev) | |
451 | { | |
452 | /* nothing */ | |
453 | } | |
454 | ||
455 | static u32 get_int_events(struct net_device *dev) | |
456 | { | |
457 | struct fs_enet_private *fep = netdev_priv(dev); | |
458 | scc_t *sccp = fep->scc.sccp; | |
459 | ||
460 | return (u32) R16(sccp, scc_scce); | |
461 | } | |
462 | ||
463 | static void clear_int_events(struct net_device *dev, u32 int_events) | |
464 | { | |
465 | struct fs_enet_private *fep = netdev_priv(dev); | |
466 | scc_t *sccp = fep->scc.sccp; | |
467 | ||
468 | W16(sccp, scc_scce, int_events & 0xffff); | |
469 | } | |
470 | ||
471 | static void ev_error(struct net_device *dev, u32 int_events) | |
472 | { | |
473 | printk(KERN_WARNING DRV_MODULE_NAME | |
474 | ": %s SCC ERROR(s) 0x%x\n", dev->name, int_events); | |
475 | } | |
476 | ||
477 | static int get_regs(struct net_device *dev, void *p, int *sizep) | |
478 | { | |
479 | struct fs_enet_private *fep = netdev_priv(dev); | |
480 | ||
481 | if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t)) | |
482 | return -EINVAL; | |
483 | ||
484 | memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t)); | |
485 | p = (char *)p + sizeof(scc_t); | |
486 | ||
487 | memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t)); | |
488 | ||
489 | return 0; | |
490 | } | |
491 | ||
492 | static int get_regs_len(struct net_device *dev) | |
493 | { | |
494 | return sizeof(scc_t) + sizeof(scc_enet_t); | |
495 | } | |
496 | ||
497 | static void tx_restart(struct net_device *dev) | |
498 | { | |
499 | struct fs_enet_private *fep = netdev_priv(dev); | |
500 | ||
501 | scc_cr_cmd(fep, CPM_CR_RESTART_TX); | |
502 | } | |
503 | ||
504 | /*************************************************************************/ | |
505 | ||
506 | const struct fs_ops fs_scc_ops = { | |
507 | .setup_data = setup_data, | |
508 | .cleanup_data = cleanup_data, | |
509 | .set_multicast_list = set_multicast_list, | |
510 | .restart = restart, | |
511 | .stop = stop, | |
512 | .pre_request_irq = pre_request_irq, | |
513 | .post_free_irq = post_free_irq, | |
514 | .napi_clear_rx_event = napi_clear_rx_event, | |
515 | .napi_enable_rx = napi_enable_rx, | |
516 | .napi_disable_rx = napi_disable_rx, | |
517 | .rx_bd_done = rx_bd_done, | |
518 | .tx_kickstart = tx_kickstart, | |
519 | .get_int_events = get_int_events, | |
520 | .clear_int_events = clear_int_events, | |
521 | .ev_error = ev_error, | |
522 | .get_regs = get_regs, | |
523 | .get_regs_len = get_regs_len, | |
524 | .tx_restart = tx_restart, | |
525 | .allocate_bd = allocate_bd, | |
526 | .free_bd = free_bd, | |
527 | }; |